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armjit: Correct NEON/non-VFPU reg allocation order.

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This fixes vh2f, which unbreaks games like Dissidia 012 and others.
This commit is contained in:
Unknown W. Brackets 2014-12-22 21:27:27 -08:00
parent 2e675c7b0b
commit cb50075cf9
1 changed files with 20 additions and 2 deletions
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22
Core/MIPS/ARM/ArmRegCacheFPU.cpp
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@ -90,6 +90,19 @@ const ARMReg *ArmRegCacheFPU::GetMIPSAllocationOrder(int &count) {
// as the NEON instructions are all 2-vector or 4-vector, they don't do scalar, we want to be
// able to use regular VFP instructions too.
static const ARMReg allocationOrderNEON[] = {
// Reserve four temp registers. Useful when building quads until we really figure out
// how to do that best.
S4, S5, S6, S7, // Q1
S8, S9, S10, S11, // Q2
S12, S13, S14, S15, // Q3
S16, S17, S18, S19, // Q4
S20, S21, S22, S23, // Q5
S24, S25, S26, S27, // Q6
S28, S29, S30, S31, // Q7
// Q8-Q15 free for NEON tricks
};
static const ARMReg allocationOrderNEONVFPU[] = {
// Reserve four temp registers. Useful when building quads until we really figure out
// how to do that best.
S4, S5, S6, S7, // Q1
@ -98,11 +111,16 @@ const ARMReg *ArmRegCacheFPU::GetMIPSAllocationOrder(int &count) {
// Q4-Q15 free for VFPU
};
// NOTE: It's important that S2/S3 are not allocated with bNEON, even if !useNEONVFPU.
// They are used by a few instructions, like vh2f.
if (jo_->useNEONVFPU) {
count = sizeof(allocationOrderNEON) / sizeof(const int);
count = sizeof(allocationOrderNEONVFPU) / sizeof(const ARMReg);
return allocationOrderNEONVFPU;
} else if (cpu_info.bNEON) {
count = sizeof(allocationOrderNEON) / sizeof(const ARMReg);
return allocationOrderNEON;
} else {
count = sizeof(allocationOrder) / sizeof(const int);
count = sizeof(allocationOrder) / sizeof(const ARMReg);
return allocationOrder;
}
}