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Add a safety log for cases we don't handle right.
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@ -282,6 +282,8 @@ void Jit::BranchVFPUFlag(u32 op, ArmGen::CCFlags cc, bool likely)
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CONDITIONAL_NICE_DELAYSLOT;
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if (!likely && delaySlotIsNice)
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CompileDelaySlot(DELAYSLOT_NICE);
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if (delaySlotIsBranch && (delaySlotOp & 0xFFFF) != offset - 1)
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ERROR_LOG_REPORT(JIT, "VFPU branch in VFPU delay slot at %08x with different target", js.compilerPC);
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FlushAll();
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@ -357,6 +357,8 @@ void Jit::BranchVFPUFlag(u32 op, Gen::CCFlags cc, bool likely)
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CONDITIONAL_NICE_DELAYSLOT;
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if (!likely && delaySlotIsNice)
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CompileDelaySlot(DELAYSLOT_NICE);
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if (delaySlotIsBranch && (signed short)(delaySlotOp & 0xFFFF) != (signed short)(op & 0xFFFF) - 1)
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ERROR_LOG(JIT, "VFPU branch in VFPU delay slot at %08x with different target %d / %d", js.compilerPC, (signed short)(delaySlotOp & 0xFFFF), (signed short)(op & 0xFFFF) - 1);
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FlushAll();
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