Commit Graph

15052 Commits

Author SHA1 Message Date
Sacha
10f6db27ca Add Mips CPU Detection. 2014-11-19 08:51:15 +10:00
xSacha
88b1c00a67 MIPS: Complete MIPSX rename for buildfix. 2014-11-19 07:55:44 +10:00
Henrik Rydgård
6a49337a0c Merge pull request #7096 from unknownbrackets/jit-simd
x86jit: Add basic support for mapping SIMD
2014-11-18 18:25:39 +01:00
Henrik Rydgård
33bc26a4bd Merge pull request #7098 from unknownbrackets/mips-emitter2
Initial MIPS emitter
2014-11-18 18:24:59 +01:00
Unknown W. Brackets
44fc7c6c71 mips: MIPSX -> MIPS. 2014-11-18 09:21:46 -08:00
Unknown W. Brackets
4de9b9692e mips: Add JALR/JR. QuickCallFunction should link. 2014-11-18 09:12:16 -08:00
Unknown W. Brackets
5b18353584 mips: Add helpers for constant loads. 2014-11-18 08:41:28 -08:00
Unknown W. Brackets
29365e6775 mips: Clean up MIPSXEmitter a bit.
Don't even want dangerous funcs like SUB().

Keeping things in opcode order at least locally so it doesn't get
confusing to maintain.  Also fixed a bunch of missing asserts.
2014-11-18 08:41:20 -08:00
xSacha
4167b66808 Add some more MIPS instructions 2014-11-18 08:41:09 -08:00
Sacha
65e008f053 Implement a MipsJit. 2014-11-18 08:40:57 -08:00
xSacha
3172fa22e2 Integrate new MIPS emitter. 2014-11-18 08:40:57 -08:00
Unknown W. Brackets
8b6a5f2ecc mips: Duh, oops. LUI is one reg, of course. 2014-11-18 08:40:30 -08:00
Unknown W. Brackets
0df0ea7d85 mips: Add a basic MIPSXCodeBlock. 2014-11-18 08:40:30 -08:00
Unknown W. Brackets
2903e72daa mips: Add basic load/store for the MIPS emitter. 2014-11-18 08:40:30 -08:00
Unknown W. Brackets
5cadab0273 mips: Add some basic jumping and logic instructions. 2014-11-18 08:40:29 -08:00
Unknown W. Brackets
6407e4a32a mips: Initial structure for a MIPS emitter. 2014-11-18 08:40:29 -08:00
Sacha
07ec247864 Use iconv if it exists. Some Linux systems need it and other don't. 2014-11-18 16:19:15 +10:00
Sacha
317d688fb4 Only set MOBILE_DEVICE and USING_GLES2 on ARM for known mobiles (iOS, Android, Blackberry). The others are usually Linux and use windowed environments. 2014-11-18 14:48:53 +10:00
Unknown W. Brackets
ab7dd0df25 x86jit: Add an option to enable/disable vpfu simd. 2014-11-17 20:37:27 -08:00
xSacha
df5b9b301c Buildfix for MIPS in debug mode.
Also, remove assumption that EGL means GLES2. My board supports EGL+Desktop GL too.
2014-11-18 13:39:25 +10:00
Henrik Rydgard
4ed97f9c60 Don't msgbox on game exit (homebrew can legitimately do this) 2014-11-17 21:25:08 +01:00
Henrik Rydgard
53b5d331b4 Assorted minor optimizations 2014-11-17 21:21:44 +01:00
Henrik Rydgard
3298c1143f Arm disasm: Coalesce multiple "BKPT 1" like we do on x86 for INT 3 2014-11-17 21:21:44 +01:00
Henrik Rydgard
74d8a9bdba Clean up after the block linker. armdis: add BKPT 2014-11-17 21:21:34 +01:00
Unknown W. Brackets
921b39ebf5 x86jit: Optimize a 2-reg simd load. 2014-11-16 15:05:17 -08:00
Unknown W. Brackets
e68eb0a292 x86jit: Load sequential regs in one shot. 2014-11-16 15:05:17 -08:00
Unknown W. Brackets
ed501302a2 x86jit: Add a check to see if we can map simd. 2014-11-16 15:05:16 -08:00
Unknown W. Brackets
27148d3712 x86jit: Add some helpers to check state. 2014-11-16 13:33:16 -08:00
Unknown W. Brackets
de566be2ce x86jit: Split out the logic for loading simd regs. 2014-11-16 13:33:15 -08:00
Unknown W. Brackets
5347431c20 x86jit: Initial simd for VecDo3(). Broken.
I'm not sure why/where it's broken...
2014-11-16 13:33:15 -08:00
Unknown W. Brackets
aad505e7b3 x86jit: Add a TryMapDirtyInInVS() for 3-op. 2014-11-16 13:33:14 -08:00
Unknown W. Brackets
88a753eff3 x86jit: Add an invariant contract to the fpu cache.
This should help catch things better in debug mode.
2014-11-16 13:33:14 -08:00
Unknown W. Brackets
39afeb490f x86jit: Add some typesafety. 2014-11-16 13:33:13 -08:00
Unknown W. Brackets
4335bf3346 x86jit: Add basic mapping of SIMD regs.
Not tested yet, just sketched out.  All very suboptimal.
2014-11-16 13:33:13 -08:00
Unknown W. Brackets
9429359b47 x86jit: Add fallbacks when moving from VS -> V. 2014-11-16 13:33:12 -08:00
Unknown W. Brackets
2862367927 x86jit: Add force-non-simd to all current ops.
Unless they already use MapRegs, because that will automatically handle
it.
2014-11-16 13:33:12 -08:00
Unknown W. Brackets
4cf0913692 x86jit: Sketch some initial SIMD apis. 2014-11-16 13:33:07 -08:00
Henrik Rydgard
e43c7af32c ARM Jit: Implement quaternion multiplication 2014-11-16 19:12:00 +01:00
Henrik Rydgard
bfcd3690b6 x86 jit: Fix+enable quaternion product, optimize "sw zero, *" 2014-11-16 18:37:38 +01:00
Henrik Rydgard
4422b3deb7 x86: Minor soft-skinning optimization 2014-11-16 17:43:29 +01:00
Henrik Rydgard
28ca8d4818 x86 jit: Use LEA to emulate addu but only when it can save a few bytes 2014-11-16 17:39:47 +01:00
Henrik Rydgard
1c78e29c79 x86 jit: For clarity, use TEMPREG where it doesn't matter that it's EAX.
Might have missed a few places.
2014-11-16 17:38:26 +01:00
Henrik Rydgard
8b90f881b8 x86 jit: A tiny optimization and a tiny bugfix 2014-11-16 16:46:35 +01:00
Henrik Rydgard
b09fe89be4 Improvements in Jit compare UI 2014-11-16 16:45:24 +01:00
Henrik Rydgård
22515d1b05 Merge pull request #7093 from chinhodado/patch-7
Use const
2014-11-14 23:47:00 +01:00
chinhodado
4bac356df6 Use const 2014-11-14 16:13:06 -05:00
Sacha
ff97421470 Fix Blackberry build. 2014-11-14 18:07:29 +10:00
Henrik Rydgård
95e164f2cc Merge pull request #7091 from chinhodado/patch-6
Cleanup an unused variable
2014-11-13 22:46:53 +01:00
chinhodado
2130d86cef Cleanup 2014-11-13 15:38:25 -05:00
Henrik Rydgård
af3853f1f1 Merge pull request #7090 from sum2012/MAC2
Fix Wrong MAC address by old version by "Change MAC address"
2014-11-13 19:16:33 +01:00