Unknown W. Brackets
921b39ebf5
x86jit: Optimize a 2-reg simd load.
2014-11-16 15:05:17 -08:00
Unknown W. Brackets
e68eb0a292
x86jit: Load sequential regs in one shot.
2014-11-16 15:05:17 -08:00
Unknown W. Brackets
ed501302a2
x86jit: Add a check to see if we can map simd.
2014-11-16 15:05:16 -08:00
Unknown W. Brackets
27148d3712
x86jit: Add some helpers to check state.
2014-11-16 13:33:16 -08:00
Unknown W. Brackets
de566be2ce
x86jit: Split out the logic for loading simd regs.
2014-11-16 13:33:15 -08:00
Unknown W. Brackets
5347431c20
x86jit: Initial simd for VecDo3(). Broken.
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I'm not sure why/where it's broken...
2014-11-16 13:33:15 -08:00
Unknown W. Brackets
aad505e7b3
x86jit: Add a TryMapDirtyInInVS() for 3-op.
2014-11-16 13:33:14 -08:00
Unknown W. Brackets
88a753eff3
x86jit: Add an invariant contract to the fpu cache.
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This should help catch things better in debug mode.
2014-11-16 13:33:14 -08:00
Unknown W. Brackets
39afeb490f
x86jit: Add some typesafety.
2014-11-16 13:33:13 -08:00
Unknown W. Brackets
4335bf3346
x86jit: Add basic mapping of SIMD regs.
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Not tested yet, just sketched out. All very suboptimal.
2014-11-16 13:33:13 -08:00
Unknown W. Brackets
9429359b47
x86jit: Add fallbacks when moving from VS -> V.
2014-11-16 13:33:12 -08:00
Unknown W. Brackets
2862367927
x86jit: Add force-non-simd to all current ops.
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Unless they already use MapRegs, because that will automatically handle
it.
2014-11-16 13:33:12 -08:00
Unknown W. Brackets
4cf0913692
x86jit: Sketch some initial SIMD apis.
2014-11-16 13:33:07 -08:00
Henrik Rydgard
e43c7af32c
ARM Jit: Implement quaternion multiplication
2014-11-16 19:12:00 +01:00
Henrik Rydgard
bfcd3690b6
x86 jit: Fix+enable quaternion product, optimize "sw zero, *"
2014-11-16 18:37:38 +01:00
Henrik Rydgard
4422b3deb7
x86: Minor soft-skinning optimization
2014-11-16 17:43:29 +01:00
Henrik Rydgard
28ca8d4818
x86 jit: Use LEA to emulate addu but only when it can save a few bytes
2014-11-16 17:39:47 +01:00
Henrik Rydgard
1c78e29c79
x86 jit: For clarity, use TEMPREG where it doesn't matter that it's EAX.
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Might have missed a few places.
2014-11-16 17:38:26 +01:00
Henrik Rydgard
8b90f881b8
x86 jit: A tiny optimization and a tiny bugfix
2014-11-16 16:46:35 +01:00
Henrik Rydgard
b09fe89be4
Improvements in Jit compare UI
2014-11-16 16:45:24 +01:00
Henrik Rydgård
22515d1b05
Merge pull request #7093 from chinhodado/patch-7
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Use const
2014-11-14 23:47:00 +01:00
chinhodado
4bac356df6
Use const
2014-11-14 16:13:06 -05:00
Sacha
ff97421470
Fix Blackberry build.
2014-11-14 18:07:29 +10:00
Henrik Rydgård
95e164f2cc
Merge pull request #7091 from chinhodado/patch-6
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Cleanup an unused variable
2014-11-13 22:46:53 +01:00
chinhodado
2130d86cef
Cleanup
2014-11-13 15:38:25 -05:00
Henrik Rydgård
af3853f1f1
Merge pull request #7090 from sum2012/MAC2
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Fix Wrong MAC address by old version by "Change MAC address"
2014-11-13 19:16:33 +01:00
Sacha
965c7e026d
Update native.
2014-11-14 03:17:38 +10:00
sum2012
395ff97ecf
Fix min mac problem
2014-11-13 23:57:16 +08:00
sum2012
feb23d717d
Fix Wrong MAC address by old version by "Change MAC address"
2014-11-13 23:56:08 +08:00
Sacha
a95500c930
Successful build on GCW-Zero.
2014-11-14 01:41:43 +10:00
Henrik Rydgård
653ac91d6a
Merge pull request #7089 from sum2012/MAC
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Fix Wrong MAC address by "Change MAC address"
2014-11-13 16:05:55 +01:00
sum2012
486c32b91b
Fix 0A to 0F
2014-11-13 22:57:57 +08:00
sum2012
05b293c632
No need bracket
2014-11-13 22:20:29 +08:00
sum2012
122c3b866e
Fix Wrong MAC address by "Change MAC address"
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Part 1 of 7088
2014-11-13 22:13:57 +08:00
Sacha
92b0f3b7d9
Minor change. Fix build.
2014-11-13 23:45:45 +10:00
xSacha
c228b9a61e
Update for CMake.
2014-11-13 23:23:53 +10:00
xSacha
57e4088216
Introduce fake vertex decoder JIT as well.
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Compiles and links on CI20 but gets unknown crash in GL driver.
2014-11-13 17:10:29 +10:00
Sacha
c421617c84
Fix Qt build by building Arm disassembler for all platforms.
2014-11-13 00:55:00 +10:00
Sacha
a0086f6412
Introduce a Fake JIT for generic builds.
2014-11-13 00:09:51 +10:00
Henrik Rydgård
cbef4fae26
Merge pull request #7083 from Kingcom/Disasm
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Change vpfxs/r/t disassembly syntax
2014-11-12 00:39:03 +01:00
Henrik Rydgard
9e0aa8eaa3
Drop silly way of doing CPUID on Android, the right way seems to work
2014-11-12 00:29:16 +01:00
Kingcom
479c8646a2
Change vpfxs/r/t disassembly syntax
2014-11-12 00:09:57 +01:00
Henrik Rydgard
784bf82b58
Improve AVX check in CPUDetect. Warning fix.
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Keeping the ifdef for zenfone - still doesn't work without it
2014-11-11 23:48:58 +01:00
Henrik Rydgard
7409263eb0
Make CPUDetect.cpp not blow up on Zenfone devices.
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Don't really know what's going on here, but this seems like the easiest way out. Appears that CPUID really is buggy on this hardware, which seems weird. Alternate explanations would be that we are checking the wrong bits for xgetbv support or something...
2014-11-11 23:08:28 +01:00
Sacha
ee0c593258
Fix Android.
2014-11-12 03:19:46 +10:00
Unknown W. Brackets
c02172ebd5
vertexjit: Oops, this wasn't supposed to be there.
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Fixes #7081 .
2014-11-11 08:31:27 -08:00
Henrik Rydgård
a8b310ed34
Merge pull request #7078 from unknownbrackets/jit-minor
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x86jit: Use simd for vcmp comparisons where possible
2014-11-11 14:58:21 +01:00
Henrik Rydgård
eb4ce44f19
Merge pull request #7079 from xsacha/new_archs
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Better support for new archs.
2014-11-11 14:58:08 +01:00
Sacha
1ba9103cef
Better support for new archs.
2014-11-11 22:55:49 +10:00
Unknown W. Brackets
096b41cceb
x86jit: Interleave reg usage in vcmp.
2014-11-10 23:22:04 -08:00
