Commit Graph

1796 Commits

Author SHA1 Message Date
Unknown W. Brackets
a9d0390426 Adjust downcount before syscalls, not after.
This makes jit slightly slower for syscalls, but it's minor and makes
sure jit and interpreter timing are determistically the same.
2013-01-21 22:57:53 -08:00
Unknown W. Brackets
c8fe172239 Fix headless segfault on win32. 2013-01-21 22:46:53 -08:00
Unknown W. Brackets
566b7a0910 A branch was missing inDelaySlot, refactor it. 2013-01-21 22:45:07 -08:00
Sacha
0ce45cef55 Update for Qt project files. New Symbian icon (Belle style) thanks to z435312561. Stat64 -> stat. 2013-01-22 16:17:44 +10:00
Unknown W. Brackets
c897e6446a Don't over decr downcount when hitting a jit bp. 2013-01-21 19:41:12 -08:00
Unknown W. Brackets
04130c812a Show the current tick count in the disasm dialog.
Might as well show something under Ctr:...
2013-01-21 19:20:49 -08:00
Unknown W. Brackets
d99d060c2e Decrement downcount in skipped likely slots.
Pretty sure this is right, it eats up a cycle as a nop.

Also some funny indentation.
2013-01-21 19:00:09 -08:00
Unknown W. Brackets
8438371941 Read memory in the jit dispatcher same as lw.
Just for consistency.  One less op, maybe faster, probably same.
2013-01-21 17:51:14 -08:00
Henrik Rydgard
b30ab91379 GCC fix 2013-01-21 19:19:41 +01:00
Henrik Rydgard
2f0cf82f72 Don't expand normals and positions to floats unless necessary.
Fix sign of Z component of position in through mode.
2013-01-21 19:12:46 +01:00
Henrik Rydgård
57ec89f507 Merge pull request #462 from raven02/master
Set time format in config , make 24HR as default
2013-01-21 06:10:33 -08:00
raven02
4d1903f50c Set time format in config 2013-01-21 21:35:31 +08:00
Unknown W. Brackets
5170931aad Buildfix for Windows. 2013-01-21 01:15:57 -08:00
Henrik Rydgård
e370f653fb Merge pull request #458 from Xele02/testsceio
Improve sceIo for passing autotest
2013-01-21 00:21:48 -08:00
Henrik Rydgård
65203f3833 Merge pull request #459 from unknownbrackets/jit-branch
Jit branch debugging
2013-01-21 00:21:00 -08:00
Henrik Rydgård
c9f4b9095b Merge pull request #460 from unknownbrackets/downcount
Decrement downcount in the interpreter
2013-01-21 00:18:43 -08:00
Unknown W. Brackets
49965b7f1d Decrement downcount in the interpreter. 2013-01-20 21:48:38 -08:00
Unknown W. Brackets
1485b0865c Improve the speed of branch debugging a bit. 2013-01-20 19:48:55 -08:00
Unknown W. Brackets
dd69694302 Add some optional logging to debug jit branching. 2013-01-20 19:48:55 -08:00
Unknown W. Brackets
4c271fc09e Add DELAYSLOT and LIKELU flags to some ops.
Should improve cycle estimate, and makes analysis easier.
2013-01-20 19:48:54 -08:00
Unknown W. Brackets
776eb8ab2e Simplify CompileDelaySlot(). 2013-01-20 19:48:54 -08:00
Unknown W. Brackets
df06bb5624 Add some checks to make sure ZERO is never set. 2013-01-20 19:48:53 -08:00
Xele02
72ddb368b4 Forget headless file 2013-01-21 01:50:42 +01:00
Xele02
0633c18438 submodule sync 2013-01-21 01:38:24 +01:00
Xele02
77af8f4727 Change cast which break build on linux 2013-01-21 01:25:48 +01:00
Xele02
3825df5c6a Improve sceIo to pass io autotest.
io/io, io/cwd, io/directory ok
io/file still have a file mode fail
2013-01-21 01:25:48 +01:00
Henrik Rydgard
784c191caf Fix bugs with fog bit in shader IDs 2013-01-21 00:34:37 +01:00
Henrik Rydgård
9a132e6a85 Merge pull request #456 from unknownbrackets/jit-slowmem
Jit for sb, further optimizations
2013-01-20 14:19:11 -08:00
Henrik Rydgård
1b563f500c Merge pull request #457 from hrydgard/vertexcache
Vertex cache
2013-01-20 14:17:36 -08:00
Henrik Rydgard
8d845cc588 quick implementation of sceKernelReferMutexStatus 2013-01-20 23:11:48 +01:00
Henrik Rydgard
3b8ea62b05 Cannot cache vertices when morph is enabled. 2013-01-20 22:48:29 +01:00
Henrik Rydgard
e15b580df6 Avoid using an element buffer in more cases. 2013-01-20 22:42:38 +01:00
Unknown W. Brackets
a43078ab68 Same optimization for FPU load / store. 2013-01-20 13:16:41 -08:00
Unknown W. Brackets
f5963df0dc Optimize write to a single x64 op too. 2013-01-20 13:06:19 -08:00
Henrik Rydgard
d9c9a9102a Tiled renderers are much faster if we clear FBOs before rendering.
Alternatively we could use glDiscardFramebufferEXT but I haven't figured out how to call it.
2013-01-20 22:05:11 +01:00
Unknown W. Brackets
e8dc99328a Avoid using EAX as a temporary where possible.
All the regs should be indirect addressing compatible.  So if it's
in a reg, let's use that instead of EAX.
2013-01-20 12:57:14 -08:00
Henrik Rydgard
611fb3536f Try to use glDrawArrays in more situations, saving us a buffer. Misc. 2013-01-20 21:52:54 +01:00
Unknown W. Brackets
eaa24ee047 Use EDX as a temporary for sb, and jit it. 2013-01-20 12:25:08 -08:00
Henrik Rydgard
8b4deb93ce Merge branch 'master' into vertexcache 2013-01-20 19:18:52 +01:00
Unknown W. Brackets
4075c3a77f Merge pull request #455 from unknownbrackets/jit-slowmem
Fix stupid stupid typo breaking slowmem jit.
2013-01-20 09:41:39 -08:00
Unknown W. Brackets
30f6a4ba87 Fix stupid stupid typo breaking slowmem jit. 2013-01-20 09:39:13 -08:00
Henrik Rydgård
b93f974ff1 Merge pull request #423 from raven02/hw
Fix alpha blending for HW transform
2013-01-20 08:22:31 -08:00
Henrik Rydgard
1b1a275dcc GPU "dirty" optimization, wip vertexcache 2013-01-20 13:15:46 +01:00
Henrik Rydgård
b38dbf24c4 Merge pull request #454 from unknownbrackets/jit-slowmem
Make swc1 and lwc1 faster even without fastmem
2013-01-20 02:53:06 -08:00
Henrik Rydgard
04860322f4 Merge branch 'master' into vertexcache 2013-01-20 11:30:11 +01:00
Unknown W. Brackets
da22eb8adf Make swc1 and lwc1 fast even without fastmem. 2013-01-20 02:07:00 -08:00
Henrik Rydgård
2cb830510c Merge pull request #444 from unknownbrackets/jit-minor
Don't muck with currentMIPS->r directly in the slowmem jit
2013-01-20 01:58:48 -08:00
Henrik Rydgård
5274ddf54d Merge pull request #450 from Xele02/master
Set the PSP language in the config file
2013-01-20 01:57:14 -08:00
Xele02
ccdc0b77c1 Set the PSP language in the config file 2013-01-20 10:50:05 +01:00
Henrik Rydgård
3ad4e0f9fd Merge pull request #452 from unknownbrackets/jit-mismap
Log missed jit ops for poor man profiling
2013-01-20 01:34:34 -08:00