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19,232 Commits 19 Branches 54 Tags 247 MiB
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59 Commits

Author SHA1 Message Date
Sacha
bbc4f64999 MIPS: Fix build so we can compile this again. 2015-10-29 02:46:43 +00:00
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909e4b9bd8 Switch lo and hi so that low comes first. 
This way we can treat it as a single 64-bit value.
 2015-06-28 10:42:19 -07:00
Henrik Rydgard
e7e58591da More JIT work, not quite there yet... 2015-04-06 18:13:04 +02:00
Henrik Rydgard
b309c83973 Initial work on ARM64, based on the ARM jit. 2015-04-06 18:13:01 +02:00
Henrik Rydgård
53ab7ab4b2 Fix FakeJit, start preparing a little for ARM64 2014-12-23 09:36:28 +01:00
Henrik Rydgard
8ad1ea4c84 Split JitCommon.h so that you can include it without getting the "NativeJit" definition 2014-12-13 21:13:28 +01:00
Henrik Rydgard
75a9420b21 Reduce the number of places we include JitCommon.h. Update native. 2014-12-12 23:49:08 +01:00
Henrik Rydgard
4457dca4c9 Rename the ARM Jit class to ArmJit 2014-12-07 14:25:22 +01:00
xSacha
3172fa22e2 Integrate new MIPS emitter. 2014-11-18 08:40:57 -08:00
Sacha
a0086f6412 Introduce a Fake JIT for generic builds. 2014-11-13 00:09:51 +10:00
Henrik Rydgård
91966824bb minor cleanup: No point in having special functions for ReadFCR/WriteFCR, they're smaller than many other ops.. 2014-10-11 15:57:36 +02:00
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c9df66a450 Initialize the VFPU revision from a PSP-3000 value. 2014-09-01 23:16:50 -07:00
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c0e6f26bb5 Fix startDefaultPrefix tripping. 
We want the regs already initialized when we set this up.
 2014-06-30 08:10:14 -07:00
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f544a87b2f jit: Initialize startDefaultPrefix when switching. 2014-06-28 00:38:56 -07:00
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9efbc2694b Add an invalidate all method to the jit. 2014-06-19 01:13:06 -07:00
Henrik Rydgard
0879d76503 VFPU: Ensure that sin(4*x) returns 0.0 (and cos 1) for all x. Fixes #2921 2014-06-15 11:03:00 +02:00
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a70b5abfb9 Allow jit to be enabled/disabled at runtime. 2014-05-27 00:02:51 -07:00
Henrik Rydgard
c80510fb3b MemMap should not be included in MIPS.h. 2014-03-15 10:45:39 +01:00
Henrik Rydgård
2b05a60d9d Clear out the jit pointer on shutdown. Some cleanup. 2014-01-28 11:32:54 +01:00
Henrik Rydgård
79ff2f0ba8 Start untangling our include mess a little. 2013-12-29 23:34:45 +01:00
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dd2e996838 Fix some type comparison warnings. 2013-12-01 11:21:16 -08:00
Henrik Rydgard
50a589ea72 Extend sanity check for vfpu reordering array. 2013-11-28 13:27:52 +01:00
Henrik Rydgard
f9f6e9492d Reorder vfpu data in saved kernel contexts when loading in a new version. 2013-11-28 13:27:51 +01:00
Henrik Rydgard
55500d4bb6 Reorder VFPU registers in memory so that we can flush and reload them in bulk more often. 
Doesn't actually do that yet, that's for the NEON branch.
 2013-11-28 13:27:51 +01:00
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f165a15eff Fix a -unsigned warning. 
Looks ugly, but (u32)-(s32)val is what we really want here.

Also make a __FUNCTION__ redeclaration warning go away.
 2013-11-15 08:18:34 -08:00
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5128083d93 Mask out fcr31 bits that can't be set on a PSP. 2013-11-14 23:57:28 -08:00
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26f5922174 Return the correct value for fcr0/fir. 
This is what the PSP actually returns, it's read only.
 2013-11-14 23:39:08 -08:00
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50e9e45d65 Check version in each DoState() func. 
They bail on PointerWrap error or bad version.
 2013-09-14 20:23:03 -07:00
Ced2911
c94d9b62d0 Update ppc jit 2013-09-12 10:18:59 +02:00
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da0c9a86e5 Invalidate stubs/var imports when writing them. 2013-09-01 00:32:43 -07:00
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97aa1a631e Improve typesafety in the x86 regalloc. 2013-08-24 19:41:10 -07:00
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3f49101868 Clean up the COP1 MIPS tables, and reporting. 2013-08-11 19:35:39 -07:00
Henrik Rydgard
d8294f025f More VFPU stuff (nothing new activated) 2013-07-30 01:09:11 +02:00
Henrik Rydgard
afcb5add51 Minor code cleanup/reindent around ARM jit 2013-07-27 22:14:01 +02:00
Henrik Rydgard
5877929fe5 Add Mersenne Twister random number generator. 2013-05-20 00:57:45 +02:00
Henrik Rydgard
9eace8a80e Combine the two JitCache implementations (x86, ARM) into one. 2013-04-27 01:32:03 +02:00
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c4ab0855b4 Make sure interpreter and jit savestates match. 2013-03-08 08:49:21 -08:00
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afb7c0b83c Assume prefixes start default until proven wrong. 
Currently this means nothing since the MIPSTables flags are wrong.
It will blow the cache once, after the first vfpu op.
 2013-02-18 01:14:57 -08:00
Henrik Rydgard
37f998407b Replace "Core" with "Jit" in ini. Don't show Open dialog by default (use Ctrl+A or Ctrl+O to open it). 
Delete "Slightly Faster Interpreter".
 2013-02-16 09:49:33 +01:00
Henrik Rydgard
909b768f47 Don't need separate variables for writemask. Some optimizations. 2013-02-16 09:28:55 +01:00
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2a6457b6ab Cut down on h files including PointerWrap. 
This makes changes to it a bit faster to build.
 2013-02-04 08:26:59 -08:00
Henrik Rydgard
74a46f60ed Initialize downcount. 2013-01-14 23:03:37 +01:00
Henrik Rydgard
674911ddba Move downcount into MIPSState for efficiency, enable block linking. 
On ARM JIT we can now reach it through the cpu context reg.
 2013-01-12 00:44:18 +01:00
Henrik Rydgard
a2ff416534 Rename files. Rewrite ArmRegCache from scratch. 2013-01-07 22:33:09 +01:00
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e3e6f81dfa Snapshot the CPU state as well. 2012-12-28 13:55:27 -08:00
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df04bbe4dd Fix a crash when switching between jit/interp. 2012-12-26 03:30:08 -08:00
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3c08a87404 Properly cleanup the jit on reset. 2012-12-23 23:33:10 -08:00
Sacha
3c903dda24 Improve portability to future platforms. Make use of new USING_GLES2 define throughout PPSSPP. Also use ARM definition where suitable. Remove some redundancy with includes. 2012-11-26 13:25:14 +10:00
Henrik Rydgard
a97f66766d Add "slightly faster interpreter", optimizing the most common instrs. Not as helpful as I thought it would be on Android, really need a proper JIT. 2012-11-23 12:42:35 +01:00
Henrik Rydgard
4b87da74cb windows gui option for buffered rendering. Misc fixes, prettier checkbox on android. 2012-11-20 11:35:48 +01:00