Commit Graph

1717 Commits

Author SHA1 Message Date
Sacha
d77632bfb0 Fix literal pools on games with very large code blocks (eg. Zero no Kieski).
Was flushing after an offset of 4088 which did not take in to account that a single MIPS instruction can turn in to numerous ARM instructions. Chose a safer value of 4020.
Was insta-flushing after reaching this offset value. Some code blocks are over 8K in size. Use a partialFlushOffset to keep track of when the next flush is required.
Was protecting flush branch manually. Can use B_CC(CC_AL) for this instead.
2013-03-07 02:25:27 +10:00
Sacha
8125d96ce1 Small update for shifted load/stores. Still disabled. 2013-03-07 01:04:41 +10:00
Sacha
a8b6fca61b Separate codepaths for shifted load/stores and normal load/stores. Fix dirty regs. 2013-03-07 00:59:07 +10:00
Sacha
ae3b881a7f Use correct args for Operand2(..) through armjit. Fix STR(..). 2013-03-07 00:59:07 +10:00
Sacha
268d16bd24 Use correct args for STR(..) throughout armjit. 2013-03-07 00:59:07 +10:00
Sacha
23fb88c5fe Enable optimisation codepath (left+right combines). 2013-03-07 00:59:07 +10:00
Unknown W. Brackets
b87c9839de Correctly make psmfPlayerStatus per instance. 2013-03-06 01:00:26 -08:00
Unknown W. Brackets
e361ae7e85 Check for bad psmfplayer param in status.
Improves Mana Khemia: Student Alliance.
2013-03-06 00:50:42 -08:00
raven02
9f127fcf0d Turn down level sceAtracDecodeData log level 2013-03-06 07:02:40 +08:00
raven02
db7f23faf7 Turn down level sceMpegAtracDecode log level 2013-03-06 07:01:40 +08:00
raven02
757ff087f9 Making the input letter closer 2013-03-06 06:47:21 +08:00
Henrik Rydgard
9f327985fc armjit: disable lwl/lwr/swl/swr 2013-03-05 23:09:26 +01:00
Henrik Rydgård
aca4740484 Merge pull request #867 from sum2012/master
IMPL Some Mpeg and Handle ringbufferAddr =0 in sceMpegCreate
2013-03-05 12:09:26 -08:00
Sacha
5a134243a7 Armjit: Fix lwl, lwr and enable again. Thanks Sonic. 2013-03-06 03:28:28 +10:00
Sacha
7e67de3334 Armjit: Implement lwl, lwr, swl, swr in ARM JIT. lwr is currently disabled as it isn't working. 2013-03-06 02:11:36 +10:00
Sacha
9152d2f2bb Armjit: Optimise swl+swr and lwl+lwr cases that can be combined to a single sw or lw. Add shift flags to STR/LDR. Add EatInstruction to ArmJit. 2013-03-06 02:11:36 +10:00
Henrik Rydgård
d42293033f Merge pull request #872 from raven02/patch-2
Implement sceDisplayGetMode & wrap *Hcount* , sceDisplayIsVblank
2013-03-05 06:46:15 -08:00
raven02
4290700a12 OSK typo 2013-03-05 22:43:04 +08:00
raven02
0d5d735d34 Wrap sceDisplayIsVblank as well 2013-03-05 21:34:22 +08:00
raven02
866bdb3039 Implement sceDisplayGetMode & wrap *Hcount* 2013-03-05 21:31:13 +08:00
sum2012
4b45af3630 Remove PSP_ERROR_MPEG_INVALID_VALUE in scempeg.cpp 2013-03-05 21:05:25 +08:00
Sacha
33c6df55db Build fix 2013-03-05 15:20:14 +10:00
Sacha
65a83d70c7 Armjit: Implement clo as well. Fix up the reg usage in div/divu comment. 2013-03-05 15:14:22 +10:00
Sacha
60b84e71d5 Armjit: Re-enable reg shifts. Thanks [Unknown] for finding the issue. 2013-03-05 14:55:33 +10:00
Sacha
4641cf376f Armjit: Implement CLZ instruction. Disable reg shifts for now (breaks Wipeout Pure). 2013-03-05 14:16:35 +10:00
Sacha
4a56ebd0a0 Armjit: Add sllv, srlv, srav instructions (reg shift). 2013-03-05 13:52:03 +10:00
Sacha
10ad797c6d Armjit stubs.
Add a double encoding for VCVT. Implement integer divide (but not working yet). Stubs for msub/msubu. Don't detect vfpv3 on Symbian.
2013-03-05 13:16:08 +10:00
sum2012
03841486e1 Handle ringbufferAddr =0 in sceMpegCreate 2013-03-05 10:01:45 +08:00
sum2012
a79713b8c4 Add a debug log for sceMpegAvcResourceFinish 2013-03-05 09:18:21 +08:00
sum2012
fd50dc3a9d Add a comment that it's just a random address 2013-03-05 09:12:47 +08:00
sum2012
5ce82bc028 IMPL Some Mpeg
ref https://github.com/hrydgard/ppsspp/issues/508
please help to check whether I IMPL correctly
2013-03-05 08:39:32 +08:00
Henrik Rydgard
e7226a9716 Approximately rollback the last change to sceKernelReferThreadProfiler 2013-03-05 00:21:00 +01:00
Henrik Rydgard
3714eebbbe Actually register scePspNpDrm_user 2013-03-04 23:54:03 +01:00
Henrik Rydgard
062c975b46 Ignore cache function 24. 2013-03-04 23:51:19 +01:00
Marcin Mikołajczyk
f406ad701c Fix sceKernelReferThreadProfiler types, implement scePowerGetPllClockFreqFloat 2013-03-04 23:39:59 +01:00
Henrik Rydgard
d4603136f0 Minor stuff: Fake-implement sceKernelReferThreadProfiler, make sure GPU frame dump logging gets output by not sending it to G3D. 2013-03-04 22:15:39 +01:00
Henrik Rydgard
bf23c6f5e1 Turn down sceGeContinue and sceGeBreak log level.
We know them and they're mostly used by our own debug overlay.
2013-03-04 19:52:10 +01:00
Sacha
d5feb4d3ff Quick build fix 2013-03-05 03:13:33 +10:00
Sacha
1089a31a45 Armjit: add reverse bit instruction. 2013-03-05 02:58:51 +10:00
Henrik Rydgård
baf805f883 Merge pull request #851 from sum2012/master
Add Ini for use Media Engine
2013-03-04 06:51:39 -08:00
sum2012
47db8612ca Change default to true 2013-03-04 22:39:42 +08:00
Sacha
bce3295950 Fix graphical issues. DISABLE INS instruction for now. Fix OR (it was doing AND). 2013-03-04 22:09:45 +10:00
Henrik Rydgård
67f7bfa747 Merge pull request #859 from unknownbrackets/report-server
Server reporting (off by default)
2013-03-04 00:38:33 -08:00
Henrik Rydgård
f6ea9237af Merge pull request #855 from unknownbrackets/memory
Fix sceKernelPartitionMemory() alignment
2013-03-04 00:20:51 -08:00
Henrik Rydgård
d07e6ec3b0 Merge pull request #853 from unknownbrackets/savestates
Fix font savestates, don't load garbage in sceIo
2013-03-04 00:20:02 -08:00
Unknown W. Brackets
f4bde1a263 Android / iOS buildfix. 2013-03-04 00:09:37 -08:00
Unknown W. Brackets
6f22d6960e Add some reporting for not yet done dialogs. 2013-03-04 00:01:42 -08:00
Unknown W. Brackets
ac1209204c Add some reporting for CPU related stuff. 2013-03-04 00:01:41 -08:00
Unknown W. Brackets
d9608bd608 Report the format string as a separate param.
This way it can have a "class" of messages more easily.
2013-03-04 00:01:41 -08:00
Unknown W. Brackets
cb4c7f0eb6 Add some basic reporting hooks. 2013-03-04 00:01:40 -08:00