!1 添加源码

Merge pull request !1 from huohongpeng/OpenHarmony-3.2-Beta2

BUILD.gn

@@ -0,0 +1,41 @@
+# Copyright (c) 2022 HPMicro.
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+if (ohos_kernel_type == "liteos_m") {
+  import("//kernel/liteos_m/liteos.gni")
+  module_name = get_path_info(rebase_path("."), "name")
+  module_group(module_name) {
+    modules = [
+      "drivers",
+      "application"
+    ]
+    if (defined(LOSCFG_BOARD_HPM6750EVK)) {
+      modules += [
+        "hpm6750evk",
+      ]
+    }
+    if (defined(LOSCFG_BOARD_HPM6750EVKMINI)) {
+      modules += [
+        "hpm6750evkmini",
+      ]
+    }
+    if (defined(LOSCFG_BOARD_HPM6300EVK)) {
+      modules += [
+        "hpm6300evk",
+      ]
+    }
+    modules += [
+      "${product_path}/hdf_config",
+    ]
+  }
+}

Kconfig.liteos_m.boards

@@ -0,0 +1,15 @@
+# Copyright (c) 2022 HPMicro.
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+orsource "*/Kconfig.liteos_m.board"
+

Kconfig.liteos_m.defconfig.boards

@@ -0,0 +1,18 @@
+# Copyright (c) 2022 HPMicro.
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+config BOARD_COMPANY_HPMCIRO
+    bool 
+    default false
+
+orsource "*/Kconfig.liteos_m.defconfig.board"

Kconfig.liteos_m.shields

@@ -0,0 +1,15 @@
+# Copyright (c) 2021 FnLink (hunan) Technologies CO., LIMITED.
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+#orsource "shields/Kconfig.liteos_m.defconfig.shields"
+#orsource "shields/Kconfig.liteos_m.shields"

application/BUILD.gn

@@ -0,0 +1,23 @@
+# Copyright (c) 2022 HPMicro.
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+
+import("//kernel/liteos_m/liteos.gni")
+module_name = get_path_info(rebase_path("."), "name")
+module_group(module_name) {
+  modules = [
+    "watchdog",
+    "gpio",
+  ]
+}
+

application/Kconfig.liteos_m.defconfig.board

@@ -0,0 +1,35 @@
+# Copyright (c) 2022 HPMicro.
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+if BOARD_COMPANY_HPMCIRO
+
+menu "Applications for HPMicro"
+config WDT_DRIVER_TEST
+    bool "watchdog driver test"
+    default n
+
+config GPIO_DRIVER_IN_TEST
+    bool "gpio driver input test"
+    default n
+
+config GPIO_DRIVER_OUT_TEST
+    bool "gpio driver output test"
+    default n
+
+config GPIO_DRIVER_IRQ_TEST
+    bool "gpio driver interrupt test"
+    default n  
+endmenu
+
+endif #BOARD_COMPANY_HPMCIRO
+

application/gpio/BUILD.gn

@@ -0,0 +1,45 @@
+# Copyright (c) 2022 HPMicro.
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+import("//kernel/liteos_m/liteos.gni")
+import("//drivers/hdf_core/adapter/khdf/liteos_m/hdf.gni")
+
+module_name = get_path_info(rebase_path("."), "name")
+module_switch = true
+
+hdf_driver(module_name) {
+  include_dirs = [ 
+    "//base/hiviewdfx/hilog_lite/interfaces/native/kits/hilog_lite"
+  ]
+
+  cflags = [ "-Wall", "-Werror"]
+  
+  sources = []
+  if (defined(LOSCFG_GPIO_DRIVER_IN_TEST)) {
+    sources += [ 
+      "app_gpio_in.c",
+    ]
+  }
+
+  if (defined(LOSCFG_GPIO_DRIVER_OUT_TEST)) {
+    sources += [ 
+      "app_gpio_out.c",
+    ]
+  }
+
+  if (defined(LOSCFG_GPIO_DRIVER_IRQ_TEST)) {
+    sources += [ 
+      "app_gpio_irq.c",
+    ]
+  }
+}

application/gpio/app_gpio_in.c

@@ -0,0 +1,95 @@
+/*
+ * Copyright (c) 2022 HPMicro.
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#include <ohos_init.h>
+#include <stdio.h>
+#include <los_task.h>
+#include <stdint.h>
+#include <log.h>
+#include <gpio_if.h>
+#include <hpm_soc.h>
+#include <hpm_clock_drv.h>
+
+#define LOG_TAG "HPM_GPIO_OUT"
+
+#define GPIOA(pin) (pin)
+#define GPIOB(pin) (pin + 32)
+#define GPIOC(pin) (pin + 32 * 2)
+#define GPIOD(pin) (pin + 32 * 3)
+#define GPIOE(pin) (pin + 32 * 4)
+#define GPIOF(pin) (pin + 32 * 5)
+#define GPIOY(pin) (pin + 32 * 14)
+#define GPIOZ(pin) (pin + 32 * 15)
+
+static void *GpioDriverInTestTask(unsigned int arg)
+{
+    HILOG_INFO(HILOG_MODULE_APP, "GpioDriverInTestTask");
+
+    HPM_BIOC->PAD[IOC_PAD_PZ02].FUNC_CTL = IOC_PZ02_FUNC_CTL_SOC_PZ_02;
+    HPM_BIOC->PAD[IOC_PAD_PZ02].PAD_CTL = IOC_PAD_PAD_CTL_PE_SET(1) | IOC_PAD_PAD_CTL_PS_SET(1) | IOC_PAD_PAD_CTL_SMT_SET(1);
+    HPM_BIOC->PAD[IOC_PAD_PZ03].FUNC_CTL = IOC_PZ03_FUNC_CTL_SOC_PZ_03;
+    HPM_BIOC->PAD[IOC_PAD_PZ03].PAD_CTL = IOC_PAD_PAD_CTL_PE_SET(1) | IOC_PAD_PAD_CTL_PS_SET(1) | IOC_PAD_PAD_CTL_SMT_SET(1);
+    
+    HPM_IOC->PAD[IOC_PAD_PZ02].FUNC_CTL = 0;
+    HPM_IOC->PAD[IOC_PAD_PZ02].PAD_CTL = IOC_PAD_PAD_CTL_PE_SET(1) | IOC_PAD_PAD_CTL_PS_SET(1) | IOC_PAD_PAD_CTL_SMT_SET(1);
+
+    HPM_IOC->PAD[IOC_PAD_PZ03].FUNC_CTL = 0;
+    HPM_IOC->PAD[IOC_PAD_PZ03].PAD_CTL = IOC_PAD_PAD_CTL_PE_SET(1) | IOC_PAD_PAD_CTL_PS_SET(1) | IOC_PAD_PAD_CTL_SMT_SET(1);
+
+    GpioSetDir(GPIOZ(2), GPIO_DIR_IN);
+    GpioSetDir(GPIOZ(3), GPIO_DIR_IN);
+
+    uint32_t pz02_flag = GPIO_VAL_HIGH;
+    uint32_t pz03_flag = GPIO_VAL_HIGH;
+
+    while (1) {
+        uint16_t val;
+        GpioRead(GPIOZ(2), &val);
+        if (val == GPIO_VAL_LOW && pz02_flag == GPIO_VAL_HIGH) {
+            pz02_flag = GPIO_VAL_LOW;
+            HILOG_INFO(HILOG_MODULE_APP, "GPIOZ(2) DOWN");
+        } else if (val == GPIO_VAL_HIGH && pz02_flag == GPIO_VAL_LOW) {
+            pz02_flag = GPIO_VAL_HIGH;
+            HILOG_INFO(HILOG_MODULE_APP, "GPIOZ(2) UP");
+        }
+
+        GpioRead(GPIOZ(3), &val);
+        if (val == GPIO_VAL_LOW && pz03_flag == GPIO_VAL_HIGH) {
+            pz03_flag = GPIO_VAL_LOW;
+            HILOG_INFO(HILOG_MODULE_APP, "GPIOZ(3) DOWN");
+        } else if (val == GPIO_VAL_HIGH && pz03_flag == GPIO_VAL_LOW) {
+            pz03_flag = GPIO_VAL_HIGH;
+            HILOG_INFO(HILOG_MODULE_APP, "GPIOZ(3) UP");
+        }
+
+        LOS_TaskDelay(50);
+    }
+    return NULL;
+}
+
+static void GpioDriverTest(void)
+{
+    TSK_INIT_PARAM_S taskInitParam = {0};
+    
+    taskInitParam.pcName = "gpio_in_test";
+    taskInitParam.pfnTaskEntry = GpioDriverInTestTask;
+    taskInitParam.stackAddr = 0;
+    taskInitParam.uwStackSize = 8192;
+    taskInitParam.usTaskPrio = 20;
+    taskInitParam.uwArg = 0x66;
+    UINT32 taskID;
+    LOS_TaskCreate(&taskID, &taskInitParam);
+}
+
+APP_FEATURE_INIT(GpioDriverTest);

application/gpio/app_gpio_irq.c

@@ -0,0 +1,66 @@
+/*
+ * Copyright (c) 2022 HPMicro.
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#include <ohos_init.h>
+#include <stdio.h>
+#include <los_task.h>
+#include <stdint.h>
+#include <log.h>
+#include <gpio_if.h>
+#include <hpm_soc.h>
+#include <hpm_clock_drv.h>
+
+#define LOG_TAG "HPM_GPIO_OUT"
+
+#define GPIOA(pin) (pin)
+#define GPIOB(pin) (pin + 32)
+#define GPIOC(pin) (pin + 32 * 2)
+#define GPIOD(pin) (pin + 32 * 3)
+#define GPIOE(pin) (pin + 32 * 4)
+#define GPIOF(pin) (pin + 32 * 5)
+#define GPIOY(pin) (pin + 32 * 14)
+#define GPIOZ(pin) (pin + 32 * 15)
+
+
+static int32_t GpioIrq(uint16_t gpio, void *data)
+{
+    HILOG_INFO(HILOG_MODULE_APP, "gpio: %u", gpio);
+}
+
+static void GpioDriverInTestTask(void)
+{
+    HILOG_INFO(HILOG_MODULE_APP, "GpioDriverIrqTest");
+
+    HPM_BIOC->PAD[IOC_PAD_PZ02].FUNC_CTL = IOC_PZ02_FUNC_CTL_SOC_PZ_02;
+    HPM_BIOC->PAD[IOC_PAD_PZ02].PAD_CTL = IOC_PAD_PAD_CTL_PE_SET(1) | IOC_PAD_PAD_CTL_PS_SET(1) | IOC_PAD_PAD_CTL_SMT_SET(1);
+    HPM_BIOC->PAD[IOC_PAD_PZ03].FUNC_CTL = IOC_PZ03_FUNC_CTL_SOC_PZ_03;
+    HPM_BIOC->PAD[IOC_PAD_PZ03].PAD_CTL = IOC_PAD_PAD_CTL_PE_SET(1) | IOC_PAD_PAD_CTL_PS_SET(1) | IOC_PAD_PAD_CTL_SMT_SET(1);
+    
+    HPM_IOC->PAD[IOC_PAD_PZ02].FUNC_CTL = 0;
+    HPM_IOC->PAD[IOC_PAD_PZ02].PAD_CTL = IOC_PAD_PAD_CTL_PE_SET(1) | IOC_PAD_PAD_CTL_PS_SET(1) | IOC_PAD_PAD_CTL_SMT_SET(1);
+
+    HPM_IOC->PAD[IOC_PAD_PZ03].FUNC_CTL = 0;
+    HPM_IOC->PAD[IOC_PAD_PZ03].PAD_CTL = IOC_PAD_PAD_CTL_PE_SET(1) | IOC_PAD_PAD_CTL_PS_SET(1) | IOC_PAD_PAD_CTL_SMT_SET(1);
+
+    GpioSetDir(GPIOZ(2), GPIO_DIR_IN);
+    GpioSetDir(GPIOZ(3), GPIO_DIR_IN);
+
+    GpioSetIrq(GPIOZ(2), GPIO_IRQ_TRIGGER_RISING, GpioIrq, NULL);
+    GpioSetIrq(GPIOZ(3), GPIO_IRQ_TRIGGER_FALLING, GpioIrq, NULL);
+
+    GpioEnableIrq(GPIOZ(2));
+    GpioEnableIrq(GPIOZ(3));
+}
+
+APP_FEATURE_INIT(GpioDriverInTestTask);

application/gpio/app_gpio_out.c

@@ -0,0 +1,83 @@
+/*
+ * Copyright (c) 2022 HPMicro.
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#include <ohos_init.h>
+#include <stdio.h>
+#include <los_task.h>
+#include <stdint.h>
+#include <log.h>
+#include <gpio_if.h>
+#include <hpm_soc.h>
+#include <hpm_clock_drv.h>
+
+#define LOG_TAG "HPM_GPIO_OUT"
+
+#define GPIOA(pin) (pin)
+#define GPIOB(pin) (pin + 32)
+#define GPIOC(pin) (pin + 32 * 2)
+#define GPIOD(pin) (pin + 32 * 3)
+#define GPIOE(pin) (pin + 32 * 4)
+#define GPIOF(pin) (pin + 32 * 5)
+#define GPIOY(pin) (pin + 32 * 14)
+#define GPIOZ(pin) (pin + 32 * 15)
+
+static void *GpioDriverOutTestTask(unsigned int arg)
+{
+    HILOG_INFO(HILOG_MODULE_APP, "GpioDriverOutTestTask");
+
+    HPM_IOC->PAD[IOC_PAD_PB11].FUNC_CTL = 0;
+    HPM_IOC->PAD[IOC_PAD_PB11].PAD_CTL = IOC_PAD_PAD_CTL_PE_SET(1) | IOC_PAD_PAD_CTL_PS_SET(1);
+
+    HPM_IOC->PAD[IOC_PAD_PB12].FUNC_CTL = 0;
+    HPM_IOC->PAD[IOC_PAD_PB12].PAD_CTL = IOC_PAD_PAD_CTL_PE_SET(1) | IOC_PAD_PAD_CTL_PS_SET(1);
+
+    HPM_IOC->PAD[IOC_PAD_PB13].FUNC_CTL = 0;
+    HPM_IOC->PAD[IOC_PAD_PB13].PAD_CTL = IOC_PAD_PAD_CTL_PE_SET(1) | IOC_PAD_PAD_CTL_PS_SET(1);
+
+    GpioSetDir(GPIOB(11), GPIO_DIR_OUT);
+    GpioSetDir(GPIOB(12), GPIO_DIR_OUT);
+    GpioSetDir(GPIOB(13), GPIO_DIR_OUT);
+
+    while (1) {
+        GpioWrite(GPIOB(11), GPIO_VAL_LOW);
+        LOS_TaskDelay(500);
+        GpioWrite(GPIOB(11), GPIO_VAL_HIGH);
+        LOS_TaskDelay(500);
+        GpioWrite(GPIOB(12), GPIO_VAL_LOW);
+        LOS_TaskDelay(500);
+        GpioWrite(GPIOB(12), GPIO_VAL_HIGH);
+        LOS_TaskDelay(500);
+        GpioWrite(GPIOB(13), GPIO_VAL_LOW);
+        LOS_TaskDelay(500);
+        GpioWrite(GPIOB(13), GPIO_VAL_HIGH);
+        LOS_TaskDelay(500);
+    }
+    return NULL;
+}
+
+static void GpioDriverTest(void)
+{
+    TSK_INIT_PARAM_S taskInitParam = {0};
+    
+    taskInitParam.pcName = "gpio_out_test";
+    taskInitParam.pfnTaskEntry = GpioDriverOutTestTask;
+    taskInitParam.stackAddr = 0;
+    taskInitParam.uwStackSize = 8192;
+    taskInitParam.usTaskPrio = 20;
+    taskInitParam.uwArg = 0x66;
+    UINT32 taskID;
+    LOS_TaskCreate(&taskID, &taskInitParam);
+}
+
+APP_FEATURE_INIT(GpioDriverTest);

application/watchdog/BUILD.gn

@@ -0,0 +1,30 @@
+# Copyright (c) 2022 HPMicro.
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+import("//kernel/liteos_m/liteos.gni")
+import("//drivers/hdf_core/adapter/khdf/liteos_m/hdf.gni")
+
+module_name = get_path_info(rebase_path("."), "name")
+module_switch = defined(LOSCFG_WDT_DRIVER_TEST)
+
+hdf_driver(module_name) {
+  include_dirs = [ 
+    "//base/hiviewdfx/hilog_lite/interfaces/native/kits/hilog_lite"
+  ]
+
+  cflags = [ "-Wall", "-Werror"]
+  
+  sources = [ 
+    "app_watchdog.c",
+  ]
+}

application/watchdog/app_watchdog.c

@@ -0,0 +1,86 @@
+/*
+ * Copyright (c) 2022 HPMicro
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#include <ohos_init.h>
+#include <stdio.h>
+#include <los_task.h>
+#include <stdint.h>
+#include <log.h>
+#include <watchdog_if.h>
+
+#define LOG_TAG "HPM_WDG"
+
+static void *WatchdogDriverApiTask(unsigned int arg)
+{
+    HILOG_INFO(HILOG_MODULE_APP, "%s", __func__);
+    DevHandle handle;
+    int32_t status;
+    uint32_t seconds;
+    int ret;
+    ret = WatchdogOpen(2,  &handle);
+    if (ret) {
+        HILOG_ERROR(HILOG_MODULE_APP, "WatchdogOpen: %d", ret);
+        return;
+    }
+
+    WatchdogGetStatus(handle, &status);
+    if (status != WATCHDOG_STOP) {
+        HILOG_INFO(HILOG_MODULE_APP, "WatchdogGetStatus expect <WATCHDOG_STOP>, %u", __LINE__);
+    }
+    
+    WatchdogSetTimeout(handle, 3);
+    WatchdogGetTimeout(handle, &seconds);
+    if (seconds != 3) {
+        HILOG_ERROR(HILOG_MODULE_APP, "WatchdogGetTimeout Failed!!!");
+    }
+
+    WatchdogStart(handle);
+    WatchdogGetStatus(handle, &status);
+    if (status != WATCHDOG_START) {
+        HILOG_ERROR(HILOG_MODULE_APP, "WatchdogGetStatus expect <WATCHDOG_START>");
+    }
+
+    uint32_t cnt = 3;
+    while (cnt--) {
+        HILOG_INFO(HILOG_MODULE_APP, "WatchdogFeed");
+        WatchdogFeed(handle);
+        LOS_TaskDelay(2000);
+    }
+
+    WatchdogStop(handle);
+    WatchdogGetStatus(handle, &status);
+    if (status != WATCHDOG_STOP) {
+        HILOG_ERROR(HILOG_MODULE_APP, "WatchdogGetStatus expect <WATCHDOG_STOP>, %u", __LINE__);
+    }
+
+    WatchdogClose(handle);
+
+    return NULL;
+}
+
+static void WatchdogDriverTest(void)
+{
+    TSK_INIT_PARAM_S taskInitParam = {0};
+    
+    taskInitParam.pcName = "wdg_test";
+    taskInitParam.pfnTaskEntry = WatchdogDriverApiTask;
+    taskInitParam.stackAddr = 0;
+    taskInitParam.uwStackSize = 4096;
+    taskInitParam.usTaskPrio = 20;
+    taskInitParam.uwArg = 0x66;
+    UINT32 taskID;
+    LOS_TaskCreate(&taskID, &taskInitParam);
+}
+
+APP_FEATURE_INIT(WatchdogDriverTest);

drivers/BUILD.gn

@@ -0,0 +1,18 @@
+# Copyright (c) 2022 HPMicro.
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+import("//kernel/liteos_m/liteos.gni")
+module_name = get_path_info(rebase_path("."), "name")
+module_group(module_name) {
+  modules = []
+}

hcs/hpm6750evk.hcs

@@ -0,0 +1,3 @@
+
+
+

hpm6750evk/BUILD.gn

@@ -0,0 +1,22 @@
+# Copyright (c) 2022 HPMicro.
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+if (ohos_kernel_type == "liteos_m") {
+  import("//kernel/liteos_m/liteos.gni")
+  module_name = get_path_info(rebase_path("."), "name")
+  module_group(module_name) {
+    modules = [ 
+      "liteos_m",
+     ]
+  }
+}

hpm6750evk/Kconfig.liteos_m.board

@@ -0,0 +1,18 @@
+# Copyright (c) 2022 HPMicro.
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+config BOARD_HPM6750EVK
+    bool "hpm6750evk"
+    select BOARD_COMPANY_HPMCIRO
+    depends on SOC_COMPANY_HPMICRO
+

hpm6750evk/Kconfig.liteos_m.defconfig.board

@@ -0,0 +1,20 @@
+# Copyright (c) 2022 HPMicro.
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+if BOARD_HPM6750EVK
+config BOARD
+    string
+    default "hpm6750evk"
+
+endif #BOARD_HPM6750EVK
+

hpm6750evk/liteos_m/BUILD.gn

@@ -0,0 +1,77 @@
+# Copyright (c) 2022 HPMicro.
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+import("//kernel/liteos_m/liteos.gni")
+
+module_name = get_path_info(rebase_path("."), "name")
+module_switch = defined(LOSCFG_BOARD_HPM6750EVK)
+kernel_module(module_name) {
+  #deps = [ "$product_path/hdf_config:hdf_hcs" ]
+  cflags = [ "-Wall", "-Werror"]
+  sources = [
+    "board.c",
+    "driver/uart.c"
+  ]
+  deps = [
+    "littlefs"
+  ]
+}
+
+config("public") {
+  include_dirs = [
+    ".",
+    "driver",
+    "littlefs"
+  ]
+
+  ldflags = [
+    "-Wl,-mcmodel=medany",
+    "-Wl,-melf32lriscv",
+    "-nostartfiles",
+    "-Wl,-T" + rebase_path("ld/liteos_flash_xip.ld"),
+    "-nostdlib",
+  ]
+
+  ldflags += [ "-L./libs" ]
+  ldflags += [ "-Wl,--whole-archive" ]
+  foreach(force_link_lib, force_link_libs) {
+    ldflags += [ "-l${force_link_lib}" ]
+  }
+  ldflags += [ "-Wl,--no-whole-archive" ]
+
+  libs = [
+    "nosys",
+    "gcc",
+    "stdc++",
+  ]
+
+  if (defined(LOSCFG_LIBC_NEWLIB)) {
+    ldflags -= [ "-nostdlib" ]
+
+    libs -= [ "nosys" ]
+    libs += [
+      "c",
+      "m",
+    ]
+
+    cflags_c = [
+      "-U__INT32_TYPE__",
+      "-D__INT32_TYPE__=int",
+      "-DLWIP_NO_CTYPE_H=1",
+      "-DFLASH_XIP=1",
+      "-DUSE_NONVECTOR_MODE",
+      "-DDISABLE_IRQ_PREEMPTIVE",
+    ]
+  }
+}
+

hpm6750evk/liteos_m/board.c

@@ -0,0 +1,235 @@
+/*
+ * Copyright (c) 2022 HPMicro.
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "board.h"
+#include <hpm_pllctl_drv.h>
+/**
+ * @brief FLASH configuration option definitions:
+ * option[0]:
+ *    [31:16] 0xfcf9 - FLASH configuration option tag
+ *    [15:4]  0 - Reserved
+ *    [3:0]   option words (exclude option[0])
+ * option[1]:
+ *    [31:28] Flash probe type
+ *      0 - SFDP SDR / 1 - SFDP DDR
+ *      2 - 1-4-4 Read (0xEB, 24-bit address) / 3 - 1-2-2 Read(0xBB, 24-bit address)
+ *      4 - HyperFLASH 1.8V / 5 - HyperFLASH 3V
+ *      6 - OctaBus DDR (SPI -> OPI DDR)
+ *      8 - Xccela DDR (SPI -> OPI DDR)
+ *      10 - EcoXiP DDR (SPI -> OPI DDR)
+ *    [27:24] Command Pads after Power-on Reset
+ *      0 - SPI / 1 - DPI / 2 - QPI / 3 - OPI
+ *    [23:20] Command Pads after Configuring FLASH
+ *      0 - SPI / 1 - DPI / 2 - QPI / 3 - OPI
+ *    [19:16] Quad Enable Sequence (for the device support SFDP 1.0 only)
+ *      0 - Not needed
+ *      1 - QE bit is at bit 6 in Status Register 1
+ *      2 - QE bit is at bit1 in Status Register 2
+ *      3 - QE bit is at bit7 in Status Register 2
+ *      4 - QE bit is at bit1 in Status Register 2 and should be programmed by 0x31
+ *    [15:8] Dummy cycles
+ *      0 - Auto-probed / detected / default value
+ *      Others - User specified value, for DDR read, the dummy cycles should be 2 * cycles on FLASH datasheet
+ *    [7:4] Misc.
+ *      0 - Not used
+ *      1 - SPI mode
+ *      2 - Internal loopback
+ *      3 - External DQS
+ *    [3:0] Frequency option
+ *      1 - 30MHz / 2 - 50MHz / 3 - 66MHz / 4 - 80MHz / 5 - 100MHz / 6 - 120MHz / 7 - 133MHz / 8 - 166MHz
+ *
+ * option[2] (Effective only if the bit[3:0] in option[0] > 1)
+ *    [31:20]  Reserved
+ *    [19:16] IO voltage
+ *      0 - 3V / 1 - 1.8V
+ *    [15:12] Pin group
+ *      0 - 1st group / 1 - 2nd group
+ *    [11:8] Connection selection
+ *      0 - CA_CS0 / 1 - CB_CS0 / 2 - CA_CS0 + CB_CS0 (Two FLASH connected to CA and CB respectively)
+ *    [7:0] Drive Strength
+ *      0 - Default value
+ * option[3] (Effective only if the bit[3:0] in option[0] > 2, required only for the QSPI NOR FLASH that not supports
+ *              JESD216)
+ *    [31:16] reserved
+ *    [15:12] Sector Erase Command Option, not required here
+ *    [11:8]  Sector Size Option, not required here
+ *    [7:0] Flash Size Option
+ *      0 - 4MB / 1 - 8MB / 2 - 16MB
+ */
+#if defined(FLASH_XIP) && FLASH_XIP
+__attribute__ ((section(".nor_cfg_option"))) const uint32_t option[4] = {0xfcf90001, 0x00000007, 0x0, 0x0};
+#endif
+
+
+void board_init_clock(void)
+{
+    uint32_t cpu0_freq = clock_get_frequency(clock_cpu0);
+    if (cpu0_freq == PLLCTL_SOC_PLL_REFCLK_FREQ) {
+        /* Configure the External OSC ramp-up time: ~9ms */
+        pllctl_xtal_set_rampup_time(HPM_PLLCTL, 32UL * 1000UL * 9U);
+
+        /* Select clock setting preset1 */
+        sysctl_clock_set_preset(HPM_SYSCTL, sysctl_preset_1);
+    }
+
+    /* Add most Clocks to group 0 */
+    clock_add_to_group(clock_cpu0, 0);
+    clock_add_to_group(clock_mchtmr0, 0);
+    clock_add_to_group(clock_axi0, 0);
+    clock_add_to_group(clock_axi1, 0);
+    clock_add_to_group(clock_axi2, 0);
+    clock_add_to_group(clock_ahb, 0);
+    clock_add_to_group(clock_dram, 0);
+    clock_add_to_group(clock_xpi0, 0);
+    clock_add_to_group(clock_xpi1, 0);
+    clock_add_to_group(clock_gptmr0, 0);
+    clock_add_to_group(clock_gptmr1, 0);
+    clock_add_to_group(clock_gptmr2, 0);
+    clock_add_to_group(clock_gptmr3, 0);
+    clock_add_to_group(clock_gptmr4, 0);
+    clock_add_to_group(clock_gptmr5, 0);
+    clock_add_to_group(clock_gptmr6, 0);
+    clock_add_to_group(clock_gptmr7, 0);
+    clock_add_to_group(clock_uart0, 0);
+    clock_add_to_group(clock_uart1, 0);
+    clock_add_to_group(clock_uart2, 0);
+    clock_add_to_group(clock_uart3, 0);
+    clock_add_to_group(clock_uart13, 0);
+    clock_add_to_group(clock_i2c0, 0);
+    clock_add_to_group(clock_i2c1, 0);
+    clock_add_to_group(clock_i2c2, 0);
+    clock_add_to_group(clock_i2c3, 0);
+    clock_add_to_group(clock_spi0, 0);
+    clock_add_to_group(clock_spi1, 0);
+    clock_add_to_group(clock_spi2, 0);
+    clock_add_to_group(clock_spi3, 0);
+    clock_add_to_group(clock_can0, 0);
+    clock_add_to_group(clock_can1, 0);
+    clock_add_to_group(clock_can2, 0);
+    clock_add_to_group(clock_can3, 0);
+    clock_add_to_group(clock_display, 0);
+    clock_add_to_group(clock_sdxc0, 0);
+    clock_add_to_group(clock_sdxc1, 0);
+    clock_add_to_group(clock_camera0, 0);
+    clock_add_to_group(clock_camera1, 0);
+    clock_add_to_group(clock_ptpc, 0);
+    clock_add_to_group(clock_ref0, 0);
+    clock_add_to_group(clock_ref1, 0);
+    clock_add_to_group(clock_watchdog0, 0);
+    clock_add_to_group(clock_watchdog1, 0);
+    clock_add_to_group(clock_watchdog2, 0);
+    clock_add_to_group(clock_watchdog3, 0);
+    clock_add_to_group(clock_pwdg, 0);
+    clock_add_to_group(clock_eth0, 0);
+    clock_add_to_group(clock_eth1, 0);
+    clock_add_to_group(clock_sdp, 0);
+    clock_add_to_group(clock_xdma, 0);
+    clock_add_to_group(clock_ram0, 0);
+    clock_add_to_group(clock_ram1, 0);
+    clock_add_to_group(clock_usb0, 0);
+    clock_add_to_group(clock_usb1, 0);
+    clock_add_to_group(clock_jpeg, 0);
+    clock_add_to_group(clock_pdma, 0);
+    clock_add_to_group(clock_kman, 0);
+    clock_add_to_group(clock_gpio, 0);
+    clock_add_to_group(clock_mbx0, 0);
+    clock_add_to_group(clock_hdma, 0);
+    clock_add_to_group(clock_rng, 0);
+    clock_add_to_group(clock_mot0, 0);
+    clock_add_to_group(clock_mot1, 0);
+    clock_add_to_group(clock_mot2, 0);
+    clock_add_to_group(clock_mot3, 0);
+    clock_add_to_group(clock_acmp, 0);
+    clock_add_to_group(clock_dao, 0);
+    clock_add_to_group(clock_msyn, 0);
+    clock_add_to_group(clock_lmm0, 0);
+    clock_add_to_group(clock_lmm1, 0);
+
+    clock_add_to_group(clock_adc0, 0);
+    clock_add_to_group(clock_adc1, 0);
+    clock_add_to_group(clock_adc2, 0);
+    clock_add_to_group(clock_adc3, 0);
+
+    clock_add_to_group(clock_i2s0, 0);
+    clock_add_to_group(clock_i2s1, 0);
+    clock_add_to_group(clock_i2s2, 0);
+    clock_add_to_group(clock_i2s3, 0);
+
+    /* Add the CPU1 clock to Group1 */
+    clock_add_to_group(clock_mchtmr1, 1);
+    clock_add_to_group(clock_mbx1, 1);
+
+    /* Connect Group0 to CPU0 */
+    clock_connect_group_to_cpu(0, 0);
+
+    if (status_success != pllctl_init_int_pll_with_freq(HPM_PLLCTL, 0, BOARD_CPU_FREQ)) {
+        printf("Failed to set pll0_clk0 to %ldHz\n", BOARD_CPU_FREQ);
+        while(1);
+    }
+
+    clock_set_source_divider(clock_cpu0, clk_src_pll0_clk0, 1);
+    clock_set_source_divider(clock_cpu1, clk_src_pll0_clk0, 1);
+    /* Connect Group1 to CPU1 */
+    clock_connect_group_to_cpu(1, 1);
+
+    clock_update_core_clock();
+}
+
+
+void board_init(void)
+{
+    board_init_clock();
+    sysctl_set_cpu_lp_mode(HPM_SYSCTL, HPM_CORE0, cpu_lp_mode_ungate_cpu_clock);
+}
+
+void board_print_clock_freq(void)
+{
+    printf("==============================\r\n");
+    printf(" %s clock summary\r\n", "HPM6750EVK");
+    printf("==============================\r\n");
+    printf("cpu0:\t\t %dHz\r\n", clock_get_frequency(clock_cpu0));
+    printf("cpu1:\t\t %dHz\r\n", clock_get_frequency(clock_cpu1));
+    printf("axi0:\t\t %dHz\r\n", clock_get_frequency(clock_axi0));
+    printf("axi1:\t\t %dHz\r\n", clock_get_frequency(clock_axi1));
+    printf("axi2:\t\t %dHz\r\n", clock_get_frequency(clock_axi2));
+    printf("ahb:\t\t %dHz\r\n", clock_get_frequency(clock_ahb));
+    printf("mchtmr0:\t %dHz\r\n", clock_get_frequency(clock_mchtmr0));
+    printf("mchtmr1:\t %dHz\r\n", clock_get_frequency(clock_mchtmr1));
+    printf("xpi0:\t\t %dHz\r\n", clock_get_frequency(clock_xpi0));
+    printf("xpi1:\t\t %dHz\r\n", clock_get_frequency(clock_xpi1));
+    printf("dram:\t\t %dHz\r\n", clock_get_frequency(clock_dram));
+    printf("display:\t %dHz\r\n", clock_get_frequency(clock_display));
+    printf("cam0:\t\t %dHz\r\n", clock_get_frequency(clock_camera0));
+    printf("cam1:\t\t %dHz\r\n", clock_get_frequency(clock_camera1));
+    printf("jpeg:\t\t %dHz\r\n", clock_get_frequency(clock_jpeg));
+    printf("pdma:\t\t %dHz\r\n", clock_get_frequency(clock_pdma));
+    printf("==============================\r\n");
+}
+
+void board_print_banner(void)
+{
+    const uint8_t banner[] = {"\n\
+----------------------------------------------------------------------\r\n\
+$$\\   $$\\ $$$$$$$\\  $$\\      $$\\ $$\\\r\n\
+$$ |  $$ |$$  __$$\\ $$$\\    $$$ |\\__|\r\n\
+$$ |  $$ |$$ |  $$ |$$$$\\  $$$$ |$$\\  $$$$$$$\\  $$$$$$\\   $$$$$$\\\r\n\
+$$$$$$$$ |$$$$$$$  |$$\\$$\\$$ $$ |$$ |$$  _____|$$  __$$\\ $$  __$$\\\r\n\
+$$  __$$ |$$  ____/ $$ \\$$$  $$ |$$ |$$ /      $$ |  \\__|$$ /  $$ |\r\n\
+$$ |  $$ |$$ |      $$ |\\$  /$$ |$$ |$$ |      $$ |      $$ |  $$ |\r\n\
+$$ |  $$ |$$ |      $$ | \\_/ $$ |$$ |\\$$$$$$$\\ $$ |      \\$$$$$$  |\r\n\
+\\__|  \\__|\\__|      \\__|     \\__|\\__| \\_______|\\__|       \\______/\r\n\
+----------------------------------------------------------------------\r\n"};
+    printf("%s", banner);
+}

hpm6750evk/liteos_m/board.h

@@ -0,0 +1,32 @@
+/*
+ * Copyright (c) 2022 HPMicro.
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef _HPM_BOARD_H
+#define _HPM_BOARD_H
+#include <stdio.h>
+#include "hpm_common.h"
+#include "hpm_clock_drv.h"
+#include "hpm_soc.h"
+#include "hpm_soc_feature.h"
+
+#define BOARD_CPU_FREQ (816000000UL)
+
+void board_init(void);
+void board_print_clock_freq(void);
+void board_print_banner(void);
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus */
+#endif /* _HPM_BOARD_H */

hpm6750evk/liteos_m/config.gni

@@ -0,0 +1,115 @@
+#Copyright (c) 2022 HPMicro.
+#Licensed under the Apache License, Version 2.0 (the "License");
+#you may not use this file except in compliance with the License.
+#You may obtain a copy of the License at
+#
+#    http://www.apache.org/licenses/LICENSE-2.0
+#
+#Unless required by applicable law or agreed to in writing, software
+#distributed under the License is distributed on an "AS IS" BASIS,
+#WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#See the License for the specific language governing permissions and
+#limitations under the License.
+
+# Kernel type, e.g. "linux", "liteos_a", "liteos_m".
+kernel_type = "liteos_m"
+
+# Kernel version.
+kernel_version = "3.0.0"
+
+# Board CPU type, for example: "cortex-a7", "riscv32".
+board_cpu = ""
+
+# Board arch, for example: "armv7-a", "rv32imc".
+board_arch = "rv32imac"
+
+# Toolchain used for system compiling.
+# For example: gcc-arm-none-eabi, arm-linux-ohoseabi-gcc, ohos-clang,  riscv32-unknown-elf.
+# Note: The default toolchain is "ohos-clang". It's not mandatory if you use the default toolchain.
+board_toolchain = "riscv32-unknown-elf"
+#board_toolchain = "riscv-nuclei-elf"
+
+# The path which toolchain installed, it's not mandatory if toolchain path has been added to your ~/.bashrc.
+board_toolchain_path = ""
+
+# Compiler prefix.
+board_toolchain_prefix = "riscv32-unknown-elf-"
+#board_toolchain_prefix = "riscv-nuclei-elf-"
+
+# Compiler type, "gcc" or "clang".
+board_toolchain_type = "gcc"
+
+# config.json parse
+if (product_path != "") {
+  product_conf = read_file("${product_path}/config.json", "json")
+  force_link_libs = product_conf.force_link_libs
+}
+
+#Debug compiler optimization level options
+board_opt_flags = []
+
+# Board related common compile flags.
+board_cflags = [
+  "-mabi=ilp32",
+  "-falign-functions=2",
+  "-msave-restore",
+  "-fno-optimize-strlen",
+  "-freorder-blocks-algorithm=simple",
+  "-fno-schedule-insns",
+  "-fno-inline-small-functions",
+  "-fno-inline-functions-called-once",
+  "-mtune=size",
+  "-mno-small-data-limit=0",
+  "-fno-aggressive-loop-optimizations",
+  "-Wpointer-arith",
+  "-ffunction-sections",
+  "-fdata-sections",
+  "-fno-short-enums",
+  "-fno-builtin",
+  "-O2",
+  "-static",
+  "-fno-common",
+  "-fno-stack-protector",
+  "-fno-omit-frame-pointer",
+  "-Wno-format-truncation",
+  "-D__RISC_V__",
+  "-D__LITEOS_M__",
+  "-DLWIP_SUPPORT_CUSTOM_PBUF=1",
+  "-D_BSD_SOURCE",
+  "-Wformat=0",
+  "-DLOSCFG_BASE_CORE_HILOG",
+]
+
+board_cflags += board_opt_flags
+
+board_asmflags = [
+  "-march=rv32imac",
+  "-mabi=ilp32",
+  "-static",
+  "-O2",
+]
+board_asmflags += board_opt_flags
+board_cxx_flags = board_cflags
+board_ld_flags = [ "" ]
+board_ld_flags += [
+  "-Wl,--wrap=_free_r",
+  "-Wl,--wrap,_malloc_usable_size_r",
+  "-Wl,--wrap,_malloc_r",
+  "-Wl,--wrap,_memalign_r",
+  "-Wl,--wrap,_realloc_r",
+  "-Wl,--wrap,_calloc_r",
+  "-Wl,--wrap=printf",
+  "-Wl,--whole-archive",
+]
+
+# Board related headfiles search path.
+board_include_dirs = [ "//utils/native/lite/include" ]
+
+# Board adapter dir for OHOS components.
+board_adapter_dir = ""
+
+# Sysroot path.
+board_configed_sysroot = ""
+
+# Board storage type, it used for file system generation.
+storage_type = ""

hpm6750evk/liteos_m/driver/uart.c

@@ -0,0 +1,100 @@
+/*
+ * Copyright (c) 2022 HPMicro.
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "uart.h"
+#include "los_arch_interrupt.h"
+#include "los_interrupt.h"
+#include "riscv_hal.h"
+
+#ifdef __cplusplus
+#if __cplusplus
+extern "C" {
+#endif
+#endif
+
+#define RX_BUF_SIZE 128
+static uint8_t rx_buf[RX_BUF_SIZE];
+static uint16_t rx_index;
+static uint16_t tx_index;
+
+INT32 UartPutc(INT32 c, VOID *file)
+{
+    (VOID) file;
+    if (c == '\n') {
+        uart_send_byte(HPM_UART0, (UINT8)'\r');
+    }
+    uart_send_byte(HPM_UART0, (UINT8)c);
+    return c;
+}
+
+INT32 UartGetc(VOID)
+{
+    uint8_t c = 0;
+    if (tx_index != rx_index) {
+        c = rx_buf[tx_index++];
+        tx_index %= RX_BUF_SIZE;     
+    }
+    return c;
+}
+
+VOID UartInit(VOID)
+{
+    HPM_IOC->PAD[IOC_PAD_PY07].FUNC_CTL = IOC_PY07_FUNC_CTL_UART0_RXD;
+    HPM_IOC->PAD[IOC_PAD_PY06].FUNC_CTL = IOC_PY06_FUNC_CTL_UART0_TXD;
+    /* PY port IO needs to configure PIOC as well */
+    HPM_PIOC->PAD[IOC_PAD_PY07].FUNC_CTL = IOC_PY06_FUNC_CTL_SOC_PY_06;
+    HPM_PIOC->PAD[IOC_PAD_PY06].FUNC_CTL = IOC_PY07_FUNC_CTL_SOC_PY_07;
+
+    uart_config_t config = {0};
+    clock_set_source_divider(clock_uart0, clk_src_osc24m, 1U);
+    uart_default_config(HPM_UART0, &config);
+    config.src_freq_in_hz = clock_get_frequency(clock_uart0);
+    config.baudrate = 115200;
+    uart_init(HPM_UART0, &config);  
+}
+
+VOID UartReceiveHandler(VOID)
+{
+    if (uart_get_irq_id(HPM_UART0) & uart_intr_id_rx_data_avail) {
+        uint8_t c;
+        if (status_success == uart_receive_byte(HPM_UART0, &c)) {
+            rx_buf[rx_index++] = c;
+            rx_index %= RX_BUF_SIZE;
+            if (rx_index == tx_index) {
+                tx_index++;
+                tx_index %= RX_BUF_SIZE;
+            }
+            (void)LOS_EventWrite(&g_shellInputEvent, 0x1);
+        }
+    }
+    return;
+}
+
+VOID Uart0RxIrqRegister(VOID)
+{
+    uart_enable_irq(HPM_UART0, uart_intr_rx_data_avail_or_timeout);
+
+    uint32_t ret = LOS_HwiCreate(HPM2LITEOS_IRQ(IRQn_UART0), OS_HWI_PRIO_HIGHEST, 0, (HWI_PROC_FUNC)UartReceiveHandler, 0);
+    if (ret != LOS_OK) {
+        return;
+    }
+    HalIrqEnable(HPM2LITEOS_IRQ(IRQn_UART0));
+}
+
+#ifdef __cplusplus
+#if __cplusplus
+}
+#endif /* __cplusplus */
+#endif /* __cplusplus */

hpm6750evk/liteos_m/driver/uart.h

@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2022 HPMicro.
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef _UART_H
+#define _UART_H
+
+#include "los_compiler.h"
+#include "los_event.h"
+#include "los_reg.h"
+#include "soc.h"
+
+#include <stdio.h>
+#include "hpm_common.h"
+#include "hpm_clock_drv.h"
+#include "hpm_soc.h"
+#include "hpm_soc_feature.h"
+#include "hpm_uart_drv.h"
+
+#ifdef __cplusplus
+#if __cplusplus
+extern "C" {
+#endif
+#endif
+
+extern INT32 UartPutc(INT32 c, VOID *file);
+
+extern VOID UartInit(VOID);
+extern INT32 UartGetc(VOID);
+extern VOID Uart0RxIrqRegister(VOID);
+
+extern EVENT_CB_S g_shellInputEvent;
+
+#ifdef __cplusplus
+#if __cplusplus
+}
+#endif /* __cplusplus */
+#endif /* __cplusplus */
+#endif

hpm6750evk/liteos_m/ld/liteos_flash_xip.ld

@@ -0,0 +1,297 @@
+/*
+ * Copyright 2021 hpmicro
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+ENTRY(_start)
+
+STACK_SIZE = DEFINED(_stack_size) ? _stack_size : 0x4000;
+HEAP_SIZE = DEFINED(_heap_size) ? _heap_size : 0x40000;
+
+MEMORY
+{
+    XPI0 (rx) : ORIGIN = 0x80000000, LENGTH = 16M
+    ILM (wx) : ORIGIN = 0, LENGTH = 256K
+    DLM (wx) : ORIGIN = 0x80000, LENGTH = 256K
+    AXI_SRAM (wx) : ORIGIN = 0x1080000, LENGTH = 768K
+    AXI_SRAM_NONCACHEABLE (wx) : ORIGIN = 0x01140000, LENGTH = 256K
+}
+
+__nor_cfg_option_load_addr__ = ORIGIN(XPI0) + 0x400;
+__boot_header_load_addr__ = ORIGIN(XPI0) + 0x1000;
+__app_load_addr__ = ORIGIN(XPI0) + 0x3000;
+__boot_header_length__ = __boot_header_end__ - __boot_header_start__;
+__app_offset__ = __app_load_addr__ - __boot_header_load_addr__;
+
+SECTIONS
+{
+    .nor_cfg_option __nor_cfg_option_load_addr__ : {
+        KEEP(*(.nor_cfg_option))
+    } > XPI0
+
+    .boot_header __boot_header_load_addr__ : {
+        __boot_header_start__ = .;
+        KEEP(*(.boot_header))
+        KEEP(*(.fw_info_table))
+        KEEP(*(.dc_info))
+        __boot_header_end__ = .;
+    } > XPI0
+
+    .start __app_load_addr__ : {
+        . = ALIGN(8);
+        KEEP(*(.start))
+    } > XPI0
+
+    .text (__vector_load_addr__ + __vector_ram_end__ - __vector_ram_start__): {
+        . = ALIGN(8);
+        *(.text)
+        *(.text*)
+        *(.rodata)
+        *(.rodata*)
+        *(.srodata)
+        *(.srodata*)
+        *(.hash)
+        *(.dyn*)
+        *(.gnu*)
+        *(.pl*)
+
+        KEEP(*(.eh_frame))
+        *(.eh_frame*)
+
+        KEEP (*(.init))
+        KEEP (*(.fini))
+        . = ALIGN(8);
+
+        /* For OHOS Start */
+        _hdf_drivers_start = .;
+        KEEP(*(.hdf.driver))
+        _hdf_drivers_end = .; /* define a section for hdf driver */
+
+         __zinitcall_bsp_start = .;
+        KEEP (*(.zinitcall.bsp0.init))
+        KEEP (*(.zinitcall.bsp1.init))
+        KEEP (*(.zinitcall.bsp2.init))
+        KEEP (*(.zinitcall.bsp3.init))
+        KEEP (*(.zinitcall.bsp4.init))
+        __zinitcall_bsp_end = .;
+        . = ALIGN(4);
+        __zinitcall_device_start = .;
+        KEEP (*(.zinitcall.device0.init))
+        KEEP (*(.zinitcall.device1.init))
+        KEEP (*(.zinitcall.device2.init))
+        KEEP (*(.zinitcall.device3.init))
+        KEEP (*(.zinitcall.device4.init))
+        __zinitcall_device_end = .;
+        . = ALIGN(4);
+        __zinitcall_core_start = .;
+        KEEP (*(.zinitcall.core0.init))
+        KEEP (*(.zinitcall.core1.init))
+        KEEP (*(.zinitcall.core2.init))
+        KEEP (*(.zinitcall.core3.init))
+        KEEP (*(.zinitcall.core4.init))
+        __zinitcall_core_end = .;
+        . = ALIGN(4);
+        __zinitcall_sys_service_start = .;
+        KEEP (*(.zinitcall.sys.service0.init))
+        KEEP (*(.zinitcall.sys.service1.init))
+        KEEP (*(.zinitcall.sys.service2.init))
+        KEEP (*(.zinitcall.sys.service3.init))
+        KEEP (*(.zinitcall.sys.service4.init))
+        __zinitcall_sys_service_end = .;
+        . = ALIGN(4);
+        __zinitcall_sys_feature_start = .;
+        KEEP (*(.zinitcall.sys.feature0.init))
+        KEEP (*(.zinitcall.sys.feature1.init))
+        KEEP (*(.zinitcall.sys.feature2.init))
+        KEEP (*(.zinitcall.sys.feature3.init))
+        KEEP (*(.zinitcall.sys.feature4.init))
+        __zinitcall_sys_feature_end = .;
+        . = ALIGN(4);
+        __zinitcall_run_start = .;
+        KEEP (*(.zinitcall.run0.init))
+        KEEP (*(.zinitcall.run1.init))
+        KEEP (*(.zinitcall.run2.init))
+        KEEP (*(.zinitcall.run3.init))
+        KEEP (*(.zinitcall.run4.init))
+        __zinitcall_run_end = .;
+        . = ALIGN(4);
+        __zinitcall_app_service_start = .;
+        KEEP (*(.zinitcall.app.service0.init))
+        KEEP (*(.zinitcall.app.service1.init))
+        KEEP (*(.zinitcall.app.service2.init))
+        KEEP (*(.zinitcall.app.service3.init))
+        KEEP (*(.zinitcall.app.service4.init))
+        __zinitcall_app_service_end = .;
+        . = ALIGN(4);
+        __zinitcall_app_feature_start = .;
+        KEEP (*(.zinitcall.app.feature0.init))
+        KEEP (*(.zinitcall.app.feature1.init))
+        KEEP (*(.zinitcall.app.feature2.init))
+        KEEP (*(.zinitcall.app.feature3.init))
+        KEEP (*(.zinitcall.app.feature4.init))
+        __zinitcall_app_feature_end = .;
+        . = ALIGN(4);
+        __zinitcall_test_start = .;
+        KEEP (*(.zinitcall.test0.init))
+        KEEP (*(.zinitcall.test1.init))
+        KEEP (*(.zinitcall.test2.init))
+        KEEP (*(.zinitcall.test3.init))
+        KEEP (*(.zinitcall.test4.init))
+        __zinitcall_test_end = .;
+        . = ALIGN(4);
+        __zinitcall_exit_start = .;
+        KEEP (*(.zinitcall.exit0.init))
+        KEEP (*(.zinitcall.exit1.init))
+        KEEP (*(.zinitcall.exit2.init))
+        KEEP (*(.zinitcall.exit3.init))
+        KEEP (*(.zinitcall.exit4.init))
+        __zinitcall_exit_end = .;
+        . = ALIGN(4);
+        /* For OHOS End */
+
+    } > XPI0
+
+    .rel : {
+        KEEP(*(.rel*))
+    } > XPI0
+
+    PROVIDE (__etext = .);
+    PROVIDE (_etext = .);
+    PROVIDE (etext = .);
+
+    __vector_load_addr__ = ADDR(.start) + SIZEOF(.start);
+    .vectors ORIGIN(ILM) : AT(__vector_load_addr__) {
+        . = ALIGN(8);
+        __vector_ram_start__ = .;
+        KEEP(*(.interrupt.HalTrapVector.text));
+        KEEP(*(.interrupt.text))
+        KEEP(*(.vector_table))
+        KEEP(*(.isr_vector))
+        . = ALIGN(8);
+        __vector_ram_end__ = .;
+    } > ILM
+
+    .data : AT(etext) {
+        . = ALIGN(8);
+        __data_start__ = .;
+        __global_pointer$ = . + 0x800;
+        *(.data)
+        *(.data*)
+        *(.sdata)
+        *(.sdata*)
+        *(.tdata)
+        *(.tdata*)
+
+        KEEP(*(.jcr))
+        KEEP(*(.dynamic))
+        KEEP(*(.got*))
+        KEEP(*(.got))
+        KEEP(*(.gcc_except_table))
+        KEEP(*(.gcc_except_table.*))
+
+        . = ALIGN(8);
+        PROVIDE(__preinit_array_start = .);
+        KEEP(*(.preinit_array))
+        PROVIDE(__preinit_array_end = .);
+
+        . = ALIGN(8);
+        PROVIDE(__init_array_start = .);
+        KEEP(*(SORT_BY_INIT_PRIORITY(.init_array.*)))
+        KEEP(*(.init_array))
+        PROVIDE(__init_array_end = .);
+
+        . = ALIGN(8);
+        PROVIDE(__finit_array_start = .);
+        KEEP(*(SORT_BY_INIT_PRIORITY(.finit_array.*)))
+        KEEP(*(.finit_array))
+        PROVIDE(__finit_array_end = .);
+
+        . = ALIGN(8);
+        KEEP(*crtbegin*.o(.ctors))
+        KEEP(*(EXCLUDE_FILE (*crtend*.o) .ctors))
+        KEEP(*(SORT(.ctors.*)))
+        KEEP(*(.ctors))
+
+        . = ALIGN(8);
+        KEEP(*crtbegin*.o(.dtors))
+        KEEP(*(EXCLUDE_FILE (*crtend*.o) .dtors))
+        KEEP(*(SORT(.dtors.*)))
+        KEEP(*(.dtors))
+        . = ALIGN(8);
+        __data_end__ = .;
+        PROVIDE (__edata = .);
+        PROVIDE (_edata = .);
+        PROVIDE (edata = .);
+    } > AXI_SRAM
+
+    .fast : AT(etext + __data_end__ - __data_start__) {
+        . = ALIGN(8);
+        __ramfunc_start__ = .;
+        *(.fast)
+        . = ALIGN(8);
+        __ramfunc_end__ = .;
+    } > AXI_SRAM
+
+    __fw_size__ = __ramfunc_end__ - __ramfunc_start__ + __data_end__ - __data_start__ + etext - __app_load_addr__;
+    .bss : {
+        . = ALIGN(8);
+        __bss_start__ = .;
+        *(.bss)
+        *(.bss*)
+        *(.tbss*)
+        *(.sbss*)
+        *(.scommon)
+        *(.scommon*)
+        *(.tcommon*)
+        *(.dynsbss*)
+        *(COMMON)
+        . = ALIGN(8);
+        _end = .;
+        __bss_end__ = .;
+    } > DLM
+
+    .heap : {
+        . = ALIGN(8);
+        __heap_start = .;
+        __heap_start__ = .;
+        . += HEAP_SIZE;
+        __heap_end__ = .;
+        __heap_end = .;
+    } > AXI_SRAM
+
+    __heap_size = HEAP_SIZE;
+    
+    .framebuffer (NOLOAD) : {
+        . = ALIGN(8);
+        KEEP(*(.framebuffer))
+        . = ALIGN(8);
+    } > AXI_SRAM
+
+    .noncacheable : AT(etext + __data_end__ - __data_start__ + __ramfunc_end__ - __ramfunc_start__){
+        . = ALIGN(8);
+        __noncacheable_init_start__ = .;
+        KEEP(*(.noncacheable.init))
+        __noncacheable_init_end__ = .;
+        KEEP(*(.noncacheable))
+        __noncacheable_bss_start__ = .;
+        KEEP(*(.noncacheable.bss))
+        __noncacheable_bss_end__ = .;
+        . = ALIGN(8);
+    } > AXI_SRAM_NONCACHEABLE
+
+    .stack : {
+        . = ALIGN(8);
+        __stack_bootom = .;
+        . += STACK_SIZE;
+        __except_stack_top = .;
+        __stack_base__ = .;
+        . += STACK_SIZE;
+        . = ALIGN(8);
+        PROVIDE (_stack = .);
+        PROVIDE (_stack_safe = .);
+        __start_and_irq_stack_top = .;
+    } > DLM
+
+    __noncacheable_start__ = ORIGIN(AXI_SRAM_NONCACHEABLE);
+    __noncacheable_end__ = ORIGIN(AXI_SRAM_NONCACHEABLE) + LENGTH(AXI_SRAM_NONCACHEABLE);
+}

hpm6750evk/liteos_m/littlefs/BUILD.gn

@@ -0,0 +1,32 @@
+# Copyright (c) 2022 HPMicro.
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+import("//kernel/liteos_m/liteos.gni")
+
+module_name = get_path_info(rebase_path("."), "name")
+module_switch = defined(LOSCFG_SUPPORT_LITTLEFS)
+kernel_module(module_name) {
+  cflags = [ "-Wall", "-Werror"]
+  
+  sources = [
+    "hpm_littlefs_drv.c",
+    "hpm_littlefs.c"
+  ]
+}
+
+config("public") {
+  include_dirs = [
+    ".",
+  ]
+}
+

hpm6750evk/liteos_m/littlefs/hpm_littlefs.c

@@ -0,0 +1,80 @@
+/*
+ * Copyright (c) 2022 HPMicro.
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <hpm_clock_drv.h>
+#include <stdio.h>
+#include <los_interrupt.h>
+#include "hpm_littlefs_drv.h"
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <sys/mount.h>
+#include <sys/stat.h>
+#include <dirent.h>
+
+struct HpmLittlefsCfg {
+    struct lfs_config cfg;
+    struct HpmLittleCtx ctx;
+};
+
+static struct HpmLittlefsCfg g_hpmLittlefsCfgs[] = {
+    [0] = {
+        .cfg = {
+            .read  = HpmLittlefsRead,
+            .prog  = HpmLittlefsProg,
+            .erase = HpmLittlefsErase,
+            .sync  = HpmLittlefsSync,
+
+            .read_size = 16,
+            .prog_size = 16,
+            .cache_size = 1024,
+            .lookahead_size = 16,
+            .block_cycles = 1000,
+        },
+        .ctx = {
+            .startOffset = 5 * 1024 * 1024,
+            .len = 2 * 1024 * 1024,
+            .base = HPM_XPI0_BASE,
+            .mountPoint = "/data",
+        }
+    },
+};
+
+void HpmLittlefsInit(void)
+{
+    uint32_t num = sizeof(g_hpmLittlefsCfgs) / sizeof(g_hpmLittlefsCfgs[0]);
+    int ret;
+    for (int i = 0; i < num; i++) {
+        g_hpmLittlefsCfgs[i].cfg.context = &g_hpmLittlefsCfgs[i].ctx;
+        HpmLittlefsDriverInit(&g_hpmLittlefsCfgs[i].cfg);
+
+        ret = mount(NULL, g_hpmLittlefsCfgs[i].ctx.mountPoint, "littlefs", 0, &g_hpmLittlefsCfgs[i].cfg);
+        if (ret < 0) {
+            printf("Err: hpm littlefs [%s] mount failed!!!\n", g_hpmLittlefsCfgs[i].ctx.mountPoint);
+            continue;
+        }
+
+        DIR *dir = NULL;
+        if ((dir = opendir(g_hpmLittlefsCfgs[i].ctx.mountPoint)) == NULL) {
+            ret = mkdir(g_hpmLittlefsCfgs[i].ctx.mountPoint, S_IRUSR | S_IWUSR);
+            if (ret) {
+                printf("Err: hpm littlefs mkdir [%s] mount failed!!!\n", g_hpmLittlefsCfgs[i].ctx.mountPoint);
+                continue;
+            }
+        } else {
+            closedir(dir);
+        }
+    }
+}
+

hpm6750evk/liteos_m/littlefs/hpm_littlefs.h

@@ -0,0 +1,20 @@
+/*
+ * Copyright (c) 2022 HPMicro.
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef HPM_LITTLEFS_H
+#define HPM_LITTLEFS_H
+
+void HpmLittlefsInit(void);
+
+#endif

hpm6750evk/liteos_m/littlefs/hpm_littlefs_drv.c

@@ -0,0 +1,181 @@
+/*
+ * Copyright (c) 2022 HPMicro.
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <hpm_clock_drv.h>
+#include <stdio.h>
+#include <los_interrupt.h>
+#include "hpm_littlefs_drv.h"
+#include "hpm_csr_regs.h"
+#include "hpm_l1c_drv.h"
+
+
+
+int HpmLittlefsRead(const struct lfs_config *cfg, lfs_block_t block,
+                        lfs_off_t off, void *buffer, lfs_size_t size)
+{
+    struct HpmLittleCtx *ctx = (struct HpmLittleCtx *)cfg->context;
+    XPI_Type *base = (XPI_Type *)ctx->base;
+    uint32_t chipOffset = cfg->block_size * block + ctx->startOffset + off;
+
+    uint32_t intSave = LOS_IntLock();
+    hpm_stat_t status = rom_xpi_nor_read(base, xpi_xfer_channel_auto,
+                                 &ctx->xpiNorConfig, (uint32_t *)buffer, chipOffset, size);
+    __asm volatile("fence.i");
+    LOS_IntRestore(intSave);
+    if (status != status_success) {
+        printf("[%s]: read addr: %u, size: %u failed!!!\n", ctx->mountPoint, chipOffset, size);
+        return -1;
+    }
+    return 0;
+}
+
+
+int HpmLittlefsProg(const struct lfs_config *cfg, lfs_block_t block,
+                        lfs_off_t off, const void *buffer, lfs_size_t size)
+{
+    struct HpmLittleCtx *ctx = (struct HpmLittleCtx *)cfg->context;
+    XPI_Type *base = (XPI_Type *)ctx->base;
+    uint32_t chipOffset = cfg->block_size * block + ctx->startOffset + off;
+
+    uint32_t intSave = LOS_IntLock();
+    hpm_stat_t status = rom_xpi_nor_program(base, xpi_xfer_channel_auto,
+                                 &ctx->xpiNorConfig, (const uint32_t *)buffer, chipOffset, size);
+
+    __asm volatile("fence.i"); /* mandatory, very important!!! */
+    LOS_IntRestore(intSave);
+    
+    if (status != status_success) {
+        printf("[%s]: program addr: %u, size: %u failed!!!\n", ctx->mountPoint, chipOffset, size);
+        return -1;
+    }
+    return 0;
+}
+
+int HpmLittlefsErase(const struct lfs_config *cfg, lfs_block_t block)
+{
+    struct HpmLittleCtx *ctx = (struct HpmLittleCtx *)cfg->context;
+    XPI_Type *base = (XPI_Type *)ctx->base;
+    uint32_t chipOffset = cfg->block_size * block + ctx->startOffset;
+    
+    uint32_t intSave = LOS_IntLock();
+    hpm_stat_t status = rom_xpi_nor_erase_sector(base, xpi_xfer_channel_auto, &ctx->xpiNorConfig, chipOffset);
+    __asm volatile("fence.i"); /* mandatory, very important!!! */
+    LOS_IntRestore(intSave);
+    if (status != status_success) {
+        printf("[%s]: erase addr: %u, size: %u failed!!!\n", ctx->mountPoint, chipOffset, cfg->block_size);
+        return -1;
+    }
+
+    return 0;
+}
+
+int HpmLittlefsSync(const struct lfs_config *cfg)
+{
+    return LFS_ERR_OK;
+}
+
+#define HPMICRO_FLASH_SELFTEST_ENABLE 0
+
+#if HPMICRO_FLASH_SELFTEST_ENABLE == 1
+
+static uint8_t rbuf[4096];
+static uint8_t wbuf[4096];
+
+static void SelfTest(const struct lfs_config *cfg)
+{
+    struct HpmLittleCtx *ctx = (struct HpmLittleCtx *)cfg->context;
+    printf("[%s]: Self Test Start\n", ctx->mountPoint);
+
+    lfs_block_t block = 0;
+    uint32_t start = 0;
+    uint32_t testSize = (cfg->block_size > sizeof(wbuf)) ? sizeof(wbuf) : cfg->block_size;
+    printf("[%s]: Self Test testSize: %u\n", ctx->mountPoint, testSize);
+
+    for (int i = 0; i < testSize; i++) {
+        wbuf[i] = i & 0xff;
+    }
+
+    uint32_t rsetp = cfg->read_size;
+    uint32_t wsetp = cfg->prog_size;
+
+    for (block = 0; block < cfg->block_count; block++) {
+        HpmLittlefsErase(cfg, block);
+        for (start = 0; start < testSize; start += wsetp) {
+            HpmLittlefsProg(cfg, block, start, wbuf + start, wsetp);
+        }
+        
+        for (start = 0; start < testSize; start += rsetp) {
+            HpmLittlefsRead(cfg, block, start, rbuf + start, rsetp);
+        }
+
+        for (int i = 0; i < testSize; i++) {
+            if (wbuf[i] != rbuf[i]) {
+                printf("%d: wbuf(%u) != rbuf(%u)\n", i, wbuf[i], rbuf[i]);
+            }  
+        }
+
+        int isEqu = memcmp(wbuf, rbuf, testSize);
+        if (isEqu) {
+            printf("[%s]: block: %u fail\n", ctx->mountPoint, block);
+            break;
+        } else {
+            printf("[%s]: block: %u pass\n", ctx->mountPoint, block);
+        }
+    }
+}
+#endif
+
+int HpmLittlefsDriverInit(struct lfs_config *cfg)
+{
+    struct HpmLittleCtx *ctx = (struct HpmLittleCtx *)cfg->context;
+    XPI_Type *base = (XPI_Type *)ctx->base;
+
+    if (ctx->isInited) {
+        return 0;
+    }
+    ctx->isInited = 1;
+
+    printf("hpm lfs: mountPoint: %s\n", ctx->mountPoint);
+    printf("hpm lfs: startOffset: %u\n", ctx->startOffset);
+    printf("hpm lfs: len: %u\n", ctx->len);
+    
+    xpi_nor_config_option_t option;
+    option.header.U = 0xfcf90001U;
+    option.option0.U = 0x00000005U;
+    option.option1.U = 0x00001000U;
+
+    uint32_t intSave = LOS_IntLock();
+    hpm_stat_t status = rom_xpi_nor_auto_config(base, &ctx->xpiNorConfig, &option);
+    rom_xpi_nor_get_property(base, &ctx->xpiNorConfig, xpi_nor_property_sector_size, &cfg->block_size);
+    cfg->block_count = ctx->len / cfg->block_size;
+    __asm volatile("fence.i");
+    LOS_IntRestore(intSave);
+    if (status != status_success) {
+        printf("Error: rom_xpi_nor_auto_config\n");
+        while (1);
+    }
+
+    printf("hpm lfs: block_count: %u\n", cfg->block_count);
+    printf("hpm lfs: block_size: %u\n", cfg->block_size);
+    printf("------------------------------------------\n");
+    
+#if HPMICRO_FLASH_SELFTEST_ENABLE == 1
+    SelfTest(cfg);
+#endif
+
+    return 0;
+}
+
+

hpm6750evk/liteos_m/littlefs/hpm_littlefs_drv.h

@@ -0,0 +1,39 @@
+/*
+ * Copyright (c) 2022 HPMicro.
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef HPM_LITTLEFS_DRV_H
+#define HPM_LITTLEFS_DRV_H
+
+#include <lfs.h>
+#include <stdint.h>
+#include <hpm_romapi.h>
+
+struct HpmLittleCtx {
+    xpi_nor_config_t xpiNorConfig;
+    int isInited;
+    uint32_t startOffset; /* The partion address in chip; unit in byte */
+    uint32_t len; /* The partion length, unit in byte */
+    uint32_t base; /* XPI register base */
+    char *mountPoint;
+};
+
+int HpmLittlefsRead(const struct lfs_config *cfg, lfs_block_t block,
+                        lfs_off_t off, void *buffer, lfs_size_t size);
+int HpmLittlefsProg(const struct lfs_config *cfg, lfs_block_t block,
+                        lfs_off_t off, const void *buffer, lfs_size_t size);                       
+int HpmLittlefsErase(const struct lfs_config *cfg, lfs_block_t block);
+int HpmLittlefsSync(const struct lfs_config *cfg);
+int HpmLittlefsDriverInit(struct lfs_config *cfg);
+
+#endif