openharmony/device_soc_asrmicro
1
0
Fork 0
mirror of https://github.com/openharmony/device_soc_asrmicro.git synced 2026-07-01 22:34:00 -04:00
Code Issues Packages Projects Releases Wiki Activity

fix some code check errors and update libs

Browse Source 
Signed-off-by: zipper1956 <zipper1956@hotmail.com>
This commit is contained in:
peizhu
2022-03-31 19:09:03 +08:00
parent a583449509
commit 354524ba17
122 changed files with 6942 additions and 8187 deletions
Download Patch File Download Diff File Expand all files Collapse all files
asr582x/liteos_m/components/mbedtls/config/config_liteos_m.h
+1 -1
View File
@@ -803,7 +803,7 @@
*
* A man-in-the-browser attacker can recover authentication tokens sent through
* a TLS connection using a 3DES based cipher suite (see "On the Practical
* (In-)Security of 64-bit Block Ciphers" by Karthikeyan Bhargavan and Gaëtan
* (In-)Security of 64-bit Block Ciphers" by Karthikeyan Bhargavan and Ga?tan
* Leurent, see https://sweet32.info/SWEET32_CCS16.pdf). If this attack falls
* in your threat model or you are unsure, then you should keep this option
* enabled to remove 3DES based cipher suites.
asr582x/liteos_m/components/mbedtls/library/entropy_hardware_alt.c
+8 -9
View File
@@ -26,18 +26,18 @@ int mbedtls_hardware_poll( void *data,
int ret = 0;
lega_rnd_init();
ret = lega_RND_AddAdditionalInput(rndContext_ptr, "0123", 4);
if (ret != LEGA_HW_OK){
printf("\n CRYS_RND_AddAdditionalInput failed with 0x%x \n",ret);
if (ret != LEGA_HW_OK) {
printf("\n CRYS_RND_AddAdditionalInput failed with 0x%x \n", ret);
goto rnd_err;
}
ret = lega_RND_Reseeding (rndContext_ptr, rndWorkBuff_ptr);
if (ret != LEGA_HW_OK){
printf("\n CRYS_RND_Reseeding failed with 0x%x \n",ret);
if (ret != LEGA_HW_OK) {
printf("\n CRYS_RND_Reseeding failed with 0x%x \n", ret);
goto rnd_err;
}
ret = lega_RND_GenerateVector(rndContext_ptr, len, output);
if (ret != LEGA_HW_OK){
printf("\n CRYS_RND_GenerateVector for vector 1 failed with 0x%x \n",ret);
if (ret != LEGA_HW_OK) {
printf("\n CRYS_RND_GenerateVector for vector 1 failed with 0x%x \n", ret);
goto rnd_err;
}
@@ -52,12 +52,11 @@ rnd_err:
uint32_t mbedtls_hw_rand()
{
uint32_t ret = 0;
uint8_t buffer[RND_MAX_LEN] ={0};
uint8_t buffer[RND_MAX_LEN] = {0};
uint32_t olen = 0;
mbedtls_hardware_poll( "0", &buffer[0], RND_TEST_LEN, &olen );
printf("data len = %d, data = \n", (int)olen);
for(ret = 0;ret < RND_TEST_LEN; ret++)
{
for (ret = 0; ret < RND_TEST_LEN; ret++) {
printf("0x%x ", buffer[ret]);
}
printf("\n");
asr582x/liteos_m/sdk/adapter/hals/communication/wifi_lite/wifiaware/source/hal_wifiaware.c
+5 -5
View File
@@ -18,7 +18,7 @@
#include "hi_wifi_sdp_api.h"
#include "wifiaware.h"
int HalWifiSdpInit(const char* ifname)
int HalWifiSdpInit(const char *ifname)
{
if (hi_wifi_sdp_init(ifname) != HISI_OK) {
return -1;
@@ -26,7 +26,7 @@ int HalWifiSdpInit(const char* ifname)
return 0;
}
unsigned int HalCipherHashSha256(const char* input, unsigned int inputLen, unsigned char* hash, unsigned hashLen)
unsigned int HalCipherHashSha256(const char *input, unsigned int inputLen, unsigned char *hash, unsigned hashLen)
{
if (hi_cipher_hash_sha256((uintptr_t)input, inputLen, hash, hashLen) != HISI_OK) {
return -1;
@@ -34,7 +34,7 @@ unsigned int HalCipherHashSha256(const char* input, unsigned int inputLen, unsig
return 0;
}
int HalWifiSdpStartService(const char* svcName, unsigned char localHandle, RecvCallback recvCB, unsigned char role)
int HalWifiSdpStartService(const char *svcName, unsigned char localHandle, RecvCallback recvCB, unsigned char role)
{
if (hi_wifi_sdp_start_service(svcName, localHandle, (hi_wifi_sdp_recv_cb)recvCB, role) != HISI_OK) {
return -1;
@@ -42,8 +42,8 @@ int HalWifiSdpStartService(const char* svcName, unsigned char localHandle, RecvC
return 0;
}
int HalWifiSdpSend(unsigned char* macAddr, unsigned char peerHandle, unsigned char localHandle,
unsigned char* msg, int len)
int HalWifiSdpSend(unsigned char *macAddr, unsigned char peerHandle, unsigned char localHandle,
unsigned char *msg, int len)
{
if (hi_wifi_sdp_send(macAddr, peerHandle, localHandle, msg, len) != HISI_OK) {
return -1;
asr582x/liteos_m/sdk/adapter/hals/communication/wifi_lite/wifiservice/source/wifi_device.c
+27 -27
View File
@@ -31,11 +31,11 @@
static int g_wifiStaStatus = WIFI_STA_NOT_ACTIVE;
static WifiDeviceConfig g_wifiConfigs[WIFI_MAX_CONFIG_SIZE] = {{{0}, {0}, {0}, 0, WIFI_CONFIG_INVALID, 0, 0}};
static WifiEvent* g_wifiEvents[WIFI_MAX_EVENT_SIZE] = {0};
static WifiEvent *g_wifiEvents[WIFI_MAX_EVENT_SIZE] = {0};
static int g_connectState = WIFI_STATE_NOT_AVALIABLE;
static void DispatchScanStateChangeEvent(const hi_wifi_event* hisiEvent,
const WifiEvent* hosEvent, WifiEventState event)
static void DispatchScanStateChangeEvent(const hi_wifi_event *hisiEvent,
const WifiEvent *hosEvent, WifiEventState event)
{
if (hosEvent->OnWifiScanStateChanged == NULL) {
return;
@@ -53,7 +53,7 @@ static void DispatchScanStateChangeEvent(const hi_wifi_event* hisiEvent,
}
}
static void DispatchConnectEvent(const hi_wifi_event* hisiEvent, const WifiEvent* hosEvent)
static void DispatchConnectEvent(const hi_wifi_event *hisiEvent, const WifiEvent *hosEvent)
{
if (hosEvent->OnWifiConnectionChanged == NULL) {
return;
@@ -65,14 +65,14 @@ static void DispatchConnectEvent(const hi_wifi_event* hisiEvent, const WifiEvent
if (hisiEvent->event == HI_WIFI_EVT_CONNECTED) {
g_connectState = WIFI_STATE_AVALIABLE;
cpyErr = memcpy_s(&info.ssid, WIFI_MAX_SSID_LEN,
hisiEvent->info.wifi_connected.ssid, HI_WIFI_MAX_SSID_LEN + 1);
hisiEvent->info.wifi_connected.ssid, HI_WIFI_MAX_SSID_LEN + 1);
if (cpyErr != EOK) {
printf("[wifi_service]:DispatchConnectEvent memcpy failed, err = %d\n", cpyErr);
return;
}
cpyErr = memcpy_s(&info.bssid, WIFI_MAC_LEN,
hisiEvent->info.wifi_connected.bssid, HI_WIFI_MAC_LEN);
hisiEvent->info.wifi_connected.bssid, HI_WIFI_MAC_LEN);
if (cpyErr != EOK) {
printf("[wifi_service]:DispatchConnectEvent memcpy failed, err = %d\n", cpyErr);
return;
@@ -90,7 +90,7 @@ static void DispatchConnectEvent(const hi_wifi_event* hisiEvent, const WifiEvent
if (hisiEvent->event == HI_WIFI_EVT_DISCONNECTED) {
cpyErr = memcpy_s(&info.bssid, WIFI_MAC_LEN,
hisiEvent->info.wifi_disconnected.bssid, HI_WIFI_MAC_LEN);
hisiEvent->info.wifi_disconnected.bssid, HI_WIFI_MAC_LEN);
if (cpyErr != EOK) {
printf("[wifi_service]:DispatchConnectEvent memcpy failed, err = %d\n", cpyErr);
return;
@@ -101,7 +101,7 @@ static void DispatchConnectEvent(const hi_wifi_event* hisiEvent, const WifiEvent
hosEvent->OnWifiConnectionChanged(WIFI_STATE_NOT_AVALIABLE, &info);
}
static void DispatchStaConnectEvent(const hi_wifi_event* hisiEvent, const WifiEvent* hosEvent)
static void DispatchStaConnectEvent(const hi_wifi_event *hisiEvent, const WifiEvent *hosEvent)
{
int cpyErr;
StationInfo info = {0};
@@ -111,7 +111,7 @@ static void DispatchStaConnectEvent(const hi_wifi_event* hisiEvent, const WifiEv
}
cpyErr = memcpy_s(&info.macAddress, WIFI_MAC_LEN,
hisiEvent->info.ap_sta_connected.addr, HI_WIFI_MAC_LEN);
hisiEvent->info.ap_sta_connected.addr, HI_WIFI_MAC_LEN);
if (cpyErr != EOK) {
printf("[wifi_service]:DispatchStaConnectEvent memcpy failed, err = %d\n", cpyErr);
return;
@@ -126,7 +126,7 @@ static void DispatchStaConnectEvent(const hi_wifi_event* hisiEvent, const WifiEv
}
cpyErr = memcpy_s(&info.macAddress, WIFI_MAC_LEN,
hisiEvent->info.ap_sta_disconnected.addr, HI_WIFI_MAC_LEN);
hisiEvent->info.ap_sta_disconnected.addr, HI_WIFI_MAC_LEN);
if (cpyErr != EOK) {
printf("[wifi_service]:DispatchStaConnectEvent memcpy failed, err = %d\n", cpyErr);
return;
@@ -135,7 +135,7 @@ static void DispatchStaConnectEvent(const hi_wifi_event* hisiEvent, const WifiEv
hosEvent->OnHotspotStaLeave(&info);
}
static void DispatchApStartEvent(const WifiEvent* hosEvent)
static void DispatchApStartEvent(const WifiEvent *hosEvent)
{
if (hosEvent->OnHotspotStateChanged == NULL) {
return;
@@ -144,7 +144,7 @@ static void DispatchApStartEvent(const WifiEvent* hosEvent)
hosEvent->OnHotspotStateChanged(WIFI_STATE_AVALIABLE);
}
static void DispatchEvent(const hi_wifi_event* hisiEvent, const WifiEvent* hosEvent)
static void DispatchEvent(const hi_wifi_event *hisiEvent, const WifiEvent *hosEvent)
{
switch (hisiEvent->event) {
case HI_WIFI_EVT_SCAN_DONE:
@@ -225,7 +225,7 @@ WifiErrorCode EnableWifi(void)
}
hiRet = hi_wifi_sta_set_reconnect_policy(WIFI_RECONN_POLICY_ENABLE, WIFI_RECONN_POLICY_TIMEOUT,
WIFI_RECONN_POLICY_PERIOD, WIFI_RECONN_POLICY_MAX_TRY_COUNT);
WIFI_RECONN_POLICY_PERIOD, WIFI_RECONN_POLICY_MAX_TRY_COUNT);
if (hiRet != HISI_OK) {
printf("[wifi_service]:EnableWifi set reconn policy fail\n");
if (UnlockWifiGlobalLock() != WIFI_SUCCESS) {
@@ -361,7 +361,7 @@ WifiErrorCode AdvanceScan(WifiScanParams *params)
if (UnlockWifiGlobalLock() != WIFI_SUCCESS) {
return ERROR_WIFI_UNKNOWN;
}
return ERROR_WIFI_NOT_STARTED;
return ERROR_WIFI_NOT_STARTED;
}
if (UnlockWifiGlobalLock() != WIFI_SUCCESS) {
@@ -406,7 +406,7 @@ WifiErrorCode AdvanceScan(WifiScanParams *params)
return WIFI_SUCCESS;
}
WifiErrorCode GetScanInfoList(WifiScanInfo* result, unsigned int* size)
WifiErrorCode GetScanInfoList(WifiScanInfo *result, unsigned int *size)
{
if (result == NULL || size == NULL || *size == 0) {
return ERROR_WIFI_INVALID_ARGS;
@@ -458,7 +458,7 @@ WifiErrorCode GetScanInfoList(WifiScanInfo* result, unsigned int* size)
return WIFI_SUCCESS;
}
WifiErrorCode AddDeviceConfig(const WifiDeviceConfig* config, int* result)
WifiErrorCode AddDeviceConfig(const WifiDeviceConfig *config, int *result)
{
if (config == NULL || result == NULL) {
return ERROR_WIFI_INVALID_ARGS;
@@ -500,7 +500,7 @@ WifiErrorCode AddDeviceConfig(const WifiDeviceConfig* config, int* result)
return WIFI_SUCCESS;
}
WifiErrorCode GetDeviceConfigs(WifiDeviceConfig* result, unsigned int* size)
WifiErrorCode GetDeviceConfigs(WifiDeviceConfig *result, unsigned int *size)
{
if (result == NULL || size == NULL || *size == 0) {
return ERROR_WIFI_INVALID_ARGS;
@@ -561,7 +561,7 @@ static WifiErrorCode StaConnect(unsigned int chan, hi_wifi_assoc_request *assocR
hiRet += memcpy_s(&fastReq.req, sizeof(hi_wifi_assoc_request), assocReq, sizeof(hi_wifi_assoc_request));
if (pskType == WIFI_PSK_TYPE_HEX) {
hiRet += memcpy_s(fastReq.req.key, sizeof(fastReq.req.key),
WIFI_DEFAULT_KEY_FOR_PSK, sizeof(WIFI_DEFAULT_KEY_FOR_PSK));
WIFI_DEFAULT_KEY_FOR_PSK, sizeof(WIFI_DEFAULT_KEY_FOR_PSK));
hiRet += memcpy_s(fastReq.psk, sizeof(fastReq.psk), assocReq->key, HI_WIFI_STA_PSK_LEN);
fastReq.psk_flag = HI_WIFI_WPA_PSK_USE_OUTER;
}
@@ -607,11 +607,11 @@ WifiErrorCode ConnectTo(int networkId)
assocReq.auth = HoSecToHiSec(g_wifiConfigs[networkId].securityType);
int cpyErr = memcpy_s(assocReq.ssid, sizeof(assocReq.ssid),
g_wifiConfigs[networkId].ssid, sizeof(g_wifiConfigs[networkId].ssid));
g_wifiConfigs[networkId].ssid, sizeof(g_wifiConfigs[networkId].ssid));
cpyErr += memcpy_s(assocReq.key, sizeof(assocReq.key),
g_wifiConfigs[networkId].preSharedKey, sizeof(g_wifiConfigs[networkId].preSharedKey));
g_wifiConfigs[networkId].preSharedKey, sizeof(g_wifiConfigs[networkId].preSharedKey));
cpyErr += memcpy_s(assocReq.bssid, sizeof(assocReq.bssid),
g_wifiConfigs[networkId].bssid, sizeof(g_wifiConfigs[networkId].bssid));
g_wifiConfigs[networkId].bssid, sizeof(g_wifiConfigs[networkId].bssid));
if (UnlockWifiGlobalLock() != WIFI_SUCCESS) {
return ERROR_WIFI_UNKNOWN;
}
@@ -654,7 +654,7 @@ WifiErrorCode RemoveDevice(int networkId)
return ERROR_WIFI_UNKNOWN;
}
if (memset_s(&g_wifiConfigs[networkId], sizeof(WifiDeviceConfig),
0, sizeof(WifiDeviceConfig)) != EOK) {
0, sizeof(WifiDeviceConfig)) != EOK) {
printf("[wifi_service]:removeDevice memset failed\n");
}
g_wifiConfigs[networkId].netId = WIFI_CONFIG_INVALID;
@@ -664,7 +664,7 @@ WifiErrorCode RemoveDevice(int networkId)
return WIFI_SUCCESS;
}
WifiErrorCode GetLinkedInfo(WifiLinkedInfo* result)
WifiErrorCode GetLinkedInfo(WifiLinkedInfo *result)
{
if (result == NULL) {
return ERROR_WIFI_INVALID_ARGS;
@@ -699,7 +699,7 @@ WifiErrorCode GetLinkedInfo(WifiLinkedInfo* result)
}
WifiErrorCode RegisterWifiEvent(WifiEvent* event)
WifiErrorCode RegisterWifiEvent(WifiEvent *event)
{
if (event == NULL) {
return ERROR_WIFI_INVALID_ARGS;
@@ -742,7 +742,7 @@ WifiErrorCode RegisterWifiEvent(WifiEvent* event)
return WIFI_SUCCESS;
}
WifiErrorCode UnRegisterWifiEvent(const WifiEvent* event)
WifiErrorCode UnRegisterWifiEvent(const WifiEvent *event)
{
if (event == NULL) {
return ERROR_WIFI_INVALID_ARGS;
@@ -771,13 +771,13 @@ WifiErrorCode UnRegisterWifiEvent(const WifiEvent* event)
return ERROR_WIFI_UNKNOWN;
}
WifiErrorCode GetDeviceMacAddress(unsigned char* result)
WifiErrorCode GetDeviceMacAddress(unsigned char *result)
{
if (result == NULL) {
return ERROR_WIFI_INVALID_ARGS;
}
int hiRet = hi_wifi_get_macaddr((char*)result, WIFI_MAC_LEN);
int hiRet = hi_wifi_get_macaddr((char *)result, WIFI_MAC_LEN);
if (hiRet != HISI_OK) {
return ERROR_WIFI_UNKNOWN;
}
asr582x/liteos_m/sdk/adapter/hals/communication/wifi_lite/wifiservice/source/wifi_device_util.h
+1 -1
View File
@@ -55,7 +55,7 @@ int GetHotspotChannel(void);
*
* @return WifiErrorCode.
*/
WifiErrorCode GetHotspotInterfaceName(char* result, int size);
WifiErrorCode GetHotspotInterfaceName(char *result, int size);
/**
* @brief lock wifi global lock
asr582x/liteos_m/sdk/adapter/hals/communication/wifi_lite/wifiservice/source/wifi_hotspot.c
+8 -8
View File
@@ -115,7 +115,7 @@ WifiErrorCode DisableHotspot(void)
return WIFI_SUCCESS;
}
WifiErrorCode SetHotspotConfig(const HotspotConfig* config)
WifiErrorCode SetHotspotConfig(const HotspotConfig *config)
{
if (config == NULL) {
return ERROR_WIFI_INVALID_ARGS;
@@ -135,7 +135,7 @@ WifiErrorCode SetHotspotConfig(const HotspotConfig* config)
return WIFI_SUCCESS;
}
WifiErrorCode GetHotspotConfig(HotspotConfig* result)
WifiErrorCode GetHotspotConfig(HotspotConfig *result)
{
if (result == NULL) {
return ERROR_WIFI_INVALID_ARGS;
@@ -168,7 +168,7 @@ int IsHotspotActive(void)
return ret;
}
WifiErrorCode GetStationList(StationInfo* result, unsigned int* size)
WifiErrorCode GetStationList(StationInfo *result, unsigned int *size)
{
if (result == NULL || size == NULL || *size == 0) {
return ERROR_WIFI_INVALID_ARGS;
@@ -215,7 +215,7 @@ WifiErrorCode SetBand(int band)
return WIFI_SUCCESS;
}
WifiErrorCode GetBand(int* result)
WifiErrorCode GetBand(int *result)
{
if (result == NULL) {
return ERROR_WIFI_INVALID_ARGS;
@@ -295,7 +295,7 @@ int GetHotspotChannel(void)
return channel;
}
WifiErrorCode GetHotspotInterfaceName(char* result, int size)
WifiErrorCode GetHotspotInterfaceName(char *result, int size)
{
if (LockWifiGlobalLock() != WIFI_SUCCESS) {
return ERROR_WIFI_UNKNOWN;
@@ -308,12 +308,12 @@ WifiErrorCode GetHotspotInterfaceName(char* result, int size)
}
int cpyErr = memcpy_s(result, size, g_wifiIfName, WIFI_IFNAME_MAX_SIZE + 1);
if (UnlockWifiGlobalLock() != WIFI_SUCCESS) {
return ERROR_WIFI_UNKNOWN;
}
if (cpyErr != EOK) {
printf("[wifi_service]:getifname memcpy fail, err = %d\n", cpyErr);
return ERROR_WIFI_UNKNOWN;
}
if (UnlockWifiGlobalLock() != WIFI_SUCCESS) {
return ERROR_WIFI_UNKNOWN;
}
return WIFI_SUCCESS;
}
asr582x/liteos_m/sdk/adapter/hals/iot_hardware/wifiiot_lite/hal_iot_flash.c
+6 -5
View File
@@ -22,7 +22,7 @@
static int param_part = PARTITION_PARAMETER_2;
unsigned int IoTFlashRead(unsigned int flashOffset, unsigned int size, unsigned char *ramData)
{
return duet_flash_read(param_part, (uint32_t*)&flashOffset, ramData, size);
return duet_flash_read(param_part, (uint32_t *)&flashOffset, ramData, size);
}
unsigned int IoTFlashWrite(unsigned int flashOffset, unsigned int size,
@@ -32,10 +32,11 @@ unsigned int IoTFlashWrite(unsigned int flashOffset, unsigned int size,
lega_rtos_declare_critical();
lega_enter_critical_expble();
if(doErase)
ret = duet_flash_erase_write(param_part, (uint32_t*)&flashOffset, ramData, size);
else
ret = duet_flash_write(param_part, (uint32_t*)&flashOffset, ramData, size);
if (doErase) {
ret = duet_flash_erase_write(param_part, (uint32_t *)&flashOffset, ramData, size);
} else {
ret = duet_flash_write(param_part, (uint32_t *)&flashOffset, ramData, size);
}
lega_exit_critical_expble();
return ret;
asr582x/liteos_m/sdk/adapter/hals/iot_hardware/wifiiot_lite/hal_iot_gpio.c
+48 -29
View File
@@ -22,8 +22,9 @@ static duet_gpio_dev_t g_duet_gpio[DUET_GPIO_TOTAL_NUM];
unsigned int IoTGpioInit(unsigned int id)
{
if (id >= DUET_GPIO_TOTAL_NUM)
if (id >= DUET_GPIO_TOTAL_NUM) {
return IOT_FAILURE;
}
g_duet_gpio[id].port = id;
@@ -32,13 +33,15 @@ unsigned int IoTGpioInit(unsigned int id)
unsigned int IoTGpioSetDir(unsigned int id, IotGpioDir dir)
{
if (id >= DUET_GPIO_TOTAL_NUM)
if (id >= DUET_GPIO_TOTAL_NUM) {
return IOT_FAILURE;
}
if(dir == IOT_GPIO_DIR_IN)
if (dir == IOT_GPIO_DIR_IN) {
g_duet_gpio[id].config = DUET_INPUT_PULL_DOWN;
else
} else {
g_duet_gpio[id].config = DUET_OUTPUT_PUSH_PULL;
}
return IOT_SUCCESS;
}
@@ -47,42 +50,48 @@ unsigned int IoTGpioGetDir(unsigned int id, IotGpioDir *dir)
{
int duet_cfg = 0;
if (id >= DUET_GPIO_TOTAL_NUM)
if (id >= DUET_GPIO_TOTAL_NUM) {
return IOT_FAILURE;
}
duet_cfg = g_duet_gpio[id].config;
if( duet_cfg >= DUET_OUTPUT_PUSH_PULL)
return IOT_GPIO_DIR_OUT;
else
return IOT_GPIO_DIR_IN;
if ( duet_cfg >= DUET_OUTPUT_PUSH_PULL) {
return IOT_GPIO_DIR_OUT;
} else {
return IOT_GPIO_DIR_IN;
}
}
unsigned int IoTGpioSetOutputVal(unsigned int id, IotGpioValue val)
{
if (id >= DUET_GPIO_TOTAL_NUM)
if (id >= DUET_GPIO_TOTAL_NUM) {
return IOT_FAILURE;
}
if(val == IOT_GPIO_VALUE0)
duet_gpio_output_low(&g_duet_gpio[id]);
else
duet_gpio_output_high(&g_duet_gpio[id]);
if (val == IOT_GPIO_VALUE0) {
duet_gpio_output_low(&g_duet_gpio[id]);
} else {
duet_gpio_output_high(&g_duet_gpio[id]);
}
return IOT_SUCCESS;
}
unsigned int IoTGpioGetOutputVal(unsigned int id, IotGpioValue *val)
{
if (id >= DUET_GPIO_TOTAL_NUM)
if (id >= DUET_GPIO_TOTAL_NUM) {
return IOT_FAILURE;
}
return duet_gpio_output_get(&g_duet_gpio[id], &val);
}
unsigned int IoTGpioGetInputVal(unsigned int id, IotGpioValue *val)
{
if (id >= DUET_GPIO_TOTAL_NUM)
if (id >= DUET_GPIO_TOTAL_NUM) {
return IOT_FAILURE;
}
return duet_gpio_input_get(&g_duet_gpio[id], &val);
}
@@ -92,29 +101,33 @@ unsigned int IoTGpioRegisterIsrFunc(unsigned int id, IotGpioIntType intType, Iot
{
duet_gpio_irq_trigger_t trigger;
if (id >= DUET_GPIO_TOTAL_NUM)
if (id >= DUET_GPIO_TOTAL_NUM) {
return IOT_FAILURE;
}
if(intPolarity == IOT_GPIO_EDGE_FALL_LEVEL_LOW)
if (intPolarity == IOT_GPIO_EDGE_FALL_LEVEL_LOW) {
trigger = DUET_IRQ_TRIGGER_FALLING_EDGE;
else
} else {
trigger = DUET_IRQ_TRIGGER_RISING_EDGE;
}
return duet_gpio_enable_irq(&g_duet_gpio[id], trigger, func, arg);
}
unsigned int IoTGpioUnregisterIsrFunc(unsigned int id)
{
if (id >= DUET_GPIO_TOTAL_NUM)
if (id >= DUET_GPIO_TOTAL_NUM) {
return IOT_FAILURE;
}
return duet_gpio_disable_irq(&g_duet_gpio[id]);
}
unsigned int IoTGpioSetIsrMask(unsigned int id, unsigned char mask)
{
if (id >= DUET_GPIO_TOTAL_NUM)
if (id >= DUET_GPIO_TOTAL_NUM) {
return IOT_FAILURE;
}
return duet_gpio_clear_irq(&g_duet_gpio[id]);
}
@@ -127,29 +140,35 @@ unsigned int IoTGpioSetIsrMode(unsigned int id, IotGpioIntType intType, IotGpioI
char *arg;
duet_gpio_irq_trigger_t trigger;
if (id >= DUET_GPIO_TOTAL_NUM)
if (id >= DUET_GPIO_TOTAL_NUM) {
return IOT_FAILURE;
}
if(g_duet_gpio_handler[id].cb != NULL)
if (g_duet_gpio_handler[id].cb != NULL) {
func = g_duet_gpio_handler[id].cb;
if(g_duet_gpio_handler[id].arg != NULL)
}
if (g_duet_gpio_handler[id].arg != NULL) {
arg = g_duet_gpio_handler[id].arg;
}
if(intPolarity == IOT_GPIO_EDGE_FALL_LEVEL_LOW)
if (intPolarity == IOT_GPIO_EDGE_FALL_LEVEL_LOW) {
trigger = DUET_IRQ_TRIGGER_FALLING_EDGE;
else
} else {
trigger = DUET_IRQ_TRIGGER_RISING_EDGE;
}
if(duet_gpio_disable_irq(&g_duet_gpio[id]) !=0 )
return IOT_FAILURE;
if (duet_gpio_disable_irq(&g_duet_gpio[id]) != 0 ) {
return IOT_FAILURE;
}
return duet_gpio_enable_irq(&g_duet_gpio[id], trigger, func, arg);
}
unsigned int IoTGpioDeinit(unsigned int id)
{
if (id >= DUET_GPIO_TOTAL_NUM)
if (id >= DUET_GPIO_TOTAL_NUM) {
return IOT_FAILURE;
}
return duet_gpio_finalize(&g_duet_gpio[id]);
}
asr582x/liteos_m/sdk/adapter/hals/iot_hardware/wifiiot_lite/hal_iot_i2c.c
+14 -8
View File
@@ -24,24 +24,27 @@ static duet_i2c_dev_t g_duet_i2c[DUET_I2C_NUM];
unsigned int IoTI2cWrite(unsigned int id, unsigned short deviceAddr, const unsigned char *data, unsigned int dataLen)
{
if (id >= DUET_I2C_NUM)
if (id >= DUET_I2C_NUM) {
return IOT_FAILURE;
}
return duet_i2c_master_send(&g_duet_i2c[id], deviceAddr, data, dataLen, I2C_TIMEOUT);
}
unsigned int IoTI2cRead(unsigned int id, unsigned short deviceAddr, unsigned char *data, unsigned int dataLen)
{
if (id >= DUET_I2C_NUM)
if (id >= DUET_I2C_NUM) {
return IOT_FAILURE;
}
return duet_i2c_master_recv(&g_duet_i2c[id], deviceAddr, data, dataLen, I2C_TIMEOUT);
}
unsigned int IoTI2cInit(unsigned int id, unsigned int baudrate)
{
if (id >= DUET_I2C_NUM)
if (id >= DUET_I2C_NUM) {
return IOT_FAILURE;
}
g_duet_i2c[id].port = id;
g_duet_i2c[id].config.mode = I2C_MASTER;
@@ -52,23 +55,26 @@ unsigned int IoTI2cInit(unsigned int id, unsigned int baudrate)
unsigned int IoTI2cDeinit(unsigned int id)
{
if (id >= DUET_I2C_NUM)
if (id >= DUET_I2C_NUM) {
return IOT_FAILURE;
}
return duet_i2c_finalize(&g_duet_i2c[id]);
}
unsigned int IoTI2cSetBaudrate(unsigned int id, unsigned int baudrate)
{
if (id >= DUET_I2C_NUM)
if (id >= DUET_I2C_NUM) {
return IOT_FAILURE;
}
if(baudrate >= 1700000)
if (baudrate >= 1700000) {
g_duet_i2c[id].config.freq = I2C_HIGH_SPEED;
else if(baudrate <= 100000)
} else if (baudrate <= 100000) {
g_duet_i2c[id].config.freq = I2C_STANDARD_SPEED;
else
} else {
g_duet_i2c[id].config.freq = I2C_FAST_SPEED;
}
return IOT_SUCCESS;
}
asr582x/liteos_m/sdk/adapter/hals/iot_hardware/wifiiot_lite/hal_iot_pwm.c
+8 -4
View File
@@ -22,8 +22,9 @@ static duet_pwm_dev_t duet_pwm[DUET_PWM_CH_NUM];
unsigned int IoTPwmInit(unsigned int port)
{
if (port >= DUET_PWM_CH_NUM)
if (port >= DUET_PWM_CH_NUM) {
return IOT_FAILURE;
}
duet_pwm[port].port = port;
return duet_pwm_init(&duet_pwm[port]);
@@ -31,16 +32,18 @@ unsigned int IoTPwmInit(unsigned int port)
unsigned int IoTPwmDeinit(unsigned int port)
{
if (port >= DUET_PWM_CH_NUM)
if (port >= DUET_PWM_CH_NUM) {
return IOT_FAILURE;
}
return duet_pwm_finalize(&duet_pwm[port]);
}
unsigned int IoTPwmStart(unsigned int port, unsigned short duty, unsigned int freq)
{
if (port >= DUET_PWM_CH_NUM)
if (port >= DUET_PWM_CH_NUM) {
return IOT_FAILURE;
}
duet_pwm[port].config.freq = freq;
duet_pwm[port].config.duty_cycle = duty;
@@ -49,8 +52,9 @@ unsigned int IoTPwmStart(unsigned int port, unsigned short duty, unsigned int fr
unsigned int IoTPwmStop(unsigned int port)
{
if (port >= DUET_PWM_CH_NUM)
if (port >= DUET_PWM_CH_NUM) {
return IOT_FAILURE;
}
return duet_pwm_stop(&duet_pwm[port]);
}
asr582x/liteos_m/sdk/adapter/hals/iot_hardware/wifiiot_lite/hal_iot_uart.c
+25 -21
View File
@@ -21,8 +21,7 @@
static duet_uart_dev_t uart_config_struct[UART_NUM];
#define HAL_UART_BYTES 256
lega_queue_t hal_uart_queue[UART_NUM];
char * hal_uart_queue_name[UART_NUM] =
{
char *hal_uart_queue_name[UART_NUM] = {
"uart0_buffer_queue",
"uart1_buffer_queue",
"uart2_buffer_queue"
@@ -43,30 +42,32 @@ void hal_uart2_cb(char ch)
lega_rtos_push_to_queue(&hal_uart_queue[UART2_INDEX], &ch, LEGA_NEVER_TIMEOUT);
}
extern set_uart_pinmux(uint8_t uart_idx,uint8_t hw_flow_control);
extern set_uart_pinmux(uint8_t uart_idx, uint8_t hw_flow_control);
unsigned int IoTUartInit(unsigned int id, const IotUartAttribute *param)
{
if (id >= UART_NUM)
if (id >= UART_NUM) {
return IOT_FAILURE;
}
if (NULL == param) {
return IOT_FAILURE;
}
uart_config_struct[id].port = id;
if(id==0)
if (id == 0) {
uart_config_struct[id].priv = (void *)(hal_uart0_cb);
else if(id==1)
} else if (id == 1) {
uart_config_struct[id].priv = (void *)(hal_uart1_cb);
else
} else {
uart_config_struct[id].priv = (void *)(hal_uart2_cb);
}
uart_config_struct[id].config.baud_rate = param->baudRate;
uart_config_struct[id].config.data_width = param->dataBits;
uart_config_struct[id].config.parity = param->parity;
uart_config_struct[id].config.stop_bits = param->stopBits;
set_uart_pinmux(uart_config_struct[id].port,uart_config_struct[id].config.flow_control);
set_uart_pinmux(uart_config_struct[id].port, uart_config_struct[id].config.flow_control);
lega_rtos_init_queue(&hal_uart_queue[id], hal_uart_queue_name[id], sizeof(char), HAL_UART_BYTES);
return duet_uart_init(&uart_config_struct[id]);
@@ -78,14 +79,13 @@ int IoTUartRead(unsigned int id, unsigned char *data, unsigned int dataLen)
uint8_t *pdata = (uint8_t *)data;
int32_t ret;
if (id >= UART_NUM)
if (id >= UART_NUM) {
return IOT_FAILURE;
}
for (i = 0; i < dataLen; i++)
{
for (i = 0; i < dataLen; i++) {
ret = lega_rtos_pop_from_queue(&hal_uart_queue[id], &pdata[i], LEGA_WAIT_FOREVER);
if(ret)
{
if (ret) {
return IOT_FAILURE;
}
}
@@ -95,33 +95,37 @@ int IoTUartRead(unsigned int id, unsigned char *data, unsigned int dataLen)
int IoTUartWrite(unsigned int id, const unsigned char *data, unsigned int dataLen)
{
if (id >= UART_NUM)
if (id >= UART_NUM) {
return IOT_FAILURE;
}
return duet_uart_send(&uart_config_struct[id], data, dataLen, 0);
return duet_uart_send(&uart_config_struct[id], data, dataLen, 0);
}
unsigned int IoTUartDeinit(unsigned int id)
{
if (id >= UART_NUM)
if (id >= UART_NUM) {
return IOT_FAILURE;
}
return duet_uart_finalize(&uart_config_struct[id]);
}
unsigned int IoTUartSetFlowCtrl(unsigned int id, IotFlowCtrl flowCtrl)
{
if (id >= UART_NUM)
if (id >= UART_NUM) {
return IOT_FAILURE;
}
if(flowCtrl == IOT_FLOW_CTRL_NONE)
if (flowCtrl == IOT_FLOW_CTRL_NONE) {
uart_config_struct[id].config.flow_control = FLOW_CTRL_DISABLED;
else if(flowCtrl == IOT_FLOW_CTRL_RTS_CTS)
} else if (flowCtrl == IOT_FLOW_CTRL_RTS_CTS) {
uart_config_struct[id].config.flow_control = FLOW_CTRL_CTS_RTS;
else if(flowCtrl == IOT_FLOW_CTRL_RTS_ONLY)
} else if (flowCtrl == IOT_FLOW_CTRL_RTS_ONLY) {
uart_config_struct[id].config.flow_control = FLOW_CTRL_RTS;
else if(flowCtrl == IOT_FLOW_CTRL_CTS_ONLY)
} else if (flowCtrl == IOT_FLOW_CTRL_CTS_ONLY) {
uart_config_struct[id].config.flow_control = FLOW_CTRL_CTS;
}
return IOT_SUCCESS;
}
asr582x/liteos_m/sdk/adapter/hals/utils/file/src/hal_file.c
+35 -30
View File
@@ -23,22 +23,26 @@
/* not support file system yet, use kv to get/set */
/* just for param xts */
char* duet_kv_key;
int HalFileOpen(const char* path, int oflag, int mode)
char *duet_kv_key;
int HalFileRead(int fd, char *buf, unsigned int len);
int HalFileOpen(const char *path, int oflag, int mode)
{
(void)mode;
int32_t retval = 0;
char temp[128] = {0};
duet_kv_key = path;
if(oflag & O_CREAT_FS)
return 0; //new item
if (oflag & O_CREAT_FS) {
return 0; //new item
}
retval = HalFileRead(0, temp, 128);
if(retval < 0)
if (retval < 0) {
return -1;
else
} else {
return 0;
}
}
int HalFileClose(int fd)
@@ -49,15 +53,15 @@ int HalFileClose(int fd)
int HalFileRead(int fd, char *buf, unsigned int len)
{
int32_t retval = 0;
int templen = len+1;
retval = duet_flash_kv_get(duet_kv_key, (void *)buf, (int32_t*)&templen);
if(retval == KV_ERR_INVALID_PARAM || len<=1)
{
int templen = len + 1;
retval = duet_flash_kv_get(duet_kv_key, (void *)buf, (int32_t *)&templen);
if (retval == KV_ERR_INVALID_PARAM || len <= 1) {
printf("KV_ERR_INVALID_PARAM \n");
return EC_INVALID;
}
if(retval == KV_OK)
return (templen-1);
if (retval == KV_OK) {
return (templen - 1);
}
//printf("kv error %d\n",retval);
return EC_FAILURE;
}
@@ -65,20 +69,21 @@ int HalFileRead(int fd, char *buf, unsigned int len)
int HalFileWrite(int fd, const char *buf, unsigned int len)
{
int32_t retval = 0;
int32_t buflen = strlen(buf)+1;
int32_t buflen = strlen(buf) + 1;
retval = duet_flash_kv_set(duet_kv_key,(void*)buf,buflen,1);
if(retval == KV_ERR_INVALID_PARAM)
{
retval = duet_flash_kv_set(duet_kv_key, (void *)buf, buflen, 1);
if (retval == KV_ERR_INVALID_PARAM) {
printf("KV_ERR_INVALID_PARAM \n");
return EC_INVALID;
}
if(retval == KV_OK)
if (retval == KV_OK) {
return 0;
if(retval == KV_ERR_NO_SPACE)
}
if (retval == KV_ERR_NO_SPACE) {
printf("KV_ERR_NO_SPACE!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!\n");
// return EC_NOSPACE;
printf("kv error %d\n",retval);
}
// return EC_NOSPACE;
printf("kv error %d\n", retval);
return EC_FAILURE;
}
@@ -87,13 +92,13 @@ int HalFileDelete(const char *path)
int32_t retval = 0;
retval = duet_flash_kv_del(path);
if(retval == KV_ERR_INVALID_PARAM)
{
if (retval == KV_ERR_INVALID_PARAM) {
printf("KV_ERR_INVALID_PARAM \n");
return EC_INVALID;
}
if(retval == KV_OK)
if (retval == KV_OK) {
return 0;
}
// printf("kv error %d\n",retval);
return EC_FAILURE;
}
@@ -105,15 +110,15 @@ int HalFileStat(const char *path, unsigned int *fileSize)
int32_t retval = 0;
retval = duet_flash_kv_get(path, (void *)temp, (int32_t*)&len);
if(retval == KV_ERR_INVALID_PARAM || len<=1)
{
printf("kv error %d\n",retval);
*fileSize = 0;
retval = duet_flash_kv_get(path, (void *)temp, (int32_t *)&len);
if (retval == KV_ERR_INVALID_PARAM || len <= 1) {
printf("kv error %d\n", retval);
*fileSize = 0;
}
if(retval == KV_OK)
*fileSize = (len-1);
if (retval == KV_OK) {
*fileSize = (len - 1);
}
return 0;
}
asr582x/liteos_m/sdk/config/board.h
+1 -1
View File
@@ -29,6 +29,6 @@ typedef enum {
PORT_UART_TEMP,
PORT_UART_SIZE,
PORT_UART_INVALID = 255
}PORT_UART_TYPE;
} PORT_UART_TYPE;
#endif //__BOARD__H__
asr582x/liteos_m/sdk/config/partition_conf.c
+100 -50
View File
@@ -22,66 +22,116 @@ extern const duet_logic_partition_t duet_partitions[];
void flash_partition_init(void)
{
hal_partitions[HAL_PARTITION_BOOTLOADER].partition_owner = duet_partitions[PARTITION_BOOTLOADER].partition_owner;
hal_partitions[HAL_PARTITION_BOOTLOADER].partition_description = duet_partitions[PARTITION_BOOTLOADER].partition_description;
hal_partitions[HAL_PARTITION_BOOTLOADER].partition_start_addr = duet_partitions[PARTITION_BOOTLOADER].partition_start_addr;
hal_partitions[HAL_PARTITION_BOOTLOADER].partition_length = duet_partitions[PARTITION_BOOTLOADER].partition_length;
hal_partitions[HAL_PARTITION_BOOTLOADER].partition_options = duet_partitions[PARTITION_BOOTLOADER].partition_options ;
hal_partitions[HAL_PARTITION_BOOTLOADER].partition_owner =
duet_partitions[PARTITION_BOOTLOADER].partition_owner;
hal_partitions[HAL_PARTITION_BOOTLOADER].partition_description =
duet_partitions[PARTITION_BOOTLOADER].partition_description;
hal_partitions[HAL_PARTITION_BOOTLOADER].partition_start_addr =
duet_partitions[PARTITION_BOOTLOADER].partition_start_addr;
hal_partitions[HAL_PARTITION_BOOTLOADER].partition_length =
duet_partitions[PARTITION_BOOTLOADER].partition_length;
hal_partitions[HAL_PARTITION_BOOTLOADER].partition_options =
duet_partitions[PARTITION_BOOTLOADER].partition_options ;
hal_partitions[HAL_PARTITION_PARAMETER_1].partition_owner = duet_partitions[PARTITION_PARAMETER_1].partition_owner;
hal_partitions[HAL_PARTITION_PARAMETER_1].partition_description = duet_partitions[PARTITION_PARAMETER_1].partition_description;
hal_partitions[HAL_PARTITION_PARAMETER_1].partition_start_addr = duet_partitions[PARTITION_PARAMETER_1].partition_start_addr;
hal_partitions[HAL_PARTITION_PARAMETER_1].partition_length = duet_partitions[PARTITION_PARAMETER_1].partition_length;
hal_partitions[HAL_PARTITION_PARAMETER_1].partition_options = duet_partitions[PARTITION_PARAMETER_1].partition_options ;
hal_partitions[HAL_PARTITION_PARAMETER_1].partition_owner =
duet_partitions[PARTITION_PARAMETER_1].partition_owner;
hal_partitions[HAL_PARTITION_PARAMETER_1].partition_description =
duet_partitions[PARTITION_PARAMETER_1].partition_description;
hal_partitions[HAL_PARTITION_PARAMETER_1].partition_start_addr =
duet_partitions[PARTITION_PARAMETER_1].partition_start_addr;
hal_partitions[HAL_PARTITION_PARAMETER_1].partition_length =
duet_partitions[PARTITION_PARAMETER_1].partition_length;
hal_partitions[HAL_PARTITION_PARAMETER_1].partition_options =
duet_partitions[PARTITION_PARAMETER_1].partition_options ;
hal_partitions[HAL_PARTITION_PARAMETER_2].partition_owner = duet_partitions[PARTITION_PARAMETER_2].partition_owner ;
hal_partitions[HAL_PARTITION_PARAMETER_2].partition_description = duet_partitions[PARTITION_PARAMETER_2].partition_description;
hal_partitions[HAL_PARTITION_PARAMETER_2].partition_start_addr = duet_partitions[PARTITION_PARAMETER_2].partition_start_addr;
hal_partitions[HAL_PARTITION_PARAMETER_2].partition_length = duet_partitions[PARTITION_PARAMETER_2].partition_length;
hal_partitions[HAL_PARTITION_PARAMETER_2].partition_options = duet_partitions[PARTITION_PARAMETER_2].partition_options;
hal_partitions[HAL_PARTITION_PARAMETER_2].partition_owner =
duet_partitions[PARTITION_PARAMETER_2].partition_owner ;
hal_partitions[HAL_PARTITION_PARAMETER_2].partition_description =
duet_partitions[PARTITION_PARAMETER_2].partition_description;
hal_partitions[HAL_PARTITION_PARAMETER_2].partition_start_addr =
duet_partitions[PARTITION_PARAMETER_2].partition_start_addr;
hal_partitions[HAL_PARTITION_PARAMETER_2].partition_length =
duet_partitions[PARTITION_PARAMETER_2].partition_length;
hal_partitions[HAL_PARTITION_PARAMETER_2].partition_options =
duet_partitions[PARTITION_PARAMETER_2].partition_options;
hal_partitions[HAL_PARTITION_PARAMETER_3].partition_owner = duet_partitions[PARTITION_PARAMETER_3].partition_owner ;
hal_partitions[HAL_PARTITION_PARAMETER_3].partition_description = duet_partitions[PARTITION_PARAMETER_3].partition_description;
hal_partitions[HAL_PARTITION_PARAMETER_3].partition_start_addr = duet_partitions[PARTITION_PARAMETER_3].partition_start_addr;
hal_partitions[HAL_PARTITION_PARAMETER_3].partition_length = duet_partitions[PARTITION_PARAMETER_3].partition_length;
hal_partitions[HAL_PARTITION_PARAMETER_3].partition_options = duet_partitions[PARTITION_PARAMETER_3].partition_options;
hal_partitions[HAL_PARTITION_PARAMETER_3].partition_owner =
duet_partitions[PARTITION_PARAMETER_3].partition_owner ;
hal_partitions[HAL_PARTITION_PARAMETER_3].partition_description =
duet_partitions[PARTITION_PARAMETER_3].partition_description;
hal_partitions[HAL_PARTITION_PARAMETER_3].partition_start_addr =
duet_partitions[PARTITION_PARAMETER_3].partition_start_addr;
hal_partitions[HAL_PARTITION_PARAMETER_3].partition_length =
duet_partitions[PARTITION_PARAMETER_3].partition_length;
hal_partitions[HAL_PARTITION_PARAMETER_3].partition_options =
duet_partitions[PARTITION_PARAMETER_3].partition_options;
hal_partitions[HAL_PARTITION_PARAMETER_4].partition_owner = duet_partitions[PARTITION_PARAMETER_4].partition_owner ;
hal_partitions[HAL_PARTITION_PARAMETER_4].partition_description = duet_partitions[PARTITION_PARAMETER_4].partition_description;
hal_partitions[HAL_PARTITION_PARAMETER_4].partition_start_addr = duet_partitions[PARTITION_PARAMETER_4].partition_start_addr;
hal_partitions[HAL_PARTITION_PARAMETER_4].partition_length = duet_partitions[PARTITION_PARAMETER_4].partition_length;
hal_partitions[HAL_PARTITION_PARAMETER_4].partition_options = duet_partitions[PARTITION_PARAMETER_4].partition_options;
hal_partitions[HAL_PARTITION_PARAMETER_4].partition_owner =
duet_partitions[PARTITION_PARAMETER_4].partition_owner ;
hal_partitions[HAL_PARTITION_PARAMETER_4].partition_description =
duet_partitions[PARTITION_PARAMETER_4].partition_description;
hal_partitions[HAL_PARTITION_PARAMETER_4].partition_start_addr =
duet_partitions[PARTITION_PARAMETER_4].partition_start_addr;
hal_partitions[HAL_PARTITION_PARAMETER_4].partition_length =
duet_partitions[PARTITION_PARAMETER_4].partition_length;
hal_partitions[HAL_PARTITION_PARAMETER_4].partition_options =
duet_partitions[PARTITION_PARAMETER_4].partition_options;
hal_partitions[HAL_PARTITION_APPLICATION].partition_owner = duet_partitions[PARTITION_APPLICATION].partition_owner;
hal_partitions[HAL_PARTITION_APPLICATION].partition_description = duet_partitions[PARTITION_APPLICATION].partition_description;
hal_partitions[HAL_PARTITION_APPLICATION].partition_start_addr = duet_partitions[PARTITION_APPLICATION].partition_start_addr;
hal_partitions[HAL_PARTITION_APPLICATION].partition_length = duet_partitions[PARTITION_APPLICATION].partition_length;
hal_partitions[HAL_PARTITION_APPLICATION].partition_options = duet_partitions[PARTITION_APPLICATION].partition_options;
hal_partitions[HAL_PARTITION_APPLICATION].partition_owner =
duet_partitions[PARTITION_APPLICATION].partition_owner;
hal_partitions[HAL_PARTITION_APPLICATION].partition_description =
duet_partitions[PARTITION_APPLICATION].partition_description;
hal_partitions[HAL_PARTITION_APPLICATION].partition_start_addr =
duet_partitions[PARTITION_APPLICATION].partition_start_addr;
hal_partitions[HAL_PARTITION_APPLICATION].partition_length =
duet_partitions[PARTITION_APPLICATION].partition_length;
hal_partitions[HAL_PARTITION_APPLICATION].partition_options =
duet_partitions[PARTITION_APPLICATION].partition_options;
hal_partitions[HAL_PARTITION_OTA_TEMP].partition_owner = duet_partitions[PARTITION_OTA_TEMP].partition_owner;
hal_partitions[HAL_PARTITION_OTA_TEMP].partition_description = duet_partitions[PARTITION_OTA_TEMP].partition_description;
hal_partitions[HAL_PARTITION_OTA_TEMP].partition_start_addr = duet_partitions[PARTITION_OTA_TEMP].partition_start_addr;
hal_partitions[HAL_PARTITION_OTA_TEMP].partition_length = duet_partitions[PARTITION_OTA_TEMP].partition_length;
hal_partitions[HAL_PARTITION_OTA_TEMP].partition_options = duet_partitions[PARTITION_OTA_TEMP].partition_options;
hal_partitions[HAL_PARTITION_OTA_TEMP].partition_owner =
duet_partitions[PARTITION_OTA_TEMP].partition_owner;
hal_partitions[HAL_PARTITION_OTA_TEMP].partition_description =
duet_partitions[PARTITION_OTA_TEMP].partition_description;
hal_partitions[HAL_PARTITION_OTA_TEMP].partition_start_addr =
duet_partitions[PARTITION_OTA_TEMP].partition_start_addr;
hal_partitions[HAL_PARTITION_OTA_TEMP].partition_length =
duet_partitions[PARTITION_OTA_TEMP].partition_length;
hal_partitions[HAL_PARTITION_OTA_TEMP].partition_options =
duet_partitions[PARTITION_OTA_TEMP].partition_options;
#ifdef MS_CONFIG_OTA_SUPPORT
hal_partitions[HAL_PARTITION_OTA_MCU].partition_owner = duet_partitions[PARTITION_OTA_MCU].partition_owner;
hal_partitions[HAL_PARTITION_OTA_MCU].partition_description = duet_partitions[PARTITION_OTA_MCU].partition_description;
hal_partitions[HAL_PARTITION_OTA_MCU].partition_start_addr = duet_partitions[PARTITION_OTA_MCU].partition_start_addr;
hal_partitions[HAL_PARTITION_OTA_MCU].partition_length = duet_partitions[PARTITION_OTA_MCU].partition_length;
hal_partitions[HAL_PARTITION_OTA_MCU].partition_options = duet_partitions[PARTITION_OTA_MCU].partition_options ;
hal_partitions[HAL_PARTITION_OTA_MCU].partition_owner =
duet_partitions[PARTITION_OTA_MCU].partition_owner;
hal_partitions[HAL_PARTITION_OTA_MCU].partition_description =
duet_partitions[PARTITION_OTA_MCU].partition_description;
hal_partitions[HAL_PARTITION_OTA_MCU].partition_start_addr =
duet_partitions[PARTITION_OTA_MCU].partition_start_addr;
hal_partitions[HAL_PARTITION_OTA_MCU].partition_length =
duet_partitions[PARTITION_OTA_MCU].partition_length;
hal_partitions[HAL_PARTITION_OTA_MCU].partition_options =
duet_partitions[PARTITION_OTA_MCU].partition_options ;
hal_partitions[HAL_PARTITION_OTA_PARA].partition_owner = duet_partitions[PARTITION_OTA_PARA].partition_owner;
hal_partitions[HAL_PARTITION_OTA_PARA].partition_description = duet_partitions[PARTITION_OTA_PARA].partition_description;
hal_partitions[HAL_PARTITION_OTA_PARA].partition_start_addr = duet_partitions[PARTITION_OTA_PARA].partition_start_addr;
hal_partitions[HAL_PARTITION_OTA_PARA].partition_length = duet_partitions[PARTITION_OTA_PARA].partition_length;
hal_partitions[HAL_PARTITION_OTA_PARA].partition_options = duet_partitions[PARTITION_OTA_PARA].partition_options ;
hal_partitions[HAL_PARTITION_OTA_PARA].partition_owner =
duet_partitions[PARTITION_OTA_PARA].partition_owner;
hal_partitions[HAL_PARTITION_OTA_PARA].partition_description =
duet_partitions[PARTITION_OTA_PARA].partition_description;
hal_partitions[HAL_PARTITION_OTA_PARA].partition_start_addr =
duet_partitions[PARTITION_OTA_PARA].partition_start_addr;
hal_partitions[HAL_PARTITION_OTA_PARA].partition_length =
duet_partitions[PARTITION_OTA_PARA].partition_length;
hal_partitions[HAL_PARTITION_OTA_PARA].partition_options =
duet_partitions[PARTITION_OTA_PARA].partition_options ;
hal_partitions[HAL_PARTITION_OTA_HEAD_PARA].partition_owner = duet_partitions[PARTITION_OTA_HEAD_PARA].partition_owner;
hal_partitions[HAL_PARTITION_OTA_HEAD_PARA].partition_description = duet_partitions[PARTITION_OTA_HEAD_PARA].partition_description;
hal_partitions[HAL_PARTITION_OTA_HEAD_PARA].partition_start_addr = duet_partitions[PARTITION_OTA_HEAD_PARA].partition_start_addr;
hal_partitions[HAL_PARTITION_OTA_HEAD_PARA].partition_length = duet_partitions[PARTITION_OTA_HEAD_PARA].partition_length;
hal_partitions[HAL_PARTITION_OTA_HEAD_PARA].partition_options = duet_partitions[PARTITION_OTA_HEAD_PARA].partition_options ;
hal_partitions[HAL_PARTITION_OTA_HEAD_PARA].partition_owner =
duet_partitions[PARTITION_OTA_HEAD_PARA].partition_owner;
hal_partitions[HAL_PARTITION_OTA_HEAD_PARA].partition_description =
duet_partitions[PARTITION_OTA_HEAD_PARA].partition_description;
hal_partitions[HAL_PARTITION_OTA_HEAD_PARA].partition_start_addr =
duet_partitions[PARTITION_OTA_HEAD_PARA].partition_start_addr;
hal_partitions[HAL_PARTITION_OTA_HEAD_PARA].partition_length =
duet_partitions[PARTITION_OTA_HEAD_PARA].partition_length;
hal_partitions[HAL_PARTITION_OTA_HEAD_PARA].partition_options =
duet_partitions[PARTITION_OTA_HEAD_PARA].partition_options ;
#endif
}
asr582x/liteos_m/sdk/drivers/at_cmd/atcmd_user.c
+1 -2
View File
@@ -42,7 +42,7 @@ void openharmony_init()
#endif
int at_test_1(int argc, char **argv)
{
printf("%s...\n",__func__);
printf("%s...\n", __func__);
return 0;
}
@@ -56,7 +56,6 @@ int at_harmony_xts(int argc, char **argv)
int at_hilink_start(int argc, char **argv)
{
// hilink_main_wrap();
return 0;
}
asr582x/liteos_m/sdk/drivers/at_cmd/atcmdplus_ble.c
+36 -69
View File
@@ -29,11 +29,11 @@
****************************************************************************************
*/
#include "atcmdplus_ble.h"
#include "lega_at_api.h"
#include <stdio.h>
#include <stdlib.h>
#include <math.h>
#include <string.h>
#include "lega_at_api.h"
#include "app.h"
#include "sonata_gap.h"
#include "sonata_gatt_api.h"
@@ -57,20 +57,13 @@ uint8_t char2HexValue(char ch)
{
uint8_t result = 0;
if (ch >= '0' && ch <= '9')
{
if (ch >= '0' && ch <= '9') {
result = ch - '0';
}
else if (ch >= 'a' && ch <= 'z')
{
} else if (ch >= 'a' && ch <= 'z') {
result = (ch - 'a') + 10;
}
else if (ch >= 'A' && ch <= 'Z')
{
} else if (ch >= 'A' && ch <= 'Z') {
result = (ch - 'A') + 10;
}
else
{
} else {
result = -1;
}
return result;
@@ -86,8 +79,7 @@ void hexValue2Char(uint8_t value, uint8_t *chars)
void macChar2Value(uint8_t *chars, uint8_t *mac, bool colon)
{
uint8_t d0, d1, d2, d3, d4, d5;
if (colon)
{
if (colon) {
d0 = char2HexValue(chars[0]) * 16 + char2HexValue(chars[1]);
d1 = char2HexValue(chars[3]) * 16 + char2HexValue(chars[4]);
d2 = char2HexValue(chars[6]) * 16 + char2HexValue(chars[7]);
@@ -100,9 +92,7 @@ void macChar2Value(uint8_t *chars, uint8_t *mac, bool colon)
mac[3] = d2;
mac[4] = d1;
mac[5] = d0;
}
else
{
} else {
d0 = char2HexValue(chars[0]) * 16 + char2HexValue(chars[1]);
d1 = char2HexValue(chars[2]) * 16 + char2HexValue(chars[3]);
d2 = char2HexValue(chars[4]) * 16 + char2HexValue(chars[5]);
@@ -120,8 +110,7 @@ void macChar2Value(uint8_t *chars, uint8_t *mac, bool colon)
uint8_t macValue2Char(uint8_t *mac, uint8_t *chars, bool colon)
{
if (colon)
{
if (colon) {
hexValue2Char(mac[5], &chars[0]);
chars[2] = ':';
hexValue2Char(mac[4], &chars[3]);
@@ -134,9 +123,7 @@ uint8_t macValue2Char(uint8_t *mac, uint8_t *chars, bool colon)
chars[14] = ':';
hexValue2Char(mac[0], &chars[15]);
return 17;
}
else
{
} else {
hexValue2Char(mac[5], &chars[0]);
hexValue2Char(mac[4], &chars[2]);
hexValue2Char(mac[3], &chars[4]);
@@ -149,26 +136,21 @@ uint8_t macValue2Char(uint8_t *mac, uint8_t *chars, bool colon)
void apcmdplue_print_command(int argc, char **argv)
{
APP_TRC("-------------------[%d]\r\n",argc);
if (argc > 0)
{
APP_TRC(" P0:%s\r\n",argv[PARA_ID_0]);
APP_TRC("-------------------[%d]\r\n", argc);
if (argc > 0) {
APP_TRC(" P0:%s\r\n", argv[PARA_ID_0]);
}
if (argc > 1)
{
APP_TRC(" P1:%s\r\n",argv[PARA_ID_1]);
if (argc > 1) {
APP_TRC(" P1:%s\r\n", argv[PARA_ID_1]);
}
if (argc > 2)
{
APP_TRC(" P2:%s\r\n",argv[PARA_ID_2]);
if (argc > 2) {
APP_TRC(" P2:%s\r\n", argv[PARA_ID_2]);
}
if (argc > 3)
{
APP_TRC(" P3:%s\r\n",argv[PARA_ID_3]);
if (argc > 3) {
APP_TRC(" P3:%s\r\n", argv[PARA_ID_3]);
}
if (argc > 4)
{
APP_TRC(" P4:%s\r\n",argv[PARA_ID_4]);
if (argc > 4) {
APP_TRC(" P4:%s\r\n", argv[PARA_ID_4]);
}
APP_TRC("-------------------\r\n");
@@ -179,12 +161,9 @@ void apcmdplue_print_command(int argc, char **argv)
int atcmdplus_adv(int argc, char **argv)
{
apcmdplue_print_command(argc, argv);
if (strcmp(argv[PARA_ID_1], "1") == 0 )
{
if (strcmp(argv[PARA_ID_1], "1") == 0 ) {
app_ble_config_legacy_advertising();
}
else if (strcmp(argv[PARA_ID_1], "0") == 0)
{
} else if (strcmp(argv[PARA_ID_1], "0") == 0) {
app_ble_advertising_stop(0);
}
return CONFIG_OK;
@@ -193,13 +172,10 @@ int atcmdplus_adv(int argc, char **argv)
int atcmdplus_scan(int argc, char **argv)
{
apcmdplue_print_command(argc, argv);
if (strcmp(argv[PARA_ID_1], "1") == 0 )
{
if (strcmp(argv[PARA_ID_1], "1") == 0 ) {
app_ble_config_scanning();
}
else if (strcmp(argv[PARA_ID_1], "0") == 0)
{
app_ble_stop_scanning(0);
} else if (strcmp(argv[PARA_ID_1], "0") == 0) {
app_ble_stop_scanning();
}
return CONFIG_OK;
}
@@ -207,13 +183,12 @@ int atcmdplus_scan(int argc, char **argv)
int atcmdplus_conn(int argc, char **argv)
{
apcmdplue_print_command(argc, argv);
if (argc != 2)
{
if (argc != 2) {
return PARAM_RANGE;
}
uint8_t targetAddr[SONATA_GAP_BD_ADDR_LEN] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
macChar2Value((uint8_t*)argv[PARA_ID_1], targetAddr, false);
macChar2Value((uint8_t *)argv[PARA_ID_1], targetAddr, false);
app_ble_set_target_address(targetAddr);
app_ble_config_initiating();
@@ -258,7 +233,7 @@ int atcmdplus_lesend(int argc, char **argv)
uint8_t conidx = char2HexValue(argv[PARA_ID_1][0]);
uint16_t dataLen = char2HexValue(argv[PARA_ID_2][0]); //Todo only support 1 char now.
uint8_t *data = (uint8_t*)argv[PARA_ID_3];
uint8_t *data = (uint8_t *)argv[PARA_ID_3];
app_ble_master_write_data(conidx, dataLen, data);
return CONFIG_OK;
}
@@ -268,18 +243,14 @@ int atcmdplus_ntf(int argc, char **argv)
{
apcmdplue_print_command(argc, argv);
app_uuids *uuids = app_ble_get_uuids();
if (uuids->service == 0)
{
if (uuids->service == 0) {
return PARAM_RANGE;
}
uint8_t idValue = *argv[PARA_ID_1] - '0';
if (strcmp(argv[PARA_ID_2], "1") == 0 )
{
if (strcmp(argv[PARA_ID_2], "1") == 0 ) {
app_ble_master_turn_ntf(idValue, true);
}
else if (strcmp(argv[PARA_ID_2], "0") == 0)
{
} else if (strcmp(argv[PARA_ID_2], "0") == 0) {
app_ble_master_turn_ntf(idValue, false);
}
return CONFIG_OK;
@@ -300,10 +271,8 @@ int atcmdplus_chinfo(int argc, char **argv)
apcmdplue_print_command(argc, argv);
actives *act = app_get_active();
uint8_t out[50] = {0};
for (int i = 0; i < APP_ACTIVE_MAX; ++i)
{
if (act[i].runing == true)
{
for (int i = 0; i < APP_ACTIVE_MAX; ++i) {
if (act[i].runing == true) {
uint8_t offset = 0;
offset = macValue2Char(act[i].peer, &out[0], true);
out[offset] = ',';
@@ -314,8 +283,7 @@ int atcmdplus_chinfo(int argc, char **argv)
offset += 1;
out[offset] = '3';
offset += 1;
for (int i = 0; i < offset; ++i)
{
for (int i = 0; i < offset; ++i) {
printf("%c", out[i]);
}
printf("\r\n");
@@ -332,7 +300,7 @@ int atcmdplus_test(int argc, char **argv)
}
#if (LOSCFG_USE_SHELL == 1)
#include "shell.h"
#include "shell.h"
#include "shcmd.h"
#include "target_config.h"
#endif
@@ -353,9 +321,8 @@ void atcmdplus_ble_register(void)
osCmdReg(CMD_TYPE_STD, "le_lesend", 0, (CMD_CBK_FUNC)atcmdplus_lesend);
osCmdReg(CMD_TYPE_STD, "le_ntf", 0, (CMD_CBK_FUNC)atcmdplus_ntf);
osCmdReg(CMD_TYPE_STD, "le_ledisc", 0, (CMD_CBK_FUNC)atcmdplus_ledisc);
osCmdReg(CMD_TYPE_STD, "le_chinfo", 0, (CMD_CBK_FUNC)atcmdplus_chinfo);
osCmdReg(CMD_TYPE_STD, "le_chinfo", 0, (CMD_CBK_FUNC)atcmdplus_chinfo);
#endif
}
asr582x/liteos_m/sdk/drivers/at_cmd/lega_at_api.h
+11 -14
View File
@@ -51,7 +51,7 @@ typedef struct _cmd_entry {
char *name;
int (*function)(int, char **);
char *help;
}cmd_entry;
} cmd_entry;
#define AT_MAX_COMMANDS 90
struct cli_cmd_t {
@@ -59,8 +59,7 @@ struct cli_cmd_t {
cmd_entry *cmds[AT_MAX_COMMANDS];
};
typedef struct
{
typedef struct {
uint8_t uart_echo; /* echo uart input info log */
uint8_t max_txpwr; /* max tx power for both sta and softap */
uint8_t flag_sap; /* flag of user set softap ip config */
@@ -80,10 +79,9 @@ typedef struct
char sapmask[16]; /* Netmask on the target wlan interface for softap mode, ASCII */
char start_ip[16]; /* start ip addr of dhcp pool in softap mode */
char end_ip[16]; /* end ip addr of dhcp pool in softap mode */
}_at_user_info;
} _at_user_info;
typedef enum
{
typedef enum {
CONFIG_OK, /* indicate at cmd set success and response OK */
PARAM_RANGE, /* indicate some at cmd param is out of range */
PARAM_MISS, /* indicate at cmd param is less than needed count */
@@ -92,8 +90,8 @@ typedef enum
CONN_EAPOL_FAIL, /* indicate 4-way handshake failed in station mode */
CONN_DHCP_FAIL, /* indicate got ip by dhcp failed in station mode */
WAIT_PEER_RSP,
RSP_NULL=0xFF
}lega_at_rsp_status_t;
RSP_NULL = 0xFF
} lega_at_rsp_status_t;
typedef struct {
char *command; /*at cmd string*/
@@ -101,12 +99,11 @@ typedef struct {
} lega_at_cmd_entry;
#ifdef CFG_SDIO_SUPPORT
typedef void (*lega_at_sdio_host_tx_hdlr)(uint8_t * data, uint32_t data_len);
typedef struct
{
typedef void (*lega_at_sdio_host_tx_hdlr)(uint8_t *data, uint32_t data_len);
typedef struct {
uint32_t sdio_data_len;
uint32_t p_sdio_at_cmd;
}at_msg_t;
} at_msg_t;
#endif
/** @brief register user at cmd.
@@ -120,7 +117,7 @@ void lega_at_cmd_register(cmd_entry *cmd);
* @return 0 : on success.
* @return other : error occurred
*/
int lega_at_init(const char* task_name,uint8_t task_pri,uint32_t task_stack_size);
int lega_at_init(const char *task_name, uint8_t task_pri, uint32_t task_stack_size);
/** @brief at deinit functin, user should call it when donot use at any more, to free resources
* @return 0 : on success.
@@ -157,7 +154,7 @@ void lega_at_response(lega_at_rsp_status_t status);
extern char at_dbgflg;
#ifdef PRINTF2_SUPPORT
extern int printf2(const char* format, ...);
extern int printf2(const char *format, ...);
#else
#define printf2 printf
#endif
asr582x/liteos_m/sdk/drivers/ble_inc/app.h
+65 -79
View File
@@ -44,6 +44,7 @@
#include "sonata_ble_hook.h"
#include "msm_ble_api.h"
#include "sonata_gap.h"
#include "sonata_gap_api.h"
@@ -89,21 +90,19 @@
#define KEY_LEN 0x10
enum app_connect_state
{
enum app_connect_state {
///Connection succeeded
APP_STATE_CONNECTED = 0,
/// Link is disconnected
APP_STATE_DISCONNECTED,
};
typedef enum
{
typedef enum {
APP_DISCONNECTED,
APP_CONNECTED,
APP_BONDING,
APP_BONDED,
}bound_conn_state;
} bound_conn_state;
/*
@@ -112,118 +111,103 @@ typedef enum
*/
/// Long Term Key information
typedef struct app_sonata_gap_ltk
{
typedef struct app_sonata_gap_ltk {
/// Long Term Key
uint8_t ltk[APP_GAP_KEY_LEN];
/// Encryption Diversifier
uint16_t ediv;
/// Random Number
uint8_t randnb[APP_GAP_RAND_NB_LEN];
}app_sonata_gap_ltk_t;
} app_sonata_gap_ltk_t;
/// Short Term Key information
typedef struct app_sonata_gap_irk
{
typedef struct app_sonata_gap_irk {
/// Short Term Key
uint8_t irk[APP_GAP_KEY_LEN];
/// irk addr
uint8_t irk_addr[APP_BD_ADDR_LEN];
}app_sonata_gap_irk_t;
} app_sonata_gap_irk_t;
typedef struct bonded_dev_info
{
typedef struct bonded_dev_info {
uint8_t peer_addr[APP_BD_ADDR_LEN];
app_sonata_gap_ltk_t ltk;
uint8_t ltk_in[APP_GAP_KEY_LEN];
app_sonata_gap_irk_t irk;
uint8_t periph_bond;
}bonded_dev_info_t;
} bonded_dev_info_t;
typedef struct bonded_dev_info_list
{
typedef struct bonded_dev_info_list {
uint8_t total_dev;
uint8_t current_dev_index;
bonded_dev_info_t bonded_device_info[MAX_BONDED_DEV_NUM];
}bonded_dev_info_list_t;
} bonded_dev_info_list_t;
typedef struct peer_conn_param
{
typedef struct peer_conn_param {
/// Connection interval maximum
uint16_t intv_max;
/// Latency
uint16_t latency;
/// Supervision timeout
uint16_t time_out;
}peer_conn_param_t;
} peer_conn_param_t;
typedef struct connect_req_info
{
typedef struct connect_req_info {
uint8_t conidx;
uint8_t bd_addr[APP_BD_ADDR_LEN];
}connect_req_info_t;
} connect_req_info_t;
typedef struct adv_idx_info
{
typedef struct adv_idx_info {
uint8_t local_idx;
uint8_t adv_id;
}adv_idx_info_t;
} adv_idx_info_t;
typedef struct
{
uint8_t advdata[31];
uint8_t advdataLen;
typedef struct {
uint8_t advdata[31];
uint8_t advdataLen;
} ble_adv_data_set_t;
typedef struct
{
uint8_t respdata[31];
uint8_t respdataLen;
typedef struct {
uint8_t respdata[31];
uint8_t respdataLen;
} ble_scan_data_set_t;
typedef struct
{
typedef struct {
int status;
int len;
int handler;
uint8_t uuid[APP_UUID_LEN];
}app_reg_service_cmp_t;
} app_reg_service_cmp_t;
typedef struct
{
typedef struct {
int connId;
uint8_t addr[APP_BD_ADDR_LEN];
}app_connect_status_ind_t;
} app_connect_status_ind_t;
typedef struct
{
typedef struct {
int connId;
int status;
}app_ind_sent_ind_t;
} app_ind_sent_ind_t;
typedef struct
{
typedef struct {
int connId;
int mtu;
}app_mtu_change_ind_t;
} app_mtu_change_ind_t;
typedef struct
{
typedef struct {
int advId;
int status;
}app_adv_status_ind_t;
} app_adv_status_ind_t;
/**
* @brief enum core evt indicate type
*/
typedef enum
{
typedef enum {
BLE_SERVICE_ADD_CMP,
BLE_DEV_CONNECTED,
BLE_DEV_DISCONNECTED,
@@ -231,7 +215,7 @@ typedef enum
BLE_MTU_CHANGE,
BLE_ADV_START,
BLE_ADV_STOP,
}app_core_evt_ind_t;
} app_core_evt_ind_t;
/*
* GLOBAL VARIABLE DECLARATION
@@ -240,36 +224,34 @@ typedef enum
extern sonata_ble_hook_t app_hook;
///app Core Event indicate Callback
typedef int (*app_core_evt_ind_cb)(app_core_evt_ind_t evt ,void * p_param);
typedef int (*app_core_evt_ind_cb)(app_core_evt_ind_t evt, void *p_param);
///
typedef int (*app_sec_req_cb)(uint8_t * addr);
typedef int (*app_sec_req_cb)(uint8_t *addr);
typedef enum
{
USER_INVALID_MODULE_ID ,
USER_MIDEA_MODULE_ID ,
USER_OHOS_MODULE_ID ,
typedef enum {
USER_INVALID_MODULE_ID,
USER_MIDEA_MODULE_ID,
USER_OHOS_MODULE_ID,
USER_MAX_MODULE_ID
}ble_stack_opr_module_id_t;
} ble_stack_opr_module_id_t;
#define APP_ACTIVE_MAX 5
typedef struct app_uuid_t{
typedef struct app_uuid_t {
uint16_t service;
uint16_t read;
uint16_t write;
uint16_t ntf;
}app_uuids;
typedef struct actives_t{
} app_uuids;
typedef struct actives_t {
uint8_t assign_id ;
uint8_t type;//A0:Adv A1:Scan A2:Peer
bool runing;
uint8_t peer[SONATA_GAP_BD_ADDR_LEN];
uint8_t name[20];
}actives;
typedef struct app_env_t{
} actives;
typedef struct app_env_t {
uint8_t gAppStatus;
uint16_t attrHandle;
@@ -278,7 +260,7 @@ typedef struct app_env_t{
uint16_t targetNtfHandle;
app_uuids appUuids;
actives act[APP_ACTIVE_MAX];
}app_env;
} app_env;
/*
* FUNCTION DECLARATIONS
****************************************************************************************
@@ -290,18 +272,18 @@ typedef struct app_env_t{
****************************************************************************************
*/
void app_init(void);
void app_ble_config_legacy_advertising();
void app_ble_config_scanning();
void app_ble_config_initiating();
void app_ble_stop_scanning();
void app_ble_config_legacy_advertising(void);
void app_ble_config_scanning(void);
void app_ble_config_initiating(void);
void app_ble_stop_scanning(void);
uint8_t app_get_adv_status();
uint8_t app_get_adv_status(void);
uint8_t app_get_connect_status(void);
uint16_t app_ble_start_advertising(uint8_t adv_id);
bool app_is_ble_test_mode(void);
void app_set_ble_test_mode(bool mode);
uint16_t app_ble_advertising_stop(uint8_t adv_id);
int app_ble_advertising_start(uint8_t *adv_id,ble_adv_data_set_t *data,ble_scan_data_set_t *scan_data);
int app_ble_advertising_start(uint8_t *adv_id, ble_adv_data_set_t *data, ble_scan_data_set_t *scan_data);
void app_gap_set_scan_cb(app_ble_scan_callback_t cb);
int app_ble_stack_stop(ble_stack_opr_module_id_t module);
int app_ble_stack_start(ble_stack_opr_module_id_t module);
@@ -310,21 +292,25 @@ int app_set_security_io_cap(uint8_t cap);
int app_ble_disconnect_by_addr(uint8_t *addr);
int app_ble_disable_service_by_handler(uint16_t start_hdl);
void app_register_core_evt_ind(app_core_evt_ind_cb cb);
void app_gap_notify_pair_request_rsp(uint8_t *bd_addr,uint8_t accept);
void app_gap_notify_pair_request_rsp(uint8_t *bd_addr, uint8_t accept);
void app_register_sec_cb(app_sec_req_cb cb);
int app_set_security_auth_req(uint8_t auth_req);
void app_set_connect_flag(uint8_t vaule);
void app_gap_connect_confirm(uint8_t *addr, uint8_t auth);
void app_ble_gatt_data_send_notify(uint16_t local_handle,uint16_t idx, uint16_t length, uint8_t *p_value);
void app_ble_gatt_data_send_notify(uint16_t local_handle, uint16_t idx, uint16_t length, uint8_t *p_value);
uint16_t app_ble_stop_adv_without_id(void);
void app_ble_set_target_address(uint8_t * target);
void app_ble_set_uuids(uint16_t service,uint16_t read,uint16_t write,uint16_t ntf);
void app_ble_set_target_address(uint8_t *target);
void app_ble_set_uuids(uint16_t service, uint16_t read, uint16_t write, uint16_t ntf);
bool app_ble_master_write_data(uint8_t conidx, uint16_t length, uint8_t *data);
bool app_ble_master_read_data(uint8_t conidx, uint16_t length, uint8_t *data);
bool app_ble_master_turn_ntf(uint8_t conidx, bool on);
app_uuids * app_ble_get_uuids();
app_uuids *app_ble_get_uuids(void);
void app_ble_disconnect(uint8_t conidx);
actives *app_get_active();
actives *app_get_active(void);
void app_ble_set_test_write_uuid(uint8_t *uuid);
void app_ble_set_test_read_uuid(uint8_t *uuid);
void app_ble_start_advertising_with_param(sonata_gap_directed_adv_create_param_t *param, ble_adv_data_set_t *data,
ble_scan_data_set_t *scan_data, uint8_t own_addr_type, uint16_t duration, uint8_t max_adv_evt);
/// @} APP
asr582x/liteos_m/sdk/drivers/ble_inc/arch.h
+12 -16
View File
@@ -35,9 +35,7 @@
*/
#include <stdint.h> // standard integer definition
#include <stdio.h>
#include "compiler.h" // inline functions
#include "sonata_stack_config.h"
//#include "sonata.h"
/*
@@ -50,7 +48,6 @@
#else
#define CRITICAL_FUNC_SEG
#endif //CFG_SEG
#define _CRITICAL_FUNC_SEG
/// ARM is a 32-bit CPU
#define CPU_WORD_SIZE 4
@@ -77,7 +74,7 @@
#define BLE_ROM 1
#else
#define BLE_ROM 0
#endif //
#endif
/// Possible errors detected by FW
#define RESET_NO_ERROR 0x00000000
@@ -172,7 +169,7 @@ void assert_warn(uint16_t id, int param0, int param1);
* @param length data size to dump
****************************************************************************************
*/
void dump_data(uint8_t* data, uint16_t length);
void dump_data(uint8_t *data, uint16_t length);
@@ -205,7 +202,7 @@ extern void (*pf_sonata_assert_warn)(uint16_t id, int param0, int param1);
if (!(cond)) { \
if(pf_sonata_assert_param) \
{ \
pf_sonata_assert_param(id, (int)param0, (int)param1); \
pf_sonata_assert_param(id, (int)(param0), (int)(param1)); \
} \
} \
} while(0)
@@ -213,19 +210,19 @@ extern void (*pf_sonata_assert_warn)(uint16_t id, int param0, int param1);
/// Assertions showing a non-critical problem that has to be fixed by the SW
#define ASSERT_WARN(id, cond, param0, param1) \
do { \
if (!(cond)) { \
if(pf_sonata_assert_warn) \
{ \
pf_sonata_assert_warn(id, (int)param0, (int)param1); \
} \
} \
} while(0)
do { \
if (!(cond)) { \
if(pf_sonata_assert_warn) \
{ \
pf_sonata_assert_warn(id, (int)(param0), (int)(param1)); \
} \
} \
} while(0)
// modified for rom code 20200224
#define DUMP_DATA(data, length) \
dump_data((uint8_t*)data, length)
dump_data((uint8_t*)(data), length)
#else
/// Assertions showing a critical error that could require a full system reset
@@ -244,7 +241,6 @@ extern void (*pf_sonata_assert_warn)(uint16_t id, int param0, int param1);
// required to define GLOBAL_INT_** macros as inline assembly. This file is included after
// definition of ASSERT macros as they are used inside ll.h
//#include "ll.h" // ll definitions
#ifdef SONATA_RTOS_SUPPORT
asr582x/liteos_m/sdk/drivers/ble_inc/at_api.h
+8 -11
View File
@@ -38,10 +38,9 @@ typedef struct _cmd_entry {
char *name;
int (*function)(int, char **);
char *help;
}cmd_entry;
} cmd_entry;
typedef struct
{
typedef struct {
uint8_t uart_echo; /* echo uart input info log */
uint8_t max_txpwr; /* max tx power for both sta and softap */
uint8_t flag_sap; /* flag of user set softap ip config */
@@ -54,10 +53,9 @@ typedef struct
char ip[16]; /* Local IP address on the target wlan interface, ASCII*/
char gw[16]; /* Router IP address on the target wlan interface, ASCII */
char mask[16]; /* Netmask on the target wlan interface, ASCII*/
}at_user_info_s;
} at_user_info_s;
typedef enum
{
typedef enum {
CONFIG_OK, /* indicate at cmd set success and response OK */
PARAM_RANGE, /* indicate some at cmd param is out of range */
PARAM_MISS, /* indicate at cmd param is less than needed count */
@@ -65,8 +63,8 @@ typedef enum
CONN_TIMEOUT, /* indicate connect timeout in station mode */
CONN_EAPOL_FAIL, /* indicate 4-way handshake failed in station mode */
CONN_DHCP_FAIL, /* indicate got ip by dhcp failed in station mode */
RSP_NULL=0xFF
}at_rsp_status_t;
RSP_NULL = 0xFF
} at_rsp_status_t;
typedef struct {
char *command; /*at cmd string*/
@@ -85,7 +83,7 @@ void at_cmd_register( const cmd_entry *cmd);
* @return 0 : on success.
* @return other : error occurred
*/
int lega_at_init(const char* task_name,uint8_t task_pri,uint32_t task_stack_size);
int lega_at_init(const char *task_name, uint8_t task_pri, uint32_t task_stack_size);
/** @brief at deinit functin, user should call it when donot use at any more, to free resources
* @return 0 : on success.
@@ -99,7 +97,6 @@ void at_handle_uartirq(char ch);
/** @brief uart handle for receiving at command.
*/
//extern lega_uart_dev_t lega_at_uart;
/** @brief at register init functin, register all support cmd and user register cmd
*/
@@ -115,7 +112,7 @@ void at_gattc_cmd_register(void);
/** @brief at response, OK indicate success, others indicate failed.
*/
void at_response(at_rsp_status_t status);
extern int at_printf(const char* format, ...);
extern int at_printf(const char *format, ...);
extern char at_dbgflg;
asr582x/liteos_m/sdk/drivers/ble_inc/msm_ble_api.h
+23 -37
View File
@@ -21,7 +21,6 @@
#include "sonata_gatt_api.h"
#define BLE_APP_FRAME_DATA_MAX_LENGTH 300
//#define ATT_UUID_128_LEN 16
/*
@@ -79,8 +78,7 @@
#define MAX_SERVICE_NUM 10
enum BLE_ADV_STATE
{
enum BLE_ADV_STATE {
/// Advertising activity does not exists
BLE_ADV_STATE_IDLE = 0,
/// Creating advertising activity
@@ -99,28 +97,24 @@ enum BLE_ADV_STATE
BLE_ADV_STATE_STOPPING,
};
typedef enum
{
typedef enum {
BLE_ENABLE_ADV,
BLE_DISABLE_ADV,
} ble_adv_enable;
typedef enum
{
typedef enum {
BLE_GATTC_INDICATE,
BLE_GATTC_NOTIFY,
} ble_att_op_t;
typedef enum
{
typedef enum {
BLE_STATUS_SUCCESS,
BLE_STATUS_INVALID_PARAM,
BLE_STATUS_DISCONNETED,
BLE_STATUS_FAILED,
} ble_status_t;
typedef struct BLE_ADV_PARAM_T
{
typedef struct BLE_ADV_PARAM_T {
uint16_t advertising_interval_min;
uint16_t advertising_interval_max;
uint8_t advertising_type;
@@ -129,69 +123,61 @@ typedef struct BLE_ADV_PARAM_T
uint8_t advertising_filter_policy;
} ble_adv_param_t;
typedef struct BLE_ADV_DATA_T
{
uint8_t ble_advdata[32]; /*!< ??????*/
typedef struct BLE_ADV_DATA_T {
uint8_t ble_advdata[32]; /*!< ??????*/
uint8_t ble_advdataLen; /*!< ??????*/
} ble_adv_data_t;
typedef struct BLE_SCAN_DATA_T
{
typedef struct BLE_SCAN_DATA_T {
uint8_t ble_respdata[32]; /*!< ??????????*/
uint8_t ble_respdataLen; /*!< ??????????*/
} ble_scan_data_t;
typedef struct BLE_CMD_DISCONNECT_T
{
typedef struct BLE_CMD_DISCONNECT_T {
uint8_t link_id;
uint8_t reason;
} ble_cmd_disconnect_t;
typedef struct BLE_VALUE_NOTIFICATION_INDICATION_T
{
typedef struct BLE_VALUE_NOTIFICATION_INDICATION_T {
uint8_t att_operation;
uint16_t att_handle;
uint16_t att_length;
uint8_t att_value[BLE_APP_FRAME_DATA_MAX_LENGTH];
}ble_value_notification_indication_t;
} ble_value_notification_indication_t;
typedef struct BLE_ADV_ENABLE_T
{
typedef struct BLE_ADV_ENABLE_T {
uint8_t advertising_enable;
} ble_adv_enable_t;
typedef enum MS_BLE_STACK_EVENT_T
{
typedef enum MS_BLE_STACK_EVENT_T {
MS_BLE_STACK_EVENT_STACK_READY = 0,
MS_BLE_STACK_EVENT_STACK_FAIL,
MS_BLE_STACK_EVENT_ADV_ON, /*!< ������رչ㲥ִ�гɹ�*/
MS_BLE_STACK_EVENT_ADV_OFF, /*!< ������رչ㲥ִ�гɹ�*/
MS_BLE_STACK_EVENT_ADV_ON, /*!< ???????????г??*/
MS_BLE_STACK_EVENT_ADV_OFF, /*!< ???????????г??*/
MS_BLE_STACK_EVENT_DISCONNECT, /*!< ??????*/
MS_BLE_STACK_EVENT_CONNECTED, /*!< ??????*/
} ms_ble_stack_event_t;
typedef void (*ble_gatt_service_att_wirte_cb)(uint8_t *data, uint16_t size);
typedef void (*ble_gatt_service_att_read_cb)(uint8_t *data, uint16_t* size);
typedef void (*ble_gatt_service_att_read_cb)(uint8_t *data, uint16_t *size);
typedef void (*ble_gatt_service_att_ind_cb)(uint8_t *data, uint16_t size);
typedef struct ble_gatt_att_opr
{
typedef struct ble_gatt_att_opr {
ble_gatt_service_att_wirte_cb write_request;
ble_gatt_service_att_read_cb read_request;
ble_gatt_service_att_ind_cb ind_cb;
}ble_gatt_att_opr_t;
} ble_gatt_att_opr_t;
typedef struct ble_gatt_att_reg
{
typedef struct ble_gatt_att_reg {
sonata_gatt_att_desc_t att_desc;
ble_gatt_att_opr_t att_opr;
}ble_gatt_att_reg_t;
} ble_gatt_att_reg_t;
typedef void (*cb_fun)(ms_ble_stack_event_t);
@@ -202,7 +188,7 @@ extern cb_fun ble_cb_fun;
void ble_set_callback(cb_fun cb);
int ble_gatt_add_svc_helper(uint16_t *start_hdl, uint8_t nb_att, ble_gatt_att_reg_t *atts);
void ble_gatt_data_send(uint16_t local_handle,uint16_t idx, uint16_t length, uint8_t *p_value);
void ble_gatt_data_send(uint16_t local_handle, uint16_t idx, uint16_t length, uint8_t *p_value);
uint8_t ble_get_connect_status(void);
uint8_t ble_disconnect_request(void);
uint8_t ble_get_adv_status(void);
@@ -211,10 +197,10 @@ void ble_set_max_mtu(uint16_t mtu);
uint16_t ble_get_mtu(void);
void ble_stop_adv(void);
void ble_gatt_add_srv_rsp(uint16_t handle);
void ble_gatt_read_request_handler(uint8_t connection_id, uint16_t handle,uint16_t* p_length, uint8_t **p_value);
void ble_gatt_read_request_handler(uint8_t connection_id, uint16_t handle, uint16_t *p_length, uint8_t **p_value);
void ble_gatt_write_request_handler(uint8_t connection_id, uint16_t handle, uint16_t length, uint8_t *p_value);
int ble_scan_start(app_ble_scan_callback_t cb);
int ble_scan_stop(void);
int ms_add_test_service(void);
#endif
asr582x/liteos_m/sdk/drivers/ble_inc/ohos_bt_gatt_server.h
+1 -1
View File
@@ -79,7 +79,7 @@ typedef void (*IncludeServiceAddCallback)(int status, int serverId, int srvcHand
/* Callback invoked when a characteristic has been added to a service */
typedef void (*CharacteristicAddCallback)(int status, int serverId, BtUuid *uuid,
int srvcHandle, int characteristicHandle);
int srvcHandle, int characteristicHandle);
/* Callback invoked when a descriptor has been added to a characteristic */
typedef void (*DescriptorAddCallback)(int status, int serverId, BtUuid *uuid,
asr582x/liteos_m/sdk/drivers/ble_inc/sonata_api_task.h
+5 -9
View File
@@ -55,8 +55,7 @@
****************************************************************************************
*/
/// states of asr api task
typedef enum
{
typedef enum {
/// initialization state
SONATA_API_TASK_INIT,
/// idle state
@@ -71,8 +70,7 @@ typedef enum
/// asr api task messages
typedef enum
{
typedef enum {
SONATA_API_DUMMY_MSG = STACK_TASK_FIRST_MSG(SONATA_TASK_ID_APP),
/// message from application
SONATA_API_APP_MSG,
@@ -86,19 +84,17 @@ typedef enum
****************************************************************************************
*/
/// Structure containing information about the handlers for an application subtask
typedef struct sonata_api_subtask_handlers
{
typedef struct sonata_api_subtask_handlers {
/// Pointer to the message handler table
const struct ke_msg_handler *p_msg_handler_tab;
/// Number of messages handled
uint16_t msg_cnt;
} sonata_api_subtask_handlers_t;
typedef struct sonata_app_timer_callback
{
typedef struct sonata_app_timer_callback {
uint8_t (*timeout)(uint16_t id);
}sonata_app_timer_callback_t;
} sonata_app_timer_callback_t;
/*
* FUNCTION DECLARATIONS
****************************************************************************************
asr582x/liteos_m/sdk/drivers/ble_inc/sonata_att.h
+21 -39
View File
@@ -146,7 +146,7 @@
#define SONATA_ATT_OPCODE_AUTH_SIGNATURE_FLAG_POS 7
#define SONATA_ATT_BT_UUID_128 {0xFB, 0x34, 0x9B, 0x5F, 0x80, 0x00, 0x00, 0x80, \
0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
/// MAC length
@@ -873,8 +873,7 @@ enum {
/// Client Characteristic Configuration Codes
enum sonata_att_ccc_val
{
enum sonata_att_ccc_val {
/// Stop notification/indication
SONATA_ATT_CCC_STOP_NTFIND = 0x0000,
/// Start notification
@@ -889,19 +888,16 @@ enum sonata_att_ccc_val
*/
/// Attribute length type
//typedef uint16_t att_size_t;
/// UUID - 128-bit type
struct sonata_att_uuid_128
{
struct sonata_att_uuid_128 {
/// 128-bit UUID
uint8_t uuid[SONATA_ATT_UUID_128_LEN];
};
/// UUID - 32-bit type
struct sonata_att_uuid_32
{
struct sonata_att_uuid_32 {
/// 32-bit UUID
uint8_t uuid[SONATA_ATT_UUID_32_LEN];
};
@@ -909,8 +905,7 @@ struct sonata_att_uuid_32
/// Characteristic Value Descriptor
struct sonata_att_char_desc
{
struct sonata_att_char_desc {
/// properties
uint8_t prop;
/// attribute handle
@@ -920,8 +915,7 @@ struct sonata_att_char_desc
};
/// Characteristic Value Descriptor
struct sonata_att_char128_desc
{
struct sonata_att_char128_desc {
/// properties
uint8_t prop;
/// attribute handle
@@ -934,8 +928,7 @@ struct sonata_att_char128_desc
typedef uint16_t att_svc_desc_t;
/// include service entry element
struct sonata_att_incl_desc
{
struct sonata_att_incl_desc {
/// start handle value of included service
uint16_t start_hdl;
/// end handle value of included service
@@ -945,8 +938,7 @@ struct sonata_att_incl_desc
};
/// include service entry element
struct sonata_att_incl128_desc
{
struct sonata_att_incl128_desc {
/// start handle value of included service
uint16_t start_hdl;
/// end handle value of included service
@@ -958,11 +950,11 @@ struct sonata_att_incl128_desc
/// Macro used to retrieve access permission rights
#define SONATA_PERM_GET(perm, access)\
(((perm) & (SONATA_PERM_MASK_ ## access)) >> (SONATA_PERM_POS_ ## access))
(((perm) & (SONATA_PERM_MASK_ ## access)) >> (SONATA_PERM_POS_ ## access))
/// Macro used to set a permission value
#define SONATA_PERM_SET(perm, access, value)\
perm = ((perm & ~(SONATA_PERM_MASK_ ## access)) | ((value << (SONATA_PERM_POS_ ## access)) & (SONATA_PERM_MASK_ ## access)))
perm = (((perm) & ~(SONATA_PERM_MASK_ ## access)) | (((value) << (SONATA_PERM_POS_ ## access)) & (SONATA_PERM_MASK_ ## access)))
/// Macro used to retrieve permission value from access and rights on attribute.
#define SONATA_PERM(access, right) \
@@ -971,18 +963,15 @@ struct sonata_att_incl128_desc
/// Macro used know if permission is set or not.
#define SONATA_PERM_IS_SET(perm, access, right) \
(((perm) & (((SONATA_PERM_RIGHT_ ## right) << (SONATA_PERM_POS_ ## access))) \
& (SONATA_PERM_MASK_ ## access)) == SONATA_PERM(access, right))
& (SONATA_PERM_MASK_ ## access)) == SONATA_PERM(access, right))
/// Retrieve attribute security level from attribute right and service right
//#define SONATA_ATT_GET_SEC_LVL(att_right, svc_right)
// soanta_co_max(((att_right) & PERM_RIGHT_AUTH), ((svc_right) & PERM_RIGHT_AUTH));
//
/// Retrieve UUID LEN from UUID Length Permission
#define SONATA_ATT_UUID_LEN(uuid_len_perm) ((uuid_len_perm == 0) ? ATT_UUID_16_LEN : \
((uuid_len_perm == 1) ? ATT_UUID_32_LEN : \
((uuid_len_perm == 2) ? ATT_UUID_128_LEN : 0)))
#define SONATA_ATT_UUID_LEN(uuid_len_perm) (((uuid_len_perm) == 0) ? ATT_UUID_16_LEN : \
(((uuid_len_perm) == 1) ? ATT_UUID_32_LEN : \
(((uuid_len_perm) == 2) ? ATT_UUID_128_LEN : 0)))
/// Initialization of attribute element
#define SONATA_ATT_ELEMT_INIT {{NULL}, false}
@@ -1007,8 +996,7 @@ struct sonata_att_incl128_desc
* Bit [14] : Write Signed accepted
* Bit [15] : Extended properties present (only relevant for a characteristic value)
*/
enum sonata_attm_perm_mask
{
enum sonata_attm_perm_mask {
/// retrieve all permission info
SONATA_PERM_MASK_ALL = 0x0000,
/// Read Permission Mask
@@ -1066,8 +1054,7 @@ enum sonata_attm_perm_mask
* Bit [14-13]: UUID Length (0 = 16 bits, 1 = 32 bits, 2 = 128 bits, 3 = RFU)
* Bit [15] : Trigger Read Indication (0 = Value present in Database, 1 = Value not present in Database)
*/
enum sonata_attm_value_perm_mask
{
enum sonata_attm_value_perm_mask {
/// Maximum Attribute Length
SONATA_PERM_MASK_MAX_LEN = 0x0FFF,
SONATA_PERM_POS_MAX_LEN = 0,
@@ -1101,8 +1088,7 @@ enum sonata_attm_value_perm_mask
* Bit [5-6]: UUID Length (0 = 16 bits, 1 = 32 bits, 2 = 128 bits, 3 = RFU)
* Bit [7] : Secondary Service (0 = Primary Service, 1 = Secondary Service)
*/
enum sonata_attm_svc_perm_mask
{
enum sonata_attm_svc_perm_mask {
/// Task that manage service is multi-instantiated
SONATA_PERM_MASK_SVC_MI = 0x01,
SONATA_PERM_POS_SVC_MI = 0,
@@ -1125,8 +1111,7 @@ enum sonata_attm_svc_perm_mask
/// Attribute & Service access mode
enum
{
enum {
/// Disable access
SONATA_PERM_RIGHT_DISABLE = 0,
/// Enable access
@@ -1134,8 +1119,7 @@ enum
};
/// Attribute & Service access rights
enum
{
enum {
/// No Authentication
SONATA_PERM_RIGHT_NO_AUTH = 0,
/// Access Requires Unauthenticated link
@@ -1147,8 +1131,7 @@ enum
};
/// Attribute & Service UUID Length
enum
{
enum {
/// 16 bits UUID
SONATA_PERM_UUID_16 = 0,
SONATA_PERM_RIGHT_UUID_16 = 0,
@@ -1163,8 +1146,7 @@ enum
};
/// execute flags
enum
{
enum {
/// Cancel All the Reliable Writes
SONATA_ATT_CANCEL_ALL_PREPARED_WRITES = 0x00,
/// Write All the Reliable Writes
asr582x/liteos_m/sdk/drivers/ble_inc/sonata_ble_api.h
+5 -9
View File
@@ -34,8 +34,6 @@
#include "sonata_utils_api.h"
#include "sonata_gatt_api.h"
#include "sonata_gap_api.h"
#include "sonata_prf_diss_api.h"
#include "sonata_log.h"
/*
* MACRO DEFINITIONS
****************************************************************************************
@@ -64,16 +62,14 @@
*/
/// App callback status
typedef enum
{
typedef enum {
CB_DONE = 0, //Done in callback
CB_REJECT = 1, //Do nothing in callback, SDK will do it
CB_MAX =0XFF,
}CBStatus;
CB_MAX = 0xFF,
} CBStatus;
/// Result of sleep state.
enum sonata_ble_sleep_state
{
enum sonata_ble_sleep_state {
/// Some activity pending, can not enter in sleep state
SONATA_BLE_ACTIVE = 0,
/// CPU can be put in sleep state
@@ -126,7 +122,7 @@ void sonata_ble_prevent_sleep_clear(uint16_t prv_slp_bit);
* @brief Reset ble module
* @return API_SUCCESS
*/
uint16_t sonata_ble_reset();
uint16_t sonata_ble_reset(void);
/*!
* @brief ble stack schedule
asr582x/liteos_m/sdk/drivers/ble_inc/sonata_ble_hook.h
+2 -7
View File
@@ -26,11 +26,7 @@
#ifndef _SONATA_BLE_HOOK_H_
#define _SONATA_BLE_HOOK_H_
#include <stddef.h> // standard definitions
#include <stdint.h> // standard integer definition
#include <stdbool.h> // boolean definition
#include <stdio.h>
#include <string.h>
/*
* TYPEDEF
@@ -39,11 +35,10 @@
typedef void (*PF_APP_INIT)(void);
typedef void (*PF_PLF_RESET)(uint32_t error);
typedef uint16_t (*PF_GET_STACK_USAGE)(void);
typedef int (*PF_PRINTF)(const char* format, ...);
typedef int (*PF_PRINTF)(const char *format, ...);
typedef void (*PF_APP_PRF_API_INIT)(void);
typedef struct sonata_ble_hook
{
typedef struct sonata_ble_hook {
#ifdef CFG_PLF_SONATA
void (*pf_assert_err)(uint16_t id, int cond);
void (*pf_assert_param)(uint16_t id, int param0, int param1);
asr582x/liteos_m/sdk/drivers/ble_inc/sonata_ble_transport.h
+5 -7
View File
@@ -24,14 +24,13 @@
*/
#ifndef _SONATA_BLE_TRANS_H_
#define _SONATA_BLE_TRANS_H_
#ifndef _SONATA_BLE_TRANSPORT_H_
#define _SONATA_BLE_TRANSPORT_H_
/*
* INCLUDE FILES
****************************************************************************************
*/
#include "sonata_utils_api.h"
@@ -55,13 +54,12 @@
* Type Definition
****************************************************************************************
*/
typedef struct sonata_ble_transport_pad_config
{
typedef struct sonata_ble_transport_pad_config {
void (*pf_init_pad_config)(void);
void (*pf_wakeup_pad_config)(void);
void (*pf_flow_on_pad_config)(void);
void (*pf_flow_off_pad_config)(void);
}sonata_ble_transport_pad_config_t;
} sonata_ble_transport_pad_config_t;
/*
@@ -81,5 +79,5 @@ extern void sonata_ble_transport_init(sonata_ble_transport_pad_config_t *config)
extern void sonata_ble_transport_wkup(void);
#endif //_SONATA_BLE_TRANS_H_
#endif //_SONATA_BLE_TRANSPORT_H_
asr582x/liteos_m/sdk/drivers/ble_inc/sonata_config.h
+5 -10
View File
@@ -48,8 +48,7 @@
*/
///BD address type
enum sonata_addr_type
{
enum sonata_addr_type {
///Public BD address
SONATA_ADDR_PUBLIC = 0x00,
///Random BD Address
@@ -73,8 +72,7 @@ enum sonata_addr_type
};
///Advertising filter policy
enum stack_adv_filter_policy
{
enum stack_adv_filter_policy {
///Allow both scan and connection requests from anyone
SONATA_ADV_ALLOW_SCAN_ANY_CON_ANY = 0x00,
///Allow both scan req from White List devices only and connection req from anyone
@@ -86,8 +84,7 @@ enum stack_adv_filter_policy
};
/// Random Address type
enum stack_random_addr_type
{
enum stack_random_addr_type {
/// Mask over the 2 MSBs
SONATA_BD_ADDR_RND_ADDR_TYPE_MSK = 0xC0,
@@ -100,8 +97,7 @@ enum stack_random_addr_type
};
/// Constant defining the role
enum
{
enum {
///Master role
SONATA_ROLE_MASTER,
///Slave role
@@ -109,8 +105,7 @@ enum
};
///Privacy mode type
enum
{
enum {
///Network privacy mode
SONATA_PRIV_TYPE_NETWORK = 0x00,
///Device privacy mode
asr582x/liteos_m/sdk/drivers/ble_inc/sonata_error_api.h
+1 -2
View File
@@ -193,8 +193,7 @@
//hl_err
enum stack_hl_err
{
enum stack_hl_err {
/// No error
SONATA_HL_GAP_ERR_NO_ERROR = 0x00,
asr582x/liteos_m/sdk/drivers/ble_inc/sonata_gap.h
+28 -63
View File
@@ -246,18 +246,17 @@
*/
#define SONATA_GAP_AD_TYPE_SET_BIT(bitfield, adv_flag) \
bitfield[adv_flag / 8] |= CO_BIT(adv_flag % 8)
bitfield[(adv_flag) / 8] |= CO_BIT((adv_flag) % 8)
#define SONATA_GAP_AD_TYPE_CHECK_BIT(bitfield, adv_flag) \
(bitfield[adv_flag / 8] & CO_BIT(adv_flag % 8))
(bitfield[(adv_flag) / 8] & CO_BIT((adv_flag) % 8))
/*
* Enumerations
****************************************************************************************
*/
/// GAP Advertising Flags
enum sonata_gap_ad_type
{
enum sonata_gap_ad_type {
/// Flag
SONATA_GAP_AD_TYPE_FLAGS = 0x01,//!< SONATA_GAP_AD_TYPE_FLAGS
/// Use of more than 16 bits UUID
@@ -326,8 +325,7 @@ enum sonata_gap_ad_type
};
/// Boolean value set
enum
{
enum {
/// Disable
SONATA_GAP_DISABLE = 0x00,
/// Enable
@@ -337,8 +335,7 @@ enum
/// GAP Attribute database handles
/// Generic Access Profile Service
enum
{
enum {
SONATA_GAP_IDX_PRIM_SVC,
SONATA_GAP_IDX_CHAR_DEVNAME,
SONATA_GAP_IDX_DEVNAME,
@@ -357,8 +354,7 @@ enum
/// IO Capability Values
enum sonata_gap_io_cap
{
enum sonata_gap_io_cap {
/// Display Only
SONATA_GAP_IO_CAP_DISPLAY_ONLY = 0x00,
/// Display Yes No
@@ -373,8 +369,7 @@ enum sonata_gap_io_cap
};
/// TK Type
enum sonata_gap_tk_type
{
enum sonata_gap_tk_type {
/// TK get from out of band method
SONATA_GAP_TK_OOB = 0x00,
/// TK generated and shall be displayed by local device
@@ -384,8 +379,7 @@ enum sonata_gap_tk_type
};
/// OOB Data Present Flag Values
enum sonata_gap_oob_auth
{
enum sonata_gap_oob_auth {
/// OOB Data not present
SONATA_GAP_OOB_AUTH_DATA_NOT_PRESENT = 0x00,
/// OOB data present
@@ -394,8 +388,7 @@ enum sonata_gap_oob_auth
};
/// Authentication mask
enum sonata_gap_auth_mask
{
enum sonata_gap_auth_mask {
/// No Flag set
SONATA_GAP_AUTH_NONE = 0,
/// Bond authentication
@@ -409,8 +402,7 @@ enum sonata_gap_auth_mask
};
/// Security Link Level
enum sonata_gap_lk_sec_lvl
{
enum sonata_gap_lk_sec_lvl {
/// No authentication
SONATA_GAP_LK_NO_AUTH = 0,
/// Unauthenticated link
@@ -422,8 +414,7 @@ enum sonata_gap_lk_sec_lvl
};
/// Authentication Requirements
enum sonata_gap_auth
{
enum sonata_gap_auth {
/// No MITM No Bonding
SONATA_GAP_AUTH_REQ_NO_MITM_NO_BOND = (SONATA_GAP_AUTH_NONE),
/// No MITM Bonding
@@ -444,8 +435,7 @@ enum sonata_gap_auth
};
/// Key Distribution Flags
enum sonata_gap_kdist
{
enum sonata_gap_kdist {
/// No Keys to distribute
SONATA_GAP_KDIST_NONE = 0x00,
/// Encryption key in distribution
@@ -453,16 +443,15 @@ enum sonata_gap_kdist
/// IRK (ID key)in distribution
SONATA_GAP_KDIST_IDKEY = (1 << 1),
/// CSRK(Signature key) in distribution
SONATA_GAP_KDIST_SIGNKEY= (1 << 2),
SONATA_GAP_KDIST_SIGNKEY = (1 << 2),
/// LTK in distribution
SONATA_GAP_KDIST_LINKKEY= (1 << 3),
SONATA_GAP_KDIST_LINKKEY = (1 << 3),
SONATA_GAP_KDIST_LAST = (1 << 4)
};
/// Security Defines
enum sonata_gap_sec_req
{
enum sonata_gap_sec_req {
/// No security (no authentication and encryption)
SONATA_GAP_NO_SEC = 0x00,
/// Unauthenticated pairing with encryption
@@ -478,8 +467,7 @@ enum sonata_gap_sec_req
};
/// Bit field use to select the preferred TX or RX LE PHY. 0 means no preferences
enum sonata_gap_phy
{
enum sonata_gap_phy {
/// No preferred PHY
SONATA_GAP_PHY_ANY = 0x00,
/// LE 1M PHY preferred for an active link
@@ -491,8 +479,7 @@ enum sonata_gap_phy
};
/// Enumeration of TX/RX PHY values
enum sonata_gap_phy_val
{
enum sonata_gap_phy_val {
/// LE 1M PHY (TX or RX)
SONATA_GAP_PHY_1MBPS = 1,
/// LE 2M PHY (TX or RX)
@@ -506,18 +493,14 @@ enum sonata_gap_phy_val
};
/// Modulation index
enum sonata_gap_modulation_idx
{
/// Assume transmitter will have a standard modulation index
enum sonata_gap_modulation_idx { /// Assume transmitter will have a standard modulation index
SONATA_GAP_MODULATION_STANDARD,
/// Assume transmitter will have a stable modulation index
SONATA_GAP_MODULATION_STABLE,
};
/// Packet Payload type for test mode
enum sonata_gap_pkt_pld_type
{
/// PRBS9 sequence "11111111100000111101..." (in transmission order)
enum sonata_gap_pkt_pld_type { /// PRBS9 sequence "11111111100000111101..." (in transmission order)
SONATA_GAP_PKT_PLD_PRBS9,
/// Repeated "11110000" (in transmission order)
SONATA_GAP_PKT_PLD_REPEATED_11110000,
@@ -539,8 +522,7 @@ enum sonata_gap_pkt_pld_type
/// Device name
/*@TRACE*/
struct sonata_gap_dev_name
{
struct sonata_gap_dev_name {
/// name length
uint16_t length;
/// name value
@@ -549,8 +531,7 @@ struct sonata_gap_dev_name
/// Slave preferred connection parameters
/*@TRACE*/
struct sonata_gap_slv_pref
{
struct sonata_gap_slv_pref {
/// Connection interval minimum
uint16_t con_intv_min;
/// Connection interval maximum
@@ -563,16 +544,14 @@ struct sonata_gap_slv_pref
///BD Address structure
/*@TRACE*/
typedef struct
{
typedef struct {
///6-byte array address value
uint8_t addr[SONATA_GAP_BD_ADDR_LEN];
} sonata_bd_addr_t;
///Channel map structure
/*@TRACE*/
typedef struct
{
typedef struct {
///5-byte channel map array
uint8_t map[SONATA_GAP_LE_CHNL_MAP_LEN];
} sonata_le_chnl_map_t;
@@ -580,25 +559,14 @@ typedef struct
///Random number structure
/*@TRACE*/
typedef struct
{
typedef struct {
///8-byte array for random number
uint8_t nb[SONATA_GAP_RAND_NB_LEN];
} sonata_rand_nb_t;
/// P256 Public key data format
//typedef struct
//{
// /// X Coordinate of the key
// uint8_t x[SONATA_GAP_P256_KEY_LEN];
// /// X Coordinate of the key
// uint8_t y[SONATA_GAP_P256_KEY_LEN];
//} sonata_public_key_t;
/// Address information about a device address
/*@TRACE*/
struct sonata_gap_bdaddr
{
struct sonata_gap_bdaddr {
/// BD Address of device
sonata_bd_addr_t addr;
/// Address type of the device 0=public/1=private random
@@ -607,8 +575,7 @@ struct sonata_gap_bdaddr
/// Resolving list device information
/*@TRACE*/
struct sonata_gap_ral_dev_info
{
struct sonata_gap_ral_dev_info {
/// Device identity
struct sonata_gap_bdaddr addr;
/// Privacy Mode
@@ -621,16 +588,14 @@ struct sonata_gap_ral_dev_info
/// Generic Security key structure
/*@TRACE*/
struct sonata_gap_sec_key
{
struct sonata_gap_sec_key {
/// Key value MSB -> LSB
uint8_t key[SONATA_GAP_KEY_LEN];
};
/// I/Q sample
/*@TRACE*/
struct sonata_gap_iq_sample
{
struct sonata_gap_iq_sample {
/// I sample
int8_t i;
/// Q sample
asr582x/liteos_m/sdk/drivers/ble_inc/sonata_gap_api.h
+221 -277
View File
File diff suppressed because it is too large Load Diff
asr582x/liteos_m/sdk/drivers/ble_inc/sonata_gatt_api.h
+38 -29
View File
@@ -93,8 +93,7 @@
/*!
* @brief request operation type - application interface
*/
typedef enum
{
typedef enum {
/* Attribute Client Flags */
/* No Operation (if nothing has been requested) */
/* ************************************************ */
@@ -178,7 +177,7 @@ typedef enum
/* ************************************************ */
/// Send a service changed indication
SONATA_GATT_SVC_CHANGED = 0x40,
}sonata_gatt_operation;
} sonata_gatt_operation;
///GATT response type
typedef enum {
@@ -206,7 +205,7 @@ typedef enum {
SONATA_GATT_SVC_VISIBILITY_SET_RSP = 0x0B16,
/// Compute hash value of the attribute database response
SONATA_GATT_ATT_DB_HASH_COMP_RSP = 0x0B21,
}sonata_ble_response_type;
} sonata_ble_response_type;
/*
* Type Definition
@@ -217,8 +216,7 @@ typedef enum {
* Attribute Description
*/
/*@TRACE*/
typedef struct sonata_gatt_att_desc
{
typedef struct sonata_gatt_att_desc {
/** Attribute UUID (LSB First) */
uint8_t uuid[SONATA_ATT_UUID_128_LEN];
@@ -258,12 +256,11 @@ typedef struct sonata_gatt_att_desc
* Bit [15] : Trigger Read Indication (0 = Value present in Database, 1 = Value not present in Database)
*/
uint16_t ext_perm;
}sonata_gatt_att_desc_t;
} sonata_gatt_att_desc_t;
/// Service information
/*@TRACE*/
typedef struct sonata_gatt_svc_info
{
typedef struct sonata_gatt_svc_info {
/// Service start handle
uint16_t start_hdl;
/// Service end handle
@@ -272,11 +269,10 @@ typedef struct sonata_gatt_svc_info
uint16_t task_id;
/// Service permission
uint8_t perm;
}sonata_gatt_svc_info_t;
} sonata_gatt_svc_info_t;
/// @brief Callbacks for GATT module
typedef struct
{
typedef struct {
/*************** GATT Controller ***************/
///@deprecated use @see ble_complete_callback
void (*gatt_disc_all_svc_complete)(uint8_t conidx, uint16_t status);
@@ -287,13 +283,16 @@ typedef struct
uint16_t (*gatt_disc_svc)(uint8_t conidx, uint16_t start_hdl, uint16_t end_hdl, uint8_t uuid_len, uint8_t *uuid);
/// Callback when discover all inclued service complete
uint16_t (*gatt_disc_svc_incl)(uint8_t conidx, uint16_t attr_hdl, uint16_t start_hdl, uint16_t end_hdl, uint8_t uuid_len, uint8_t *uuid);
uint16_t (*gatt_disc_svc_incl)(uint8_t conidx, uint16_t attr_hdl, uint16_t start_hdl, uint16_t end_hdl,
uint8_t uuid_len, uint8_t *uuid);
/// Callback for discover characteristic
uint16_t (*gatt_disc_char)(uint8_t conidx, uint16_t attr_hdl, uint16_t pointer_hdl, uint8_t prop, uint8_t uuid_len, uint8_t *uuid); /*void(*gatt_disc_char_desc)(void);*/
uint16_t (*gatt_disc_char)(uint8_t conidx, uint16_t attr_hdl, uint16_t pointer_hdl, uint8_t prop, uint8_t uuid_len,
uint8_t *uuid); /*void(*gatt_disc_char_desc)(void);*/
/// Callback for discover characteristic description
uint16_t (*gatt_disc_char_desc)(uint8_t conidx, uint16_t attr_hdl, uint8_t uuid_len, uint8_t *uuid); /*void(*gatt_disc_char_desc)(void);*/
uint16_t (*gatt_disc_char_desc)(uint8_t conidx, uint16_t attr_hdl, uint8_t uuid_len,
uint8_t *uuid); /*void(*gatt_disc_char_desc)(void);*/
/// Callback for GATT read complete
uint16_t (*gatt_read)(uint8_t conidx, uint16_t handle, uint16_t offset, uint16_t length, uint8_t *value);
@@ -318,7 +317,8 @@ typedef struct
uint16_t (*gatt_service_change_req)(uint8_t conidx, uint16_t start_handle, uint16_t end_handle);
/// Callback for connection information(about GATT for current connection that can be reuse on another connection)
uint16_t (*gatt_connection_info)(uint8_t conidx, uint16_t gatt_start_handle, uint16_t gatt_end_handle, uint16_t svc_chg_handle,
uint16_t (*gatt_connection_info)(uint8_t conidx, uint16_t gatt_start_handle, uint16_t gatt_end_handle,
uint16_t svc_chg_handle,
uint8_t cli_info, uint8_t cli_feat);
/*************** GATT Manager ***************/
@@ -352,7 +352,8 @@ uint16_t sonata_ble_gatt_disc_all_svc(uint8_t conidx);
* @param uuid UUID
* @return API_SUCCESS
*/
uint16_t sonata_ble_gatt_disc_svc_by_uuid(uint8_t conidx, uint16_t start_hdl, uint16_t end_hdl, uint8_t uuid_len, uint8_t *uuid);
uint16_t sonata_ble_gatt_disc_svc_by_uuid(uint8_t conidx, uint16_t start_hdl, uint16_t end_hdl, uint8_t uuid_len,
uint8_t *uuid);
/*!
* @brief Disc included servcie
@@ -380,7 +381,8 @@ uint16_t sonata_ble_gatt_disc_all_characteristic(uint8_t conidx, uint16_t start_
* @param uuid UUID
* @return API_SUCCESS
*/
uint16_t sonata_ble_gatt_disc_characteristic_by_uuid(uint8_t conidx, uint16_t start_hdl, uint16_t end_hdl, uint8_t uuid_len, uint8_t *uuid);
uint16_t sonata_ble_gatt_disc_characteristic_by_uuid(uint8_t conidx, uint16_t start_hdl, uint16_t end_hdl,
uint8_t uuid_len, uint8_t *uuid);
/*!
* @brief Discover All desc
* @param conidx connecting index, used for multiple connection. for single connection, set it to 0.
@@ -448,10 +450,10 @@ uint16_t sonata_ble_gatt_gatt_read_long(uint8_t conidx, uint16_t handle, uint16_
* @param uuid UUID
* @return API_SUCCESS
*/
uint16_t sonata_ble_gatt_read_by_uuid(uint8_t conidx, uint16_t seq_num, uint16_t start_hdl, uint16_t end_hdl, uint8_t uuid_len, uint8_t *uuid);
uint16_t sonata_ble_gatt_read_by_uuid(uint8_t conidx, uint16_t seq_num, uint16_t start_hdl, uint16_t end_hdl,
uint8_t uuid_len, uint8_t *uuid);
//uint16_t sonata_ble_gatt_read_multiple(uint8_t conidx, struct sonata_gattc_read_multiple_cmd *cmd);
/*!
* @brief Gatt write
@@ -463,7 +465,8 @@ uint16_t sonata_ble_gatt_read_by_uuid(uint8_t conidx, uint16_t seq_num, uint16_t
* @param value Value to write
* @return API_SUCCESS
*/
uint16_t sonata_ble_gatt_write(uint8_t conidx, uint16_t handle, uint16_t offset, uint16_t cursor, uint16_t length,uint8_t *value);
uint16_t sonata_ble_gatt_write(uint8_t conidx, uint16_t handle, uint16_t offset, uint16_t cursor, uint16_t length,
uint8_t *value);
/*!
* @brief Gatt write no response
@@ -475,7 +478,8 @@ uint16_t sonata_ble_gatt_write(uint8_t conidx, uint16_t handle, uint16_t offset,
* @param value Value to write
* @return API_SUCCESS
*/
uint16_t sonata_ble_gatt_write_no_response(uint8_t conidx, uint16_t handle, uint16_t offset, uint16_t cursor, uint16_t length, uint8_t *value);
uint16_t sonata_ble_gatt_write_no_response(uint8_t conidx, uint16_t handle, uint16_t offset, uint16_t cursor,
uint16_t length, uint8_t *value);
/*!
* @brief Gatt write signed
@@ -487,7 +491,8 @@ uint16_t sonata_ble_gatt_write_no_response(uint8_t conidx, uint16_t handle, uin
* @param value Value to write
* @return API_SUCCESS
*/
uint16_t sonata_ble_gatt_write_signed(uint8_t conidx, uint16_t handle, uint16_t offset, uint16_t cursor, uint16_t length,uint8_t *value);
uint16_t sonata_ble_gatt_write_signed(uint8_t conidx, uint16_t handle, uint16_t offset, uint16_t cursor,
uint16_t length, uint8_t *value);
/*!
* @brief Gatt excute write
@@ -524,7 +529,8 @@ uint16_t sonata_ble_gatt_unregister_to_peer_device_event(uint8_t conidx, uint16_
* @param uuid UUID
* @return API_SUCCESS
*/
uint16_t sonata_ble_gatt_sdp_discovery_service(uint8_t conidx, uint16_t start_hdl, uint16_t end_hdl, uint8_t uuid_len,uint8_t *uuid);
uint16_t sonata_ble_gatt_sdp_discovery_service(uint8_t conidx, uint16_t start_hdl, uint16_t end_hdl, uint8_t uuid_len,
uint8_t *uuid);
/*!
* @brief Gatt sdp cancel discovery
@@ -542,7 +548,8 @@ uint16_t sonata_ble_gatt_sdp_cancel_discovery(uint8_t conidx);
* @param uuid UUID
* @return API_SUCCESS
*/
uint16_t sonata_ble_gatt_sdp_discovery_all_service(uint8_t conidx, uint16_t start_hdl, uint16_t end_hdl, uint8_t uuid_len, uint8_t *uuid);
uint16_t sonata_ble_gatt_sdp_discovery_all_service(uint8_t conidx, uint16_t start_hdl, uint16_t end_hdl,
uint8_t uuid_len, uint8_t *uuid);
/*!
* @brief Gatt enable robust database cache
@@ -566,7 +573,8 @@ uint16_t sonata_ble_gatt_read_db_hash_cmd_handler(uint8_t conidx);
* @param end_handle End handle
* @return API_SUCCESS
*/
uint16_t sonata_ble_gatt_send_service_changed_event(uint8_t conidx, uint16_t handle, uint16_t start_handle, uint16_t end_handle);
uint16_t sonata_ble_gatt_send_service_changed_event(uint8_t conidx, uint16_t handle, uint16_t start_handle,
uint16_t end_handle);
/*!
* @brief Gatt send event confirm message
@@ -608,7 +616,7 @@ uint16_t sonata_ble_gatt_add_service(uint16_t start_hdl, uint8_t perm, uint8_t *
///@deprecated use sonata_ble_gatt_add_service()
uint16_t sonata_ble_gatt_add_service_request(uint16_t start_hdl, uint8_t perm, uint8_t *uuid,
uint8_t nb_att, sonata_gatt_att_desc_t *atts);
uint8_t nb_att, sonata_gatt_att_desc_t *atts);
/*!
* @brief Gatt get value
@@ -656,7 +664,7 @@ uint16_t sonata_ble_gatt_set_service_visibility(uint16_t handle, bool visible);
* @brief Gatt get database hash
* @return API_SUCCESS
*/
uint16_t sonata_ble_gatt_att_compute_db_hash();
uint16_t sonata_ble_gatt_att_compute_db_hash(void);
/*!
* @brief GATT send read confirm message
* @param conidx connecting index, used for multiple connection. for single connection, set it to 0.
@@ -666,7 +674,8 @@ uint16_t sonata_ble_gatt_att_compute_db_hash();
* @param value value array
* @return API_SUCCESS
*/
uint16_t sonata_ble_gatt_send_read_confirm(uint8_t conidx, uint16_t handle, uint8_t status, uint16_t length, uint8_t *value);
uint16_t sonata_ble_gatt_send_read_confirm(uint8_t conidx, uint16_t handle, uint8_t status, uint16_t length,
uint8_t *value);
/*!
* @brief GATT send write confirm message
asr582x/liteos_m/sdk/drivers/ble_inc/sonata_log.h
+1 -26
View File
@@ -63,31 +63,6 @@ typedef enum {
*/
typedef int (*vprintf_like_t)(const char *, va_list);
/*
#define LOG_COLOR_E
#define LOG_COLOR_W
#define LOG_COLOR_I
#define LOG_COLOR_D
#define LOG_COLOR_V
#define LOG_RESET_COLOR
#define LOG_FORMAT(letter, format) LOG_COLOR_ ## letter #letter " (%d) %s: " format LOG_RESET_COLOR "\r\n"
#define SONATA_LOG_LEVEL(level, tag, format, ...) do { \
if (level==SONATA_LOG_ERROR ) { sonata_logt_write(SONATA_LOG_ERROR, tag, LOG_FORMAT(E, format), sonata_log_timestamp(), tag, ##__VA_ARGS__); } \
else if (level==SONATA_LOG_WARN ) { sonata_logt_write(SONATA_LOG_WARN, tag, LOG_FORMAT(W, format), sonata_log_timestamp(), tag, ##__VA_ARGS__); } \
else if (level==SONATA_LOG_DEBUG ) { sonata_logt_write(SONATA_LOG_DEBUG, tag, LOG_FORMAT(D, format), sonata_log_timestamp(), tag, ##__VA_ARGS__); } \
else if (level==SONATA_LOG_VERBOSE ) { sonata_logt_write(SONATA_LOG_VERBOSE, tag, LOG_FORMAT(V, format), sonata_log_timestamp(), tag, ##__VA_ARGS__); } \
else { sonata_logt_write(SONATA_LOG_INFO, tag, LOG_FORMAT(I, format), sonata_log_timestamp(), tag, ##__VA_ARGS__); } \
} while(0)
#define SONATA_LOG_LEVEL_LOCAL(level, tag, format, ...) do { \
if ( LOG_LOCAL_LEVEL >= level ) SONATA_LOG_LEVEL(level, tag, format, ##__VA_ARGS__); \
} while(0)
#define LOGE( tag, format, ... ) SONATA_LOG_LEVEL_LOCAL(SONATA_LOG_ERROR, tag, format, ##__VA_ARGS__)
#define LOGW( tag, format, ... ) SONATA_LOG_LEVEL_LOCAL(SONATA_LOG_WARN, tag, format, ##__VA_ARGS__)
#define LOGI( tag, format, ... ) SONATA_LOG_LEVEL_LOCAL(SONATA_LOG_INFO, tag, format, ##__VA_ARGS__)
#define LOGD( tag, format, ... ) SONATA_LOG_LEVEL_LOCAL(SONATA_LOG_DEBUG, tag, format, ##__VA_ARGS__)
#define LOGV( tag, format, ... ) SONATA_LOG_LEVEL_LOCAL(SONATA_LOG_VERBOSE, tag, format, ##__VA_ARGS__)
*/
//#define CFG_SONATA_LOG
#ifdef CFG_SONATA_LOG
#define SONATA_LOGT_FORMAT_SIMPLE(format) "%s: " format "\r\n"
#define SONATA_LOGT_LEVEL_SIMPLE(level, tag, format, ...) do { \
@@ -173,4 +148,4 @@ void sonata_log_level_set(sonata_log_level level);
//Internal use
void sonata_logt_write(sonata_log_level level, const char *tag, const char *format, ...);
#endif //_SONATA_LOG_H_
#endif // _SONATA_LOG_H_
asr582x/liteos_m/sdk/drivers/ble_inc/sonata_mesh_api.h
+403 -503
View File
File diff suppressed because it is too large Load Diff
asr582x/liteos_m/sdk/drivers/ble_inc/sonata_prf_bass_api.h
+9 -11
View File
@@ -57,8 +57,7 @@
/*!
* @brief Callback for diss value
*/
typedef struct prf_bas_callback
{
typedef struct prf_bas_callback {
/// Callback for battery level request, if config==1, app should send battery level value use sonata_prf_bas_send_battery_level()
uint16_t (*prf_bass_value_req)(uint8_t conidx, uint8_t config);
/// Callback for bass enabled
@@ -66,10 +65,9 @@ typedef struct prf_bas_callback
/// Callback for battery level notifiyed
uint16_t (*prf_bass_level_updated)(uint8_t status);
}prf_bas_callback_t;
} prf_bas_callback_t;
typedef enum
{
typedef enum {
/// Start the Battery Server - at connection used to restore bond data
SONATA_PRF_BASS_ENABLE_REQ = SONATA_TASK_FIRST_MSG(SONATA_TASK_ID_BASS),
/// Confirmation of the Battery Server start
@@ -80,7 +78,7 @@ typedef enum
SONATA_PRF_BASS_BATT_LEVEL_UPD_RSP,
/// Inform APP that Battery Level Notification Configuration has been changed - use to update bond data
SONATA_PRF_BASS_BATT_LEVEL_NTF_CFG_IND,
}sonata_bass_msg_id;
} sonata_bass_msg_id;
/*
* GLOBAL VARIABLES DECLARATIONS
@@ -103,11 +101,11 @@ void sonata_prf_bass_init(void);
*/
void sonata_prf_bas_add_bass(uint8_t bas_number, bool support_ntf);
/*!
* @brief Enable the Battery Service
* @param conidx connection index
* @param batt_lvl battery level value
*/
/*!
* @brief Enable the Battery Service
* @param conidx connection index
* @param batt_lvl battery level value
*/
void sonata_prf_bas_enable_bass(uint8_t conidx, uint8_t batt_lvl);
asr582x/liteos_m/sdk/drivers/ble_inc/sonata_prf_diss_api.h
+13 -16
View File
@@ -33,7 +33,6 @@
* INCLUDE FILES
****************************************************************************************
*/
#include "sonata_config.h"
///@cond
#if BLE_HOST_PRESENT
///@endcond
@@ -59,8 +58,7 @@
*/
/// Attribute Table Indexes
typedef enum
{
typedef enum {
/// Manufacturer Name
SONATA_DIS_MANUFACTURER_NAME_CHAR,
/// Model Number
@@ -81,7 +79,7 @@ typedef enum
SONATA_DIS_PNP_ID_CHAR,
SONATA_DIS_CHAR_MAX,
}sonata_dis_info;
} sonata_dis_info;
/*
* Type Definition
@@ -91,11 +89,10 @@ typedef enum
/*!
* @brief Callback for diss value
*/
typedef struct prf_diss_callback
{
typedef struct prf_diss_callback {
uint16_t (*prf_diss_value_req)(sonata_dis_info info_id);
}prf_diss_callback_t;
} prf_diss_callback_t;
/*
* FUNCTION DECLARATIONS
@@ -106,15 +103,15 @@ typedef struct prf_diss_callback
*/
void sonata_prf_diss_init(void);
/*!
* @brief Send value confirm message
* @param task_id task_id was get in SONATA_GAP_PROFILE_ADDED_IND event
* @param value @see sonata_dis_info
* @param data_len data length
* @param data data
* @return API_SUCCESS
*/
int sonata_prf_diss_send_value_cfm_cmd(sonata_dis_info value, uint8_t data_len, uint8_t *data);
/*!
* @brief Send value confirm message
* @param task_id task_id was get in SONATA_GAP_PROFILE_ADDED_IND event
* @param value @see sonata_dis_info
* @param data_len data length
* @param data data
* @return API_SUCCESS
*/
int sonata_prf_diss_send_value_cfm_cmd(sonata_dis_info value, uint8_t data_len, uint8_t *data);
/*!
* @brief add diss profile
asr582x/liteos_m/sdk/drivers/ble_inc/sonata_prf_hogpd_api.h
+51 -71
View File
@@ -33,7 +33,6 @@
* INCLUDE FILES
****************************************************************************************
*/
#include "sonata_config.h"
///@cond
#if BLE_HOST_PRESENT
///@endcond
@@ -82,7 +81,6 @@
#define HID_REPORT_ID_CONSUMER_CTRL (3)
#define HID_REPORT_ID_SERVICE_CTRL (4)
#define HID_REPORT_ID_VENDOR_DEFINED (17)
//#define HID_REPORT_ID_VENDOR_DEFINED_INDEX (3)
#define HID_REPORT_ID_VOICE (3)
#define HID_REPORT_ID_VOICE_INDEX (2)
#define SONATA_ATT_ERR_INSUFF_AUTHEN (0x05)
@@ -224,14 +222,7 @@
#define HID_CONSUMER_WWW_SEARCH ((0x02 << 8 & 0xFF) | 0x21) // WWW Search 0x0221
#define HID_CONSUMER_HOMEPAGE ((0x02 << 8 & 0xFF) | 0x23) // Homepage 0x0223
#define HID_CONSUMER_WWW_BACK ((0x02 << 8 & 0xFF) | 0x24) // WWW Back 0x0224
/*
enum
{
HID_KEY_RELEASE = 0,
HID_KEY_PRESS,
HID_KEY_MULTI_PRESS
};
*/
typedef enum {
//HID Information
SONATA_HOGPD_HID_INFORMATION_CHAR,
@@ -243,15 +234,14 @@ typedef enum {
SONATA_HOGPD_HID_MOUSE_INPUT_REPORT_CHAR,
//Report
SONATA_HOGPD_HID_REPORT_CHAR,
}sonata_hogpd_info;
} sonata_hogpd_info;
/*!
* @brief
*/
typedef enum
{
typedef enum {
/// Peripheral Bonded
SONATA_TAG_PERIPH_BONDED = (APP_DATA_SAVE_TAG_FIRST+0),
SONATA_TAG_PERIPH_BONDED = (APP_DATA_SAVE_TAG_FIRST + 0),
/// Mouse NTF Cfg
SONATA_TAG_MOUSE_NTF_CFG,
/// Mouse Timeout value
@@ -274,13 +264,12 @@ typedef enum
SONATA_TAG_BONDED_DEV_INFO,
/// start pair on boot
SONATA_TAG_PAIR_ON_BOOT,
}sonata_app_nvds_tag;
} sonata_app_nvds_tag;
/*!
* @brief
*/
typedef enum
{
typedef enum {
/// Peripheral Bonded len
SONATA_LEN_PERIPH_BONDED = 1,
/// Mouse NTF Cfg len
@@ -305,11 +294,10 @@ typedef enum
SONATA_LEN_BONDED_DEV_INFO = 218, //218: 3, 290:4,
/// start pair on boot
SONATA_LEN_PAIR_ON_BOOT = 1,
}sonata_app_nvds_len;
} sonata_app_nvds_len;
/// Features Flag Values
typedef enum
{
typedef enum {
/// Keyboard Device
SONATA_HOGPD_CFG_KEYBOARD = 0x01,
/// Mouse Device
@@ -328,7 +316,7 @@ typedef enum
/// Report Notification Enabled (to be shift for each report index)
SONATA_HOGPD_CFG_REPORT_NTF_EN = 0x40,
}sonata_hogpd_cfg;
} sonata_hogpd_cfg;
/*!
* @brief
@@ -352,12 +340,11 @@ typedef enum {
MOTION_MULTIPLE = 'M',
//ADC
MOTION_ADC = 'A',
}sonata_mouse_motion;
} sonata_mouse_motion;
/// Report Char. Configuration Flag Values //Report's read and write property
typedef enum
{
typedef enum {
/// Input Report
SONATA_HOGPD_CFG_REPORT_IN = 0x01,
/// Output Report , Report will be Writeable
@@ -367,11 +354,10 @@ typedef enum
SONATA_HOGPD_CFG_REPORT_FEAT = 0x03,
/// Input report with Write capabilities
SONATA_HOGPD_CFG_REPORT_WR = 0x10,
}sonata_hogpd_report_cfg;
} sonata_hogpd_report_cfg;
/// Type of reports
typedef enum
{
typedef enum {
/// The Report characteristic is used to exchange data between a HID Device and a HID Host.
SONATA_HOGPD_REPORT,
/// The Report Map characteristic
@@ -382,11 +368,10 @@ typedef enum
SONATA_HOGPD_BOOT_KEYBOARD_OUTPUT_REPORT,
/// Boot Mouse Input Report
SONATA_HOGPD_BOOT_MOUSE_INPUT_REPORT,
}sonata_hogpd_report_type;
} sonata_hogpd_report_type;
/// type of operation requested by peer device
typedef enum
{
typedef enum {
/// No operation
SONATA_HOGPD_OP_NO,
/// Read report value
@@ -395,13 +380,12 @@ typedef enum
SONATA_HOGPD_OP_REPORT_WRITE,
/// Modify Protocol mode
SONATA_HOGPD_OP_PROT_UPDATE,
}sonata_hogpd_op;
} sonata_hogpd_op;
/// Messages for HID Over GATT Profile Device Role
/*@TRACE*/
enum sonata_hogpd_msg_id
{
enum sonata_hogpd_msg_id {
/// Restore bond data the HID Over GATT Profile Device Role Task
SONATA_HOGPD_ENABLE_REQ = STACK_TASK_FIRST_MSG(SONATA_TASK_ID_HOGPD),
/// Response of enabled request
@@ -432,36 +416,32 @@ enum sonata_hogpd_msg_id
};
/// Messages for HID Over GATT Profile Device Role
typedef enum
{
typedef enum {
SONATA_HOGPD_MOUSE_TIMEOUT_TIMER = SONATA_APP_HID_MOUSE_TIMEOUT_TIMER,
SONATA_HOGPD_KEYBOARD_TIMEOUT_TIMER,
}app_hogpd_msg_id;
} app_hogpd_msg_id;
typedef enum
{
typedef enum {
HID_DISCONNECTED,
HID_DISCONNECTING,
HID_CONNECTING,
HID_CONNECTED,
}hid_connection_state;
} hid_connection_state;
typedef enum
{
typedef enum {
DIR_BROADCAST_NO_NEED,
DIR_BROADCAST_NEEDED,
DIR_BROADCAST_ALREADY_SEND,
}directed_broadcast_state;
} directed_broadcast_state;
/// HID Information bit values
typedef enum
{
typedef enum {
/// Device capable of providing wake-up signal to a HID host
SONATA_HIDS_REMOTE_WAKE_CAPABLE = 0x01,
/// Normally connectable support bit
SONATA_HIDS_NORM_CONNECTABLE = 0x02,
}hogp_info_bit;
} hogp_info_bit;
/*
* Type Definition
@@ -472,28 +452,25 @@ typedef enum
/// External Report Reference
typedef struct sonata_hogpd_ext_ref
{
typedef struct sonata_hogpd_ext_ref {
/// External Report Reference - Included Service
uint16_t inc_svc_hdl;
/// External Report Reference - Characteristic UUID
uint16_t rep_ref_uuid;
}sonata_hogpd_ext_ref_t;
} sonata_hogpd_ext_ref_t;
/// HID Information structure
typedef struct sonata_hids_hid_info
{
typedef struct sonata_hids_hid_info {
/// bcdHID
uint16_t bcdHID;
/// bCountryCode
uint8_t bCountryCode;
/// Flags
uint8_t flags;
}sonata_hids_hid_info_t;
} sonata_hids_hid_info_t;
/// Database Creation Service Instance Configuration structure
typedef struct sonata_hogpd_hids_cfg
{
typedef struct sonata_hogpd_hids_cfg {
/// Service Features (@see enum sonata_hogpd_cfg)
uint8_t svc_features;
/// Number of Report Char. instances to add in the database
@@ -507,30 +484,29 @@ typedef struct sonata_hogpd_hids_cfg
/// External Report Reference
struct sonata_hogpd_ext_ref ext_ref;
}sonata_hogpd_hids_cfg_t;
} sonata_hogpd_hids_cfg_t;
/// Parameters of the @ref HOGPD_CREATE_DB_REQ message
typedef struct sonata_hogpd_db_cfg
{
typedef struct sonata_hogpd_db_cfg {
/// Number of HIDS to add
uint8_t hids_nb;
/// Initial configuration for each HIDS instance
struct sonata_hogpd_hids_cfg cfg[SONATA_HOGPD_NB_HIDS_INST_MAX];
}sonata_hogpd_db_cfg_t;
} sonata_hogpd_db_cfg_t;
/*!
* @brief Callback for hogpd value
*/
typedef struct
{
uint16_t (*hogpd_report_request)(uint8_t conidx, uint8_t operation, uint16_t handle, uint8_t report_type, uint8_t hid_idx, uint8_t length, uint8_t idx, uint8_t *value);
typedef struct {
uint16_t (*hogpd_report_request)(uint8_t conidx, uint8_t operation, uint16_t handle, uint8_t report_type,
uint8_t hid_idx, uint8_t length, uint8_t idx, uint8_t *value);
uint16_t (*hogpd_protocol_mode_request)(uint8_t conidx, uint8_t operation, uint8_t proto_mode);
uint16_t (*hogpd_control_point_write)(uint8_t conidx, uint8_t hid_idx);
uint16_t (*hogpd_enable_response)(uint8_t conidx, uint8_t enable_state);
uint16_t (*hogpd_report_update_response)(uint8_t conidx, uint8_t status);
uint16_t (*hogpd_ntf_config)(uint8_t conidx, uint8_t ntf_len, uint16_t * ntf_cfg);
}prf_hogpd_callback;
uint16_t (*hogpd_ntf_config)(uint8_t conidx, uint8_t ntf_len, uint16_t *ntf_cfg);
} prf_hogpd_callback;
@@ -543,11 +519,10 @@ typedef struct
* Byte 0 | Not Used |-Y mark|-X mark| Middle| Right | Left |
* --------------------------------------------------------------------------
*/
typedef struct ps_mouse_report
{
typedef struct ps_mouse_report {
int16_t repX; //x-quaddec of the mouse
int16_t repY; //y-quaddec of the mouse
}ps_mouse_report_t;
} ps_mouse_report_t;
/*!
@@ -571,7 +546,8 @@ void sonata_set_connection_state(int state);
* @param report report data
* @return
*/
int sonata_prf_hogp_send_report_update_request(uint8_t conidx, uint8_t hid_idx, uint8_t report_idx, uint8_t report_type, uint16_t report_len, uint8_t *report);
int sonata_prf_hogp_send_report_update_request(uint8_t conidx, uint8_t hid_idx, uint8_t report_idx, uint8_t report_type,
uint16_t report_len, uint8_t *report);
/*!
* @brief send protocol mode confirm message
@@ -591,7 +567,8 @@ int sonata_prf_hogp_send_protocol_mode_confirm(uint8_t conidx, uint8_t hid_idx,
* @param report_map report map
* @return
*/
int sonata_prf_hogpd_send_report_map_confirm(uint8_t conidx, uint8_t hid_idx, uint8_t report_idx, uint8_t report_type, uint8_t report_map_len, const uint8_t *report_map);
int sonata_prf_hogpd_send_report_map_confirm(uint8_t conidx, uint8_t hid_idx, uint8_t report_idx, uint8_t report_type,
uint8_t report_map_len, const uint8_t *report_map);
/*!
* @brief sonata_prf_hogpd_add
@@ -626,7 +603,7 @@ void sonata_prf_hogp_mouse_data_send_report(ps_mouse_report_t report_buff);
* @param report
* @note only suit for default mouse HID report map, is app use custom HID report map, use sonata_prf_hogp_send_report_update_request()
*/
void sonata_prf_hogp_send_report_update_request_for_mouse(uint8_t report_idx , ps_mouse_report_t report);
void sonata_prf_hogp_send_report_update_request_for_mouse(uint8_t report_idx, ps_mouse_report_t report);
/*!
@@ -634,7 +611,8 @@ void sonata_prf_hogp_send_report_update_request_for_mouse(uint8_t report_idx , p
* @param ps_keyboard_report_t
* @return
*/
void sonata_prf_hogp_send_report_update_request_for_keyboard(uint8_t report_idx, uint8_t *ps_keyboard_report_t, uint8_t report_len);
void sonata_prf_hogp_send_report_update_request_for_keyboard(uint8_t report_idx, uint8_t *ps_keyboard_report_t,
uint8_t report_len);
/*!
@@ -666,7 +644,8 @@ void sonata_prf_hogpd_boot_mouse_input_report(uint8_t conidx, uint8_t hid_idx, u
* @param send_cfm
* @return
*/
void sonata_prf_hogpd_report(uint8_t conidx, uint8_t report_type, uint8_t hid_idx, uint8_t report_idx, uint8_t length, uint8_t *value, bool send_cfm);
void sonata_prf_hogpd_report(uint8_t conidx, uint8_t report_type, uint8_t hid_idx, uint8_t report_idx, uint8_t length,
uint8_t *value, bool send_cfm);
/*!
* @brief sonata_prf_hogpd_proto_mode_req
@@ -696,7 +675,8 @@ extern const sonata_api_subtask_handlers_t prf_hogpd_api_ke_msg_handlers;
* @brief sonata_prf_hogpd_reset
*/
void sonata_prf_hogpd_reset();
void sonata_hogpd_send_error_code(uint8_t conidx, uint8_t operation, uint8_t hid_idx, uint8_t report_type, uint8_t report_idx, uint8_t error_code);
void sonata_hogpd_send_error_code(uint8_t conidx, uint8_t operation, uint8_t hid_idx, uint8_t report_type,
uint8_t report_idx, uint8_t error_code);
/** @}*/
asr582x/liteos_m/sdk/drivers/ble_inc/sonata_prf_hogprh_api.h
+20 -33
View File
@@ -34,7 +34,6 @@
****************************************************************************************
*/
#include "sonata_config.h"
///@cond
#if BLE_HOST_PRESENT
///@endcond
@@ -59,10 +58,9 @@
/*!
* @brief
*/
typedef enum
{
typedef enum {
/// Peripheral Bonded
SONATA_TAG_PERIPH_BONDED = (APP_DATA_SAVE_TAG_FIRST+0),
SONATA_TAG_PERIPH_BONDED = (APP_DATA_SAVE_TAG_FIRST + 0),
/// Mouse NTF Cfg
SONATA_TAG_MOUSE_NTF_CFG,
/// Mouse Timeout value
@@ -79,13 +77,12 @@ typedef enum
SONATA_TAG_IRK,
/// RCS mode control handle
SONATA_TAG_CMD_HANDLE,
}sonata_app_nvds_tag;
} sonata_app_nvds_tag;
/*!
* @brief
*/
typedef enum
{
typedef enum {
/// Peripheral Bonded len
SONATA_LEN_PERIPH_BONDED = 1,
/// Mouse NTF Cfg len
@@ -104,11 +101,10 @@ typedef enum
SONATA_LEN_IRK = 16,
/// RCS mode control handle len
SONATA_LEN_CMD_HANDLE = 2,
}sonata_app_nvds_len;
} sonata_app_nvds_len;
/// Peer HID service info that can be read/write
enum sonata_hogprh_info
{
enum sonata_hogprh_info {
/// Protocol Mode
SONATA_HOGPRH_PROTO_MODE,
/// Report Map
@@ -131,8 +127,7 @@ enum sonata_hogprh_info
};
///Parameters of the @ref HOGPRH_READ_INFO_RSP message
typedef struct sonata_hogprh_read_info_req
{
typedef struct sonata_hogprh_read_info_req {
///Characteristic info @see enum hogprh_info
uint8_t info;
/// HID Service Instance - From 0 to HOGPRH_NB_HIDS_INST_MAX-1
@@ -142,12 +137,11 @@ typedef struct sonata_hogprh_read_info_req
/// - info = HOGPRH_REPORT_REF
/// - info = HOGPRH_REPORT_NTF_CFG
uint8_t report_idx;
}sonata_hogprh_read_info_req_t;
} sonata_hogprh_read_info_req_t;
/// HID Information structure
struct sonata_hids_hid_info
{
struct sonata_hids_hid_info {
/// bcdHID
uint16_t bcdHID;
/// bCountryCode
@@ -157,8 +151,7 @@ struct sonata_hids_hid_info
};
/// HID report info
struct sonata_hogprh_report
{
struct sonata_hogprh_report {
/// Report Length
uint8_t length;
/// Report value
@@ -166,8 +159,7 @@ struct sonata_hogprh_report
};
/// HID report Reference
struct sonata_hogprh_report_ref
{
struct sonata_hogprh_report_ref {
/// Report ID
uint8_t id;
/// Report Type
@@ -175,8 +167,7 @@ struct sonata_hogprh_report_ref
};
/// HID report MAP info
struct sonata_hogprh_report_map
{
struct sonata_hogprh_report_map {
/// Report MAP Length
uint16_t length;
/// Report MAP value
@@ -184,8 +175,7 @@ struct sonata_hogprh_report_map
};
/// HID report MAP reference
struct sonata_hogprh_report_map_ref
{
struct sonata_hogprh_report_map_ref {
/// Reference UUID length
uint8_t uuid_len;
/// Reference UUID Value
@@ -193,8 +183,7 @@ struct sonata_hogprh_report_map_ref
};
/// Information data
union sonata_hogprh_data
{
union sonata_hogprh_data {
/// Protocol Mode
/// - info = HOGPRH_PROTO_MODE
uint8_t proto_mode;
@@ -230,8 +219,7 @@ union sonata_hogprh_data
///Parameters of the @ref HOGPRH_WRITE_REQ message
typedef struct sonata_hogprh_write_req
{
typedef struct sonata_hogprh_write_req {
///Characteristic info @see enum hogprh_info
uint8_t info;
/// HID Service Instance - From 0 to HOGPRH_NB_HIDS_INST_MAX-1
@@ -245,16 +233,15 @@ typedef struct sonata_hogprh_write_req
bool wr_cmd;
/// Information data
union sonata_hogprh_data data;
}sonata_hogprh_write_req_t;
} sonata_hogprh_write_req_t;
/*!
* @brief Callback for hogpd value
*/
typedef struct
{
typedef struct {
uint16_t (*hogprh_report_indicate)(uint8_t hid_idx, uint8_t report_idx, uint8_t report_length, uint8_t *value);
}prf_hogprh_callback;
} prf_hogprh_callback;
/*!
* @brief sonata_prf_hogprh_init
@@ -295,13 +282,13 @@ void sonata_prf_hogprh_updata_conn_params(uint16_t intv_min, uint16_t intv_max,
* @brief sonata_prf_hogprh_write_req_handler
* @param param
*/
int sonata_prf_hogprh_write_req_handler(sonata_hogprh_write_req_t* param);
int sonata_prf_hogprh_write_req_handler(sonata_hogprh_write_req_t *param);
/*!
* @brief sonata_prf_hogprh_register_callback
* @param cb
*/
uint16_t sonata_prf_hogprh_register_callback(prf_hogprh_callback * cb);
uint16_t sonata_prf_hogprh_register_callback(prf_hogprh_callback *cb);
void sonata_prf_hogprh_reset();
asr582x/liteos_m/sdk/drivers/ble_inc/sonata_prf_otas_api.h
+2 -3
View File
@@ -46,8 +46,7 @@
* @brief Callback for ota status
****************************************************************************************
*/
typedef struct prf_ota_callback
{
typedef struct prf_ota_callback {
///app call before ota start
void (*prf_ota_before_start)(void);
///app call ota start
@@ -56,7 +55,7 @@ typedef struct prf_ota_callback
void (*prf_ota_stop)(void);
///app call ota fail
void (*prf_ota_fail)(void);
}prf_ota_callback_t;
} prf_ota_callback_t;
/*
* DEFINES
asr582x/liteos_m/sdk/drivers/ble_inc/sonata_sec_api.h
+19 -19
View File
@@ -49,7 +49,7 @@
****************************************************************************************
*/
/** security level **/
typedef enum{
typedef enum {
/** security mode 1 level 1: no security **/
SONATA_SEC_M1_L1 = 0,
/** security mode 1 level 2: unauthenticated pairing with encryption , no mitm protection **/
@@ -62,10 +62,10 @@ typedef enum{
SONATA_SEC_M2_L1,
/** authenticated pairing with data signing **/
SONATA_SEC_M2_L2,
}sonata_sec_lvl_t;
} sonata_sec_lvl_t;
/**IO capabilities**/
typedef enum{
typedef enum {
/** display only **/
SONATA_IO_CAP_DISPLAY_ONLY = 0,
/** display yes no **/
@@ -76,15 +76,15 @@ typedef enum{
SONATA_IO_CAP_NO_INPUT_NO_OUTPUT,
/** keyboard display **/
SONATA_IO_CAP_KB_DISPLAY,
}sonata_iocap_t;
} sonata_iocap_t;
/** OOB data present flag values **/
typedef enum{
typedef enum {
/** OOB data not present **/
SONATA_OOB_AUTH_DATA_NOT_PRESENT = 0,
/** OOB data present **/
SONATA_OOB_AUTH_DATA_PRESENT,
}sonata_oob_t;
} sonata_oob_t;
/** authentication requirements **/
@@ -95,25 +95,24 @@ typedef enum{
* Type Definition
****************************************************************************************
*/
typedef struct sonata_sec_api_cb{
typedef struct sonata_sec_api_cb {
struct sonata_sec_api_cb * _next;
}sonata_sec_api_cb_t;
struct sonata_sec_api_cb *_next;
} sonata_sec_api_cb_t;
typedef struct sonata_public_key
{
typedef struct sonata_public_key {
uint8_t pub_key_x[32];
uint8_t pub_key_y[32];
}sonata_public_key_t;
} sonata_public_key_t;
typedef void (* sonata_sec_public_key_gen_complete)(sonata_public_key_t * pub_key, uint16_t status) ;
typedef void (* sonata_sec_public_key_gen_complete)(sonata_public_key_t *pub_key, uint16_t status) ;
typedef void (*sonata_sec_ecdh_secret_complete) (const uint8_t* p_ecdh_secret,uint16_t status);
typedef void (*sonata_sec_ecdh_secret_complete) (const uint8_t *p_ecdh_secret, uint16_t status);
typedef void (*sonata_sec_ecdh_session_key_complete) (const uint8_t* p_ecdh_session,uint16_t status);
typedef void (*sonata_sec_ecdh_session_key_complete) (const uint8_t *p_ecdh_session, uint16_t status);
/*
@@ -131,13 +130,14 @@ extern void sonata_sec_api_init(void);
extern void sonata_sec_api_cb_register(sonata_sec_api_cb_t *cb);
void sonata_genc_DH_key(uint8_t* secret_key,uint8_t* public_key_x, uint8_t* public_key_y ,sonata_sec_ecdh_secret_complete callback);
void sonata_genc_DH_key(uint8_t *secret_key, uint8_t *public_key_x, uint8_t *public_key_y,
sonata_sec_ecdh_secret_complete callback);
void sonata_genc_public_key(uint8_t* secret_key,sonata_sec_public_key_gen_complete callback);
void sonata_genc_public_key(uint8_t *secret_key, sonata_sec_public_key_gen_complete callback);
void sonata_genc_secret_key(uint8_t* secret_key256);
void sonata_genc_secret_key(uint8_t *secret_key256);
void sonata_genc_session_key(uint8_t* secret_key,uint8_t *skd, sonata_sec_ecdh_session_key_complete callback);
void sonata_genc_session_key(uint8_t *secret_key, uint8_t *skd, sonata_sec_ecdh_session_key_complete callback);
#endif //_SONATA_SEC_API_H_
asr582x/liteos_m/sdk/drivers/ble_inc/sonata_stack_config.h
-1
View File
@@ -20,7 +20,6 @@
****************************************************************************************
*/
#include "sonata_stack_user_config.h"
#include "sonata_stack_fixed_config.h"
/*
asr582x/liteos_m/sdk/drivers/ble_inc/sonata_stack_user_config.h
-18
View File
@@ -28,25 +28,7 @@
#define SONATA_CFG_BLE_TRANSPORT
//#define SONATA_CFG_BLE_DIRECTION_FINDING
//#define SONATA_CFG_BLE_WLAN_COEX
//#define SONATA_CFG_MESH
//#define SONATA_CFG_DIS
//#define SONATA_CFG_BASS
#define SONATA_CFG_DBG
//#define SONATA_CFG_MESH_DBG
//#define SONATA_CFG_TRC
//#define SONATA_CFG_DISPLAY
//#define SONATA_CFG_NVDS
#endif /*SONATA_STACK_USER_CONFIG_H_*/
asr582x/liteos_m/sdk/drivers/ble_inc/sonata_util_list.h
+14 -14
View File
@@ -55,8 +55,7 @@
/// structure of a list element header
/*@TRACE*/
struct util_list_hdr
{
struct util_list_hdr {
/// Pointer to next util_list_hdr
struct util_list_hdr *next;
};
@@ -65,8 +64,7 @@ struct util_list_hdr
typedef struct util_list_hdr util_list_hdr_t;
/// structure of a list
struct util_list
{
struct util_list {
/// pointer to first element of the list
struct util_list_hdr *first;
/// pointer to the last element
@@ -90,7 +88,7 @@ typedef struct util_list util_list_t;
****************************************************************************************
*/
/// pop a specific element from the list
#define UTIL_LIST_POP_ELT(list, elt) util_list_extract(&(list), &(elt->hdr));
#define UTIL_LIST_POP_ELT(list, elt) util_list_extract(&(list), &((elt)->hdr))
/*
* FUNCTION DECLARATIONS
@@ -116,9 +114,9 @@ void util_list_init(struct util_list *list);
****************************************************************************************
*/
void util_list_pool_init(struct util_list *list,
void *pool,
size_t elmt_size,
uint32_t elmt_cnt);
void *pool,
size_t elmt_size,
uint32_t elmt_cnt);
/**
****************************************************************************************
@@ -142,7 +140,8 @@ void util_list_push_back(struct util_list *list, struct util_list_hdr *list_hdr)
* @param last_hdr Pointer to the last element to append
****************************************************************************************
*/
void util_list_push_back_sublist(struct util_list *list, struct util_list_hdr *first_hdr, struct util_list_hdr *last_hdr);
void util_list_push_back_sublist(struct util_list *list, struct util_list_hdr *first_hdr,
struct util_list_hdr *last_hdr);
/**
****************************************************************************************
@@ -186,7 +185,8 @@ bool util_list_extract(struct util_list *list, struct util_list_hdr *list_hdr);
* @param elt_to_rem_hdr Pointer to the element to be extracted
****************************************************************************************
*/
void util_list_extract_after(struct util_list *list, struct util_list_hdr *elt_ref_hdr, struct util_list_hdr *elt_to_rem_hdr);
void util_list_extract_after(struct util_list *list, struct util_list_hdr *elt_ref_hdr,
struct util_list_hdr *elt_to_rem_hdr);
/**
****************************************************************************************
@@ -238,7 +238,7 @@ void util_list_merge(struct util_list *list1, struct util_list *list2);
****************************************************************************************
*/
void util_list_insert_before(struct util_list *list,
struct util_list_hdr *elt_ref_hdr, struct util_list_hdr *elt_to_add_hdr);
struct util_list_hdr *elt_ref_hdr, struct util_list_hdr *elt_to_add_hdr);
/**
****************************************************************************************
@@ -252,7 +252,7 @@ void util_list_insert_before(struct util_list *list,
****************************************************************************************
*/
void util_list_insert_after(struct util_list *list,
struct util_list_hdr *elt_ref_hdr, struct util_list_hdr *elt_to_add_hdr);
struct util_list_hdr *elt_ref_hdr, struct util_list_hdr *elt_to_add_hdr);
/**
@@ -291,7 +291,7 @@ __INLINE bool util_list_is_empty(const struct util_list *const list)
*/
__INLINE struct util_list_hdr *util_list_pick(const struct util_list *const list)
{
return(list->first);
return (list->first);
}
@@ -306,7 +306,7 @@ __INLINE struct util_list_hdr *util_list_pick(const struct util_list *const list
*/
__INLINE struct util_list_hdr *util_list_next(const struct util_list_hdr *const list_hdr)
{
return(list_hdr->next);
return (list_hdr->next);
}
/// @} UTIL_LIST
asr582x/liteos_m/sdk/drivers/ble_inc/sonata_utils_api.h
+62 -65
View File
@@ -34,6 +34,7 @@
#include "sonata_error_api.h"
#include "sonata_ble_hook.h"
#include "compiler.h" // for __INLINE
#include "stdbool.h"
/**
* @defgroup SONATA_UTILS_API UTILS_API
@@ -75,55 +76,52 @@
*/
/*!
* @brief app msg operation type
*/
typedef enum
{
/// at command operation
APP_MSG_AT_CMD = (1 << 0),
APP_MSG_UART_CMD = (5),
/*!
* @brief app msg operation type
*/
typedef enum {
/// at command operation
APP_MSG_AT_CMD = (1 << 0),
APP_MSG_UART_CMD = (5),
APP_MSG_HID_TIMER = (10),
APP_MSG_HID_TIMER = (10),
APP_MSG_LAST,
}app_msg_op_t;
APP_MSG_LAST,
} app_msg_op_t;
/*!
* @brief file system possible return status
*/
typedef enum
{
/// SONATA FILE SYSTEM status OK
SONATA_FS_OK,
/// generic SONATA FILE SYSTEM status KO
SONATA_FS_FAIL,
/// SONATA FILE SYSTEM TAG unrecognized
SONATA_FS_TAG_NOT_DEFINED,
/// No space for SONATA FILE SYSTEM
SONATA_FS_NO_SPACE_AVAILABLE,
/// Length violation
SONATA_FS_LENGTH_OUT_OF_RANGE,
/// SONATA FILE SYSTEM parameter locked
SONATA_FS_PARAM_LOCKED,
/// SONATA FILE SYSTEM corrupted
SONATA_FS_CORRUPT,
/// SONATA FILE TYPE OUT RANGE
SONATA_FS_OT_RANGE,
}SONATA_FS_STATUS;
/*!
* @brief file system possible return status
*/
typedef enum {
/// SONATA FILE SYSTEM status OK
SONATA_FS_OK,
/// generic SONATA FILE SYSTEM status KO
SONATA_FS_FAIL,
/// SONATA FILE SYSTEM TAG unrecognized
SONATA_FS_TAG_NOT_DEFINED,
/// No space for SONATA FILE SYSTEM
SONATA_FS_NO_SPACE_AVAILABLE,
/// Length violation
SONATA_FS_LENGTH_OUT_OF_RANGE,
/// SONATA FILE SYSTEM parameter locked
SONATA_FS_PARAM_LOCKED,
/// SONATA FILE SYSTEM corrupted
SONATA_FS_CORRUPT,
/// SONATA FILE TYPE OUT RANGE
SONATA_FS_OT_RANGE,
} SONATA_FS_STATUS;
typedef uint8_t sonata_fs_len_t;
typedef uint8_t sonata_fs_tag_t;
/*!
* @brief ble addr priority return result
*/
typedef enum
{
typedef enum {
///efuse > nvds
SONATA_MAC_USE_EFUSE,
///nvds > efuse
SONATA_MAC_USE_NVDS,
}SONATA_MAC_PRIORITY;
} SONATA_MAC_PRIORITY;
@@ -135,30 +133,28 @@ typedef enum
typedef uint8_t (*PF_SONATA_API_APP_MSG_HANDLER)(void *p_param);
/// asr api task messages
typedef struct sonata_api_app_msg{
typedef struct sonata_api_app_msg {
uint8_t operation;
PF_SONATA_API_APP_MSG_HANDLER function;
}sonata_api_app_msg_t;
} sonata_api_app_msg_t;
/// asr api task message array
typedef struct sonata_api_app_msg_array{
typedef struct sonata_api_app_msg_array {
int msg_num;
sonata_api_app_msg_t *msg[SONATA_API_MAX_APP_MSG];
}sonata_api_app_msg_array_t;
} sonata_api_app_msg_array_t;
/// asr api task message array
typedef struct sonata_api_app_ke_msg
{
typedef struct sonata_api_app_ke_msg {
uint8_t operation;
void *p_param;
}sonata_api_app_ke_msg_t;
} sonata_api_app_ke_msg_t;
/// Ble bt addr priority callback
typedef struct
{
typedef struct {
SONATA_MAC_PRIORITY (*ble_addr_priority)(void);
}ble_addr_callback_t;
} ble_addr_callback_t;
/**
****************************************************************************************
* @brief Call back definition of the function that can handle result of an AES based algorithm
@@ -168,7 +164,7 @@ typedef struct
* @param[in] src_info Information provided by requester
****************************************************************************************
*/
typedef void (*aes_func_result_cb) (uint8_t status, const uint8_t* aes_res, uint32_t src_info);
typedef void (*aes_func_result_cb) (uint8_t status, const uint8_t *aes_res, uint32_t src_info);
/*
@@ -205,7 +201,7 @@ uint8_t sonata_api_app_ke_msg_handler(void *p_param);
void sonata_api_util_gap_status_print(uint8_t status);
///@hide
void sonata_api_util_gatt_status_print(uint8_t operation,uint8_t status);
void sonata_api_util_gatt_status_print(uint8_t operation, uint8_t status);
/**
@@ -290,7 +286,7 @@ uint8_t sonata_fs_write(sonata_fs_tag_t tag, sonata_fs_len_t length, uint8_t *bu
* @return uint8_t @see SONATA_FS_STATUS
****************************************************************************************
*/
uint8_t sonata_fs_read(sonata_fs_tag_t tag, sonata_fs_len_t * lengthPtr, uint8_t *buf);
uint8_t sonata_fs_read(sonata_fs_tag_t tag, sonata_fs_len_t *lengthPtr, uint8_t *buf);
/**
***************************************************************************************
@@ -307,7 +303,7 @@ uint8_t sonata_fs_erase(sonata_fs_tag_t tag);
* @brief get BT address
* @return address
*/
uint8_t * sonata_get_bt_address();
uint8_t *sonata_get_bt_address(void);
/**
@@ -321,7 +317,7 @@ uint8_t * sonata_get_bt_address();
* @return void
****************************************************************************************
*/
void sonata_set_bt_address(uint8_t * bd_addr,uint8_t length);
void sonata_set_bt_address(uint8_t *bd_addr, uint8_t length);
/**
***************************************************************************************
@@ -334,7 +330,7 @@ void sonata_set_bt_address(uint8_t * bd_addr,uint8_t length);
* @return void
****************************************************************************************
*/
void sonata_set_bt_address_no_save(uint8_t * bd_addr,uint8_t length);
void sonata_set_bt_address_no_save(uint8_t *bd_addr, uint8_t length);
/**
****************************************************************************************
@@ -347,7 +343,7 @@ void sonata_set_bt_address_no_save(uint8_t * bd_addr,uint8_t length);
* @return bool : true for encryption is ongoing, false for some error
****************************************************************************************
*/
bool sonata_aes_app_encrypt(uint8_t* key, uint8_t *val, aes_func_result_cb res_cb, uint32_t src_info);
bool sonata_aes_app_encrypt(uint8_t *key, uint8_t *val, aes_func_result_cb res_cb, uint32_t src_info);
/**
****************************************************************************************
@@ -360,7 +356,7 @@ bool sonata_aes_app_encrypt(uint8_t* key, uint8_t *val, aes_func_result_cb res_c
* @return bool : true for decryption is ongoing, false for some error
****************************************************************************************
*/
bool sonata_aes_app_decrypt(uint8_t* key, uint8_t *val, aes_func_result_cb res_cb, uint32_t src_info);
bool sonata_aes_app_decrypt(uint8_t *key, uint8_t *val, aes_func_result_cb res_cb, uint32_t src_info);
/*!
* @brief change pin code to byte
@@ -368,14 +364,14 @@ bool sonata_aes_app_decrypt(uint8_t* key, uint8_t *val, aes_func_result_cb res_c
* @param bytes
* @param byte_len
*/
void sonata_passkey_pincode_to_byte(uint32_t pin_code, uint8_t * bytes, uint8_t byte_len);
void sonata_passkey_pincode_to_byte(uint32_t pin_code, uint8_t *bytes, uint8_t byte_len);
/*!
* @brief change byte to pin code
* @param bytes
* @return
*/
uint32_t sonata_passkey_byte_to_pincode(uint8_t * bytes);
uint32_t sonata_passkey_byte_to_pincode(uint8_t *bytes);
/*!
* @brief Get information form advertising report
@@ -387,20 +383,21 @@ uint32_t sonata_passkey_byte_to_pincode(uint8_t * bytes);
* @param rel_length [out] for target information
* @return TRUE for target fond, FALSE for not found
*/
bool sonata_get_adv_report_info(uint8_t type, uint8_t *info, uint16_t info_length, uint8_t *report, uint16_t report_length, uint16_t *rel_length);
bool sonata_get_adv_report_info(uint8_t type, uint8_t *info, uint16_t info_length, uint8_t *report,
uint16_t report_length, uint16_t *rel_length);
/*!
* @brief Get system tick value
* @return System tick
*/
uint32_t sonata_get_sys_time();
uint32_t sonata_get_sys_time(void);
/*!
* @brief Reset BLE stack
* @return
*/
void sonata_ble_stack_reset();
void sonata_ble_stack_reset(void);
/*!
* @brief Get boot type value
@@ -443,15 +440,15 @@ __INLINE uint32_t util_min(uint32_t a, uint32_t b)
__INLINE void util_write16p(void const *ptr16, uint16_t value)
{
uint8_t *ptr=(uint8_t*)ptr16;
uint8_t *ptr = (uint8_t *)ptr16;
*ptr++ = value&0xff;
*ptr = (value&0xff00)>>8;
*ptr++ = value & 0xff;
*ptr = (value & 0xff00) >> 8;
}
__INLINE uint16_t util_read16p(void const *ptr16)
{
uint16_t value = ((uint8_t *)ptr16)[0] | ((uint8_t *)ptr16)[1] << 8;
uint16_t value = (((uint8_t *)ptr16)[0]) | (((uint8_t *)ptr16)[1] << 8);
return value;
}
@@ -460,10 +457,10 @@ __INLINE uint32_t util_read32p(void const *ptr32)
uint16_t addr_l, addr_h;
addr_l = util_read16p((uint16_t *)ptr32);
addr_h = util_read16p((uint16_t *)ptr32 + 1);
return ((uint32_t)addr_l | (uint32_t)addr_h << 16);
return (((uint32_t)addr_l) | (((uint32_t)addr_h) << 16));
}
void sonata_platform_reset();
void sonata_platform_reset(void);
asr582x/liteos_m/sdk/drivers/ble_src/app.c
+728 -1058
View File
File diff suppressed because it is too large Load Diff
asr582x/liteos_m/sdk/drivers/ble_src/at_ble.c
+123 -170
View File
@@ -23,34 +23,34 @@
#include "aos/cli.h"
#endif
#include "duet_gpio.h"
#include "msm_ble_api.h"
static uint8_t string_asc_to_hex(char param)
{
uint8_t val;
if((param >= 48) && (param <= 57))
val = param-48;
else if((param >= 65) && (param <= 70))
val = param-55;
else if((param >= 97) && (param <= 102))
val = param-87;
else
{
if ((param >= '0') && (param <= '9')) {
val = param - '0';
} else if ((param >= 'A') && (param <= 'F')) {
val = (uint8_t)(param - 'A') + 0xA;
} else if ((param >= 'a') && (param <= 'f')) {
val = (uint8_t)(param - 'a') + 0xA;
} else {
val = 0xA;
}
return val;
}
static void sonata_string_to_array(char *input_str, uint8_t input_length,uint8_t *hex_addr)
static void sonata_string_to_array(char *input_str, uint8_t input_length, uint8_t *hex_addr)
{
int i;
input_length = (input_length + 1) &0xFFFE;
for(i = 0; i < input_length; i++)
{
if(i%2 || i==1)
hex_addr[i>>1] = string_asc_to_hex(input_str[i]) | (hex_addr[i>>1]&0xF0);
else
hex_addr[i>>1] = (string_asc_to_hex(input_str[i])<<4) | (hex_addr[i>>1]&0xF);
input_length = (input_length + 1) & 0xFFFE;
for (i = 0; i < input_length; i++) {
if (i % 2 || i == 1) {
hex_addr[i >> 1] = string_asc_to_hex(input_str[i]) | (hex_addr[i >> 1] & 0xF0);
} else {
hex_addr[i >> 1] = (string_asc_to_hex(input_str[i]) << 4) | (hex_addr[i >> 1] & 0xF);
}
}
}
@@ -61,200 +61,164 @@ duet_gpio_dev_t g_duet_gpio6;
void lega_ble_adv(char *pwbuf, int blen, int argc, char **argv)
{
int c=1;
int c = 1;
if(strcmp(argv[c],"start")==0 && argc > 2)
{
if (strcmp(argv[c], "start") == 0 && argc > 2) {
printf("adv start!!!!!!!!!!! \r\n");
uint8_t hex_value[32];
memset(hex_value,0,32);
uint16_t hex_length = (strlen(argv[c +1]) + 1)/2;
sonata_string_to_array(argv[c +1] ,strlen(argv[c +1]),hex_value);
duet_gpio_output_toggle(&g_duet_gpio11);
duet_gpio_output_toggle(&g_duet_gpio12);
duet_gpio_output_toggle(&g_duet_gpio6);
uint8_t hex_value[32];
memset(hex_value, 0, sizeof(hex_value));
uint16_t hex_length = (strlen(argv[c + 1]) + 1) / 2;
sonata_string_to_array(argv[c + 1], strlen(argv[c + 1]), hex_value);
duet_gpio_output_toggle(&g_duet_gpio11);
duet_gpio_output_toggle(&g_duet_gpio12);
duet_gpio_output_toggle(&g_duet_gpio6);
#ifdef HARMONYOS_TEMP
#else
ms_test_ble_adv_start(hex_value,hex_length,NULL,0);
ms_test_ble_adv_start(hex_value, hex_length, NULL, 0);
#endif
}else
if(strcmp(argv[c],"stop")==0)
{
app_ble_advertising_stop(0);
} else if (strcmp(argv[c], "stop") == 0) {
app_ble_advertising_stop(0);
}
}
#ifdef ALIOS_SUPPORT
static struct cli_command adv_cmd =
{
.name = "adv",
.help = "adv start|stop [adv data] [rsp data]",
.function = lega_ble_adv,
static struct cli_command adv_cmd = {
.name = "adv",
.help = "adv start|stop [adv data] [rsp data]",
.function = lega_ble_adv,
};
#endif
void lega_ble_scan(char *pwbuf, int blen, int argc, char **argv)
{
int c=0;
int c = 0;
for(c=1;c<argc;c++)
{
if(strcmp(argv[c],"start")==0)
{
sonata_api_app_timer_set(8,20);
sonata_api_app_timer_active(8);
}else
if(strcmp(argv[c],"stop")==0)
{
app_ble_stop_scanning();
}
for (c = 1; c < argc; c++) {
if (strcmp(argv[c], "start") == 0) {
sonata_api_app_timer_set(8, 20);
sonata_api_app_timer_active(8);
} else if (strcmp(argv[c], "stop") == 0) {
app_ble_stop_scanning();
}
}
}
#ifdef ALIOS_SUPPORT
static struct cli_command scan_cmd =
{
.name = "scan",
.help = "scan start|stop",
.function = lega_ble_scan,
static struct cli_command scan_cmd = {
.name = "scan",
.help = "scan start|stop",
.function = lega_ble_scan,
};
#endif
void lega_ble_adv_open_close_test(char *pwbuf, int blen, int argc, char **argv)
{
int c=1;
if(strcmp(argv[c],"start")==0)
{
//
// memset(adv_value,0,32);
// test_count = 100;
// uint16_t adv_length = (strlen(argv[c +1]) + 1)/2;
app_ble_set_test_count(200);
sonata_api_app_timer_set(6,20);
sonata_api_app_timer_active(6);
// sonata_string_to_array(argv[c +1] ,strlen(argv[c +1]),hex_value);
// ms_hal_ble_adv_start(hex_value,hex_length,NULL,0);
}else
if(strcmp(argv[c],"stop")==0)
{
int c = 1;
if (strcmp(argv[c], "start") == 0) {
app_ble_set_test_count(200);
sonata_api_app_timer_set(6, 20);
sonata_api_app_timer_active(6);
} else if (strcmp(argv[c], "stop") == 0) {
app_ble_set_test_count(0);
}
}
#ifdef ALIOS_SUPPORT
static struct cli_command adv_per_cmd =
{
.name = "adv-per",
.help = "adv-per start|stop [adv data] ",
.function = lega_ble_adv_open_close_test,
static struct cli_command adv_per_cmd = {
.name = "adv-per",
.help = "adv-per start|stop [adv data] ",
.function = lega_ble_adv_open_close_test,
};
#endif
void lega_ble_adv_update_test(char *pwbuf, int blen, int argc, char **argv)
{
int c=1;
if(strcmp(argv[c],"start")==0)
{
// memset(adv_value,0,32);
// uint16_t adv_length = (strlen(argv[c +1]) + 1)/2;
app_ble_set_test_count(200);
sonata_api_app_timer_set(7,20);
sonata_api_app_timer_active(7);
// sonata_string_to_array(argv[c +1] ,strlen(argv[c +1]),hex_value);
// ms_hal_ble_adv_start(hex_value,hex_length,NULL,0);
}else
if(strcmp(argv[c],"stop")==0)
{
app_ble_set_test_count(0);
int c = 1;
if (strcmp(argv[c], "start") == 0) {
app_ble_set_test_count(200);
sonata_api_app_timer_set(7, 20);
sonata_api_app_timer_active(7);
} else if (strcmp(argv[c], "stop") == 0) {
app_ble_set_test_count(0);
}
}
#ifdef ALIOS_SUPPORT
static struct cli_command update_cmd =
{
.name = "adv-update",
.help = "adv-update start|stop ",
.function = lega_ble_adv_update_test,
static struct cli_command update_cmd = {
.name = "adv-update",
.help = "adv-update start|stop ",
.function = lega_ble_adv_update_test,
};
#endif
void lega_ble_connect_test(char *pwbuf, int blen, int argc, char **argv)
{
int c=1;
if(strcmp(argv[c],"start")==0)
{
uint8_t hex_value[6];
sonata_string_to_array(argv[c +1] ,strlen(argv[c +1]),hex_value);
app_ble_set_test_target(hex_value);
sonata_api_app_timer_set(3,20);
sonata_api_app_timer_active(3);
int c = 1;
if (strcmp(argv[c], "start") == 0) {
uint8_t hex_value[6];
sonata_string_to_array(argv[c + 1], strlen(argv[c + 1]), hex_value);
app_ble_set_test_target(hex_value);
sonata_api_app_timer_set(3, 20);
sonata_api_app_timer_active(3);
}else
{
sonata_ble_stop_initiating();
} else {
sonata_ble_stop_initiating();
}
}
#ifdef ALIOS_SUPPORT
static struct cli_command connect_cmd =
{
.name = "connect",
.help = "connect start|stop target_addr",
.function = lega_ble_connect_test,
static struct cli_command connect_cmd = {
.name = "connect",
.help = "connect start|stop target_addr",
.function = lega_ble_connect_test,
};
#endif
void lega_ble_write_test(char *pwbuf, int blen, int argc, char **argv)
{
int c=1;
if(strcmp(argv[c],"start")==0)
{
sonata_api_app_timer_set(4,20);
sonata_api_app_timer_active(4);
app_ble_set_test_interval(atoi(argv[c+1]));
int c = 1;
if (strcmp(argv[c], "start") == 0) {
sonata_api_app_timer_set(4, 20);
sonata_api_app_timer_active(4);
app_ble_set_test_interval(atoi(argv[c + 1]));
}else
{
sonata_api_app_timer_clear(4);
} else {
sonata_api_app_timer_clear(4);
}
}
#ifdef ALIOS_SUPPORT
static struct cli_command write_cmd =
{
.name = "write",
.help = "write start| stop {interval}",
.function = lega_ble_write_test,
static struct cli_command write_cmd = {
.name = "write",
.help = "write start| stop {interval}",
.function = lega_ble_write_test,
};
#endif
void lega_ble_disconnect_test(char *pwbuf, int blen, int argc, char **argv)
{
int c=1;
if(argc == 2 )
{
app_ble_disconnect(0); //TODO hehe
int c = 1;
if (argc == 2 ) {
app_ble_disconnect(0);
}
}
#ifdef ALIOS_SUPPORT
static struct cli_command disconnect_cmd =
{
.name = "disconnect",
.help = "disconnect target_addr",
.function = lega_ble_disconnect_test,
static struct cli_command disconnect_cmd = {
.name = "disconnect",
.help = "disconnect target_addr",
.function = lega_ble_disconnect_test,
};
#endif
void lega_ble_test_mode(char *pwbuf, int blen, int argc, char **argv)
{
int c=1;
if(strcmp(argv[c],"on")==0)
{
int c = 1;
if (strcmp(argv[c], "on") == 0) {
printf("ble test on \r\n");
//gpio1 output
//gpio1 output
g_duet_gpio11.port = GPIO11_INDEX;
g_duet_gpio11.config = DUET_OUTPUT_PUSH_PULL;
g_duet_gpio11.priv = NULL;
@@ -277,19 +241,16 @@ void lega_ble_test_mode(char *pwbuf, int blen, int argc, char **argv)
app_set_ble_test_mode(true);
}
else
{
} else {
app_set_ble_test_mode(false);
}
}
#ifdef ALIOS_SUPPORT
static struct cli_command test_cmd =
{
.name = "ble-test-mode",
.help = "ble-test-mode {on|off}",
.function = lega_ble_test_mode,
static struct cli_command test_cmd = {
.name = "ble-test-mode",
.help = "ble-test-mode {on|off}",
.function = lega_ble_test_mode,
};
#endif
@@ -297,61 +258,53 @@ void lega_ble_adv_state(char *pwbuf, int blen, int argc, char **argv)
{
extern void app_print_adv_status(void);
app_print_adv_status();
sonata_api_app_timer_set(5,500);
sonata_api_app_timer_set(5, 500);
sonata_api_app_timer_active(5);
}
#ifdef ALIOS_SUPPORT
static struct cli_command adv_state =
{
.name = "printf-adv-state",
.help = "printf-adv-state",
.function = lega_ble_adv_state,
static struct cli_command adv_state = {
.name = "printf-adv-state",
.help = "printf-adv-state",
.function = lega_ble_adv_state,
};
#endif
void lega_ble_set_uuid(char *pwbuf, int blen, int argc, char **argv)
{
extern void app_ble_set_test_write_uuid(uint8_t * uuid);
extern void app_ble_set_test_read_uuid(uint8_t * uuid);
int c = 1;
uint8_t hex_value[6];
sonata_string_to_array(argv[c] ,strlen(argv[c]),hex_value);
app_ble_set_test_write_uuid(hex_value);
app_ble_set_test_read_uuid(hex_value);
uint8_t hex_value[6];
sonata_string_to_array(argv[c], strlen(argv[c]), hex_value);
app_ble_set_test_write_uuid(hex_value);
app_ble_set_test_read_uuid(hex_value);
extern void ble_set_max_mtu(uint16_t mtu);
ble_set_max_mtu(200);
ble_set_max_mtu(200);
}
#ifdef ALIOS_SUPPORT
static struct cli_command set_test_uuid =
{
.name = "test-uuid",
.help = "test-uuid {uuid}",
.function = lega_ble_set_uuid,
static struct cli_command set_test_uuid = {
.name = "test-uuid",
.help = "test-uuid {uuid}",
.function = lega_ble_set_uuid,
};
#endif
void lega_ble_add_test_service(char *pwbuf, int blen, int argc, char **argv)
{
extern int ms_add_test_service(void);
#ifdef HARMONYOS_TEMP
//ms_add_test_service();
#else
#else
ms_add_test_service();
#endif
}
#ifdef ALIOS_SUPPORT
static struct cli_command add_test_service =
{
.name = "add-test-service",
.help = "add-test-service",
.function = lega_ble_add_test_service,
static struct cli_command add_test_service = {
.name = "add-test-service",
.help = "add-test-service",
.function = lega_ble_add_test_service,
};
asr582x/liteos_m/sdk/drivers/ble_src/harmony_ble_adpter.c
+395 -436
View File
File diff suppressed because it is too large Load Diff
asr582x/liteos_m/sdk/drivers/common/duet_common.h
+1 -3
View File
@@ -16,14 +16,12 @@
#ifndef _DUET_COMM_H_
#define _DUET_COMM_H_
#include <stdio.h>
#include <stdint.h>
#include <stdlib.h>
#define DUET_STR_TO_INT_ERR 0xFFFFFFFF
#define LEGA_STR_TO_INT_ERR DUET_STR_TO_INT_ERR
void jumpToApp(int addr);
void duet_memset(char *buf,int value, int size);
void duet_memset(char *buf, int value, int size);
void duet_memcpy(char *dst, char *src, int size);
void udelay(unsigned int us);
void delay(unsigned int cycles);
asr582x/liteos_m/sdk/drivers/common/lega_dbg.c
+6 -5
View File
@@ -28,16 +28,17 @@ char other_m[6] = "Other";
char *component_info(uint32_t module_t)
{
if(module_t & LWIFI_COMP)
if (module_t &LWIFI_COMP) {
return lwifi_m;
else if(module_t & UWIFI_COMP)
} else if (module_t &UWIFI_COMP) {
return uwifi_m;
else if(module_t & OS_COMP)
} else if (module_t &OS_COMP) {
return os_m;
else if(module_t & LWIP_COMP)
} else if (module_t &LWIP_COMP) {
return lwip_m;
else if(module_t & AT_COMP)
} else if (module_t &AT_COMP) {
return at_m;
}
return other_m;
}
asr582x/liteos_m/sdk/drivers/common/lega_dbg.h
+1 -1
View File
@@ -16,8 +16,8 @@
#ifndef _LEGA_DBG_H_
#define _LEGA_DBG_H_
#include "lega_types.h"
#include <stdio.h>
#include "lega_types.h"
#define D_CRT 1
#define D_ERR 2
asr582x/liteos_m/sdk/drivers/common/lega_types.h
+3 -5
View File
@@ -26,7 +26,6 @@
#define _TYPES_H_
#include <stdint.h>
#include <stdbool.h>
#if 0 // use standard defines
@@ -78,12 +77,11 @@ typedef unsigned char bool;
#ifndef NULL
#define NULL (void*)0
#endif
#define BIT(n) (1<<n)
#define BIT(n) (1<<(n))
#define CO_WF_BIT(pos) (1U<<(pos))
/// structure of a list element header
struct co_wf_list_hdr
{
struct co_wf_list_hdr {
/// Pointer to the next element in the list
struct co_wf_list_hdr *next;
};
@@ -92,7 +90,7 @@ inline static uint16_t ___swap16(uint16_t x)
{
uint16_t __x = x;
return ((uint16_t)((((uint16_t)(__x) & (uint16_t)0x00ffU) << 8) |
(((uint16_t)(__x) & (uint16_t)0xff00U) >> 8)));
(((uint16_t)(__x) & (uint16_t)0xff00U) >> 8)));
}
inline static uint16_t __arch__swap16(uint16_t x)
asr582x/liteos_m/sdk/drivers/driver/inc/duet.h
+81 -109
View File
@@ -23,8 +23,7 @@ typedef enum { DISABLE = 0, ENABLE = !DISABLE } State;
typedef enum IRQn
{
typedef enum IRQn {
/************** Processor Exceptions Numbers ******************************************/
NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt */
MemoryManagement_IRQn = -12, /*!< 4 Cortex-M3 Memory Management Interrupt */
@@ -71,24 +70,22 @@ typedef enum IRQn
/*
system control register definition
*/
typedef struct Sys_Con_Block
{
union
{
typedef struct Sys_Con_Block {
union {
struct
{
__IO uint32_t hclk_src_sel:2;
__IO uint32_t pclk_div_sel:3;
__IO uint32_t kp_sclk_sel:1;
__IO uint32_t timer1_sclk_sel:1;
__IO uint32_t timer2_sclk_sel:1;
__IO uint32_t timer3_sclk_sel:1;
__IO uint32_t timer4_sclk_sel:1;
__IO uint32_t rw_mst_clk_freq_sel:6;
__I uint32_t rsv0:1;
__IO uint32_t pwm_pclk_sel:1;
__I uint32_t rsv1:14;
__IO uint32_t hclk_src_sel: 2;
__IO uint32_t pclk_div_sel: 3;
__IO uint32_t kp_sclk_sel: 1;
__IO uint32_t timer1_sclk_sel: 1;
__IO uint32_t timer2_sclk_sel: 1;
__IO uint32_t timer3_sclk_sel: 1;
__IO uint32_t timer4_sclk_sel: 1;
__IO uint32_t rw_mst_clk_freq_sel: 6;
__I uint32_t rsv0: 1;
__IO uint32_t pwm_pclk_sel: 1;
__I uint32_t rsv1: 14;
} BITS_CLK_SEL;
__IO uint32_t REG_00;
};
@@ -100,14 +97,12 @@ typedef struct Sys_Con_Block
__IO uint32_t REG_18;
__IO uint32_t REG_1C;
/* I2S clock divider */
union
{
struct
{
__IO uint32_t i2s_ws_div:8;
__IO uint32_t i2s_sclk_div:8;
__IO uint32_t i2s_mclk_div:8;
__IO uint32_t RESV3:8;
union {
struct {
__IO uint32_t i2s_ws_div: 8;
__IO uint32_t i2s_sclk_div: 8;
__IO uint32_t i2s_mclk_div: 8;
__IO uint32_t RESV3: 8;
} BITS_REG_20;
__IO uint32_t REG_20;
};
@@ -128,63 +123,55 @@ typedef struct Sys_Con_Block
__IO uint32_t REG_5C;
__IO uint32_t REG_60;
__IO uint32_t REG_64;
union
{
struct
{
__IO uint32_t zr_gp0_sel:4;
__IO uint32_t zr_gp1_sel:4;
__IO uint32_t zr_gp2_sel:4;
__IO uint32_t zr_gp3_sel:4;
__IO uint32_t zr_gp4_sel:4;
__IO uint32_t zr_gp5_sel:4;
__IO uint32_t zr_gp6_sel:4;
__IO uint32_t zr_gp7_sel:4;
union {
struct {
__IO uint32_t zr_gp0_sel: 4;
__IO uint32_t zr_gp1_sel: 4;
__IO uint32_t zr_gp2_sel: 4;
__IO uint32_t zr_gp3_sel: 4;
__IO uint32_t zr_gp4_sel: 4;
__IO uint32_t zr_gp5_sel: 4;
__IO uint32_t zr_gp6_sel: 4;
__IO uint32_t zr_gp7_sel: 4;
} BITS_REG_68;
__IO uint32_t REG_68; /* pinmux control */
};
union
{
struct
{
__IO uint32_t zr_gp8_sel:4;
__IO uint32_t zr_gp9_sel:4;
__IO uint32_t zr_gp10_sel:4;
__IO uint32_t zr_gp11_sel:4;
__IO uint32_t zr_gp12_sel:4;
__IO uint32_t zr_gp13_sel:4;
__IO uint32_t zr_gp14_sel:4;
__IO uint32_t zr_gp15_sel:4;
union {
struct {
__IO uint32_t zr_gp8_sel: 4;
__IO uint32_t zr_gp9_sel: 4;
__IO uint32_t zr_gp10_sel: 4;
__IO uint32_t zr_gp11_sel: 4;
__IO uint32_t zr_gp12_sel: 4;
__IO uint32_t zr_gp13_sel: 4;
__IO uint32_t zr_gp14_sel: 4;
__IO uint32_t zr_gp15_sel: 4;
} BITS_REG_6C;
__IO uint32_t REG_6C; /* pinmux control */
};
union
{
struct
{
__IO uint32_t zr_gp16_sel:4;
__IO uint32_t zr_gp17_sel:4;
__IO uint32_t zr_gp18_sel:4;
__IO uint32_t zr_gp19_sel:4;
__IO uint32_t zr_gp20_sel:4;
__IO uint32_t zr_gp21_sel:4;
__IO uint32_t zr_gp22_sel:4;
__IO uint32_t zr_gp23_sel:4;
union {
struct {
__IO uint32_t zr_gp16_sel: 4;
__IO uint32_t zr_gp17_sel: 4;
__IO uint32_t zr_gp18_sel: 4;
__IO uint32_t zr_gp19_sel: 4;
__IO uint32_t zr_gp20_sel: 4;
__IO uint32_t zr_gp21_sel: 4;
__IO uint32_t zr_gp22_sel: 4;
__IO uint32_t zr_gp23_sel: 4;
} BITS_REG_70;
__IO uint32_t REG_70; /* pinmux control */
};
union
{
struct
{
__IO uint32_t zr_gp24_sel:4;
__IO uint32_t zr_gp25_sel:4;
__IO uint32_t zr_gp26_sel:4;
__IO uint32_t zr_gp27_sel:4;
__IO uint32_t zr_gp28_sel:4;
__IO uint32_t zr_gp29_sel:4;
__IO uint32_t zr_gp30_sel:4;
__I uint32_t rsv7:4;
union {
struct {
__IO uint32_t zr_gp24_sel: 4;
__IO uint32_t zr_gp25_sel: 4;
__IO uint32_t zr_gp26_sel: 4;
__IO uint32_t zr_gp27_sel: 4;
__IO uint32_t zr_gp28_sel: 4;
__IO uint32_t zr_gp29_sel: 4;
__IO uint32_t zr_gp30_sel: 4;
__I uint32_t rsv7: 4;
} BITS_REG_74;
__IO uint32_t REG_74; /* pinmux control */
};
@@ -241,8 +228,7 @@ typedef struct Sys_Con_Block
#define DMA_BUFFER_REG (0X4000C000)
/* pinmux definitions */
enum PINMUX_FUNC
{
enum PINMUX_FUNC {
GPIO_FUNC,
UART_FUNC,
SPI_FUNC,
@@ -258,8 +244,7 @@ enum PINMUX_FUNC
*/
#define DMA_REG_BASE (0x40004000)
typedef struct __DMACR
{
typedef struct __DMACR {
__I uint32_t STAT;
__O uint32_t CFG;
__IO uint32_t CTL_BASE_PTR;
@@ -301,8 +286,7 @@ typedef struct __DMACR
/*
DUET I2S definition
*/
typedef struct __I2S
{
typedef struct __I2S {
/* channel-common registers */
__IO uint32_t IER; // 0x00
__IO uint32_t IRER; // 0x04
@@ -349,14 +333,13 @@ typedef struct __I2S
#define I2S ((I2S_TypeDef *)I2S_BASE)
/* I2S clock divider */
typedef struct
{
__IO uint32_t i2s_lrclk_divider:9;
__IO uint32_t i2s_lrclk_delay_sel:1;
__IO uint32_t i2s_sclk_divider:10;
__IO uint32_t i2s_mclk_divider:10;
__IO uint32_t i2s_slave_mode:1;
__IO uint32_t reserved:1;
typedef struct {
__IO uint32_t i2s_lrclk_divider: 9;
__IO uint32_t i2s_lrclk_delay_sel: 1;
__IO uint32_t i2s_sclk_divider: 10;
__IO uint32_t i2s_mclk_divider: 10;
__IO uint32_t i2s_slave_mode: 1;
__IO uint32_t reserved: 1;
} I2S_CLK_DIV_TypeDef;
#define I2S_CLK_DIV ((I2S_CLK_DIV_TypeDef *)0x40000810 )
@@ -366,8 +349,7 @@ typedef struct
*/
/* SPI register block */
typedef struct __SPI
{
typedef struct __SPI {
__IO uint32_t CR0 ;/* 0x0 */
__IO uint32_t CR1 ;/* 0x4 */
__IO uint32_t DR ;/* 0x8 */
@@ -407,8 +389,7 @@ typedef struct __SPI
/*
DUET KEYPAD definitions
*/
typedef struct __KEYPAD
{
typedef struct __KEYPAD {
__IO uint32_t CR; /* 0x00 */
__I uint32_t RESV0[7]; /* 0x04-0x1C */
__I uint32_t SR; /* 0x20 */
@@ -431,8 +412,7 @@ typedef struct __KEYPAD
/*
DUET GPIO definitons
*/
typedef struct __GPIO
{
typedef struct __GPIO {
__IO uint32_t DATA;
__IO uint32_t DATAOUT;
__I uint32_t DUMMY0[2];
@@ -465,8 +445,7 @@ typedef struct __GPIO
/*
DUET I2C BEGIN
*/
typedef struct __I2C
{
typedef struct __I2C {
__IO uint32_t CR; //0x00
__IO uint32_t SR;
__IO uint32_t SAR; //0x08
@@ -543,8 +522,7 @@ typedef struct __I2C
/*
DUET RTC BEGIN
*/
typedef struct __RTC
{
typedef struct __RTC {
__IO uint32_t CTRL;
__IO uint32_t CNT_TICK;
__IO uint32_t CNT_DATE;
@@ -603,8 +581,7 @@ typedef struct __RTC
/*
RETENTION SRAM BEGIN
*/
struct DUET_RETENTION_SRAM
{
struct DUET_RETENTION_SRAM {
__IO uint8_t RTC_DATE[16];
__IO uint32_t BOOT_CFG;
__IO uint32_t BOOT_TYPE;
@@ -635,8 +612,7 @@ struct DUET_RETENTION_SRAM
*/
/* DUET UART register block */
typedef struct __UART
{
typedef struct __UART {
__IO uint32_t DR ;/* 0x0 */
__IO uint32_t RSC_ECR ;/* 0x4 */
__I uint32_t RSV0[4] ;/* 0x8~0x14 */
@@ -684,8 +660,7 @@ typedef struct __UART
/*
DUET WDG BEGIN
*/
struct DUET_WDOG
{
struct DUET_WDOG {
__IO uint32_t LOAD;
__I uint32_t VALUE;
__IO uint32_t CONTROL;
@@ -726,8 +701,7 @@ struct DUET_WDOG
/*
DUET TIMER BEGIN
*/
struct DUET_TIMER
{
struct DUET_TIMER {
__IO uint32_t LOAD;
__I uint32_t VALUE;
__IO uint32_t CONTROL;
@@ -770,8 +744,7 @@ struct DUET_TIMER
/*
DUET PWM BEGIN
*/
struct DUET_PWM
{
struct DUET_PWM {
__IO uint32_t PWMCFG;
__IO uint32_t PWMINVERTTRIG;
__IO uint32_t PWM01TRIG;
@@ -864,8 +837,7 @@ struct DUET_PWM
/*
DUET EFUDE BEGIN
*/
struct DUET_EFUSE
{
struct DUET_EFUSE {
__IO uint32_t CFG_TYPE; //0x00
__IO uint32_t WR_TYPE;
__IO uint32_t START;
asr582x/liteos_m/sdk/drivers/driver/inc/duet_adc.h
+17 -25
View File
@@ -20,13 +20,12 @@
#define ADC_ENABLE
#if defined ADC_ENABLE
typedef enum
{
ADC_SAMPLE_1M,
ADC_SAMPLE_500K,
ADC_SAMPLE_250K,
ADC_SAMPLE_125K
}AUX_ADC_SMP_RATE;
typedef enum {
ADC_SAMPLE_1M,
ADC_SAMPLE_500K,
ADC_SAMPLE_250K,
ADC_SAMPLE_125K
} AUX_ADC_SMP_RATE;
#define AUX_ADC_CLK (1<<12)
#define ADC_SAMPLE_SEL ADC_SAMPLE_125K
@@ -45,18 +44,15 @@ typedef enum
#define SYS_REG_BASE_AUXADC ((SYS_REG_BASE + 0x89000))
typedef void (*duet_adc_callback_func)(void *arg);
typedef struct
{
union
{
struct
{
typedef struct {
union {
struct {
__IO uint32_t adc_resv : 24;
__IO uint32_t adc_int_mode : 1;
__IO uint32_t adc_int_en : 1;
__IO uint32_t adc_int_clr : 1;
__IO uint32_t adc_resv1 : 5;
}BITS_ADC_CTRL;
} BITS_ADC_CTRL;
__IO uint32_t ADC_CTRL; /* adc control */
};
__IO uint32_t ADC_DATA;
@@ -67,8 +63,7 @@ typedef struct
#define MDM_CLKGATEFCTRL0_ADDR 0x60C00874
typedef enum
{
typedef enum {
ADC_CHANNEL_NUM0,
ADC_CHANNEL_NUM1,
ADC_CHANNEL_NUM2,
@@ -79,20 +74,17 @@ typedef enum
ADC_CHANNEL_NUM7,
ADC_CHANNEL_TEMN,
ADC_CHANNEL_TEMP
}duet_adc_channel_t;
} duet_adc_channel_t;
typedef struct
{
typedef struct {
uint32_t sampling_cycle; /* sampling period in number of ADC clock cycles */
}duet_adc_config_t;
typedef enum
{
} duet_adc_config_t;
typedef enum {
MOD_TRIG,
MOD_CNT10
}AUX_ADC_MOD;
} AUX_ADC_MOD;
typedef struct
{
typedef struct {
uint8_t port; /* adc port */
duet_adc_config_t config; /* adc config */
void *priv; /* priv data */
asr582x/liteos_m/sdk/drivers/driver/inc/duet_dma.h
+29 -33
View File
@@ -16,12 +16,12 @@
#ifndef __DUET_DMA_H
#define __DUET_DMA_H
#ifdef __cplusplus
extern "C"{
#endif
#include "duet.h"
#ifdef __cplusplus
extern "C" {
#endif
#define DMA_SRC_DATA_WIDTH_BYTE (0)
#define DMA_SRC_DATA_WIDTH_HALFWORD (1)
#define DMA_SRC_DATA_WIDTH_WORD (2)
@@ -63,8 +63,7 @@ extern "C"{
#define DMA_N_1_MAX (1024)
#define DMA_MAX_CHAN_NUM (32) //nums of primary channels
typedef enum
{
typedef enum {
DMA_CH_UART0_TX = 0,
DMA_CH_UART0_RX,
DMA_CH_UART1_TX,
@@ -81,27 +80,25 @@ typedef enum
DMA_CH_I2C0_TX,
DMA_CH_I2C1_RX,
DMA_CH_I2C1_TX,
}DMA_CHANNEL;
} DMA_CHANNEL;
typedef void (*duet_dma_callback_func)(uint32_t);
typedef struct
{
uint32_t cycle_ctl:3;
uint32_t next_useburst:1;
uint32_t n_minus_1:10;
uint32_t R_pow:4;
uint32_t src_prot:3;
uint32_t dest_prot:3;
uint32_t src_size:2;
uint32_t src_inc:2;
uint32_t dst_size:2;
uint32_t dst_inc:2;
typedef struct {
uint32_t cycle_ctl: 3;
uint32_t next_useburst: 1;
uint32_t n_minus_1: 10;
uint32_t R_pow: 4;
uint32_t src_prot: 3;
uint32_t dest_prot: 3;
uint32_t src_size: 2;
uint32_t src_inc: 2;
uint32_t dst_size: 2;
uint32_t dst_inc: 2;
}Chan_Ctl_Data_TypeDef;
} Chan_Ctl_Data_TypeDef;
typedef struct
{
typedef struct {
uint32_t SrcEndPtr;
uint32_t DstEndPtr;
uint32_t n_minus1;
@@ -115,30 +112,29 @@ typedef struct
uint32_t DstAddrInc;
uint8_t interrupt_en;
uint8_t use_pri_only;
}DMA_Init_Struct_Type;
} DMA_Init_Struct_Type;
typedef struct
{
typedef struct {
uint32_t chan_src_end_ptr;
uint32_t chan_dst_end_ptr;
Chan_Ctl_Data_TypeDef chan_ctr;
uint32_t resv;
}Chan_Cfg_TypeDef;
} Chan_Cfg_TypeDef;
Chan_Cfg_TypeDef * duet_dma_ctrl_block_init(void);
Chan_Cfg_TypeDef *duet_dma_ctrl_block_init(void);
void duet_dma_init(void);
void duet_dma_interrupt_clear(uint32_t chan_idx);
ITstatus duet_dma_get_interrupt_status(uint32_t chan_idx);
void duet_dma_interrupt_config(uint32_t chan_idx, uint8_t new_state);
void duet_dma_channel_cmd(uint32_t chan_idx, uint8_t new_state);
void duet_dma_generate_sw_req(uint32_t chan_idx);
void duet_dma_mem2mem(uint8_t chan_num,uint8_t *mem_src,uint8_t *mem_dst,uint16_t len);
void duet_dma_uart_rx(uint8_t uart_idx,uint8_t *data,uint16_t len);
void duet_dma_uart_tx(uint8_t uart_idx,uint8_t *data,uint16_t len);
void duet_dma_spi_rx(uint8_t ssp_idx,uint8_t *data,uint16_t len);
void duet_dma_spi_tx(uint8_t ssp_idx,uint8_t *data,uint16_t len);
void duet_dma_callback_register(uint8_t chn_idx,duet_dma_callback_func func);
void duet_dma_mem2mem(uint8_t chan_num, uint8_t *mem_src, uint8_t *mem_dst, uint16_t len);
void duet_dma_uart_rx(uint8_t uart_idx, uint8_t *data, uint16_t len);
void duet_dma_uart_tx(uint8_t uart_idx, uint8_t *data, uint16_t len);
void duet_dma_spi_rx(uint8_t ssp_idx, uint8_t *data, uint16_t len);
void duet_dma_spi_tx(uint8_t ssp_idx, uint8_t *data, uint16_t len);
void duet_dma_callback_register(uint8_t chn_idx, duet_dma_callback_func func);
#endif //__DUET_DMA_H
asr582x/liteos_m/sdk/drivers/driver/inc/duet_flash.h
+9 -11
View File
@@ -16,7 +16,6 @@
#ifndef _DUET_FLASH_H_
#define _DUET_FLASH_H_
#include <stdint.h>
#include <errno.h>
#define LOW_LEVEL_FLASH_RW_SUPPORT 1
@@ -50,8 +49,8 @@ typedef enum {
PARTITION_RECOVERY,
#ifdef MS_CONFIG_OTA_SUPPORT
PARTITION_OTA_MCU,
PARTITION_OTA_PARA,
PARTITION_OTA_HEAD_PARA,
PARTITION_OTA_PARA,
PARTITION_OTA_HEAD_PARA,
#endif
PARTITION_PARAMETER_5,
PARTITION_MAX,
@@ -125,7 +124,7 @@ int32_t duet_flash_erase(duet_partition_t in_partition, uint32_t off_set, uint32
* @return 0 : On success, EIO : If an error occurred with any step
*/
int32_t duet_flash_write(duet_partition_t in_partition, uint32_t *off_set,
const void *in_buf, uint32_t in_buf_len);
const void *in_buf, uint32_t in_buf_len);
/**
* Write data to an area on a flash logical partition with erase first
@@ -141,7 +140,7 @@ int32_t duet_flash_write(duet_partition_t in_partition, uint32_t *off_set,
* @return 0 : On success, EIO : If an error occurred with any step
*/
int32_t duet_flash_erase_write(duet_partition_t in_partition, uint32_t *off_set,
const void *in_buf, uint32_t in_buf_len);
const void *in_buf, uint32_t in_buf_len);
/**
* Read data from an area on a Flash to data buffer in RAM
@@ -157,7 +156,7 @@ int32_t duet_flash_erase_write(duet_partition_t in_partition, uint32_t *off_set,
* @return 0 : On success, EIO : If an error occurred with any step
*/
int32_t duet_flash_read(duet_partition_t in_partition, uint32_t *off_set,
void *out_buf, uint32_t in_buf_len);
void *out_buf, uint32_t in_buf_len);
/** Erase internal flash
*
@@ -214,19 +213,18 @@ int32_t duet_flash_dis_secure(duet_partition_t partition, uint32_t off_set, uint
#define FLASH_MAC_ADDR_TOKEN (0xACBDEFFE)
#define FLASH_MAC_ADDR_TOKEN_LEN (4)
#define MAC_ADDR_LEN (6)
typedef struct
{
typedef struct {
uint8_t mac[MAC_ADDR_LEN];
uint8_t resv[2];
uint32_t token;
}flash_mac_addr_t;
} flash_mac_addr_t;
/* *
* * Wifi mac addr should use efuse value
* * If efuse have no mac addr, use this value
* * The mac addr saved in flash, use kv to store. if no kv, user should rewrite the read/write function
* * Default set 0x8c59dc + radom value
*/
int32_t duet_flash_get_wifi_mac(flash_mac_addr_t* addr);
int32_t duet_flash_set_wifi_mac(flash_mac_addr_t* addr);
int32_t duet_flash_get_wifi_mac(flash_mac_addr_t *addr);
int32_t duet_flash_set_wifi_mac(flash_mac_addr_t *addr);
#endif
#endif //_LEGA_FLASH_H_
asr582x/liteos_m/sdk/drivers/driver/inc/duet_flash_alg.h
+23 -23
View File
@@ -129,42 +129,42 @@ typedef struct {
#define BLOCK64_ERASE_CMD 0x00025D8
struct FlashSectors {
unsigned long szSector; // Sector Size in Bytes
unsigned long AddrSector; // Address of Sector
unsigned long szSector; // Sector Size in Bytes
unsigned long AddrSector; // Address of Sector
};
#define SECTOR_END 0xFFFFFFFF, 0xFFFFFFFF
struct FlashDevice {
unsigned short Vers; // Version Number and Architecture
char DevName[128]; // Device Name and Description
unsigned short DevType; // Device Type: ONCHIP, EXT8BIT, EXT16BIT, ...
unsigned long DevAdr; // Default Device Start Address
unsigned long szDev; // Total Size of Device
unsigned long szPage; // Programming Page Size
unsigned long szSector;
unsigned long Res; // Reserved for future Extension
unsigned char valEmpty; // Content of Erased Memory
unsigned short Vers; // Version Number and Architecture
char DevName[128]; // Device Name and Description
unsigned short DevType; // Device Type: ONCHIP, EXT8BIT, EXT16BIT, ...
unsigned long DevAdr; // Default Device Start Address
unsigned long szDev; // Total Size of Device
unsigned long szPage; // Programming Page Size
unsigned long szSector;
unsigned long Res; // Reserved for future Extension
unsigned char valEmpty; // Content of Erased Memory
unsigned long toProg; // Time Out of Program Page Function
unsigned long toErase; // Time Out of Erase Sector Function
unsigned long toProg; // Time Out of Program Page Function
unsigned long toErase; // Time Out of Erase Sector Function
struct FlashSectors sectors[SECTOR_NUM];
struct FlashSectors sectors[SECTOR_NUM];
};
#define FLASH_DRV_VERS (0x0100+VERS) // Driver Version, do not modify!
#define FLASH_DRIVER_SEG __attribute__((section("seg_flash_driver")))
void duet_flash_alg_read_buf_clr(void);
//void duet_flash_alg_cache_bypass(void);
void duet_flash_alg_cache_enable(void);
//void duet_flash_alg_cache_flush(void);
int duet_flash_alg_init (void);
int duet_flash_alg_erase(unsigned int cmd, unsigned long adr);
int duet_flash_alg_programpage (unsigned long adr, // Program Page Function
unsigned long sz,
unsigned char *buf);
void duet_flash_alg_read_buf_clr(void);
//void duet_flash_alg_cache_bypass(void);
void duet_flash_alg_cache_enable(void);
//void duet_flash_alg_cache_flush(void);
int duet_flash_alg_init (void);
int duet_flash_alg_erase(unsigned int cmd, unsigned long adr);
int duet_flash_alg_programpage (unsigned long adr, // Program Page Function
unsigned long sz,
unsigned char *buf);
#ifdef _SPI_FLASH_240MHz_
void duet_flash_alg_set_clk_240(unsigned char en_240m);
#elif defined _SPI_FLASH_120MHz_
asr582x/liteos_m/sdk/drivers/driver/inc/duet_flash_encrypt.h
+9 -8
View File
@@ -16,11 +16,12 @@
#ifndef _DUET_FLASH_ENCRYPT_H_
#define _DUET_FLASH_ENCRYPT_H_
#ifdef __cplusplus
extern "C" {
#endif
#include <errno.h>
#ifdef __cplusplus
extern "C" {
#endif
/**
* Get the encrypt status
*
@@ -28,7 +29,7 @@
*
* @return 0 : un-encrypt, 1 : encrypt
*/
int duet_flash_encrypt_status();
int duet_flash_encrypt_status(void);
/**
* Switch flash to encrypt mode.
@@ -39,7 +40,7 @@ int duet_flash_encrypt_status();
*
* @return 0 : On success, EIO : If an error occurred with any step
*/
int duet_flash_encrypt();
int duet_flash_encrypt(void);
/**
* Switch flash to disable encrypt mode.
@@ -50,7 +51,7 @@ int duet_flash_encrypt();
*
* @return none
*/
int duet_flash_disable_encrypt();
int duet_flash_disable_encrypt(void);
/**
* Get the total times of encrypt and dis-encrypt operation rest.
@@ -60,10 +61,10 @@ int duet_flash_disable_encrypt();
*
* @return The total times of encrypt and dis-encrypt operation rest.
*/
int duet_flash_encrypt_operation_rest();
int duet_flash_encrypt_operation_rest(void);
#ifdef __cplusplus
}
}
#endif
#endif // _DUET_FLASH_ENCRYPT_H_
asr582x/liteos_m/sdk/drivers/driver/inc/duet_gpio.h
+1 -1
View File
@@ -164,7 +164,7 @@ int32_t duet_gpio_input_get(duet_gpio_dev_t *gpio, uint32_t *value);
* @return 0 : on success, EIO : if an error occurred with any step
*/
int32_t duet_gpio_enable_irq(duet_gpio_dev_t *gpio, duet_gpio_irq_trigger_t trigger,
duet_gpio_irq_handler_t handler, void *arg);
duet_gpio_irq_handler_t handler, void *arg);
/**
* Disables an interrupt trigger for an input GPIO pin.
asr582x/liteos_m/sdk/drivers/driver/inc/duet_i2c.h
+23 -24
View File
@@ -128,41 +128,38 @@
typedef void (*duet_i2c_slv_tx_callback_func)(void);
typedef void (*duet_i2c_slv_rx_callback_func)(uint8_t);
typedef struct
{
typedef struct {
duet_i2c_slv_tx_callback_func tx_func;
duet_i2c_slv_rx_callback_func rx_func;
} duet_i2c_slv_callback_t;
typedef struct
{
typedef struct {
uint32_t address_width;
uint32_t freq;
uint8_t mode;
uint16_t dev_addr;
} duet_i2c_config_t;
typedef struct
{
typedef struct {
uint8_t speed_mode;
uint8_t fifo_mode;
uint8_t dma_mode;
uint8_t reserved;
} duet_i2c_priv_cfg_t;
typedef struct
{
typedef struct {
uint8_t port; /* i2c port */
duet_i2c_config_t config; /* i2c config */
void *priv; /* priv data */
} duet_i2c_dev_t;
int32_t duet_i2c_init(duet_i2c_dev_t *i2c);
int32_t duet_i2c_master_send(duet_i2c_dev_t *i2c, uint16_t dev_addr, const uint8_t *data, uint16_t size, uint32_t timeout);
int32_t duet_i2c_master_send(duet_i2c_dev_t *i2c, uint16_t dev_addr, const uint8_t *data, uint16_t size,
uint32_t timeout);
int32_t duet_i2c_master_recv(duet_i2c_dev_t *i2c, uint16_t dev_addr, uint8_t *data, uint16_t size, uint32_t timeout);
int8_t duet_i2c_master_repeated_write_read(I2C_TypeDef * I2Cx, uint8_t slave_addr,
const uint8_t * pwdata, uint8_t * rdata,
uint32_t wlen, uint32_t rlen);
int8_t duet_i2c_master_repeated_write_read(I2C_TypeDef *I2Cx, uint8_t slave_addr,
const uint8_t *pwdata, uint8_t *rdata,
uint32_t wlen, uint32_t rlen);
int32_t duet_i2c_mem_write(duet_i2c_dev_t *i2c, uint16_t dev_addr, uint16_t mem_addr,
uint16_t mem_addr_size, const uint8_t *data, uint16_t len,
uint32_t timeout);
@@ -171,38 +168,40 @@ int32_t duet_i2c_mem_read(duet_i2c_dev_t *i2c, uint16_t dev_addr, uint16_t mem_a
uint16_t mem_addr_size, uint8_t *data, uint16_t len,
uint32_t timeout);
int32_t duet_i2c_finalize(duet_i2c_dev_t *i2c);
void duet_i2c_master_dma_send(uint8_t iic_idx,uint32_t *data,uint16_t len);
void duet_i2c_master_dma_recv(uint8_t iic_idx,uint32_t *data,uint16_t len);
__STATIC_INLINE void i2c_write_byte_cmd(I2C_TypeDef * I2Cx, uint8_t data)
void duet_i2c_master_dma_send(uint8_t iic_idx, uint32_t *data, uint16_t len);
void duet_i2c_master_dma_recv(uint8_t iic_idx, uint32_t *data, uint16_t len);
__STATIC_INLINE void i2c_write_byte_cmd(I2C_TypeDef *I2Cx, uint8_t data)
{
I2Cx->WFIFO = data | I2C_WRITE | I2C_TB;
}
__STATIC_INLINE void i2c_read_byte_cmd(I2C_TypeDef * I2Cx)
__STATIC_INLINE void i2c_read_byte_cmd(I2C_TypeDef *I2Cx)
{
I2Cx->WFIFO = I2C_TB;
}
/* read one byte from fifo or buffer register */
__STATIC_INLINE uint8_t i2c_receive_byte(I2C_TypeDef * I2Cx)
__STATIC_INLINE uint8_t i2c_receive_byte(I2C_TypeDef *I2Cx)
{
if(I2Cx->CR & I2C_MST_FIFO_MODE_ENABLE)
if (I2Cx->CR & I2C_MST_FIFO_MODE_ENABLE) {
return I2Cx->RFIFO;
else
} else {
return I2Cx->DBR;
}
}
/* write one byte to fifo or buffer reigster */
__STATIC_INLINE void i2c_write_byte(I2C_TypeDef * I2Cx, uint16_t data)
__STATIC_INLINE void i2c_write_byte(I2C_TypeDef *I2Cx, uint16_t data)
{
// data = data_to_write | any_conrol_bit
if(I2Cx->CR & I2C_MST_FIFO_MODE_ENABLE)
if (I2Cx->CR & I2C_MST_FIFO_MODE_ENABLE) {
I2Cx->WFIFO = data;
else
} else {
I2Cx->DBR = data;
}
}
__STATIC_INLINE void i2c_clear_interrupt(I2C_TypeDef * I2Cx, uint32_t I2C_INTR)
__STATIC_INLINE void i2c_clear_interrupt(I2C_TypeDef *I2Cx, uint32_t I2C_INTR)
{
I2Cx->SR |= I2C_INTR;
}
@@ -210,7 +209,7 @@ __STATIC_INLINE void i2c_clear_interrupt(I2C_TypeDef * I2Cx, uint32_t I2C_INTR)
/* I2C needs to set TB for transmitting and receiving a byte
this function is mainly for when I2C is used as a slave
*/
__STATIC_INLINE void i2c_set_tb(I2C_TypeDef * I2Cx)
__STATIC_INLINE void i2c_set_tb(I2C_TypeDef *I2Cx)
{
I2Cx->CR |= I2C_CR_TB;
}
asr582x/liteos_m/sdk/drivers/driver/inc/duet_i2s.h
+35 -35
View File
@@ -17,19 +17,19 @@
#define __DUET_I2S_H
#ifdef __cplusplus
extern "c"{
extern "c" {
#endif
#include "duet.h"
#include <errno.h>
#include "duet.h"
/* Interrupt status register fields */
/* Interrupt status register fields */
#define I2S_INTERRUPT_TXFO (1 << 5)
#define I2S_INTERRUPT_TXFE (1 << 4)
#define I2S_INTERRUPT_RXFO (1 << 1)
#define I2S_INTERRUPT_RXDA (1 << 0)
/* I2S protocal mode */
/* I2S protocal mode */
#define I2S_MODE_LEFT_ALIGN (0)
#define I2S_MODE_RIGHT_ALIGN (1)
#define I2S_MODE_PHILIPS (2)
@@ -72,7 +72,7 @@ extern "c"{
#define I2S_HW_SHIFT_PADDING_1 (1<<4)
#define I2S_HW_SHIFT_PADDING_0 (0)
/* I2S module parameters */
/* I2S module parameters */
#define I2S_WORDSIZE_DONT_CARE (0)
#define I2S_WORDSIZE_12bit (1)
#define I2S_WORDSIZE_16bit (2)
@@ -101,43 +101,43 @@ extern "c"{
#define I2S_SAMPLE_RATE_16K (16000)
#define I2S_SAMPLE_RATE_8K (8000)
typedef void (*duet_i2s_callback_func)(uint32_t,uint32_t);
extern duet_i2s_callback_func g_duet_i2s_callback_handler;
typedef void (*duet_i2s_callback_func)(uint32_t, uint32_t);
extern duet_i2s_callback_func g_duet_i2s_callback_handler;
typedef struct
{
uint32_t i2s_sample_rate;
uint32_t i2s_mclk_src;
uint32_t i2s_ws;
uint8_t i2s_role;
uint8_t i2s_word_size;
uint8_t i2s_tx_en;
uint8_t i2s_rx_en;
uint8_t i2s_fifo_threshold;
uint8_t i2s_mode;
}duet_i2s_dev_t;
typedef struct
{
uint32_t i2s_sample_rate;
uint32_t i2s_mclk_src;
uint32_t i2s_ws;
uint8_t i2s_role;
uint8_t i2s_word_size;
uint8_t i2s_tx_en;
uint8_t i2s_rx_en;
uint8_t i2s_fifo_threshold;
uint8_t i2s_mode;
} duet_i2s_dev_t;
__STATIC_INLINE ITstatus i2s_get_interrupt_status(I2S_TypeDef * I2Sx, uint32_t i2s_interrupt)
{
return (I2Sx->ISR & i2s_interrupt) ? SET : RESET;
}
__STATIC_INLINE ITstatus i2s_get_interrupt_status(I2S_TypeDef * I2Sx, uint32_t i2s_interrupt)
{
return (I2Sx->ISR & i2s_interrupt) ? SET : RESET;
}
void duet_i2s_send_data(I2S_TypeDef * I2Sx, uint32_t * left_chan_data, uint32_t * right_chan_data, uint32_t len);
void duet_i2s_send_data(I2S_TypeDef * I2Sx, uint32_t *left_chan_data, uint32_t *right_chan_data, uint32_t len);
void duet_i2s_struct_init(duet_i2s_dev_t * pI2S_struct);
void duet_i2s_struct_init(duet_i2s_dev_t *pI2S_struct);
void duet_i2s_interrupt_config(I2S_TypeDef * I2Sx, uint32_t i2s_interrupt, uint32_t new_state);
void duet_i2s_interrupt_clear(I2S_TypeDef * I2Sx, uint32_t i2s_interrupt);
void duet_i2s_cmd(I2S_TypeDef * I2Sx, uint32_t new_state);
void duet_i2s_interrupt_config(I2S_TypeDef * I2Sx, uint32_t i2s_interrupt, uint32_t new_state);
void duet_i2s_interrupt_clear(I2S_TypeDef * I2Sx, uint32_t i2s_interrupt);
void duet_i2s_cmd(I2S_TypeDef * I2Sx, uint32_t new_state);
void duet_i2s_tx_block_cmd(I2S_TypeDef * I2Sx, uint32_t new_state);
void duet_i2s_rx_block_cmd(I2S_TypeDef * I2Sx, uint32_t new_state);
void duet_i2s_tx_channel_cmd(I2S_TypeDef * I2Sx, uint32_t new_state);
void duet_i2s_rx_channel_cmd(I2S_TypeDef * I2Sx, uint32_t new_state);
void duet_i2s_master_clock_cmd(I2S_TypeDef * I2Sx, uint32_t new_state);
int duet_i2s_init(I2S_TypeDef * I2Sx, duet_i2s_dev_t * pI2S_struct);
uint32_t duet_i2s_receive_data(I2S_TypeDef * I2Sx, uint8_t lr);
void duet_i2s_tx_block_cmd(I2S_TypeDef * I2Sx, uint32_t new_state);
void duet_i2s_rx_block_cmd(I2S_TypeDef * I2Sx, uint32_t new_state);
void duet_i2s_tx_channel_cmd(I2S_TypeDef * I2Sx, uint32_t new_state);
void duet_i2s_rx_channel_cmd(I2S_TypeDef * I2Sx, uint32_t new_state);
void duet_i2s_master_clock_cmd(I2S_TypeDef * I2Sx, uint32_t new_state);
int duet_i2s_init(I2S_TypeDef * I2Sx, duet_i2s_dev_t *pI2S_struct);
uint32_t duet_i2s_receive_data(I2S_TypeDef * I2Sx, uint8_t lr);
#ifdef __cplusplus
}
asr582x/liteos_m/sdk/drivers/driver/inc/duet_pinmux.h
+71 -71
View File
@@ -17,88 +17,88 @@
#define __DUET_PINMUX_H
#ifdef __cplusplus
extern "c"{
extern "c" {
#endif
#include "duet.h"
typedef enum
{
PAD0,
PAD1,
PAD2,
PAD3,
PAD4,
PAD5,
PAD6,
PAD7,
PAD8,
PAD9,
PAD10,
PAD11,
PAD12,
PAD13,
PAD14,
PAD15,
PAD16,
PAD17,
PAD18,
PAD19,
PAD20,
PAD21,
PAD22,
PAD23,
PAD24,
PAD25,
PAD26,
PAD27,
PAD28,
PAD29,
PAD30
}Pad_Num_Type;
typedef enum
{
PAD0,
PAD1,
PAD2,
PAD3,
PAD4,
PAD5,
PAD6,
PAD7,
PAD8,
PAD9,
PAD10,
PAD11,
PAD12,
PAD13,
PAD14,
PAD15,
PAD16,
PAD17,
PAD18,
PAD19,
PAD20,
PAD21,
PAD22,
PAD23,
PAD24,
PAD25,
PAD26,
PAD27,
PAD28,
PAD29,
PAD30
} Pad_Num_Type;
typedef enum
{
PF_GPIO0, PF_GPIO1, PF_GPIO2, PF_GPIO3, PF_GPIO4, PF_GPIO5,
PF_GPIO6, PF_GPIO7, PF_GPIO8, PF_GPIO9, PF_GPIO10,PF_GPIO11,
PF_GPIO12,PF_GPIO13,PF_GPIO14,PF_GPIO15,PF_GPIO16,PF_GPIO17,
PF_GPIO18,PF_GPIO19,PF_GPIO20,PF_GPIO21,PF_GPIO22,PF_GPIO23,
PF_SWD,
PF_UART0, PF_UART1, PF_UART2, PF_UART3,
PF_SPI0, PF_SPI1, PF_SPI2,
PF_PWM0, PF_PWM1, PF_PWM2, PF_PWM3, PF_PWM4, PF_PWM5, PF_PWM6, PF_PWM7,
PF_I2C0, PF_I2C1,
PF_SDIO0,
PF_I2S,
PF_PSRAM
}Pad_Func_Type;
typedef enum
{
PF_GPIO0, PF_GPIO1, PF_GPIO2, PF_GPIO3, PF_GPIO4, PF_GPIO5,
PF_GPIO6, PF_GPIO7, PF_GPIO8, PF_GPIO9, PF_GPIO10, PF_GPIO11,
PF_GPIO12, PF_GPIO13, PF_GPIO14, PF_GPIO15, PF_GPIO16, PF_GPIO17,
PF_GPIO18, PF_GPIO19, PF_GPIO20, PF_GPIO21, PF_GPIO22, PF_GPIO23,
PF_SWD,
PF_UART0, PF_UART1, PF_UART2, PF_UART3,
PF_SPI0, PF_SPI1, PF_SPI2,
PF_PWM0, PF_PWM1, PF_PWM2, PF_PWM3, PF_PWM4, PF_PWM5, PF_PWM6, PF_PWM7,
PF_I2C0, PF_I2C1,
PF_SDIO0,
PF_I2S,
PF_PSRAM
} Pad_Func_Type;
typedef enum
{
Config_Success,
Config_Fail
}Pad_Config_State;
typedef enum
{
Config_Success,
Config_Fail
} Pad_Config_State;
typedef enum
{
PULL_DEFAULT = 0x00,
PULL_UP,
PULL_DOWN,
PULL_NONE
}Pad_Pull_Type;
typedef enum
{
PULL_DEFAULT = 0x00,
PULL_UP,
PULL_DOWN,
PULL_NONE
} Pad_Pull_Type;
typedef enum
{
DS1DS0_00 = 0x00,
DS1DS0_01,
DS1DS0_10,
DS1DS0_11
}Pad_DS_Type;
typedef enum
{
DS1DS0_00 = 0x00,
DS1DS0_01,
DS1DS0_10,
DS1DS0_11
} Pad_DS_Type;
Pad_Config_State duet_pinmux_config(Pad_Num_Type pad_num, Pad_Func_Type pad_func);
void duet_pad_config(Pad_Num_Type pad_num, Pad_Pull_Type pull_type);
Pad_Config_State duet_pinmux_config(Pad_Num_Type pad_num, Pad_Func_Type pad_func);
void duet_pad_config(Pad_Num_Type pad_num, Pad_Pull_Type pull_type);
#ifdef __cplusplus
}
asr582x/liteos_m/sdk/drivers/driver/inc/duet_pwm.h
-1
View File
@@ -16,7 +16,6 @@
#ifndef _DUET_PWM_H_
#define _DUET_PWM_H_
#include <stdint.h>
#include <errno.h>
#define PWM_OUTPUT_CH0 0
#define PWM_OUTPUT_CH1 1
asr582x/liteos_m/sdk/drivers/driver/inc/duet_ram_layout.h
+8 -11
View File
@@ -17,18 +17,16 @@
#define _DUET_RAM_LAYOUT_H_
#ifdef __cplusplus
extern "C" {
extern "C" {
#endif
typedef enum
{
typedef enum {
ITCM_DTCM_32_192, //default
ITCM_DTCM_96_128,
ITCM_DTCM_NUM
} Tcm_Config_Type;
typedef enum
{
typedef enum {
WIFI_RAM_0, //default
WIFI_RAM_32,
WIFI_RAM_64,
@@ -36,16 +34,14 @@ typedef enum
WIFI_RAM_NUM
} Wifi_Ram_Config_Type;
typedef enum
{
typedef enum {
BT_RAM_0, //default
BT_RAM_16,
BT_RAM_32,
BT_RAM_NUM
} Bt_Ram_Config_Type;
typedef struct
{
typedef struct {
uint32_t itcm_addr;
uint32_t itcm_size;
@@ -73,7 +69,8 @@ typedef struct
*
* @return 0 : On success, EIO : If an error occurred with any step
*/
uint32_t duet_ram_layout_init(Tcm_Config_Type tcm_config, Wifi_Ram_Config_Type wifi_config, Bt_Ram_Config_Type bt_config);
uint32_t duet_ram_layout_init(Tcm_Config_Type tcm_config, Wifi_Ram_Config_Type wifi_config,
Bt_Ram_Config_Type bt_config);
/**
@@ -86,7 +83,7 @@ uint32_t duet_ram_layout_init(Tcm_Config_Type tcm_config, Wifi_Ram_Config_Type w
uint32_t duet_get_ram_layout(Ram_Layout_Type *ram_layout);
#ifdef __cplusplus
}
}
#endif
#endif // _DUET_RAM_LAYOUT_H_
asr582x/liteos_m/sdk/drivers/driver/inc/duet_rnd.h
+23 -19
View File
@@ -37,13 +37,14 @@ It implements referenced standard [SP800-90] - 10.2.1.3.2 - CTR-DRBG Instantiate
@return CRYS_OK on success.
@return A non-zero value from crys_rnd_error.h on failure.
*/
int duet_RND_Instantiation(CRYS_RND_Context_t *rndContext_ptr, /*!< [in/out] Pointer to the RND context buffer allocated by the user, which is used to
int duet_RND_Instantiation(CRYS_RND_Context_t
*rndContext_ptr, /*!< [in/out] Pointer to the RND context buffer allocated by the user, which is used to
maintain the RND state, as well as pointers to the functions used for
random vector generation. This context must be saved and provided as a
parameter to any API that uses the RND module.
\note the context must be cleared before sent to the function. */
CRYS_RND_WorkBuff_t *rndWorkBuff_ptr /*!< [in/out] Scratchpad for the RND module's work. */
);
);
/*!
@brief Clears existing RNG instantiation state.
@@ -65,7 +66,7 @@ It implements referenced standard [SP800-90] - 10.2.1.4.2 - CTR-DRBG Reseeding a
*/
int duet_RND_Reseeding(CRYS_RND_Context_t *rndContext_ptr, /*!< [in/out] Pointer to the RND context buffer. */
CRYS_RND_WorkBuff_t *rndWorkBuff_ptr /*!< [in/out] Scratchpad for the RND module's work. */
);
);
/****************************************************************************************/
@@ -82,11 +83,12 @@ The generation algorithm uses AES (FIPS-PUB 197) and Derivation Function (DF).
@return CRYS_OK on success.
@return A non-zero value from crys_rnd_error.h on failure.
*/
int duet_RND_GenerateVector(CRYS_RND_State_t *rndState_ptr, /*!< [in/out] Pointer to the RND state structure, which is part of the RND context structure.
int duet_RND_GenerateVector(CRYS_RND_State_t
*rndState_ptr, /*!< [in/out] Pointer to the RND state structure, which is part of the RND context structure.
Use rndContext->rndState field of the context for this parameter. */
uint16_t outSizeBytes, /*!< [in] The size in bytes of the random vector required. The maximal size is 2^16 -1 bytes. */
uint8_t *out_ptr /*!< [out] The pointer to output buffer. */
);
);
/****************************************************************************************/
@@ -101,12 +103,13 @@ after ::CRYS_RND_Instantiation is called.
@return CRYS_OK on success.
@return A non-zero value from crys_rnd_error.h on failure.
*/
int duet_RND_SetGenerateVectorFunc(CRYS_RND_Context_t *rndContext_ptr, /*!< [in/out] Pointer to the RND context buffer allocated by the user,
int duet_RND_SetGenerateVectorFunc(CRYS_RND_Context_t
*rndContext_ptr, /*!< [in/out] Pointer to the RND context buffer allocated by the user,
which is used to maintain the RND state as well as pointers
to the functions used for random vector generation. */
SaSiRndGenerateVectWorkFunc_t rndGenerateVectFunc /*!< [in] Pointer to the random vector generation function.
The pointer should point to the ::CRYS_RND_GenerateVector function. */
);
);
/**********************************************************************************************************/
@@ -125,11 +128,11 @@ The RND module must be instantiated prior to invocation of this API.
@return A non-zero value from crys_rnd_error.h on failure.
*/
int duet_RND_GenerateVectorInRange(
CRYS_RND_Context_t *rndContext_ptr, /*!< [in/out] Pointer to the RND context buffer. */
uint32_t rndSizeInBits, /*!< [in] The size in bits of the random vector required. The allowed size in range 2 <= rndSizeInBits < 2^19-1, bits. */
uint8_t *maxVect_ptr, /*!< [in] Pointer to the vector defining the upper limit for the random vector output, Given as little-endian byte array.
CRYS_RND_Context_t *rndContext_ptr, /*!< [in/out] Pointer to the RND context buffer. */
uint32_t rndSizeInBits, /*!< [in] The size in bits of the random vector required. The allowed size in range 2 <= rndSizeInBits < 2^19-1, bits. */
uint8_t *maxVect_ptr, /*!< [in] Pointer to the vector defining the upper limit for the random vector output, Given as little-endian byte array.
If not NULL, its actual size is treated as [(rndSizeInBits+7)/8] bytes. */
uint8_t *rndVect_ptr /*!< [in/out] Pointer to the output buffer for the random vector. Must be at least [(rndSizeInBits+7)/8] bytes.
uint8_t *rndVect_ptr /*!< [in/out] Pointer to the output buffer for the random vector. Must be at least [(rndSizeInBits+7)/8] bytes.
Treated as little-endian byte array. */
);
@@ -142,11 +145,11 @@ to be later used by the ::CRYS_RND_Instantiation/::CRYS_RND_Reseeding/::CRYS_RND
@return CRYS_OK on success.
@return A non-zero value from crys_rnd_error.h on failure.
*/
int
duet_RND_AddAdditionalInput(CRYS_RND_Context_t *rndContext_ptr, /*!< [in/out] Pointer to the RND context buffer. */
uint8_t *additonalInput_ptr, /*!< [in] The Additional Input buffer. */
uint16_t additonalInputSize /*!< [in] The size of the Additional Input buffer. Must be <= 48, and a multiple of 4. */
);
int duet_RND_AddAdditionalInput(CRYS_RND_Context_t
*rndContext_ptr, /*!< [in/out] Pointer to the RND context buffer. */
uint8_t *additonalInput_ptr, /*!< [in] The Additional Input buffer. */
uint16_t additonalInputSize /*!< [in] The size of the Additional Input buffer. Must be <= 48, and a multiple of 4. */
);
/*!
@brief The CRYS_RND_EnterKatMode function sets KAT mode bit into StateFlag of global CRYS_RND_WorkingState structure.
@@ -163,9 +166,10 @@ int duet_RND_EnterKatMode(CRYS_RND_Context_t *rndContext_ptr, /*!< [in/out]
uint32_t entrSize, /*!< [in] Entropy size in bytes. */
uint8_t *nonce_ptr, /*!< [in] Nonce. */
uint32_t nonceSize, /*!< [in] Entropy size in bytes. */
CRYS_RND_WorkBuff_t *workBuff_ptr /*!< [out] RND working buffer, must be the same buffer, which should be passed into
CRYS_RND_WorkBuff_t
*workBuff_ptr /*!< [out] RND working buffer, must be the same buffer, which should be passed into
Instantiation/Reseeding functions. */
);
);
/**********************************************************************************************************/
/*!
@@ -177,6 +181,6 @@ The user must call this function after KAT tests before actual using RND module
@return A non-zero value from crys_rnd_error.h on failure.
*/
void duet_RND_DisableKatMode(CRYS_RND_Context_t *rndContext_ptr /*!< [in/out] Pointer to the RND context buffer. */
);
);
#endif //_DUET_RND_H_
asr582x/liteos_m/sdk/drivers/driver/inc/duet_spi.h
+12 -12
View File
@@ -16,13 +16,13 @@
#ifndef __DUET_SPI_H
#define __DUET_SPI_H
#ifdef __cplusplus
extern "C"{
#endif
#include "duet.h"
#include <errno.h>
#ifdef __cplusplus
extern "C" {
#endif
#define DUET_SPI0_INDEX 0
#define DUET_SPI1_INDEX 1
#define DUET_SPI2_INDEX 2
@@ -87,30 +87,30 @@ typedef struct {
typedef void (*duet_spi_callback_func)(uint8_t);
extern duet_spi_callback_func g_duet_spi_callback_handler[DUET_SPI_NUM];
__STATIC_INLINE void duet_spi_interrupt_clear(SPI_TypeDef * SPIx, uint8_t spi_interrupt)
__STATIC_INLINE void duet_spi_interrupt_clear(SPI_TypeDef *SPIx, uint8_t spi_interrupt)
{
SPIx->ICR |= spi_interrupt;
}
__STATIC_INLINE ITstatus duet_spi_get_flag_status(SPI_TypeDef * SPIx, uint8_t spi_flag)
__STATIC_INLINE ITstatus duet_spi_get_flag_status(SPI_TypeDef *SPIx, uint8_t spi_flag)
{
return SPIx->SR & spi_flag;
}
__STATIC_INLINE ITstatus duet_spi_get_interrupt_status(SPI_TypeDef * SPIx, uint8_t spi_interrupt)
__STATIC_INLINE ITstatus duet_spi_get_interrupt_status(SPI_TypeDef *SPIx, uint8_t spi_interrupt)
{
return SPIx->MIS & spi_interrupt;
}
__STATIC_INLINE ITstatus duet_spi_get_raw_interrupt_status(SPI_TypeDef * SPIx, uint8_t spi_interrupt)
__STATIC_INLINE ITstatus duet_spi_get_raw_interrupt_status(SPI_TypeDef *SPIx, uint8_t spi_interrupt)
{
return SPIx->RIS & spi_interrupt;
}
void duet_spi_interrupt_config(SPI_TypeDef * SPIx, uint8_t spi_interrupt, uint8_t new_state);
int32_t duet_spi_dma_config(duet_spi_dev_t * spi,uint8_t dma_tx_rx_sel,uint8_t new_state);
int32_t duet_spi_cpol_cpha_config(duet_spi_dev_t * spi,uint8_t mode);
void duet_spi_cmd(SPI_TypeDef * SPIx, uint8_t new_state);
void duet_spi_interrupt_config(SPI_TypeDef *SPIx, uint8_t spi_interrupt, uint8_t new_state);
int32_t duet_spi_dma_config(duet_spi_dev_t *spi, uint8_t dma_tx_rx_sel, uint8_t new_state);
int32_t duet_spi_cpol_cpha_config(duet_spi_dev_t *spi, uint8_t mode);
void duet_spi_cmd(SPI_TypeDef *SPIx, uint8_t new_state);
void duet_spi_struct_init(duet_spi_dev_t *init_struct);
/**
asr582x/liteos_m/sdk/drivers/driver/inc/duet_timer.h
-1
View File
@@ -16,7 +16,6 @@
#ifndef _DUET_TIMER_H_
#define _DUET_TIMER_H_
#include <stdint.h>
#include <errno.h>
#define DUET_TIMER1_INDEX 0
#define DUET_TIMER2_INDEX 1
asr582x/liteos_m/sdk/drivers/driver/inc/duet_uart.h
+20 -20
View File
@@ -16,17 +16,17 @@
#ifndef __DUET_UART_H
#define __DUET_UART_H
#ifdef __cplusplus
extern "C"{
#endif
#include <stdint.h>
#include "stdbool.h"
#include <errno.h>
#include "duet_cm4.h"
#include "system_cm4.h"
#include "duet_uart_index.h"
#include "duet.h"
#include <errno.h>
#ifdef __cplusplus
extern "C" {
#endif
#define DUET_UART0_INDEX 0
#define DUET_UART1_INDEX 1
@@ -134,7 +134,7 @@ typedef enum {
typedef enum {
FIFO_1_8_FULL = 0, //1/8
FIFO_1_4_FULL = 1, //1/4
FIFO_HALF_FULL= 2, //1/2
FIFO_HALF_FULL = 2, //1/2
FIFO_3_4_FULL = 3, //3/4
FIFO_7_8_FULL = 4, //7/8
FIFO_NULL
@@ -159,10 +159,10 @@ typedef struct {
void *priv; /* priv data */
} duet_uart_dev_t;
UART_TypeDef* getUartxViaIdx(uint8_t uart_idx);
UART_TypeDef *getUartxViaIdx(uint8_t uart_idx);
void duet_uart_struct_init(duet_uart_dev_t* UART_InitStruct);
int32_t duet_uart_dma_config(duet_uart_dev_t* uart,uint8_t dma_tx_rx_sel,uint8_t new_state);
void duet_uart_struct_init(duet_uart_dev_t *UART_InitStruct);
int32_t duet_uart_dma_config(duet_uart_dev_t *uart, uint8_t dma_tx_rx_sel, uint8_t new_state);
/**
* Initialises a UART interface
*
@@ -171,7 +171,7 @@ int32_t duet_uart_dma_config(duet_uart_dev_t* uart,uint8_t dma_tx_rx_sel,uint8_t
*
* @return 0 : on success, EIO : if an error occurred with any step
*/
int32_t duet_uart_init(duet_uart_dev_t* uart);
int32_t duet_uart_init(duet_uart_dev_t *uart);
/**
* Transmit data on a UART interface
@@ -193,12 +193,12 @@ int32_t duet_uart_send(duet_uart_dev_t *uart, const void *data, uint32_t size, u
*/
int32_t duet_uart_finalize(duet_uart_dev_t *uart);
void duet_uart_start(UART_TypeDef* UARTx);
void duet_uart_start(UART_TypeDef *UARTx);
void duet_uart_stop(UART_TypeDef* UARTx);
void duet_uart_stop(UART_TypeDef *UARTx);
void duet_uart_set_callback(uint8_t uart_idx,duet_uart_callback_func func);
void duet_uart_set_callback(uint8_t uart_idx, duet_uart_callback_func func);
/**
* calculate integer divider & fractional divider
@@ -206,14 +206,14 @@ void duet_uart_set_callback(uint8_t uart_idx,duet_uart_callback_func func);
*/
uint32_t duet_uart_calc_baud(uint32_t baud);
void duet_uart_interrupt_config(UART_TypeDef* UARTx, uint32_t uart_int, bool new_state);
uint8_t duet_uart_clear_interrupt(UART_TypeDef* UARTx, uint32_t uart_interrupt);
ITstatus duet_uart_get_raw_interrupt_status(UART_TypeDef* UARTx, uint32_t uart_interrupt);
ITstatus duet_uart_get_interrupt_status(UART_TypeDef* UARTx, uint32_t uart_interrupt);
ITstatus duet_uart_get_flag_status(UART_TypeDef* UARTx, uint8_t uart_flag);
void duet_uart_interrupt_config(UART_TypeDef *UARTx, uint32_t uart_int, bool new_state);
uint8_t duet_uart_clear_interrupt(UART_TypeDef *UARTx, uint32_t uart_interrupt);
ITstatus duet_uart_get_raw_interrupt_status(UART_TypeDef *UARTx, uint32_t uart_interrupt);
ITstatus duet_uart_get_interrupt_status(UART_TypeDef *UARTx, uint32_t uart_interrupt);
ITstatus duet_uart_get_flag_status(UART_TypeDef *UARTx, uint8_t uart_flag);
void UART_SendData(UART_TypeDef* UARTx, unsigned char Data);
uint8_t UART_ReceiveData(UART_TypeDef* UARTx);
void UART_SendData(UART_TypeDef *UARTx, unsigned char Data);
uint8_t UART_ReceiveData(UART_TypeDef *UARTx);
#ifdef __cplusplus
asr582x/liteos_m/sdk/drivers/driver/inc/duet_uart_index.h
+3 -3
View File
@@ -14,10 +14,10 @@
*/
#ifndef __DUET_UART_INDEX_H
#define __DUET_UART_INDEX_Hs
#define __DUET_UART_INDEX_H
#ifdef __cplusplus
extern "C"{
extern "C" {
#endif
#define UART0_INDEX 0
@@ -28,4 +28,4 @@ extern "C"{
#ifdef __cplusplus
}
#endif
#endif //__SONATA_UART_INDEX_H
#endif //__DUET_UART_INDEX_H
asr582x/liteos_m/sdk/drivers/driver/inc/duet_wdg.h
-1
View File
@@ -16,7 +16,6 @@
#ifndef _DUET_WDG_H_
#define _DUET_WDG_H_
#include <stdint.h>
#include <errno.h>
typedef struct {
uint32_t timeout; /* Watchdag timeout */
asr582x/liteos_m/sdk/drivers/driver/src/duet_adc.c
+41 -62
View File
@@ -17,12 +17,12 @@
#include <math.h>
#include <stdio.h>
#include "duet_cm4.h"
#include "duet_adc.h"
#include "duet_common.h"
#include "duet_rf_spi.h"
#include "duet_cm4.h"
#include "duet.h"
#include "duet_gpio.h"
#include "duet_adc.h"
#if defined ADC_ENABLE
duet_adc_callback_func g_duet_adc_callback_handler;
@@ -35,12 +35,9 @@ static void duet_rf_auxadc_mode(AUX_ADC_MOD mode)
rf_set_reg_bit(0x1E, 3, 3, 0x7);
spi_mst_write(0x0F, 0x8000);
spi_mst_write(0x75, 0xE9C0);
if (mode == MOD_TRIG)
{
if (mode == MOD_TRIG) {
rf_set_reg_bit(0xA3, 6, 1, 0x0);
}
else if (mode == MOD_CNT10)
{
} else if (mode == MOD_CNT10) {
rf_set_reg_bit(0xA3, 6, 1, 0x1);
}
delay(250);
@@ -51,8 +48,9 @@ int32_t duet_adc_init(duet_adc_dev_t *adc_config)
uint32_t reg_value;
uint8_t temp_chan;
duet_gpio_dev_t config_gpio;
if (adc_config->port > 9)
return 0;
if (adc_config->port > 9) {
return 0;
}
config_gpio.port = adc_config->port + 4;
config_gpio.config = DUET_INPUT_HIGH_IMPEDANCE;
config_gpio.priv = NULL;
@@ -62,17 +60,14 @@ int32_t duet_adc_init(duet_adc_dev_t *adc_config)
reg_value = REG_RD(PAD_PE_REG); //
// REG_WR(PAD_PE_REG, (reg_value|( (1 << gpio->port))));
REG_WR(PAD_PE_REG, (reg_value & (~(1 << config_gpio.port))));
// adc_config->duet_adc_handler_struct.cb = adc_config->priv;
if (adc_config->priv)
{
// adc_config->duet_adc_handler_struct.cb = adc_config->priv;
if (adc_config->priv) {
duet_rf_auxadc_mode(MOD_CNT10);
}
else
{
} else {
duet_rf_auxadc_mode(MOD_TRIG);
}
// duet_rf_auxadc_mode(adc_config->mode);
rf_set_reg_bit(0xa3,12,2,ADC_SAMPLE_125K);
// duet_rf_auxadc_mode(adc_config->mode);
rf_set_reg_bit(0xa3, 12, 2, ADC_SAMPLE_125K);
// Enable AUXADC
rf_set_reg_bit(0x06, 14, 1, 0x0);
// Enable TMMT
@@ -83,29 +78,25 @@ int32_t duet_adc_init(duet_adc_dev_t *adc_config)
rf_set_reg_bit(0x0F, 11, 1, 0);
delay(250); // delay(2000)
// Open channel 1
if (adc_config->port <= 7)
{
REG_WR(SYS_REG_BASE_CLKCTRL_ENABLE,REG_RD(SYS_REG_BASE_CLKCTRL_ENABLE) | AUX_ADC_CLK);
REG_WR(SYS_REG_BASE_IRQ_ENABLE,REG_RD(SYS_REG_BASE_IRQ_ENABLE) | AUX_ADC_IRQ);
REG_WR(SYS_REG_BASE_XOCTRL2,((REG_RD(SYS_REG_BASE_XOCTRL2) & (~(uint32_t)0x7)) |(uint32_t)adc_config->port) |((uint32_t)(BIT(9))));
REG_WR(SYS_REG_BASE_AUXADC,REG_RD(SYS_REG_BASE_AUXADC) | ((uint32_t)(BIT(9))));
}
else
{
if (adc_config->port <= 7) {
REG_WR(SYS_REG_BASE_CLKCTRL_ENABLE, REG_RD(SYS_REG_BASE_CLKCTRL_ENABLE) | AUX_ADC_CLK);
REG_WR(SYS_REG_BASE_IRQ_ENABLE, REG_RD(SYS_REG_BASE_IRQ_ENABLE) | AUX_ADC_IRQ);
REG_WR(SYS_REG_BASE_XOCTRL2, ((REG_RD(SYS_REG_BASE_XOCTRL2) & (~(uint32_t)0x7)) | (uint32_t)adc_config->port) | ((
uint32_t)(BIT(9))));
REG_WR(SYS_REG_BASE_AUXADC, REG_RD(SYS_REG_BASE_AUXADC) | ((uint32_t)(BIT(9))));
} else {
temp_chan = adc_config->port - 8;
REG_WR(SYS_REG_BASE_XOCTRL2,((REG_RD(SYS_REG_BASE_XOCTRL2) & (~(uint32_t)0x7)) |(uint32_t)temp_chan) &(~(uint32_t)(BIT(9))));
REG_WR(SYS_REG_BASE_XOCTRL2, ((REG_RD(SYS_REG_BASE_XOCTRL2) & (~(uint32_t)0x7)) | (uint32_t)temp_chan) & (~(uint32_t)(
BIT(9))));
}
delay(200);
if (adc_config->priv)
{
if (adc_config->priv) {
g_duet_adc_callback_handler = (duet_adc_callback_func)(adc_config->priv);
ADC->BITS_ADC_CTRL.adc_int_clr = 0;
ADC->BITS_ADC_CTRL.adc_int_mode =MOD_CNT10;
ADC->BITS_ADC_CTRL.adc_int_mode = MOD_CNT10;
ADC->BITS_ADC_CTRL.adc_int_en = 1;
NVIC_EnableIRQ(AUX_ADC_IRQn);
}
else
{
} else {
g_duet_adc_callback_handler = NULL;
ADC->BITS_ADC_CTRL.adc_int_clr = 0;
ADC->BITS_ADC_CTRL.adc_int_mode = MOD_TRIG;
@@ -117,54 +108,45 @@ int32_t duet_adc_init(duet_adc_dev_t *adc_config)
int32_t duet_adc_get(duet_adc_dev_t *adc_config)
{
int32_t vol_value = 0;
if (rf_get_reg_bit(0x06, 14, 1))
{
if (rf_get_reg_bit(0x06, 14, 1)) {
return 0;
}
vol_value = (ADC->ADC_DATA & 0xFFF0) >> 4;
if (adc_config->port < 8)
{
if (adc_config->port < 8) {
return (int32_t)(0.4243 * vol_value + 6.9805);
}
else
{
return 0;
} else {
return 0;
}
}
int32_t duet_tempr_get(duet_adc_dev_t *adc_config)
{
static int16_t temp_n, temp_p;
static uint8_t tp_flag = 0;
if (adc_config->port < 8)
return 0;
if (adc_config->port == ADC_CHANNEL_TEMN)
{
temp_n = (int16_t)((ADC->ADC_DATA & 0xFFF0) >> 4);
tp_flag |= 0x1;
if (adc_config->port < 8) {
return 0;
}
else
{
if (adc_config->port == ADC_CHANNEL_TEMN) {
temp_n = (int16_t)((ADC->ADC_DATA & 0xFFF0) >> 4);
tp_flag |= 0x1;
} else {
temp_p = (int16_t)((ADC->ADC_DATA & 0xFFF0) >> 4);
tp_flag |= 0x2;
}
if (tp_flag == 0x3)
{
if (tp_flag == 0x3) {
tp_flag = 0;
return (int32_t)((0.29 * (temp_n - temp_p)) / 5.25 + 41.5);
}
else
{
} else {
return 0;
}
}
int32_t duet_adc_finalize(duet_adc_dev_t *adc_config)
{
// Close AUXADC
// Close AUXADC
rf_set_reg_bit(0x06, 14, 1, 0x1);
// Close XO CLK AUCADC; D_RST_XO_CLK_AUXADC= 1
// Close XO CLK AUCADC; D_RST_XO_CLK_AUXADC= 1
spi_mst_write(0x0f, reg_f_value);
// Close CLK AUXADC13M; D_XO_CLK_AUXADC13M_EN= 0
// Close CLK AUXADC13M; D_XO_CLK_AUXADC13M_EN= 0
rf_set_reg_bit(0x75, 14, 1, 0x0);
ADC->BITS_ADC_CTRL.adc_int_clr = 0;
ADC->BITS_ADC_CTRL.adc_int_mode = 0;
@@ -176,17 +158,14 @@ int32_t duet_adc_finalize(duet_adc_dev_t *adc_config)
void AUX_ADC_IRQHandler(void)
{
uint32_t vol_value[10] = {0};
if (g_duet_adc_callback_handler)
{
for(uint8_t i = 0;i<10;i++)
{
if (g_duet_adc_callback_handler) {
for (uint8_t i = 0; i < 10; i++) {
vol_value[i] = (ADC->ADC_DATA & 0xFFF0) >> 4;
}
g_duet_adc_callback_handler(vol_value);
}
ADC->BITS_ADC_CTRL.adc_int_clr = 1;
while (ADC->BITS_ADC_CTRL.adc_int_clr)
{
while (ADC->BITS_ADC_CTRL.adc_int_clr) {
ADC->BITS_ADC_CTRL.adc_int_clr = 0;
}
}
asr582x/liteos_m/sdk/drivers/driver/src/duet_board.c
+30 -31
View File
@@ -18,8 +18,7 @@
#include "duet_flash_alg.h"
/* Logic partition on flash devices */
const duet_logic_partition_t duet_partitions[] =
{
const duet_logic_partition_t duet_partitions[] = {
[PARTITION_BOOTLOADER] =
{
.partition_owner = FLASH_EMBEDDED,
@@ -85,29 +84,29 @@ const duet_logic_partition_t duet_partitions[] =
.partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_EN,
},
#ifdef MS_CONFIG_OTA_SUPPORT
[PARTITION_OTA_MCU] =
{
.partition_owner = FLASH_EMBEDDED,
.partition_description = "OTA MCU",
.partition_start_addr = OTA_MCU_FLASH_START_ADDR,
.partition_length = OTA_MCU_MAX_SIZE, //192k bytes
.partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_EN,
},
[PARTITION_OTA_PARA] =
{
.partition_owner = FLASH_EMBEDDED,
.partition_description = "OTA PARA",
.partition_start_addr = OTA_PARA_START_ADDR,
.partition_length = OTA_PARA_MAX_SIZE, //4k bytes
.partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_EN,
},
[PARTITION_OTA_HEAD_PARA] =
{
.partition_owner = FLASH_EMBEDDED,
.partition_description = "OTA HEAD PARA",
.partition_start_addr = OTA_HEAD_PARA_START_ADDR,
.partition_length = OTA_HEAD_PARA_MAX_SIZE, //4k bytes
.partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_EN,
[PARTITION_OTA_MCU] =
{
.partition_owner = FLASH_EMBEDDED,
.partition_description = "OTA MCU",
.partition_start_addr = OTA_MCU_FLASH_START_ADDR,
.partition_length = OTA_MCU_MAX_SIZE, //192k bytes
.partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_EN,
},
[PARTITION_OTA_PARA] =
{
.partition_owner = FLASH_EMBEDDED,
.partition_description = "OTA PARA",
.partition_start_addr = OTA_PARA_START_ADDR,
.partition_length = OTA_PARA_MAX_SIZE, //4k bytes
.partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_EN,
},
[PARTITION_OTA_HEAD_PARA] =
{
.partition_owner = FLASH_EMBEDDED,
.partition_description = "OTA HEAD PARA",
.partition_start_addr = OTA_HEAD_PARA_START_ADDR,
.partition_length = OTA_HEAD_PARA_MAX_SIZE, //4k bytes
.partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_EN,
},
#endif
[PARTITION_PARAMETER_5] =
@@ -120,16 +119,16 @@ const duet_logic_partition_t duet_partitions[] =
},
};
#ifdef LOW_LEVEL_FLASH_RW_SUPPORT
int32_t duet_flash_get_wifi_mac(flash_mac_addr_t* addr)
int32_t duet_flash_get_wifi_mac(flash_mac_addr_t *addr)
{
int32_t inBufLen = sizeof(flash_mac_addr_t);
duet_flash_kv_get(FLASH_MAC_ADDR_TOKEN_NAME,addr,&inBufLen);
// printf("%s:%d addr=%02x %02x %02x %02x %02x %02x token=0x%x\n",__FUNCTION__,__LINE__,addr->mac[0],addr->mac[1],addr->mac[2],addr->mac[3],addr->mac[4],addr->mac[5],addr->token);
duet_flash_kv_get(FLASH_MAC_ADDR_TOKEN_NAME, addr, &inBufLen);
// printf("%s:%d addr=%02x %02x %02x %02x %02x %02x token=0x%x\n",__FUNCTION__,__LINE__,addr->mac[0],addr->mac[1],addr->mac[2],addr->mac[3],addr->mac[4],addr->mac[5],addr->token);
return 0;
}
int32_t duet_flash_set_wifi_mac(flash_mac_addr_t* addr)
int32_t duet_flash_set_wifi_mac(flash_mac_addr_t *addr)
{
// printf("%s:%d addr=%02x %02x %02x %02x %02x %02x token=0x%x\n",__FUNCTION__,__LINE__,addr->mac[0],addr->mac[1],addr->mac[2],addr->mac[3],addr->mac[4],addr->mac[5],addr->mac,addr->token);
return duet_flash_kv_set(FLASH_MAC_ADDR_TOKEN_NAME,addr,sizeof(flash_mac_addr_t),0);
// printf("%s:%d addr=%02x %02x %02x %02x %02x %02x token=0x%x\n",__FUNCTION__,__LINE__,addr->mac[0],addr->mac[1],addr->mac[2],addr->mac[3],addr->mac[4],addr->mac[5],addr->mac,addr->token);
return duet_flash_kv_set(FLASH_MAC_ADDR_TOKEN_NAME, addr, sizeof(flash_mac_addr_t), 0);
}
#endif
asr582x/liteos_m/sdk/drivers/driver/src/duet_boot.c
+5 -14
View File
@@ -22,28 +22,19 @@ void duet_cfg_boot_type(void)
{
uint32_t flag1 = RETENTION_SRAM->BOOT_CFG;
uint32_t flag2 = REG_RD(AON_RST_CHECK_REG);
if((RET_RAM_SOFT_RST_FLAG == flag1) && (AON_RST_CHECK_FLAG == (flag2 & AON_RST_CHECK_FLAG)))
{
if ((RET_RAM_SOFT_RST_FLAG == flag1) && (AON_RST_CHECK_FLAG == (flag2 & AON_RST_CHECK_FLAG))) {
RETENTION_SRAM->BOOT_TYPE = SOFTWARE_RST;
}
else if((RET_RAM_DS_RST_FLAG == flag1) && (AON_RST_CHECK_FLAG == (flag2 & AON_RST_CHECK_FLAG)))
{
} else if ((RET_RAM_DS_RST_FLAG == flag1) && (AON_RST_CHECK_FLAG == (flag2 & AON_RST_CHECK_FLAG))) {
RETENTION_SRAM->BOOT_CFG = RET_RAM_SOFT_RST_FLAG;
RETENTION_SRAM->BOOT_TYPE = DEEP_SLEEP_RST;
}
else if((RET_RAM_SOFT_RST_FLAG == flag1) && (0 == flag2))
{
} else if ((RET_RAM_SOFT_RST_FLAG == flag1) && (0 == flag2)) {
REG_WR(AON_RST_CHECK_REG, AON_RST_CHECK_FLAG);
RETENTION_SRAM->BOOT_TYPE = HARDWARE_PIN_RST;
}
else if(0 == flag2)
{
} else if (0 == flag2) {
REG_WR(AON_RST_CHECK_REG, AON_RST_CHECK_FLAG);
RETENTION_SRAM->BOOT_CFG = RET_RAM_SOFT_RST_FLAG;
RETENTION_SRAM->BOOT_TYPE = PWR_ON_RST;
}
else
{
} else {
REG_WR(AON_RST_CHECK_REG, AON_RST_CHECK_FLAG);
RETENTION_SRAM->BOOT_CFG = RET_RAM_SOFT_RST_FLAG;
RETENTION_SRAM->BOOT_TYPE = UNKNOWN_RST;
asr582x/liteos_m/sdk/drivers/driver/src/duet_dma.c
+110 -137
View File
@@ -15,9 +15,9 @@
#include "duet_dma.h"
duet_dma_callback_func g_duet_dma_callback_handler[DMA_MAX_CHAN_NUM]={0};
duet_dma_callback_func g_duet_dma_callback_handler[DMA_MAX_CHAN_NUM] = {0};
Chan_Cfg_TypeDef * duet_dma_ctrl_block_init(void)
Chan_Cfg_TypeDef *duet_dma_ctrl_block_init(void)
{
return (Chan_Cfg_TypeDef *)(0X4000C000);
}
@@ -37,231 +37,214 @@ void duet_dma_init(void)
void duet_dma_interrupt_clear(uint32_t chan_idx)
{
DMA_INT_CLR |= (1<<chan_idx); // write 1 to clear, then reset to 0
DMA_INT_CLR &= ~(1<<chan_idx);
DMA_INT_CLR |= (1 << chan_idx); // write 1 to clear, then reset to 0
DMA_INT_CLR &= ~(1 << chan_idx);
}
ITstatus duet_dma_get_interrupt_status(uint32_t chan_idx)
{
if( DMA_INT_STAT & (1<<chan_idx) )
if ( DMA_INT_STAT & (1 << chan_idx) ) {
return SET;
else
} else {
return RESET;
}
}
void duet_dma_interrupt_config(uint32_t chan_idx, uint8_t new_state)
{
if( new_state == ENABLE )
DMA_INT_MASK |= (1 << chan_idx); // write 1 to unmask
else
if ( new_state == ENABLE ) {
DMA_INT_MASK |= (1 << chan_idx); // write 1 to unmask
} else {
DMA_INT_MASK &= ~(1 << chan_idx);
}
}
void duet_dma_channel_cmd(uint32_t chan_idx, uint8_t new_state)
{
if( new_state == ENABLE )
if ( new_state == ENABLE ) {
DMA->CHAN_EN_SET |= (1 << chan_idx);
else
} else {
DMA->CHAN_EN_CLR |= (1 << chan_idx);
}
}
void duet_dma_alt_channel_cmd(uint32_t chan_idx, uint8_t new_state)
{
if( new_state == ENABLE )
DMA->CHAN_PRI_ALT_SET |= (1<<chan_idx);
else
DMA->CHAN_PRI_ALT_CLR |= (1<<chan_idx);
if ( new_state == ENABLE ) {
DMA->CHAN_PRI_ALT_SET |= (1 << chan_idx);
} else {
DMA->CHAN_PRI_ALT_CLR |= (1 << chan_idx);
}
}
void duet_dma_generate_sw_req(uint32_t chan_idx)
{
DMA->CHAN_SW_REQ |= (1<<chan_idx);
DMA->CHAN_SW_REQ |= (1 << chan_idx);
}
void duet_dma_generate_perip_req(uint32_t chan_idx)
{
DMA_WAIT_ON_REQ |=(1<<chan_idx);
DMA_WAIT_ON_REQ |= (1 << chan_idx);
}
void duet_dma_mem2mem(uint8_t chan_num,uint8_t *mem_src,uint8_t *mem_dst,uint16_t len)
void duet_dma_mem2mem(uint8_t chan_num, uint8_t *mem_src, uint8_t *mem_dst, uint16_t len)
{
uint8_t dma_chan = chan_num;
Chan_Cfg_TypeDef * pChan_Cfg_Align = duet_dma_ctrl_block_init();
Chan_Cfg_TypeDef *pChan_Cfg_Align = duet_dma_ctrl_block_init();
Chan_Ctl_Data_TypeDef ch_ctl_data;
Chan_Cfg_TypeDef ch_cfg;
ch_ctl_data.cycle_ctl = DMA_OP_MODE_AUTO_REQ;
ch_ctl_data.n_minus_1 = len-1;
ch_ctl_data.R_pow= 1;
ch_ctl_data.n_minus_1 = len - 1;
ch_ctl_data.R_pow = 1;
ch_ctl_data.src_inc = DMA_SRC_ADDR_INC_BYTE;
ch_ctl_data.dst_inc = DMA_DST_ADDR_INC_BYTE;
ch_ctl_data.src_size= DMA_SRC_DATA_WIDTH_BYTE;
ch_ctl_data.dst_size= DMA_DST_DATA_WIDTH_BYTE;
ch_ctl_data.src_size = DMA_SRC_DATA_WIDTH_BYTE;
ch_ctl_data.dst_size = DMA_DST_DATA_WIDTH_BYTE;
ch_cfg.chan_ctr = ch_ctl_data;
ch_cfg.chan_src_end_ptr = (uint32_t)&mem_src[len-1];
ch_cfg.chan_dst_end_ptr = (uint32_t)&mem_dst[len-1];
ch_cfg.chan_src_end_ptr = (uint32_t)&mem_src[len - 1];
ch_cfg.chan_dst_end_ptr = (uint32_t)&mem_dst[len - 1];
(pChan_Cfg_Align + dma_chan)->chan_ctr = ch_cfg.chan_ctr;
(pChan_Cfg_Align + dma_chan)->chan_src_end_ptr = ch_cfg.chan_src_end_ptr;
(pChan_Cfg_Align + dma_chan)->chan_dst_end_ptr = ch_cfg.chan_dst_end_ptr;
DMA->CFG |= 0x1; // dma enable
DMA->CHAN_PRI_ALT_CLR |= (1<<dma_chan);
DMA->CHAN_PRI_ALT_CLR |= (1 << dma_chan);
DMA->CTL_BASE_PTR = (uint32_t)pChan_Cfg_Align;
// DMA->CHAN_EN_CLR |= ~(1<<dma_chan); // disable other channels
DMA->CHAN_EN_SET |= (1<<dma_chan); // enbale channel 0
// DMA->CHAN_EN_CLR |= ~(1<<dma_chan); // disable other channels
DMA->CHAN_EN_SET |= (1 << dma_chan); // enbale channel 0
NVIC_EnableIRQ(DMA_IRQn);
DMA_INT_MASK |= (1<<dma_chan); // dma interrupt unmask, write 1
DMA_INT_MASK |= (1 << dma_chan); // dma interrupt unmask, write 1
//manually generate software request for channel 0 for mem2mem transfer
DMA->CHAN_SW_REQ |= (1<<dma_chan);
DMA->CHAN_SW_REQ |= (1 << dma_chan);
}
void duet_dma_uart_rx(uint8_t uart_idx,uint8_t *data,uint16_t len)
void duet_dma_uart_rx(uint8_t uart_idx, uint8_t *data, uint16_t len)
{
uint8_t dma_chan;
UART_TypeDef * UARTx;
UARTx=NULL;
dma_chan=0;
if( uart_idx == 2)
{
UART_TypeDef *UARTx;
UARTx = NULL;
dma_chan = 0;
if ( uart_idx == 2) {
dma_chan = 5; //uart2 rx channel
UARTx = UART2;
}
else if( uart_idx == 1)
{
} else if ( uart_idx == 1) {
dma_chan = 3; //uart1 rx channel
UARTx = UART1;
}
else if( uart_idx == 0)
{
} else if ( uart_idx == 0) {
dma_chan = 1; //uart0 rx channel
UARTx = UART0;
}
else
{
} else {
return;
}
Chan_Cfg_TypeDef * pChan_Cfg_Align = duet_dma_ctrl_block_init();
Chan_Cfg_TypeDef *pChan_Cfg_Align = duet_dma_ctrl_block_init();
Chan_Ctl_Data_TypeDef ch_ctl_data;
Chan_Cfg_TypeDef ch_cfg;
ch_ctl_data.cycle_ctl = DMA_OP_MODE_BASIC;
ch_ctl_data.n_minus_1 = len -1;
ch_ctl_data.R_pow= 1;
ch_ctl_data.n_minus_1 = len - 1;
ch_ctl_data.R_pow = 1;
ch_ctl_data.src_inc = DMA_SRC_ADDR_INC_FIX;
ch_ctl_data.dst_inc = DMA_DST_ADDR_INC_BYTE;
ch_ctl_data.src_size= DMA_SRC_DATA_WIDTH_BYTE;
ch_ctl_data.dst_size= DMA_DST_DATA_WIDTH_BYTE;
ch_ctl_data.src_size = DMA_SRC_DATA_WIDTH_BYTE;
ch_ctl_data.dst_size = DMA_DST_DATA_WIDTH_BYTE;
ch_cfg.chan_ctr = ch_ctl_data;
ch_cfg.chan_src_end_ptr = (uint32_t)&(UARTx->DR);
ch_cfg.chan_dst_end_ptr = (uint32_t)(data+len-1);
ch_cfg.chan_src_end_ptr = (uint32_t) & (UARTx->DR);
ch_cfg.chan_dst_end_ptr = (uint32_t)(data + len - 1);
(pChan_Cfg_Align + dma_chan)->chan_ctr = ch_cfg.chan_ctr;
(pChan_Cfg_Align + dma_chan)->chan_src_end_ptr = ch_cfg.chan_src_end_ptr;
(pChan_Cfg_Align + dma_chan)->chan_dst_end_ptr = ch_cfg.chan_dst_end_ptr;
NVIC_EnableIRQ(DMA_IRQn);
DMA_WAIT_ON_REQ |= (1<<dma_chan);
DMA_WAIT_ON_REQ |= (1 << dma_chan);
DMA->CFG |= 0x1; // dma enable
DMA_INT_MASK |= (1<<dma_chan); // dma interrupt unmask, write 1
DMA->CHAN_PRI_ALT_CLR |= (1<<dma_chan);
DMA_INT_MASK |= (1 << dma_chan); // dma interrupt unmask, write 1
DMA->CHAN_PRI_ALT_CLR |= (1 << dma_chan);
DMA->CTL_BASE_PTR = (uint32_t)pChan_Cfg_Align;
// DMA->CHAN_EN_CLR |= ~(1<<dma_chan); // disable other channels
DMA->CHAN_EN_SET |= (1<<dma_chan); // enable channel
// DMA->CHAN_EN_CLR |= ~(1<<dma_chan); // disable other channels
DMA->CHAN_EN_SET |= (1 << dma_chan); // enable channel
}
void duet_dma_uart_tx(uint8_t uart_idx,uint8_t *data,uint16_t len)
void duet_dma_uart_tx(uint8_t uart_idx, uint8_t *data, uint16_t len)
{
uint8_t dma_chan = 0;
UART_TypeDef *UARTx = NULL;
if( uart_idx == 2)
{
if ( uart_idx == 2) {
dma_chan = 4; //uart2 tx channel
UARTx = UART2;
}
else if( uart_idx == 1)
{
} else if ( uart_idx == 1) {
dma_chan = 2; //uart1 tx channel
UARTx = UART1;
}
else if( uart_idx == 0)
{
} else if ( uart_idx == 0) {
dma_chan = 0; //uart0 tx channel
UARTx = UART0;
}
else
{
} else {
return;
}
// malloc for channel descriptor
Chan_Cfg_TypeDef * pChan_Cfg_Align = duet_dma_ctrl_block_init();
Chan_Cfg_TypeDef *pChan_Cfg_Align = duet_dma_ctrl_block_init();
Chan_Ctl_Data_TypeDef ch_ctl_data;
Chan_Cfg_TypeDef ch_cfg;
ch_ctl_data.cycle_ctl = DMA_OP_MODE_BASIC;
ch_ctl_data.n_minus_1 = len-1;
ch_ctl_data.R_pow= 2;
ch_ctl_data.n_minus_1 = len - 1;
ch_ctl_data.R_pow = 2;
ch_ctl_data.src_inc = DMA_SRC_ADDR_INC_BYTE;
ch_ctl_data.dst_inc = DMA_DST_ADDR_INC_FIX;
ch_ctl_data.src_size= DMA_SRC_DATA_WIDTH_BYTE;
ch_ctl_data.dst_size= DMA_DST_DATA_WIDTH_BYTE;
ch_ctl_data.src_size = DMA_SRC_DATA_WIDTH_BYTE;
ch_ctl_data.dst_size = DMA_DST_DATA_WIDTH_BYTE;
ch_cfg.chan_ctr = ch_ctl_data;
ch_cfg.chan_src_end_ptr = (uint32_t)(data+len-1);
ch_cfg.chan_dst_end_ptr = (uint32_t)&(UARTx->DR);
ch_cfg.chan_src_end_ptr = (uint32_t)(data + len - 1);
ch_cfg.chan_dst_end_ptr = (uint32_t) & (UARTx->DR);
(pChan_Cfg_Align + dma_chan)->chan_ctr = ch_cfg.chan_ctr;
(pChan_Cfg_Align + dma_chan)->chan_src_end_ptr = ch_cfg.chan_src_end_ptr;
(pChan_Cfg_Align + dma_chan)->chan_dst_end_ptr = ch_cfg.chan_dst_end_ptr;
NVIC_EnableIRQ(DMA_IRQn);
DMA->CFG |= 0x1; // dma enable
DMA_INT_MASK |= (1<<dma_chan); // dma interrupt unmask, write 1
DMA->CHAN_PRI_ALT_CLR |= (1<<dma_chan);
DMA_INT_MASK |= (1 << dma_chan); // dma interrupt unmask, write 1
DMA->CHAN_PRI_ALT_CLR |= (1 << dma_chan);
DMA->CTL_BASE_PTR = (uint32_t)pChan_Cfg_Align;
// DMA->CHAN_EN_CLR |= ~(1<<dma_chan); // disable other channels
DMA->CHAN_EN_SET |= (1<<dma_chan); // enable channel
// DMA->CHAN_EN_CLR |= ~(1<<dma_chan); // disable other channels
DMA->CHAN_EN_SET |= (1 << dma_chan); // enable channel
}
void duet_dma_spi_tx(uint8_t ssp_idx,uint8_t *data,uint16_t len)
void duet_dma_spi_tx(uint8_t ssp_idx, uint8_t *data, uint16_t len)
{
uint8_t dma_chan = 0;
// malloc for channel descriptor
Chan_Cfg_TypeDef * pChan_Cfg_Align = duet_dma_ctrl_block_init();
Chan_Cfg_TypeDef *pChan_Cfg_Align = duet_dma_ctrl_block_init();
SPI_TypeDef *SPIx = NULL;
if( ssp_idx == 0)
{
if ( ssp_idx == 0) {
dma_chan = 6; //SPI0 tx channel
SPIx = SPI0;
}
else if( ssp_idx == 1)
{
} else if ( ssp_idx == 1) {
dma_chan = 8; //SPI1 tx channel
SPIx = SPI1;
}
else if( ssp_idx == 2)
{
} else if ( ssp_idx == 2) {
dma_chan = 10; //SPI2 tx channel
SPIx = SPI2;
}
else
{
} else {
return;
}
Chan_Ctl_Data_TypeDef ch_ctl_data;
Chan_Cfg_TypeDef ch_cfg;
ch_ctl_data.cycle_ctl = DMA_OP_MODE_BASIC;
ch_ctl_data.n_minus_1 = len-1;
ch_ctl_data.R_pow= 1;
ch_ctl_data.n_minus_1 = len - 1;
ch_ctl_data.R_pow = 1;
ch_ctl_data.src_inc = DMA_SRC_ADDR_INC_BYTE;
ch_ctl_data.dst_inc = DMA_DST_ADDR_INC_FIX;
ch_ctl_data.src_size= DMA_SRC_DATA_WIDTH_BYTE;
ch_ctl_data.dst_size= DMA_DST_DATA_WIDTH_BYTE;
ch_ctl_data.src_size = DMA_SRC_DATA_WIDTH_BYTE;
ch_ctl_data.dst_size = DMA_DST_DATA_WIDTH_BYTE;
ch_cfg.chan_ctr = ch_ctl_data;
ch_cfg.chan_src_end_ptr = (uint32_t)(data+len-1);
ch_cfg.chan_dst_end_ptr = (uint32_t)&(SPIx->DR);
ch_cfg.chan_src_end_ptr = (uint32_t)(data + len - 1);
ch_cfg.chan_dst_end_ptr = (uint32_t) & (SPIx->DR);
(pChan_Cfg_Align + dma_chan)->chan_ctr = ch_cfg.chan_ctr;
(pChan_Cfg_Align + dma_chan)->chan_src_end_ptr = ch_cfg.chan_src_end_ptr;
@@ -269,53 +252,46 @@ void duet_dma_spi_tx(uint8_t ssp_idx,uint8_t *data,uint16_t len)
NVIC_EnableIRQ(DMA_IRQn);
DMA->CFG |= 0x1; // dma enable
DMA_INT_MASK |= (1<<dma_chan); // dma interrupt unmask, write 1
DMA->CHAN_PRI_ALT_CLR |= (1<<dma_chan);
DMA_INT_MASK |= (1 << dma_chan); // dma interrupt unmask, write 1
DMA->CHAN_PRI_ALT_CLR |= (1 << dma_chan);
DMA->CTL_BASE_PTR = (uint32_t)pChan_Cfg_Align;
// set channel useburst bit to diasble sreq from generating dma request
DMA->CHAN_USE_BURST_SET |= (1<<dma_chan);
// DMA->CHAN_EN_CLR |= ~(1<<dma_chan); // disable other channels
DMA->CHAN_EN_SET |= (1<<dma_chan); // enable channel
DMA->CHAN_USE_BURST_SET |= (1 << dma_chan);
// DMA->CHAN_EN_CLR |= ~(1<<dma_chan); // disable other channels
DMA->CHAN_EN_SET |= (1 << dma_chan); // enable channel
}
void duet_dma_spi_rx(uint8_t ssp_idx,uint8_t *data,uint16_t len)
void duet_dma_spi_rx(uint8_t ssp_idx, uint8_t *data, uint16_t len)
{
uint8_t dma_chan = 0;
Chan_Cfg_TypeDef * pChan_Cfg_Align = duet_dma_ctrl_block_init();
Chan_Cfg_TypeDef *pChan_Cfg_Align = duet_dma_ctrl_block_init();
Chan_Ctl_Data_TypeDef ch_ctl_data;
Chan_Cfg_TypeDef ch_cfg;
SPI_TypeDef * SPIx = NULL;
if( ssp_idx == 0)
{
SPI_TypeDef *SPIx = NULL;
if ( ssp_idx == 0) {
dma_chan = 7; //SPI0 Rx channel
SPIx = SPI0;
}
else if( ssp_idx == 1)
{
} else if ( ssp_idx == 1) {
dma_chan = 9; //SPI1 Rx channel
SPIx = SPI1;
}
else if( ssp_idx == 2)
{
} else if ( ssp_idx == 2) {
dma_chan = 11; //SPI2 Rx channel
SPIx = SPI2;
}
else
{
} else {
return;
}
ch_ctl_data.cycle_ctl = DMA_OP_MODE_BASIC;
ch_ctl_data.n_minus_1 = len-1;
ch_ctl_data.R_pow= 1;
ch_ctl_data.n_minus_1 = len - 1;
ch_ctl_data.R_pow = 1;
ch_ctl_data.src_inc = DMA_DST_ADDR_INC_FIX;
ch_ctl_data.dst_inc = DMA_SRC_ADDR_INC_BYTE;
ch_ctl_data.src_size= DMA_SRC_DATA_WIDTH_BYTE;
ch_ctl_data.dst_size= DMA_DST_DATA_WIDTH_BYTE;
ch_ctl_data.src_size = DMA_SRC_DATA_WIDTH_BYTE;
ch_ctl_data.dst_size = DMA_DST_DATA_WIDTH_BYTE;
ch_cfg.chan_ctr = ch_ctl_data;
ch_cfg.chan_src_end_ptr = (uint32_t)&(SPIx->DR);
ch_cfg.chan_dst_end_ptr = (uint32_t)(data+len-1);
ch_cfg.chan_src_end_ptr = (uint32_t) & (SPIx->DR);
ch_cfg.chan_dst_end_ptr = (uint32_t)(data + len - 1);
(pChan_Cfg_Align + dma_chan)->chan_ctr = ch_cfg.chan_ctr;
(pChan_Cfg_Align + dma_chan)->chan_src_end_ptr = ch_cfg.chan_src_end_ptr;
@@ -323,17 +299,17 @@ void duet_dma_spi_rx(uint8_t ssp_idx,uint8_t *data,uint16_t len)
NVIC_EnableIRQ(DMA_IRQn);
DMA->CFG |= 0x1; // dma enable
DMA_WAIT_ON_REQ |= (1<<dma_chan);
DMA_INT_MASK |= (1<<dma_chan); // dma interrupt unmask, write 1
DMA->CHAN_PRI_ALT_CLR |= (1<<dma_chan);
DMA_WAIT_ON_REQ |= (1 << dma_chan);
DMA_INT_MASK |= (1 << dma_chan); // dma interrupt unmask, write 1
DMA->CHAN_PRI_ALT_CLR |= (1 << dma_chan);
DMA->CTL_BASE_PTR = (uint32_t)pChan_Cfg_Align;
DMA->CHAN_USE_BURST_CLR |= (1<<dma_chan);
// DMA->CHAN_EN_CLR |= ~(1<<dma_chan); // disable other channels
DMA->CHAN_EN_SET |= (1<<dma_chan); // enable channel
DMA->CHAN_USE_BURST_CLR |= (1 << dma_chan);
// DMA->CHAN_EN_CLR |= ~(1<<dma_chan); // disable other channels
DMA->CHAN_EN_SET |= (1 << dma_chan); // enable channel
}
void duet_dma_callback_register(uint8_t chn_idx,duet_dma_callback_func func)
void duet_dma_callback_register(uint8_t chn_idx, duet_dma_callback_func func)
{
g_duet_dma_callback_handler[chn_idx] = func;
@@ -343,13 +319,10 @@ void DMA_IRQHandler(void)
{
uint8_t i;
uint32_t chan_used = DMA_INT_STAT; // get all enabled channels
for(i=0;i<DMA_MAX_CHAN_NUM;i++)
{
if( chan_used & (1<<i))
{
for (i = 0; i < DMA_MAX_CHAN_NUM; i++) {
if ( chan_used & (1 << i)) {
duet_dma_interrupt_clear(i);
if(g_duet_dma_callback_handler[i]!=NULL)
{
if (g_duet_dma_callback_handler[i] != NULL) {
g_duet_dma_callback_handler[i](i);
}
}
asr582x/liteos_m/sdk/drivers/driver/src/duet_efuse.c
+10 -13
View File
@@ -17,8 +17,8 @@
#include <stdlib.h>
#include "duet.h"
#include "duet_cm4.h"
#include "duet_efuse.h"
#include "duet_rf_spi.h"
#include "duet_efuse.h"
void efuse_ldo25_open(void)
{
@@ -59,8 +59,7 @@ void duet_efuse_init(uint8_t ldo25_open)
EFUSE->RD_CNT = EFUSE_READ_OP_WAIT_CYCLE;
EFUSE->WR_CNT = EFUSE_WRITE_OP_WAIT_CYCLE;
EFUSE->DIV_CNT = EFUSE_DIV_OP_WAIT_CYCLE;
if(ldo25_open)
{
if (ldo25_open) {
efuse_ldo25_open();
}
}
@@ -75,7 +74,7 @@ uint8_t duet_efuse_byte_read(uint16_t addr)
EFUSE->CFG_TYPE = 0x0;//read type
EFUSE->START = 0x1;
while(EFUSE->START & 0x1);
while (EFUSE->START & 0x1);
return EFUSE->RDBK_DATA;
}
@@ -87,10 +86,9 @@ uint32_t duet_efuse_word_read(uint16_t addr)
{
uint32_t rd_word_data = 0;
uint8_t rd_byte_data = 0;
for(int i = 0; i < 4; i++)
{
rd_byte_data = duet_efuse_byte_read(addr+i);
rd_word_data |= rd_byte_data << (i<<3);
for (int i = 0; i < 4; i++) {
rd_byte_data = duet_efuse_byte_read(addr + i);
rd_word_data |= rd_byte_data << (i << 3);
}
return rd_word_data;
}
@@ -107,7 +105,7 @@ void duet_efuse_byte_write(uint16_t addr, uint8_t data)
EFUSE->CFG_TYPE = 0x1;//program type
EFUSE->WR_TYPE = 0x0;//write type: byte
EFUSE->START = 0x1;
while(EFUSE->START & 0x1);
while (EFUSE->START & 0x1);
}
/*
@@ -122,7 +120,7 @@ void duet_efuse_word_write(uint16_t addr, uint32_t data)
EFUSE->CFG_TYPE = 0x1;//program type
EFUSE->WR_TYPE = 0x1;//write type: word
EFUSE->START = 0x1;
while(EFUSE->START & 0x1);
while (EFUSE->START & 0x1);
}
/*
@@ -138,9 +136,8 @@ void duet_efuse_multi_read(uint16_t start_addr, uint16_t size_in_bytes, uint8_t
duet_efuse_init(EFUSE_LDO25_CLOSE);
//efuse byte read
for(i = 0; i < size_in_bytes; i++)
{
*(pData+i) = duet_efuse_byte_read(start_addr+i);
for (i = 0; i < size_in_bytes; i++) {
*(pData + i) = duet_efuse_byte_read(start_addr + i);
}
}
asr582x/liteos_m/sdk/drivers/driver/src/duet_flash.c
+134 -190
View File
@@ -15,6 +15,7 @@
#include <stdio.h>
#include <string.h>
#include <errno.h>
#include "duet_cm4.h"
#include "duet_flash_alg.h"
#include "duet_flash.h"
@@ -32,51 +33,58 @@ extern const duet_logic_partition_t duet_partitions[];
#define WRITE_FLAG 1
#define ERASE_FLAG 0
#define ROUND_DOWN(x, align) ((unsigned long)(x) & ~((unsigned long)align - 1))
#define ROUND_DOWN(x, align) ((unsigned long)(x) & ~((unsigned long)(align) - 1))
static duet_partition_t flash_layout_judge(uint32_t addr)
{
duet_partition_t out_partition;
if(addr < BOOTLOADER_FLASH_START_ADDR)
if (addr < BOOTLOADER_FLASH_START_ADDR) {
out_partition = PARTITION_ERROR;
else if(addr >= BOOTLOADER_FLASH_START_ADDR && addr < BOOTLOADER_FLASH_START_ADDR + BOOTLOADER_MAX_SIZE)
} else if (addr >= BOOTLOADER_FLASH_START_ADDR && addr < BOOTLOADER_FLASH_START_ADDR + BOOTLOADER_MAX_SIZE) {
out_partition = PARTITION_BOOTLOADER;
else if(addr >= INFO_FLASH_START_ADDR && addr < INFO_FLASH_START_ADDR + INFO_MAX_SIZE)
} else if (addr >= INFO_FLASH_START_ADDR && addr < INFO_FLASH_START_ADDR + INFO_MAX_SIZE) {
out_partition = PARTITION_PARAMETER_1;
}
#if (defined ALIOS_SUPPORT) || (defined _LEGA_BOOTLOADER_) || (defined HARMONYOS_SUPPORT)
else if(addr >= KV_FLASH_START_ADDR && addr < KV_FLASH_START_ADDR + KV_MAX_SIZE)
else if (addr >= KV_FLASH_START_ADDR && addr < KV_FLASH_START_ADDR + KV_MAX_SIZE) {
out_partition = PARTITION_PARAMETER_2;
}
#else
else if(addr >= KV_FLASH_START_ADDR && addr < KV_FLASH_START_ADDR + KV_MAX_SIZE)
else if (addr >= KV_FLASH_START_ADDR && addr < KV_FLASH_START_ADDR + KV_MAX_SIZE) {
out_partition = PARTITION_PARAMETER_2;
else if(addr >= USER_FLASH_START_ADDR && addr < USER_FLASH_START_ADDR + USER_FLASH_MAX_SIZE)
} else if (addr >= USER_FLASH_START_ADDR && addr < USER_FLASH_START_ADDR + USER_FLASH_MAX_SIZE) {
out_partition = PARTITION_PARAMETER_3;
}
#endif
else if((addr>=CUST1_FLASH_START_ADDR) &&(addr<CUST1_FLASH_START_ADDR+CUST1_MAX_SIZE))
else if ((addr >= CUST1_FLASH_START_ADDR) && (addr < CUST1_FLASH_START_ADDR + CUST1_MAX_SIZE)) {
out_partition = PARTITION_CUSTOM_1;
else if(addr >= MIDEA_INFO_START_ADDR && addr < MIDEA_INFO_START_ADDR + MIDEA_INFO_MAX_SIZE)
} else if (addr >= MIDEA_INFO_START_ADDR && addr < MIDEA_INFO_START_ADDR + MIDEA_INFO_MAX_SIZE) {
out_partition = PARTITION_PARAMETER_3;
else if(addr >= MIDEA_INFO_BKUP_START_ADDR && addr < MIDEA_INFO_BKUP_START_ADDR + MIDEA_INFO_BKUP_MAX_SIZE)
} else if (addr >= MIDEA_INFO_BKUP_START_ADDR && addr < MIDEA_INFO_BKUP_START_ADDR + MIDEA_INFO_BKUP_MAX_SIZE) {
out_partition = PARTITION_PARAMETER_4;
else if(addr >= APP_FLASH_START_ADDR && addr < APP_FLASH_START_ADDR + APP_MAX_SIZE)
} else if (addr >= APP_FLASH_START_ADDR && addr < APP_FLASH_START_ADDR + APP_MAX_SIZE) {
out_partition = PARTITION_APPLICATION;
else if(addr >= OTA_FLASH_START_ADDR && addr < OTA_FLASH_START_ADDR + OTA_MAX_SIZE)
} else if (addr >= OTA_FLASH_START_ADDR && addr < OTA_FLASH_START_ADDR + OTA_MAX_SIZE) {
out_partition = PARTITION_OTA_TEMP;
}
#ifdef MS_CONFIG_OTA_SUPPORT
else if(addr >= OTA_MCU_FLASH_START_ADDR && addr < OTA_MCU_FLASH_START_ADDR + OTA_MCU_MAX_SIZE)
else if (addr >= OTA_MCU_FLASH_START_ADDR && addr < OTA_MCU_FLASH_START_ADDR + OTA_MCU_MAX_SIZE) {
out_partition = PARTITION_OTA_MCU;
else if(addr >= OTA_PARA_START_ADDR && addr < OTA_PARA_START_ADDR + OTA_PARA_MAX_SIZE)
} else if (addr >= OTA_PARA_START_ADDR && addr < OTA_PARA_START_ADDR + OTA_PARA_MAX_SIZE) {
out_partition = PARTITION_OTA_PARA;
else if(addr >= OTA_HEAD_PARA_START_ADDR && addr < OTA_HEAD_PARA_START_ADDR + OTA_HEAD_PARA_MAX_SIZE)
} else if (addr >= OTA_HEAD_PARA_START_ADDR && addr < OTA_HEAD_PARA_START_ADDR + OTA_HEAD_PARA_MAX_SIZE) {
out_partition = PARTITION_OTA_HEAD_PARA;
}
#endif
else if (addr >= NVDS_FLASH_START_ADDR && addr < NVDS_FLASH_START_ADDR + NVDS_MAX_SIZE)
out_partition = PARTITION_PARAMETER_5;
else
else if (addr >= NVDS_FLASH_START_ADDR && addr < NVDS_FLASH_START_ADDR + NVDS_MAX_SIZE) {
out_partition = PARTITION_PARAMETER_5;
} else {
out_partition = PARTITION_ERROR;
}
return out_partition;
}
static int32_t refresh_flash_sector(duet_partition_t current_partition, uint32_t sector_offset, uint32_t start_offset, unsigned char *buf, uint32_t len, uint32_t flag)
static int32_t refresh_flash_sector(duet_partition_t current_partition, uint32_t sector_offset, uint32_t start_offset,
unsigned char *buf, uint32_t len, uint32_t flag)
{
int32_t ret = 0;
duet_partition_t tran_partition;
@@ -89,77 +97,66 @@ static int32_t refresh_flash_sector(duet_partition_t current_partition, uint32_t
uint32_t sector_start = sector_offset;
uint32_t end_offset = start_offset + len;
memset(tmpbuf, 0, SPI_FLASH_SEC_SIZE);
if((FLASH_ACCESS_CONTROL0_DEFAULT_VALUE == FLASH_ACCESS_CONTROL0) && (FLASH_ACCESS_CONTROL1_DEFAULT_VALUE == FLASH_ACCESS_CONTROL1) ) //default flash remapping
{
if ((FLASH_ACCESS_CONTROL0_DEFAULT_VALUE == FLASH_ACCESS_CONTROL0)
&& (FLASH_ACCESS_CONTROL1_DEFAULT_VALUE == FLASH_ACCESS_CONTROL1) ) { //default flash remapping
tran_partition = current_partition;
}
else
{
if(current_partition == PARTITION_OTA_TEMP)
} else {
if (current_partition == PARTITION_OTA_TEMP) {
tran_partition = PARTITION_APPLICATION;
else if(current_partition == PARTITION_APPLICATION)
} else if (current_partition == PARTITION_APPLICATION) {
tran_partition = PARTITION_OTA_TEMP;
else
} else {
tran_partition = current_partition;
}
}
ret = duet_flash_read(tran_partition, &sector_start, tmpbuf, SPI_FLASH_SEC_SIZE);
if(ret != 0)
{
if (ret != 0) {
printf("flash_read error\n");
#ifndef OS_NOT_SUPPORT
#ifndef OS_NOT_SUPPORT
lega_rtos_free(tmpbuf);
#endif
#endif
return ret;
}
sector_start = sector_offset;
ret = duet_flash_erase(current_partition, sector_start, SPI_FLASH_SEC_SIZE);
if(ret != 0)
{
if (ret != 0) {
printf("flash_erase error\n");
#ifndef OS_NOT_SUPPORT
#ifndef OS_NOT_SUPPORT
lega_rtos_free(tmpbuf);
#endif
#endif
return ret;
}
if(flag == WRITE_FLAG)
{
if (flag == WRITE_FLAG) {
memcpy(tmpbuf + start_offset - sector_offset, buf, len);
sector_start = sector_offset;
ret = duet_flash_write(current_partition, &sector_start, tmpbuf, SPI_FLASH_SEC_SIZE);
if(ret != 0)
{
if (ret != 0) {
printf("flash_write error\n");
#ifndef OS_NOT_SUPPORT
#ifndef OS_NOT_SUPPORT
lega_rtos_free(tmpbuf);
#endif
#endif
return ret;
}
}
else if(flag == ERASE_FLAG)
{
if(sector_offset < start_offset)
{
} else if (flag == ERASE_FLAG) {
if (sector_offset < start_offset) {
sector_start = sector_offset;
ret = duet_flash_write(current_partition, &sector_start, tmpbuf, start_offset - sector_offset);
if(ret != 0)
{
if (ret != 0) {
printf("flash_write error\n");
#ifndef OS_NOT_SUPPORT
#ifndef OS_NOT_SUPPORT
lega_rtos_free(tmpbuf);
#endif
#endif
return ret;
}
}
if(end_offset - sector_offset < SPI_FLASH_SEC_SIZE)
{
if (end_offset - sector_offset < SPI_FLASH_SEC_SIZE) {
pend = tmpbuf + start_offset - sector_offset + len;
ret = duet_flash_write(current_partition, &end_offset, pend, SPI_FLASH_SEC_SIZE - (end_offset - sector_offset));
if(ret != 0)
{
if (ret != 0) {
printf("flash_write error\n");
#ifndef OS_NOT_SUPPORT
#ifndef OS_NOT_SUPPORT
lega_rtos_free(tmpbuf);
#endif
#endif
return ret;
}
}
@@ -223,8 +220,7 @@ int32_t duet_flash_erase(duet_partition_t in_partition, uint32_t off_set, uint32
duet_logic_partition_t *partition_info;
partition_info = duet_flash_get_info( in_partition );
if(size + off_set > partition_info->partition_length)
{
if (size + off_set > partition_info->partition_length) {
return EIO;
}
@@ -233,59 +229,41 @@ int32_t duet_flash_erase(duet_partition_t in_partition, uint32_t off_set, uint32
size = end_addr - start_addr + SPI_FLASH_SEC_SIZE;
addr = start_addr;
while(size)
{
if(!(addr % SPI_FLASH_BLOCK_64K_SIZE) && (size > (SPI_FLASH_BLOCK_64K_SIZE-SPI_FLASH_SEC_SIZE)))
{
while (size) {
if (!(addr % SPI_FLASH_BLOCK_64K_SIZE) && (size > (SPI_FLASH_BLOCK_64K_SIZE - SPI_FLASH_SEC_SIZE))) {
ret = duet_flash_alg_erase(BLOCK64_ERASE_CMD, addr); //250ms
if (ret != 0)
{
if (ret != 0) {
return ret;
}
addr += SPI_FLASH_BLOCK_64K_SIZE;
if(size > SPI_FLASH_BLOCK_64K_SIZE)
{
if (size > SPI_FLASH_BLOCK_64K_SIZE) {
size -= SPI_FLASH_BLOCK_64K_SIZE;
}
else
{
} else {
size = 0;
}
}
else if(!(addr % SPI_FLASH_BLOCK_32K_SIZE) && (size > (SPI_FLASH_BLOCK_32K_SIZE-SPI_FLASH_SEC_SIZE)))
{
} else if (!(addr % SPI_FLASH_BLOCK_32K_SIZE) && (size > (SPI_FLASH_BLOCK_32K_SIZE - SPI_FLASH_SEC_SIZE))) {
ret = duet_flash_alg_erase(BLOCK32_ERASE_CMD, addr); //170ms
if (ret != 0)
{
if (ret != 0) {
return ret;
}
addr += SPI_FLASH_BLOCK_32K_SIZE;
if(size > SPI_FLASH_BLOCK_32K_SIZE)
{
if (size > SPI_FLASH_BLOCK_32K_SIZE) {
size -= SPI_FLASH_BLOCK_32K_SIZE;
} else {
size = 0;
}
else
{
} else {
ret = duet_flash_alg_erase(SECTOR_ERASE_CMD, addr); //100ms
if (ret != 0) {
return ret;
}
addr += SPI_FLASH_SEC_SIZE;
if (size > SPI_FLASH_SEC_SIZE) {
size -= SPI_FLASH_SEC_SIZE;
} else {
size = 0;
}
}
else
{
ret = duet_flash_alg_erase(SECTOR_ERASE_CMD, addr); //100ms
if (ret != 0)
{
return ret;
}
addr += SPI_FLASH_SEC_SIZE;
if(size > SPI_FLASH_SEC_SIZE)
{
size -= SPI_FLASH_SEC_SIZE;
}
else
{
size = 0;
}
}
}
return 0;
@@ -309,7 +287,7 @@ int32_t duet_flash_erase(duet_partition_t in_partition, uint32_t off_set, uint32
* @return 0 : On success, EIO : If an error occurred with any step
*/
int32_t duet_flash_write(duet_partition_t in_partition, uint32_t *off_set,
const void *in_buf, uint32_t in_buf_len)
const void *in_buf, uint32_t in_buf_len)
{
uint32_t start_addr, end_addr;
duet_logic_partition_t *partition_info;
@@ -318,22 +296,17 @@ int32_t duet_flash_write(duet_partition_t in_partition, uint32_t *off_set,
uint32_t left_buf_len = in_buf_len;
partition_info = duet_flash_get_info( in_partition );
if(off_set == NULL || in_buf == NULL || ((*off_set + in_buf_len) > partition_info->partition_length))
{
if (off_set == NULL || in_buf == NULL || ((*off_set + in_buf_len) > partition_info->partition_length)) {
// ptr and size over range check
return EIO;
}
start_addr = partition_info->partition_start_addr + *off_set;
end_addr = start_addr + left_buf_len;
while(left_buf_len > 0)
{
if((end_addr / SPI_FLASH_PAGE_SIZE) > (start_addr / SPI_FLASH_PAGE_SIZE))
{
while (left_buf_len > 0) {
if ((end_addr / SPI_FLASH_PAGE_SIZE) > (start_addr / SPI_FLASH_PAGE_SIZE)) {
prg_size = SPI_FLASH_PAGE_SIZE - (start_addr % SPI_FLASH_PAGE_SIZE);
}
else
{
} else {
prg_size = left_buf_len;
}
duet_flash_alg_programpage(start_addr, prg_size, p_buf);
@@ -363,12 +336,11 @@ int32_t duet_flash_write(duet_partition_t in_partition, uint32_t *off_set,
* @return 0 : On success, EIO : If an error occurred with any step
*/
int32_t duet_flash_erase_write(duet_partition_t in_partition, uint32_t *off_set,
const void *in_buf, uint32_t in_buf_len)
const void *in_buf, uint32_t in_buf_len)
{
int32_t ret = 0;
ret = duet_flash_erase(in_partition, *off_set, in_buf_len);
if (ret != 0)
{
if (ret != 0) {
return ret;
}
return duet_flash_write(in_partition, off_set, in_buf, in_buf_len);
@@ -388,7 +360,7 @@ int32_t duet_flash_erase_write(duet_partition_t in_partition, uint32_t *off_set,
* @return 0 : On success, EIO : If an error occurred with any step
*/
int32_t duet_flash_read(duet_partition_t in_partition, uint32_t *off_set,
void *out_buf, uint32_t in_buf_len)
void *out_buf, uint32_t in_buf_len)
{
int32_t ret = 0;
uint32_t start_addr;
@@ -396,8 +368,7 @@ int32_t duet_flash_read(duet_partition_t in_partition, uint32_t *off_set,
partition_info = duet_flash_get_info( in_partition );
if(off_set == NULL || out_buf == NULL || *off_set + in_buf_len > partition_info->partition_length)
{
if (off_set == NULL || out_buf == NULL || *off_set + in_buf_len > partition_info->partition_length) {
return EIO;
}
start_addr = partition_info->partition_start_addr + *off_set;
@@ -408,24 +379,23 @@ int32_t duet_flash_read(duet_partition_t in_partition, uint32_t *off_set,
}
int32_t duet_flash_read_common(uint32_t addr,
void *out_buf, uint32_t in_buf_len)
void *out_buf, uint32_t in_buf_len)
{
int32_t ret = 0;
uint32_t start_addr;
uint32_t off_set = NULL;
duet_logic_partition_t *partition_info;
duet_partition_t current_partition = flash_layout_judge(addr);
if(current_partition == PARTITION_ERROR)
if (current_partition == PARTITION_ERROR) {
return -1;
}
partition_info = duet_flash_get_info(current_partition);
if(addr == 0 || ((addr + in_buf_len) > ( partition_info->partition_start_addr+partition_info->partition_length)) \
||(addr < partition_info->partition_start_addr))
{
if (addr == 0 || ((addr + in_buf_len) > ( partition_info->partition_start_addr + partition_info->partition_length)) \
|| (addr < partition_info->partition_start_addr)) {
return -1;
}
off_set = addr - partition_info->partition_start_addr;
if((out_buf == NULL) || (off_set + in_buf_len > partition_info->partition_length))
{
if ((out_buf == NULL) || (off_set + in_buf_len > partition_info->partition_length)) {
return -1;
}
start_addr = partition_info->partition_start_addr + off_set;
@@ -451,68 +421,55 @@ int32_t duet_flash_erase_common(uint32_t addr, uint32_t len)
uint32_t start_addr, end_addr;
uint32_t sec_num = 0;
int32_t i = 0;
unsigned char * tmpbuf = NULL;
unsigned char *tmpbuf = NULL;
duet_logic_partition_t *partition_info;
duet_partition_t current_partition = flash_layout_judge(addr);
if(current_partition == PARTITION_ERROR)
if (current_partition == PARTITION_ERROR) {
return -1;
}
partition_info = duet_flash_get_info(current_partition);
if(addr == 0 || ((addr + len) > ( partition_info->partition_start_addr+partition_info->partition_length)) \
||(addr < partition_info->partition_start_addr))
{
if (addr == 0 || ((addr + len) > ( partition_info->partition_start_addr + partition_info->partition_length)) \
|| (addr < partition_info->partition_start_addr)) {
return -1;
}
off_set = addr - partition_info->partition_start_addr;
start_addr = ROUND_DOWN((partition_info->partition_start_addr + off_set), SPI_FLASH_SEC_SIZE);
end_addr = ROUND_DOWN((partition_info->partition_start_addr + off_set + len - 1), SPI_FLASH_SEC_SIZE);
sec_num = (end_addr - start_addr)/SPI_FLASH_SEC_SIZE;
if(sec_num > 0)
{
for(i = 0; i <= sec_num; i++)
{
if(i == 0)
{
sec_num = (end_addr - start_addr) / SPI_FLASH_SEC_SIZE;
if (sec_num > 0) {
for (i = 0; i <= sec_num; i++) {
if (i == 0) {
sector_offset = start_addr - partition_info->partition_start_addr;
start_offset = off_set;
ret = refresh_flash_sector(current_partition, sector_offset, start_offset, tmpbuf, SPI_FLASH_SEC_SIZE - (start_offset - sector_offset), ERASE_FLAG);
if(ret != 0)
{
ret = refresh_flash_sector(current_partition, sector_offset, start_offset, tmpbuf,
SPI_FLASH_SEC_SIZE - (start_offset - sector_offset), ERASE_FLAG);
if (ret != 0) {
return ret;
}
}
else if(i == sec_num)
{
} else if (i == sec_num) {
sector_offset = start_addr - partition_info->partition_start_addr + i * SPI_FLASH_SEC_SIZE;
start_offset = sector_offset;
ret = refresh_flash_sector(current_partition, sector_offset, start_offset, tmpbuf, partition_info->partition_start_addr + off_set + len - end_addr, ERASE_FLAG);
if(ret != 0)
{
ret = refresh_flash_sector(current_partition, sector_offset, start_offset, tmpbuf,
partition_info->partition_start_addr + off_set + len - end_addr, ERASE_FLAG);
if (ret != 0) {
return ret;
}
}
else
{
} else {
sector_offset = start_addr - partition_info->partition_start_addr + i * SPI_FLASH_SEC_SIZE;
start_offset = sector_offset;
ret = refresh_flash_sector(current_partition, sector_offset, start_offset, tmpbuf, SPI_FLASH_SEC_SIZE, ERASE_FLAG);
if(ret != 0)
{
if (ret != 0) {
return ret;
}
}
}
}
else if(sec_num == 0)
{
} else if (sec_num == 0) {
sector_offset = start_addr - partition_info->partition_start_addr;
ret = refresh_flash_sector(current_partition, sector_offset, off_set, tmpbuf, len, ERASE_FLAG);
if(ret != 0)
{
if (ret != 0) {
return ret;
}
}
else
{
} else {
ret = -1;
}
return ret;
@@ -526,80 +483,68 @@ int32_t duet_flash_write_common(uint32_t addr, const void *in_buff, uint32_t len
uint32_t start_addr, end_addr;
uint32_t sec_num = 0;
int32_t i = 0;
unsigned char * tmpbuf = NULL;
unsigned char *tmpbuf = NULL;
duet_logic_partition_t *partition_info;
duet_partition_t current_partition = flash_layout_judge(addr);
if(current_partition == PARTITION_ERROR)
if (current_partition == PARTITION_ERROR) {
return -1;
}
partition_info = duet_flash_get_info(current_partition);
if(addr == 0 || in_buff == NULL || ((addr + len) > ( partition_info->partition_start_addr+partition_info->partition_length)) \
||(addr < partition_info->partition_start_addr))
{
if (addr == 0 || in_buff == NULL
|| ((addr + len) > ( partition_info->partition_start_addr + partition_info->partition_length)) \
|| (addr < partition_info->partition_start_addr)) {
return -1;
}
off_set = addr - partition_info->partition_start_addr;
start_addr = ROUND_DOWN((partition_info->partition_start_addr + off_set), SPI_FLASH_SEC_SIZE);
end_addr = ROUND_DOWN((partition_info->partition_start_addr + off_set + len - 1), SPI_FLASH_SEC_SIZE);
sec_num = (end_addr - start_addr)/SPI_FLASH_SEC_SIZE;
if(sec_num > 0)
{
sec_num = (end_addr - start_addr) / SPI_FLASH_SEC_SIZE;
if (sec_num > 0) {
tmpbuf = (unsigned char *)in_buff;
for(i = 0; i <= sec_num; i++)
{
if(i == 0)
{
for (i = 0; i <= sec_num; i++) {
if (i == 0) {
sector_offset = start_addr - partition_info->partition_start_addr;
start_offset = off_set;
ret = refresh_flash_sector(current_partition, sector_offset, start_offset, tmpbuf, SPI_FLASH_SEC_SIZE - (start_offset - sector_offset), WRITE_FLAG);
ret = refresh_flash_sector(current_partition, sector_offset, start_offset, tmpbuf,
SPI_FLASH_SEC_SIZE - (start_offset - sector_offset), WRITE_FLAG);
tmpbuf = tmpbuf + SPI_FLASH_SEC_SIZE - (start_offset - sector_offset);
if(ret != 0)
{
if (ret != 0) {
return ret;
}
}
else if(i == sec_num)
{
} else if (i == sec_num) {
sector_offset = start_addr - partition_info->partition_start_addr + i * SPI_FLASH_SEC_SIZE;
start_offset = sector_offset;
ret = refresh_flash_sector(current_partition, sector_offset, start_offset, tmpbuf, partition_info->partition_start_addr + off_set + len - end_addr, WRITE_FLAG);
if(ret != 0)
{
ret = refresh_flash_sector(current_partition, sector_offset, start_offset, tmpbuf,
partition_info->partition_start_addr + off_set + len - end_addr, WRITE_FLAG);
if (ret != 0) {
return ret;
}
}
else
{
} else {
sector_offset = start_addr - partition_info->partition_start_addr + i * SPI_FLASH_SEC_SIZE;
start_offset = sector_offset;
ret = refresh_flash_sector(current_partition, sector_offset, start_offset, tmpbuf, SPI_FLASH_SEC_SIZE, WRITE_FLAG);
tmpbuf = tmpbuf + SPI_FLASH_SEC_SIZE;
if(ret != 0)
{
if (ret != 0) {
return ret;
}
}
}
}
else if(sec_num == 0)
{
} else if (sec_num == 0) {
sector_offset = start_addr - partition_info->partition_start_addr;
ret = refresh_flash_sector(current_partition, sector_offset, off_set, (unsigned char *)in_buff, len, WRITE_FLAG);
if(ret != 0)
{
if (ret != 0) {
return ret;
}
}
else
{
} else {
ret = -1;
}
return ret;
}
int32_t duet_flash_write_saved(duet_partition_t in_partition, uint32_t *off_set,
const void *in_buf, uint32_t in_buf_len)
const void *in_buf, uint32_t in_buf_len)
{
uint32_t addr;
uint32_t start_addr, end_addr,start_sector, end_sector;;
uint32_t start_addr, end_addr, start_sector, end_sector;
duet_logic_partition_t *partition_info;
uint8_t *p_buf = (uint8_t *)(in_buf);
uint32_t left_buf_len = in_buf_len;
@@ -607,8 +552,7 @@ int32_t duet_flash_write_saved(duet_partition_t in_partition, uint32_t *off_set,
uint32_t off_set_tmp = 0;
uint32_t len_tmp = 0;
partition_info = duet_flash_get_info( in_partition );
if(off_set == NULL || in_buf == NULL || ((*off_set + in_buf_len) > partition_info->partition_length))
{
if (off_set == NULL || in_buf == NULL || ((*off_set + in_buf_len) > partition_info->partition_length)) {
return -1;
}
start_addr = partition_info->partition_start_addr + *off_set;
asr582x/liteos_m/sdk/drivers/driver/src/duet_flash_alg.c
+117 -118
View File
@@ -15,9 +15,9 @@
#include <stdlib.h>
#include <string.h>
#include "duet_flash_alg.h" // FlashOS Structures
#include "duet_cm4.h"
#include "duet.h"
#include "duet_flash_alg.h" // FlashOS Structures
FLASH_DRIVER_SEG void duet_flash_alg_cache_flush(void)
{
@@ -27,59 +27,64 @@ FLASH_DRIVER_SEG void duet_flash_alg_cache_flush(void)
FLASH_DRIVER_SEG void duet_flash_alg_cache_flush_by_Addr(uint32_t *addr, int32_t dsize)
{
if(dsize < 0x4000)
{
if (dsize < 0x4000) {
uint32_t off_set = (uint32_t)addr & 0x1F;
addr -= off_set;
dsize += off_set;
SCB_InvalidateDCache_by_Addr(addr, dsize);
}
else
} else {
SCB_InvalidateDCache();
}
}
FLASH_DRIVER_SEG void duet_flash_alg_f_delay(unsigned char cycle)
{
while(cycle--)
while (cycle--) {
__asm("nop");
}
}
FLASH_DRIVER_SEG int duet_flash_alg_check_busy (void) {
FLASH_DRIVER_SEG int duet_flash_alg_check_busy (void)
{
int var_rdata = 0;
int cnt = 0;
/* Add your Code */
var_rdata = FLASH->QSPI_SR; //read back
while(((var_rdata>>5 & 0x01) ==1)){
while (((var_rdata >> 5) & 0x01) == 1) {
var_rdata = FLASH->QSPI_SR; //read back
if(cnt < 80000000)//erase chip time(10s)/(160MHz*2cycle)
cnt = cnt+1;
else
if (cnt < 80000000) { //erase chip time(10s)/(160MHz*2cycle)
cnt = cnt + 1;
} else {
return (1);
}
}
return (0); // Finished without Errors
}
FLASH_DRIVER_SEG int duet_flash_alg_check_abort_busy (void) {
FLASH_DRIVER_SEG int duet_flash_alg_check_abort_busy (void)
{
int var_rdata = 0;
int cnt = 0;
/* Add your Code */
var_rdata = FLASH->QSPI_SR; //read back
while(((var_rdata>>6 & 0x01) ==1)){
while (((var_rdata >> 6) & 0x01) == 1) {
var_rdata = FLASH->QSPI_SR; //read back
if(cnt < 200)// /160MHz*10cycled
cnt = cnt+1;
else
if (cnt < 200) { // /160MHz*10cycled
cnt = cnt + 1;
} else {
return (1);
}
}
return (0); // Finished without Errors
}
FLASH_DRIVER_SEG int duet_flash_alg_clr_flg (void) {
FLASH_DRIVER_SEG int duet_flash_alg_clr_flg (void)
{
/* Add your Code */
FLASH->QSPI_FCR = 0xF001B;//0x1F;
FLASH->QSPI_FCR = 0x0;
@@ -87,17 +92,19 @@ FLASH_DRIVER_SEG int duet_flash_alg_clr_flg (void) {
return (0); // Finished without Errors
}
FLASH_DRIVER_SEG int duet_flash_alg_abort_en (void) {
FLASH_DRIVER_SEG int duet_flash_alg_abort_en (void)
{
/* Add your Code */
int var_rdata;
var_rdata=FLASH->QSPI_CR;
FLASH->QSPI_CR = (var_rdata&0xFFFFFFFD)+0x2;
FLASH->QSPI_CR = var_rdata&0xFFFFFFFD;
var_rdata = FLASH->QSPI_CR;
FLASH->QSPI_CR = (var_rdata & 0xFFFFFFFD) + 0x2;
FLASH->QSPI_CR = var_rdata & 0xFFFFFFFD;
return (0); // Finished without Errors
}
FLASH_DRIVER_SEG int duet_flash_alg_polling_wip (void){
FLASH_DRIVER_SEG int duet_flash_alg_polling_wip (void)
{
int var_rdata = 0;
//dumode=2'b00,fmode=2'b10,dmode=2'b01,reserved=1'b0,dcyc=5'h0,absize=2'b00,abmode=2'b00,adsize=2'b00,admode=2'b00,imode=2'b01,instruction=8'h05;
@@ -115,7 +122,8 @@ FLASH_DRIVER_SEG int duet_flash_alg_polling_wip (void){
return (0); // Finished without Errors
}
FLASH_DRIVER_SEG int duet_flash_alg_polling_wel (void){
FLASH_DRIVER_SEG int duet_flash_alg_polling_wel (void)
{
int var_rdata = 0;
//dumode=2'b00,fmode=2'b10,dmode=2'b01,reserved=1'b0,dcyc=5'h0,absize=2'b00,abmode=2'b00,adsize=2'b00,admode=2'b00,imode=2'b01,instruction=8'h05;
FLASH->QSPI_CCR = 0x9000105;
@@ -132,7 +140,8 @@ FLASH_DRIVER_SEG int duet_flash_alg_polling_wel (void){
return (0); // Finished without Errors
}
FLASH_DRIVER_SEG int duet_flash_alg_setqe (unsigned char quad) {
FLASH_DRIVER_SEG int duet_flash_alg_setqe (unsigned char quad)
{
//bypass enable 0x4000308C bit10 set 1
//*((volatile unsigned int *)(0x4000308C)) |= (1 << 10);
@@ -147,12 +156,12 @@ FLASH_DRIVER_SEG int duet_flash_alg_setqe (unsigned char quad) {
duet_flash_alg_check_busy();
duet_flash_alg_polling_wel();
FLASH->QSPI_CCR = 0x01000101;//dumode=2'b00,fmode=2'b00,dmode=2'b01,reserved=1'b0,dcyc=5'h0,absize=2'b00,abmode=2'b00,adsize=2'b00,admode=2'b00,imode=2'b01,instruction=8'h01;
FLASH->QSPI_CCR =
0x01000101;//dumode=2'b00,fmode=2'b00,dmode=2'b01,reserved=1'b0,dcyc=5'h0,absize=2'b00,abmode=2'b00,adsize=2'b00,admode=2'b00,imode=2'b01,instruction=8'h01;
FLASH->QSPI_DLR = 0x1;//two byte
if(quad == 0x1){
if (quad == 0x1) {
FLASH->QSPI_DR = 0x200;
}
else{
} else {
FLASH->QSPI_DR = 0x0; //0x200;
}
duet_flash_alg_clr_flg();
@@ -170,7 +179,8 @@ FLASH_DRIVER_SEG int duet_flash_alg_setqe (unsigned char quad) {
}
//use in unencryption
FLASH_DRIVER_SEG int duet_flash_alg_check_setqe (void) {
FLASH_DRIVER_SEG int duet_flash_alg_check_setqe (void)
{
volatile int var_rdata = 0;
@@ -178,7 +188,8 @@ FLASH_DRIVER_SEG int duet_flash_alg_check_setqe (void) {
duet_flash_alg_check_abort_busy();
duet_flash_alg_check_busy();
FLASH->QSPI_DLR = 0x0;
FLASH->QSPI_CCR = 0x5000135;//dumode=2'b00,fmode=2'b01,dmode=2'b01,reserved=1'b0,dcyc=5'h0,absize=2'b00,abmode=2'b00,adsize=2'b00,admode=2'b00,imode=2'b01,instruction=8'h35;
FLASH->QSPI_CCR =
0x5000135;//dumode=2'b00,fmode=2'b01,dmode=2'b01,reserved=1'b0,dcyc=5'h0,absize=2'b00,abmode=2'b00,adsize=2'b00,admode=2'b00,imode=2'b01,instruction=8'h35;
duet_flash_alg_clr_flg();
FLASH->SBUS_START = 0x1;
duet_flash_alg_f_delay(10);
@@ -190,22 +201,23 @@ FLASH_DRIVER_SEG int duet_flash_alg_check_setqe (void) {
vu32 duet_flash_line_cfg = 0; //flash line number config
vu32 duet_flash_size_cfg = 0; //flash size config
vu32 duet_flash_clk_cfg = 52; //flash clock config, default 52MHz
FLASH_DRIVER_SEG void duet_flash_alg_load_cfg (void) {
FLASH_DRIVER_SEG void duet_flash_alg_load_cfg (void)
{
duet_flash_alg_abort_en();
duet_flash_alg_check_abort_busy();
#ifdef _SPI_FLASH_240MHz_
if(duet_flash_clk_cfg == 240)
{
if (duet_flash_clk_cfg == 240) {
FLASH->QSPI_CR = FLASH_QSPI_DIV3; //div3, //offset 0x00
FLASH->QSPI_CR |= 0x20; // set loop back en bit 5=1
FLASH->QSPI_CR &= ~(7<<13);
FLASH->QSPI_CR |= (5<<13); //ds = 5
FLASH->QSPI_CR &= ~(7 << 13);
FLASH->QSPI_CR |= (5 << 13); //ds = 5
FLASH->QSPI_DCR = 0x00150000 ; //offset 0x04
FLASH->QSPI_FCR = 0x0 ; //offset 0x0C
FLASH->QSPI_DLR = 0x0 ; //offset 0x10
FLASH->QSPI_CCR = duet_flash_line_cfg; //dumode=2'b10,,sio=1'b0,fmode=2'b11,dmode=2'b10,reserved=1'b0,dcyc=5'h7,absize=2'b00,abmode=2'b00,adsize=2'b10,admode=2'b01,imode=2'b01,instruction=8'h3B;
FLASH->QSPI_CCR =
duet_flash_line_cfg; //dumode=2'b10,,sio=1'b0,fmode=2'b11,dmode=2'b10,reserved=1'b0,dcyc=5'h7,absize=2'b00,abmode=2'b00,adsize=2'b10,admode=2'b01,imode=2'b01,instruction=8'h3B;
FLASH->QSPI_AR = 0x0 ; //offset 0x18
FLASH->QSPI_ABR = 0x0 ; //offset 0x1C
FLASH->QSPI_DR = 0x0 ; //offset 0x20
@@ -214,15 +226,15 @@ FLASH_DRIVER_SEG void duet_flash_alg_load_cfg (void) {
FLASH->QSPI_PIR = 0x0 ; //offset 0x2C
FLASH->QSPI_TOR = 0x12FFFF ; //offset 0x30
FLASH->QSPI_CFGR = 0x7202; //offset 0x8C [15:12] set loop back delay=7
}
else
} else
#endif
{
FLASH->QSPI_CR = FLASH_QSPI_DIV2; //div2, //offset 0x00
FLASH->QSPI_DCR = 0x00150000 ; //offset 0x04
FLASH->QSPI_FCR = 0x0 ; //offset 0x0C
FLASH->QSPI_DLR = 0x0 ; //offset 0x10
FLASH->QSPI_CCR = duet_flash_line_cfg; //dumode=2'b10,,sio=1'b0,fmode=2'b11,dmode=2'b10,reserved=1'b0,dcyc=5'h7,absize=2'b00,abmode=2'b00,adsize=2'b10,admode=2'b01,imode=2'b01,instruction=8'h3B;
FLASH->QSPI_CCR =
duet_flash_line_cfg; //dumode=2'b10,,sio=1'b0,fmode=2'b11,dmode=2'b10,reserved=1'b0,dcyc=5'h7,absize=2'b00,abmode=2'b00,adsize=2'b10,admode=2'b01,imode=2'b01,instruction=8'h3B;
FLASH->QSPI_AR = 0x0 ; //offset 0x18
FLASH->QSPI_ABR = 0x0 ; //offset 0x1C
FLASH->QSPI_DR = 0x0 ; //offset 0x20
@@ -245,12 +257,9 @@ FLASH_DRIVER_SEG int duet_flash_alg_init (void)
duet_flash_size_cfg = FLASH_QSPI_DCR_4M; //config flash size here
duet_flash_alg_abort_en();
duet_flash_alg_check_abort_busy();
if(duet_flash_line_cfg == FLASH_QSPI_L4)
{
if (duet_flash_line_cfg == FLASH_QSPI_L4) {
duet_flash_alg_setqe(1);
}
else
{
} else {
duet_flash_alg_setqe(0);
}
@@ -266,7 +275,8 @@ FLASH_DRIVER_SEG int duet_flash_alg_init (void)
* cmd: CHIP_ERASE_CMD or SECTOR_ERASE_CMD or BLOCK32_ERASE_CMD or BLOCK64_ERASE_CMD
* adr: not used for CHIP_ERASE_CMD
*/
FLASH_DRIVER_SEG int duet_flash_alg_erase(unsigned int cmd, unsigned long adr) {
FLASH_DRIVER_SEG int duet_flash_alg_erase(unsigned int cmd, unsigned long adr)
{
//add delay to avoid confilict between flash cfg and instruction fetch by cache
duet_flash_alg_f_delay(32);
@@ -282,8 +292,7 @@ FLASH_DRIVER_SEG int duet_flash_alg_erase(unsigned int cmd, unsigned long adr) {
duet_flash_alg_polling_wel();
FLASH->QSPI_CCR = cmd;
if(CHIP_ERASE_CMD != cmd)
{
if (CHIP_ERASE_CMD != cmd) {
FLASH->QSPI_AR = adr;
}
duet_flash_alg_clr_flg();
@@ -311,22 +320,21 @@ FLASH_DRIVER_SEG int duet_flash_alg_erase(unsigned int cmd, unsigned long adr) {
* Return Value: 0 - OK, 1 - Failed
*/
FLASH_DRIVER_SEG int duet_flash_alg_programpage(unsigned long adr, unsigned long sz, unsigned char *buf) {
FLASH_DRIVER_SEG int duet_flash_alg_programpage(unsigned long adr, unsigned long sz, unsigned char *buf)
{
unsigned long sz_temp;
//volatile int cycle_count = 0;
int var_rdata = 0;
int fthres = 8;
int cnt = 0;
unsigned long ram_buf[SPI_FLASH_PAGE_SIZE/4] = {0};
unsigned long ram_buf[SPI_FLASH_PAGE_SIZE / 4] = {0};
if((0 == sz) || (NULL == buf))
{
if ((0 == sz) || (NULL == buf)) {
return 1;
}
if(((uint32_t)buf >= SPI_FLASH_ADDR_START && (uint32_t)buf <=SPI_FLASH_ADDR_END) || ((uint32_t)buf & 0x3))
{
if (((uint32_t)buf >= SPI_FLASH_ADDR_START && (uint32_t)buf <= SPI_FLASH_ADDR_END) || ((uint32_t)buf & 0x3)) {
memcpy(ram_buf, buf, sz);
buf = (unsigned char *)ram_buf;
}
@@ -347,13 +355,14 @@ FLASH_DRIVER_SEG int duet_flash_alg_programpage(unsigned long adr, unsigned long
duet_flash_alg_check_busy();
duet_flash_alg_polling_wel();
FLASH->QSPI_CCR = 0x1002502;//fmode=2'b00,dmode=2'b01,reserved=1'b0,dcyc=5'h0,absize=2'b00,abmode=2'b00,adsize=2'b10,admode=2'b01,imode=2'b01,instruction=8'h02;
FLASH->QSPI_CCR =
0x1002502;//fmode=2'b00,dmode=2'b01,reserved=1'b0,dcyc=5'h0,absize=2'b00,abmode=2'b00,adsize=2'b10,admode=2'b01,imode=2'b01,instruction=8'h02;
FLASH->QSPI_DLR = sz_temp;
FLASH->QSPI_AR = adr;
while ((sz>0)&&(cnt<fthres)) {
while ((sz > 0) && (cnt < fthres)) {
var_rdata = FLASH->QSPI_SR;
var_rdata = var_rdata >>8 & 0x3F;
if(var_rdata < fthres) {
var_rdata = (var_rdata >> 8) & 0x3F;
if (var_rdata < fthres) {
FLASH->QSPI_DR = *((unsigned long *)buf); // Program Word
cnt += 1;
buf += 4;
@@ -366,8 +375,8 @@ FLASH_DRIVER_SEG int duet_flash_alg_programpage(unsigned long adr, unsigned long
duet_flash_alg_f_delay(10);
while (sz) {
var_rdata = FLASH->QSPI_SR;
var_rdata = var_rdata >>8 & 0x3F;
if(var_rdata < fthres) {
var_rdata = (var_rdata >> 8) & 0x3F;
if (var_rdata < fthres) {
FLASH->QSPI_DR = *((unsigned long *)buf); // Program Word
buf += 4;
sz -= 4;
@@ -403,17 +412,14 @@ FLASH_DRIVER_SEG void duet_flash_alg_read_buf_clr(void)
#ifdef _SPI_FLASH_120MHz_
FLASH_DRIVER_SEG void duet_flash_alg_set_clk_120(unsigned char en_120m)
{
if(en_120m)
{
if (en_120m) {
//flash clock is source/4
REG_WR(APB_PERI_CLK_CTRL_REG, ((REG_RD(APB_PERI_CLK_CTRL_REG) & ~(0x3)) | 0x2));
//switch flash clock source to RF 480M
REG_WR(WIFI_BLE_FLASH_CLK_CTRL_REG, (REG_RD(WIFI_BLE_FLASH_CLK_CTRL_REG) | (1<<7)));
}
else
{
REG_WR(WIFI_BLE_FLASH_CLK_CTRL_REG, (REG_RD(WIFI_BLE_FLASH_CLK_CTRL_REG) | (1 << 7)));
} else {
//switch flash clock source to XO 52M
REG_WR(WIFI_BLE_FLASH_CLK_CTRL_REG, (REG_RD(WIFI_BLE_FLASH_CLK_CTRL_REG) & (~(1<<7))));
REG_WR(WIFI_BLE_FLASH_CLK_CTRL_REG, (REG_RD(WIFI_BLE_FLASH_CLK_CTRL_REG) & (~(1 << 7))));
}
}
#endif
@@ -421,8 +427,7 @@ FLASH_DRIVER_SEG void duet_flash_alg_set_clk_120(unsigned char en_120m)
#ifdef _SPI_FLASH_240MHz_
FLASH_DRIVER_SEG void duet_flash_alg_set_clk_240(unsigned char en_240m)
{
if(en_240m)
{
if (en_240m) {
duet_flash_clk_cfg = 240;
duet_flash_alg_load_cfg();
duet_flash_alg_cache_flush();
@@ -430,12 +435,10 @@ FLASH_DRIVER_SEG void duet_flash_alg_set_clk_240(unsigned char en_240m)
//0x0:flash clock = source APLL 480MHZ / 2
REG_WR(APB_PERI_CLK_CTRL_REG, ((REG_RD(APB_PERI_CLK_CTRL_REG) & ~(0x3)) | 0x0));
//switch flash clock source to RF 480M
REG_WR(WIFI_BLE_FLASH_CLK_CTRL_REG, (REG_RD(WIFI_BLE_FLASH_CLK_CTRL_REG) | (1<<7)));
}
else
{
REG_WR(WIFI_BLE_FLASH_CLK_CTRL_REG, (REG_RD(WIFI_BLE_FLASH_CLK_CTRL_REG) | (1 << 7)));
} else {
//switch flash clock source to XO 52M
REG_WR(WIFI_BLE_FLASH_CLK_CTRL_REG, (REG_RD(WIFI_BLE_FLASH_CLK_CTRL_REG) & (~(1<<7))));
REG_WR(WIFI_BLE_FLASH_CLK_CTRL_REG, (REG_RD(WIFI_BLE_FLASH_CLK_CTRL_REG) & (~(1 << 7))));
duet_flash_clk_cfg = 52;
duet_flash_alg_load_cfg();
@@ -445,14 +448,16 @@ FLASH_DRIVER_SEG void duet_flash_alg_set_clk_240(unsigned char en_240m)
}
#if 0
FLASH_DRIVER_SEG int duet_flash_alg_read_id(void){
FLASH_DRIVER_SEG int duet_flash_alg_read_id(void)
{
int var_rdata;
int dshift;
duet_flash_alg_abort_en();
duet_flash_alg_check_abort_busy();
FLASH->QSPI_CCR = 0x500019F;//fmode=2'b01,dmode=2'b01,reserved=1'b0,dcyc=5'h0,absize=2'b00,abmode=2'b00,adsize=2'b00,admode=2'b00,imode=2'b01,instruction=8'h9F;
FLASH->QSPI_CCR =
0x500019F;//fmode=2'b01,dmode=2'b01,reserved=1'b0,dcyc=5'h0,absize=2'b00,abmode=2'b00,adsize=2'b00,admode=2'b00,imode=2'b01,instruction=8'h9F;
FLASH->QSPI_DLR = 0x2;
duet_flash_alg_clr_flg();
FLASH->SBUS_START = 0x1;
@@ -460,13 +465,13 @@ FLASH_DRIVER_SEG int duet_flash_alg_read_id(void){
duet_flash_alg_f_delay(10);
duet_flash_alg_check_busy();
var_rdata = FLASH->QSPI_CR;
dshift = (var_rdata>>13)&0x7;
dshift = (var_rdata >> 13) & 0x7;
duet_flash_alg_f_delay(dshift);
var_rdata = FLASH->QSPI_DR;
duet_flash_alg_load_cfg();
return(var_rdata);
return (var_rdata);
}
@@ -479,73 +484,67 @@ FLASH_DRIVER_SEG void duet_flash_alg_calibrate_shift(int prescaler)
unsigned int identi;
volatile int id, mem_type, capacity;
int i = 0;
int sshift_max[8]={0};
int sshift_min[8]={0};
int match_flag[8]={0};
int sshift_max[8] = {0};
int sshift_min[8] = {0};
int match_flag[8] = {0};
int match_interval[8] = {0};
//*(volatile int *)(0x40000808) = 0x2;
REG_WR(CLK_FLASH_SEL,FLASH_240_CLK);
REG_WR(CLK_FLASH_SEL, FLASH_240_CLK);
for(delay_shift = 0; delay_shift < 8; delay_shift = delay_shift +1)
{
sshift_max[delay_shift]=0;
sshift_min[delay_shift]=0;
for(sshift = 0; sshift < prescaler; sshift = sshift +1)
{
for (delay_shift = 0; delay_shift < 8; delay_shift = delay_shift + 1) {
sshift_max[delay_shift] = 0;
sshift_min[delay_shift] = 0;
for (sshift = 0; sshift < prescaler; sshift = sshift + 1) {
rdata = FLASH->QSPI_CR;
wdata = rdata&0x87FF1FFF;
wdata |= (sshift&0xF) <<27;
wdata |= (delay_shift&0x7) <<13;
wdata = rdata & 0x87FF1FFF;
wdata |= (sshift & 0xF) << 27;
wdata |= (delay_shift & 0x7) << 13;
FLASH->QSPI_CR = wdata;
//read_id
identi = duet_flash_alg_read_id();
id = identi&0xFF;
mem_type = (identi&0xFF00)>>8;
capacity = (identi&0xFF0000)>>16;
id = identi & 0xFF;
mem_type = (identi & 0xFF00) >> 8;
capacity = (identi & 0xFF0000) >> 16;
if(id == 0x0B && mem_type == 0x40 && capacity == 0x15)
{
match_flag[delay_shift]=0x1;
if(sshift_max[delay_shift] < sshift)
if (id == 0x0B && mem_type == 0x40 && capacity == 0x15) {
match_flag[delay_shift] = 0x1;
if (sshift_max[delay_shift] < sshift) {
sshift_max[delay_shift] = sshift;
if(sshift_min[delay_shift] > sshift)
sshift_min[delay_shift]=sshift;
}
else
{
sshift_min[delay_shift]=sshift + 1;
if(sshift_min[delay_shift]==prescaler)
{
}
if (sshift_min[delay_shift] > sshift) {
sshift_min[delay_shift] = sshift;
}
} else {
sshift_min[delay_shift] = sshift + 1;
if (sshift_min[delay_shift] == prescaler) {
sshift_min[delay_shift] = 0;
}
}
}
}
for(i = 0;i< 8;i++)
{
if(match_flag[i] == 1)
match_interval[i]= sshift_max[i]-sshift_min[i]+1;
else{
for (i = 0; i < 8; i++) {
if (match_flag[i] == 1) {
match_interval[i] = sshift_max[i] - sshift_min[i] + 1;
} else {
match_interval[i] = 0;
}
}
//get the best delay_shift(means max mactch_interval
delay_shift = 0;
for(i = 1;i < 8;i = i+1)
{
if(match_interval[i] > match_interval[delay_shift])
{
for (i = 1; i < 8; i = i + 1) {
if (match_interval[i] > match_interval[delay_shift]) {
delay_shift = i;
}
}
sshift = (sshift_max[delay_shift] + sshift_min[delay_shift])/2 + (sshift_max[delay_shift] + sshift_min[delay_shift])%2;
sshift = (sshift_max[delay_shift] + sshift_min[delay_shift]) / 2 + (sshift_max[delay_shift] + sshift_min[delay_shift]) %
2;
rdata = FLASH->QSPI_CR;
wdata = rdata&0x87FF1FFF;
wdata |= (sshift&0xF) <<27;
wdata |= (delay_shift&0x7) <<13;
wdata = rdata & 0x87FF1FFF;
wdata |= (sshift & 0xF) << 27;
wdata |= (delay_shift & 0x7) << 13;
FLASH->QSPI_CR = wdata;
}
asr582x/liteos_m/sdk/drivers/driver/src/duet_flash_encrypt.c
+14 -15
View File
@@ -14,8 +14,8 @@
*/
#include "duet.h"
#include "duet_flash_encrypt.h"
#include "duet_efuse.h"
#include "duet_flash_encrypt.h"
#define FLASH_CRYPT_EFUSE_KEY_ADDR 124
#define FLASH_CRYPT_EFUSE_ENABLE_ADDR 128
@@ -24,12 +24,12 @@
#define FLASH_CRYPT_BIT_NUM 23 //bit0~bit22
int duet_flash_encrypt_status()
int duet_flash_encrypt_status(void)
{
return ((*((volatile unsigned int *)(0x40000910))) & 0x0020) ? 1 : 0;
}
int switch_flash_encrypt()
int switch_flash_encrypt(void)
{
uint32_t reg;
duet_efuse_init(1);
@@ -38,45 +38,44 @@ int switch_flash_encrypt()
duet_efuse_word_write(FLASH_CRYPT_EFUSE_KEY_ADDR, FLASH_CRYPT_EFUSE_KEY);
// flash crypt enable
reg = duet_efuse_word_read(FLASH_CRYPT_EFUSE_ENABLE_ADDR);
for(int i = 0; i < FLASH_CRYPT_BIT_NUM; i++)
{
if(!(reg & (0x00000001 << i)))
{
for (int i = 0; i < FLASH_CRYPT_BIT_NUM; i++) {
if (!(reg & (0x00000001 << i))) {
duet_efuse_word_write(FLASH_CRYPT_EFUSE_ENABLE_ADDR, (0x00000001 << i));
// reset to make flash crypt module work
FLASH_CRYPT_RESET = 1;
while(FLASH_CRYPT_RESET);
while (FLASH_CRYPT_RESET);
return 0;
}
}
return EIO;
}
int duet_flash_encrypt()
int duet_flash_encrypt(void)
{
if( duet_flash_encrypt_status())
if ( duet_flash_encrypt_status()) {
return 0;
}
return switch_flash_encrypt();
}
int duet_flash_disable_encrypt()
int duet_flash_disable_encrypt(void)
{
if(!duet_flash_encrypt_status())
if (!duet_flash_encrypt_status()) {
return 0;
}
return switch_flash_encrypt();
}
int duet_flash_encrypt_operation_rest()
int duet_flash_encrypt_operation_rest(void)
{
int num = 0;
uint32_t reg;
duet_efuse_init(1);
reg = duet_efuse_word_read(FLASH_CRYPT_EFUSE_ENABLE_ADDR);
for(int i = 0; i < FLASH_CRYPT_BIT_NUM; i++)
{
for (int i = 0; i < FLASH_CRYPT_BIT_NUM; i++) {
num += !(reg & (0x00000001 << i));
}
return num;
asr582x/liteos_m/sdk/drivers/driver/src/duet_gpio.c
+99 -190
View File
@@ -20,8 +20,7 @@
duet_gpio_cb_t g_duet_gpio_handler[DUET_GPIO_TOTAL_NUM];
//gpio pinmux function table
const uint32_t GPIO_PINMUX_FUN[DUET_GPIO_TOTAL_NUM] =
{
const uint32_t GPIO_PINMUX_FUN[DUET_GPIO_TOTAL_NUM] = {
0, 0, 0, 0, 1, 1, 0, 0,
0, 0, 2, 0, 0, 0, 4, 4,
0, 0, 0, 0, 0, 0, 0, 0
@@ -29,37 +28,29 @@ const uint32_t GPIO_PINMUX_FUN[DUET_GPIO_TOTAL_NUM] =
void GPIO_IRQHandler(void)
{
// duet_intrpt_enter();
for(int i = 0; i < DUET_GPIO_TOTAL_NUM; i++)
{
if(i < DUET_GPIO_NUM_PER_GROUP)
{
// duet_intrpt_enter();
for (int i = 0; i < DUET_GPIO_TOTAL_NUM; i++) {
if (i < DUET_GPIO_NUM_PER_GROUP) {
//gpio group0 irq
if(GPIO_GROUP0->INTSTATUS & (0x0001 << i))
{
if (GPIO_GROUP0->INTSTATUS & (0x0001 << i)) {
//clear GPIO GROUP0 interrupt
GPIO_GROUP0->INTSTATUS = (0x0001 << i);
if(g_duet_gpio_handler[i].cb)
{
if (g_duet_gpio_handler[i].cb) {
g_duet_gpio_handler[i].cb(g_duet_gpio_handler[i].arg);
}
}
}
else
{
} else {
//gpio group1 irq
if(GPIO_GROUP1->INTSTATUS & (0x0001 << (i-DUET_GPIO_NUM_PER_GROUP)))
{
if (GPIO_GROUP1->INTSTATUS & (0x0001 << (i - DUET_GPIO_NUM_PER_GROUP))) {
//clear GPIO GROUP1 interrupt
GPIO_GROUP1->INTSTATUS = (0x0001 << (i-DUET_GPIO_NUM_PER_GROUP));
if(g_duet_gpio_handler[i].cb)
{
GPIO_GROUP1->INTSTATUS = (0x0001 << (i - DUET_GPIO_NUM_PER_GROUP));
if (g_duet_gpio_handler[i].cb) {
g_duet_gpio_handler[i].cb(g_duet_gpio_handler[i].arg);
}
}
}
}
// duet_intrpt_exit();
// duet_intrpt_exit();
}
/**
@@ -75,47 +66,36 @@ void GPIO_IRQHandler(void)
int32_t duet_gpio_init(duet_gpio_dev_t *gpio)
{
uint32_t reg_value;
if(NULL == gpio)
{
if (NULL == gpio) {
return EIO;
}
//pinmux setting
if(gpio->port < 8)
{
reg_value = REG_RD(PINMUX_CTRL_REG0) & (~(0x0000000F << (4*gpio->port)));
REG_WR(PINMUX_CTRL_REG0, (reg_value|(GPIO_PINMUX_FUN[gpio->port] << (4*gpio->port))));
}
else if(gpio->port < 16)
{
reg_value = REG_RD(PINMUX_CTRL_REG1) & (~(0x0000000F << (4*(gpio->port-8))));
REG_WR(PINMUX_CTRL_REG1, (reg_value|(GPIO_PINMUX_FUN[gpio->port] << (4*(gpio->port-8)))));
}
else if(gpio->port < 24)
{
reg_value = REG_RD(PINMUX_CTRL_REG2) & (~(0x0000000F << (4*(gpio->port-16))));
REG_WR(PINMUX_CTRL_REG2, (reg_value|(GPIO_PINMUX_FUN[gpio->port] << (4*(gpio->port-16)))));
if (gpio->port < 8) {
reg_value = REG_RD(PINMUX_CTRL_REG0) & (~(0x0000000F << (4 * gpio->port)));
REG_WR(PINMUX_CTRL_REG0, (reg_value | (GPIO_PINMUX_FUN[gpio->port] << (4 * gpio->port))));
} else if (gpio->port < 16) {
reg_value = REG_RD(PINMUX_CTRL_REG1) & (~(0x0000000F << (4 * (gpio->port - 8))));
REG_WR(PINMUX_CTRL_REG1, (reg_value | (GPIO_PINMUX_FUN[gpio->port] << (4 * (gpio->port - 8)))));
} else if (gpio->port < 24) {
reg_value = REG_RD(PINMUX_CTRL_REG2) & (~(0x0000000F << (4 * (gpio->port - 16))));
REG_WR(PINMUX_CTRL_REG2, (reg_value | (GPIO_PINMUX_FUN[gpio->port] << (4 * (gpio->port - 16)))));
}
#if (defined DUET_A0V1)
else if(gpio->port < 32)
{
reg_value = REG_RD(PINMUX_CTRL_REG3) & (~(0x0000000F << (4*(gpio->port-24))));
REG_WR(PINMUX_CTRL_REG3, (reg_value|(GPIO_PINMUX_FUN[gpio->port] << (4*(gpio->port-24)))));
else if (gpio->port < 32) {
reg_value = REG_RD(PINMUX_CTRL_REG3) & (~(0x0000000F << (4 * (gpio->port - 24))));
REG_WR(PINMUX_CTRL_REG3, (reg_value | (GPIO_PINMUX_FUN[gpio->port] << (4 * (gpio->port - 24)))));
}
#endif
else
{
else {
return EIO;
}
if(gpio->port < DUET_GPIO_NUM_PER_GROUP)
{
switch(gpio->config)
{
if (gpio->port < DUET_GPIO_NUM_PER_GROUP) {
switch (gpio->config) {
case DUET_ANALOG_MODE:
break;
case DUET_IRQ_MODE:
case DUET_INPUT_PULL_UP:
if(GPIO_GROUP0->OUTENSET & (1 << gpio->port))
{
if (GPIO_GROUP0->OUTENSET & (1 << gpio->port)) {
GPIO_GROUP0->OUTENCLR = (1 << gpio->port);
}
reg_value = REG_RD(HW_CTRL_PE_PS);
@@ -126,8 +106,7 @@ int32_t duet_gpio_init(duet_gpio_dev_t *gpio)
REG_WR(PAD_PE_REG, (reg_value | (1 << gpio->port)));
break;
case DUET_INPUT_PULL_DOWN:
if(GPIO_GROUP0->OUTENSET & (1 << gpio->port))
{
if (GPIO_GROUP0->OUTENSET & (1 << gpio->port)) {
GPIO_GROUP0->OUTENCLR = (1 << gpio->port);
}
reg_value = REG_RD(HW_CTRL_PE_PS);
@@ -138,16 +117,14 @@ int32_t duet_gpio_init(duet_gpio_dev_t *gpio)
REG_WR(PAD_PE_REG, (reg_value | (1 << gpio->port)));
break;
case DUET_INPUT_HIGH_IMPEDANCE:
if(GPIO_GROUP0->OUTENSET & (1 << gpio->port))
{
if (GPIO_GROUP0->OUTENSET & (1 << gpio->port)) {
GPIO_GROUP0->OUTENCLR = (1 << gpio->port);
}
break;
case DUET_OUTPUT_PUSH_PULL:
case DUET_OUTPUT_OPEN_DRAIN_NO_PULL:
case DUET_OUTPUT_OPEN_DRAIN_PULL_UP:
if(!(GPIO_GROUP0->OUTENSET & (1 << gpio->port)))
{
if (!(GPIO_GROUP0->OUTENSET & (1 << gpio->port))) {
GPIO_GROUP0->OUTENSET = (1 << gpio->port);
}
break;
@@ -155,19 +132,15 @@ int32_t duet_gpio_init(duet_gpio_dev_t *gpio)
return EIO;
//break;
}
}
else //if(gpio->port < 32/24)
{
switch(gpio->config)
{
} else { //if(gpio->port < 32/24)
switch (gpio->config) {
case DUET_ANALOG_MODE:
break;
case DUET_IRQ_MODE:
break;
case DUET_INPUT_PULL_UP:
if(GPIO_GROUP1->OUTENSET & (1 << (gpio->port-DUET_GPIO_NUM_PER_GROUP)))
{
GPIO_GROUP1->OUTENCLR = (1 << (gpio->port-DUET_GPIO_NUM_PER_GROUP));
if (GPIO_GROUP1->OUTENSET & (1 << (gpio->port - DUET_GPIO_NUM_PER_GROUP))) {
GPIO_GROUP1->OUTENCLR = (1 << (gpio->port - DUET_GPIO_NUM_PER_GROUP));
}
reg_value = REG_RD(HW_CTRL_PE_PS);
REG_WR(HW_CTRL_PE_PS, (reg_value & (~(1 << gpio->port))));
@@ -177,9 +150,8 @@ int32_t duet_gpio_init(duet_gpio_dev_t *gpio)
REG_WR(PAD_PE_REG, (reg_value | (1 << gpio->port)));
break;
case DUET_INPUT_PULL_DOWN:
if(GPIO_GROUP1->OUTENSET & (1 << (gpio->port-DUET_GPIO_NUM_PER_GROUP)))
{
GPIO_GROUP1->OUTENCLR = (1 << (gpio->port-DUET_GPIO_NUM_PER_GROUP));
if (GPIO_GROUP1->OUTENSET & (1 << (gpio->port - DUET_GPIO_NUM_PER_GROUP))) {
GPIO_GROUP1->OUTENCLR = (1 << (gpio->port - DUET_GPIO_NUM_PER_GROUP));
}
reg_value = REG_RD(HW_CTRL_PE_PS);
REG_WR(HW_CTRL_PE_PS, (reg_value & (~(1 << gpio->port))));
@@ -189,17 +161,15 @@ int32_t duet_gpio_init(duet_gpio_dev_t *gpio)
REG_WR(PAD_PE_REG, (reg_value | (1 << gpio->port)));
break;
case DUET_INPUT_HIGH_IMPEDANCE:
if(GPIO_GROUP1->OUTENSET & (1 << (gpio->port-DUET_GPIO_NUM_PER_GROUP)))
{
GPIO_GROUP1->OUTENCLR = (1 << (gpio->port-DUET_GPIO_NUM_PER_GROUP));
if (GPIO_GROUP1->OUTENSET & (1 << (gpio->port - DUET_GPIO_NUM_PER_GROUP))) {
GPIO_GROUP1->OUTENCLR = (1 << (gpio->port - DUET_GPIO_NUM_PER_GROUP));
}
break;
case DUET_OUTPUT_PUSH_PULL:
case DUET_OUTPUT_OPEN_DRAIN_NO_PULL:
case DUET_OUTPUT_OPEN_DRAIN_PULL_UP:
if(!(GPIO_GROUP1->OUTENSET & (1 << (gpio->port-DUET_GPIO_NUM_PER_GROUP))))
{
GPIO_GROUP1->OUTENSET = (1 << (gpio->port-DUET_GPIO_NUM_PER_GROUP));
if (!(GPIO_GROUP1->OUTENSET & (1 << (gpio->port - DUET_GPIO_NUM_PER_GROUP)))) {
GPIO_GROUP1->OUTENSET = (1 << (gpio->port - DUET_GPIO_NUM_PER_GROUP));
}
break;
default:
@@ -221,20 +191,14 @@ int32_t duet_gpio_init(duet_gpio_dev_t *gpio)
*/
int32_t duet_gpio_output_high(duet_gpio_dev_t *gpio)
{
if(NULL == gpio)
{
if (NULL == gpio) {
return EIO;
}
if(gpio->port < DUET_GPIO_NUM_PER_GROUP)
{
if (gpio->port < DUET_GPIO_NUM_PER_GROUP) {
GPIO_GROUP0->DATAOUT |= (1 << gpio->port);
}
else if(gpio->port < DUET_GPIO_TOTAL_NUM)
{
GPIO_GROUP1->DATAOUT |= (1 << (gpio->port-DUET_GPIO_NUM_PER_GROUP));
}
else
{
} else if (gpio->port < DUET_GPIO_TOTAL_NUM) {
GPIO_GROUP1->DATAOUT |= (1 << (gpio->port - DUET_GPIO_NUM_PER_GROUP));
} else {
return EIO;
}
return 0;
@@ -251,20 +215,14 @@ int32_t duet_gpio_output_high(duet_gpio_dev_t *gpio)
*/
int32_t duet_gpio_output_low(duet_gpio_dev_t *gpio)
{
if(NULL == gpio)
{
if (NULL == gpio) {
return EIO;
}
if(gpio->port < DUET_GPIO_NUM_PER_GROUP)
{
if (gpio->port < DUET_GPIO_NUM_PER_GROUP) {
GPIO_GROUP0->DATAOUT &= ~(1 << gpio->port);
}
else if(gpio->port < DUET_GPIO_TOTAL_NUM)
{
GPIO_GROUP1->DATAOUT &= ~(1 << (gpio->port-DUET_GPIO_NUM_PER_GROUP));
}
else
{
} else if (gpio->port < DUET_GPIO_TOTAL_NUM) {
GPIO_GROUP1->DATAOUT &= ~(1 << (gpio->port - DUET_GPIO_NUM_PER_GROUP));
} else {
return EIO;
}
return 0;
@@ -283,20 +241,14 @@ int32_t duet_gpio_output_low(duet_gpio_dev_t *gpio)
*/
int32_t duet_gpio_output_get(duet_gpio_dev_t *gpio, uint32_t *value)
{
if(NULL == gpio)
{
if (NULL == gpio) {
return EIO;
}
if(gpio->port < DUET_GPIO_NUM_PER_GROUP)
{
if (gpio->port < DUET_GPIO_NUM_PER_GROUP) {
*value = (GPIO_GROUP0->DATAOUT >> (gpio->port)) & 1;
}
else if(gpio->port < DUET_GPIO_TOTAL_NUM)
{
*value = (GPIO_GROUP1->DATAOUT >> ((gpio->port-DUET_GPIO_NUM_PER_GROUP))) & 1;
}
else
{
} else if (gpio->port < DUET_GPIO_TOTAL_NUM) {
*value = (GPIO_GROUP1->DATAOUT >> ((gpio->port - DUET_GPIO_NUM_PER_GROUP))) & 1;
} else {
return EIO;
}
return 0;
@@ -313,23 +265,16 @@ int32_t duet_gpio_output_get(duet_gpio_dev_t *gpio, uint32_t *value)
int32_t duet_gpio_output_toggle(duet_gpio_dev_t *gpio)
{
uint32_t value;
if(NULL == gpio)
{
if (NULL == gpio) {
return EIO;
}
if(0 == duet_gpio_output_get(gpio, &value))
{
if(value)
{
if (0 == duet_gpio_output_get(gpio, &value)) {
if (value) {
return duet_gpio_output_low(gpio);
}
else
{
} else {
return duet_gpio_output_high(gpio);
}
}
else
{
} else {
return EIO;
}
}
@@ -345,20 +290,14 @@ int32_t duet_gpio_output_toggle(duet_gpio_dev_t *gpio)
*/
int32_t duet_gpio_input_get(duet_gpio_dev_t *gpio, uint32_t *value)
{
if(NULL == gpio)
{
if (NULL == gpio) {
return EIO;
}
if(gpio->port < DUET_GPIO_NUM_PER_GROUP)
{
if (gpio->port < DUET_GPIO_NUM_PER_GROUP) {
*value = (GPIO_GROUP0->DATA >> gpio->port) & 1;
}
else if(gpio->port < DUET_GPIO_TOTAL_NUM)
{
*value = (GPIO_GROUP1->DATA >> (gpio->port-DUET_GPIO_NUM_PER_GROUP)) & 1;
}
else
{
} else if (gpio->port < DUET_GPIO_TOTAL_NUM) {
*value = (GPIO_GROUP1->DATA >> (gpio->port - DUET_GPIO_NUM_PER_GROUP)) & 1;
} else {
return EIO;
}
return 0;
@@ -377,18 +316,15 @@ int32_t duet_gpio_input_get(duet_gpio_dev_t *gpio, uint32_t *value)
* @return 0 : on success, EIO : if an error occurred with any step
*/
int32_t duet_gpio_enable_irq(duet_gpio_dev_t *gpio, duet_gpio_irq_trigger_t trigger,
duet_gpio_irq_handler_t handler, void *arg)
duet_gpio_irq_handler_t handler, void *arg)
{
if(NULL == gpio)
{
if (NULL == gpio) {
return EIO;
}
g_duet_gpio_handler[gpio->port].cb = handler;
g_duet_gpio_handler[gpio->port].arg = arg;
if(gpio->port < DUET_GPIO_NUM_PER_GROUP)
{
switch(trigger)
{
if (gpio->port < DUET_GPIO_NUM_PER_GROUP) {
switch (trigger) {
case DUET_IRQ_TRIGGER_RISING_EDGE:
GPIO_GROUP0->INTTYPESET = (1 << gpio->port); //edge or level trig
GPIO_GROUP0->INTPOLSET = (1 << gpio->port); //trig polarity
@@ -402,27 +338,22 @@ int32_t duet_gpio_enable_irq(duet_gpio_dev_t *gpio, duet_gpio_irq_trigger_t trig
return EIO;
}
GPIO_GROUP0->INTENSET = (1 << gpio->port); //int enable
}
else if(gpio->port < DUET_GPIO_TOTAL_NUM)
{
switch(trigger)
{
} else if (gpio->port < DUET_GPIO_TOTAL_NUM) {
switch (trigger) {
case DUET_IRQ_TRIGGER_RISING_EDGE:
GPIO_GROUP1->INTTYPESET = (1 << (gpio->port-DUET_GPIO_NUM_PER_GROUP));
GPIO_GROUP1->INTPOLSET = (1 << (gpio->port-DUET_GPIO_NUM_PER_GROUP));
GPIO_GROUP1->INTTYPESET = (1 << (gpio->port - DUET_GPIO_NUM_PER_GROUP));
GPIO_GROUP1->INTPOLSET = (1 << (gpio->port - DUET_GPIO_NUM_PER_GROUP));
break;
case DUET_IRQ_TRIGGER_FALLING_EDGE:
GPIO_GROUP1->INTTYPESET = (1 << (gpio->port-DUET_GPIO_NUM_PER_GROUP));
GPIO_GROUP1->INTPOLCLR = (1 << (gpio->port-DUET_GPIO_NUM_PER_GROUP));
GPIO_GROUP1->INTTYPESET = (1 << (gpio->port - DUET_GPIO_NUM_PER_GROUP));
GPIO_GROUP1->INTPOLCLR = (1 << (gpio->port - DUET_GPIO_NUM_PER_GROUP));
break;
case DUET_IRQ_TRIGGER_BOTH_EDGES:
default:
return EIO;
}
GPIO_GROUP1->INTENSET = (1 << (gpio->port-DUET_GPIO_NUM_PER_GROUP));
}
else
{
GPIO_GROUP1->INTENSET = (1 << (gpio->port - DUET_GPIO_NUM_PER_GROUP));
} else {
return EIO;
}
NVIC_EnableIRQ(GPIO_IRQn); //0x10
@@ -440,27 +371,21 @@ int32_t duet_gpio_enable_irq(duet_gpio_dev_t *gpio, duet_gpio_irq_trigger_t trig
*/
int32_t duet_gpio_disable_irq(duet_gpio_dev_t *gpio)
{
if(NULL == gpio)
{
if (NULL == gpio) {
return EIO;
}
g_duet_gpio_handler[gpio->port].cb = NULL;
g_duet_gpio_handler[gpio->port].arg = NULL;
//NVIC_DisableIRQ(GPIO_IRQn); //common use
if(gpio->port < DUET_GPIO_NUM_PER_GROUP)
{
if (gpio->port < DUET_GPIO_NUM_PER_GROUP) {
GPIO_GROUP0->INTENCLR = (1 << gpio->port);
GPIO_GROUP0->INTTYPECLR = (1 << gpio->port);
GPIO_GROUP0->INTPOLCLR = (1 << gpio->port);
}
else if(gpio->port < DUET_GPIO_TOTAL_NUM)
{
GPIO_GROUP1->INTTYPECLR = (1 << (gpio->port-DUET_GPIO_NUM_PER_GROUP));
GPIO_GROUP1->INTPOLCLR = (1 << (gpio->port-DUET_GPIO_NUM_PER_GROUP));
GPIO_GROUP1->INTENCLR = (1 << (gpio->port-DUET_GPIO_NUM_PER_GROUP));
}
else
{
} else if (gpio->port < DUET_GPIO_TOTAL_NUM) {
GPIO_GROUP1->INTTYPECLR = (1 << (gpio->port - DUET_GPIO_NUM_PER_GROUP));
GPIO_GROUP1->INTPOLCLR = (1 << (gpio->port - DUET_GPIO_NUM_PER_GROUP));
GPIO_GROUP1->INTENCLR = (1 << (gpio->port - DUET_GPIO_NUM_PER_GROUP));
} else {
return EIO;
}
return 0;
@@ -477,29 +402,21 @@ int32_t duet_gpio_disable_irq(duet_gpio_dev_t *gpio)
*/
int32_t duet_gpio_clear_irq(duet_gpio_dev_t *gpio)
{
if(NULL == gpio)
{
if (NULL == gpio) {
return EIO;
}
if(gpio->port < DUET_GPIO_NUM_PER_GROUP)
{
if (gpio->port < DUET_GPIO_NUM_PER_GROUP) {
//GPIO interrupt status
if(GPIO_GROUP0->INTSTATUS & (1 << gpio->port))
{
if (GPIO_GROUP0->INTSTATUS & (1 << gpio->port)) {
//clear GPIO interrupt status
GPIO_GROUP0->INTSTATUS = (1 << gpio->port);
}
}
else if(gpio->port < DUET_GPIO_TOTAL_NUM)
{
if(GPIO_GROUP1->INTSTATUS & (1 << (gpio->port-DUET_GPIO_NUM_PER_GROUP)))
{
GPIO_GROUP1->INTSTATUS = (1 << (gpio->port-DUET_GPIO_NUM_PER_GROUP));
} else if (gpio->port < DUET_GPIO_TOTAL_NUM) {
if (GPIO_GROUP1->INTSTATUS & (1 << (gpio->port - DUET_GPIO_NUM_PER_GROUP))) {
GPIO_GROUP1->INTSTATUS = (1 << (gpio->port - DUET_GPIO_NUM_PER_GROUP));
}
}
else
{
} else {
return EIO;
}
@@ -515,26 +432,18 @@ int32_t duet_gpio_clear_irq(duet_gpio_dev_t *gpio)
*/
int32_t duet_gpio_finalize(duet_gpio_dev_t *gpio)
{
if(NULL == gpio)
{
if (NULL == gpio) {
return EIO;
}
if(gpio->port < DUET_GPIO_NUM_PER_GROUP)
{
if(GPIO_GROUP0->OUTENSET & (1 << gpio->port))
{
if (gpio->port < DUET_GPIO_NUM_PER_GROUP) {
if (GPIO_GROUP0->OUTENSET & (1 << gpio->port)) {
GPIO_GROUP0->OUTENCLR = (1 << gpio->port);
}
}
else if(gpio->port < DUET_GPIO_TOTAL_NUM)
{
if(GPIO_GROUP1->OUTENSET & (1 << (gpio->port-DUET_GPIO_NUM_PER_GROUP)))
{
GPIO_GROUP1->OUTENCLR = (1 << (gpio->port-DUET_GPIO_NUM_PER_GROUP));
} else if (gpio->port < DUET_GPIO_TOTAL_NUM) {
if (GPIO_GROUP1->OUTENSET & (1 << (gpio->port - DUET_GPIO_NUM_PER_GROUP))) {
GPIO_GROUP1->OUTENCLR = (1 << (gpio->port - DUET_GPIO_NUM_PER_GROUP));
}
}
else
{
} else {
return EIO;
}
duet_gpio_disable_irq(gpio);
asr582x/liteos_m/sdk/drivers/driver/src/duet_i2c.c
+243 -384
View File
File diff suppressed because it is too large Load Diff
asr582x/liteos_m/sdk/drivers/driver/src/duet_i2s.c
+64 -100
View File
@@ -18,7 +18,7 @@
duet_i2s_callback_func g_duet_i2s_callback_handler;
void duet_i2s_struct_init(duet_i2s_dev_t * pI2S_struct)
void duet_i2s_struct_init(duet_i2s_dev_t *pI2S_struct)
{
pI2S_struct->i2s_role = I2S_ROLE_MASTER;
pI2S_struct->i2s_word_size = I2S_WORDSIZE_16bit;
@@ -31,138 +31,114 @@ void duet_i2s_struct_init(duet_i2s_dev_t * pI2S_struct)
pI2S_struct->i2s_mode = I2S_MODE_PHILIPS;
}
void duet_i2s_interrupt_config(I2S_TypeDef * I2Sx, uint32_t i2s_interrupt, uint32_t new_state)
void duet_i2s_interrupt_config(I2S_TypeDef *I2Sx, uint32_t i2s_interrupt, uint32_t new_state)
{
if( new_state == ENABLE)
{
if ( new_state == ENABLE) {
I2Sx->IMR &= ~i2s_interrupt;
}
else
{
} else {
I2Sx->IMR |= i2s_interrupt;
}
}
void duet_i2s_interrupt_clear(I2S_TypeDef * I2Sx, uint32_t i2s_interrupt)
void duet_i2s_interrupt_clear(I2S_TypeDef *I2Sx, uint32_t i2s_interrupt)
{
if( i2s_interrupt == I2S_INTERRUPT_TXFO )
I2Sx->TOR; // read to clear interrupt
else if( i2s_interrupt == I2S_INTERRUPT_RXFO )
if ( i2s_interrupt == I2S_INTERRUPT_TXFO ) {
I2Sx->TOR; // read to clear interrupt
} else if ( i2s_interrupt == I2S_INTERRUPT_RXFO ) {
I2Sx->ROR;
}
}
void duet_i2s_cmd(I2S_TypeDef * I2Sx, uint32_t new_state)
void duet_i2s_cmd(I2S_TypeDef *I2Sx, uint32_t new_state)
{
if( new_state == ENABLE )
{
if ( new_state == ENABLE ) {
I2Sx->IER |= ENABLE;
}
else
{
} else {
I2Sx->IER &= DISABLE;
}
}
void duet_i2s_tx_block_cmd(I2S_TypeDef * I2Sx, uint32_t new_state)
void duet_i2s_tx_block_cmd(I2S_TypeDef *I2Sx, uint32_t new_state)
{
if( new_state == ENABLE )
{
if ( new_state == ENABLE ) {
I2Sx->ITER |= ENABLE;
}
else
{
} else {
I2Sx->ITER &= DISABLE;
}
}
void duet_i2s_rx_block_cmd(I2S_TypeDef * I2Sx, uint32_t new_state)
void duet_i2s_rx_block_cmd(I2S_TypeDef *I2Sx, uint32_t new_state)
{
if( new_state == ENABLE )
{
if ( new_state == ENABLE ) {
I2Sx->IRER |= ENABLE;
}
else
{
} else {
I2Sx->IRER &= DISABLE;
}
}
void duet_i2s_tx_channel_cmd(I2S_TypeDef * I2Sx, uint32_t new_state)
void duet_i2s_tx_channel_cmd(I2S_TypeDef *I2Sx, uint32_t new_state)
{
if( new_state == ENABLE )
{
if ( new_state == ENABLE ) {
I2Sx->TER |= ENABLE;
}
else
{
} else {
I2Sx->TER &= DISABLE;
}
}
void duet_i2s_rx_channel_cmd(I2S_TypeDef * I2Sx, uint32_t new_state)
void duet_i2s_rx_channel_cmd(I2S_TypeDef *I2Sx, uint32_t new_state)
{
if( new_state == ENABLE )
{
if ( new_state == ENABLE ) {
I2Sx->RER |= ENABLE;
}
else
{
} else {
I2Sx->RER &= DISABLE;
}
}
void duet_i2s_master_clock_cmd(I2S_TypeDef * I2Sx, uint32_t new_state)
void duet_i2s_master_clock_cmd(I2S_TypeDef *I2Sx, uint32_t new_state)
{
if( new_state == ENABLE)
{
if ( new_state == ENABLE) {
I2Sx->CER |= ENABLE;
REG_WR(0X40000844, (0x1<<13) | (0x1<<24)); //open clock source of i2s
}
else
{
REG_WR(0X40000844, (0x1 << 13) | (0x1 << 24)); //open clock source of i2s
} else {
I2Sx->CER &= DISABLE;
REG_WR(0X4000084C, (0x1<<13) | (0x1<<24)); //close clock source of i2s
REG_WR(0X4000084C, (0x1 << 13) | (0x1 << 24)); //close clock source of i2s
}
}
int duet_i2s_init(I2S_TypeDef * I2Sx, duet_i2s_dev_t * pI2S_struct)
int duet_i2s_init(I2S_TypeDef *I2Sx, duet_i2s_dev_t *pI2S_struct)
{
uint32_t mclk_divider = 0;
uint32_t sclk_divider = 0;
uint32_t lrclk_divider = 0;
if(pI2S_struct->i2s_role == I2S_ROLE_MASTER)
{
if(pI2S_struct->i2s_sample_rate == I2S_SAMPLE_RATE_44P1K)
{
if(pI2S_struct->i2s_mclk_src == I2S_MCLK_SRC_FREQ120
if (pI2S_struct->i2s_role == I2S_ROLE_MASTER) {
if (pI2S_struct->i2s_sample_rate == I2S_SAMPLE_RATE_44P1K) {
if (pI2S_struct->i2s_mclk_src == I2S_MCLK_SRC_FREQ120
|| pI2S_struct->i2s_mclk_src == I2S_MCLK_SRC_FREQ96
|| pI2S_struct->i2s_mclk_src == I2S_MCLK_SRC_FREQ72)
{
|| pI2S_struct->i2s_mclk_src == I2S_MCLK_SRC_FREQ72) {
mclk_divider = 17;
}
}
else if(pI2S_struct->i2s_sample_rate == I2S_SAMPLE_RATE_96K
|| pI2S_struct->i2s_sample_rate == I2S_SAMPLE_RATE_48K
|| pI2S_struct->i2s_sample_rate == I2S_SAMPLE_RATE_32K
|| pI2S_struct->i2s_sample_rate == I2S_SAMPLE_RATE_16K
|| pI2S_struct->i2s_sample_rate == I2S_SAMPLE_RATE_8K)
{
if(pI2S_struct->i2s_mclk_src == I2S_MCLK_SRC_FREQ120)
{
} else if (pI2S_struct->i2s_sample_rate == I2S_SAMPLE_RATE_96K
|| pI2S_struct->i2s_sample_rate == I2S_SAMPLE_RATE_48K
|| pI2S_struct->i2s_sample_rate == I2S_SAMPLE_RATE_32K
|| pI2S_struct->i2s_sample_rate == I2S_SAMPLE_RATE_16K
|| pI2S_struct->i2s_sample_rate == I2S_SAMPLE_RATE_8K) {
if (pI2S_struct->i2s_mclk_src == I2S_MCLK_SRC_FREQ120) {
mclk_divider = 13;
}
}
if(mclk_divider == 0)
if (mclk_divider == 0) {
return EIO;
}
lrclk_divider = 2*pI2S_struct->i2s_ws;
lrclk_divider = 2 * pI2S_struct->i2s_ws;
sclk_divider = pI2S_struct->i2s_mclk_src / mclk_divider / pI2S_struct->i2s_sample_rate / lrclk_divider;
}
if(duet_config_apll_clk(pI2S_struct->i2s_mclk_src) != 0)
if (duet_config_apll_clk(pI2S_struct->i2s_mclk_src) != 0) {
return EIO;
}
duet_i2s_master_clock_cmd(I2Sx, ENABLE);
duet_i2s_cmd(I2Sx, DISABLE);
@@ -180,77 +156,65 @@ int duet_i2s_init(I2S_TypeDef * I2Sx, duet_i2s_dev_t * pI2S_struct)
I2Sx->TFCR |= pI2S_struct->i2s_fifo_threshold;
I2Sx->RFF |= 0x1;
I2Sx->TFF |= 0x1;
if(pI2S_struct->i2s_tx_en == ENABLE)
{
if (pI2S_struct->i2s_tx_en == ENABLE) {
duet_i2s_tx_block_cmd(I2Sx, ENABLE);
duet_i2s_tx_channel_cmd(I2Sx, ENABLE);
}
else
{
} else {
duet_i2s_tx_block_cmd(I2Sx, DISABLE);
duet_i2s_tx_channel_cmd(I2Sx, DISABLE);
}
if(pI2S_struct->i2s_rx_en == ENABLE)
{
if (pI2S_struct->i2s_rx_en == ENABLE) {
duet_i2s_rx_block_cmd(I2Sx, ENABLE);
duet_i2s_rx_channel_cmd(I2Sx, ENABLE);
}
else
{
} else {
duet_i2s_rx_block_cmd(I2Sx, DISABLE);
duet_i2s_rx_channel_cmd(I2Sx, DISABLE);
}
if(pI2S_struct->i2s_role == I2S_ROLE_MASTER)
{
if (pI2S_struct->i2s_role == I2S_ROLE_MASTER) {
I2S_CLK_DIV->i2s_mclk_divider = mclk_divider - 1;
I2S_CLK_DIV->i2s_sclk_divider = sclk_divider - 1;
I2S_CLK_DIV->i2s_lrclk_divider = lrclk_divider - 1;
I2S_CLK_DIV->i2s_slave_mode = 0; //set to I2S master
}
else
{
} else {
I2S_CLK_DIV->i2s_slave_mode = 1; //set to I2S slave
}
return 0;
}
uint32_t duet_i2s_receive_data(I2S_TypeDef * I2Sx, uint8_t lr)
uint32_t duet_i2s_receive_data(I2S_TypeDef *I2Sx, uint8_t lr)
{
if(lr == 0) //left channel
if (lr == 0) { //left channel
return I2Sx->LRBR_LTHR;
else // right channel
} else { // right channel
return I2Sx->RRBR_RTHR;
}
}
void duet_i2s_send_data(I2S_TypeDef * I2Sx, uint32_t* left_chan_data, uint32_t* right_chan_data, uint32_t len)
void duet_i2s_send_data(I2S_TypeDef *I2Sx, uint32_t *left_chan_data, uint32_t *right_chan_data, uint32_t len)
{
while(len)
{
while( !i2s_get_interrupt_status(I2Sx, I2S_INTERRUPT_TXFE) ); // wait till tx fifo emptys
for( int i = 0; i < I2S_FIFO_DEPTH && len > 0; i++, len--)
{
while (len) {
while ( !i2s_get_interrupt_status(I2Sx, I2S_INTERRUPT_TXFE) ); // wait till tx fifo emptys
for ( int i = 0; i < I2S_FIFO_DEPTH && len > 0; i++, len--) {
I2Sx->LRBR_LTHR = *left_chan_data++;
I2Sx->RRBR_RTHR = *right_chan_data++;
}
}
while( !i2s_get_interrupt_status(I2Sx, I2S_INTERRUPT_TXFE) ); // wait till tx fifo emptys
while ( !i2s_get_interrupt_status(I2Sx, I2S_INTERRUPT_TXFE) ); // wait till tx fifo emptys
}
void I2S_IRQHandler()
void I2S_IRQHandler(void)
{
uint32_t g_data_l = 0;
uint32_t g_data_r = 0;
if( i2s_get_interrupt_status(I2S,I2S_INTERRUPT_RXDA) ) // rx data available
{
if ( i2s_get_interrupt_status(I2S, I2S_INTERRUPT_RXDA) ) { // rx data available
g_data_l = I2S->LRBR_LTHR;
g_data_r = I2S->RRBR_RTHR;
if(g_duet_i2s_callback_handler != NULL)
{
g_duet_i2s_callback_handler(g_data_l,g_data_r);
if (g_duet_i2s_callback_handler != NULL) {
g_duet_i2s_callback_handler(g_data_l, g_data_r);
}
}
}
asr582x/liteos_m/sdk/drivers/driver/src/duet_pinmux.c
+463 -197
View File
@@ -17,283 +17,550 @@
Pad_Config_State duet_pinmux_config(Pad_Num_Type pad_num, Pad_Func_Type pad_func)
{
uint32_t pad_reg_addr = PINMUX_REG_BASE + 4*(pad_num>>3); // pinmux register address of pad pad_num
uint32_t reg_offset = (pad_num%8)*4; // offset from pad_reg_addr in bits
uint32_t pad_reg_addr = PINMUX_REG_BASE + 4 * (pad_num >> 3); // pinmux register address of pad pad_num
uint32_t reg_offset = (pad_num % 8) * 4; // offset from pad_reg_addr in bits
Pad_Config_State config_state = Config_Success;
uint32_t pad_func_value = 0;
switch(pad_num){
uint32_t pad_func_value = 0;
switch (pad_num) {
case PAD0:
switch(pad_func){
case PF_GPIO0: pad_func_value = 0;break;
case PF_UART0: pad_func_value = 1;break;
case PF_SWD: pad_func_value = 2;break;
case PF_SPI1: pad_func_value = 3;break;
case PF_PWM5: pad_func_value = 4;break;
switch (pad_func) {
case PF_GPIO0:
pad_func_value = 0;
break;
case PF_UART0:
pad_func_value = 1;
break;
case PF_SWD:
pad_func_value = 2;
break;
case PF_SPI1:
pad_func_value = 3;
break;
case PF_PWM5:
pad_func_value = 4;
break;
default:
config_state = Config_Fail;break;
config_state = Config_Fail;
break;
}
break;
case PAD1:
switch(pad_func){
case PF_GPIO1: pad_func_value = 0;break;
case PF_UART0: pad_func_value = 1;break;
case PF_SWD: pad_func_value = 2;break;
case PF_SPI1: pad_func_value = 3;break;
case PF_PWM7: pad_func_value = 4;break;
case PAD1:
switch (pad_func) {
case PF_GPIO1:
pad_func_value = 0;
break;
case PF_UART0:
pad_func_value = 1;
break;
case PF_SWD:
pad_func_value = 2;
break;
case PF_SPI1:
pad_func_value = 3;
break;
case PF_PWM7:
pad_func_value = 4;
break;
default:
config_state = Config_Fail;break;
config_state = Config_Fail;
break;
}
break;
case PAD2:
switch(pad_func){
case PF_GPIO2: pad_func_value = 0;break;
case PF_UART1: pad_func_value = 1;break;
case PF_SPI1: pad_func_value = 3;break;
case PF_I2C0: pad_func_value = 4;break;
switch (pad_func) {
case PF_GPIO2:
pad_func_value = 0;
break;
case PF_UART1:
pad_func_value = 1;
break;
case PF_SPI1:
pad_func_value = 3;
break;
case PF_I2C0:
pad_func_value = 4;
break;
default:
config_state = Config_Fail;break;
config_state = Config_Fail;
break;
}
break;
case PAD3:
switch(pad_func){
case PF_GPIO3: pad_func_value = 0;break;
case PF_UART1: pad_func_value = 1;break;
case PF_SPI1: pad_func_value = 3;break;
case PF_I2C0: pad_func_value = 4;break;
switch (pad_func) {
case PF_GPIO3:
pad_func_value = 0;
break;
case PF_UART1:
pad_func_value = 1;
break;
case PF_SPI1:
pad_func_value = 3;
break;
case PF_I2C0:
pad_func_value = 4;
break;
default:
config_state = Config_Fail;break;
config_state = Config_Fail;
break;
}
break;
case PAD4:
switch(pad_func){
case PF_SWD: pad_func_value = 0;break;
case PF_GPIO4: pad_func_value = 1;break;
case PF_SDIO0: pad_func_value = 2;break;
case PF_UART0: pad_func_value = 3;break;
case PF_PWM0: pad_func_value = 4;break;
case PF_PSRAM: pad_func_value = 7;break;
switch (pad_func) {
case PF_SWD:
pad_func_value = 0;
break;
case PF_GPIO4:
pad_func_value = 1;
break;
case PF_SDIO0:
pad_func_value = 2;
break;
case PF_UART0:
pad_func_value = 3;
break;
case PF_PWM0:
pad_func_value = 4;
break;
case PF_PSRAM:
pad_func_value = 7;
break;
default:
config_state = Config_Fail;break;
config_state = Config_Fail;
break;
}
break;
case PAD5:
switch(pad_func){
case PF_SWD: pad_func_value = 0;break;
case PF_GPIO5: pad_func_value = 1;break;
case PF_SDIO0: pad_func_value = 2;break;
case PF_UART0: pad_func_value = 3;break;
case PF_PWM2: pad_func_value = 4;break;
case PF_PSRAM: pad_func_value = 7;break;
case PAD5:
switch (pad_func) {
case PF_SWD:
pad_func_value = 0;
break;
case PF_GPIO5:
pad_func_value = 1;
break;
case PF_SDIO0:
pad_func_value = 2;
break;
case PF_UART0:
pad_func_value = 3;
break;
case PF_PWM2:
pad_func_value = 4;
break;
case PF_PSRAM:
pad_func_value = 7;
break;
default:
config_state = Config_Fail;break;
config_state = Config_Fail;
break;
}
break;
case PAD6:
switch(pad_func){
case PF_GPIO6: pad_func_value = 0;break;
case PF_SPI0: pad_func_value = 1;break;
case PF_SDIO0: pad_func_value = 2;break;
case PF_UART0: pad_func_value = 3;break;
case PF_PWM4: pad_func_value = 4;break;
case PF_PSRAM: pad_func_value = 7;break;
switch (pad_func) {
case PF_GPIO6:
pad_func_value = 0;
break;
case PF_SPI0:
pad_func_value = 1;
break;
case PF_SDIO0:
pad_func_value = 2;
break;
case PF_UART0:
pad_func_value = 3;
break;
case PF_PWM4:
pad_func_value = 4;
break;
case PF_PSRAM:
pad_func_value = 7;
break;
default:
config_state = Config_Fail;break;
config_state = Config_Fail;
break;
}
break;
case PAD7:
switch(pad_func){
case PF_GPIO7: pad_func_value = 0;break;
case PF_SPI0: pad_func_value = 1;break;
case PF_SDIO0: pad_func_value = 2;break;
case PF_UART0: pad_func_value = 3;break;
case PF_PWM6: pad_func_value = 4;break;
case PF_I2S: pad_func_value = 6;break;
case PF_PSRAM: pad_func_value = 7;break;
switch (pad_func) {
case PF_GPIO7:
pad_func_value = 0;
break;
case PF_SPI0:
pad_func_value = 1;
break;
case PF_SDIO0:
pad_func_value = 2;
break;
case PF_UART0:
pad_func_value = 3;
break;
case PF_PWM6:
pad_func_value = 4;
break;
case PF_I2S:
pad_func_value = 6;
break;
case PF_PSRAM:
pad_func_value = 7;
break;
default:
config_state = Config_Fail;break;
config_state = Config_Fail;
break;
}
break;
case PAD8:
switch(pad_func){
case PF_GPIO8: pad_func_value = 0;break;
case PF_SPI0: pad_func_value = 1;break;
case PF_SDIO0: pad_func_value = 2;break;
case PF_I2C1: pad_func_value = 3;break;
case PF_UART1: pad_func_value = 4;break;
case PF_I2S: pad_func_value = 6;break;
case PF_PSRAM: pad_func_value = 7;break;
switch (pad_func) {
case PF_GPIO8:
pad_func_value = 0;
break;
case PF_SPI0:
pad_func_value = 1;
break;
case PF_SDIO0:
pad_func_value = 2;
break;
case PF_I2C1:
pad_func_value = 3;
break;
case PF_UART1:
pad_func_value = 4;
break;
case PF_I2S:
pad_func_value = 6;
break;
case PF_PSRAM:
pad_func_value = 7;
break;
default:
config_state = Config_Fail;break;
config_state = Config_Fail;
break;
}
break;
case PAD9:
switch(pad_func){
case PF_GPIO9: pad_func_value = 0;break;
case PF_SPI0: pad_func_value = 1;break;
case PF_SDIO0: pad_func_value = 2;break;
case PF_I2C1: pad_func_value = 3;break;
case PF_UART1: pad_func_value = 4;break;
case PF_I2S: pad_func_value = 6;break;
case PF_PSRAM: pad_func_value = 7;break;
switch (pad_func) {
case PF_GPIO9:
pad_func_value = 0;
break;
case PF_SPI0:
pad_func_value = 1;
break;
case PF_SDIO0:
pad_func_value = 2;
break;
case PF_I2C1:
pad_func_value = 3;
break;
case PF_UART1:
pad_func_value = 4;
break;
case PF_I2S:
pad_func_value = 6;
break;
case PF_PSRAM:
pad_func_value = 7;
break;
default:
config_state = Config_Fail;break;
config_state = Config_Fail;
break;
}
break;
case PAD10:
switch(pad_func){
switch (pad_func) {
case PF_PWM1: pad_func_value = 1;break;
case PF_GPIO10:pad_func_value = 2;break;
case PF_UART2: pad_func_value = 3;break;
case PF_SPI2: pad_func_value = 4;break;
case PF_I2S: pad_func_value = 6;break;
case PF_PWM1:
pad_func_value = 1;
break;
case PF_GPIO10:
pad_func_value = 2;
break;
case PF_UART2:
pad_func_value = 3;
break;
case PF_SPI2:
pad_func_value = 4;
break;
case PF_I2S:
pad_func_value = 6;
break;
default:
config_state = Config_Fail;break;
config_state = Config_Fail;
break;
}
break;
case PAD11:
switch(pad_func){
case PF_GPIO11:pad_func_value = 0;break;
case PF_PWM3: pad_func_value = 1;break;
case PF_SDIO0: pad_func_value = 2;break;
case PF_UART2: pad_func_value = 3;break;
case PF_SPI2: pad_func_value = 4;break;
case PF_I2S: pad_func_value = 6;break;
switch (pad_func) {
case PF_GPIO11:
pad_func_value = 0;
break;
case PF_PWM3:
pad_func_value = 1;
break;
case PF_SDIO0:
pad_func_value = 2;
break;
case PF_UART2:
pad_func_value = 3;
break;
case PF_SPI2:
pad_func_value = 4;
break;
case PF_I2S:
pad_func_value = 6;
break;
default:
config_state = Config_Fail;break;
config_state = Config_Fail;
break;
}
break;
case PAD12:
switch(pad_func){
case PF_GPIO12:pad_func_value = 0;break;
case PF_SPI2: pad_func_value = 2;break;
case PF_UART2: pad_func_value = 3;break;
case PF_I2S: pad_func_value = 6;break;
switch (pad_func) {
case PF_GPIO12:
pad_func_value = 0;
break;
case PF_SPI2:
pad_func_value = 2;
break;
case PF_UART2:
pad_func_value = 3;
break;
case PF_I2S:
pad_func_value = 6;
break;
default:
config_state = Config_Fail;break;
config_state = Config_Fail;
break;
}
break;
case PAD13:
switch(pad_func){
case PF_GPIO13:pad_func_value = 0;break;
case PF_SPI2: pad_func_value = 2;break;
case PF_UART2: pad_func_value = 3;break;
switch (pad_func) {
case PF_GPIO13:
pad_func_value = 0;
break;
case PF_SPI2:
pad_func_value = 2;
break;
case PF_UART2:
pad_func_value = 3;
break;
default:
config_state = Config_Fail;break;
config_state = Config_Fail;
break;
}
break;
case PAD14:
switch(pad_func){
case PF_PWM0: pad_func_value = 1;break;
case PF_SPI2: pad_func_value = 2;break;
case PF_UART1: pad_func_value = 3;break;
case PF_GPIO14:pad_func_value = 4;break;
switch (pad_func) {
case PF_PWM0:
pad_func_value = 1;
break;
case PF_SPI2:
pad_func_value = 2;
break;
case PF_UART1:
pad_func_value = 3;
break;
case PF_GPIO14:
pad_func_value = 4;
break;
default:
config_state = Config_Fail;break;
config_state = Config_Fail;
break;
}
break;
case PAD15:
switch(pad_func){
case PF_PWM2: pad_func_value = 1;break;
case PF_SPI2: pad_func_value = 2;break;
case PF_UART1: pad_func_value = 3;break;
case PF_GPIO15:pad_func_value = 4;break;
switch (pad_func) {
case PF_PWM2:
pad_func_value = 1;
break;
case PF_SPI2:
pad_func_value = 2;
break;
case PF_UART1:
pad_func_value = 3;
break;
case PF_GPIO15:
pad_func_value = 4;
break;
default:
config_state = Config_Fail;break;
config_state = Config_Fail;
break;
}
break;
case PAD16:
switch(pad_func){
case PF_GPIO16:pad_func_value = 0;break;
case PF_UART0: pad_func_value = 1;break;
case PF_SDIO0: pad_func_value = 2;break;
case PF_SPI1: pad_func_value = 3;break;
case PF_PSRAM: pad_func_value = 6;break;
switch (pad_func) {
case PF_GPIO16:
pad_func_value = 0;
break;
case PF_UART0:
pad_func_value = 1;
break;
case PF_SDIO0:
pad_func_value = 2;
break;
case PF_SPI1:
pad_func_value = 3;
break;
case PF_PSRAM:
pad_func_value = 6;
break;
default:
config_state = Config_Fail;break;
config_state = Config_Fail;
break;
}
break;
case PAD17:
switch(pad_func){
case PF_GPIO17:pad_func_value = 0;break;
case PF_UART0: pad_func_value = 1;break;
case PF_SDIO0: pad_func_value = 2;break;
case PF_SPI1: pad_func_value = 3;break;
case PF_PSRAM: pad_func_value = 6;break;
switch (pad_func) {
case PF_GPIO17:
pad_func_value = 0;
break;
case PF_UART0:
pad_func_value = 1;
break;
case PF_SDIO0:
pad_func_value = 2;
break;
case PF_SPI1:
pad_func_value = 3;
break;
case PF_PSRAM:
pad_func_value = 6;
break;
default:
config_state = Config_Fail;break;
config_state = Config_Fail;
break;
}
break;
case PAD18:
switch(pad_func){
case PF_GPIO18:pad_func_value = 0;break;
case PF_UART1: pad_func_value = 1;break;
case PF_SDIO0: pad_func_value = 2;break;
case PF_SPI1: pad_func_value = 3;break;
case PF_PSRAM: pad_func_value = 6;break;
switch (pad_func) {
case PF_GPIO18:
pad_func_value = 0;
break;
case PF_UART1:
pad_func_value = 1;
break;
case PF_SDIO0:
pad_func_value = 2;
break;
case PF_SPI1:
pad_func_value = 3;
break;
case PF_PSRAM:
pad_func_value = 6;
break;
default:
config_state = Config_Fail;break;
config_state = Config_Fail;
break;
}
break;
case PAD19:
switch(pad_func){
case PF_GPIO19:pad_func_value = 0;break;
case PF_UART1: pad_func_value = 1;break;
case PF_SDIO0: pad_func_value = 2;break;
case PF_SPI1: pad_func_value = 3;break;
case PF_PSRAM: pad_func_value = 6;break;
switch (pad_func) {
case PF_GPIO19:
pad_func_value = 0;
break;
case PF_UART1:
pad_func_value = 1;
break;
case PF_SDIO0:
pad_func_value = 2;
break;
case PF_SPI1:
pad_func_value = 3;
break;
case PF_PSRAM:
pad_func_value = 6;
break;
default:
config_state = Config_Fail;break;
config_state = Config_Fail;
break;
}
break;
case PAD20:
switch(pad_func){
case PF_GPIO20:pad_func_value = 0;break;
case PF_I2C0: pad_func_value = 1;break;
case PF_SDIO0: pad_func_value = 2;break;
case PF_UART0: pad_func_value = 3;break;
case PF_PSRAM: pad_func_value = 6;break;
switch (pad_func) {
case PF_GPIO20:
pad_func_value = 0;
break;
case PF_I2C0:
pad_func_value = 1;
break;
case PF_SDIO0:
pad_func_value = 2;
break;
case PF_UART0:
pad_func_value = 3;
break;
case PF_PSRAM:
pad_func_value = 6;
break;
default:
config_state = Config_Fail;break;
config_state = Config_Fail;
break;
}
break;
case PAD21:
switch(pad_func){
case PF_GPIO21:pad_func_value = 0;break;
case PF_I2C0: pad_func_value = 1;break;
case PF_SDIO0: pad_func_value = 2;break;
case PF_UART0: pad_func_value = 3;break;
case PF_PSRAM: pad_func_value = 6;break;
switch (pad_func) {
case PF_GPIO21:
pad_func_value = 0;
break;
case PF_I2C0:
pad_func_value = 1;
break;
case PF_SDIO0:
pad_func_value = 2;
break;
case PF_UART0:
pad_func_value = 3;
break;
case PF_PSRAM:
pad_func_value = 6;
break;
default:
config_state = Config_Fail;break;
config_state = Config_Fail;
break;
}
break;
case PAD22:
switch(pad_func){
case PF_GPIO22:pad_func_value = 0;break;
case PF_I2C1: pad_func_value = 1;break;
case PF_SDIO0: pad_func_value = 2;break;
case PF_UART2: pad_func_value = 3;break;
case PF_PSRAM: pad_func_value = 6;break;
switch (pad_func) {
case PF_GPIO22:
pad_func_value = 0;
break;
case PF_I2C1:
pad_func_value = 1;
break;
case PF_SDIO0:
pad_func_value = 2;
break;
case PF_UART2:
pad_func_value = 3;
break;
case PF_PSRAM:
pad_func_value = 6;
break;
default:
config_state = Config_Fail;break;
config_state = Config_Fail;
break;
}
break;
case PAD23:
switch(pad_func){
case PF_GPIO23:pad_func_value = 0;break;
case PF_I2C1: pad_func_value = 1;break;
case PF_UART2: pad_func_value = 3;break;
switch (pad_func) {
case PF_GPIO23:
pad_func_value = 0;
break;
case PF_I2C1:
pad_func_value = 1;
break;
case PF_UART2:
pad_func_value = 3;
break;
default:
config_state = Config_Fail;break;
config_state = Config_Fail;
break;
}
break;
default:
config_state = Config_Fail;break;
config_state = Config_Fail;
break;
}
*(volatile uint32_t *)(pad_reg_addr) &= ~(0xf<<reg_offset); // mask
*(volatile uint32_t *)(pad_reg_addr) |= (pad_func_value<<reg_offset); // set pinmux value
*(volatile uint32_t *)(pad_reg_addr) &= ~(0xf << reg_offset); // mask
*(volatile uint32_t *)(pad_reg_addr) |= (pad_func_value << reg_offset); // set pinmux value
return config_state;
}
@@ -301,24 +568,23 @@ void duet_pad_config(Pad_Num_Type pad_num, Pad_Pull_Type pull_type)
{
/* assert params */
// to-do
switch(pull_type)
{
case PULL_UP:
*(volatile uint32_t *)(HW_CTRL_PE_PS) &= ~(0x1 << (pad_num));
*(volatile uint32_t *)(PAD_PE_REG) |= (0x1 << (pad_num));
*(volatile uint32_t *)(PAD_PS_REG) |= (0x1 << (pad_num));
break;
case PULL_DOWN:
*(volatile uint32_t *)(HW_CTRL_PE_PS) &= ~(0x1 << (pad_num));
*(volatile uint32_t *)(PAD_PE_REG) |= (0x1 << (pad_num));
*(volatile uint32_t *)(PAD_PS_REG) &= ~(0x1 << (pad_num));
break;
case PULL_NONE:
*(volatile uint32_t *)(HW_CTRL_PE_PS) &= ~(0x1 << (pad_num));
*(volatile uint32_t *)(PAD_PE_REG) &= ~(0x1 << (pad_num));
break;
default:
break;
}
switch (pull_type) {
case PULL_UP:
*(volatile uint32_t *)(HW_CTRL_PE_PS) &= ~(0x1 << (pad_num));
*(volatile uint32_t *)(PAD_PE_REG) |= (0x1 << (pad_num));
*(volatile uint32_t *)(PAD_PS_REG) |= (0x1 << (pad_num));
break;
case PULL_DOWN:
*(volatile uint32_t *)(HW_CTRL_PE_PS) &= ~(0x1 << (pad_num));
*(volatile uint32_t *)(PAD_PE_REG) |= (0x1 << (pad_num));
*(volatile uint32_t *)(PAD_PS_REG) &= ~(0x1 << (pad_num));
break;
case PULL_NONE:
*(volatile uint32_t *)(HW_CTRL_PE_PS) &= ~(0x1 << (pad_num));
*(volatile uint32_t *)(PAD_PE_REG) &= ~(0x1 << (pad_num));
break;
default:
break;
}
}
asr582x/liteos_m/sdk/drivers/driver/src/duet_psram.c
+114 -99
View File
@@ -51,143 +51,160 @@ int mode_config = -1;
static void psram_wait_finish(void)
{
while(REG_RD(PSRAM_SR)&0x2);
while(!(REG_RD(PSRAM_FR)&0x1));
while (REG_RD(PSRAM_SR) & 0x2);
while (!(REG_RD(PSRAM_FR) & 0x1));
REG_WR(PSRAM_FR, 1);
}
static void psram_init_lut_ps_read(unsigned int seq_id)
{
REG_WR((PSRAM_LUT0+0x10*seq_id),(PSRAM_CMD_ADDR<<26|0x0<<24|0x18<<16 | PSRAM_CMD_CMD<<10|0x0<<8|FLASH_CMD_READ));
REG_WR((PSRAM_LUT1+0x10*seq_id),(PSRAM_CMD_JMP_ON_CS<<26|0x0<<24|0x00<<16 | PSRAM_CMD_READ<<10|0x0<<8|0x20));
REG_WR((PSRAM_LUT2+0x10*seq_id),0);
REG_WR((PSRAM_LUT3+0x10*seq_id),0);
REG_WR((PSRAM_LUT0 + 0x10 * seq_id),
((PSRAM_CMD_ADDR << 26) | (0x0 << 24) | (0x18 << 16) | (PSRAM_CMD_CMD << 10) | (0x0 << 8) | FLASH_CMD_READ));
REG_WR((PSRAM_LUT1 + 0x10 * seq_id),
((PSRAM_CMD_JMP_ON_CS << 26) | (0x0 << 24) | (0x00 << 16) | (PSRAM_CMD_READ << 10) | (0x0 << 8) | 0x20));
REG_WR((PSRAM_LUT2 + 0x10 * seq_id), 0);
REG_WR((PSRAM_LUT3 + 0x10 * seq_id), 0);
}
static void psram_init_lut_ps_write(unsigned int seq_id)
{
REG_WR((PSRAM_LUT0+0x10*seq_id),(PSRAM_CMD_ADDR<<26|0x0<<24|0x18<<16 | PSRAM_CMD_CMD<<10|0x0<<8|FLASH_CMD_WRITE));
REG_WR((PSRAM_LUT1+0x10*seq_id),(PSRAM_CMD_JMP_ON_CS<<26|0x0<<24|0x00<<16 | PSRAM_CMD_WRITE<<10|0x0<<8|0x20));
REG_WR((PSRAM_LUT2+0x10*seq_id),0);
REG_WR((PSRAM_LUT3+0x10*seq_id),0);
REG_WR((PSRAM_LUT0 + 0x10 * seq_id),
((PSRAM_CMD_ADDR << 26) | (0x0 << 24) | (0x18 << 16) | (PSRAM_CMD_CMD << 10) | (0x0 << 8) | FLASH_CMD_WRITE));
REG_WR((PSRAM_LUT1 + 0x10 * seq_id),
((PSRAM_CMD_JMP_ON_CS << 26) | (0x0 << 24) | (0x00 << 16) | (PSRAM_CMD_WRITE << 10) | (0x0 << 8) | 0x20));
REG_WR((PSRAM_LUT2 + 0x10 * seq_id), 0);
REG_WR((PSRAM_LUT3 + 0x10 * seq_id), 0);
}
static void psram_init_lut_ps_write_evict(unsigned int seq_id)
{
REG_WR((PSRAM_LUT0+0x10*seq_id),(PSRAM_CMD_ADDR<<26|0x0<<24|0x18<<16 | PSRAM_CMD_CMD<<10|0x0<<8|FLASH_CMD_WRITE));
REG_WR((PSRAM_LUT1+0x10*seq_id),(PSRAM_CMD_JMP_ON_CS<<26|0<<24|0x00<<16 | 21<<10|0<<8|0x20));
REG_WR((PSRAM_LUT2+0x10*seq_id),0);
REG_WR((PSRAM_LUT3+0x10*seq_id),0);
REG_WR((PSRAM_LUT0 + 0x10 * seq_id),
((PSRAM_CMD_ADDR << 26) | (0x0 << 24) | (0x18 << 16) | (PSRAM_CMD_CMD << 10) | (0x0 << 8) | FLASH_CMD_WRITE));
REG_WR((PSRAM_LUT1 + 0x10 * seq_id),
((PSRAM_CMD_JMP_ON_CS << 26) | (0 << 24) | (0x00 << 16) | (21 << 10) | (0 << 8) | 0x20));
REG_WR((PSRAM_LUT2 + 0x10 * seq_id), 0);
REG_WR((PSRAM_LUT3 + 0x10 * seq_id), 0);
}
static void psram_init_lut_ps_mode_register_read(unsigned int seq_id)
{
REG_WR((PSRAM_LUT0+0x10*seq_id),(PSRAM_CMD_ADDR<<26|0x0<<24|0x18<<16 | PSRAM_CMD_CMD<<10|0x0<<8|FLASH_CMD_MODE_REG_READ));
REG_WR((PSRAM_LUT1+0x10*seq_id),(PSRAM_CMD_READ<<26|0x0<<24|0x2<<16 | PSRAM_CMD_DUMMY<<10|0x0<<8|(8-1)));
REG_WR((PSRAM_LUT2+0x10*seq_id),( PSRAM_CMD_JMP_ON_CS<<10|0x0<<8|0x0));
REG_WR((PSRAM_LUT3+0x10*seq_id),0);
REG_WR((PSRAM_LUT0 + 0x10 * seq_id),
((PSRAM_CMD_ADDR << 26) | (0x0 << 24) | (0x18 << 16) | (PSRAM_CMD_CMD << 10) | (0x0 << 8) | FLASH_CMD_MODE_REG_READ));
REG_WR((PSRAM_LUT1 + 0x10 * seq_id),
((PSRAM_CMD_READ << 26) | (0x0 << 24) | (0x2 << 16) | (PSRAM_CMD_DUMMY << 10) | (0x0 << 8) | (8 - 1)));
REG_WR((PSRAM_LUT2 + 0x10 * seq_id), ( (PSRAM_CMD_JMP_ON_CS << 10) | (0x0 << 8) | 0x0));
REG_WR((PSRAM_LUT3 + 0x10 * seq_id), 0);
}
static void psram_init_lut_ps_mode_register_write(unsigned int seq_id)
{
REG_WR((PSRAM_LUT0+0x10*seq_id),(PSRAM_CMD_ADDR<<26|0x0<<24|0x18<<16 | PSRAM_CMD_CMD<<10|0x0<<8|FLASH_CMD_MODE_REG_WRITE));
REG_WR((PSRAM_LUT1+0x10*seq_id),(PSRAM_CMD_JMP_ON_CS<<26|0x0<<24|0x00<<16 | PSRAM_CMD_WRITE<<10|0x0<<8|0x20));
REG_WR((PSRAM_LUT2+0x10*seq_id),0);
REG_WR((PSRAM_LUT3+0x10*seq_id),0);
REG_WR((PSRAM_LUT0 + 0x10 * seq_id),
((PSRAM_CMD_ADDR << 26) | (0x0 << 24) | (0x18 << 16) | (PSRAM_CMD_CMD << 10) | (0x0 << 8) | FLASH_CMD_MODE_REG_WRITE));
REG_WR((PSRAM_LUT1 + 0x10 * seq_id),
((PSRAM_CMD_JMP_ON_CS << 26) | (0x0 << 24) | (0x00 << 16) | (PSRAM_CMD_WRITE << 10) | (0x0 << 8) | 0x20));
REG_WR((PSRAM_LUT2 + 0x10 * seq_id), 0);
REG_WR((PSRAM_LUT3 + 0x10 * seq_id), 0);
}
static void psram_init_lut_ps_qmode_enable(unsigned int seq_id)
{
REG_WR((PSRAM_LUT0+0x10*seq_id),(PSRAM_CMD_CMD<<10|0<<8|FLASH_CMD_ENTER_QUAD_MODE));
REG_WR((PSRAM_LUT1+0x10*seq_id),0);
REG_WR((PSRAM_LUT2+0x10*seq_id),0);
REG_WR((PSRAM_LUT3+0x10*seq_id),0);
REG_WR((PSRAM_LUT0 + 0x10 * seq_id), ((PSRAM_CMD_CMD << 10) | (0 << 8) | FLASH_CMD_ENTER_QUAD_MODE));
REG_WR((PSRAM_LUT1 + 0x10 * seq_id), 0);
REG_WR((PSRAM_LUT2 + 0x10 * seq_id), 0);
REG_WR((PSRAM_LUT3 + 0x10 * seq_id), 0);
}
static void psram_init_lut_ps_qmode_exit(unsigned int seq_id)
{
REG_WR((PSRAM_LUT0+0x10*seq_id),(PSRAM_CMD_CMD<<10|0x2<<8|FLASH_CMD_EXIT_QUAD_MODE));
REG_WR((PSRAM_LUT1+0x10*seq_id),0);
REG_WR((PSRAM_LUT2+0x10*seq_id),0);
REG_WR((PSRAM_LUT3+0x10*seq_id),0);
REG_WR((PSRAM_LUT0 + 0x10 * seq_id), ((PSRAM_CMD_CMD << 10) | (0x2 << 8) | FLASH_CMD_EXIT_QUAD_MODE));
REG_WR((PSRAM_LUT1 + 0x10 * seq_id), 0);
REG_WR((PSRAM_LUT2 + 0x10 * seq_id), 0);
REG_WR((PSRAM_LUT3 + 0x10 * seq_id), 0);
}
static void psram_init_lut_ps_read_4x(unsigned int seq_id)
{
REG_WR((PSRAM_LUT0+0x10*seq_id),(PSRAM_CMD_ADDR<<26|0x2<<24|0x18<<16 | PSRAM_CMD_CMD<<10|0x2<<8|FLASH_CMD_FAST_READ_QUAD));
REG_WR((PSRAM_LUT1+0x10*seq_id),(PSRAM_CMD_READ<<26|0x2<<24|0x20<<16 | PSRAM_CMD_DUMMY<<10|0x2<<8|(6-1)));
REG_WR((PSRAM_LUT2+0x10*seq_id),(PSRAM_CMD_JMP_ON_CS<<10|0x2<<8|0x00) );
REG_WR((PSRAM_LUT3+0x10*seq_id),0);
REG_WR((PSRAM_LUT0 + 0x10 * seq_id),
((PSRAM_CMD_ADDR << 26) | (0x2 << 24) | (0x18 << 16) | (PSRAM_CMD_CMD << 10) | (0x2 << 8) | FLASH_CMD_FAST_READ_QUAD));
REG_WR((PSRAM_LUT1 + 0x10 * seq_id),
((PSRAM_CMD_READ << 26) | (0x2 << 24) | (0x20 << 16) | (PSRAM_CMD_DUMMY << 10) | (0x2 << 8) | (6 - 1)));
REG_WR((PSRAM_LUT2 + 0x10 * seq_id), ((PSRAM_CMD_JMP_ON_CS << 10) | (0x2 << 8) | 0x00) );
REG_WR((PSRAM_LUT3 + 0x10 * seq_id), 0);
}
static void psram_init_lut_ps_write_4x(unsigned int seq_id)
{
REG_WR((PSRAM_LUT0+0x10*seq_id),(PSRAM_CMD_ADDR<<26|0x2<<24|0x18<<16 | PSRAM_CMD_CMD<<10|0x2<<8|FLASH_CMD_WRITE));
REG_WR((PSRAM_LUT1+0x10*seq_id),(PSRAM_CMD_JMP_ON_CS<<26|0x2<<24|0x00<<16 | PSRAM_CMD_WRITE<<10|0x2<<8|0x20));
REG_WR((PSRAM_LUT2+0x10*seq_id),0);
REG_WR((PSRAM_LUT3+0x10*seq_id),0);
REG_WR((PSRAM_LUT0 + 0x10 * seq_id),
((PSRAM_CMD_ADDR << 26) | (0x2 << 24) | (0x18 << 16) | (PSRAM_CMD_CMD << 10) | (0x2 << 8) | FLASH_CMD_WRITE));
REG_WR((PSRAM_LUT1 + 0x10 * seq_id),
((PSRAM_CMD_JMP_ON_CS << 26) | (0x2 << 24) | (0x00 << 16) | (PSRAM_CMD_WRITE << 10) | (0x2 << 8) | 0x20));
REG_WR((PSRAM_LUT2 + 0x10 * seq_id), 0);
REG_WR((PSRAM_LUT3 + 0x10 * seq_id), 0);
}
static void psram_init_lut_ps_write_evict_4x(unsigned int seq_id)
{
REG_WR((PSRAM_LUT0+0x10*seq_id),(PSRAM_CMD_ADDR<<26|0x2<<24|0x18<<16 | PSRAM_CMD_CMD<<10|0x2<<8|FLASH_CMD_WRITE));
REG_WR((PSRAM_LUT1+0x10*seq_id),(PSRAM_CMD_JMP_ON_CS<<26|0x2<<24|0x00<<16 | 21<<10|0x2<<8|0x20));
REG_WR((PSRAM_LUT2+0x10*seq_id),0);
REG_WR((PSRAM_LUT3+0x10*seq_id),0);
REG_WR((PSRAM_LUT0 + 0x10 * seq_id),
((PSRAM_CMD_ADDR << 26) | (0x2 << 24) | (0x18 << 16) | (PSRAM_CMD_CMD << 10) | (0x2 << 8) | FLASH_CMD_WRITE));
REG_WR((PSRAM_LUT1 + 0x10 * seq_id),
((PSRAM_CMD_JMP_ON_CS << 26) | (0x2 << 24) | (0x00 << 16) | (21 << 10) | (0x2 << 8) | 0x20));
REG_WR((PSRAM_LUT2 + 0x10 * seq_id), 0);
REG_WR((PSRAM_LUT3 + 0x10 * seq_id), 0);
}
static void psram_init_lut_ps_readid(unsigned int seq_id)
{
REG_WR((PSRAM_LUT0+0x10*seq_id),( PSRAM_CMD_ADDR<<26|0x0<<24|0x18<<16 | PSRAM_CMD_CMD<<10|0x0<<8|FLASH_CMD_READ_ID));
REG_WR((PSRAM_LUT1+0x10*seq_id),( PSRAM_CMD_READ<<10|0x0<<8|0x9));
REG_WR((PSRAM_LUT2+0x10*seq_id),0);
REG_WR((PSRAM_LUT3+0x10*seq_id),0);
REG_WR((PSRAM_LUT0 + 0x10 * seq_id),
( (PSRAM_CMD_ADDR << 26) | (0x0 << 24) | (0x18 << 16) | (PSRAM_CMD_CMD << 10) | (0x0 << 8) | FLASH_CMD_READ_ID));
REG_WR((PSRAM_LUT1 + 0x10 * seq_id), ( (PSRAM_CMD_READ << 10) | (0x0 << 8) | 0x9));
REG_WR((PSRAM_LUT2 + 0x10 * seq_id), 0);
REG_WR((PSRAM_LUT3 + 0x10 * seq_id), 0);
}
int psram_set_channel(duet_psram_channel channel)
{
if(channel != PSRAM_CHANNEL_4_9 && channel != PSRAM_CHANNEL_16_21)
if (channel != PSRAM_CHANNEL_4_9 && channel != PSRAM_CHANNEL_16_21) {
return -1;
REG_WR(ADC_SDIO_BLE_DEBUG_CTRL_REG,REG_RD(ADC_SDIO_BLE_DEBUG_CTRL_REG) & (~(1<<3)));//disable sdio debug
if(channel == PSRAM_CHANNEL_4_9)
{
duet_pinmux_config(PAD4,PF_PSRAM);//set pad4 mux to psram
duet_pinmux_config(PAD5,PF_PSRAM);//set pad5 mux to psram
duet_pinmux_config(PAD6,PF_PSRAM);//set pad6 mux to psram
duet_pinmux_config(PAD7,PF_PSRAM);//set pad7 mux to psram
duet_pinmux_config(PAD8,PF_PSRAM);//set pad8 mux to psram
duet_pinmux_config(PAD9,PF_PSRAM);//set pad9 mux to psram
REG_WR(HW_CTRL_PE_PS,REG_RD(HW_CTRL_PE_PS)& 0xfffffc0f);//set all pad pull up and down
}
else
{
duet_pinmux_config(PAD16,PF_PSRAM);//set pad16 mux to psram
duet_pinmux_config(PAD17,PF_PSRAM);//set pad17 mux to psram
duet_pinmux_config(PAD18,PF_PSRAM);//set pad18 mux to psram
duet_pinmux_config(PAD19,PF_PSRAM);//set pad19 mux to psram
duet_pinmux_config(PAD20,PF_PSRAM);//set pad20 mux to psram
duet_pinmux_config(PAD21,PF_PSRAM);//set pad21 mux to psram
REG_WR(HW_CTRL_PE_PS,REG_RD(HW_CTRL_PE_PS)& 0xffc0ffff);//set all pad pull up and down
REG_WR(ADC_SDIO_BLE_DEBUG_CTRL_REG, REG_RD(ADC_SDIO_BLE_DEBUG_CTRL_REG) & (~(1 << 3))); //disable sdio debug
if (channel == PSRAM_CHANNEL_4_9) {
duet_pinmux_config(PAD4, PF_PSRAM); //set pad4 mux to psram
duet_pinmux_config(PAD5, PF_PSRAM); //set pad5 mux to psram
duet_pinmux_config(PAD6, PF_PSRAM); //set pad6 mux to psram
duet_pinmux_config(PAD7, PF_PSRAM); //set pad7 mux to psram
duet_pinmux_config(PAD8, PF_PSRAM); //set pad8 mux to psram
duet_pinmux_config(PAD9, PF_PSRAM); //set pad9 mux to psram
REG_WR(HW_CTRL_PE_PS, REG_RD(HW_CTRL_PE_PS) & 0xfffffc0f); //set all pad pull up and down
} else {
duet_pinmux_config(PAD16, PF_PSRAM); //set pad16 mux to psram
duet_pinmux_config(PAD17, PF_PSRAM); //set pad17 mux to psram
duet_pinmux_config(PAD18, PF_PSRAM); //set pad18 mux to psram
duet_pinmux_config(PAD19, PF_PSRAM); //set pad19 mux to psram
duet_pinmux_config(PAD20, PF_PSRAM); //set pad20 mux to psram
duet_pinmux_config(PAD21, PF_PSRAM); //set pad21 mux to psram
REG_WR(HW_CTRL_PE_PS, REG_RD(HW_CTRL_PE_PS) & 0xffc0ffff); //set all pad pull up and down
}
REG_WR(PERI_CLK_EN_REG0, (REG_RD(PERI_CLK_EN_REG0) | (0x0000203F))); //open clock of dma and psram
return 0;
}
int psram_config(duet_psram_mode mode)
{
if(mode != PSRAM_MODE_SPI && mode != PSRAM_MODE_QSPI)
if (mode != PSRAM_MODE_SPI && mode != PSRAM_MODE_QSPI) {
return -1;
REG_WR(PSRAM_MCR, REG_RD(PSRAM_MCR)&(~(1<<14))); //MCR,MDIS = 0
}
REG_WR(PSRAM_MCR, REG_RD(PSRAM_MCR) & (~(1 << 14))); //MCR,MDIS = 0
REG_WR(PSRAM_MCR, REG_RD(PSRAM_MCR)|((3))); //MCR , AHB and SF domain reset
REG_WR(PSRAM_MCR, REG_RD(PSRAM_MCR) | ((3))); //MCR , AHB and SF domain reset
REG_WR(PSRAM_MCR, REG_RD(PSRAM_MCR)& 0xfffffffc); //clear AHB and SF reset
REG_WR(PSRAM_MCR, REG_RD(PSRAM_MCR) & 0xfffffffc); //clear AHB and SF reset
REG_WR(PSRAM_MCR, REG_RD(PSRAM_MCR)|1<<14); //MCR , MDIS=1
REG_WR(PSRAM_MCR, REG_RD(PSRAM_MCR) | 1 << 14); //MCR , MDIS=1
if(mode == PSRAM_MODE_SPI)//the simple logic has been modified. set bit7 means to use the original logic
REG_WR(PSRAM_SMPR, 0x00000080); // sampled by sfif_clk_b; half cycle delay
else
REG_WR(PSRAM_SMPR, 0x00000000); // sampled by sfif_clk_b; half cycle delay
if (mode == PSRAM_MODE_SPI) { //the simple logic has been modified. set bit7 means to use the original logic
REG_WR(PSRAM_SMPR, 0x00000080); // sampled by sfif_clk_b; half cycle delay
} else {
REG_WR(PSRAM_SMPR, 0x00000000); // sampled by sfif_clk_b; half cycle delay
}
REG_WR(PSRAM_FLSHCR, 0x00000000); //set setup and hold time for psram
@@ -205,40 +222,40 @@ int psram_config(duet_psram_mode mode)
//kzheng: TO DO, now hmaster[3:0] tie0, so need modified here
//mst id =0 is CPU
//PSRAM0_BUF0CR = 0x00001001; // CPU A9
REG_WR(PSRAM_BUF0CR , 0x00001000); // CPU A9
REG_WR(PSRAM_BUF1CR , 0x00001006); // CPU M4
REG_WR(PSRAM_BUF2CR , 0x00001003); // SDMA
REG_WR(PSRAM_BUF3CR , 0x80001002); // other masters
REG_WR(PSRAM_BUF0CR, 0x00001000); // CPU A9
REG_WR(PSRAM_BUF1CR, 0x00001006); // CPU M4
REG_WR(PSRAM_BUF2CR, 0x00001003); // SDMA
REG_WR(PSRAM_BUF3CR, 0x80001002); // other masters
// config the flash mmap
REG_WR(PSRAM_SFA1AD , PSRAM_FLASH_A1_TOP & 0xfffffc00);
REG_WR(PSRAM_SFA2AD , PSRAM_FLASH_A2_TOP & 0xfffffc00);
REG_WR(PSRAM_SFB1AD , PSRAM_FLASH_B1_TOP & 0xfffffc00);
REG_WR(PSRAM_SFB2AD , PSRAM_FLASH_B2_TOP & 0xfffffc00);
REG_WR(PSRAM_SFA1AD, PSRAM_FLASH_A1_TOP & 0xfffffc00);
REG_WR(PSRAM_SFA2AD, PSRAM_FLASH_A2_TOP & 0xfffffc00);
REG_WR(PSRAM_SFB1AD, PSRAM_FLASH_B1_TOP & 0xfffffc00);
REG_WR(PSRAM_SFB2AD, PSRAM_FLASH_B2_TOP & 0xfffffc00);
// ISD3FB, ISD2FB, ISD3FA, ISD2FA = 1; ENDIAN = 'h3; END_CFG='h3
// DELAY_CLK4X_EN = 1
REG_WR(PSRAM_MCR, REG_RD(PSRAM_MCR)| 0x000F000C);
REG_WR(PSRAM_MCR, REG_RD(PSRAM_MCR) | 0x000F000C);
//ddr_en data aligned with 2x serial flash half clock
//REG_WR(PSRAM_FLSHCR, REG_RD(PSRAM_FLSHCR)| 0x00010000);
//MCR SCLKCFG 0, dqs en =1
REG_WR(PSRAM_MCR, REG_RD(PSRAM_MCR)& 0xfbffffff );
REG_WR(PSRAM_MCR, REG_RD(PSRAM_MCR) & 0xfbffffff );
//dqs_loopback_en = 1, dqs_loopback_from_pad = 1
REG_WR(PSRAM_MCR, REG_RD(PSRAM_MCR)| 3<<24 );
REG_WR(PSRAM_MCR, REG_RD(PSRAM_MCR) | 3 << 24 );
//ddr_en = 1, enable 2x and 4x clock
///REG_WR(PSRAM_MCR, REG_RD(PSRAM_MCR)| 1<<7 );
//MDIS = 0, enable psram clocks,must clear MDIS to enable clock for transfer.
REG_WR(PSRAM_MCR, REG_RD(PSRAM_MCR)& 0xffffbfff );
REG_WR(PSRAM_MCR, REG_RD(PSRAM_MCR) & 0xffffbfff );
//printf("PSRAM initialize done. \n");
//printf("begin initialize LUT tables. \n");
if(mode == PSRAM_MODE_SPI) {
if (mode == PSRAM_MODE_SPI) {
psram_init_lut_ps_read(0);
psram_init_lut_ps_read(PSRAM_SEQ_ID_READ);
psram_init_lut_ps_write_evict(PSRAM_SEQ_ID_WRITE_EVICT);
@@ -246,8 +263,7 @@ int psram_config(duet_psram_mode mode)
psram_init_lut_ps_readid(PSRAM_SEQ_ID_READ_ID);
psram_init_lut_ps_mode_register_read(PSRAM_SEQ_ID_MODE_REG_READ);
psram_init_lut_ps_mode_register_write(PSRAM_SEQ_ID_MODE_REG_WRITE);
}
else {
} else {
psram_init_lut_ps_read_4x(0);
psram_init_lut_ps_read_4x(PSRAM_SEQ_ID_READ);
psram_init_lut_ps_write_evict_4x(PSRAM_SEQ_ID_WRITE_EVICT);
@@ -259,17 +275,16 @@ int psram_config(duet_psram_mode mode)
//printf(" initialize LUT tables done. \n");
// set read miss cmd, evict is in next lut
REG_WR(PSRAM_BFGENCR, PSRAM_SEQ_ID_READ<<12);
REG_WR(PSRAM_BFGENCR, PSRAM_SEQ_ID_READ << 12);
if(mode_config != mode) {
if(mode == PSRAM_MODE_SPI) {
REG_WR(PSRAM_SFAR,PSRAM_AMBA_BASE);
REG_WR(PSRAM_IPCR, PSRAM_SEQ_ID_QUAD_EXIT<<24);
if (mode_config != mode) {
if (mode == PSRAM_MODE_SPI) {
REG_WR(PSRAM_SFAR, PSRAM_AMBA_BASE);
REG_WR(PSRAM_IPCR, PSRAM_SEQ_ID_QUAD_EXIT << 24);
psram_wait_finish();
}
else {
REG_WR(PSRAM_SFAR,PSRAM_AMBA_BASE);
REG_WR(PSRAM_IPCR, PSRAM_SEQ_ID_QUAD_ENABLE<<24);
} else {
REG_WR(PSRAM_SFAR, PSRAM_AMBA_BASE);
REG_WR(PSRAM_IPCR, PSRAM_SEQ_ID_QUAD_ENABLE << 24);
psram_wait_finish();
}
}
asr582x/liteos_m/sdk/drivers/driver/src/duet_pwm.c
+32 -43
View File
@@ -14,54 +14,54 @@
*/
#include <stdio.h>
#include <errno.h>
#include "duet.h"
#include "duet_cm4.h"
#include "duet_pwm.h"
#include "duet_pinmux.h"
#include "duet_pwm.h"
void PWM_IRQHandler(void)
{
// duet_intrpt_enter();
// duet_intrpt_exit();
// duet_intrpt_enter();
// duet_intrpt_exit();
}
//pwm pinmux init
void duet_pwm_pinmux_init(duet_pwm_dev_t *pwm)
{
switch(pwm->port)
{
switch (pwm->port) {
case PWM_OUTPUT_CH0:
//pin mux control
//PWM0_PAD PAD14 1
duet_pinmux_config(PAD14,PF_PWM0);
duet_pinmux_config(PAD14, PF_PWM0);
break;
case PWM_OUTPUT_CH1:
//PWM1_PAD PAD10 1
duet_pinmux_config(PAD10,PF_PWM1);
duet_pinmux_config(PAD10, PF_PWM1);
break;
case PWM_OUTPUT_CH2:
//PWM2_PAD PAD15 1
duet_pinmux_config(PAD15,PF_PWM2);
duet_pinmux_config(PAD15, PF_PWM2);
break;
case PWM_OUTPUT_CH3:
//PWM3_PAD PAD11 1
duet_pinmux_config(PAD11,PF_PWM3);
duet_pinmux_config(PAD11, PF_PWM3);
break;
case PWM_OUTPUT_CH4:
//PWM4_PAD PAD6 4
duet_pinmux_config(PAD6,PF_PWM4);
duet_pinmux_config(PAD6, PF_PWM4);
break;
case PWM_OUTPUT_CH5:
//PWM5_PAD PAD0 4
duet_pinmux_config(PAD0,PF_PWM5);
duet_pinmux_config(PAD0, PF_PWM5);
break;
case PWM_OUTPUT_CH6:
//PWM6_PAD PAD7 4
duet_pinmux_config(PAD7,PF_PWM6);
duet_pinmux_config(PAD7, PF_PWM6);
break;
case PWM_OUTPUT_CH7:
//PWM7_PAD PAD1 4
duet_pinmux_config(PAD1,PF_PWM7);
duet_pinmux_config(PAD1, PF_PWM7);
break;
default:
break;
@@ -72,8 +72,7 @@ void duet_pwm_pinmux_init(duet_pwm_dev_t *pwm)
void duet_pwm_cfg(duet_pwm_dev_t *pwm)
{
uint32_t tmp_value;
switch(pwm->port)
{
switch (pwm->port) {
case PWM_OUTPUT_CH0:
PWM->PWMCTL |= PWM_COUNT_MODE; //0: count-up mode, 1: count-up/down mode
tmp_value = PWM->PWM01LOAD & (~(0x0000FFFF));
@@ -81,7 +80,7 @@ void duet_pwm_cfg(duet_pwm_dev_t *pwm)
PWM->PWM01LOAD = tmp_value;
tmp_value = PWM->PWM0CMP & (~(0x0000FFFF));
tmp_value |= (uint16_t)(SYSTEM_CLOCK / pwm->config.freq * (1-pwm->config.duty_cycle));
tmp_value |= (uint16_t)(SYSTEM_CLOCK / pwm->config.freq * (1 - pwm->config.duty_cycle));
PWM->PWM0CMP = tmp_value;
PWM->PWM01DB = 0;
break;
@@ -92,7 +91,7 @@ void duet_pwm_cfg(duet_pwm_dev_t *pwm)
PWM->PWM01LOAD = tmp_value;
tmp_value = PWM->PWM0CMP & (~(0xFFFF0000));
tmp_value |= (uint16_t)(SYSTEM_CLOCK / pwm->config.freq * (1-pwm->config.duty_cycle)) << 16;
tmp_value |= (uint16_t)(SYSTEM_CLOCK / pwm->config.freq * (1 - pwm->config.duty_cycle)) << 16;
PWM->PWM0CMP = tmp_value;
PWM->PWM01DB = 0;
break;
@@ -103,7 +102,7 @@ void duet_pwm_cfg(duet_pwm_dev_t *pwm)
PWM->PWM01LOAD = tmp_value;
tmp_value = PWM->PWM1CMP & (~(0x0000FFFF));
tmp_value |= (uint16_t)(SYSTEM_CLOCK / pwm->config.freq * (1-pwm->config.duty_cycle));
tmp_value |= (uint16_t)(SYSTEM_CLOCK / pwm->config.freq * (1 - pwm->config.duty_cycle));
PWM->PWM1CMP = tmp_value;
PWM->PWM01DB = 0;
break;
@@ -114,7 +113,7 @@ void duet_pwm_cfg(duet_pwm_dev_t *pwm)
PWM->PWM01LOAD = tmp_value;
tmp_value = PWM->PWM1CMP & (~(0xFFFF0000));
tmp_value |= (uint16_t)(SYSTEM_CLOCK / pwm->config.freq * (1-pwm->config.duty_cycle)) << 16;
tmp_value |= (uint16_t)(SYSTEM_CLOCK / pwm->config.freq * (1 - pwm->config.duty_cycle)) << 16;
PWM->PWM1CMP = tmp_value;
PWM->PWM01DB = 0;
break;
@@ -125,7 +124,7 @@ void duet_pwm_cfg(duet_pwm_dev_t *pwm)
PWM->PWM23LOAD = tmp_value;
tmp_value = PWM->PWM2CMP & (~(0x0000FFFF));
tmp_value |= (uint16_t)(SYSTEM_CLOCK / pwm->config.freq * (1-pwm->config.duty_cycle));
tmp_value |= (uint16_t)(SYSTEM_CLOCK / pwm->config.freq * (1 - pwm->config.duty_cycle));
PWM->PWM2CMP = tmp_value;
PWM->PWM23DB = 0;
break;
@@ -136,7 +135,7 @@ void duet_pwm_cfg(duet_pwm_dev_t *pwm)
PWM->PWM23LOAD = tmp_value;
tmp_value = PWM->PWM2CMP & (~(0xFFFF0000));
tmp_value |= (uint16_t)(SYSTEM_CLOCK / pwm->config.freq * (1-pwm->config.duty_cycle)) << 16;
tmp_value |= (uint16_t)(SYSTEM_CLOCK / pwm->config.freq * (1 - pwm->config.duty_cycle)) << 16;
PWM->PWM2CMP = tmp_value;
PWM->PWM23DB = 0;
break;
@@ -147,7 +146,7 @@ void duet_pwm_cfg(duet_pwm_dev_t *pwm)
PWM->PWM23LOAD = tmp_value;
tmp_value = PWM->PWM3CMP & (~(0x0000FFFF));
tmp_value |= (uint16_t)(SYSTEM_CLOCK / pwm->config.freq * (1-pwm->config.duty_cycle));
tmp_value |= (uint16_t)(SYSTEM_CLOCK / pwm->config.freq * (1 - pwm->config.duty_cycle));
PWM->PWM3CMP = tmp_value;
PWM->PWM23DB = 0;
break;
@@ -158,7 +157,7 @@ void duet_pwm_cfg(duet_pwm_dev_t *pwm)
PWM->PWM23LOAD = tmp_value;
tmp_value = PWM->PWM3CMP & (~(0xFFFF0000));
tmp_value |= (uint16_t)(SYSTEM_CLOCK / pwm->config.freq * (1-pwm->config.duty_cycle)) << 16;
tmp_value |= (uint16_t)(SYSTEM_CLOCK / pwm->config.freq * (1 - pwm->config.duty_cycle)) << 16;
PWM->PWM3CMP = tmp_value;
PWM->PWM23DB = 0;
break;
@@ -178,12 +177,10 @@ void duet_pwm_cfg(duet_pwm_dev_t *pwm)
int32_t duet_pwm_init(duet_pwm_dev_t *pwm)
{
uint32_t reg_value;
if(NULL == pwm)
{
if (NULL == pwm) {
return EIO;
}
if(pwm->port >= DUET_PWM_CH_NUM)
{
if (pwm->port >= DUET_PWM_CH_NUM) {
return EIO;
}
//pinmux
@@ -209,12 +206,10 @@ int32_t duet_pwm_init(duet_pwm_dev_t *pwm)
*/
int32_t duet_pwm_start(duet_pwm_dev_t *pwm)
{
if(NULL == pwm)
{
if (NULL == pwm) {
return EIO;
}
if(pwm->port >= DUET_PWM_CH_NUM)
{
if (pwm->port >= DUET_PWM_CH_NUM) {
return EIO;
}
PWM->PWMCFG |= (1 << pwm->port);
@@ -230,12 +225,10 @@ int32_t duet_pwm_start(duet_pwm_dev_t *pwm)
*/
int32_t duet_pwm_stop(duet_pwm_dev_t *pwm)
{
if(NULL == pwm)
{
if (NULL == pwm) {
return EIO;
}
if(pwm->port >= DUET_PWM_CH_NUM)
{
if (pwm->port >= DUET_PWM_CH_NUM) {
return EIO;
}
PWM->PWMCFG &= ~(1 << pwm->port);
@@ -252,12 +245,10 @@ int32_t duet_pwm_stop(duet_pwm_dev_t *pwm)
*/
int32_t duet_pwm_para_chg(duet_pwm_dev_t *pwm, duet_pwm_config_t para)
{
if(NULL == pwm)
{
if (NULL == pwm) {
return EIO;
}
if(pwm->port >= DUET_PWM_CH_NUM)
{
if (pwm->port >= DUET_PWM_CH_NUM) {
return EIO;
}
//duet_pwm_stop(pwm);
@@ -278,12 +269,10 @@ int32_t duet_pwm_finalize(duet_pwm_dev_t *pwm)
{
//pwm clock disable
//uint32_t reg_value;
if(NULL == pwm)
{
if (NULL == pwm) {
return EIO;
}
if(pwm->port >= DUET_PWM_CH_NUM)
{
if (pwm->port >= DUET_PWM_CH_NUM) {
return EIO;
}
//one clk enable for 8 pwm channel
asr582x/liteos_m/sdk/drivers/driver/src/duet_ram_layout.c
+26 -22
View File
@@ -18,18 +18,22 @@
#define WIFI_ADC_SHARED (32 * 1024)
uint32_t duet_ram_layout_init(Tcm_Config_Type tcm_config, Wifi_Ram_Config_Type wifi_config, Bt_Ram_Config_Type bt_config)
uint32_t duet_ram_layout_init(Tcm_Config_Type tcm_config, Wifi_Ram_Config_Type wifi_config,
Bt_Ram_Config_Type bt_config)
{
uint32_t tmp_value, reg_tcm = 0, reg_wifi = 0, reg_ble = 0;
if(tcm_config < 0 || tcm_config >= ITCM_DTCM_NUM)
if (tcm_config < 0 || tcm_config >= ITCM_DTCM_NUM) {
return -1;
if(wifi_config < 0 || wifi_config >= WIFI_RAM_NUM)
}
if (wifi_config < 0 || wifi_config >= WIFI_RAM_NUM) {
return -1;
if(bt_config < 0 || bt_config >= BT_RAM_NUM)
}
if (bt_config < 0 || bt_config >= BT_RAM_NUM) {
return -1;
}
switch(tcm_config) {
switch (tcm_config) {
case ITCM_DTCM_32_192:
reg_tcm = 0;
break;
@@ -40,7 +44,7 @@ uint32_t duet_ram_layout_init(Tcm_Config_Type tcm_config, Wifi_Ram_Config_Type w
return -1;
}
switch(wifi_config) {
switch (wifi_config) {
case WIFI_RAM_0:
reg_wifi = 0;
break;
@@ -57,7 +61,7 @@ uint32_t duet_ram_layout_init(Tcm_Config_Type tcm_config, Wifi_Ram_Config_Type w
return -1;
}
switch(bt_config) {
switch (bt_config) {
case BT_RAM_0:
reg_ble = 0;
break;
@@ -74,8 +78,8 @@ uint32_t duet_ram_layout_init(Tcm_Config_Type tcm_config, Wifi_Ram_Config_Type w
tmp_value = REG_RD(0X40000000);
REG_WR(0X40000000, (tmp_value & ~0x00000001) | reg_tcm);
tmp_value = REG_RD(0X4000002C)& (~0x0000001f);
tmp_value |= (reg_ble<<3);
tmp_value = REG_RD(0X4000002C) & (~0x0000001f);
tmp_value |= (reg_ble << 3);
tmp_value |= (reg_wifi);
REG_WR(0X4000002C, (tmp_value));
@@ -86,19 +90,17 @@ uint32_t duet_get_ram_layout(Ram_Layout_Type *ram_layout)
{
uint32_t reg_tcm = 0, reg_wifi = 0, reg_bt = 0;
if(ram_layout == 0)
if (ram_layout == 0) {
return -1;
}
reg_tcm = REG_RD(0X40000000) & 0x00000001;
if(reg_tcm == 0)
{
if (reg_tcm == 0) {
ram_layout->itcm_addr = 0x00080000;
ram_layout->itcm_size = (32 * 1024);
ram_layout->dtcm_addr = 0x20FD0000;
ram_layout->dtcm_size = (192 * 1024);
}
else
{
} else {
ram_layout->itcm_addr = 0x00080000;
ram_layout->itcm_size = (96 * 1024);
ram_layout->dtcm_addr = 0x20FE0000;
@@ -110,22 +112,24 @@ uint32_t duet_get_ram_layout(Ram_Layout_Type *ram_layout)
ram_layout->bt_addr = 0x62008000;
reg_wifi = REG_RD(0X4000002C) & 0x0000007;
if(reg_wifi == 1)
if (reg_wifi == 1) {
ram_layout->wifi_size = (32 * 1024);
else if(reg_wifi == 2)
} else if (reg_wifi == 2) {
ram_layout->wifi_size = (64 * 1024);
else if(reg_wifi == 4)
} else if (reg_wifi == 4) {
ram_layout->wifi_size = (96 * 1024);
else
} else {
ram_layout->wifi_size = (0 * 1024);
}
reg_bt = (REG_RD(0X4000002C) & 0x00000018) >> 3;
if(reg_bt == 1)
if (reg_bt == 1) {
ram_layout->bt_size = (16 * 1024);
else if(reg_bt == 3)
} else if (reg_bt == 3) {
ram_layout->bt_size = (32 * 1024);
else
} else {
ram_layout->bt_size = (0 * 1024);
}
ram_layout->soc_size = (128 * 1024) - ram_layout->wifi_size - ram_layout->bt_size;
ram_layout->wifi_size += WIFI_ADC_SHARED;
asr582x/liteos_m/sdk/drivers/driver/src/duet_rf_spi.c
+59 -93
View File
@@ -27,21 +27,17 @@ void spi_sw_protect_write(uint16_t addr, uint16_t data)
*((volatile int *) (SPI_COMMAND + WDATA_REG_OFT)) = data;
*((volatile int *) (SPI_COMMAND + START_FLAG_OFT)) = 1;
while(1)
{
while (1) {
//printf("\n rdate:%08x\n",((uint32_t)*((volatile uint32_t *)(SPI_RDATA + RDATA_REG_OFT)) &0x00010000));
if(((uint32_t)*((volatile uint32_t *)(SPI_RDATA + RDATA_REG_OFT)) &0x00010000)==0)
{
if (((uint32_t) * ((volatile uint32_t *)(SPI_RDATA + RDATA_REG_OFT)) & 0x00010000) == 0) {
break;
}
else
} else {
*((volatile int *) (SPI_COMMAND + START_FLAG_OFT)) = 1;
}
}
while(1)
{
if(*((volatile int *)(SPI_COMMAND+ START_FLAG_OFT))==0)
{
while (1) {
if (*((volatile int *)(SPI_COMMAND + START_FLAG_OFT)) == 0) {
break;
}
}
@@ -56,22 +52,18 @@ uint16_t spi_sw_protect_read(uint16_t addr)
*((volatile int *)(SPI_COMMAND + READNOTWRITE_OFT)) = 1;
*((volatile int *)(SPI_COMMAND + START_FLAG_OFT)) = 1;
while(1)
{
while (1) {
//printf("\n rdate:%08x\n",((uint32_t)*((volatile uint32_t *)(SPI_RDATA + RDATA_REG_OFT)) &0x00010000));
if(((uint32_t)*((volatile uint32_t *)(SPI_RDATA + RDATA_REG_OFT)) &0x00010000)==0)
{
if (((uint32_t) * ((volatile uint32_t *)(SPI_RDATA + RDATA_REG_OFT)) & 0x00010000) == 0) {
break;
}
else
} else {
*((volatile int *) (SPI_COMMAND + START_FLAG_OFT)) = 1;
}
}
while(1)
{
if(*((volatile int *)(SPI_COMMAND+ START_FLAG_OFT))==0)
{
return( (uint16_t)*((volatile uint32_t *)(SPI_RDATA + RDATA_REG_OFT)));
while (1) {
if (*((volatile int *)(SPI_COMMAND + START_FLAG_OFT)) == 0) {
return ( (uint16_t) * ((volatile uint32_t *)(SPI_RDATA + RDATA_REG_OFT)));
}
}
@@ -79,24 +71,21 @@ uint16_t spi_sw_protect_read(uint16_t addr)
void rf_sw_set_reg_bit(uint16_t reg, uint8_t start_bit, uint8_t len, uint16_t src_val)
{
uint16_t tmp,mask,val;
uint16_t tmp, mask, val;
if((reg < 0xFF) && (start_bit < 16) && (len <= 16)&&(src_val<(1<<len)))
{
if ((reg < 0xFF) && (start_bit < 16) && (len <= 16) && (src_val < (1 << len))) {
tmp = spi_sw_protect_read(reg);
mask = (1<<len)-1; //1. clear dst bit. eg: len=4, mask = 0xf, 1111
mask = ~(mask<<start_bit); //~(mask<<4):0xff0f: 1111 1111 0000 1111
mask = (1 << len) - 1; //1. clear dst bit. eg: len=4, mask = 0xf, 1111
mask = ~(mask << start_bit); //~(mask<<4):0xff0f: 1111 1111 0000 1111
val = tmp & mask; //2.val =spi_read() & 0xff0f, clear [7:4]
src_val = (src_val << start_bit);
val = val | src_val; //3. val spi_read & 0xff0f | val << 4
spi_sw_protect_write(reg,val);
}
else
{
spi_sw_protect_write(reg, val);
} else {
printf("set_reg input parms not support \r\n");
return;
}
@@ -104,22 +93,19 @@ void rf_sw_set_reg_bit(uint16_t reg, uint8_t start_bit, uint8_t len, uint16_t sr
uint16_t rf_sw_get_reg_bit(uint16_t reg, uint8_t start_bit, uint8_t len)
{
uint16_t mask,val;
uint16_t mask, val;
if((reg < 0xFF) && (start_bit < 16) && (len <= 16))
{
if ((reg < 0xFF) && (start_bit < 16) && (len <= 16)) {
val = spi_sw_protect_read(reg); // 1. read reg val
mask = (1<<len)-1; //eg: len =4, 0xf,1111
mask = (1 << len) - 1; //eg: len =4, 0xf,1111
mask = mask << start_bit; // 0x0f00;
val = val & mask; // 2. get dst bit
val = (val >> start_bit); // 3. ror
return val;
}
else
{
} else {
return -1;
}
}
@@ -129,7 +115,7 @@ uint8_t hw_spi_pta = 0;
FLASH_COMMON2_SEG void spi_mst_write(uint16_t addr, uint16_t data)
{
uint32_t var=0;
uint32_t var = 0;
*((volatile int *) (SPI_COMMAND + TRANS_MODE_OFT)) = 0;
*((volatile int *) (SPI_COMMAND + PRESCALER_OFT)) = 8;//8:80M/16=5M, 2:80M/4=20M
@@ -138,29 +124,22 @@ FLASH_COMMON2_SEG void spi_mst_write(uint16_t addr, uint16_t data)
*((volatile int *) (SPI_COMMAND + WDATA_REG_OFT)) = data;
*((volatile int *) (SPI_COMMAND + START_FLAG_OFT)) = 1;
if(hw_spi_pta == 0)
{
do{
var =(*((volatile int *)(SPI_COMMAND+ START_FLAG_OFT)));
}while(var);
}
else if(hw_spi_pta == 1)
{
while(1)
{
if (hw_spi_pta == 0) {
do {
var = (*((volatile int *)(SPI_COMMAND + START_FLAG_OFT)));
} while (var);
} else if (hw_spi_pta == 1) {
while (1) {
//printf("\n rdate:%08x\n",((uint32_t)*((volatile uint32_t *)(SPI_RDATA + RDATA_REG_OFT)) &0x00010000));
if(((uint32_t)*((volatile uint32_t *)(SPI_RDATA + RDATA_REG_OFT)) &0x00010000)==0)
{
if (((uint32_t) * ((volatile uint32_t *)(SPI_RDATA + RDATA_REG_OFT)) & 0x00010000) == 0) {
break;
}
else
} else {
*((volatile int *) (SPI_COMMAND + START_FLAG_OFT)) = 1;
}
}
while(1)
{
if(*((volatile int *)(SPI_COMMAND+ START_FLAG_OFT))==0)
{
while (1) {
if (*((volatile int *)(SPI_COMMAND + START_FLAG_OFT)) == 0) {
break;
}
}
@@ -170,7 +149,7 @@ FLASH_COMMON2_SEG void spi_mst_write(uint16_t addr, uint16_t data)
FLASH_COMMON2_SEG uint16_t spi_mst_read(uint16_t addr)
{
uint32_t var=0;
uint32_t var = 0;
*((volatile int *)(SPI_COMMAND + TRANS_MODE_OFT)) = 0;
*((volatile int *)(SPI_COMMAND + PRESCALER_OFT)) = 8;
@@ -178,32 +157,25 @@ FLASH_COMMON2_SEG uint16_t spi_mst_read(uint16_t addr)
*((volatile int *)(SPI_COMMAND + READNOTWRITE_OFT)) = 1;
*((volatile int *)(SPI_COMMAND + START_FLAG_OFT)) = 1;
if(hw_spi_pta == 0)
{
do{
var =(*((volatile int *)(SPI_COMMAND+ START_FLAG_OFT)));
}while(var);
if (hw_spi_pta == 0) {
do {
var = (*((volatile int *)(SPI_COMMAND + START_FLAG_OFT)));
} while (var);
return ((uint16_t)*((volatile uint32_t *)(SPI_RDATA + RDATA_REG_OFT)));
}
else if(hw_spi_pta == 1)
{
while(1)
{
if(((uint32_t)*((volatile uint32_t *)(SPI_RDATA + RDATA_REG_OFT)) &0x00010000)==0)
{
return ((uint16_t) * ((volatile uint32_t *)(SPI_RDATA + RDATA_REG_OFT)));
} else if (hw_spi_pta == 1) {
while (1) {
if (((uint32_t) * ((volatile uint32_t *)(SPI_RDATA + RDATA_REG_OFT)) & 0x00010000) == 0) {
break;
}
else
} else {
*((volatile int *) (SPI_COMMAND + START_FLAG_OFT)) = 1;
}
}
while(1)
{
if(*((volatile int *)(SPI_COMMAND+ START_FLAG_OFT))==0)
{
while (1) {
if (*((volatile int *)(SPI_COMMAND + START_FLAG_OFT)) == 0) {
delay(40);
return ((uint16_t)*((volatile uint32_t *)(SPI_RDATA + RDATA_REG_OFT)));
return ((uint16_t) * ((volatile uint32_t *)(SPI_RDATA + RDATA_REG_OFT)));
}
}
}
@@ -213,24 +185,21 @@ FLASH_COMMON2_SEG uint16_t spi_mst_read(uint16_t addr)
FLASH_COMMON2_SEG void rf_set_reg_bit(uint16_t reg, uint8_t start_bit, uint8_t len, uint16_t src_val)
{
uint16_t tmp,mask,val;
uint16_t tmp, mask, val;
if((reg < 0xFF) && (start_bit < 16) && (len <= 16)&&(src_val<(1<<len)))
{
if ((reg < 0xFF) && (start_bit < 16) && (len <= 16) && (src_val < (1 << len))) {
tmp = spi_mst_read(reg);
mask = (1<<len)-1; //1. clear dst bit. eg: len=4, mask = 0xf, 1111
mask = ~(mask<<start_bit); //~(mask<<4):0xff0f: 1111 1111 0000 1111
mask = (1 << len) - 1; //1. clear dst bit. eg: len=4, mask = 0xf, 1111
mask = ~(mask << start_bit); //~(mask<<4):0xff0f: 1111 1111 0000 1111
val = tmp & mask; //2.val =spi_read() & 0xff0f, clear [7:4]
src_val = (src_val << start_bit);
val = val | src_val; //3. val spi_read & 0xff0f | val << 4
spi_mst_write(reg,val);
}
else
{
spi_mst_write(reg, val);
} else {
printf("set_reg input parms not support \r\n");
return;
}
@@ -238,22 +207,19 @@ FLASH_COMMON2_SEG void rf_set_reg_bit(uint16_t reg, uint8_t start_bit, uint8_t l
uint16_t rf_get_reg_bit(uint16_t reg, uint8_t start_bit, uint8_t len)
{
uint16_t mask,val;
uint16_t mask, val;
if((reg < 0xFF) && (start_bit < 16) && (len <= 16))
{
if ((reg < 0xFF) && (start_bit < 16) && (len <= 16)) {
val = spi_mst_read(reg); // 1. read reg val
mask = (1<<len)-1; //eg: len =4, 0xf,1111
mask = (1 << len) - 1; //eg: len =4, 0xf,1111
mask = mask << start_bit; // 0x0f00;
val = val & mask; // 2. get dst bit
val = (val >> start_bit); // 3. ror
return val;
}
else
{
} else {
return -1;
}
}
asr582x/liteos_m/sdk/drivers/driver/src/duet_rnd.c
+2 -2
View File
@@ -20,9 +20,9 @@
#include "duet_uart.h"
#include "sns_silib.h"
#include "crys_rnd.h"
#include "duet_rnd.h"
#include "crys_error.h"
#include "duet_hw_common.h"
#include "duet_rnd.h"
/*****************************************************************************/
/********************** Public Functions *************************/
@@ -68,7 +68,7 @@ int duet_RND_AddAdditionalInput(CRYS_RND_Context_t *rndContext_ptr, uint8_t *add
}
int duet_RND_EnterKatMode(CRYS_RND_Context_t *rndContext_ptr, uint8_t *entrData_ptr, uint32_t entrSize, uint8_t
*nonce_ptr,uint32_t nonceSize, CRYS_RND_WorkBuff_t *workBuff_ptr)
*nonce_ptr, uint32_t nonceSize, CRYS_RND_WorkBuff_t *workBuff_ptr)
{
return CRYS_RND_EnterKatMode(rndContext_ptr, entrData_ptr, entrSize, nonce_ptr, nonceSize, workBuff_ptr);
}
asr582x/liteos_m/sdk/drivers/driver/src/duet_spi.c
+113 -179
View File
@@ -17,80 +17,64 @@
duet_spi_callback_func g_duet_spi_callback_handler[DUET_SPI_NUM] = {0};
void duet_spi_struct_init(duet_spi_dev_t * init_struct)
void duet_spi_struct_init(duet_spi_dev_t *init_struct)
{
init_struct->config.freq = 1000000; // 1M
init_struct->config.mode = SPI_ROLE_MASTER;
init_struct->priv = NULL;
}
void duet_spi_interrupt_config(SPI_TypeDef * SPIx, uint8_t spi_interrupt, uint8_t new_state)
void duet_spi_interrupt_config(SPI_TypeDef *SPIx, uint8_t spi_interrupt, uint8_t new_state)
{
if(new_state == ENABLE)
if (new_state == ENABLE) {
SPIx->IMSC |= spi_interrupt;
else
} else {
SPIx->IMSC &= ~spi_interrupt;
}
}
int32_t duet_spi_dma_config(duet_spi_dev_t * spi,uint8_t dma_tx_rx_sel,uint8_t new_state)
int32_t duet_spi_dma_config(duet_spi_dev_t *spi, uint8_t dma_tx_rx_sel, uint8_t new_state)
{
SPI_TypeDef* SPIx = NULL;
if(DUET_SPI0_INDEX == spi->port)
{
SPI_TypeDef *SPIx = NULL;
if (DUET_SPI0_INDEX == spi->port) {
SPIx = SPI0;
}
else if(DUET_SPI1_INDEX == spi->port)
{
} else if (DUET_SPI1_INDEX == spi->port) {
SPIx = SPI1;
}
else if(DUET_SPI2_INDEX == spi->port)
{
} else if (DUET_SPI2_INDEX == spi->port) {
SPIx = SPI2;
}
else
{
} else {
return EIO;
}
if(new_state == ENABLE)
{
if (new_state == ENABLE) {
SPIx->DMA_CR |= dma_tx_rx_sel;
}
else
{
} else {
SPIx->DMA_CR &= ~dma_tx_rx_sel;
}
return 0;
}
void duet_spi_cmd(SPI_TypeDef * SPIx, uint8_t new_state)
void duet_spi_cmd(SPI_TypeDef *SPIx, uint8_t new_state)
{
if(new_state == ENABLE)
SPIx->CR1 |= (0x1<<1);
else
SPIx->CR1 &= ~(0x1<<1);
if (new_state == ENABLE) {
SPIx->CR1 |= (0x1 << 1);
} else {
SPIx->CR1 &= ~(0x1 << 1);
}
}
int32_t duet_spi_cpol_cpha_config(duet_spi_dev_t * spi,uint8_t mode)
int32_t duet_spi_cpol_cpha_config(duet_spi_dev_t *spi, uint8_t mode)
{
uint8_t cpol, cpha;
SPI_TypeDef* SPIx = NULL;
if(DUET_SPI0_INDEX == spi->port)
{
SPI_TypeDef *SPIx = NULL;
if (DUET_SPI0_INDEX == spi->port) {
SPIx = SPI0;
}
else if(DUET_SPI1_INDEX == spi->port)
{
} else if (DUET_SPI1_INDEX == spi->port) {
SPIx = SPI1;
}
else if(DUET_SPI2_INDEX == spi->port)
{
} else if (DUET_SPI2_INDEX == spi->port) {
SPIx = SPI2;
}
else
{
} else {
return EIO;
}
switch (mode)
{
switch (mode) {
case 0:
cpol = 0;
cpha = 0;
@@ -117,42 +101,30 @@ int32_t duet_spi_cpol_cpha_config(duet_spi_dev_t * spi,uint8_t mode)
return 0;
}
int32_t duet_spi_init(duet_spi_dev_t * spi)
int32_t duet_spi_init(duet_spi_dev_t *spi)
{
uint32_t tmp_value,spi_clk = SPI_CLK;
uint32_t tmp_value, spi_clk = SPI_CLK;
uint8_t cpol, cpha;
SPI_TypeDef* SPIx = NULL;
if(DUET_SPI0_INDEX == spi->port)
{
SPI_TypeDef *SPIx = NULL;
if (DUET_SPI0_INDEX == spi->port) {
SPIx = SPI0;
}
else if(DUET_SPI1_INDEX == spi->port)
{
} else if (DUET_SPI1_INDEX == spi->port) {
SPIx = SPI1;
}
else if(DUET_SPI2_INDEX == spi->port)
{
} else if (DUET_SPI2_INDEX == spi->port) {
SPIx = SPI2;
}
else
{
} else {
return EIO;
}
//enable spi clk
if(SPIx==SPI0)
{
tmp_value = REG_RD(PERI_CLK_EN_REG1) & (~(SPI0_BUS_CLK_EN|SPI0_PERI_CLK_EN));
REG_WR(PERI_CLK_EN_REG1, (tmp_value | (SPI0_BUS_CLK_EN|SPI0_PERI_CLK_EN)));
}
else if(SPIx==SPI1)
{
tmp_value = REG_RD(PERI_CLK_EN_REG1) & (~(SPI1_BUS_CLK_EN|SPI1_PERI_CLK_EN));
REG_WR(PERI_CLK_EN_REG1, (tmp_value | (SPI1_BUS_CLK_EN|SPI1_PERI_CLK_EN)));
}
else
{
tmp_value = REG_RD(PERI_CLK_EN_REG1) & (~(SPI2_BUS_CLK_EN|SPI2_PERI_CLK_EN));
REG_WR(PERI_CLK_EN_REG1, (tmp_value | (SPI2_BUS_CLK_EN|SPI2_PERI_CLK_EN)));
if (SPIx == SPI0) {
tmp_value = REG_RD(PERI_CLK_EN_REG1) & (~(SPI0_BUS_CLK_EN | SPI0_PERI_CLK_EN));
REG_WR(PERI_CLK_EN_REG1, (tmp_value | (SPI0_BUS_CLK_EN | SPI0_PERI_CLK_EN)));
} else if (SPIx == SPI1) {
tmp_value = REG_RD(PERI_CLK_EN_REG1) & (~(SPI1_BUS_CLK_EN | SPI1_PERI_CLK_EN));
REG_WR(PERI_CLK_EN_REG1, (tmp_value | (SPI1_BUS_CLK_EN | SPI1_PERI_CLK_EN)));
} else {
tmp_value = REG_RD(PERI_CLK_EN_REG1) & (~(SPI2_BUS_CLK_EN | SPI2_PERI_CLK_EN));
REG_WR(PERI_CLK_EN_REG1, (tmp_value | (SPI2_BUS_CLK_EN | SPI2_PERI_CLK_EN)));
}
//fpga no effect, soc need
duet_spi_cmd(SPIx, DISABLE);
@@ -166,9 +138,8 @@ int32_t duet_spi_init(duet_spi_dev_t * spi)
SPIx->CPSR &= ~0xff; // reset CPSR to 0
SPIx->CPSR |= 0x2; // set CPSR to 2, shoule be even number between 2-254
SPIx->CR0 &= (0x00ff); // reset SCR to 0
SPIx->CR0 |= (spi_clk/2/spi->config.freq - 1) << 8; // set SCR to 0x7, serial clk = 16M/2/(1+7) = 1M
switch (SPI_CPOL_CPHA_MODE)
{
SPIx->CR0 |= (spi_clk / 2 / spi->config.freq - 1) << 8; // set SCR to 0x7, serial clk = 16M/2/(1+7) = 1M
switch (SPI_CPOL_CPHA_MODE) {
case 0:
cpol = 0;
cpha = 0;
@@ -198,60 +169,51 @@ int32_t duet_spi_init(duet_spi_dev_t * spi)
SPIx->CR0 &= ~(0xf); // reset data size to 0
SPIx->CR0 |= SPI_DATA_SIZE_8BIT;
if(spi->config.mode == SPI_ROLE_MASTER)
{
if (spi->config.mode == SPI_ROLE_MASTER) {
SPIx->CR1 &= ~(0x1 << 2); // reset master/slave select to 0, which is master mode
}
else
{
} else {
SPIx->CR1 &= ~(0x1 << 2); // reset master/slave select to 0, which is master mode
SPIx->CR1 |= SPI_ROLE_SLAVE; // set to slave role
}
/* dma handshake config,
should be enabled after dmac has been configured and ready */
// if(SPI_DMA_TX_CONFIG == ENABLE)
// {
// SPIx->DMA_CR |= SPI_DMA_TX_EN;
// }
// else
// {
// SPIx->DMA_CR &= ~SPI_DMA_TX_EN;
// }
// if(SPI_DMA_RX_CONFIG == ENABLE)
// {
// SPIx->DMA_CR |= SPI_DMA_RX_EN;
// }
// else
// {
// SPIx->DMA_CR &= ~SPI_DMA_RX_EN;
// }
if(spi->priv)
{
// if(SPI_DMA_TX_CONFIG == ENABLE)
// {
// SPIx->DMA_CR |= SPI_DMA_TX_EN;
// }
// else
// {
// SPIx->DMA_CR &= ~SPI_DMA_TX_EN;
// }
// if(SPI_DMA_RX_CONFIG == ENABLE)
// {
// SPIx->DMA_CR |= SPI_DMA_RX_EN;
// }
// else
// {
// SPIx->DMA_CR &= ~SPI_DMA_RX_EN;
// }
if (spi->priv) {
//enable rx interrupt
SPIx->IMSC |= (SPI_INTERRUPT_RX_TIMEOUT|SPI_INTERRUPT_RX_FIFO_TRIGGER);
SPIx->IMSC |= (SPI_INTERRUPT_RX_TIMEOUT | SPI_INTERRUPT_RX_FIFO_TRIGGER);
//enable cm4 interrupt
if(SPIx==SPI0)
{
if (SPIx == SPI0) {
tmp_value = REG_RD(DUTE_IRQ_EN_REG) & (~SPI0_IRQ_BIT);
REG_WR(DUTE_IRQ_EN_REG, (tmp_value | (SPI0_IRQ_BIT)));
NVIC_EnableIRQ(SPI0_IRQn);
}
else if(SPIx==SPI1)
{
} else if (SPIx == SPI1) {
tmp_value = REG_RD(DUTE_IRQ_EN_REG) & (~SPI1_IRQ_BIT);
REG_WR(DUTE_IRQ_EN_REG, (tmp_value | (SPI1_IRQ_BIT)));
NVIC_EnableIRQ(SPI1_IRQn);
}
else
{
} else {
tmp_value = REG_RD(DUTE_IRQ_EN_REG) & (~SPI2_IRQ_BIT);
REG_WR(DUTE_IRQ_EN_REG, (tmp_value | (SPI2_IRQ_BIT)));
NVIC_EnableIRQ(SPI2_IRQn);
}
g_duet_spi_callback_handler[spi->port] = (duet_spi_callback_func)(spi->priv);
}
SPIx->CR1 |= (0x1<<1);
SPIx->CR1 |= (0x1 << 1);
return 0;
}
@@ -265,28 +227,20 @@ int32_t duet_spi_init(duet_spi_dev_t * spi)
*/
int32_t duet_spi_finalize(duet_spi_dev_t *spi)
{
SPI_TypeDef* SPIx;
SPI_TypeDef *SPIx;
unsigned int tmp_value;
if(NULL == spi)
{
if (NULL == spi) {
return EIO;
}
if(DUET_SPI0_INDEX == spi->port)
{
if (DUET_SPI0_INDEX == spi->port) {
SPIx = SPI0;
}
else if(DUET_SPI1_INDEX == spi->port)
{
} else if (DUET_SPI1_INDEX == spi->port) {
SPIx = SPI1;
}
else if(DUET_SPI2_INDEX == spi->port)
{
} else if (DUET_SPI2_INDEX == spi->port) {
SPIx = SPI2;
}
else
{
} else {
return EIO;
}
@@ -297,40 +251,30 @@ int32_t duet_spi_finalize(duet_spi_dev_t *spi)
SPIx->CR1 = 0;
//disable cm4 interrupt
if(SPI0 == SPIx)
{
if (SPI0 == SPIx) {
tmp_value = REG_RD(DUTE_IRQ_DIS_REG) & (~SPI0_IRQ_BIT);
REG_WR(DUTE_IRQ_DIS_REG, (tmp_value | (SPI0_IRQ_BIT)));
NVIC_DisableIRQ(SPI0_IRQn);
}
else if(SPI1 == SPIx)
{
} else if (SPI1 == SPIx) {
tmp_value = REG_RD(DUTE_IRQ_DIS_REG) & (~SPI1_IRQ_BIT);
REG_WR(DUTE_IRQ_DIS_REG, (tmp_value | (SPI1_IRQ_BIT)));
NVIC_DisableIRQ(SPI1_IRQn);
}
else
{
} else {
tmp_value = REG_RD(DUTE_IRQ_DIS_REG) & (~SPI2_IRQ_BIT);
REG_WR(DUTE_IRQ_DIS_REG, (tmp_value | (SPI2_IRQ_BIT)));
NVIC_DisableIRQ(SPI2_IRQn);
}
//spi sclk disable, fpga no effect, soc need
if(SPI0 == SPIx)
{
tmp_value = REG_RD(PERI_CLK_DIS_REG1) & (~(SPI0_BUS_CLK_EN|SPI0_PERI_CLK_EN));
REG_WR(PERI_CLK_DIS_REG1, (tmp_value | (SPI0_BUS_CLK_EN|SPI0_PERI_CLK_EN)));
}
else if(SPI1 == SPIx)
{
tmp_value = REG_RD(PERI_CLK_DIS_REG1) & (~(SPI0_BUS_CLK_EN|SPI0_PERI_CLK_EN));
REG_WR(PERI_CLK_DIS_REG1, (tmp_value | (SPI0_BUS_CLK_EN|SPI0_PERI_CLK_EN)));
}
else
{
tmp_value = REG_RD(PERI_CLK_DIS_REG1) & (~(SPI0_BUS_CLK_EN|SPI0_PERI_CLK_EN));
REG_WR(PERI_CLK_DIS_REG1, (tmp_value | (SPI0_BUS_CLK_EN|SPI0_PERI_CLK_EN)));
if (SPI0 == SPIx) {
tmp_value = REG_RD(PERI_CLK_DIS_REG1) & (~(SPI0_BUS_CLK_EN | SPI0_PERI_CLK_EN));
REG_WR(PERI_CLK_DIS_REG1, (tmp_value | (SPI0_BUS_CLK_EN | SPI0_PERI_CLK_EN)));
} else if (SPI1 == SPIx) {
tmp_value = REG_RD(PERI_CLK_DIS_REG1) & (~(SPI0_BUS_CLK_EN | SPI0_PERI_CLK_EN));
REG_WR(PERI_CLK_DIS_REG1, (tmp_value | (SPI0_BUS_CLK_EN | SPI0_PERI_CLK_EN)));
} else {
tmp_value = REG_RD(PERI_CLK_DIS_REG1) & (~(SPI0_BUS_CLK_EN | SPI0_PERI_CLK_EN));
REG_WR(PERI_CLK_DIS_REG1, (tmp_value | (SPI0_BUS_CLK_EN | SPI0_PERI_CLK_EN)));
}
g_duet_spi_callback_handler[spi->port] = NULL;
@@ -339,26 +283,18 @@ int32_t duet_spi_finalize(duet_spi_dev_t *spi)
int32_t duet_spi_send(duet_spi_dev_t *spi, const uint8_t *data, uint16_t size, uint32_t timeout)
{
SPI_TypeDef* SPIx = NULL;
if(DUET_SPI0_INDEX == spi->port)
{
SPI_TypeDef *SPIx = NULL;
if (DUET_SPI0_INDEX == spi->port) {
SPIx = SPI0;
}
else if(DUET_SPI1_INDEX == spi->port)
{
} else if (DUET_SPI1_INDEX == spi->port) {
SPIx = SPI1;
}
else if(DUET_SPI2_INDEX == spi->port)
{
} else if (DUET_SPI2_INDEX == spi->port) {
SPIx = SPI2;
}
else
{
} else {
return EIO;
}
while(size--)
{
while( !(duet_spi_get_flag_status(SPIx, SPI_FLAG_TX_FIFO_NOT_FULL)) ); //wait till tx fifo is not full
while (size--) {
while ( !(duet_spi_get_flag_status(SPIx, SPI_FLAG_TX_FIFO_NOT_FULL)) ); //wait till tx fifo is not full
SPIx->DR = *data++;
}
return 0;
@@ -374,9 +310,9 @@ int32_t duet_spi_send(duet_spi_dev_t *spi, const uint8_t *data, uint16_t size, u
// }
//}
SPI_TypeDef* getSpixViaIdx(uint8_t spi_idx)
SPI_TypeDef *getSpixViaIdx(uint8_t spi_idx)
{
switch(spi_idx){
switch (spi_idx) {
case DUET_SPI0_INDEX:
return SPI0;
case DUET_SPI1_INDEX:
@@ -392,54 +328,52 @@ SPI_TypeDef* getSpixViaIdx(uint8_t spi_idx)
void SPIX_IRQHandler(uint8_t spi_idx)
{
uint16_t tmp;
SPI_TypeDef* SPIx = getSpixViaIdx(spi_idx);
if( duet_spi_get_interrupt_status(SPIx,SPI_INTERRUPT_TX_FIFO_TRIGGER))
{
duet_spi_interrupt_config(SPIx,SPI_INTERRUPT_TX_FIFO_TRIGGER,DISABLE); // disable
duet_spi_interrupt_clear(SPIx,SPI_INTERRUPT_TX_FIFO_TRIGGER); // clear
duet_spi_interrupt_config(SPIx,SPI_INTERRUPT_TX_FIFO_TRIGGER,ENABLE); // enable
SPI_TypeDef *SPIx = getSpixViaIdx(spi_idx);
if ( duet_spi_get_interrupt_status(SPIx, SPI_INTERRUPT_TX_FIFO_TRIGGER)) {
duet_spi_interrupt_config(SPIx, SPI_INTERRUPT_TX_FIFO_TRIGGER, DISABLE); // disable
duet_spi_interrupt_clear(SPIx, SPI_INTERRUPT_TX_FIFO_TRIGGER); // clear
duet_spi_interrupt_config(SPIx, SPI_INTERRUPT_TX_FIFO_TRIGGER, ENABLE); // enable
}
if( duet_spi_get_interrupt_status(SPIx,SPI_INTERRUPT_RX_FIFO_TRIGGER) || duet_spi_get_interrupt_status(SPIx,SPI_INTERRUPT_RX_TIMEOUT) )
{
duet_spi_interrupt_config(SPIx,SPI_INTERRUPT_RX_FIFO_TRIGGER|SPI_INTERRUPT_RX_TIMEOUT,DISABLE); // disable
duet_spi_interrupt_clear(SPIx,SPI_INTERRUPT_RX_FIFO_TRIGGER|SPI_INTERRUPT_RX_TIMEOUT); // clear
while( SPIx->SR & SPI_FLAG_RX_FIFO_NOT_EMPTY)
{
if ( duet_spi_get_interrupt_status(SPIx, SPI_INTERRUPT_RX_FIFO_TRIGGER)
|| duet_spi_get_interrupt_status(SPIx, SPI_INTERRUPT_RX_TIMEOUT) ) {
duet_spi_interrupt_config(SPIx, SPI_INTERRUPT_RX_FIFO_TRIGGER | SPI_INTERRUPT_RX_TIMEOUT, DISABLE); // disable
duet_spi_interrupt_clear(SPIx, SPI_INTERRUPT_RX_FIFO_TRIGGER | SPI_INTERRUPT_RX_TIMEOUT); // clear
while ( SPIx->SR & SPI_FLAG_RX_FIFO_NOT_EMPTY) {
tmp = (uint16_t)(SPIx->DR);
if(g_duet_spi_callback_handler[spi_idx] != NULL)
{
if (g_duet_spi_callback_handler[spi_idx] != NULL) {
g_duet_spi_callback_handler[spi_idx](tmp);
}
}
duet_spi_interrupt_config(SPIx,SPI_INTERRUPT_RX_FIFO_TRIGGER|SPI_INTERRUPT_RX_TIMEOUT,ENABLE); // enable
duet_spi_interrupt_config(SPIx, SPI_INTERRUPT_RX_FIFO_TRIGGER | SPI_INTERRUPT_RX_TIMEOUT, ENABLE); // enable
}
}
void SPI0_IRQHandler()
void SPI0_IRQHandler(void)
{
duet_intrpt_enter();
SPIX_IRQHandler(0);
duet_intrpt_exit();
}
void SPI1_IRQHandler()
void SPI1_IRQHandler(void)
{
duet_intrpt_enter();
SPIX_IRQHandler(1);
duet_intrpt_exit();
}
void SPI2_IRQHandler()
void SPI2_IRQHandler(void)
{
duet_intrpt_enter();
SPIX_IRQHandler(2);
duet_intrpt_exit();
}
void duet_spi_set_callback(uint8_t spi_idx,duet_spi_callback_func func)
void duet_spi_set_callback(uint8_t spi_idx, duet_spi_callback_func func)
{
if(spi_idx >= DUET_SPI_NUM)
if (spi_idx >= DUET_SPI_NUM) {
return;
}
g_duet_spi_callback_handler[spi_idx] = func;
}
asr582x/liteos_m/sdk/drivers/driver/src/duet_timer.c
+32 -68
View File
@@ -14,6 +14,7 @@
*/
#include <stdio.h>
#include <errno.h>
#include "duet_cm4.h"
#include "duet.h"
#include "duet_timer.h"
@@ -22,24 +23,20 @@ duet_timer_cb_t g_duet_timer_handler[DUET_TIMER_NUM];
void TIMER_IRQHandler(void)
{
// duet_intrpt_enter();
if(TIMER1->MIS)
{
// duet_intrpt_enter();
if (TIMER1->MIS) {
TIMER1->INTCLR = 1; //clear irq
if(g_duet_timer_handler[DUET_TIMER1_INDEX].cb)
{
if (g_duet_timer_handler[DUET_TIMER1_INDEX].cb) {
g_duet_timer_handler[DUET_TIMER1_INDEX].cb(g_duet_timer_handler[DUET_TIMER1_INDEX].arg);
}
}
if(TIMER2->MIS)
{
if (TIMER2->MIS) {
TIMER2->INTCLR = 1; //clear irq
if(g_duet_timer_handler[DUET_TIMER2_INDEX].cb)
{
if (g_duet_timer_handler[DUET_TIMER2_INDEX].cb) {
g_duet_timer_handler[DUET_TIMER2_INDEX].cb(g_duet_timer_handler[DUET_TIMER2_INDEX].arg);
}
}
// duet_intrpt_exit();
// duet_intrpt_exit();
}
/**
@@ -58,39 +55,29 @@ int32_t duet_timer_init(duet_timer_dev_t *tim)
uint32_t reg_value;
uint32_t system_clock = SYSTEM_CLOCK;
if(NULL == tim)
{
if (NULL == tim) {
return EIO;
}
if(tim->port >= DUET_TIMER_NUM)
{
if (tim->port >= DUET_TIMER_NUM) {
return EIO;
}
// Set Timer Clock Enable
reg_value = REG_RD(PERI_CLK_EN_REG1) & (~TIMER_BUS_CLK_BIT);
REG_WR(PERI_CLK_EN_REG1, (reg_value | (TIMER_BUS_CLK_BIT)));
if(TIMER_RELOAD_AUTO == tim->config.reload_mode)
{
if (TIMER_RELOAD_AUTO == tim->config.reload_mode) {
timer_mode = PERIODIC_MODE;
}
else if(TIMER_RELOAD_MANU == tim->config.reload_mode)
{
} else if (TIMER_RELOAD_MANU == tim->config.reload_mode) {
timer_mode = ONE_SHOT_MODE;
}
else
{
} else {
return EIO;
}
g_duet_timer_handler[tim->port].cb = tim->config.cb;
g_duet_timer_handler[tim->port].arg = tim->config.arg;
if(DUET_TIMER1_INDEX == tim->port)
{
if (DUET_TIMER1_INDEX == tim->port) {
TIMER1->CONTROL = TIMER_DISABLE; //disable timer first
TIMER1->LOAD = tim->config.period * (system_clock / 1000000); //1000000 for us
TIMER1->CONTROL |= (TIMER_PRESCALE | TIMER_SIZE | timer_mode); //timer control
}
else //if(DUET_TIMER2_INDEX == tim->port)
{
} else { //if(DUET_TIMER2_INDEX == tim->port)
TIMER2->CONTROL = TIMER_DISABLE; //disable timer first
TIMER2->LOAD = tim->config.period * (system_clock / 1000000); //1000000 for us
TIMER2->CONTROL |= (TIMER_PRESCALE | TIMER_SIZE | timer_mode); //timer control
@@ -106,20 +93,14 @@ int32_t duet_timer_init(duet_timer_dev_t *tim)
int32_t duet_timer_start(duet_timer_dev_t *tim)
{
uint32_t reg_value;
if(NULL == tim)
{
if (NULL == tim) {
return EIO;
}
if(DUET_TIMER1_INDEX == tim->port)
{
if (DUET_TIMER1_INDEX == tim->port) {
TIMER1->CONTROL |= (TIMER_ENABLE | INTERRUPT_EN); //timer control
}
else if(DUET_TIMER2_INDEX == tim->port)
{
} else if (DUET_TIMER2_INDEX == tim->port) {
TIMER2->CONTROL |= (TIMER_ENABLE | INTERRUPT_EN); //timer control
}
else
{
} else {
return EIO;
}
//open TIMER interrupt
@@ -140,22 +121,16 @@ int32_t duet_timer_get(duet_timer_dev_t *tim)
uint32_t reg_value = 0;
uint32_t system_clock = SYSTEM_CLOCK;
if(NULL == tim)
{
if (NULL == tim) {
return -1;
}
if(DUET_TIMER1_INDEX == tim->port)
{
if (DUET_TIMER1_INDEX == tim->port) {
reg_value = TIMER1->VALUE; //timer current value
return (reg_value/(system_clock / 1000000)); //time for us
}
else if(DUET_TIMER2_INDEX == tim->port)
{
return (reg_value / (system_clock / 1000000)); //time for us
} else if (DUET_TIMER2_INDEX == tim->port) {
reg_value = TIMER2->VALUE; //timer current value
return (reg_value/(system_clock / 1000000)); //time for us
}
else
{
return (reg_value / (system_clock / 1000000)); //time for us
} else {
return -1;
}
return 0;
@@ -170,20 +145,15 @@ int32_t duet_timer_reload(duet_timer_dev_t *tim)
{
uint32_t system_clock = SYSTEM_CLOCK;
if(NULL == tim)
{
if (NULL == tim) {
return -1;
}
if(tim->port >= DUET_TIMER_NUM)
{
if (tim->port >= DUET_TIMER_NUM) {
return -1;
}
if(DUET_TIMER1_INDEX == tim->port)
{
if (DUET_TIMER1_INDEX == tim->port) {
TIMER1->LOAD = tim->config.period * (system_clock / 1000000); //1000000 for us
}
else //if(DUET_TIMER2_INDEX == tim->port)
{
} else { //if(DUET_TIMER2_INDEX == tim->port)
TIMER2->LOAD = tim->config.period * (system_clock / 1000000); //1000000 for us
}
return 0;
@@ -198,21 +168,15 @@ int32_t duet_timer_reload(duet_timer_dev_t *tim)
*/
void duet_timer_stop(duet_timer_dev_t *tim)
{
if(NULL == tim)
{
if (NULL == tim) {
return;
}
if(DUET_TIMER1_INDEX == tim->port)
{
if (DUET_TIMER1_INDEX == tim->port) {
TIMER1->CONTROL = TIMER_DISABLE; //timer control
}
else if(DUET_TIMER2_INDEX == tim->port)
{
} else if (DUET_TIMER2_INDEX == tim->port) {
TIMER2->CONTROL = TIMER_DISABLE; //timer control
}
else
{
} else {
return;
}
asr582x/liteos_m/sdk/drivers/driver/src/duet_uart.c
+162 -225
View File
@@ -27,11 +27,11 @@ void uart0_dma_callback(uint32_t i)
uart_dma_complete_flag = 1;
}
#endif
duet_uart_callback_func g_duet_uart_callback_handler[UART_NUM]={0};
duet_uart_callback_func g_duet_uart_callback_handler[UART_NUM] = {0};
UART_TypeDef* getUartxViaIdx(uint8_t uart_idx)
UART_TypeDef *getUartxViaIdx(uint8_t uart_idx)
{
switch(uart_idx){
switch (uart_idx) {
case UART0_INDEX:
return UART0;
case UART1_INDEX:
@@ -43,7 +43,7 @@ UART_TypeDef* getUartxViaIdx(uint8_t uart_idx)
}
}
void duet_uart_struct_init(duet_uart_dev_t* UART_InitStruct)
void duet_uart_struct_init(duet_uart_dev_t *UART_InitStruct)
{
UART_InitStruct->config.baud_rate = UART_BAUDRATE_115200;
UART_InitStruct->config.data_width = DATA_8BIT;
@@ -56,110 +56,101 @@ void duet_uart_struct_init(duet_uart_dev_t* UART_InitStruct)
uint32_t duet_uart_calc_baud(uint32_t baud)
{
uint32_t int_div;
uint32_t fac_div;
uint32_t remainder;
uint32_t temp;
uint32_t uart_clk = UART_CLK;
uint32_t int_div;
uint32_t fac_div;
uint32_t remainder;
uint32_t temp;
uint32_t uart_clk = UART_CLK;
temp = 16 * baud;
if ((0 == baud) || uart_clk < temp){
return 0;
}
int_div = (uint32_t)(uart_clk / temp);
remainder = uart_clk % temp;
temp = 8 * remainder / baud;
fac_div = (temp >> 1) + (temp & 1);
temp = 16 * baud;
if ((0 == baud) || uart_clk < temp) {
return 0;
}
int_div = (uint32_t)(uart_clk / temp);
remainder = uart_clk % temp;
temp = 8 * remainder / baud;
fac_div = (temp >> 1) + (temp & 1);
temp = ((int_div << 16) | (fac_div & 0xFFFF));
return temp;
temp = ((int_div << 16) | (fac_div & 0xFFFF));
return temp;
}
/* get uart flag status */
ITstatus duet_uart_get_flag_status(UART_TypeDef* UARTx, uint8_t uart_flag)
ITstatus duet_uart_get_flag_status(UART_TypeDef *UARTx, uint8_t uart_flag)
{
if(UARTx->FR & uart_flag)
if (UARTx->FR & uart_flag) {
return SET;
else
} else {
return RESET;
}
}
void UART_SendData(UART_TypeDef* UARTx, unsigned char Data)
void UART_SendData(UART_TypeDef *UARTx, unsigned char Data)
{
if(UARTx == NULL)
if (UARTx == NULL) {
return;
}
/* wait till tx fifo is not full */
while( duet_uart_get_flag_status(UARTx, UART_FLAG_TX_FIFO_FULL) == SET );
while ( duet_uart_get_flag_status(UARTx, UART_FLAG_TX_FIFO_FULL) == SET );
UARTx->DR = Data;
}
uint8_t UART_ReceiveData(UART_TypeDef* UARTx)
uint8_t UART_ReceiveData(UART_TypeDef *UARTx)
{
/* wait till rx fifo is not empty */
while( duet_uart_get_flag_status(UARTx, UART_FLAG_RX_FIFO_EMPTY) == SET);
while ( duet_uart_get_flag_status(UARTx, UART_FLAG_RX_FIFO_EMPTY) == SET);
return UARTx->DR;
}
void duet_uart_interrupt_config(UART_TypeDef* UARTx, uint32_t uart_int, bool new_state)
void duet_uart_interrupt_config(UART_TypeDef *UARTx, uint32_t uart_int, bool new_state)
{
if (new_state == DISABLE)
{
if (new_state == DISABLE) {
UARTx->IMSC &= ~(uart_int);
}
else
{
} else {
UARTx->IMSC |= (uart_int);
}
}
ITstatus duet_uart_get_interrupt_status(UART_TypeDef* UARTx, uint32_t uart_interrupt)
{
if( UARTx->MIS & uart_interrupt )
return SET;
else
return RESET;
}
ITstatus duet_uart_get_raw_interrupt_status(UART_TypeDef* UARTx, uint32_t uart_interrupt)
{
if( UARTx->RIS & uart_interrupt )
return SET;
else
return RESET;
}
uint8_t duet_uart_clear_interrupt(UART_TypeDef* UARTx, uint32_t uart_interrupt)
{
UARTx->ICR |= uart_interrupt;
return 0;
}
int32_t duet_uart_dma_config(duet_uart_dev_t* uart,uint8_t dma_tx_rx_sel,uint8_t new_state)
ITstatus duet_uart_get_interrupt_status(UART_TypeDef *UARTx, uint32_t uart_interrupt)
{
UART_TypeDef* UARTx = NULL;
if(DUET_UART0_INDEX == uart->port)
{
if ( UARTx->MIS & uart_interrupt ) {
return SET;
} else {
return RESET;
}
}
ITstatus duet_uart_get_raw_interrupt_status(UART_TypeDef *UARTx, uint32_t uart_interrupt)
{
if ( UARTx->RIS & uart_interrupt ) {
return SET;
} else {
return RESET;
}
}
uint8_t duet_uart_clear_interrupt(UART_TypeDef *UARTx, uint32_t uart_interrupt)
{
UARTx->ICR |= uart_interrupt;
return 0;
}
int32_t duet_uart_dma_config(duet_uart_dev_t *uart, uint8_t dma_tx_rx_sel, uint8_t new_state)
{
UART_TypeDef *UARTx = NULL;
if (DUET_UART0_INDEX == uart->port) {
UARTx = UART0;
}
else if(DUET_UART1_INDEX == uart->port)
{
} else if (DUET_UART1_INDEX == uart->port) {
UARTx = UART1;
}
else if(DUET_UART2_INDEX == uart->port)
{
} else if (DUET_UART2_INDEX == uart->port) {
UARTx = UART2;
}
else
{
} else {
return EIO;
}
if(new_state == ENABLE)
{
if (new_state == ENABLE) {
UARTx->DMACR |= dma_tx_rx_sel;
}
else
{
} else {
UARTx->DMACR &= ~dma_tx_rx_sel;
}
return 0;
@@ -173,54 +164,42 @@ int32_t duet_uart_dma_config(duet_uart_dev_t* uart,uint8_t dma_tx_rx_sel,uint8_t
*
* @return 0 : on success, EIO : if an error occurred with any step
*/
int32_t duet_uart_init(duet_uart_dev_t* uart)
int32_t duet_uart_init(duet_uart_dev_t *uart)
{
//uart sclk enable and sclk root clk setting (XTAL)
uint32_t tmp_value;
UART_TypeDef* UARTx = NULL;
if(DUET_UART0_INDEX == uart->port)
{
UART_TypeDef *UARTx = NULL;
if (DUET_UART0_INDEX == uart->port) {
UARTx = UART0;
}
else if(DUET_UART1_INDEX == uart->port)
{
} else if (DUET_UART1_INDEX == uart->port) {
UARTx = UART1;
}
else if(DUET_UART2_INDEX == uart->port)
{
} else if (DUET_UART2_INDEX == uart->port) {
UARTx = UART2;
}
else
{
} else {
return EIO;
}
//enable uart clk
if(UARTx==UART0)
{
tmp_value = REG_RD(PERI_CLK_EN_REG1) & (~(UART0_BUS_CLK_EN|UART0_PERI_CLK_EN));
REG_WR(PERI_CLK_EN_REG1, (tmp_value | (UART0_BUS_CLK_EN|UART0_PERI_CLK_EN)));
}
else if(UARTx==UART1)
{
tmp_value = REG_RD(PERI_CLK_EN_REG1) & (~(UART1_BUS_CLK_EN|UART1_PERI_CLK_EN));
REG_WR(PERI_CLK_EN_REG1, (tmp_value | (UART1_BUS_CLK_EN|UART1_PERI_CLK_EN)));
}
else
{
tmp_value = REG_RD(PERI_CLK_EN_REG1) & (~(UART2_BUS_CLK_EN|UART2_PERI_CLK_EN));
REG_WR(PERI_CLK_EN_REG1, (tmp_value | (UART2_BUS_CLK_EN|UART2_PERI_CLK_EN)));
if (UARTx == UART0) {
tmp_value = REG_RD(PERI_CLK_EN_REG1) & (~(UART0_BUS_CLK_EN | UART0_PERI_CLK_EN));
REG_WR(PERI_CLK_EN_REG1, (tmp_value | (UART0_BUS_CLK_EN | UART0_PERI_CLK_EN)));
} else if (UARTx == UART1) {
tmp_value = REG_RD(PERI_CLK_EN_REG1) & (~(UART1_BUS_CLK_EN | UART1_PERI_CLK_EN));
REG_WR(PERI_CLK_EN_REG1, (tmp_value | (UART1_BUS_CLK_EN | UART1_PERI_CLK_EN)));
} else {
tmp_value = REG_RD(PERI_CLK_EN_REG1) & (~(UART2_BUS_CLK_EN | UART2_PERI_CLK_EN));
REG_WR(PERI_CLK_EN_REG1, (tmp_value | (UART2_BUS_CLK_EN | UART2_PERI_CLK_EN)));
}
//fpga no effect, soc need
// wait for the end of current charater
while(duet_uart_get_flag_status(UARTx, UART_FLAG_BUSY));
while (duet_uart_get_flag_status(UARTx, UART_FLAG_BUSY));
//disable UART
UARTx->CR &= ~1;
// flush fifo by setting FEN = 0
UARTx->LCR_H &= ~(1<<4);
UARTx->LCR_H &= ~(1 << 4);
// set baudrate
uint32_t br_div = duet_uart_calc_baud(uart->config.baud_rate);
@@ -230,27 +209,25 @@ int32_t duet_uart_init(duet_uart_dev_t* uart)
// set LCR_H
UARTx->LCR_H |= (uart->config.data_width << 5) | (uart->config.stop_bits << 3);
switch (uart->config.parity)
{
switch (uart->config.parity) {
case PARITY_ODD:
UARTx->LCR_H &= ~(3<<1);
UARTx->LCR_H |= (1<<1);
UARTx->LCR_H &= ~(3 << 1);
UARTx->LCR_H |= (1 << 1);
break;
case PARITY_EVEN:
UARTx->LCR_H |= (3<<1);
UARTx->LCR_H |= (3 << 1);
break;
case PARITY_NO:
UARTx->LCR_H &= ~(1<<1);
UARTx->LCR_H &= ~(1 << 1);
break;
default:
break;
}
if(uart->config.mode == 0)
{
if (uart->config.mode == 0) {
uart->config.mode = TX_RX_MODE;
}
// set CR
UARTx->CR &= ~(3<<8); // set tx/rx mode to 0
UARTx->CR &= ~(3 << 8); // set tx/rx mode to 0
UARTx->CR |= (uart->config.flow_control << 14) | (uart->config.mode << 8);
// enable fifo
UARTx->LCR_H |= (ENABLE << 4);
@@ -259,31 +236,25 @@ int32_t duet_uart_init(duet_uart_dev_t* uart)
UARTx->IFLS &= ~(0x7 << 3);
UARTx->IFLS |= (FIFO_HALF_FULL << 3); //rx fifo threshold
if(uart->priv)
{
if (uart->priv) {
//enable rx interrupt
UARTx->IMSC |= (UART_RX_TIMEOUT_INTERRUPT|UART_RX_INTERRUPT);
UARTx->IMSC |= (UART_RX_TIMEOUT_INTERRUPT | UART_RX_INTERRUPT);
//enable cm4 interrupt
if(UARTx==UART0)
{
if (UARTx == UART0) {
tmp_value = REG_RD(DUTE_IRQ_EN_REG) & (~UART0_IRQ_BIT);
REG_WR(DUTE_IRQ_EN_REG, (tmp_value | (UART0_IRQ_BIT)));
NVIC_EnableIRQ(UART0_IRQn);
#if DUET_UART0_USE_DMA
#if DUET_UART0_USE_DMA
duet_dma_init();
duet_uart_dma_config(uart,UART_DMA_TX_EN,ENABLE);
duet_dma_callback_register(DMA_CH_UART0_TX,uart0_dma_callback);
duet_uart_dma_config(uart, UART_DMA_TX_EN, ENABLE);
duet_dma_callback_register(DMA_CH_UART0_TX, uart0_dma_callback);
uart_dma_complete_flag = 1;
#endif
}
else if(UARTx==UART1)
{
#endif
} else if (UARTx == UART1) {
tmp_value = REG_RD(DUTE_IRQ_EN_REG) & (~UART1_IRQ_BIT);
REG_WR(DUTE_IRQ_EN_REG, (tmp_value | (UART1_IRQ_BIT)));
NVIC_EnableIRQ(UART1_IRQn);
}
else
{
} else {
tmp_value = REG_RD(DUTE_IRQ_EN_REG) & (~UART2_IRQ_BIT);
REG_WR(DUTE_IRQ_EN_REG, (tmp_value | (UART2_IRQ_BIT)));
NVIC_EnableIRQ(UART2_IRQn);
@@ -294,33 +265,31 @@ int32_t duet_uart_init(duet_uart_dev_t* uart)
return 0;
}
void duet_uart_start(UART_TypeDef* UARTx)
void duet_uart_start(UART_TypeDef *UARTx)
{
UARTx->CR |= 0x1;
if(UART0==UARTx){
if (UART0 == UARTx) {
NVIC_EnableIRQ(UART0_IRQn);
}
else if(UART1==UARTx){
} else if (UART1 == UARTx) {
NVIC_EnableIRQ(UART1_IRQn);
}
if(UART2==UARTx){
if (UART2 == UARTx) {
NVIC_EnableIRQ(UART2_IRQn);
}
}
void duet_uart_stop(UART_TypeDef* UARTx)
void duet_uart_stop(UART_TypeDef *UARTx)
{
UARTx->CR &= ~0x1;
if(UART0==UARTx){
if (UART0 == UARTx) {
NVIC_DisableIRQ(UART0_IRQn);
}
else if(UART1==UARTx){
} else if (UART1 == UARTx) {
NVIC_DisableIRQ(UART1_IRQn);
}
if(UART2==UARTx){
if (UART2 == UARTx) {
NVIC_DisableIRQ(UART2_IRQn);
}
}
@@ -337,53 +306,42 @@ void duet_uart_stop(UART_TypeDef* UARTx)
extern bool lega_log_is_enable(void);
int32_t duet_uart_send(duet_uart_dev_t *uart, const void *data, uint32_t size, uint32_t timeout)
{
UART_TypeDef* UARTx;
UART_TypeDef *UARTx;
int i = 0;
if((NULL == uart) || (NULL == data))
{
if ((NULL == uart) || (NULL == data)) {
return EIO;
}
if(DUET_UART0_INDEX == uart->port)
{
if (DUET_UART0_INDEX == uart->port) {
UARTx = UART0;
#if DUET_UART0_USE_DMA
while(size > DMA_MAX_SIZE)
{
while(!uart_dma_complete_flag);
#if DUET_UART0_USE_DMA
while (size > DMA_MAX_SIZE) {
while (!uart_dma_complete_flag);
uart_dma_complete_flag = 0;
duet_dma_uart_tx(uart->port,data,DMA_MAX_SIZE);
duet_dma_uart_tx(uart->port, data, DMA_MAX_SIZE);
size -= DMA_MAX_SIZE;
data += DMA_MAX_SIZE;
}
while(!uart_dma_complete_flag);
while (!uart_dma_complete_flag);
uart_dma_complete_flag = 0;
memcpy(uart_dma_tx_mem,data,size);
duet_dma_uart_tx(uart->port,uart_dma_tx_mem,size);
memcpy(uart_dma_tx_mem, data, size);
duet_dma_uart_tx(uart->port, uart_dma_tx_mem, size);
return 0;
#endif
}
else if(DUET_UART1_INDEX == uart->port)
{
if(!lega_log_is_enable())
{
#endif
} else if (DUET_UART1_INDEX == uart->port) {
if (!lega_log_is_enable()) {
return 0;
}
UARTx = UART1;
}
else if(DUET_UART2_INDEX == uart->port)
{
} else if (DUET_UART2_INDEX == uart->port) {
UARTx = UART2;
}
else
{
} else {
return EIO;
}
for(i = 0; i < size; i++)
{
UART_SendData(UARTx,((uint8_t*)data)[i]);
for (i = 0; i < size; i++) {
UART_SendData(UARTx, ((uint8_t *)data)[i]);
}
return 0;
@@ -398,28 +356,20 @@ int32_t duet_uart_send(duet_uart_dev_t *uart, const void *data, uint32_t size, u
*/
int32_t duet_uart_finalize(duet_uart_dev_t *uart)
{
UART_TypeDef* UARTx;
UART_TypeDef *UARTx;
unsigned int tmp_value;
if(NULL == uart)
{
if (NULL == uart) {
return EIO;
}
if(DUET_UART0_INDEX == uart->port)
{
if (DUET_UART0_INDEX == uart->port) {
UARTx = UART0;
}
else if(DUET_UART1_INDEX == uart->port)
{
} else if (DUET_UART1_INDEX == uart->port) {
UARTx = UART1;
}
else if(DUET_UART2_INDEX == uart->port)
{
} else if (DUET_UART2_INDEX == uart->port) {
UARTx = UART2;
}
else
{
} else {
return EIO;
}
@@ -430,43 +380,33 @@ int32_t duet_uart_finalize(duet_uart_dev_t *uart)
UARTx->CR = 0;
//disable cm4 interrupt
if(UART0 == UARTx)
{
if (UART0 == UARTx) {
tmp_value = REG_RD(DUTE_IRQ_DIS_REG) & (~UART0_IRQ_BIT);
REG_WR(DUTE_IRQ_DIS_REG, (tmp_value | (UART0_IRQ_BIT)));
NVIC_DisableIRQ(UART0_IRQn);
}
else if(UART1 == UARTx)
{
} else if (UART1 == UARTx) {
tmp_value = REG_RD(DUTE_IRQ_DIS_REG) & (~UART1_IRQ_BIT);
REG_WR(DUTE_IRQ_DIS_REG, (tmp_value | (UART1_IRQ_BIT)));
NVIC_DisableIRQ(UART1_IRQn);
}
else
{
} else {
tmp_value = REG_RD(DUTE_IRQ_DIS_REG) & (~UART2_IRQ_BIT);
REG_WR(DUTE_IRQ_DIS_REG, (tmp_value | (UART2_IRQ_BIT)));
NVIC_DisableIRQ(UART2_IRQn);
}
//uart sclk disable, fpga no effect, soc need
if(UART0 == UARTx)
{
tmp_value = REG_RD(PERI_CLK_DIS_REG1) & (~(UART0_BUS_CLK_EN|UART0_PERI_CLK_EN));
REG_WR(PERI_CLK_DIS_REG1, (tmp_value | (UART0_BUS_CLK_EN|UART0_PERI_CLK_EN)));
#if DUET_UART0_USE_DMA
if (UART0 == UARTx) {
tmp_value = REG_RD(PERI_CLK_DIS_REG1) & (~(UART0_BUS_CLK_EN | UART0_PERI_CLK_EN));
REG_WR(PERI_CLK_DIS_REG1, (tmp_value | (UART0_BUS_CLK_EN | UART0_PERI_CLK_EN)));
#if DUET_UART0_USE_DMA
uart_dma_complete_flag = 1;
#endif
}
else if(UART1 == UARTx)
{
tmp_value = REG_RD(PERI_CLK_DIS_REG1) & (~(UART0_BUS_CLK_EN|UART0_PERI_CLK_EN));
REG_WR(PERI_CLK_DIS_REG1, (tmp_value | (UART0_BUS_CLK_EN|UART0_PERI_CLK_EN)));
}
else
{
tmp_value = REG_RD(PERI_CLK_DIS_REG1) & (~(UART0_BUS_CLK_EN|UART0_PERI_CLK_EN));
REG_WR(PERI_CLK_DIS_REG1, (tmp_value | (UART0_BUS_CLK_EN|UART0_PERI_CLK_EN)));
#endif
} else if (UART1 == UARTx) {
tmp_value = REG_RD(PERI_CLK_DIS_REG1) & (~(UART0_BUS_CLK_EN | UART0_PERI_CLK_EN));
REG_WR(PERI_CLK_DIS_REG1, (tmp_value | (UART0_BUS_CLK_EN | UART0_PERI_CLK_EN)));
} else {
tmp_value = REG_RD(PERI_CLK_DIS_REG1) & (~(UART0_BUS_CLK_EN | UART0_PERI_CLK_EN));
REG_WR(PERI_CLK_DIS_REG1, (tmp_value | (UART0_BUS_CLK_EN | UART0_PERI_CLK_EN)));
}
g_duet_uart_callback_handler[uart->port] = NULL;
@@ -476,23 +416,21 @@ int32_t duet_uart_finalize(duet_uart_dev_t *uart)
static void UARTX_IRQHandler(uint8_t uart_idx)
{
char tmp;
UART_TypeDef* UARTx = getUartxViaIdx(uart_idx);
if( duet_uart_get_interrupt_status(UARTx, UART_RX_INTERRUPT) || duet_uart_get_interrupt_status(UARTx, UART_RX_TIMEOUT_INTERRUPT))
{
duet_uart_interrupt_config(UARTx, UART_RX_INTERRUPT|UART_RX_TIMEOUT_INTERRUPT, DISABLE);
duet_uart_clear_interrupt(UARTx, UART_RX_INTERRUPT|UART_RX_TIMEOUT_INTERRUPT);
UART_TypeDef *UARTx = getUartxViaIdx(uart_idx);
if ( duet_uart_get_interrupt_status(UARTx, UART_RX_INTERRUPT)
|| duet_uart_get_interrupt_status(UARTx, UART_RX_TIMEOUT_INTERRUPT)) {
duet_uart_interrupt_config(UARTx, UART_RX_INTERRUPT | UART_RX_TIMEOUT_INTERRUPT, DISABLE);
duet_uart_clear_interrupt(UARTx, UART_RX_INTERRUPT | UART_RX_TIMEOUT_INTERRUPT);
/* read rx fifo till it's empty */
while( ! duet_uart_get_flag_status(UARTx, UART_FLAG_RX_FIFO_EMPTY) )
{
while ( ! duet_uart_get_flag_status(UARTx, UART_FLAG_RX_FIFO_EMPTY) ) {
tmp = (char)(UARTx->DR);//uart_receive_data(UART );
if(g_duet_uart_callback_handler[uart_idx] != NULL)
{
if (g_duet_uart_callback_handler[uart_idx] != NULL) {
g_duet_uart_callback_handler[uart_idx](tmp);
}
}
duet_uart_interrupt_config(UARTx, UART_RX_INTERRUPT|UART_RX_TIMEOUT_INTERRUPT, ENABLE);
duet_uart_interrupt_config(UARTx, UART_RX_INTERRUPT | UART_RX_TIMEOUT_INTERRUPT, ENABLE);
}
}
@@ -502,31 +440,30 @@ static void UARTX_IRQHandler(uint8_t uart_idx)
extern EVENT_CB_S g_shellInputEvent;
static void UARTX_Shell_IRQHandler(uint8_t uart_idx)
{
// char tmp;
UART_TypeDef* UARTx = getUartxViaIdx(uart_idx);
if( duet_uart_get_interrupt_status(UARTx, UART_RX_INTERRUPT) || duet_uart_get_interrupt_status(UARTx, UART_RX_TIMEOUT_INTERRUPT))
{
duet_uart_interrupt_config(UARTx, UART_RX_INTERRUPT|UART_RX_TIMEOUT_INTERRUPT, DISABLE);
duet_uart_clear_interrupt(UARTx, UART_RX_INTERRUPT|UART_RX_TIMEOUT_INTERRUPT);
// char tmp;
UART_TypeDef *UARTx = getUartxViaIdx(uart_idx);
if ( duet_uart_get_interrupt_status(UARTx, UART_RX_INTERRUPT)
|| duet_uart_get_interrupt_status(UARTx, UART_RX_TIMEOUT_INTERRUPT)) {
duet_uart_interrupt_config(UARTx, UART_RX_INTERRUPT | UART_RX_TIMEOUT_INTERRUPT, DISABLE);
duet_uart_clear_interrupt(UARTx, UART_RX_INTERRUPT | UART_RX_TIMEOUT_INTERRUPT);
if(uart_idx == UART1_INDEX)
{
if (uart_idx == UART1_INDEX) {
(void)LOS_EventWrite(&g_shellInputEvent, 0x1);
}
duet_uart_interrupt_config(UARTx, UART_RX_INTERRUPT|UART_RX_TIMEOUT_INTERRUPT, ENABLE);
duet_uart_interrupt_config(UARTx, UART_RX_INTERRUPT | UART_RX_TIMEOUT_INTERRUPT, ENABLE);
}
}
#endif
void UART0_IRQHandler()
void UART0_IRQHandler(void)
{
duet_intrpt_enter();
UARTX_IRQHandler(0);
duet_intrpt_exit();
}
void UART1_IRQHandler()
void UART1_IRQHandler(void)
{
duet_intrpt_enter();
#if (LOSCFG_USE_SHELL == 1)
@@ -537,7 +474,7 @@ void UART1_IRQHandler()
duet_intrpt_exit();
}
void UART2_IRQHandler()
void UART2_IRQHandler(void)
{
duet_intrpt_enter();
UARTX_IRQHandler(2);
@@ -545,7 +482,7 @@ void UART2_IRQHandler()
}
void duet_uart_set_callback(uint8_t uart_idx,duet_uart_callback_func func)
void duet_uart_set_callback(uint8_t uart_idx, duet_uart_callback_func func)
{
g_duet_uart_callback_handler[uart_idx] = func;
asr582x/liteos_m/sdk/drivers/driver/src/duet_wdg.c
+22 -30
View File
@@ -14,6 +14,7 @@
*/
#include <stdio.h>
#include <errno.h>
#include "duet_cm4.h"
#include "duet.h"
#include "duet_wdg.h"
@@ -53,7 +54,7 @@ void hw_watchdog_lock(void)
}
void hw_watchdog_disable(void)
{
{
hw_watchdog_unlock();
WATCHDOG->CONTROL = 0x0;
WATCHDOG->LOAD = 0xffffffff;
@@ -61,7 +62,7 @@ void hw_watchdog_disable(void)
}
void hw_watchdog_isr(unsigned int delay)
{
{
hw_watchdog_unlock();
WATCHDOG->CONTROL = WDG_INTEN;
WATCHDOG->LOAD = delay;
@@ -69,7 +70,7 @@ void hw_watchdog_isr(unsigned int delay)
}
void hw_watchdog_reset(unsigned int delay)
{
{
hw_watchdog_unlock();
WATCHDOG->CONTROL = WDG_RESEN | WDG_INTEN;
WATCHDOG->LOAD = delay;
@@ -77,14 +78,14 @@ void hw_watchdog_reset(unsigned int delay)
}
void hw_watchdog_isr_clr(void)
{
{
hw_watchdog_unlock();
WATCHDOG->INTCLR = 0x1;
hw_watchdog_lock();
}
void WDG_IRQHandler(void)
{
{
duet_intrpt_enter();
NVIC_DisableIRQ(WDG_IRQn);
duet_intrpt_exit();
@@ -98,29 +99,26 @@ void WDG_IRQHandler(void)
* @return 0 : on success, EIO : if an error occurred with any step
*/
int32_t duet_wdg_init(duet_wdg_dev_t *wdg)
{
{
uint32_t reg_value;
if(NULL == wdg)
{
if (NULL == wdg) {
return EIO;
}
if(0 == wdg->port)
{
if (0 == wdg->port) {
//OPEN WDG CLOCK
reg_value = REG_RD(PERI_CLK_EN_REG1) & (~WDG_BUS_CLK_BIT);
REG_WR(PERI_CLK_EN_REG1, (reg_value | (WDG_BUS_CLK_BIT)));
//WDG CLOCK DIV SET
reg_value = REG_RD(WDG_APB_DIV_REG);
REG_WR(WDG_APB_DIV_REG,(reg_value | (WDG_APB_DIV<<4)));
hw_watchdog_reset(wdg->config.timeout * (SYSTEM_CLOCK /(WDG_APB_DIV+1)/1000 / 2)); //1000 for ms, 2 for watchdog feature
REG_WR(WDG_APB_DIV_REG, (reg_value | (WDG_APB_DIV << 4)));
hw_watchdog_reset(wdg->config.timeout * (SYSTEM_CLOCK / (WDG_APB_DIV + 1) / 1000 /
2)); //1000 for ms, 2 for watchdog feature
//ENABLE WDG IRQ
reg_value = REG_RD(DUTE_IRQ_EN_REG) & (~WDG_IRQ_BIT);
REG_WR(DUTE_IRQ_EN_REG, (reg_value | (WDG_IRQ_BIT)));
NVIC_EnableIRQ(WDG_IRQn);
return 0;
}
else
{
} else {
return EIO;
}
}
@@ -131,14 +129,12 @@ int32_t duet_wdg_init(duet_wdg_dev_t *wdg)
* @param[in] wdg the watch dog device
*/
void duet_wdg_reload(duet_wdg_dev_t *wdg)
{
if(NULL == wdg)
{
{
if (NULL == wdg) {
return;
}
if(0 == wdg->port)
{
lega_rtos_declare_critical();
if (0 == wdg->port) {
lega_rtos_declare_critical();
lega_rtos_enter_critical();
hw_watchdog_isr_clr();
NVIC_ClearPendingIRQ(WDG_IRQn);
@@ -155,14 +151,12 @@ void duet_wdg_reload(duet_wdg_dev_t *wdg)
* @return 0 : on success, EIO : if an error occurred with any step
*/
int32_t duet_wdg_finalize(duet_wdg_dev_t *wdg)
{
{
uint32_t reg_value;
if(NULL == wdg)
{
if (NULL == wdg) {
return EIO;
}
if(0 == wdg->port)
{
if (0 == wdg->port) {
//DIS WDG IRQ
reg_value = REG_RD(DUTE_IRQ_DIS_REG) & (~WDG_IRQ_BIT);
REG_WR(DUTE_IRQ_DIS_REG, (reg_value | (WDG_IRQ_BIT)));
@@ -170,11 +164,9 @@ int32_t duet_wdg_finalize(duet_wdg_dev_t *wdg)
hw_watchdog_disable();
// Set WDG Clock Disable
reg_value = REG_RD(PERI_CLK_DIS_REG1) & (~WDG_BUS_CLK_BIT);
REG_WR(PERI_CLK_DIS_REG1, (reg_value|(WDG_BUS_CLK_BIT)));
REG_WR(PERI_CLK_DIS_REG1, (reg_value | (WDG_BUS_CLK_BIT)));
return 0;
}
else
{
} else {
return EIO;
}
}
asr582x/liteos_m/sdk/drivers/include/lega_hw_common.h
+8 -8
View File
@@ -25,8 +25,8 @@
#include "lega_rtos_api.h"
#endif
extern lega_mutex_t HwSecurityMutex;
#define LEGA_HW_OK 0
#define LEGA_HW_ERR -1
#define LEGA_HW_OK (0)
#define LEGA_HW_ERR (-1)
/*!
HASH operation mode
@@ -41,9 +41,9 @@ typedef enum {
LEGA_HASH_NumOfModes,
LEGA_HASH_OperationModeLast= 0x7FFFFFFF,
LEGA_HASH_OperationModeLast = 0x7FFFFFFF,
}LEGA_HASH_OperationMode_t;
} LEGA_HASH_OperationMode_t;
/*! Defines the HASH result buffer. */
typedef uint32_t LEGA_HASH_Result_t[16];
@@ -52,9 +52,9 @@ extern uint8_t *rndContext_ptr;
extern uint8_t *rndWorkBuff_ptr;
extern int hw_lib_init_flag;
int lega_hw_lib_init();
int lega_hw_lib_deinit();
int lega_security_engine_init();
int lega_security_engine_deinit();
int lega_hw_lib_init(void);
int lega_hw_lib_deinit(void);
int lega_security_engine_init(void);
int lega_security_engine_deinit(void);
#endif //_LEGA_HW_COMMON_H_
asr582x/liteos_m/sdk/drivers/include/lega_rnd.h
+11 -10
View File
@@ -19,8 +19,8 @@
/*****************************************************************************/
/********************** Public Functions *************************/
/*****************************************************************************/
void lega_rnd_init();
void lega_rnd_deinit();
void lega_rnd_init(void);
void lega_rnd_deinit(void);
/*!
@@ -32,8 +32,8 @@ It implements referenced standard [SP800-90] - 10.2.1.4.2 - CTR-DRBG Reseeding a
@return A non-zero value from crys_rnd_error.h on failure.
*/
int lega_RND_Reseeding(
uint8_t *rndContext_ptr, /*!< [in/out] Pointer to the RND context buffer. */
uint8_t *rndWorkBuff_ptr /*!< [in/out] Scratchpad for the RND module's work. */
uint8_t *rndContext_ptr, /*!< [in/out] Pointer to the RND context buffer. */
uint8_t *rndWorkBuff_ptr /*!< [in/out] Scratchpad for the RND module's work. */
);
@@ -52,10 +52,11 @@ The generation algorithm uses AES (FIPS-PUB 197) and Derivation Function (DF).
@return A non-zero value from crys_rnd_error.h on failure.
*/
int lega_RND_GenerateVector(
uint8_t *rndState_ptr, /*!< [in/out] Pointer to the RND state structure, which is part of the RND context structure.
uint8_t *rndState_ptr, /*!< [in/out] Pointer to the RND state structure, which is part of the RND context structure.
Use rndContext->rndState field of the context for this parameter. */
uint16_t outSizeBytes, /*!< [in] The size in bytes of the random vector required. The maximal size is 2^16 -1 bytes. */
uint8_t *out_ptr /*!< [out] The pointer to output buffer. */
uint16_t
outSizeBytes, /*!< [in] The size in bytes of the random vector required. The maximal size is 2^16 -1 bytes. */
uint8_t *out_ptr /*!< [out] The pointer to output buffer. */
);
/*************************************************************************************/
@@ -67,9 +68,9 @@ to be later used by the ::CRYS_RND_Instantiation/::CRYS_RND_Reseeding/::CRYS_RND
@return A non-zero value from crys_rnd_error.h on failure.
*/
int lega_RND_AddAdditionalInput(
uint8_t *rndContext_ptr, /*!< [in/out] Pointer to the RND context buffer. */
uint8_t *additonalInput_ptr, /*!< [in] The Additional Input buffer. */
uint16_t additonalInputSize /*!< [in] The size of the Additional Input buffer. Must be <= 48, and a multiple of 4. */
uint8_t *rndContext_ptr, /*!< [in/out] Pointer to the RND context buffer. */
uint8_t *additonalInput_ptr, /*!< [in] The Additional Input buffer. */
uint16_t additonalInputSize /*!< [in] The size of the Additional Input buffer. Must be <= 48, and a multiple of 4. */
);
asr582x/liteos_m/sdk/drivers/include/lega_wlan_api.h
+47 -53
View File
@@ -32,8 +32,8 @@
* @brief wlan network interface enumeration definition.
*/
typedef enum {
SOFTAP, /*Act as an access point, and other station can connect, 4 stations Max*/
STA, /*Act as a station which can connect to an access point*/
SOFTAP, /*Act as an access point, and other station can connect, 4 stations Max*/
STA, /*Act as a station which can connect to an access point*/
} lega_wlan_type_e;
typedef enum {
@@ -53,15 +53,15 @@ typedef enum {
* @brief Scan result using normal scan.
*/
typedef struct {
uint8_t is_scan_adv;
char ap_num; /**< The number of access points found in scanning. */
struct {
char ssid[32+1]; /*ssid max len:32. +1 is for '\0'. when ssidlen is 32 */
char ap_power; /**< Signal strength, min:0, max:100. */
char bssid[6]; /* The BSSID of an access point. */
char channel; /* The RF frequency, 1-13 */
uint8_t security; /* Security type, @ref wlan_sec_type_t */
} * ap_list;
uint8_t is_scan_adv;
char ap_num; /**< The number of access points found in scanning. */
struct {
char ssid[32 + 1]; /*ssid max len:32. +1 is for '\0'. when ssidlen is 32 */
char ap_power; /**< Signal strength, min:0, max:100. */
char bssid[6]; /* The BSSID of an access point. */
char channel; /* The RF frequency, 1-13 */
uint8_t security; /* Security type, @ref wlan_sec_type_t */
} *ap_list;
} lega_wlan_scan_result_t;
typedef enum {
@@ -76,8 +76,8 @@ typedef enum {
/*used in event callback of station mode, indicate softap informatino which is connected*/
typedef struct {
int rssi; /* rssi */
char ssid[32+1]; /* ssid max len:32. +1 is for '\0' when ssidlen is 32 */
char pwd[64+1]; /* pwd max len:64. +1 is for '\0' when pwdlen is 64 */
char ssid[32 + 1]; /* ssid max len:32. +1 is for '\0' when ssidlen is 32 */
char pwd[64 + 1]; /* pwd max len:64. +1 is for '\0' when pwdlen is 64 */
char bssid[6]; /* BSSID of the wlan needs to be connected.*/
#ifdef CFG_NAN_CONFIG
char pmk[32];
@@ -103,15 +103,15 @@ typedef struct {
typedef struct {
int is_connected; /* The link to wlan is established or not, 0: disconnected, 1: connected. */
int wifi_strength; /* Signal strength of the current connected AP */
char ssid[32+1]; /* ssid max len:32. +1 is for '\0'. when ssidlen is 32 */
char ssid[32 + 1]; /* ssid max len:32. +1 is for '\0'. when ssidlen is 32 */
char bssid[6]; /* BSSID of the current connected wlan */
int channel; /* Channel of the current connected wlan */
} lega_wlan_link_stat_t;
/* used in open cmd for AP mode */
typedef struct {
char ssid[32+1]; /* ssid max len:32. +1 is for '\0' when ssidlen is 32 */
char pwd[64+1]; /* pwd max len:64. +1 is for '\0' when pwdlen is 64 */
char ssid[32 + 1]; /* ssid max len:32. +1 is for '\0' when ssidlen is 32 */
char pwd[64 + 1]; /* pwd max len:64. +1 is for '\0' when pwdlen is 64 */
int interval; /* beacon listen interval */
int hide; /* hidden SSID */
int channel; /* Channel*/
@@ -140,53 +140,50 @@ typedef struct {
} lega_wlan_init_type_t;
/*WLAN error status*/
typedef enum{
typedef enum {
WLAN_STA_MODE_BEACON_LOSS = 1, //in sta mode, cannot receive beacon of peer connected AP for a long time
WLAN_STA_MODE_AUTH_FAIL, //in sta mode, connect fail during auth
WLAN_STA_MODE_ASSOC_FAIL, //in sta mode, connect fail during association
WLAN_STA_MODE_PASSWORD_ERR, //in sta mode, connect fail as password error
WLAN_STA_MODE_NO_AP_FOUND, //in sta mode, connect fail as cannot find the connecting AP during scan
WLAN_STA_MODE_DHCP_FAIL, //in sta mode, connect fail as dhcp fail
}lega_wlan_err_status_e;
} lega_wlan_err_status_e;
typedef struct
{
typedef struct {
uint8_t first_channel;
uint8_t last_channel;
uint8_t max_tx_power;
uint8_t dfs_req;
}lega_wlan_country_channel_table_t;
} lega_wlan_country_channel_table_t;
#define LEGA_WLAN_CC_CHAN_TABLE_NUM_MAX 1
typedef struct
{
typedef struct {
uint8_t country_code[4];
uint8_t channel_table_num;
lega_wlan_country_channel_table_t table[LEGA_WLAN_CC_CHAN_TABLE_NUM_MAX];
}lega_wlan_country_code_param_t;
} lega_wlan_country_code_param_t;
/**
* @brief sta ip and mac address used in softap mode
* sta_ip_addr: e.g. when ip addr==192.168.1.1<-->sta_ip_addr == 0x0101A8C0
*/
typedef struct{
typedef struct {
uint32_t sta_ip_addr; /* station ip addr */
uint8_t sta_mac_addr[6]; /* station mac addr */
}lega_wlan_client_addr_info_t;
} lega_wlan_client_addr_info_t;
/*store linked station info*/
typedef struct{
typedef struct {
int client_num; /* linked station number */
lega_wlan_client_addr_info_t sta[4]; /* linked station entry, max client number is 4 */
}lega_wlan_ap_client_info_t;
} lega_wlan_ap_client_info_t;
/// start with dataelem struct declaration
typedef enum{
typedef enum {
MS_OK = 0,
MS_ERROR
}MS_STATUS;
} MS_STATUS;
typedef struct ms_hal_realtime_info_s
{
typedef struct ms_hal_realtime_info_s {
int8_t rssi; /* indicator of radio signal strength of uplink from STA to AP */
uint8_t channel; /* the channel number scanned by radio given */
uint32_t unicast_send_speed; /* statistics for unicast Bytes Sent per second */
@@ -210,18 +207,16 @@ typedef struct ms_hal_realtime_info_s
uint32_t retrains_count; /* total retransmission include same packted retransmit in hw */
uint8_t chn_utilization; /* measure by the radio on the scanned 20MHZ channel */
int8_t noise; /* indicator of the average radio noise plus interference power */
}ms_hal_realtime_info_t;
} ms_hal_realtime_info_t;
typedef struct ms_hal_base_info_s
{
typedef struct ms_hal_base_info_s {
int8_t rssi; /* indicator of radio signal strength of uplink from STA to AP */
uint8_t channel; /* the channel number scanned by radio given */
uint8_t snr; /* snr of connected ap for station mode */
uint8_t bssid[6]; /* mac address of associated AP */
}ms_hal_base_info_t;
} ms_hal_base_info_t;
typedef struct ms_hal_status_info_s
{
typedef struct ms_hal_status_info_s {
uint8_t enc_type; /* security mode, refer to lega_wlan_security_e */
uint8_t dns[16]; /* dns address assigned to the client */
uint64_t bts; /* beacon timestamp of associated AP */
@@ -229,10 +224,9 @@ typedef struct ms_hal_status_info_s
uint8_t ipv6[16]; /* ipv6 address assigned to client */
uint16_t ssid_len; /* ssid length of STA */
uint8_t ssid[32]; /* ssid of associated AP */
}ms_hal_status_info_t;
} ms_hal_status_info_t;
typedef struct ms_hal_test_report_s
{
typedef struct ms_hal_test_report_s {
uint8_t sta_num_on_router; /* the number of STAs associated to this BSS */
uint8_t numofNeighbors; /* the number of neithbor bss in associate channel */
uint32_t byte_tx_speed; /* bytes sent to associate AP per second */
@@ -244,7 +238,7 @@ typedef struct ms_hal_test_report_s
uint8_t power_save_enable; /* check powersave mode is whether enable */
uint8_t measure_num; /* number of measure frame report */
uint8_t *measure; /* measure report content */
}ms_hal_test_report_t;
} ms_hal_test_report_t;
/** @brief get realtime wireless info, call it after in sta mode and connected status
* @return 0 : on success.
@@ -296,7 +290,7 @@ int lega_wlan_deinit(void);
* @return 0 : on success.
* @return other : error occurred
*/
int lega_wlan_open(lega_wlan_init_type_t* init_info);
int lega_wlan_open(lega_wlan_init_type_t *init_info);
/** @brief used in softap mode, open wifi cmd
*
@@ -305,7 +299,7 @@ int lega_wlan_open(lega_wlan_init_type_t* init_info);
* @return 0 : on success.
* @return other : error occurred
*/
int lega_wlan_ap_open(lega_wlan_ap_init_t* init_info);
int lega_wlan_ap_open(lega_wlan_ap_init_t *init_info);
/** @brief used in station and softap mode, close wifi cmd
*
@@ -369,7 +363,7 @@ void lega_wlan_set_mac_address(uint8_t *mac_addr);
* @return NULL : error occurred.
* @return pointer : ip status got.
*/
lega_wlan_ip_stat_t * lega_wlan_get_ip_status(void);
lega_wlan_ip_stat_t *lega_wlan_get_ip_status(void);
/** @brief used in station mode, get link status information
@@ -427,10 +421,10 @@ int lega_wlan_set_ps_options(uint8_t listen_bc_mc, uint16_t listen_interval);
int lega_wlan_set_ps_mode(uint8_t ps_on);
/*when use monitor mode, user should register this type of callback function to get the received MPDU*/
typedef void (*monitor_cb_t)(uint8_t*data, int len, int rssi);
typedef void (*monitor_cb_t)(uint8_t *data, int len, int rssi);
/*when use monitor-ap mode, user should register this type of callback function to turn off monitor */
typedef void (*monitor_ap_cb_t)();
typedef void (*monitor_ap_cb_t)(void);
/** @brief used in sniffer mode, callback function to get received MPDU, should register before start_monitor
*
@@ -477,11 +471,11 @@ int lega_wlan_send_raw_frame(uint8_t *buf, int len);
*
*/
#ifdef CFG_NAN_CONFIG
typedef void (*ap_cb_t)(uint32_t len, uint8_t * output, uint8_t * mac_src);
typedef void (*ap_cb_t)(uint32_t len, uint8_t *output, uint8_t *mac_src);
int lega_wlan_register_protobuf_frame_handle_cb(ap_cb_t fn);
int lega_wlan_nan_update_beacon(uint32_t outlen, uint8_t * output, uint8_t * mac_dst, uint8_t iftype);
int lega_wlan_nan_update_beacon(uint32_t outlen, uint8_t *output, uint8_t *mac_dst, uint8_t iftype);
int lega_wlan_stop_recev_protobuf_frame(void);
int lega_wlan_nan_set_seq_num(uint8_t * pframe, uint8_t len);
int lega_wlan_nan_set_seq_num(uint8_t *pframe, uint8_t len);
int lega_wlan_nan_set_scan_channel(uint8_t channel, uint32_t duration);
int lega_wlan_disable_nanconfig(void);
#endif
@@ -578,14 +572,14 @@ void lega_wlan_set_country_code(lega_wlan_country_code_param_t *country_code_par
* @return 0 : on success.
* @return other : error occurred
*/
int lega_wlan_start_monitor_ap(lega_wlan_init_type_t* init_info);
int lega_wlan_start_monitor_ap(lega_wlan_init_type_t *init_info);
/** @brief stop monitor and ap coexist mode
*
* @return 0 : on success.
* @return other : error occurred
*/
int lega_wlan_stop_monitor_ap();
int lega_wlan_stop_monitor_ap(void);
typedef void (*lega_wlan_err_stat_handler)(lega_wlan_err_status_e err_info);
/** @brief user use to register err status callback function,
@@ -609,7 +603,7 @@ void lega_wlan_enable_tmmt_compensation(uint64_t timer_in_sec);
/** @brief get linked station ip and address in ap mode
* @param : input param to get sta ip and mac addr
*/
void lega_get_client_ip_mac(lega_wlan_ap_client_info_t* sta_addr);
void lega_get_client_ip_mac(lega_wlan_ap_client_info_t *sta_addr);
/** @brief api for uart log control
*
asr582x/liteos_m/sdk/drivers/include/lega_wlan_api_aos.h
+17 -19
View File
@@ -16,14 +16,13 @@
#ifndef _LEGA_WIFI_API_AOS_H_
#define _LEGA_WIFI_API_AOS_H_
#include "lega_wlan_api.h"
#ifdef __cplusplus
extern "C" {
#endif
#include "lega_wlan_api.h"
typedef enum
{
typedef enum {
WLAN_EVENT_SCAN_COMPLETED,
WLAN_EVENT_ASSOCIATED,
WLAN_EVENT_CONNECTED,
@@ -36,23 +35,22 @@ typedef enum
WLAN_EVENT_AP_PEER_UP,
WLAN_EVENT_AP_PEER_DOWN,
WLAN_EVENT_MAX,
}lega_wlan_event_e;
} lega_wlan_event_e;
/**
* @brief Input network precise paras in lega_wlan_start_adv function.
*/
typedef struct
{
lega_wlan_ap_info_adv_t ap_info; /**< @ref apinfo_adv_t. */
char key[64]; /**< Security key or PMK of the wlan. */
int key_len; /**< The length of the key. */
char local_ip_addr[16]; /**< Static IP configuration, Local IP address. */
char net_mask[16]; /**< Static IP configuration, Netmask. */
char gateway_ip_addr[16]; /**< Static IP configuration, Router IP address. */
char dns_server_ip_addr[16]; /**< Static IP configuration, DNS server IP address. */
char dhcp_mode; /**< DHCP mode, @ref DHCP_Disable, @ref DHCP_Client and @ref DHCP_Server. */
char reserved[32];
int wifi_retry_interval; /**< Retry interval if an error is occured when connecting an access point,
typedef struct {
lega_wlan_ap_info_adv_t ap_info; /**< @ref apinfo_adv_t. */
char key[64]; /**< Security key or PMK of the wlan. */
int key_len; /**< The length of the key. */
char local_ip_addr[16]; /**< Static IP configuration, Local IP address. */
char net_mask[16]; /**< Static IP configuration, Netmask. */
char gateway_ip_addr[16]; /**< Static IP configuration, Router IP address. */
char dns_server_ip_addr[16]; /**< Static IP configuration, DNS server IP address. */
char dhcp_mode; /**< DHCP mode, @ref DHCP_Disable, @ref DHCP_Client and @ref DHCP_Server. */
char reserved[32];
int wifi_retry_interval; /**< Retry interval if an error is occured when connecting an access point,
time unit is millisecond. */
} lega_wlan_init_info_adv_st;
@@ -74,9 +72,9 @@ void lega_wlan_register_mgmt_monitor_cb(monitor_cb_t fn);
*
* @return void
*/
extern void wifi_event_cb(lega_wlan_event_e evt, void* info);
extern void wifi_event_cb(lega_wlan_event_e evt, void *info);
#ifdef __cplusplus
}
}
#endif
#endif //_LEGA_WIFI_API_AOS_H_
asr582x/liteos_m/sdk/drivers/iperf/lwip_app_iperf.h
+15 -15
View File
@@ -31,37 +31,37 @@ typedef unsigned long long u64_t;
extern char iperf_send_buf[SEND_BUFSIZE];
extern lega_timer_t iperf_output_timer;
typedef enum {
IPERF_MODE_UNINIT=0,
IPERF_MODE_UNINIT = 0,
IPERF_MODE_SERVER,
IPERF_MODE_CLIENT
} IPERF_MODE;
typedef enum{
IPERF_PROTOCOL_TCP=0,
typedef enum {
IPERF_PROTOCOL_TCP = 0,
IPERF_PROTOCOL_UDP
} IPERF_PROTOCOL;
typedef enum{
IPERF_TCP_SERVER_UNINIT=0,
typedef enum {
IPERF_TCP_SERVER_UNINIT = 0,
IPERF_TCP_SERVER_INIT,
IPERF_TCP_SERVER_LISTENING,
IPERF_TCP_SERVER_RXRUNNING
} IPERF_TCP_SERVER_STATUS;
typedef enum{
IPERF_UDP_SERVER_UNINIT=0,
typedef enum {
IPERF_UDP_SERVER_UNINIT = 0,
IPERF_UDP_SERVER_INIT,
IPERF_UDP_SERVER_RXRUNNING
} IPERF_UDP_SERVER_STATUS;
typedef enum {
IPERF_TCP_CLINET_UNINIT=0,
IPERF_TCP_CLINET_UNINIT = 0,
IPERF_TCP_CLIENT_INIT,
IPERF_TCP_CLIENT_CONNECTING,
IPERF_TCP_CLIENT_CONNECTED,
IPERF_TCP_CLIENT_STARTING,
IPERF_TCP_CLIENT_TXRUNNING,
} IPERF_TCP_CLINET_STATUS;
typedef enum{
IPERF_UDP_CLIENT_UNINIT=0,
typedef enum {
IPERF_UDP_CLIENT_UNINIT = 0,
IPERF_UDP_CLIENT_INIT,
IPERF_UDP_CLIENT_START,
IPERF_UDP_CLIENT_TXRUNNING
@@ -77,14 +77,14 @@ extern volatile IPERF_UDP_CLIENT_STATUS iperf_udp_client_status;
//extern volatile int iperf_udp_client_term;
struct lwip_iperf_outputInfo{
struct lwip_iperf_outputInfo {
int seconds; //start time
u64_t lastByte;
u64_t currentByte;
u64_t lastPacketNum;
u64_t currentPacketNum;
};
struct lwip_iperf_config_t{
struct lwip_iperf_config_t {
int termFlag;
IPERF_MODE mode;
IPERF_PROTOCOL protocol;
@@ -107,9 +107,9 @@ void urxperf_init();
void utxperf_init();
void txperf_output();
int start_txperf_application(ip4_addr_t *ipaddr,int port);
int start_txperf_application(ip4_addr_t *ipaddr, int port);
int transfer_txperf_data();
int start_utxperf_application(ip4_addr_t *ipaddr,int port);
int start_utxperf_application(ip4_addr_t *ipaddr, int port);
int transfer_utxperf_data();
int start_rxperf_application(int port);
int start_urxperf_application(int port);
@@ -117,6 +117,6 @@ void clear_rxperf();
void disconnect_txperf();
void clear_urxperf();
void disconnect_utxperf();
void do_iperf_terminate_timer(char* mode,struct lwip_iperf_outputInfo* outputInfo);
void do_iperf_terminate_timer(char *mode, struct lwip_iperf_outputInfo *outputInfo);
#endif
#endif
asr582x/liteos_m/sdk/drivers/iperf/lwip_iperf.c
+158 -167
View File
@@ -25,15 +25,11 @@
#define IPERF_PORT 5001
#define IPERF_CLIENT_TIMEOUT_MS 0xFFFFFFFF
lega_semaphore_t iperf_Semaphore=NULL;
lega_semaphore_t iperf_Semaphore = NULL;
volatile IPERF_TCP_SERVER_STATUS iperf_tcp_server_status;
volatile IPERF_UDP_SERVER_STATUS iperf_udp_server_status;
volatile IPERF_TCP_CLINET_STATUS iperf_tcp_client_status;
volatile IPERF_UDP_CLIENT_STATUS iperf_udp_client_status;
//volatile int iperf_tcp_server_running;
//volatile int iperf_udp_server_running;
//volatile int iperf_tcp_client_running;
//volatile int iperf_udp_client_running;
char iperf_send_buf[SEND_BUFSIZE];
struct lwip_iperf_config_t iperf_config;
lega_timer_t iperf_output_timer;
@@ -42,50 +38,48 @@ struct lwip_iperf_outputInfo rxperf_outinfo;
struct lwip_iperf_outputInfo utxperf_outinfo;
struct lwip_iperf_outputInfo urxperf_outinfo;
void iperf_value_format(char* format_value,int format_value_len,u64_t value)
void iperf_value_format(char *format_value, int format_value_len, u64_t value)
{
u64_t gv=value/(1000000000ULL);
u64_t mv=value/(1000000ULL);
u64_t kv=value/(1000ULL);
u64_t gv = value / (1000000000ULL);
u64_t mv = value / (1000000ULL);
u64_t kv = value / (1000ULL);
lega_rtos_declare_critical();
lega_rtos_enter_critical();
if(gv==0){
if(mv==0){
if(kv==0){
snprintf(format_value,format_value_len,"%llu",value);
}
else{
snprintf(format_value,format_value_len,"%llu.%02uK",kv,(unsigned int)(value%1000)/10);
if (gv == 0) {
if (mv == 0) {
if (kv == 0) {
snprintf(format_value, format_value_len, "%llu", value);
} else {
snprintf(format_value, format_value_len, "%llu.%02uK", kv, (unsigned int)(value % 1000) / 10);
}
} else {
snprintf(format_value, format_value_len, "%llu.%02uM", mv, (unsigned int)(value % 1000000) / 10000);
}
else{
snprintf(format_value,format_value_len,"%llu.%02uM",mv,(unsigned int)(value%1000000)/10000);
}
}
else{
snprintf(format_value,format_value_len,"%llu.%02uG",gv,(unsigned int)(value%1000000000)/10000000);
} else {
snprintf(format_value, format_value_len, "%llu.%02uG", gv, (unsigned int)(value % 1000000000) / 10000000);
}
lega_rtos_exit_critical();
}
void do_iperf_terminate_timer(char* mode,struct lwip_iperf_outputInfo* outputInfo)
void do_iperf_terminate_timer(char *mode, struct lwip_iperf_outputInfo *outputInfo)
{
u64_t bytes=outputInfo->currentByte;
u64_t packets=outputInfo->currentPacketNum;
char byteFormat[24]={0};
char bitFormat[24]={0};
u64_t bytes = outputInfo->currentByte;
u64_t packets = outputInfo->currentPacketNum;
char byteFormat[24] = {0};
char bitFormat[24] = {0};
lega_rtos_stop_timer(&iperf_output_timer);
iperf_value_format(byteFormat,sizeof(byteFormat),bytes);
iperf_value_format(bitFormat,sizeof(bitFormat),(bytes*(8ULL))/((u64_t)outputInfo->seconds));
iperf_printf("%s:total %d sec %llu packets %s Bytes %s bits/sec\r\n",mode,outputInfo->seconds,packets,byteFormat,bitFormat);
memset(outputInfo,0,sizeof(struct lwip_iperf_outputInfo));
iperf_value_format(byteFormat, sizeof(byteFormat), bytes);
iperf_value_format(bitFormat, sizeof(bitFormat), (bytes * (8ULL)) / ((u64_t)outputInfo->seconds));
iperf_printf("%s:total %d sec %llu packets %s Bytes %s bits/sec\r\n", mode, outputInfo->seconds, packets,
byteFormat, bitFormat);
memset(outputInfo, 0, sizeof(struct lwip_iperf_outputInfo));
}
void do_iperf_terminate(char* mode,struct lwip_iperf_outputInfo* outputInfo,discon_handle_t discon)
void do_iperf_terminate(char *mode, struct lwip_iperf_outputInfo *outputInfo, discon_handle_t discon)
{
do_iperf_terminate_timer(mode,outputInfo);
do_iperf_terminate_timer(mode, outputInfo);
discon();
}
@@ -103,117 +97,89 @@ aiperf -s [-p port] [-u] [-t]\r\n\
}
void lega_wifi_iperf(int argc, char **argv)
{
int c=0;
int c = 0;
struct lwip_iperf_config_t temp_config = {0};
temp_config.port=IPERF_PORT;
temp_config.port = IPERF_PORT;
temp_config.tx_delay_ms = 2;
#if 0
//something wrong with getopt
while((c=getopt(argc,argv,"c:p:sut"))!=-1){
switch(c){
case 'c':
iperf_config.mode=IPERF_MODE_CLIENT;
if(inet_aton(optarg,&(iperf_config.ipaddr))==0){
goto IPERF_PARSE_FAIL;
}
break;
case 'p':
iperf_config.port=strtoul(optarg,NULL,10);
if(iperf_config.port<=0 || iperf_config.port>65536)
goto IPERF_PARSE_FAIL;
break;
case 's':
iperf_config.mode=IPERF_MODE_SERVER;
break;
case 'u':
iperf_config.protocol=IPERF_PROTOCOL_UDP;
break;
case 't':
iperf_config.termFlag=1;
break;
case '?':
default:
goto IPERF_PARSE_FAIL;
for (c = 1; c < argc; c++) {
if (strcmp(argv[c], "-c") == 0) {
temp_config.mode = IPERF_MODE_CLIENT;
if (inet_aton(argv[++c], &(temp_config.ipaddr)) == 0) {
goto IPERF_PARSE_FAIL;
}
} else if (strcmp(argv[c], "-p") == 0) {
temp_config.port = strtoul(argv[++c], NULL, 10);
if (temp_config.port <= 0 || temp_config.port > 65536) {
goto IPERF_PARSE_FAIL;
}
} else if (strcmp(argv[c], "-s") == 0) {
temp_config.mode = IPERF_MODE_SERVER;
} else if (strcmp(argv[c], "-u") == 0) {
temp_config.protocol = IPERF_PROTOCOL_UDP;
} else if (strcmp(argv[c], "-t") == 0) {
temp_config.termFlag = 1;
} else if (strcmp(argv[c], "-d") == 0) {
temp_config.tx_delay_ms = atoi(argv[c + 1]);
c++;
} else {
goto IPERF_PARSE_FAIL;
}
}
#else
for(c=1;c<argc;c++){
if(strcmp(argv[c],"-c")==0){
temp_config.mode=IPERF_MODE_CLIENT;
if(inet_aton(argv[++c],&(temp_config.ipaddr))==0){
goto IPERF_PARSE_FAIL;
}
} else
if(strcmp(argv[c],"-p")==0){
temp_config.port=strtoul(argv[++c],NULL,10);
if(temp_config.port<=0 || temp_config.port>65536)
goto IPERF_PARSE_FAIL;
}else
if(strcmp(argv[c],"-s")==0){
temp_config.mode=IPERF_MODE_SERVER;
}else
if(strcmp(argv[c],"-u")==0){
temp_config.protocol=IPERF_PROTOCOL_UDP;
}else
if(strcmp(argv[c],"-t")==0){
temp_config.termFlag=1;
}else
if(strcmp(argv[c],"-d")==0){
temp_config.tx_delay_ms=atoi(argv[c+1]);
c++;
}else
goto IPERF_PARSE_FAIL;
}
if((temp_config.termFlag == 0)&&(iperf_config.termFlag == 0)){
if ((temp_config.termFlag == 0) && (iperf_config.termFlag == 0)) {
iperf_printf("please close your last iperf connection firstly!\n");
goto IPERF_PARSE_FAIL;
}else if((temp_config.termFlag == 1)&&(iperf_config.termFlag == 0)){
iperf_config.termFlag=1;
}else{
} else if ((temp_config.termFlag == 1) && (iperf_config.termFlag == 0)) {
iperf_config.termFlag = 1;
} else {
memcpy(&iperf_config, &temp_config, sizeof(iperf_config));
}
if((iperf_config.mode==IPERF_MODE_UNINIT)&&(iperf_config.termFlag!=1)) goto IPERF_PARSE_FAIL;
#endif
if((iperf_config.mode==IPERF_MODE_CLIENT) && (iperf_Semaphore!=NULL)){
if(lega_rtos_set_semaphore(&iperf_Semaphore)==kNoErr){
if ((iperf_config.mode == IPERF_MODE_UNINIT) && (iperf_config.termFlag != 1)) {
goto IPERF_PARSE_FAIL;
}
if ((iperf_config.mode == IPERF_MODE_CLIENT) && (iperf_Semaphore != NULL)) {
if (lega_rtos_set_semaphore(&iperf_Semaphore) == kNoErr) {
//iperf_printf("Begin to run iperf client:\n");
}else{
} else {
iperf_printf("Run iperf client fail for semaphore error\n");
}
return;
}
if(iperf_config.protocol==IPERF_PROTOCOL_TCP){
if(iperf_config.mode==IPERF_MODE_SERVER){
if (iperf_config.protocol == IPERF_PROTOCOL_TCP) {
if (iperf_config.mode == IPERF_MODE_SERVER) {
//tcp server
if(iperf_config.termFlag==1){
if (iperf_config.termFlag == 1) {
//iperf_printf("Terminate iperf tcp server");
//terminate_rxperf();
do_iperf_terminate("tcp server",&rxperf_outinfo,clear_rxperf);
}else{
if(iperf_tcp_server_status<=IPERF_TCP_SERVER_INIT){
do_iperf_terminate("tcp server", &rxperf_outinfo, clear_rxperf);
} else {
if (iperf_tcp_server_status <= IPERF_TCP_SERVER_INIT) {
rxperf_init();
start_rxperf_application(iperf_config.port);
}else
iperf_printf("iperf tcp server already running status:%d,please terminate it before run again!\r\n",iperf_tcp_server_status);
} else {
iperf_printf("iperf tcp server already running status:%d,please terminate it before run again!\r\n",
iperf_tcp_server_status);
}
}
}
}
else{
if(iperf_config.mode==IPERF_MODE_SERVER){
} else {
if (iperf_config.mode == IPERF_MODE_SERVER) {
//udp server
if(iperf_config.termFlag==1){
if (iperf_config.termFlag == 1) {
do_iperf_terminate("udp server",&urxperf_outinfo,clear_urxperf);
}else{
if(iperf_udp_server_status<=IPERF_UDP_SERVER_INIT){
iperf_udp_server_status=IPERF_UDP_SERVER_INIT;
do_iperf_terminate("udp server", &urxperf_outinfo, clear_urxperf);
} else {
if (iperf_udp_server_status <= IPERF_UDP_SERVER_INIT) {
iperf_udp_server_status = IPERF_UDP_SERVER_INIT;
urxperf_init();
start_urxperf_application(iperf_config.port);
}else
iperf_printf("iperf udp server already running status:%d,please terminate it before run again!\r\n",iperf_udp_server_status);
} else {
iperf_printf("iperf udp server already running status:%d,please terminate it before run again!\r\n",
iperf_udp_server_status);
}
}
}
}
@@ -223,90 +189,112 @@ IPERF_PARSE_FAIL:
return;
}
void do_iperf_output(char* mode,struct lwip_iperf_outputInfo* outputInfo)
void do_iperf_output(char *mode, struct lwip_iperf_outputInfo *outputInfo)
{
u64_t bytes=outputInfo->currentByte-outputInfo->lastByte;
u64_t packets=outputInfo->currentPacketNum-outputInfo->lastPacketNum;
char byteFormat[24]={0};
char bitFormat[24]={0};
iperf_value_format(byteFormat,sizeof(byteFormat),bytes);
iperf_value_format(bitFormat,sizeof(bitFormat),bytes*(8ULL));
u64_t bytes = outputInfo->currentByte - outputInfo->lastByte;
u64_t packets = outputInfo->currentPacketNum - outputInfo->lastPacketNum;
char byteFormat[24] = {0};
char bitFormat[24] = {0};
iperf_value_format(byteFormat, sizeof(byteFormat), bytes);
iperf_value_format(bitFormat, sizeof(bitFormat), bytes * (8ULL));
outputInfo->seconds++;
if(bytes!=0)
iperf_printf("%s:%d-%d sec %llu packets %s Bytes %s bits/sec\r\n",mode,outputInfo->seconds-1,outputInfo->seconds,packets,byteFormat,bitFormat);
outputInfo->lastByte=outputInfo->currentByte;
outputInfo->lastPacketNum=outputInfo->currentPacketNum;
if (bytes != 0) {
iperf_printf("%s:%d-%d sec %llu packets %s Bytes %s bits/sec\r\n", mode, outputInfo->seconds - 1,
outputInfo->seconds, packets, byteFormat, bitFormat);
}
outputInfo->lastByte = outputInfo->currentByte;
outputInfo->lastPacketNum = outputInfo->currentPacketNum;
}
void iperf_output(void *args)
{
printf("\nlalala %s\n",__func__);
if(iperf_tcp_client_status==IPERF_TCP_CLIENT_TXRUNNING) do_iperf_output("tcp client",&txperf_outinfo);
if(iperf_tcp_server_status==IPERF_TCP_SERVER_RXRUNNING) do_iperf_output("tcp server",&rxperf_outinfo);
if(iperf_udp_client_status==IPERF_UDP_CLIENT_TXRUNNING) do_iperf_output("udp client",&utxperf_outinfo);
if(iperf_udp_server_status==IPERF_UDP_SERVER_RXRUNNING) do_iperf_output("udp server",&urxperf_outinfo);
printf("\nlalala %s\n", __func__);
if (iperf_tcp_client_status == IPERF_TCP_CLIENT_TXRUNNING) {
do_iperf_output("tcp client", &txperf_outinfo);
}
if (iperf_tcp_server_status == IPERF_TCP_SERVER_RXRUNNING) {
do_iperf_output("tcp server", &rxperf_outinfo);
}
if (iperf_udp_client_status == IPERF_UDP_CLIENT_TXRUNNING) {
do_iperf_output("udp client", &utxperf_outinfo);
}
if (iperf_udp_server_status == IPERF_UDP_SERVER_RXRUNNING) {
do_iperf_output("udp server", &urxperf_outinfo);
}
}
void lega_wifi_iperf_client_start()
{
int count=0;
if(lega_rtos_init_timer(&iperf_output_timer,IPERF_OUTPUT_INTERVIEW*1000,iperf_output,NULL)!=kNoErr)
int count = 0;
if (lega_rtos_init_timer(&iperf_output_timer, IPERF_OUTPUT_INTERVIEW * 1000, iperf_output, NULL) != kNoErr) {
iperf_printf("iperf timer fail!\r\n");
for( ;; ){
if (lega_rtos_get_semaphore(&iperf_Semaphore, IPERF_CLIENT_TIMEOUT_MS)==kNoErr){
}
for ( ;; ) {
if (lega_rtos_get_semaphore(&iperf_Semaphore, IPERF_CLIENT_TIMEOUT_MS) == kNoErr) {
//AT command set lwip_iperf_config over and begin to run
if(iperf_config.mode!=IPERF_MODE_CLIENT) continue;
if(iperf_config.protocol==IPERF_PROTOCOL_TCP){
if(iperf_config.termFlag==1){
do_iperf_terminate("tcp client",&txperf_outinfo,disconnect_txperf);
if (iperf_config.mode != IPERF_MODE_CLIENT) {
continue;
}
if (iperf_config.protocol == IPERF_PROTOCOL_TCP) {
if (iperf_config.termFlag == 1) {
do_iperf_terminate("tcp client", &txperf_outinfo, disconnect_txperf);
continue;
}
if(iperf_tcp_client_status != IPERF_TCP_CLIENT_TXRUNNING){
if(iperf_tcp_client_status>=IPERF_TCP_CLIENT_CONNECTING){
if (iperf_tcp_client_status != IPERF_TCP_CLIENT_TXRUNNING) {
if (iperf_tcp_client_status >= IPERF_TCP_CLIENT_CONNECTING) {
iperf_printf("iperf tcp client already running, please terminate it before run again!\r\n");
continue;
}
txperf_init();
if(start_txperf_application(&(iperf_config.ipaddr),iperf_config.port)!=0){
if (start_txperf_application(&(iperf_config.ipaddr), iperf_config.port) != 0) {
iperf_printf("iperf tcp connect fail!\n");
continue;
}
count=0;
if(iperf_tcp_client_status==IPERF_TCP_CLIENT_TXRUNNING) break;
while(iperf_tcp_client_status<IPERF_TCP_CLIENT_STARTING){ //wait for tcp connect
count = 0;
if (iperf_tcp_client_status == IPERF_TCP_CLIENT_TXRUNNING) {
break;
}
while (iperf_tcp_client_status < IPERF_TCP_CLIENT_STARTING) { //wait for tcp connect
lega_rtos_delay_milliseconds(100);
if(++count>100){
iperf_printf("iperf connect to %s:%d fail!\n",ip4addr_ntoa((const ip4_addr_t*)&(iperf_config.ipaddr)),iperf_config.port);
if (++count > 100) {
iperf_printf("iperf connect to %s:%d fail!\n", ip4addr_ntoa((const ip4_addr_t *) & (iperf_config.ipaddr)),
iperf_config.port);
break;
}
}
if(count>100) continue;
iperf_tcp_client_status=IPERF_TCP_CLIENT_TXRUNNING;
if (count > 100) {
continue;
}
iperf_tcp_client_status = IPERF_TCP_CLIENT_TXRUNNING;
}
transfer_txperf_data();
}
else if(iperf_config.protocol==IPERF_PROTOCOL_UDP){
if(iperf_config.termFlag==1){
do_iperf_terminate("udp client",&utxperf_outinfo,disconnect_utxperf);
} else if (iperf_config.protocol == IPERF_PROTOCOL_UDP) {
if (iperf_config.termFlag == 1) {
do_iperf_terminate("udp client", &utxperf_outinfo, disconnect_utxperf);
continue;
}
if(iperf_udp_client_status>=IPERF_UDP_CLIENT_START){
iperf_printf("iperf udp client already running status:%d,please terminate it before run again!\r\n",iperf_udp_client_status);
if (iperf_udp_client_status >= IPERF_UDP_CLIENT_START) {
iperf_printf("iperf udp client already running status:%d,please terminate it before run again!\r\n",
iperf_udp_client_status);
continue;
}
utxperf_init();
if(start_utxperf_application(&(iperf_config.ipaddr),iperf_config.port)!=0){
if (start_utxperf_application(&(iperf_config.ipaddr), iperf_config.port) != 0) {
continue;
}
while(transfer_utxperf_data() != -2){
while (transfer_utxperf_data() != -2) {
lega_rtos_delay_milliseconds(iperf_config.tx_delay_ms);
if(iperf_config.termFlag) break;
if (iperf_config.termFlag) {
break;
}
}
if (iperf_config.termFlag) {
continue;
}
if(iperf_config.termFlag) continue;
}
}
}
@@ -318,23 +306,26 @@ lega_thread_t iper_handler = NULL;
#define IPERF_CLIENT_STACK_SIZE 4096
void lega_wifi_iperf_init(void)
{
int i=0;
int i = 0;
rxperf_init();
urxperf_init();
utxperf_init();
if(iperf_Semaphore==NULL)
lega_rtos_init_semaphore(&iperf_Semaphore,0);
if (iperf_Semaphore == NULL) {
lega_rtos_init_semaphore(&iperf_Semaphore, 0);
}
/* initialize data buffer being sent */
for (i = 0; i < SEND_BUFSIZE; i++)
for (i = 0; i < SEND_BUFSIZE; i++) {
iperf_send_buf[i] = (i % 10) + '0';
}
memset(&iperf_config,0,sizeof(iperf_config));
memset(&iperf_config, 0, sizeof(iperf_config));
iperf_config.termFlag = 1;
lega_rtos_create_thread(&iper_handler,IPERF_CLIENT_PRIORITY,IPERF_CLIENT_THREAD_NAME,lega_wifi_iperf_client_start,IPERF_CLIENT_STACK_SIZE,0);
lega_rtos_create_thread(&iper_handler, IPERF_CLIENT_PRIORITY, IPERF_CLIENT_THREAD_NAME, lega_wifi_iperf_client_start,
IPERF_CLIENT_STACK_SIZE, 0);
}
#endif
asr582x/liteos_m/sdk/drivers/kv/include/kv_conf.h
+2 -2
View File
@@ -18,7 +18,7 @@
#include "duet_cm4.h"
#include "cmsis_os2.h"
//#define KV_CONFIG_TOTAL_SIZE 0x10000
#define KV_CONFIG_TOTAL_SIZE 0x8000
/* The totally storage size for key-value store */
@@ -29,7 +29,7 @@
#endif
#if KV_TOTAL_SIZE < 0x2000
#error KV TOTALSIZE ERROR
#error KV TOTALSIZE ERROR
#endif
/* The physical parition for key-value store */
asr582x/liteos_m/sdk/drivers/kv/include/kv_err.h
+14 -14
View File
@@ -17,21 +17,21 @@
#define KV_ERR_H
/* Key-value function return code description */
#define KV_OK 0 /* Successed */
#define KV_LOOP_CONTINUE 10000 /* Loop Continue */
#define KV_ERR_NO_SPACE -10001 /* The space is out of range */
#define KV_ERR_INVALID_PARAM -10002 /* The parameter is invalid */
#define KV_ERR_MALLOC_FAILED -10003 /* The os memory malloc error */
#define KV_ERR_NOT_FOUND -10004 /* Could not found the item */
#define KV_ERR_FLASH_READ -10005 /* The flash read operation error */
#define KV_ERR_FLASH_WRITE -10006 /* The flash write operation error */
#define KV_ERR_FLASH_ERASE -10007 /* The flash erase operation error */
#define KV_ERR_OS_LOCK -10008 /* The error related to os lock */
#define KV_ERR_OS_SEM -10009 /* The error related to os semaphose */
#define KV_OK (0) /* Successed */
#define KV_LOOP_CONTINUE (10000) /* Loop Continue */
#define KV_ERR_NO_SPACE (-10001) /* The space is out of range */
#define KV_ERR_INVALID_PARAM (-10002) /* The parameter is invalid */
#define KV_ERR_MALLOC_FAILED (-10003) /* The os memory malloc error */
#define KV_ERR_NOT_FOUND (-10004) /* Could not found the item */
#define KV_ERR_FLASH_READ (-10005) /* The flash read operation error */
#define KV_ERR_FLASH_WRITE (-10006) /* The flash write operation error */
#define KV_ERR_FLASH_ERASE (-10007) /* The flash erase operation error */
#define KV_ERR_OS_LOCK (-10008) /* The error related to os lock */
#define KV_ERR_OS_SEM (-10009) /* The error related to os semaphose */
#define KV_ERR_ENCRYPT -10010 /* Data encryption error */
#define KV_ERR_DECRYPT -10011 /* Data decryption error */
#define KV_ERR_NOT_SUPPORT -10012 /* The function is not support yet */
#define KV_ERR_ENCRYPT (-10010) /* Data encryption error */
#define KV_ERR_DECRYPT (-10011) /* Data decryption error */
#define KV_ERR_NOT_SUPPORT (-10012) /* The function is not support yet */
#endif /* KV_ERR_H */
asr582x/liteos_m/sdk/drivers/libs/Cortex-M4/libasr_combo.a
BIN
View File
Binary file not shown.
asr582x/liteos_m/sdk/drivers/ota/ota_port.h
+6 -7
View File
@@ -54,9 +54,9 @@
#define IMAGE_ROLL_BACK_FLAG_SIZE 4
#define IMAGE_VERIFY_DONE_SIZE 4
#define IMAGE_RESERVED_SIZE (IMAGE_HEADER_SIZE - IMAGE_TOKEN_SIZE - IMAGE_APP_VERSION_MAX_SIZE \
- FLASH_REMAPPING_EN_SIZE - FLASH_REMAPPING_BANK_SIZE - OTA_FLAG_SIZE - IMAGE_COMPRESS_EN_SIZE \
- IMAGE_LENGTH_SIZE - IMAGE_CRC_SIZE - APP_LENGTH_SIZE - APP_CRC_SIZE \
- OTA_REGION_DIRTY_FLAG_SIZE - IMAGE_ROLL_BACK_FLAG_SIZE - IMAGE_VERIFY_DONE_SIZE)
- FLASH_REMAPPING_EN_SIZE - FLASH_REMAPPING_BANK_SIZE - OTA_FLAG_SIZE - IMAGE_COMPRESS_EN_SIZE \
- IMAGE_LENGTH_SIZE - IMAGE_CRC_SIZE - APP_LENGTH_SIZE - APP_CRC_SIZE \
- OTA_REGION_DIRTY_FLAG_SIZE - IMAGE_ROLL_BACK_FLAG_SIZE - IMAGE_VERIFY_DONE_SIZE)
//size of image
#define IMAGE_APP_VERSION_SIZE 24 //e.g. app-1.0.2-20181115.1553
@@ -67,15 +67,14 @@
#define IMAGE_HEADER_OFFSET 0x0 //offset in flash region
#define OTA_IMAGE_CRC_OFFSET (IMAGE_TOKEN_SIZE + IMAGE_APP_VERSION_MAX_SIZE \
+ FLASH_REMAPPING_EN_SIZE + FLASH_REMAPPING_BANK_SIZE + OTA_FLAG_SIZE + IMAGE_COMPRESS_EN_SIZE \
+ IMAGE_LENGTH_SIZE)
+ FLASH_REMAPPING_EN_SIZE + FLASH_REMAPPING_BANK_SIZE + OTA_FLAG_SIZE + IMAGE_COMPRESS_EN_SIZE \
+ IMAGE_LENGTH_SIZE)
//offset in pure image
#define IMAGE_APP_VERSION_OFFSET 0x100
#define OTA_VERIFY_TOKEN 0xACDF160B
struct OTA_INFO
{
struct OTA_INFO {
char token[IMAGE_TOKEN_SIZE];
char app_version[IMAGE_APP_VERSION_MAX_SIZE];
uint32_t flash_remapping_en;

Some files were not shown because too many files have changed in this diff Show More