!7 解决 license问题

Merge pull request !7 from LANGO/master
This commit is contained in:
openharmony_sig_ci
2022-03-07 08:30:49 +00:00
committed by Gitee
29 changed files with 13 additions and 2379 deletions
Executable → Regular
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+3 -3
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@@ -19,7 +19,7 @@ config("public") {
kernel_module("asr_system") {
sources = [
"common/lega_mac_addr.c",
# "common/lega_mac_addr.c",
"at_cmd/atcmd_user.c",
"at_cmd/atcmdplus_ble.c",
"ble_src/app.c",
@@ -31,7 +31,7 @@ kernel_module("asr_system") {
"platform/system/printf-stdarg.c",
"platform/system/printf_uart.c",
"platform/system/sysCalls.c",
"platform/system/system_cm4.c",
"platform/system/panic_mpu.c",
# "platform/system/system_cm4.c",
# "platform/system/panic_mpu.c",
]
}
@@ -20,12 +20,13 @@
#include <string.h>
#include "target_config.h"
#if (LOSCFG_USE_SHELL == 1)
#include "shell.h"
#include "shell.h"
#include "shcmd.h"
#endif
#include "duet_flash_kv.h"
#include "flash.h"
#include "duet_flash.h"
#include "lega_rtos.h"
/*
************************************************************
* USER AT CMD START
@@ -61,7 +62,11 @@ int at_hilink_start(int argc, char **argv)
int at_kv_clear(int argc, char **argv)
{
hal_flash_erase(PARTITION_PARAMETER_2, 0, KV_MAX_SIZE);
lega_rtos_declare_critical();
lega_enter_critical_expble();
duet_flash_erase(PARTITION_PARAMETER_2, 0, KV_MAX_SIZE);
lega_exit_critical_expble();
printf("kv clear done\r\n");
delay(1000);
NVIC_SystemReset();
@@ -1,57 +0,0 @@
/*
* Copyright (c) 2022 ASR Microelectronics (Shanghai) Co., Ltd. All rights reserved.
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include <stdint.h>
#include <stdlib.h>
#include <stdio.h>
#ifdef ALIOS_SUPPORT
#include "lega_rhino.h"
#else
#include "lega_rtos.h"
#endif
#include "duet_common.h"
int get_random_int_c()
{
int i;
srand(lega_rtos_get_time());
i = rand();
return i;
}
/**
* @brief if no mac address burned in efuse memory,
* user could modify this function to set default mac address
*
* @param mac_addr : mac_addr pointer wifi stack used
*/
void lega_wlan_default_mac_addr(uint8_t *mac_addr)
{
mac_addr[0] = 0x8C;
mac_addr[1] = 0x59;
mac_addr[2] = 0xDC;
mac_addr[3] = (uint8_t)((get_random_int_c()>>16)&0xff);
mac_addr[4] = (uint8_t)((get_random_int_c()>>8)&0xff);
mac_addr[5] = (uint8_t)((get_random_int_c()>>0)&0xff);
}
void lega_rf_set_xo_freq_bias(void)
{
#ifdef XO_FREQ_BIAS_CONFIG
//XO freq bias for blue board
REG_WR(0x40000A74, 0x7171);
#endif
printf("Current xo config is 0x%x\r\n",(unsigned int)REG_RD(0x40000A74));
}
+1 -1
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@@ -26,7 +26,7 @@ kernel_module("asr_drivers") {
"src/duet_gpio.c",
"src/duet_uart.c",
"src/duet_wdg.c",
"src/duet_rtc.c",
# "src/duet_rtc.c",
"src/duet_rf_spi.c",
"src/duet_pinmux.c",
"src/duet_timer.c",
@@ -1,86 +0,0 @@
/*
* Copyright (c) 2022 ASR Microelectronics (Shanghai) Co., Ltd. All rights reserved.
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef _DUET_RTC_H_
#define _DUET_RTC_H_
#include <stdint.h>
#include <errno.h>
#define HAL_RTC_FORMAT_DEC 1
#define HAL_RTC_FORMAT_BCD 2
typedef struct {
uint8_t format; /* time formart DEC or BCD */
} duet_rtc_config_t;
typedef struct {
uint8_t port; /* rtc port */
duet_rtc_config_t config; /* rtc config */
void *priv; /* priv data */
} duet_rtc_dev_t;
/*
* RTC time
*/
typedef struct {
uint8_t sec; /* DEC format:value range from 0 to 59, BCD format:value range from 0x00 to 0x59 */
uint8_t min; /* DEC format:value range from 0 to 59, BCD format:value range from 0x00 to 0x59 */
uint8_t hr; /* DEC format:value range from 0 to 23, BCD format:value range from 0x00 to 0x23 */
uint8_t weekday; /* DEC format:value range from 1 to 7, BCD format:value range from 0x01 to 0x07 */
uint8_t date; /* DEC format:value range from 1 to 31, BCD format:value range from 0x01 to 0x31 */
uint8_t month; /* DEC format:value range from 1 to 12, BCD format:value range from 0x01 to 0x12 */
uint8_t year; /* DEC format:value range from 0 to 99, BCD format:value range from 0x00 to 0x99 */
} duet_rtc_time_t;
/**
* This function will initialize the on board CPU real time clock
*
*
* @param[in] rtc rtc device
*
* @return 0 : on success, EIO : if an error occurred with any step
*/
int32_t duet_rtc_init(duet_rtc_dev_t *rtc);
/**
* This function will return the value of time read from the on board CPU real time clock.
*
* @param[in] rtc rtc device
* @param[out] time pointer to a time structure
*
* @return 0 : on success, EIO : if an error occurred with any step
*/
int32_t duet_rtc_get_time(duet_rtc_dev_t *rtc, duet_rtc_time_t *time);
/**
* This function will set MCU RTC time to a new value.
*
* @param[in] rtc rtc device
* @param[out] time pointer to a time structure
*
* @return 0 : on success, EIO : if an error occurred with any step
*/
int32_t duet_rtc_set_time(duet_rtc_dev_t *rtc, const duet_rtc_time_t *time);
/**
* De-initialises an RTC interface, Turns off an RTC hardware interface
*
* @param[in] RTC the interface which should be de-initialised
*
* @return 0 : on success, EIO : if an error occurred with any step
*/
int32_t duet_rtc_finalize(duet_rtc_dev_t *rtc);
#endif //_DUET_RTC_H_
@@ -1,224 +0,0 @@
/*
* Copyright (c) 2022 ASR Microelectronics (Shanghai) Co., Ltd. All rights reserved.
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include <stdio.h>
#include <time.h>
#include "duet.h"
#include "duet_cm4.h"
#include "duet_common.h"
#include "duet_rtc.h"
#ifdef CFG_RTC_INDEPENDENT
#include "pmu.h"
#endif
duet_rtc_time_t *p_duet_rtc_time = (duet_rtc_time_t *)(RTC_TIME_RETENTION_RAM_ADDR);
#ifdef CFG_RTC_INDEPENDENT
void SLEEP_IRQHandler(void)
{
duet_intrpt_enter();
struct tm tm1;
struct tm *p_tm1;
time_t time1;
//RTC int sts check and clear
if(REG_RD(DUET_IRQ_STS_REG_ADDR) & (1 << RTC_IRQ_BIT))
{
//clear irq
RTC->CTRL &= ~RTC_INT_ENABLE;
//time1 = GET_RTC_CURRENT_DATE();
//time1 = (((time1 >> 17) & 0xFF) * 86400 + ((time1 >> 12) & 0x1F) * 3600 + ((time1 >> 6) & 0x3F) * 60 + (time1 & 0x3F));
tm1.tm_year = p_duet_rtc_time->year;
tm1.tm_mon = p_duet_rtc_time->month;
tm1.tm_mday = p_duet_rtc_time->date;
tm1.tm_hour = p_duet_rtc_time->hr;
tm1.tm_min = p_duet_rtc_time->min;
tm1.tm_sec = p_duet_rtc_time->sec;
time1 = RTC_MAX_DAY * SECOND_PER_DAY - 1;
time1 += mktime(&tm1);
p_tm1 = gmtime(&time1);
p_duet_rtc_time->year = p_tm1->tm_year;
p_duet_rtc_time->month = p_tm1->tm_mon;
p_duet_rtc_time->date = p_tm1->tm_mday;
p_duet_rtc_time->hr = p_tm1->tm_hour;
p_duet_rtc_time->min = p_tm1->tm_min;
p_duet_rtc_time->sec = p_tm1->tm_sec;
p_duet_rtc_time->weekday = p_tm1->tm_wday;
while(REG_RD(DUET_IRQ_STS_REG_ADDR) & (1 << RTC_IRQ_BIT))
{
REG_WR(DUET_IRQ_STS_REG_ADDR,(1 << RTC_IRQ_BIT)); //clear rtc int flag
}
//enable int
RTC->CTRL |= RTC_INT_ENABLE;
//print_date(p_duet_rtc_time);
}
#ifdef CFG_RTC_INDEPENDENT
else
{
lega_drv_goto_active();
}
#endif
duet_intrpt_exit();
}
#endif
/**
* This function will initialize the on board CPU real time clock
*
*
* @param[in] rtc rtc device
*
* @return 0 : on success, EIO : if an error occurred with any step
*/
int32_t duet_rtc_init(duet_rtc_dev_t *rtc)
{
uint32_t reg_value = 0;
if(NULL == rtc)
{
return EIO;
}
if(0 == rtc->port)
{
if(!(RTC->CTRL & RTC_ENABLE)) //for deep sleep wake up reboot case consider
{
p_duet_rtc_time->year = RTC_INIT_YEAR;
p_duet_rtc_time->month = RTC_INIT_MONTH;
p_duet_rtc_time->date = RTC_INIT_DATE;
p_duet_rtc_time->hr = RTC_INIT_HOUR;
p_duet_rtc_time->min = RTC_INIT_MINUTE;
p_duet_rtc_time->sec = RTC_INIT_SECOND;
p_duet_rtc_time->weekday = RTC_INIT_WEEKDAY;
RTC->CTRL &= ~RTC_ENABLE;
RTC->CNT_TICK = RTC_TICK_CNT;
RTC->CNT_DATE = (RTC_REFRESH_DAY << 17 | RTC_REFRESH_HOUR << 12 | RTC_REFRESH_MINUTE << 6 | RTC_REFRESH_SECOND);
RTC->CTRL |= RTC_CNT_CYCLE_ENABLE | RTC_INT_ENABLE | RTC_ENABLE; //sel internal RC clock, calibration needed
//RTC->CTRL |= RTC_CNT_CYCLE_ENABLE | RTC_INT_ENABLE | RTC_ENABLE | CLK32K_SEL | SW_OVERRIDE_REG_POR; //sel ext 32.768k XTAL
//open RTC interrupt
reg_value = REG_RD(DUTE_IRQ_EN_REG) & (~SLEEP_IRQ_BIT);
REG_WR(DUTE_IRQ_EN_REG, (reg_value | (SLEEP_IRQ_BIT)));
NVIC_EnableIRQ(SLEEP_IRQn);
}
return 0;
}
return EIO;
}
/**
* This function will return the value of time read from the on board CPU real time clock.
*
* @param[in] rtc rtc device
* @param[out] time pointer to a time structure
*
* @return 0 : on success, EIO : if an error occurred with any step
*/
int32_t duet_rtc_get_time(duet_rtc_dev_t *rtc, duet_rtc_time_t *time)
{
struct tm tm1;
struct tm *p_tm1;
time_t time1;
if((NULL == rtc) || (NULL == time))
{
return EIO;
}
if(0 == rtc->port)
{
time1 = GET_RTC_CURRENT_DATE();
time1 = (((time1 >> 17) & 0xFF) * 86400 + ((time1 >> 12) & 0x1F) * 3600 + ((time1 >> 6) & 0x3F) * 60 + (time1 & 0x3F));
tm1.tm_year = p_duet_rtc_time->year;
tm1.tm_mon = p_duet_rtc_time->month;
tm1.tm_mday = p_duet_rtc_time->date;
tm1.tm_hour = p_duet_rtc_time->hr;
tm1.tm_min = p_duet_rtc_time->min;
tm1.tm_sec = p_duet_rtc_time->sec;
time1 += mktime(&tm1);
p_tm1 = gmtime(&time1);
time->year = p_tm1->tm_year;
time->month = p_tm1->tm_mon;
time->date = p_tm1->tm_mday;
time->hr = p_tm1->tm_hour;
time->min = p_tm1->tm_min;
time->sec = p_tm1->tm_sec;
time->weekday = p_tm1->tm_wday;
return 0;
}
return EIO;
}
/**
* This function will set MCU RTC time to a new value.
*
* @param[in] rtc rtc device
* @param[out] time pointer to a time structure
*
* @return 0 : on success, EIO : if an error occurred with any step
*/
int32_t duet_rtc_set_time(duet_rtc_dev_t *rtc, const duet_rtc_time_t *time)
{
if((NULL == rtc) || (NULL == time))
{
return EIO;
}
if(0 == rtc->port)
{
RTC->CTRL &= ~RTC_ENABLE;
delay(200);
RTC->CTRL |= RTC_ENABLE;
*p_duet_rtc_time = *time;
return 0;
}
return EIO;
}
/**
* De-initialises an RTC interface, Turns off an RTC hardware interface
*
* @param[in] RTC the interface which should be de-initialised
*
* @return 0 : on success, EIO : if an error occurred with any step
*/
int32_t duet_rtc_finalize(duet_rtc_dev_t *rtc)
{
uint32_t reg_value = 0;
if(NULL == rtc)
{
return EIO;
}
if(0 == rtc->port)
{
reg_value = REG_RD(DUTE_IRQ_DIS_REG) & (~SLEEP_IRQ_BIT);
REG_WR(DUTE_IRQ_DIS_REG, (reg_value | (SLEEP_IRQ_BIT)));
NVIC_DisableIRQ(SLEEP_IRQn);
RTC->CTRL &= ~(RTC_ENABLE | RTC_INT_ENABLE | RTC_CNT_CYCLE_ENABLE);
RTC->CNT_TICK = 0;
RTC->CNT_DATE = 0;
return 0;
}
return EIO;
}
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@@ -1,375 +0,0 @@
/*
* Copyright (C) 2015-2017 Alibaba Group Holding Limited.
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include <stdio.h>
#include "panic_mpu.h"
#ifdef STAR_MPU_ENABLE
typedef struct {
unsigned long start;
unsigned long size;
//unsigned long mpusize;
} mem_region_t;
void mpu_enable(void);
void mpu_disable(void);
static void mpu_config_region(MPU_Region_Init_t *init);
//static unsigned int size_to_mpusize(unsigned int size);
/*
* Func: mpu is valid in mcu
* IN : none
* Out : 0 -- valid; 1 -- invalid
* */
static unsigned int mpu_is_valid(void)
{
return (((MPU->type) & MPU_TYPE_DREGION_MASK) == 0) ? 1: 0;
}
void mpu_enable(void)
{
MPU->ctrl = MPU_CTRL_PRIVDEFENA_MASK|MPU_CTRL_ENABLE_MASK ;
/* Enable memory manage fault */
*(SHCSR_M) |= (1<<16);
__asm volatile("DSB");
__asm volatile("ISB");
__asm volatile("DMB");
}
void mpu_disable(void)
{
MPU->ctrl = 0U;
__asm volatile("DSB");
__asm volatile("ISB");
__asm volatile("DMB");
}
static void enable_region(mem_region_t *region, int rng_no,
int subregion_disable, int ext_type,
int access_permission, int disable_exec,
int shareable, int cacheable, int bufferable)
{
MPU_Region_Init_t init = {0};
init.range_no = rng_no;
init.base_addr = region->start;
init.size = region->size;
init.subregion_disable = subregion_disable;
init.ext_type = ext_type;
init.access_permission = access_permission;
init.disable_exec = disable_exec;
init.shareable = shareable;
init.cacheable = cacheable;
init.bufferable = bufferable;
init.enable = 1;
mpu_config_region(&init);
}
static void mpu_config_region(MPU_Region_Init_t *init)
{
MPU->rnr = init->range_no;
if (init->enable == 1)
{
if (init->cacheable == 0)
{
MPU->rbar = init->base_addr | (ACCESS_PERMISSIONS_RW << AP_OFFSET);
MPU->rlar = init->base_addr | init->size | (init->range_no << ATTR_INDEX_OFFSET) | REGION_ENABLE ;
if(init->range_no <4)
{
MPU->mair0 |= 0x44 << (init->range_no * 8);
//printf("%08x,%08x,%08x\n",MPU->rbar,MPU->rlar,MPU->mair0);
}
else
{
MPU->mair1 |= 0x44 << ((init->range_no -4) * 8);
//printf("%08x,%08x,%08x\n",MPU->rbar,MPU->rlar,MPU->mair1);
}
}
}
else
{
MPU->rbar = 0;
MPU->rlar = 0;
MPU->mair0 = 0;
}
__asm volatile("DSB");
__asm volatile("ISB");
__asm volatile("DMB");
}
static void mpu_set(unsigned long addr, unsigned long size, unsigned int mode,
unsigned int cacheable, unsigned int rnr)
{
mem_region_t region;
region.start = addr;
region.size = size;
mpu_disable();
enable_region(&region, rnr, 0, 0, mode, 0, 0, cacheable,0);
mpu_enable();
}
static unsigned int mpu_check(unsigned long addr, unsigned long size)
{
if ((size < 0x20) || (size > 0x80000000)) {
printf("mpu region size error\r\n");
return 1;
}
if (mpu_is_valid() != 0) {
printf("error:no mpu in mcu\r\n");
return 1;
}
return 0;
}
/**
* set mpu region for memory unauthorized access check
*
* @param[in] addr_start monitor start addr
* @param[in] addr_size monitor size
* @param[in] mode prohibit access (0) or read only(>0)
*/
void debug_memory_access_err_check(unsigned long addr_start, unsigned long addr_size,
unsigned int mode,unsigned int cacheable,unsigned int rnr)
{
unsigned int mpu_region_type;
if (mpu_check(addr_start, addr_size) != 0)
return;
//if ((addr_start % addr_size) != 0)
// addr_start = (addr_start + (addr_size - 1)) & ~(addr_size - 1);
if (mode > 0) {
mpu_region_type = MPU_AP_RO_NA;
} else
mpu_region_type = MPU_AP_NA_NA;
mpu_set(addr_start, addr_size, mpu_region_type,cacheable,rnr);
}
void mpu_init(void)
{
//wifi non-cacheable region
debug_memory_access_err_check(0x60000000, 0x8000, MPU_AP_NA_NA, 0, 0);
debug_memory_access_err_check(0x60800000, 0x17FFFE0, MPU_AP_NA_NA, 0, 1);
//ble non-cacheable region
debug_memory_access_err_check(0x62000000, 0x7FFFFE0, MPU_AP_NA_NA, 0, 2);
debug_memory_access_err_check(0x40000000, 0xFFFE0, MPU_AP_NA_NA, 0, 3);
debug_memory_access_err_check(0x21000000, 0x17FE0, MPU_AP_NA_NA, 0, 4);
}
#else //STAR_MPU_ENABLE
typedef struct {
unsigned long start;
unsigned long size;
unsigned long mpusize;
} mem_region_t;
#if (DEBUG_CONFIG_PANIC > 0)
static void mpu_enable(void);
static void mpu_disable(void);
static void mpu_config_region(MPU_Region_Init_t *init);
static unsigned int size_to_mpusize(unsigned int size);
/*
* Func: mpu is valid in mcu
* IN : none
* Out : 0 -- valid; 1 -- invalid
* */
static unsigned int mpu_is_valid(void)
{
return ((MPU->type) & MPU_TYPE_DREGION_MASK == 0) ? 1: 0;
}
static void mpu_enable(void)
{
MPU->ctrl = MPU_CTRL_ENABLE_MASK | MPU_CTRL_PRIVDEFENA_MASK;
/* Enable memory manage fault */
*(SHCSR_M) |= (1<<16);
OS_DSB();
OS_ISB();
OS_DMB();
}
static void mpu_disable(void)
{
MPU->ctrl = 0U;
OS_DSB();
OS_ISB();
OS_DMB();
}
static void enable_region(mem_region_t *region, int rng_no,
int subregion_disable, int ext_type,
int access_permission, int disable_exec,
int shareable, int cacheable, int bufferable)
{
MPU_Region_Init_t init;
init.range_no = rng_no;
init.base_addr = region->start;
init.size = region->mpusize;
init.subregion_disable = subregion_disable;
init.ext_type = ext_type;
init.access_permission = access_permission;
init.disable_exec = disable_exec;
init.shareable = shareable;
init.cacheable = cacheable;
init.bufferable = bufferable;
init.enable = 1;
mpu_config_region(&init);
}
static void mpu_config_region(MPU_Region_Init_t *init)
{
MPU->rnr = init->range_no;
if (init->enable) {
MPU->rbar = init->base_addr;
MPU->rasr = (init->disable_exec << MPU_RASR_XN_OFFSET
| init->access_permission << MPU_RASR_AP_OFFSET
| init->ext_type << MPU_RASR_TEX_OFFSET
| init->shareable << MPU_RASR_S_OFFSET
| init->cacheable << MPU_RASR_C_OFFSET
| init->bufferable << MPU_RASR_B_OFFSET
| init->subregion_disable << MPU_RASR_SRD_OFFSET
| init->size << MPU_RASR_SIZE_OFFSET
| init->enable << MPU_RASR_ENABLE_OFFSET);
} else {
MPU->rbar = 0;
MPU->rasr = 0;
}
OS_DSB();
OS_ISB();
OS_DMB();
}
static unsigned int size_to_mpusize(unsigned int size)
{
switch (size) {
case 0x20: return MPU_REGION_SIZE_32B;
case 0x40: return MPU_REGION_SIZE_64B;
case 0x80: return MPU_REGION_SIZE_128B;
case 0x100: return MPU_REGION_SIZE_256B;
case 0x200: return MPU_REGION_SIZE_512B;
case 0x400: return MPU_REGION_SIZE_1KB;
case 0x800: return MPU_REGION_SIZE_2KB;
case 0x1000: return MPU_REGION_SIZE_4KB;
case 0x2000: return MPU_REGION_SIZE_8KB;
case 0x4000: return MPU_REGION_SIZE_16KB;
case 0x8000: return MPU_REGION_SIZE_32KB;
case 0x10000: return MPU_REGION_SIZE_64KB;
case 0x20000: return MPU_REGION_SIZE_128KB;
case 0x40000: return MPU_REGION_SIZE_256KB;
case 0x80000: return MPU_REGION_SIZE_512KB;
case 0x100000: return MPU_REGION_SIZE_1MB;
case 0x200000: return MPU_REGION_SIZE_2MB;
case 0x400000: return MPU_REGION_SIZE_4MB;
case 0x800000: return MPU_REGION_SIZE_8MB;
case 0x1000000: return MPU_REGION_SIZE_16MB;
case 0x2000000: return MPU_REGION_SIZE_32MB;
case 0x4000000: return MPU_REGION_SIZE_64MB;
case 0x8000000: return MPU_REGION_SIZE_128MB;
case 0x10000000: return MPU_REGION_SIZE_256MB;
case 0x20000000: return MPU_REGION_SIZE_512MB;
case 0x40000000: return MPU_REGION_SIZE_1GB;
case 0x80000000: return MPU_REGION_SIZE_2GB;
default: return 0;
}
}
static void mpu_set(unsigned long addr, unsigned long size, unsigned int mode)
{
mem_region_t region;
region.start = addr;
region.size = size;
region.mpusize = size_to_mpusize(region.size);
mpu_disable();
enable_region(&region, 0, 0, 0, mode, 0, 0, 1, 1);
mpu_enable();
}
static unsigned int mpu_check(unsigned long addr, unsigned long size)
{
if ((size < 0x20) || (size > 0x80000000)) {
printf("mpu region size error\r\n");
return 1;
}
if (mpu_is_valid() != 0) {
printf("error:no mpu in mcu\r\n");
return 1;
}
return 0;
}
/**
* set mpu region for memory unauthorized access check
*
* @param[in] addr_start monitor start addr
* @param[in] addr_size monitor size
* @param[in] mode prohibit access (0) or read only(>0)
*/
void debug_memory_access_err_check(unsigned long addr_start, unsigned long addr_size, unsigned int mode)
{
unsigned int mpu_region_type;
if (mpu_check(addr_start, addr_size) != 0)
return;
if ((addr_start % addr_size) != 0)
addr_start = (addr_start + (addr_size - 1)) & ~(addr_size - 1);
if (mode > 0) {
mpu_region_type = MPU_AP_RO_NA;
} else
mpu_region_type = MPU_AP_NA_NA;
mpu_set(addr_start, addr_size, mpu_region_type);
}
#endif
#endif //STAR_MPU_ENABLE
@@ -1,82 +0,0 @@
/*
* Copyright (c) 2022 ASR Microelectronics (Shanghai) Co., Ltd. All rights reserved.
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "sys.h"
//////////////////////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////////////////////
__asm void WFI_SET(void)
{
WFI;
}
__asm void INTX_DISABLE(void)
{
CPSID I
BX LR
}
__asm void INTX_ENABLE(void)
{
CPSIE I
BX LR
}
__asm void MSR_MSP(u32 addr)
{
MSR MSP, r0 //set Main Stack value
BX r14
}
// below code is for no need to select microlib
#if 0
#pragma import(__use_no_semihosting)
//׼Ҫֺ֧
struct __FILE
{
int handle;
};
FILE __stdout;
//_sys_exit()Աʹðģʽ
void _sys_exit(int x)
{
x = x;
}
//ضfputc
int fputc(int ch, FILE *f)
{
while((USART1->SR&0X40)==0);//ѭ
USART1->DR = (u8) ch;
return ch;
}
#endif
@@ -1,52 +0,0 @@
/*
* Copyright (c) 2022 ASR Microelectronics (Shanghai) Co., Ltd. All rights reserved.
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "duet_cm4.h"
#include "core_cm4.h"
uint32_t system_bus_clk = SYSTEM_BUS_CLOCK_INIT;
uint32_t system_core_clk = SYSTEM_CORE_CLOCK_INIT;
void duet_system_reset(void)
{
//disable irq when reboot
__disable_irq();
#ifdef HIGHFREQ_MCU160_SUPPORT
if(system_core_clk == SYSTEM_CORE_CLOCK_HIGH)
duet_clk_sel_low();
#endif
NVIC_SystemReset();
}
void SystemInit(void)
{
/* FPU settings ------------------------------------------------------------*/
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
#endif
}
void SystemCoreClockUpdate(void)
{
}
/********END OF FILE ***********/
@@ -1,185 +0,0 @@
/*
* Copyright (c) 2022 ASR Microelectronics (Shanghai) Co., Ltd. All rights reserved.
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "systick_delay.h"
#ifdef ALIOS_SUPPORT
#include <stdio.h>
#include <k_config.h>
#include <k_err.h>
#include <k_sys.h>
#include <k_time.h>
#define SYSTICK_AMEND 1
#ifdef SYSTICK_AMEND
#include "duet_timer.h"
#endif
#elif defined HARMONYOS_SUPPORT
#include <stdio.h>
#define SYSTICK_AMEND 1
#ifdef SYSTICK_AMEND
#include "duet_timer.h"
#endif
#else
#include "FreeRTOS.h"
#include "task.h"
#endif
//////////////////////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////////////////////
static u8 fac_us=0;
static u16 fac_ms=0;
#if defined ALIOS_SUPPORT || defined HARMONYOS_SUPPORT
#ifdef SYSTICK_AMEND
#define SYSTICK_AMEND_MAX_TIME 50000 //ms
duet_timer_dev_t tim={0};
sys_time_t sys_time=0;
volatile uint32_t sys_timer1_cnt = 0;
void timer1_callback(void)
{
sys_timer1_cnt++;
}
#endif
void SysTick_Handler(void)
{
#ifdef ALIOS_SUPPORT
krhino_intrpt_enter();
krhino_tick_proc();
#endif
#ifdef SYSTICK_AMEND
#ifdef ALIOS_SUPPORT
sys_time = krhino_sys_tick_get();
#else
#endif
if(sys_time == 1)//first time, init timer
{
tim.port=1;
tim.config.period = SYSTICK_AMEND_MAX_TIME*1000;//50s
tim.config.reload_mode = TIMER_RELOAD_AUTO;
tim.config.cb = timer1_callback;
duet_timer_init(&tim);
duet_timer_start(&tim);
}
else
{//check hw time
uint64_t passed_time = SYSTICK_AMEND_MAX_TIME*(sys_timer1_cnt+1) - duet_timer_get(&tim)/1000;
while(passed_time > sys_time){
krhino_tick_proc();
passed_time -= 1;
}
}
#endif
#ifdef ALIOS_SUPPORT
krhino_intrpt_exit();
#endif
}
uint32_t duet_systick_csr_get()
{
uint32_t ul_systick_ctrl;
ul_systick_ctrl = SysTick->CTRL;
return ul_systick_ctrl;
}
void duet_systick_csr_set(uint32_t ctrl)
{
SysTick->CTRL = ctrl;
}
void delay_init(u8 SYSCLK)
{
u32 reload;
//SysTick_CLKSourceConfig(SysTick_CLKSource_HCLK);
fac_us=SYSCLK;
reload=SYSCLK;
reload= reload*1000000/1000;
fac_ms=1000/1000;
SysTick->CTRL|=SysTick_CTRL_TICKINT_Msk;
SysTick->LOAD=reload;
SysTick->CTRL|=SysTick_CTRL_ENABLE_Msk;
}
#else
extern void xPortSysTickHandler(void);
void SysTick_Handler(void)
{
if(xTaskGetSchedulerState()!=taskSCHEDULER_NOT_STARTED)
{
xPortSysTickHandler();
}
}
void delay_init(u8 SYSCLK)
{
u32 reload;
//SysTick_CLKSourceConfig(SysTick_CLKSource_HCLK);
fac_us=SYSCLK;
reload=SYSCLK;
reload= reload*1000000/configTICK_RATE_HZ;
fac_ms=1000/configTICK_RATE_HZ;
SysTick_Config(reload);
}
#endif
void delay_us(u32 nus)
{
u32 ticks;
u32 told,tnow,tcnt=0;
u32 reload=SysTick->LOAD;
ticks=nus*fac_us;
told=SysTick->VAL;
while(1)
{
tnow=SysTick->VAL;
if(tnow!=told)
{
if(tnow<told)tcnt+=told-tnow;
else tcnt+=reload-tnow+told;
told=tnow;
if(tcnt>=ticks)break;
}
};
}
#ifndef ALIOS_SUPPORT
void delay_ms(u32 nms)
{
if(xTaskGetSchedulerState()!=taskSCHEDULER_NOT_STARTED)
{
if(nms>=fac_ms)
{
vTaskDelay(nms/fac_ms);
}
nms%=fac_ms;
}
delay_us((u32)(nms*1000));
}
#endif
void delay_xms(u32 nms)
{
u32 i;
for(i=0;i<nms;i++) delay_us(1000);
}
-5
View File
@@ -19,11 +19,6 @@ config("public") {
kernel_module("asr_hal") {
sources = [
"src/hw.c",
"src/uart.c",
"src/flash.c",
"src/wdg.c",
"src/rng.c",
"src/wifi_adapter.c",
]
}
-22
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@@ -1,22 +0,0 @@
/*
* Copyright (C) 2015-2017 Alibaba Group Holding Limited.
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef _LEGA_HW_H_
#define _LEGA_HW_H_
extern void hal_reboot(void);
extern void hw_start_hal(void);
#endif //_LEGA_HW_H_
-64
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@@ -1,64 +0,0 @@
/*
* Copyright (C) 2015-2017 Alibaba Group Holding Limited.
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef HAL_WDG_H
#define HAL_WDG_H
#ifdef __cplusplus
extern "C" {
#endif
#include <stdint.h>
typedef struct {
uint32_t timeout; /* Watchdag timeout */
} wdg_config_t;
typedef struct {
uint8_t port; /* wdg port */
wdg_config_t config; /* wdg config */
void *priv; /* priv data */
} wdg_dev_t;
/**
* This function will initialize the on board CPU hardware watch dog
*
* @param[in] wdg the watch dog device
*
* @return 0 : on success, EIO : if an error occurred with any step
*/
int32_t hal_wdg_init(wdg_dev_t *wdg);
/**
* Reload watchdog counter.
*
* @param[in] wdg the watch dog device
*/
void hal_wdg_reload(wdg_dev_t *wdg);
/**
* This function performs any platform-specific cleanup needed for hardware watch dog.
*
* @param[in] wdg the watch dog device
*
* @return 0 : on success, EIO : if an error occurred with any step
*/
int32_t hal_wdg_finalize(wdg_dev_t *wdg);
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* HAL_WDG_H */
-189
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@@ -1,189 +0,0 @@
/*
* Copyright (c) 2022 ASR Microelectronics (Shanghai) Co., Ltd. All rights reserved.
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include <stdio.h>
#include <stdint.h>
#ifdef ALIOS_SUPPORT
#include "lega_rhino.h"
#else
#include "lega_rtos.h"
#endif
#include "duet_flash.h"
#include "flash.h"
#include "board.h"
#include "duet_common.h"
/**
* Get the infomation of the specified flash area
*
* @param[in] in_partition The target flash logical partition
*
* @return HAL_logi_partition struct
*/
hal_logic_partition_t *hal_flash_get_info(hal_partition_t in_partition)
{
hal_logic_partition_t *logic_partition;
logic_partition = (hal_logic_partition_t *)&hal_partitions[ in_partition ];
return logic_partition;
}
/**
* Erase an area on a Flash logical partition
*
* @note Erase on an address will erase all data on a sector that the
* address is belonged to, this function does not save data that
* beyond the address area but in the affected sector, the data
* will be lost.
*
* @param[in] in_partition The target flash logical partition which should be erased
* @param[in] off_set Start address of the erased flash area
* @param[in] size Size of the erased flash area
*
* @return 0 : On success, EIO : If an error occurred with any step
*/
int32_t hal_flash_erase(hal_partition_t in_partition, uint32_t off_set, uint32_t size)
{
int32_t ret;
lega_rtos_declare_critical();
lega_enter_critical_expble();
ret = duet_flash_erase((int)(in_partition), off_set, size);
lega_exit_critical_expble();
return ret;
}
/**
* Write data to an area on a flash logical partition without erase
*
* @param[in] in_partition The target flash logical partition which should be read which should be written
* @param[in] off_set Point to the start address that the data is written to, and
* point to the last unwritten address after this function is
* returned, so you can call this function serval times without
* update this start address.
* @param[in] inBuffer point to the data buffer that will be written to flash
* @param[in] inBufferLength The length of the buffer
*
* @return 0 : On success, EIO : If an error occurred with any step
*/
int32_t hal_flash_write(hal_partition_t in_partition, uint32_t *off_set,
const void *in_buf, uint32_t in_buf_len)
{
int32_t ret;
lega_rtos_declare_critical();
lega_enter_critical_expble();
ret = duet_flash_write((int)(in_partition), off_set, in_buf, in_buf_len);
lega_exit_critical_expble();
return ret;
}
int32_t hal_flash_write_saved(hal_partition_t in_partition, uint32_t *off_set,
const void *in_buf, uint32_t in_buf_len)
{
int32_t ret;
lega_rtos_declare_critical();
lega_enter_critical_expble();
ret = duet_flash_write_saved((int)(in_partition), off_set, in_buf, in_buf_len);
lega_exit_critical_expble();
return ret;
}
/**
* Write data to an area on a flash logical partition with erase first
*
* @param[in] in_partition The target flash logical partition which should be read which should be written
* @param[in] off_set Point to the start address that the data is written to, and
* point to the last unwritten address after this function is
* returned, so you can call this function serval times without
* update this start address.
* @param[in] inBuffer point to the data buffer that will be written to flash
* @param[in] inBufferLength The length of the buffer
*
* @return 0 : On success, EIO : If an error occurred with any step
*/
int32_t hal_flash_erase_write(hal_partition_t in_partition, uint32_t *off_set,
const void *in_buf, uint32_t in_buf_len)
{
int32_t ret;
lega_rtos_declare_critical();
lega_enter_critical_expble();
ret = duet_flash_erase_write((int)(in_partition), off_set, in_buf, in_buf_len);
lega_exit_critical_expble();
return ret;
}
/**
* Read data from an area on a Flash to data buffer in RAM
*
* @param[in] in_partition The target flash logical partition which should be read
* @param[in] off_set Point to the start address that the data is read, and
* point to the last unread address after this function is
* returned, so you can call this function serval times without
* update this start address.
* @param[in] outBuffer Point to the data buffer that stores the data read from flash
* @param[in] inBufferLength The length of the buffer
*
* @return 0 : On success, EIO : If an error occurred with any step
*/
int32_t hal_flash_read(hal_partition_t in_partition, uint32_t *off_set,
void *out_buf, uint32_t in_buf_len)
{
return duet_flash_read((int)(in_partition), off_set, out_buf, in_buf_len);
}
/**
* Set security options on a logical partition
*
* @param[in] partition The target flash logical partition
* @param[in] offset Point to the start address that the data is read, and
* point to the last unread address after this function is
* returned, so you can call this function serval times without
* update this start address.
* @param[in] size Size of enabled flash area
*
* @return 0 : On success, EIO : If an error occurred with any step
*/
int32_t hal_flash_enable_secure(hal_partition_t partition, uint32_t off_set, uint32_t size)
{
return duet_flash_enable_secure((int)(partition), off_set, size);
}
/**
* Disable security options on a logical partition
*
* @param[in] partition The target flash logical partition
* @param[in] offset Point to the start address that the data is read, and
* point to the last unread address after this function is
* returned, so you can call this function serval times without
* update this start address.
* @param[in] size Size of disabled flash area
*
* @return 0 : On success, EIO : If an error occurred with any step
*/
int32_t hal_flash_dis_secure(hal_partition_t partition, uint32_t off_set, uint32_t size)
{
return duet_flash_dis_secure((int)(partition), off_set, size);
}
-148
View File
@@ -1,148 +0,0 @@
/*
* Copyright (c) 2022 ASR Microelectronics (Shanghai) Co., Ltd. All rights reserved.
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include <stdio.h>
#include <stdint.h>
#include "duet_cm4.h"
#include "duet_gpio.h"
#include "aos/hal/gpio.h"
/**
* Initialises a GPIO pin
*
* @note Prepares a GPIO pin for use.
*
* @param[in] gpio the gpio pin which should be initialised
* @param[in] configuration A structure containing the required gpio configuration
*
* @return 0 : on success, EIO : if an error occurred with any step
*/
int32_t hal_gpio_init(gpio_dev_t *gpio)
{
return duet_gpio_init((duet_gpio_dev_t *)gpio);
}
/**
* Sets an output GPIO pin high
*
* @note Using this function on a gpio pin which is set to input mode is undefined.
*
* @param[in] gpio the gpio pin which should be set high
*
* @return 0 : on success, EIO : if an error occurred with any step
*/
int32_t hal_gpio_output_high(gpio_dev_t *gpio)
{
return duet_gpio_output_high((duet_gpio_dev_t *)gpio);
}
/**
* Sets an output GPIO pin low
*
* @note Using this function on a gpio pin which is set to input mode is undefined.
*
* @param[in] gpio the gpio pin which should be set low
*
* @return 0 : on success, EIO : if an error occurred with any step
*/
int32_t hal_gpio_output_low(gpio_dev_t *gpio)
{
return duet_gpio_output_low((duet_gpio_dev_t *)gpio);
}
/**
* Trigger an output GPIO pin's output. Using this function on a
* gpio pin which is set to input mode is undefined.
*
* @param[in] gpio the gpio pin which should be set low
*
* @return 0 : on success, EIO : if an error occurred with any step
*/
int32_t hal_gpio_output_toggle(gpio_dev_t *gpio)
{
return duet_gpio_output_toggle((duet_gpio_dev_t *)gpio);
}
/**
* Get the state of an input GPIO pin. Using this function on a
* gpio pin which is set to output mode will return an undefined value.
*
* @param[in] gpio the gpio pin which should be read
* @param[in] value gpio value
*
* @return 0 : on success, EIO : if an error occurred with any step
*/
int32_t hal_gpio_input_get(gpio_dev_t *gpio, uint32_t *value)
{
return duet_gpio_input_get((duet_gpio_dev_t *)gpio, value);
}
/**
* Enables an interrupt trigger for an input GPIO pin.
* Using this function on a gpio pin which is set to
* output mode is undefined.
*
* @param[in] gpio the gpio pin which will provide the interrupt trigger
* @param[in] trigger the type of trigger (rising/falling edge)
* @param[in] handler a function pointer to the interrupt handler
* @param[in] arg an argument that will be passed to the interrupt handler
*
* @return 0 : on success, EIO : if an error occurred with any step
*/
int32_t hal_gpio_enable_irq(gpio_dev_t *gpio, gpio_irq_trigger_t trigger,
gpio_irq_handler_t handler, void *arg)
{
return duet_gpio_enable_irq((duet_gpio_dev_t *)gpio, trigger, handler, arg);
}
/**
* Disables an interrupt trigger for an input GPIO pin.
* Using this function on a gpio pin which has not been set up
* using @ref hal_gpio_input_irq_enable is undefined.
*
* @param[in] gpio the gpio pin which provided the interrupt trigger
*
* @return 0 : on success, EIO : if an error occurred with any step
*/
int32_t hal_gpio_disable_irq(gpio_dev_t *gpio)
{
return duet_gpio_disable_irq((duet_gpio_dev_t *)gpio);
}
/**
* Disables an interrupt trigger for an input GPIO pin.
* Using this function on a gpio pin which has not been set up
* using @ref hal_gpio_input_irq_enable is undefined.
*
* @param[in] gpio the gpio pin which provided the interrupt trigger
*
* @return 0 : on success, EIO : if an error occurred with any step
*/
int32_t hal_gpio_clear_irq(gpio_dev_t *gpio)
{
return duet_gpio_clear_irq((duet_gpio_dev_t *)gpio);
}
/**
* Set a GPIO pin in default state.
*
* @param[in] gpio the gpio pin which should be deinitialised
*
* @return 0 : on success, EIO : if an error occurred with any step
*/
int32_t hal_gpio_finalize(gpio_dev_t *gpio)
{
return duet_gpio_finalize((duet_gpio_dev_t *)gpio);
}
-33
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@@ -1,33 +0,0 @@
/*
* Copyright (c) 2022 ASR Microelectronics (Shanghai) Co., Ltd. All rights reserved.
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include <stdio.h>
#include "duet_cm4.h"
#include "board.h"
#include "system_cm4.h"
void hal_reboot(void)
{
duet_system_reset();
}
void hw_start_hal(void)
{
printf("start-----------hal\n");
}
void HAL_NVIC_SystemReset(void)
{
}
-241
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@@ -1,241 +0,0 @@
/*
* Copyright (c) 2022 ASR Microelectronics (Shanghai) Co., Ltd. All rights reserved.
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include <stdio.h>
#include <stdint.h>
#include "duet_cm4.h"
#include "duet_i2c.h"
#include "hal/soc/soc.h"
#include "lega_rhino.h"
lega_semaphore_t g_duet_i2c_sem[DUET_I2C_NUM];
lega_queue_t g_duet_i2c_queue[DUET_I2C_NUM];
char *g_duet_i2c_queue_name[DUET_I2C_NUM] =
{
"duet_i2c0_queue",
"duet_i2c1_queue"
};
void hal_i2c0_slv_tx_callback(void)
{
lega_rtos_set_semaphore(&g_duet_i2c_sem[I2C_DEVICE0]);
}
void hal_i2c0_slv_rx_callback(uint8_t data)
{
lega_rtos_push_to_queue(&g_duet_i2c_queue[I2C_DEVICE0],&data,LEGA_NEVER_TIMEOUT);
}
void hal_i2c1_slv_tx_callback(void)
{
lega_rtos_set_semaphore(&g_duet_i2c_sem[I2C_DEVICE1]);
}
void hal_i2c1_slv_rx_callback(uint8_t data)
{
lega_rtos_push_to_queue(&g_duet_i2c_queue[I2C_DEVICE1],&data,LEGA_NEVER_TIMEOUT);
}
/**
* Initialises an I2C interface
* Prepares an I2C hardware interface for communication as a master or slave
*
* @param[in] i2c the device for which the i2c port should be initialised
*
* @return 0 : on success, EIO : if an error occurred during initialisation
*/
int32_t hal_i2c_init(i2c_dev_t *i2c)
{
int32_t ret;
ret = duet_i2c_init((duet_i2c_dev_t *)i2c);
if(!ret && (I2C_MODE_SLAVE == i2c->config.mode))
{
ret = lega_rtos_init_semaphore(&g_duet_i2c_sem[i2c->port], 0);
if(!ret)
{
ret = lega_rtos_init_queue(&g_duet_i2c_queue[i2c->port],g_duet_i2c_queue_name[i2c->port],1,I2C_BUF_QUEUE_SIZE);
}
}
return ret;
}
/**
* I2c master send
*
* @param[in] i2c the i2c device
* @param[in] dev_addr device address
* @param[in] data i2c send data
* @param[in] size i2c send data size
* @param[in] timeout timeout in milisecond, set this value to HAL_WAIT_FOREVER
* if you want to wait forever
*
* @return 0 : on success, EIO : if an error occurred during initialisation
*/
int32_t hal_i2c_master_send(i2c_dev_t *i2c, uint16_t dev_addr, const uint8_t *data,
uint16_t size, uint32_t timeout)
{
return duet_i2c_master_send((duet_i2c_dev_t *)i2c, dev_addr, data, size, timeout);
}
/**
* I2c master recv
*
* @param[in] i2c the i2c device
* @param[in] dev_addr device address
* @param[out] data i2c receive data
* @param[in] size i2c receive data size
* @param[in] timeout timeout in milisecond, set this value to HAL_WAIT_FOREVER
* if you want to wait forever
*
* @return 0 : on success, EIO : if an error occurred during initialisation
*/
int32_t hal_i2c_master_recv(i2c_dev_t *i2c, uint16_t dev_addr, uint8_t *data,
uint16_t size, uint32_t timeout)
{
return duet_i2c_master_recv((duet_i2c_dev_t *)i2c, dev_addr, data, size, timeout);
}
/**
* I2c slave send
*
* @param[in] i2c the i2c device
* @param[in] data i2c slave send data
* @param[in] size i2c slave send data size
* @param[in] timeout timeout in milisecond, set this value to HAL_WAIT_FOREVER
* if you want to wait forever
*
* @return 0 : on success, EIO : if an error occurred during initialisation
*/
int32_t hal_i2c_slave_send(i2c_dev_t *i2c, const uint8_t *data, uint16_t size, uint32_t timeout)
{
uint16_t i = 0;
int32_t ret;
if((NULL == i2c) || (NULL == data) || (0 == size))
{
return -1;
}
if(HAL_WAIT_FOREVER == timeout)
{
timeout = LEGA_NEVER_TIMEOUT;
}
while(i < size)
{
if(!lega_rtos_get_semaphore(&g_duet_i2c_sem[i2c->port], timeout))
{
ret = duet_i2c_tx_data((duet_i2c_dev_t *)i2c, data[i++]);
if(ret)
{
return ret;
}
}
}
return 0;
}
/**
* I2c slave receive
*
* @param[in] i2c tthe i2c device
* @param[out] data i2c slave receive data
* @param[in] size i2c slave receive data size
* @param[in] timeout timeout in milisecond, set this value to HAL_WAIT_FOREVER
* if you want to wait forever
*
* @return 0 : on success, EIO : if an error occurred during initialisation
*/
int32_t hal_i2c_slave_recv(i2c_dev_t *i2c, uint8_t *data, uint16_t size, uint32_t timeout)
{
uint16_t i = 0;
int32_t ret;
if((NULL == i2c) || (NULL == data))
{
return -1;
}
if(i2c->port >= DUET_I2C_NUM)
{
return -1;
}
if(HAL_WAIT_FOREVER == timeout)
{
timeout = LEGA_NEVER_TIMEOUT;
}
while(i < size)
{
ret = lega_rtos_pop_from_queue(&g_duet_i2c_queue[i2c->port],(data+i++),timeout);
if(ret)
{
return ret;
}
}
return 0;
}
/**
* I2c mem write
*
* @param[in] i2c the i2c device
* @param[in] dev_addr device address
* @param[in] mem_addr mem address
* @param[in] mem_addr_size mem address
* @param[in] data i2c master send data
* @param[in] size i2c master send data size
* @param[in] timeout timeout in milisecond, set this value to HAL_WAIT_FOREVER
* if you want to wait forever
*
* @return 0 : on success, EIO : if an error occurred during initialisation
*/
int32_t hal_i2c_mem_write(i2c_dev_t *i2c, uint16_t dev_addr, uint16_t mem_addr,
uint16_t mem_addr_size, const uint8_t *data, uint16_t size,
uint32_t timeout)
{
return duet_i2c_mem_write((duet_i2c_dev_t *)i2c, dev_addr, mem_addr, mem_addr_size, data, size, timeout);
}
/**
* I2c master mem read
*
* @param[in] i2c the i2c device
* @param[in] dev_addr device address
* @param[in] mem_addr mem address
* @param[in] mem_addr_size mem address
* @param[out] data i2c master send data
* @param[in] size i2c master send data size
* @param[in] timeout timeout in milisecond, set this value to HAL_WAIT_FOREVER
* if you want to wait forever
*
* @return 0 : on success, EIO : if an error occurred during initialisation
*/
int32_t hal_i2c_mem_read(i2c_dev_t *i2c, uint16_t dev_addr, uint16_t mem_addr,
uint16_t mem_addr_size, uint8_t *data, uint16_t size,
uint32_t timeout)
{
return duet_i2c_mem_read((duet_i2c_dev_t *)i2c, dev_addr, mem_addr, mem_addr_size, data, size, timeout);
}
/**
* Deinitialises an I2C device
*
* @param[in] i2c the i2c device
*
* @return 0 : on success, EIO : if an error occurred during deinitialisation
*/
int32_t hal_i2c_finalize(i2c_dev_t *i2c)
{
return duet_i2c_finalize((duet_i2c_dev_t *)i2c);
}
-86
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@@ -1,86 +0,0 @@
/*
* Copyright (c) 2022 ASR Microelectronics (Shanghai) Co., Ltd. All rights reserved.
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include <stdio.h>
#include <stdint.h>
#include "duet_cm4.h"
#include "duet_pwm.h"
#include "pwm.h"
/**
* Initialises a PWM pin
*
*
* @param[in] pwm the PWM device
*
* @return 0 : on success, EIO : if an error occurred with any step
*/
int32_t hal_pwm_init(pwm_dev_t *pwm)
{
return duet_pwm_init((duet_pwm_dev_t *)pwm);
}
/**
* Starts Pulse-Width Modulation signal output on a PWM pin
*
* @param[in] pwm the PWM device
*
* @return 0 : on success, EIO : if an error occurred with any step
*/
int32_t hal_pwm_start(pwm_dev_t *pwm)
{
return duet_pwm_start((duet_pwm_dev_t *)pwm);
}
/**
* Stops output on a PWM pin
*
* @param[in] pwm the PWM device
*
* @return 0 : on success, EIO : if an error occurred with any step
*/
int32_t hal_pwm_stop(pwm_dev_t *pwm)
{
return duet_pwm_stop((duet_pwm_dev_t *)pwm);
}
/**
* change the para of pwm
*
* @param[in] pwm the PWM device
* @param[in] para the para of pwm
*
* @return 0 : on success, EIO : if an error occurred with any step
*/
int32_t hal_pwm_para_chg(pwm_dev_t *pwm, pwm_config_t para)
{
duet_pwm_config_t duet_para;
duet_para.duty_cycle = para.duty_cycle;
duet_para.freq = para.freq;
return duet_pwm_para_chg((duet_pwm_dev_t *)pwm, duet_para);
}
/**
* De-initialises an PWM interface, Turns off an PWM hardware interface
*
* @param[in] pwm the interface which should be de-initialised
*
* @return 0 : on success, EIO : if an error occurred with any step
*/
int32_t hal_pwm_finalize(pwm_dev_t *pwm)
{
return duet_pwm_finalize((duet_pwm_dev_t *)pwm);
}
-56
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@@ -1,56 +0,0 @@
/*
* Copyright (c) 2022 ASR Microelectronics (Shanghai) Co., Ltd. All rights reserved.
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include <stdio.h>
#include <stdlib.h>
#include <stdint.h>
#include <string.h>
#include "lega_rnd.h"
#include "lega_hw_common.h"
#ifdef ALIOS_SUPPORT
#include "lega_rhino.h"
#else
#include "lega_rtos.h"
#endif
int32_t hal_random_num_read(void *random, void *buf, int32_t bytes)
{
uint8_t rndTest_AddInputData[16] = {0}; //the lenth <= 48 and a multiple of 4.
uint8_t *rand_dat_ptr = NULL;
int32_t ret = 0;
if ((bytes > 0xFFFF) || (buf == NULL))
return -1; //error
rand_dat_ptr = (uint8_t *) buf;
memset(rand_dat_ptr, 0, bytes);
lega_rnd_init();
ret = lega_RND_AddAdditionalInput(rndContext_ptr, rndTest_AddInputData, sizeof(rndTest_AddInputData));
if (ret != LEGA_HW_OK)
{
ret = -1;
goto RAND_NUM_READ_FAIL;
}
ret = lega_RND_Reseeding(rndContext_ptr, rndWorkBuff_ptr);
if (ret != LEGA_HW_OK)
{
ret = -1;
goto RAND_NUM_READ_FAIL;
}
ret = lega_RND_GenerateVector(rndContext_ptr, bytes, rand_dat_ptr);
if (ret != LEGA_HW_OK)
ret = -1;
RAND_NUM_READ_FAIL:
lega_rnd_deinit();
return ret;
}
-71
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/*
* Copyright (c) 2022 ASR Microelectronics (Shanghai) Co., Ltd. All rights reserved.
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include <stdio.h>
#include <stdint.h>
#include "duet_cm4.h"
#include "duet_rtc.h"
#include "rtc.h"
/**
* This function will initialize the on board CPU real time clock
*
*
* @param[in] rtc rtc device
*
* @return 0 : on success, EIO : if an error occurred with any step
*/
int32_t hal_rtc_init(rtc_dev_t *rtc)
{
return duet_rtc_init((duet_rtc_dev_t *)rtc);
}
/**
* This function will return the value of time read from the on board CPU real time clock.
*
* @param[in] rtc rtc device
* @param[out] time pointer to a time structure
*
* @return 0 : on success, EIO : if an error occurred with any step
*/
int32_t hal_rtc_get_time(rtc_dev_t *rtc, rtc_time_t *time)
{
return duet_rtc_get_time((duet_rtc_dev_t *)rtc, (duet_rtc_time_t *)time);
}
/**
* This function will set MCU RTC time to a new value.
*
* @param[in] rtc rtc device
* @param[out] time pointer to a time structure
*
* @return 0 : on success, EIO : if an error occurred with any step
*/
int32_t hal_rtc_set_time(rtc_dev_t *rtc, const rtc_time_t *time)
{
return duet_rtc_set_time((duet_rtc_dev_t *)rtc, (duet_rtc_time_t *)time);
}
/**
* De-initialises an RTC interface, Turns off an RTC hardware interface
*
* @param[in] RTC the interface which should be de-initialised
*
* @return 0 : on success, EIO : if an error occurred with any step
*/
int32_t hal_rtc_finalize(rtc_dev_t *rtc)
{
return duet_rtc_finalize((duet_rtc_dev_t *)rtc);
}
-68
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@@ -1,68 +0,0 @@
/*
* Copyright (c) 2022 ASR Microelectronics (Shanghai) Co., Ltd. All rights reserved.
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include <stdio.h>
#include <stdint.h>
#include "duet_cm4.h"
#include "duet_timer.h"
#include "timer.h"
/**
* init a hardware timer
*
* @param[in] tim timer device
*
* @return 0 : on success, EIO : if an error occurred with any step
*/
int32_t hal_timer_init(timer_dev_t *tim)
{
return duet_timer_init((duet_timer_dev_t *)tim);
}
/**
* start a hardware timer
*
* @param[in] tim timer device
*
* @return 0 : on success, EIO : if an error occurred with any step
*/
int32_t hal_timer_start(timer_dev_t *tim)
{
return duet_timer_start((duet_timer_dev_t *)tim);
}
/**
* stop a hardware timer
*
* @param[in] tim timer device
*
* @return none
*/
void hal_timer_stop(timer_dev_t *tim)
{
return duet_timer_stop((duet_timer_dev_t *)tim);
}
/**
* De-initialises an TIMER interface, Turns off an TIMER hardware interface
*
* @param[in] tim timer device
*
* @return 0 : on success, EIO : if an error occurred with any step
*/
int32_t hal_timer_finalize(timer_dev_t *tim)
{
return duet_timer_finalize((duet_timer_dev_t *)tim);
}
-272
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@@ -1,272 +0,0 @@
/*
* Copyright (c) 2022 ASR Microelectronics (Shanghai) Co., Ltd. All rights reserved.
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include <stdint.h>
#ifdef ALIOS_SUPPORT
#include "lega_rhino.h"
#else
#include "lega_rtos.h"
#endif
#include "duet_pinmux.h"
#include "duet_uart.h"
#include "uart.h"
#include "board.h"
#define HAL_UART_BUF_QUEUE_BYTES 256
lega_queue_t hal_uart_buf_queue[UART_NUM];
char * hal_uart_buf_queue_name[UART_NUM] =
{
"uart0_buffer_queue",
"uart1_buffer_queue",
"uart2_buffer_queue"
};
void hal_uart0_callback_handler(char ch)
{
lega_rtos_push_to_queue(&hal_uart_buf_queue[UART0_INDEX], &ch, LEGA_NEVER_TIMEOUT);
}
void hal_uart1_callback_handler(char ch)
{
lega_rtos_push_to_queue(&hal_uart_buf_queue[UART1_INDEX], &ch, LEGA_NEVER_TIMEOUT);
}
void hal_uart2_callback_handler(char ch)
{
lega_rtos_push_to_queue(&hal_uart_buf_queue[UART2_INDEX], &ch, LEGA_NEVER_TIMEOUT);
}
void set_uart_pinmux(uint8_t uart_idx,uint8_t hw_flow_control)
{
switch(uart_idx){
case UART0_INDEX:
duet_pinmux_config(PAD0,PF_UART0);
duet_pinmux_config(PAD1,PF_UART0);
if(hw_flow_control){
duet_pinmux_config(PAD6,PF_UART0);
duet_pinmux_config(PAD7,PF_UART0);
}
break;
case UART1_INDEX:
duet_pinmux_config(PAD2,PF_UART1);
duet_pinmux_config(PAD3,PF_UART1);
if(hw_flow_control){
duet_pinmux_config(PAD14,PF_UART1);
duet_pinmux_config(PAD15,PF_UART1);
}
break;
case UART2_INDEX:
duet_pinmux_config(PAD12,PF_UART2);
duet_pinmux_config(PAD13,PF_UART2);
if(hw_flow_control){
duet_pinmux_config(PAD10,PF_UART2);
duet_pinmux_config(PAD11,PF_UART2);
}
break;
default:
break;
}
}
/**
* Initialises a UART interface
*
*
* @param[in] uart the interface which should be initialised
*
* @return 0 : on success, EIO : if an error occurred with any step
*/
int32_t hal_uart_init(uart_dev_t *uart)
{
if(!uart) return -1;
if(uart->port == PORT_UART_STD){
uart->port = UART1_INDEX;
// uart->priv = (void *)(hal_uart1_callback_handler);
}
else if(uart->port == PORT_UART_TEMP){
uart->port = UART0_INDEX;
}
set_uart_pinmux(uart->port,uart->config.flow_control);
duet_uart_init((duet_uart_dev_t *)uart);
// lega_rtos_init_queue(&hal_uart_buf_queue[uart->port], hal_uart_buf_queue_name[uart->port], sizeof(char), HAL_UART_BUF_QUEUE_BYTES);
return 0;
}
int32_t hal_uart_send(uart_dev_t *uart, const void *data, uint32_t size, uint32_t timeout)
{
uint32_t i=0;
if(NULL == uart){
return -1;
}
/*logic port to physical port*/
if(uart->port == PORT_UART_STD){
uart->port = UART1_INDEX;
uart->priv = (void *)(hal_uart1_callback_handler);
}
else if(uart->port == PORT_UART_TEMP){
uart->port = UART0_INDEX;
}
return duet_uart_send((duet_uart_dev_t *)uart, data, size, timeout);
}
/**
* Receive data on a UART interface
*
* @param[in] uart the UART interface
* @param[out] data pointer to the buffer which will store incoming data
* @param[in] expect_size number of bytes to receive
* @param[in] timeout timeout in milisecond, set this value to HAL_WAIT_FOREVER
* if you want to wait forever
*
* @return 0 : on success, EIO : if an error occurred with any step
*/
int32_t hal_uart_recv(uart_dev_t *uart, void *data, uint32_t expect_size, uint32_t timeout)
{
int i = 0;
int32_t ret;
uint8_t *pdata = (uint8_t *)data;
if((uart == NULL) || (data == NULL))
{
return -1;
}
/*logic port to physical port*/
if(uart->port == PORT_UART_STD){
uart->port = UART1_INDEX;
uart->priv = (void *)(hal_uart1_callback_handler);
}
else if(uart->port == PORT_UART_TEMP){
uart->port = UART0_INDEX;
}
for (i = 0; i < expect_size; i++)
{
ret = lega_rtos_pop_from_queue(&hal_uart_buf_queue[uart->port], &pdata[i], timeout);
if(ret)
{
return -1;
}
}
return 0;
}
int32_t UartGetc()
{
UART_TypeDef* UARTx = getUartxViaIdx(UART1_INDEX);
/* wait till rx fifo is not empty */
if( duet_uart_get_flag_status(UARTx, UART_FLAG_RX_FIFO_EMPTY) == SET)
return 0;
else
return UARTx->DR;
}
/**
* Receive data on a UART interface
*
* @param[in] uart the UART interface
* @param[out] data pointer to the buffer which will store incoming data
* @param[in] expect_size number of bytes to receive
* @param[out] recv_size number of bytes received
* @param[in] timeout timeout in milisecond, set this value to HAL_WAIT_FOREVER
* if you want to wait forever
*
* @return 0 : on success, EIO : if an error occurred with any step
*/
int32_t hal_uart_recv_II(uart_dev_t *uart, void *data, uint32_t expect_size,
uint32_t *recv_size, uint32_t timeout)
{
uint8_t *pdata = (uint8_t *)data;
int i = 0;
uint32_t rx_count = 0;
int32_t ret;
if((uart == NULL) || (data == NULL))
{
return -1;
}
/*logic port to physical port*/
if(uart->port == PORT_UART_STD){
uart->port = UART1_INDEX;
uart->priv = (void *)(hal_uart1_callback_handler);
}
else if(uart->port == PORT_UART_TEMP){
uart->port = UART0_INDEX;
}
for (i = 0; i < expect_size; i++)
{
ret = lega_rtos_pop_from_queue(&hal_uart_buf_queue[uart->port], &pdata[i], timeout);
if(!ret)
{
rx_count++;
}
else
{
*recv_size = rx_count;
return ret;
}
}
if(recv_size)
{
*recv_size = rx_count;
}
if(rx_count != 0)
{
return 0;
}
else
{
return -1;
}
}
/**
* Deinitialises a UART interface
*
* @param[in] uart the interface which should be deinitialised
*
* @return 0 : on success, EIO : if an error occurred with any step
*/
int32_t hal_uart_finalize(uart_dev_t *uart)
{
int32_t ret;
if(NULL == uart){
return -1;
}
/*logic port to physical port*/
if(uart->port == PORT_UART_STD){
uart->port = UART1_INDEX;
uart->priv = (void *)(hal_uart1_callback_handler);
}
else if(uart->port == PORT_UART_TEMP){
uart->port = UART0_INDEX;
}
ret = lega_rtos_deinit_queue(&hal_uart_buf_queue[uart->port]);
if(!ret)
{
duet_uart_finalize((duet_uart_dev_t *)uart);
}
else
{
return ret;
}
}
-55
View File
@@ -1,55 +0,0 @@
/*
* Copyright (c) 2022 ASR Microelectronics (Shanghai) Co., Ltd. All rights reserved.
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include <stdio.h>
#include <stdint.h>
#include "duet_cm4.h"
#include "duet_wdg.h"
#include "wdg.h"
/**
* This function will initialize the on board CPU hardware watch dog
*
* @param[in] wdg the watch dog device
*
* @return 0 : on success, EIO : if an error occurred with any step
*/
int32_t hal_wdg_init(wdg_dev_t *wdg)
{
return duet_wdg_init((duet_wdg_dev_t *)wdg);
}
/**
* Reload watchdog counter.
*
* @param[in] wdg the watch dog device
*/
void hal_wdg_reload(wdg_dev_t *wdg)
{
return duet_wdg_reload((duet_wdg_dev_t *)wdg);
}
/**
* This function performs any platform-specific cleanup needed for hardware watch dog.
*
* @param[in] wdg the watch dog device
*
* @return 0 : on success, EIO : if an error occurred with any step
*/
int32_t hal_wdg_finalize(wdg_dev_t *wdg)
{
return duet_wdg_finalize((duet_wdg_dev_t *)wdg);
}
+2 -2
View File
@@ -442,7 +442,7 @@ WifiErrorCode RemoveDevice(int networkId)
return WIFI_SUCCESS;
}
#if 0
void lalala_sta_device_config_set(void)
{
WifiDeviceConfig config;
@@ -453,7 +453,7 @@ void lalala_sta_device_config_set(void)
AddDeviceConfig(&config, &result);
RemoveDevice(result);
}
#endif
WifiErrorCode ConnectTo(int networkId)
{
lega_wlan_init_type_t init_param = {0};
Executable → Regular
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