mirror of
https://github.com/openharmony/device_soc_asrmicro.git
synced 2026-07-01 22:34:00 -04:00
fix code check white space error
Signed-off-by: zipper1956 <zipper1956@hotmail.com>
This commit is contained in:
@@ -34,7 +34,7 @@ int HalFileOpen(const char *path, int oflag, int mode)
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duet_kv_key = path;
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if (oflag & O_CREAT_FS) {
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return 0; //new item
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return 0; // new item
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}
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retval = HalFileRead(0, temp, 128);
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@@ -62,7 +62,7 @@ int HalFileRead(int fd, char *buf, unsigned int len)
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if (retval == KV_OK) {
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return (templen - 1);
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}
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//printf("kv error %d\n",retval);
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// printf("kv error %d\n",retval);
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return EC_FAILURE;
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}
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@@ -31,4 +31,4 @@ typedef enum {
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PORT_UART_INVALID = 255
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} PORT_UART_TYPE;
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#endif //__BOARD__H__
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#endif // __BOARD__H__
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@@ -85,7 +85,7 @@ void macChar2Value(uint8_t *chars, uint8_t *mac, bool colon)
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d3 = char2HexValue(chars[9]) * 16 + char2HexValue(chars[10]);
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d4 = char2HexValue(chars[12]) * 16 + char2HexValue(chars[13]);
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d5 = char2HexValue(chars[15]) * 16 + char2HexValue(chars[16]);
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mac[0] = d5;//MAC in stack should reverse with Real MAC
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mac[0] = d5; // MAC in stack should reverse with Real MAC
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mac[1] = d4;
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mac[2] = d3;
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mac[3] = d2;
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@@ -98,7 +98,7 @@ void macChar2Value(uint8_t *chars, uint8_t *mac, bool colon)
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d3 = char2HexValue(chars[6]) * 16 + char2HexValue(chars[7]);
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d4 = char2HexValue(chars[8]) * 16 + char2HexValue(chars[9]);
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d5 = char2HexValue(chars[10]) * 16 + char2HexValue(chars[11]);
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mac[0] = d5;//MAC in stack should reverse with Real MAC
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mac[0] = d5; // MAC in stack should reverse with Real MAC
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mac[1] = d4;
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mac[2] = d3;
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mac[3] = d2;
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@@ -218,7 +218,7 @@ int atcmdplus_uuid(int argc, char **argv)
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int atcmdplus_discovery(int argc, char **argv)
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{
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uint8_t conidx = char2HexValue(argv[PARA_ID_1][0]);
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sonata_ble_gatt_disc_all_svc(conidx);//--->app_gatt_disc_svc_callback()
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sonata_ble_gatt_disc_all_svc(conidx); // --->app_gatt_disc_svc_callback()
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return CONFIG_OK;
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}
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@@ -227,7 +227,7 @@ int atcmdplus_lesend(int argc, char **argv)
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apcmdplue_print_command(argc, argv);
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uint8_t conidx = char2HexValue(argv[PARA_ID_1][0]);
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uint16_t dataLen = char2HexValue(argv[PARA_ID_2][0]); //Todo only support 1 char now.
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uint16_t dataLen = char2HexValue(argv[PARA_ID_2][0]); // Todo only support 1 char now.
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uint8_t *data = (uint8_t *)argv[PARA_ID_3];
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app_ble_master_write_data(conidx, dataLen, data);
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return CONFIG_OK;
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@@ -51,4 +51,4 @@
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*/
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void atcmdplus_ble_register(void);
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#endif //MEDIA_ATCMDPULS_BLE_H
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#endif // MEDIA_ATCMDPULS_BLE_H
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@@ -38,7 +38,7 @@
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#if (LOSCFG_KERNEL_PRINTF != 0)
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#define TASKLIST_SUPPORT
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#define HEAPSHOW_SUPPORT
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//LOS_TaskInfoMonitor
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// LOS_TaskInfoMonitor
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#endif
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#define LEGA_AT_VERSION "AT-V2.1.3"
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@@ -94,8 +94,8 @@ typedef enum {
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} lega_at_rsp_status_t;
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typedef struct {
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char *command; /*at cmd string*/
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int (*function)(int argc, char **argv); /*at cmd proccess function*/
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char *command; /* at cmd string */
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int (*function)(int argc, char **argv); /* at cmd proccess function */
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} lega_at_cmd_entry;
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#ifdef CFG_SDIO_SUPPORT
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@@ -165,5 +165,5 @@ extern int printf2(const char *format, ...);
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#define at_rspinfor(Fmt, ...) printf2(Fmt "\r\n", ## __VA_ARGS__)
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#define at_rspinfornn(Fmt, ...) printf2(Fmt, ## __VA_ARGS__)
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#endif //_LEGA_AT_API_H_
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#endif // _LEGA_AT_API_H_
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@@ -61,14 +61,14 @@
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#define APP_TRC printf
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#else
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#define APP_TRC(...)
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#endif //APP_DBG
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#endif // APP_DBG
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#define APP_DBG_ERROR 1
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#if APP_DBG_ERROR
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#define APP_TRC_ERROR printf
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#else
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#define APP_TRC_ERROR(...)
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#endif //APP_DBG_HIGH
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#endif // APP_DBG_HIGH
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/*
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* ENUMERATIONS
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****************************************************************************************
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@@ -83,7 +83,7 @@
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#define KEY_LEN 0x10
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enum app_connect_state {
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///Connection succeeded
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/// Connection succeeded
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APP_STATE_CONNECTED = 0,
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// Link is disconnected
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APP_STATE_DISCONNECTED,
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@@ -210,7 +210,7 @@ typedef enum {
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*/
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extern sonata_ble_hook_t app_hook;
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///app Core Event indicate Callback
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/// app Core Event indicate Callback
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typedef int (*app_core_evt_ind_cb)(app_core_evt_ind_t evt, void *p_param);
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typedef int (*app_sec_req_cb)(uint8_t *addr);
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@@ -232,7 +232,7 @@ typedef struct app_uuid_t {
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} app_uuids;
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typedef struct actives_t {
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uint8_t assign_id ;
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uint8_t type;//A0:Adv A1:Scan A2:Peer
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uint8_t type; // A0:Adv A1:Scan A2:Peer
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bool runing;
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uint8_t peer[SONATA_GAP_BD_ADDR_LEN];
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uint8_t name[20];
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@@ -46,7 +46,7 @@
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#define CRITICAL_FUNC_SEG __attribute__((section("seg_critical_function")))
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#else
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#define CRITICAL_FUNC_SEG
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#endif //CFG_SEG
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#endif // CFG_SEG
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// ARM is a 32-bit CPU
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#define CPU_WORD_SIZE 4
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@@ -57,9 +57,9 @@
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// debug configuration
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#if defined(CFG_DBG)
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#define PLF_DEBUG 1
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#else //CFG_DBG
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#else // CFG_DBG
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#define PLF_DEBUG 0
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#endif //CFG_DBG
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#endif // CFG_DBG
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// NVDS configuration
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#ifdef CFG_NVDS
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@@ -229,7 +229,7 @@ extern void (*pf_sonata_assert_warn)(uint16_t id, int param0, int param1);
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// DUMP data array present in the SW.
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#define DUMP_DATA(data, length)
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#endif //PLF_DEBUG
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#endif // PLF_DEBUG
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// required to define GLOBAL_INT_** macros as inline assembly. This file is included after
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// definition of ASSERT macros as they are used inside ll.h
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@@ -245,7 +245,7 @@ int rtos_get_semaphore(void **semaphore, uint32_t timeout_ms);
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/* Set (post/put/increment) a semaphore */
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int rtos_set_semaphore(void **semaphore);
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#endif //(SONATA_RTOS_SUPPORT)
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#endif // (SONATA_RTOS_SUPPORT)
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// @} DRIVERS
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#endif // _ARCH_H_
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@@ -48,10 +48,10 @@ typedef struct {
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uint8_t at_scan; /* scan flag which indicate call by at task */
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uint8_t sta_connected; /* indicate status of station is connected */
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uint8_t sap_opend; /* indicate status of softap is open done */
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//ip_addr_t at_ping; /* save ping ip addr for at cmd */
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char ip[16]; /* Local IP address on the target wlan interface, ASCII*/
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// ip_addr_t at_ping; /* save ping ip addr for at cmd */
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char ip[16]; /* Local IP address on the target wlan interface, ASCII */
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char gw[16]; /* Router IP address on the target wlan interface, ASCII */
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char mask[16]; /* Netmask on the target wlan interface, ASCII*/
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char mask[16]; /* Netmask on the target wlan interface, ASCII */
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} at_user_info_s;
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typedef enum {
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@@ -66,8 +66,8 @@ typedef enum {
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} at_rsp_status_t;
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typedef struct {
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char *command; /*at cmd string*/
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int (*function)(int argc, char **argv); /*at cmd proccess function*/
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char *command; /* at cmd string */
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int (*function)(int argc, char **argv); /* at cmd proccess function */
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} at_cmd_entry;
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int at_init(void);
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void at_command_process_ble(void);
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@@ -125,5 +125,5 @@ extern char at_dbgflg;
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#define at_rspinfor(Fmt, ...) at_printf(Fmt "\r\n", ## __VA_ARGS__)
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#define at_rspinfornn(Fmt, ...) at_printf(Fmt, ## __VA_ARGS__)
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#endif //_AT_API_H_
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#endif // _AT_API_H_
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@@ -67,10 +67,10 @@
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#define PRI (SONATA_PERM(RI, ENABLE))
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/** * @brief Minimum advertising interval.The range is from 0x0020 to 0x4000. */
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#define BLE_MCRC_MIN_INTERVAL 192//(0x01E0)
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/*0.3s*//** * @brief Maximum advertising interval.The range is from 0x0020 to 0x4000 and should be greater than the minimum advertising interval. */
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#define BLE_MCRC_MAX_INTERVAL 192//(0x01E0)
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/*0.3s*//** * @brief Advertising channel map */
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#define BLE_MCRC_MIN_INTERVAL 192 // (0x01E0)
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/* 0.3s *//** * @brief Maximum advertising interval.The range is from 0x0020 to 0x4000 and should be greater than the minimum advertising interval. */
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#define BLE_MCRC_MAX_INTERVAL 192 // (0x01E0)
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/* 0.3s *//** * @brief Advertising channel map */
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#define MS_BLE_CHANNEL_NUM (7)
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/** * @brief Advertising filter policy */
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#define MS_BLE_FILTER_POLICY (0)
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@@ -123,14 +123,14 @@ typedef struct BLE_ADV_PARAM_T {
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} ble_adv_param_t;
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typedef struct BLE_ADV_DATA_T {
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uint8_t ble_advdata[32]; /*!< ??????*/
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uint8_t ble_advdataLen; /*!< ??????*/
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uint8_t ble_advdata[32]; /* !< ?????? */
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uint8_t ble_advdataLen; /* !< ?????? */
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} ble_adv_data_t;
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typedef struct BLE_SCAN_DATA_T {
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uint8_t ble_respdata[32]; /*!< ??????????*/
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uint8_t ble_respdataLen; /*!< ??????????*/
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uint8_t ble_respdata[32]; /* !< ?????????? */
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uint8_t ble_respdataLen; /* !< ?????????? */
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} ble_scan_data_t;
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@@ -154,10 +154,10 @@ typedef struct BLE_ADV_ENABLE_T {
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typedef enum MS_BLE_STACK_EVENT_T {
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MS_BLE_STACK_EVENT_STACK_READY = 0,
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MS_BLE_STACK_EVENT_STACK_FAIL,
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MS_BLE_STACK_EVENT_ADV_ON, /*!< ???????????г??*/
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MS_BLE_STACK_EVENT_ADV_OFF, /*!< ???????????г??*/
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MS_BLE_STACK_EVENT_ADV_ON, /* !< ???????????г?? */
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MS_BLE_STACK_EVENT_ADV_OFF, /* !< ???????????г?? */
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MS_BLE_STACK_EVENT_DISCONNECT, /* !< ?????? */
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MS_BLE_STACK_EVENT_CONNECTED, /*!< ??????*/
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MS_BLE_STACK_EVENT_CONNECTED, /* !< ?????? */
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} ms_ble_stack_event_t;
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typedef void (*ble_gatt_service_att_wirte_cb)(uint8_t *data, uint16_t size);
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@@ -47,7 +47,7 @@
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#define SONATA_API_TASK_TRC printf
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#else
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#define SONATA_API_TASK_TRC(...)
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#endif //SONATA_API_TASK_DBG
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#endif // SONATA_API_TASK_DBG
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/*
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* ENUM DEFINITIONS
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@@ -109,5 +109,5 @@ extern const sonata_api_subtask_handlers_t *p_prf_otas_api_ke_msg_handlers;
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extern const sonata_api_subtask_handlers_t *p_prf_hogpd_api_ke_msg_handlers;
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extern const sonata_api_subtask_handlers_t *p_prf_hogprh_api_ke_msg_handlers;
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#endif //_SONATA_API_TASK_H_
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#endif // _SONATA_API_TASK_H_
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@@ -236,7 +236,7 @@ enum {
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SONATA_ATT_SVC_MESH_PROVISIONING = SONATA_ATT_UUID_16(0x1827),
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/// Mesh Proxy Service
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SONATA_ATT_SVC_MESH_PROXY = SONATA_ATT_UUID_16(0x1828),
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///OTA Service
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/// OTA Service
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SONATA_ATT_SVC_OTA = SONATA_ATT_UUID_16(0x1850),
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/*------------------- UNITS ---------------------*/
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@@ -244,215 +244,215 @@ enum {
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SONATA_ATT_UNIT_UNITLESS = SONATA_ATT_UUID_16(0x2700),
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/// Length Unit - Metre
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SONATA_ATT_UNIT_METRE = SONATA_ATT_UUID_16(0x2701),
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///Mass unit - Kilogram
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/// Mass unit - Kilogram
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SONATA_ATT_UNIT_KG = SONATA_ATT_UUID_16(0x2702),
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///Time unit - second
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/// Time unit - second
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SONATA_ATT_UNIT_SECOND = SONATA_ATT_UUID_16(0x2703),
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///Electric current unit - Ampere
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/// Electric current unit - Ampere
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SONATA_ATT_UNIT_AMPERE = SONATA_ATT_UUID_16(0x2704),
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///Thermodynamic Temperature unit - Kelvin
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/// Thermodynamic Temperature unit - Kelvin
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SONATA_ATT_UNIT_KELVIN = SONATA_ATT_UUID_16(0x2705),
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/// Amount of substance unit - mole
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SONATA_ATT_UNIT_MOLE = SONATA_ATT_UUID_16(0x2706),
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///Luminous intensity unit - candela
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/// Luminous intensity unit - candela
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SONATA_ATT_UNIT_CANDELA = SONATA_ATT_UUID_16(0x2707),
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///Area unit - square metres
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/// Area unit - square metres
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SONATA_ATT_UNIT_SQ_METRE = SONATA_ATT_UUID_16(0x2710),
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///Colume unit - cubic metres
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/// Colume unit - cubic metres
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SONATA_ATT_UNIT_CUBIC_METRE = SONATA_ATT_UUID_16(0x2710),
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///Velocity unit - metres per second
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/// Velocity unit - metres per second
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SONATA_ATT_UNIT_METRE_PER_SECOND = SONATA_ATT_UUID_16(0x2711),
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///Acceleration unit - metres per second squared
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/// Acceleration unit - metres per second squared
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SONATA_ATT_UNIT_METRES_PER_SEC_SQ = SONATA_ATT_UUID_16(0x2712),
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///Wavenumber unit - reciprocal metre
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/// Wavenumber unit - reciprocal metre
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SONATA_ATT_UNIT_RECIPROCAL_METRE = SONATA_ATT_UUID_16(0x2713),
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///Density unit - kilogram per cubic metre
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/// Density unit - kilogram per cubic metre
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SONATA_ATT_UNIT_DENS_KG_PER_CUBIC_METRE = SONATA_ATT_UUID_16(0x2714),
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///Surface density unit - kilogram per square metre
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/// Surface density unit - kilogram per square metre
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SONATA_ATT_UNIT_KG_PER_SQ_METRE = SONATA_ATT_UUID_16(0x2715),
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///Specific volume unit - cubic metre per kilogram
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/// Specific volume unit - cubic metre per kilogram
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SONATA_ATT_UNIT_CUBIC_METRE_PER_KG = SONATA_ATT_UUID_16(0x2716),
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///Current density unit - ampere per square metre
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/// Current density unit - ampere per square metre
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SONATA_ATT_UNIT_AMPERE_PER_SQ_METRE = SONATA_ATT_UUID_16(0x2717),
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///Magnetic field strength unit - Ampere per metre
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/// Magnetic field strength unit - Ampere per metre
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SONATA_ATT_UNIT_AMPERE_PER_METRE = SONATA_ATT_UUID_16(0x2718),
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///Amount concentration unit - mole per cubic metre
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/// Amount concentration unit - mole per cubic metre
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SONATA_ATT_UNIT_MOLE_PER_CUBIC_METRE = SONATA_ATT_UUID_16(0x2719),
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///Mass Concentration unit - kilogram per cubic metre
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/// Mass Concentration unit - kilogram per cubic metre
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SONATA_ATT_UNIT_MASS_KG_PER_CUBIC_METRE = SONATA_ATT_UUID_16(0x271A),
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///Luminance unit - candela per square metre
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/// Luminance unit - candela per square metre
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SONATA_ATT_UNIT_CANDELA_PER_SQ_METRE = SONATA_ATT_UUID_16(0x271B),
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///Refractive index unit
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/// Refractive index unit
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SONATA_ATT_UNIT_REFRACTIVE_INDEX = SONATA_ATT_UUID_16(0x271C),
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///Relative permeability unit
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/// Relative permeability unit
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SONATA_ATT_UNIT_RELATIVE_PERMEABILITY = SONATA_ATT_UUID_16(0x271D),
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///Plane angle unit - radian
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/// Plane angle unit - radian
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SONATA_ATT_UNIT_RADIAN = SONATA_ATT_UUID_16(0x2720),
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///Solid angle unit - steradian
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/// Solid angle unit - steradian
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SONATA_ATT_UNIT_STERADIAN = SONATA_ATT_UUID_16(0x2721),
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///Frequency unit - Hertz
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/// Frequency unit - Hertz
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SONATA_ATT_UNIT_HERTZ = SONATA_ATT_UUID_16(0x2722),
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///Force unit - Newton
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/// Force unit - Newton
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SONATA_ATT_UNIT_NEWTON = SONATA_ATT_UUID_16(0x2723),
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///Pressure unit - Pascal
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/// Pressure unit - Pascal
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SONATA_ATT_UNIT_PASCAL = SONATA_ATT_UUID_16(0x2724),
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///Energy unit - Joule
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/// Energy unit - Joule
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SONATA_ATT_UNIT_JOULE = SONATA_ATT_UUID_16(0x2725),
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///Power unit - Watt
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/// Power unit - Watt
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SONATA_ATT_UNIT_WATT = SONATA_ATT_UUID_16(0x2726),
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///electric Charge unit - Coulomb
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/// electric Charge unit - Coulomb
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SONATA_ATT_UNIT_COULOMB = SONATA_ATT_UUID_16(0x2727),
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///Electric potential difference - Volt
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/// Electric potential difference - Volt
|
||||
SONATA_ATT_UNIT_VOLT = SONATA_ATT_UUID_16(0x2728),
|
||||
///Capacitance unit - Farad
|
||||
/// Capacitance unit - Farad
|
||||
SONATA_ATT_UNIT_FARAD = SONATA_ATT_UUID_16(0x2729),
|
||||
///electric resistance unit - Ohm
|
||||
/// electric resistance unit - Ohm
|
||||
SONATA_ATT_UNIT_OHM = SONATA_ATT_UUID_16(0x272A),
|
||||
///Electric conductance - Siemens
|
||||
/// Electric conductance - Siemens
|
||||
SONATA_ATT_UNIT_SIEMENS = SONATA_ATT_UUID_16(0x272B),
|
||||
///Magnetic flux unit - Weber
|
||||
/// Magnetic flux unit - Weber
|
||||
SONATA_ATT_UNIT_WEBER = SONATA_ATT_UUID_16(0x272C),
|
||||
///Magnetic flux density unit - Tesla
|
||||
/// Magnetic flux density unit - Tesla
|
||||
SONATA_ATT_UNIT_TESLA = SONATA_ATT_UUID_16(0x272D),
|
||||
///Inductance unit - Henry
|
||||
/// Inductance unit - Henry
|
||||
SONATA_ATT_UNIT_HENRY = SONATA_ATT_UUID_16(0x272E),
|
||||
///Temperature unit - degree Celsius
|
||||
/// Temperature unit - degree Celsius
|
||||
SONATA_ATT_UNIT_CELSIUS = SONATA_ATT_UUID_16(0x272F),
|
||||
///Luminous flux unit - lumen
|
||||
/// Luminous flux unit - lumen
|
||||
SONATA_ATT_UNIT_LUMEN = SONATA_ATT_UUID_16(0x2730),
|
||||
///Illuminance unit - lux
|
||||
/// Illuminance unit - lux
|
||||
SONATA_ATT_UNIT_LUX = SONATA_ATT_UUID_16(0x2731),
|
||||
///Activity referred to a radionuclide unit - becquerel
|
||||
/// Activity referred to a radionuclide unit - becquerel
|
||||
SONATA_ATT_UNIT_BECQUEREL = SONATA_ATT_UUID_16(0x2732),
|
||||
///Absorbed dose unit - Gray
|
||||
/// Absorbed dose unit - Gray
|
||||
SONATA_ATT_UNIT_GRAY = SONATA_ATT_UUID_16(0x2733),
|
||||
///Dose equivalent unit - Sievert
|
||||
/// Dose equivalent unit - Sievert
|
||||
SONATA_ATT_UNIT_SIEVERT = SONATA_ATT_UUID_16(0x2734),
|
||||
///Catalytic activity unit - Katal
|
||||
/// Catalytic activity unit - Katal
|
||||
SONATA_ATT_UNIT_KATAL = SONATA_ATT_UUID_16(0x2735),
|
||||
///Synamic viscosity unit - Pascal second
|
||||
/// Synamic viscosity unit - Pascal second
|
||||
SONATA_ATT_UNIT_PASCAL_SECOND = SONATA_ATT_UUID_16(0x2740),
|
||||
///Moment of force unit - Newton metre
|
||||
/// Moment of force unit - Newton metre
|
||||
SONATA_ATT_UNIT_NEWTON_METRE = SONATA_ATT_UUID_16(0x2741),
|
||||
///surface tension unit - Newton per metre
|
||||
/// surface tension unit - Newton per metre
|
||||
SONATA_ATT_UNIT_NEWTON_PER_METRE = SONATA_ATT_UUID_16(0x2742),
|
||||
///Angular velocity unit - radian per second
|
||||
/// Angular velocity unit - radian per second
|
||||
SONATA_ATT_UNIT_RADIAN_PER_SECOND = SONATA_ATT_UUID_16(0x2743),
|
||||
///Angular acceleration unit - radian per second squared
|
||||
/// Angular acceleration unit - radian per second squared
|
||||
SONATA_ATT_UNIT_RADIAN_PER_SECOND_SQ = SONATA_ATT_UUID_16(0x2744),
|
||||
///Heat flux density unit - Watt per square metre
|
||||
/// Heat flux density unit - Watt per square metre
|
||||
SONATA_ATT_UNIT_WSONATA_ATT_PER_SQ_METRE = SONATA_ATT_UUID_16(0x2745),
|
||||
///HEat capacity unit - Joule per Kelvin
|
||||
/// HEat capacity unit - Joule per Kelvin
|
||||
SONATA_ATT_UNIT_JOULE_PER_KELVIN = SONATA_ATT_UUID_16(0x2746),
|
||||
///Specific heat capacity unit - Joule per kilogram kelvin
|
||||
/// Specific heat capacity unit - Joule per kilogram kelvin
|
||||
SONATA_ATT_UNIT_JOULE_PER_KG_KELVIN = SONATA_ATT_UUID_16(0x2747),
|
||||
///Specific Energy unit - Joule per kilogram
|
||||
/// Specific Energy unit - Joule per kilogram
|
||||
SONATA_ATT_UNIT_JOULE_PER_KG = SONATA_ATT_UUID_16(0x2748),
|
||||
///Thermal conductivity - Watt per metre Kelvin
|
||||
/// Thermal conductivity - Watt per metre Kelvin
|
||||
SONATA_ATT_UNIT_WSONATA_ATT_PER_METRE_KELVIN = SONATA_ATT_UUID_16(0x2749),
|
||||
///Energy Density unit - joule per cubic metre
|
||||
/// Energy Density unit - joule per cubic metre
|
||||
SONATA_ATT_UNIT_JOULE_PER_CUBIC_METRE = SONATA_ATT_UUID_16(0x274A),
|
||||
///Electric field strength unit - volt per metre
|
||||
/// Electric field strength unit - volt per metre
|
||||
SONATA_ATT_UNIT_VOLT_PER_METRE = SONATA_ATT_UUID_16(0x274B),
|
||||
///Electric charge density unit - coulomb per cubic metre
|
||||
/// Electric charge density unit - coulomb per cubic metre
|
||||
SONATA_ATT_UNIT_COULOMB_PER_CUBIC_METRE = SONATA_ATT_UUID_16(0x274C),
|
||||
///Surface charge density unit - coulomb per square metre
|
||||
/// Surface charge density unit - coulomb per square metre
|
||||
SONATA_ATT_UNIT_SURF_COULOMB_PER_SQ_METRE = SONATA_ATT_UUID_16(0x274D),
|
||||
///Electric flux density unit - coulomb per square metre
|
||||
/// Electric flux density unit - coulomb per square metre
|
||||
SONATA_ATT_UNIT_FLUX_COULOMB_PER_SQ_METRE = SONATA_ATT_UUID_16(0x274E),
|
||||
///Permittivity unit - farad per metre
|
||||
/// Permittivity unit - farad per metre
|
||||
SONATA_ATT_UNIT_FARAD_PER_METRE = SONATA_ATT_UUID_16(0x274F),
|
||||
///Permeability unit - henry per metre
|
||||
/// Permeability unit - henry per metre
|
||||
SONATA_ATT_UNIT_HENRY_PER_METRE = SONATA_ATT_UUID_16(0x2750),
|
||||
///Molar energy unit - joule per mole
|
||||
/// Molar energy unit - joule per mole
|
||||
SONATA_ATT_UNIT_JOULE_PER_MOLE = SONATA_ATT_UUID_16(0x2751),
|
||||
///Molar entropy unit - joule per mole kelvin
|
||||
/// Molar entropy unit - joule per mole kelvin
|
||||
SONATA_ATT_UNIT_JOULE_PER_MOLE_KELVIN = SONATA_ATT_UUID_16(0x2752),
|
||||
///Exposure unit - coulomb per kilogram
|
||||
/// Exposure unit - coulomb per kilogram
|
||||
SONATA_ATT_UNIT_COULOMB_PER_KG = SONATA_ATT_UUID_16(0x2753),
|
||||
///Absorbed dose rate unit - gray per second
|
||||
/// Absorbed dose rate unit - gray per second
|
||||
SONATA_ATT_UNIT_GRAY_PER_SECOND = SONATA_ATT_UUID_16(0x2754),
|
||||
///Radiant intensity unit - watt per steradian
|
||||
/// Radiant intensity unit - watt per steradian
|
||||
SONATA_ATT_UNIT_WSONATA_ATT_PER_STERADIAN = SONATA_ATT_UUID_16(0x2755),
|
||||
///Radiance unit - watt per square meter steradian
|
||||
/// Radiance unit - watt per square meter steradian
|
||||
SONATA_ATT_UNIT_WSONATA_ATT_PER_SQ_METRE_STERADIAN = SONATA_ATT_UUID_16(0x2756),
|
||||
///Catalytic activity concentration unit - katal per cubic metre
|
||||
/// Catalytic activity concentration unit - katal per cubic metre
|
||||
SONATA_ATT_UNIT_KATAL_PER_CUBIC_METRE = SONATA_ATT_UUID_16(0x2757),
|
||||
///Time unit - minute
|
||||
/// Time unit - minute
|
||||
SONATA_ATT_UNIT_MINUTE = SONATA_ATT_UUID_16(0x2760),
|
||||
///Time unit - hour
|
||||
/// Time unit - hour
|
||||
SONATA_ATT_UNIT_HOUR = SONATA_ATT_UUID_16(0x2761),
|
||||
///Time unit - day
|
||||
/// Time unit - day
|
||||
SONATA_ATT_UNIT_DAY = SONATA_ATT_UUID_16(0x2762),
|
||||
///Plane angle unit - degree
|
||||
/// Plane angle unit - degree
|
||||
SONATA_ATT_UNIT_ANGLE_DEGREE = SONATA_ATT_UUID_16(0x2763),
|
||||
///Plane angle unit - minute
|
||||
/// Plane angle unit - minute
|
||||
SONATA_ATT_UNIT_ANGLE_MINUTE = SONATA_ATT_UUID_16(0x2764),
|
||||
///Plane angle unit - second
|
||||
/// Plane angle unit - second
|
||||
SONATA_ATT_UNIT_ANGLE_SECOND = SONATA_ATT_UUID_16(0x2765),
|
||||
///Area unit - hectare
|
||||
/// Area unit - hectare
|
||||
SONATA_ATT_UNIT_HECTARE = SONATA_ATT_UUID_16(0x2766),
|
||||
///Volume unit - litre
|
||||
/// Volume unit - litre
|
||||
SONATA_ATT_UNIT_LITRE = SONATA_ATT_UUID_16(0x2767),
|
||||
///Mass unit - tonne
|
||||
/// Mass unit - tonne
|
||||
SONATA_ATT_UNIT_TONNE = SONATA_ATT_UUID_16(0x2768),
|
||||
///Pressure unit - bar
|
||||
/// Pressure unit - bar
|
||||
SONATA_ATT_UNIT_BAR = SONATA_ATT_UUID_16(0x2780),
|
||||
///Pressure unit - millimetre of mercury
|
||||
/// Pressure unit - millimetre of mercury
|
||||
SONATA_ATT_UNIT_MM_MERCURY = SONATA_ATT_UUID_16(0x2781),
|
||||
///Length unit - angstrom
|
||||
/// Length unit - angstrom
|
||||
SONATA_ATT_UNIT_ANGSTROM = SONATA_ATT_UUID_16(0x2782),
|
||||
///Length unit - nautical mile
|
||||
/// Length unit - nautical mile
|
||||
SONATA_ATT_UNIT_NAUTICAL_MILE = SONATA_ATT_UUID_16(0x2783),
|
||||
///Area unit - barn
|
||||
/// Area unit - barn
|
||||
SONATA_ATT_UNIT_BARN = SONATA_ATT_UUID_16(0x2784),
|
||||
///Velocity unit - knot
|
||||
/// Velocity unit - knot
|
||||
SONATA_ATT_UNIT_KNOT = SONATA_ATT_UUID_16(0x2785),
|
||||
///Logarithmic radio quantity unit - neper
|
||||
/// Logarithmic radio quantity unit - neper
|
||||
SONATA_ATT_UNIT_NEPER = SONATA_ATT_UUID_16(0x2786),
|
||||
///Logarithmic radio quantity unit - bel
|
||||
/// Logarithmic radio quantity unit - bel
|
||||
SONATA_ATT_UNIT_BEL = SONATA_ATT_UUID_16(0x2787),
|
||||
///Length unit - yard
|
||||
/// Length unit - yard
|
||||
SONATA_ATT_UNIT_YARD = SONATA_ATT_UUID_16(0x27A0),
|
||||
///Length unit - parsec
|
||||
/// Length unit - parsec
|
||||
SONATA_ATT_UNIT_PARSEC = SONATA_ATT_UUID_16(0x27A1),
|
||||
///length unit - inch
|
||||
/// length unit - inch
|
||||
SONATA_ATT_UNIT_INCH = SONATA_ATT_UUID_16(0x27A2),
|
||||
///length unit - foot
|
||||
/// length unit - foot
|
||||
SONATA_ATT_UNIT_FOOT = SONATA_ATT_UUID_16(0x27A3),
|
||||
///length unit - mile
|
||||
/// length unit - mile
|
||||
SONATA_ATT_UNIT_MILE = SONATA_ATT_UUID_16(0x27A4),
|
||||
///pressure unit - pound-force per square inch
|
||||
/// pressure unit - pound-force per square inch
|
||||
SONATA_ATT_UNIT_POUND_FORCE_PER_SQ_INCH = SONATA_ATT_UUID_16(0x27A5),
|
||||
///velocity unit - kilometre per hour
|
||||
/// velocity unit - kilometre per hour
|
||||
SONATA_ATT_UNIT_KM_PER_HOUR = SONATA_ATT_UUID_16(0x27A6),
|
||||
///velocity unit - mile per hour
|
||||
/// velocity unit - mile per hour
|
||||
SONATA_ATT_UNIT_MILE_PER_HOUR = SONATA_ATT_UUID_16(0x27A7),
|
||||
///angular velocity unit - revolution per minute
|
||||
/// angular velocity unit - revolution per minute
|
||||
SONATA_ATT_UNIT_REVOLUTION_PER_MINUTE = SONATA_ATT_UUID_16(0x27A8),
|
||||
///energy unit - gram calorie
|
||||
/// energy unit - gram calorie
|
||||
SONATA_ATT_UNIT_GRAM_CALORIE = SONATA_ATT_UUID_16(0x27A9),
|
||||
///energy unit - kilogram calorie
|
||||
/// energy unit - kilogram calorie
|
||||
SONATA_ATT_UNIT_KG_CALORIE = SONATA_ATT_UUID_16(0x27AA),
|
||||
/// energy unit - kilowatt hour
|
||||
SONATA_ATT_UNIT_KILOWSONATA_ATT_HOUR = SONATA_ATT_UUID_16(0x27AB),
|
||||
///thermodynamic temperature unit - degree Fahrenheit
|
||||
/// thermodynamic temperature unit - degree Fahrenheit
|
||||
SONATA_ATT_UNIT_FAHRENHEIT = SONATA_ATT_UUID_16(0x27AC),
|
||||
///percentage
|
||||
/// percentage
|
||||
SONATA_ATT_UNIT_PERCENTAGE = SONATA_ATT_UUID_16(0x27AD),
|
||||
///per mille
|
||||
/// per mille
|
||||
SONATA_ATT_UNIT_PER_MILLE = SONATA_ATT_UUID_16(0x27AE),
|
||||
///period unit - beats per minute)
|
||||
/// period unit - beats per minute)
|
||||
SONATA_ATT_UNIT_BEATS_PER_MINUTE = SONATA_ATT_UUID_16(0x27AF),
|
||||
///electric charge unit - ampere hours
|
||||
/// electric charge unit - ampere hours
|
||||
SONATA_ATT_UNIT_AMPERE_HOURS = SONATA_ATT_UUID_16(0x27B0),
|
||||
///mass density unit - milligram per decilitre
|
||||
/// mass density unit - milligram per decilitre
|
||||
SONATA_ATT_UNIT_MILLIGRAM_PER_DECILITRE = SONATA_ATT_UUID_16(0x27B1),
|
||||
///mass density unit - millimole per litre
|
||||
/// mass density unit - millimole per litre
|
||||
SONATA_ATT_UNIT_MILLIMOLE_PER_LITRE = SONATA_ATT_UUID_16(0x27B2),
|
||||
///time unit - year
|
||||
/// time unit - year
|
||||
SONATA_ATT_UNIT_YEAR = SONATA_ATT_UUID_16(0x27B3),
|
||||
////time unit - month
|
||||
//// time unit - month
|
||||
SONATA_ATT_UNIT_MONTH = SONATA_ATT_UUID_16(0x27B4),
|
||||
|
||||
/*---------------- DECLARATIONS -----------------*/
|
||||
@@ -526,7 +526,7 @@ enum {
|
||||
SONATA_ATT_CHAR_TIME_WITH_DST = SONATA_ATT_UUID_16(0x2A11),
|
||||
/// Time Accuracy
|
||||
SONATA_ATT_CHAR_TIME_ACCURACY = SONATA_ATT_UUID_16(0x2A12),
|
||||
///Time Source
|
||||
/// Time Source
|
||||
SONATA_ATT_CHAR_TIME_SOURCE = SONATA_ATT_UUID_16(0x2A13),
|
||||
/// Reference Time Information
|
||||
SONATA_ATT_CHAR_REFERENCE_TIME_INFO = SONATA_ATT_UUID_16(0x2A14),
|
||||
|
||||
@@ -50,7 +50,7 @@
|
||||
#define SONATA_BLE_API_TRC printf
|
||||
#else
|
||||
#define SONATA_BLE_API_TRC(...)
|
||||
#endif //SONATA_BLE_API_DBG
|
||||
#endif // SONATA_BLE_API_DBG
|
||||
|
||||
#define SONATA_TASK_FIRST_MSG(task) ((uint16_t)((task) << 8))
|
||||
|
||||
@@ -61,8 +61,8 @@
|
||||
|
||||
// App callback status
|
||||
typedef enum {
|
||||
CB_DONE = 0, //Done in callback
|
||||
CB_REJECT = 1, //Do nothing in callback, SDK will do it
|
||||
CB_DONE = 0, // Done in callback
|
||||
CB_REJECT = 1, // Do nothing in callback, SDK will do it
|
||||
CB_MAX = 0xFF,
|
||||
} CBStatus;
|
||||
|
||||
@@ -144,5 +144,5 @@ void sonata_ble_isr(void);
|
||||
|
||||
/** @}*/
|
||||
|
||||
#endif //_SONATA_BLE_API_H_
|
||||
#endif // _SONATA_BLE_API_H_
|
||||
|
||||
|
||||
@@ -61,7 +61,7 @@ typedef struct sonata_ble_hook {
|
||||
int (*pf_init_semaphore)(void **semaphore, int value);
|
||||
int (*pf_get_semaphore)(void **semaphore, uint32_t timeout_ms);
|
||||
int (*pf_set_semaphore)(void **semaphore);
|
||||
#endif //(SONATA_RTOS_SUPPORT)
|
||||
#endif // (SONATA_RTOS_SUPPORT)
|
||||
} sonata_ble_hook_t;
|
||||
|
||||
/*
|
||||
|
||||
@@ -45,7 +45,7 @@
|
||||
*/
|
||||
extern void sonata_ble_rom_init(uint8_t init);
|
||||
|
||||
#endif //BLE_ROM
|
||||
#endif // BLE_ROM
|
||||
|
||||
#endif // _SONATA_BLE_ROM_H_
|
||||
|
||||
|
||||
@@ -65,5 +65,5 @@ extern void sonata_ble_transport_init(sonata_ble_transport_pad_config_t *config)
|
||||
|
||||
extern void sonata_ble_transport_wkup(void);
|
||||
|
||||
#endif //_SONATA_BLE_TRANSPORT_H_
|
||||
#endif // _SONATA_BLE_TRANSPORT_H_
|
||||
|
||||
|
||||
@@ -46,11 +46,11 @@
|
||||
****************************************************************************************
|
||||
*/
|
||||
|
||||
///BD address type
|
||||
/// BD address type
|
||||
enum sonata_addr_type {
|
||||
///Public BD address
|
||||
/// Public BD address
|
||||
SONATA_ADDR_PUBLIC = 0x00,
|
||||
///Random BD Address
|
||||
/// Random BD Address
|
||||
SONATA_ADDR_RAND,
|
||||
/// Controller generates Resolvable Private Address based on the
|
||||
/// local IRK from resolving list. If resolving list contains no matching
|
||||
@@ -70,15 +70,15 @@ enum sonata_addr_type {
|
||||
SONATA_ADDR_NONE = 0xFF,
|
||||
};
|
||||
|
||||
///Advertising filter policy
|
||||
/// Advertising filter policy
|
||||
enum stack_adv_filter_policy {
|
||||
///Allow both scan and connection requests from anyone
|
||||
/// Allow both scan and connection requests from anyone
|
||||
SONATA_ADV_ALLOW_SCAN_ANY_CON_ANY = 0x00,
|
||||
///Allow both scan req from White List devices only and connection req from anyone
|
||||
/// Allow both scan req from White List devices only and connection req from anyone
|
||||
SONATA_ADV_ALLOW_SCAN_WLST_CON_ANY,
|
||||
///Allow both scan req from anyone and connection req from White List devices only
|
||||
/// Allow both scan req from anyone and connection req from White List devices only
|
||||
SONATA_ADV_ALLOW_SCAN_ANY_CON_WLST,
|
||||
///Allow scan and connection requests from White List devices only
|
||||
/// Allow scan and connection requests from White List devices only
|
||||
SONATA_ADV_ALLOW_SCAN_WLST_CON_WLST,
|
||||
};
|
||||
|
||||
@@ -97,17 +97,17 @@ enum stack_random_addr_type {
|
||||
|
||||
/// Constant defining the role
|
||||
enum {
|
||||
///Master role
|
||||
/// Master role
|
||||
SONATA_ROLE_MASTER,
|
||||
///Slave role
|
||||
/// Slave role
|
||||
SONATA_ROLE_SLAVE,
|
||||
};
|
||||
|
||||
///Privacy mode type
|
||||
/// Privacy mode type
|
||||
enum {
|
||||
///Network privacy mode
|
||||
/// Network privacy mode
|
||||
SONATA_PRIV_TYPE_NETWORK = 0x00,
|
||||
///Device privacy mode
|
||||
/// Device privacy mode
|
||||
SONATA_PRIV_TYPE_DEVICE = 0x01,
|
||||
};
|
||||
|
||||
@@ -130,4 +130,4 @@ enum {
|
||||
|
||||
#define STACK_TASK_FIRST_MSG(task) ((uint16_t)((task) << 8))
|
||||
|
||||
#endif //_SONATA_CONFIG_H_
|
||||
#endif // _SONATA_CONFIG_H_
|
||||
|
||||
@@ -105,14 +105,14 @@
|
||||
#define SONATA_UTILS_API_TRC printf
|
||||
#else
|
||||
#define SONATA_UTILS_API_TRC(...)
|
||||
#endif //SONATA_API_TASK_DBG
|
||||
#endif // SONATA_API_TASK_DBG
|
||||
|
||||
/*
|
||||
* ENUM DEFINITIONS
|
||||
****************************************************************************************
|
||||
*/
|
||||
|
||||
//C error
|
||||
// C error
|
||||
#define SONATA_CO_ERROR_NO_ERROR (0x00)
|
||||
#define SONATA_CO_ERROR_UNKNOWN_HCI_COMMAND (0x01)
|
||||
#define SONATA_CO_ERROR_UNKNOWN_CONNECTION_ID (0x02)
|
||||
@@ -181,9 +181,9 @@
|
||||
#define SONATA_CO_ERROR_UNDEFINED (0xFF)
|
||||
#define SONATA_CO_ERROR_HW_UART_OUT_OF_SYNC (0x00)
|
||||
#define SONATA_CO_ERROR_HW_MEM_ALLOC_FAIL (0x01)
|
||||
//C error end
|
||||
// C error end
|
||||
|
||||
//hl_err
|
||||
// hl_err
|
||||
enum stack_hl_err {
|
||||
/// No error
|
||||
SONATA_HL_GAP_ERR_NO_ERROR = 0x00,
|
||||
@@ -583,6 +583,6 @@ enum stack_hl_err {
|
||||
/// Packet Too Long
|
||||
SONATA_HL_LL_ERR_PKT_TOO_LONG = 0xD5,
|
||||
};
|
||||
//hl_err end
|
||||
#endif //_SONATA_ERROR_API_H_
|
||||
// hl_err end
|
||||
#endif // _SONATA_ERROR_API_H_
|
||||
|
||||
|
||||
@@ -74,7 +74,7 @@
|
||||
// P256 Key Len
|
||||
#define SONATA_GAP_P256_KEY_LEN (0x20)
|
||||
|
||||
///***** AD Type Flag - Bit set *******/
|
||||
/***** AD Type Flag - Bit set *******/
|
||||
// Limited discovery flag - AD Flag
|
||||
#define SONATA_GAP_LE_LIM_DISCOVERABLE_FLG 0x01
|
||||
// General discovery flag - AD Flag
|
||||
@@ -96,17 +96,17 @@
|
||||
#define SONATA_GAP_INVALID_CONHDL 0xFFFF
|
||||
|
||||
// Connection interval min (N*1.250ms)
|
||||
#define SONATA_GAP_CNX_INTERVAL_MIN 6 //(0x06)
|
||||
#define SONATA_GAP_CNX_INTERVAL_MIN 6 // (0x06)
|
||||
// Connection interval Max (N*1.250ms)
|
||||
#define SONATA_GAP_CNX_INTERVAL_MAX 3200 //(0xC80)
|
||||
#define SONATA_GAP_CNX_INTERVAL_MAX 3200 // (0xC80)
|
||||
// Connection latency min (N*cnx evt)
|
||||
#define SONATA_GAP_CNX_LATENCY_MIN 0 //(0x00)
|
||||
#define SONATA_GAP_CNX_LATENCY_MIN 0 // (0x00)
|
||||
// Connection latency Max (N*cnx evt
|
||||
#define SONATA_GAP_CNX_LATENCY_MAX 499 //(0x1F3)
|
||||
#define SONATA_GAP_CNX_LATENCY_MAX 499 // (0x1F3)
|
||||
// Supervision TO min (N*10ms)
|
||||
#define SONATA_GAP_CNX_SUP_TO_MIN 10 //(0x0A)
|
||||
#define SONATA_GAP_CNX_SUP_TO_MIN 10 // (0x0A)
|
||||
// Supervision TO Max (N*10ms)
|
||||
#define SONATA_GAP_CNX_SUP_TO_MAX 3200 //(0xC80)
|
||||
#define SONATA_GAP_CNX_SUP_TO_MAX 3200 // (0xC80)
|
||||
|
||||
// Length of resolvable random address prand part
|
||||
#define SONATA_GAP_ADDR_PRAND_LEN (3)
|
||||
@@ -228,10 +228,10 @@
|
||||
// GAP Appearance or Icon Characteristic - 2 octets
|
||||
// Current appearance value is 0x0000 (unknown appearance)
|
||||
// Description:
|
||||
// http://developer.bluetooth.org/gatt/characteristics/Pages/CharacteristicViewer.aspx?u=org.bluetooth.characteristic.gap.appearance.xml
|
||||
// http:// developer.bluetooth.org/gatt/characteristics/Pages/CharacteristicViewer.aspx?u=org.bluetooth.characteristic.gap.appearance.xml
|
||||
#define SONATA_GAP_APPEARANCE 0x0000
|
||||
|
||||
///GAP Peripheral Preferred Connection Parameter - 8 octets
|
||||
/// GAP Peripheral Preferred Connection Parameter - 8 octets
|
||||
#define SONATA_GAP_PPCP_CONN_INTV_MAX 0x0064
|
||||
#define SONATA_GAP_PPCP_CONN_INTV_MIN 0x00C8
|
||||
#define SONATA_GAP_PPCP_SLAVE_LATENCY 0x0000
|
||||
@@ -514,7 +514,7 @@ enum sonata_gap_pkt_pld_type { // PRBS9 sequence "11111111100000111101..." (in t
|
||||
/*************** GAP Structures ********************/
|
||||
|
||||
// Device name
|
||||
/*@TRACE*/
|
||||
/* @TRACE */
|
||||
struct sonata_gap_dev_name {
|
||||
// name length
|
||||
uint16_t length;
|
||||
@@ -523,7 +523,7 @@ struct sonata_gap_dev_name {
|
||||
};
|
||||
|
||||
// Slave preferred connection parameters
|
||||
/*@TRACE*/
|
||||
/* @TRACE */
|
||||
struct sonata_gap_slv_pref {
|
||||
// Connection interval minimum
|
||||
uint16_t con_intv_min;
|
||||
@@ -535,29 +535,29 @@ struct sonata_gap_slv_pref {
|
||||
uint16_t conn_timeout;
|
||||
};
|
||||
|
||||
///BD Address structure
|
||||
/*@TRACE*/
|
||||
/// BD Address structure
|
||||
/* @TRACE */
|
||||
typedef struct {
|
||||
///6-byte array address value
|
||||
/// 6-byte array address value
|
||||
uint8_t addr[SONATA_GAP_BD_ADDR_LEN];
|
||||
} sonata_bd_addr_t;
|
||||
|
||||
///Channel map structure
|
||||
/*@TRACE*/
|
||||
/// Channel map structure
|
||||
/* @TRACE */
|
||||
typedef struct {
|
||||
///5-byte channel map array
|
||||
/// 5-byte channel map array
|
||||
uint8_t map[SONATA_GAP_LE_CHNL_MAP_LEN];
|
||||
} sonata_le_chnl_map_t;
|
||||
|
||||
///Random number structure
|
||||
/*@TRACE*/
|
||||
/// Random number structure
|
||||
/* @TRACE */
|
||||
typedef struct {
|
||||
///8-byte array for random number
|
||||
/// 8-byte array for random number
|
||||
uint8_t nb[SONATA_GAP_RAND_NB_LEN];
|
||||
} sonata_rand_nb_t;
|
||||
|
||||
// Address information about a device address
|
||||
/*@TRACE*/
|
||||
/* @TRACE */
|
||||
struct sonata_gap_bdaddr {
|
||||
// BD Address of device
|
||||
sonata_bd_addr_t addr;
|
||||
@@ -566,7 +566,7 @@ struct sonata_gap_bdaddr {
|
||||
};
|
||||
|
||||
// Resolving list device information
|
||||
/*@TRACE*/
|
||||
/* @TRACE */
|
||||
struct sonata_gap_ral_dev_info {
|
||||
// Device identity
|
||||
struct sonata_gap_bdaddr addr;
|
||||
@@ -579,14 +579,14 @@ struct sonata_gap_ral_dev_info {
|
||||
};
|
||||
|
||||
// Generic Security key structure
|
||||
/*@TRACE*/
|
||||
/* @TRACE */
|
||||
struct sonata_gap_sec_key {
|
||||
// Key value MSB -> LSB
|
||||
uint8_t key[SONATA_GAP_KEY_LEN];
|
||||
};
|
||||
|
||||
// I/Q sample
|
||||
/*@TRACE*/
|
||||
/* @TRACE */
|
||||
struct sonata_gap_iq_sample {
|
||||
// I sample
|
||||
int8_t i;
|
||||
|
||||
@@ -31,9 +31,9 @@
|
||||
****************************************************************************************
|
||||
*/
|
||||
#include "sonata_config.h"
|
||||
///@cond
|
||||
/// @cond
|
||||
#if defined(STACK_BLE_HOST_PRESENT) || defined(BLE_HOST_PRESENT)
|
||||
///@endcond
|
||||
/// @endcond
|
||||
#include "sonata_utils_api.h"
|
||||
#include "sonata_gap.h"
|
||||
|
||||
@@ -513,121 +513,121 @@ typedef enum {
|
||||
|
||||
/// profiles id define
|
||||
typedef enum {
|
||||
SONATA_PRF_ID_DISS = 20, /**< Device Information Service Server Task */
|
||||
SONATA_PRF_ID_DISC = 21, /**< Device Information Service Client Task */
|
||||
SONATA_PRF_ID_DISS = 20, /* *< Device Information Service Server Task */
|
||||
SONATA_PRF_ID_DISC = 21, /* *< Device Information Service Client Task */
|
||||
|
||||
SONATA_PRF_ID_PROXM = 22, /**< Proximity Monitor Task */
|
||||
SONATA_PRF_ID_PROXR = 23, /**< Proximity Reporter Task */
|
||||
SONATA_PRF_ID_PROXM = 22, /* *< Proximity Monitor Task */
|
||||
SONATA_PRF_ID_PROXR = 23, /* *< Proximity Reporter Task */
|
||||
|
||||
SONATA_PRF_ID_FINDL = 24, /**< Find Me Locator Task */
|
||||
SONATA_PRF_ID_FINDT = 25, /**< Find Me Target Task */
|
||||
SONATA_PRF_ID_FINDL = 24, /* *< Find Me Locator Task */
|
||||
SONATA_PRF_ID_FINDT = 25, /* *< Find Me Target Task */
|
||||
|
||||
SONATA_PRF_ID_HTPC = 26, /**< Health Thermometer Collector Task */
|
||||
SONATA_PRF_ID_HTPT = 27, /**< Health Thermometer Sensor Task */
|
||||
SONATA_PRF_ID_HTPC = 26, /* *< Health Thermometer Collector Task */
|
||||
SONATA_PRF_ID_HTPT = 27, /* *< Health Thermometer Sensor Task */
|
||||
|
||||
SONATA_PRF_ID_BLPS = 28, /**< Blood Pressure Sensor Task */
|
||||
SONATA_PRF_ID_BLPC = 29, /**< Blood Pressure Collector Task */
|
||||
SONATA_PRF_ID_BLPS = 28, /* *< Blood Pressure Sensor Task */
|
||||
SONATA_PRF_ID_BLPC = 29, /* *< Blood Pressure Collector Task */
|
||||
|
||||
SONATA_PRF_ID_HRPS = 30, /**< Heart Rate Sensor Task */
|
||||
SONATA_PRF_ID_HRPC = 31, /**< Heart Rate Collector Task */
|
||||
SONATA_PRF_ID_HRPS = 30, /* *< Heart Rate Sensor Task */
|
||||
SONATA_PRF_ID_HRPC = 31, /* *< Heart Rate Collector Task */
|
||||
|
||||
SONATA_PRF_ID_TIPS = 32, /**< Time Server Task */
|
||||
SONATA_PRF_ID_TIPC = 33, /**< Time Client Task */
|
||||
SONATA_PRF_ID_TIPS = 32, /* *< Time Server Task */
|
||||
SONATA_PRF_ID_TIPC = 33, /* *< Time Client Task */
|
||||
|
||||
SONATA_PRF_ID_SCPPS = 34, /**< Scan Parameter Profile Server Task */
|
||||
SONATA_PRF_ID_SCPPC = 35, /**< Scan Parameter Profile Client Task */
|
||||
SONATA_PRF_ID_SCPPS = 34, /* *< Scan Parameter Profile Server Task */
|
||||
SONATA_PRF_ID_SCPPC = 35, /* *< Scan Parameter Profile Client Task */
|
||||
|
||||
SONATA_PRF_ID_BASS = 36, /**< Battery Service Server Task */
|
||||
SONATA_PRF_ID_BASC = 37, /**< Battery Service Client Task */
|
||||
SONATA_PRF_ID_BASS = 36, /* *< Battery Service Server Task */
|
||||
SONATA_PRF_ID_BASC = 37, /* *< Battery Service Client Task */
|
||||
|
||||
SONATA_PRF_ID_HOGPD = 38, /**< HID Device Task */
|
||||
SONATA_PRF_ID_HOGPBH = 39, /**< HID Boot Host Task */
|
||||
SONATA_PRF_ID_HOGPRH = 40, /**< HID Report Host Task */
|
||||
SONATA_PRF_ID_HOGPD = 38, /* *< HID Device Task */
|
||||
SONATA_PRF_ID_HOGPBH = 39, /* *< HID Boot Host Task */
|
||||
SONATA_PRF_ID_HOGPRH = 40, /* *< HID Report Host Task */
|
||||
|
||||
SONATA_PRF_ID_GLPS = 41, /**< Glucose Profile Sensor Task */
|
||||
SONATA_PRF_ID_GLPC = 42, /**< Glucose Profile Collector Task */
|
||||
SONATA_PRF_ID_GLPS = 41, /* *< Glucose Profile Sensor Task */
|
||||
SONATA_PRF_ID_GLPC = 42, /* *< Glucose Profile Collector Task */
|
||||
|
||||
SONATA_PRF_ID_RSCPS = 43, /**< Running Speed and Cadence Profile Server Task */
|
||||
SONATA_PRF_ID_RSCPC = 44, /**< Running Speed and Cadence Profile Collector Task */
|
||||
SONATA_PRF_ID_RSCPS = 43, /* *< Running Speed and Cadence Profile Server Task */
|
||||
SONATA_PRF_ID_RSCPC = 44, /* *< Running Speed and Cadence Profile Collector Task */
|
||||
|
||||
SONATA_PRF_ID_CSCPS = 45, /**< Cycling Speed and Cadence Profile Server Task */
|
||||
SONATA_PRF_ID_CSCPC = 46, /**< Cycling Speed and Cadence Profile Client Task */
|
||||
SONATA_PRF_ID_CSCPS = 45, /* *< Cycling Speed and Cadence Profile Server Task */
|
||||
SONATA_PRF_ID_CSCPC = 46, /* *< Cycling Speed and Cadence Profile Client Task */
|
||||
|
||||
SONATA_PRF_ID_ANPS = 47, /**< Alert Notification Profile Server Task */
|
||||
SONATA_PRF_ID_ANPC = 48, /**< Alert Notification Profile Client Task */
|
||||
SONATA_PRF_ID_ANPS = 47, /* *< Alert Notification Profile Server Task */
|
||||
SONATA_PRF_ID_ANPC = 48, /* *< Alert Notification Profile Client Task */
|
||||
|
||||
SONATA_PRF_ID_PASPS = 49, /**< Phone Alert Status Profile Server Task */
|
||||
SONATA_PRF_ID_PASPC = 50, /**< Phone Alert Status Profile Client Task */
|
||||
SONATA_PRF_ID_PASPS = 49, /* *< Phone Alert Status Profile Server Task */
|
||||
SONATA_PRF_ID_PASPC = 50, /* *< Phone Alert Status Profile Client Task */
|
||||
|
||||
SONATA_PRF_ID_CPPS = 51, /**< Cycling Power Profile Server Task */
|
||||
SONATA_PRF_ID_CPPC = 52, /**< Cycling Power Profile Client Task */
|
||||
SONATA_PRF_ID_CPPS = 51, /* *< Cycling Power Profile Server Task */
|
||||
SONATA_PRF_ID_CPPC = 52, /* *< Cycling Power Profile Client Task */
|
||||
|
||||
SONATA_PRF_ID_LANS = 53, /**< Location and Navigation Profile Server Task */
|
||||
SONATA_PRF_ID_LANC = 54, /**< Location and Navigation Profile Client Task */
|
||||
SONATA_PRF_ID_LANS = 53, /* *< Location and Navigation Profile Server Task */
|
||||
SONATA_PRF_ID_LANC = 54, /* *< Location and Navigation Profile Client Task */
|
||||
|
||||
SONATA_PRF_ID_IPSS = 55, /**< Internet Protocol Support Profile Server Task */
|
||||
SONATA_PRF_ID_IPSC = 56, /**< Internet Protocol Support Profile Client Task */
|
||||
SONATA_PRF_ID_IPSS = 55, /* *< Internet Protocol Support Profile Server Task */
|
||||
SONATA_PRF_ID_IPSC = 56, /* *< Internet Protocol Support Profile Client Task */
|
||||
|
||||
SONATA_PRF_ID_ENVS = 57, /**< Environmental Sensing Profile Server Task */
|
||||
SONATA_PRF_ID_ENVC = 58, /**< Environmental Sensing Profile Client Task */
|
||||
SONATA_PRF_ID_ENVS = 57, /* *< Environmental Sensing Profile Server Task */
|
||||
SONATA_PRF_ID_ENVC = 58, /* *< Environmental Sensing Profile Client Task */
|
||||
|
||||
SONATA_PRF_ID_WSCS = 59, /**< Weight Scale Profile Server Task */
|
||||
SONATA_PRF_ID_WSCC = 60, /**< Weight Scale Profile Client Task */
|
||||
SONATA_PRF_ID_WSCS = 59, /* *< Weight Scale Profile Server Task */
|
||||
SONATA_PRF_ID_WSCC = 60, /* *< Weight Scale Profile Client Task */
|
||||
|
||||
SONATA_PRF_ID_UDSS = 61, /**< User Data Service Server Task */
|
||||
SONATA_PRF_ID_UDSC = 62, /**< User Data Service Client Task */
|
||||
SONATA_PRF_ID_UDSS = 61, /* *< User Data Service Server Task */
|
||||
SONATA_PRF_ID_UDSC = 62, /* *< User Data Service Client Task */
|
||||
|
||||
SONATA_PRF_ID_BCSS = 63, /**< Body Composition Server Task */
|
||||
SONATA_PRF_ID_BCSC = 64, /**< Body Composition Client Task */
|
||||
SONATA_PRF_ID_BCSS = 63, /* *< Body Composition Server Task */
|
||||
SONATA_PRF_ID_BCSC = 64, /* *< Body Composition Client Task */
|
||||
|
||||
SONATA_PRF_ID_WPTS = 65, /**< Wireless Power Transfer Profile Server Task */
|
||||
SONATA_PRF_ID_WPTC = 66, /**< Wireless Power Transfer Profile Client Task */
|
||||
SONATA_PRF_ID_WPTS = 65, /* *< Wireless Power Transfer Profile Server Task */
|
||||
SONATA_PRF_ID_WPTC = 66, /* *< Wireless Power Transfer Profile Client Task */
|
||||
|
||||
SONATA_PRF_ID_PLXS = 67, /**< Pulse Oximeter Profile Server Task */
|
||||
SONATA_PRF_ID_PLXC = 68, /**< Pulse Oximeter Profile Client Task */
|
||||
SONATA_PRF_ID_PLXS = 67, /* *< Pulse Oximeter Profile Server Task */
|
||||
SONATA_PRF_ID_PLXC = 68, /* *< Pulse Oximeter Profile Client Task */
|
||||
|
||||
SONATA_PRF_ID_CGMS = 69, /**< Continuous Glucose Monitoring Server Task */
|
||||
SONATA_PRF_ID_CGMC = 70, /**< Continuous Glucose Monitoring Client Task */
|
||||
SONATA_PRF_ID_CGMS = 69, /* *< Continuous Glucose Monitoring Server Task */
|
||||
SONATA_PRF_ID_CGMC = 70, /* *< Continuous Glucose Monitoring Client Task */
|
||||
|
||||
SONATA_PRF_ID_OTAS = 80,
|
||||
|
||||
SONATA_PRF_ID_MESH = 200, /**<Mesh Task */
|
||||
SONATA_PRF_ID_MESH = 200, /* *<Mesh Task */
|
||||
|
||||
/* 240 -> 241 reserved for Audio Mode 0 */
|
||||
SONATA_PRF_ID_AM0 = 240, /**< BLE Audio Mode 0 Task */
|
||||
SONATA_PRF_ID_AM0_HAS = 241, /**< BLE Audio Mode 0 Hearing Aid Service Task */
|
||||
/* 240 -> 241 reserved for Audio Mode 0 */
|
||||
SONATA_PRF_ID_AM0 = 240, /* *< BLE Audio Mode 0 Task */
|
||||
SONATA_PRF_ID_AM0_HAS = 241, /* *< BLE Audio Mode 0 Hearing Aid Service Task */
|
||||
|
||||
SONATA_PRF_ID_THPP = 242, /**< Throughput profile tester used for debugging */
|
||||
SONATA_PRF_ID_THPP = 242, /* *< Throughput profile tester used for debugging */
|
||||
} sonata_ble_profile_id;
|
||||
|
||||
/// peer information type
|
||||
typedef enum {
|
||||
/// Retrieve name of peer device. //Will show in @see sonata_gap_peer_att_info_ind_handler
|
||||
/// Retrieve name of peer device. // Will show in @see sonata_gap_peer_att_info_ind_handler
|
||||
SONATA_GET_PEER_NAME = 0x02,
|
||||
/// Retrieve peer device version info. //Will show in @see sonata_gap_peer_version_ind_handler
|
||||
/// Retrieve peer device version info. // Will show in @see sonata_gap_peer_version_ind_handler
|
||||
SONATA_GET_PEER_VERSION = 0x03,
|
||||
/// Retrieve peer device features. //Will show in @see sonata_gap_peer_features_ind_handler
|
||||
/// Retrieve peer device features. // Will show in @see sonata_gap_peer_features_ind_handler
|
||||
SONATA_GET_PEER_FEATURES = 0x04,
|
||||
/// Get Peer device appearance //Will show in @see sonata_gap_peer_att_info_ind_handler
|
||||
/// Get Peer device appearance // Will show in @see sonata_gap_peer_att_info_ind_handler
|
||||
SONATA_GET_PEER_APPEARANCE = 0x05,
|
||||
/// Get Peer device Slaved Preferred Parameters //Will show in @see sonata_gap_peer_att_info_ind_handler
|
||||
/// Get Peer device Slaved Preferred Parameters // Will show in @see sonata_gap_peer_att_info_ind_handler
|
||||
SONATA_GET_PEER_SLV_PREF_PARAMS = 0x06,
|
||||
/// Retrieve connection RSSI. //Will show in @see sonata_gap_con_rssi_ind_handler
|
||||
/// Retrieve connection RSSI. // Will show in @see sonata_gap_con_rssi_ind_handler
|
||||
SONATA_GET_PEER_CON_RSSI = 0x07,
|
||||
/// Retrieve Connection Channel MAP. //Will show in @see sonata_gap_con_channel_map_ind_handler
|
||||
/// Retrieve Connection Channel MAP. // Will show in @see sonata_gap_con_channel_map_ind_handler
|
||||
SONATA_GET_PEER_CON_CHANNEL_MAP = 0x08,
|
||||
//Will show in @see sonata_gap_le_ping_to_val_ind_handler and @see sonata_gap_le_ping_to_ind_handler
|
||||
// Will show in @see sonata_gap_le_ping_to_val_ind_handler and @see sonata_gap_le_ping_to_ind_handler
|
||||
SONATA_GET_LE_PING_TO = 0x12,
|
||||
//Will show in @see sonata_gap_peer_att_info_ind_handler
|
||||
// Will show in @see sonata_gap_peer_att_info_ind_handler
|
||||
SONATA_GET_PEER_ADDR_RESOL_SUPP = 0x15,
|
||||
//Will show in @see sonata_gap_le_phy_ind_handler
|
||||
// Will show in @see sonata_gap_le_phy_ind_handler
|
||||
SONATA_GET_PHY = 0x18,
|
||||
//Will show in @see sonata_gap_chan_sel_algo_ind_handler
|
||||
// Will show in @see sonata_gap_chan_sel_algo_ind_handler
|
||||
SONATA_GET_CHAN_SEL_ALGO = 0x19,
|
||||
} sonata_peer_info_type;
|
||||
|
||||
/// Bond event type.
|
||||
/*@TRACE*/
|
||||
/* @TRACE */
|
||||
typedef enum {
|
||||
/// Bond Pairing request
|
||||
SONATA_GAP_PAIRING_REQ,
|
||||
@@ -811,16 +811,16 @@ typedef struct sonata_gap_connection_req_ind {
|
||||
/// device information data
|
||||
typedef union sonata_gap_dev_info_val {
|
||||
/// Device name
|
||||
//@trc_union parent.req == SONATA_GAP_DEV_NAME
|
||||
// @trc_union parent.req == SONATA_GAP_DEV_NAME
|
||||
struct sonata_gap_dev_name name;
|
||||
/// Appearance Icon
|
||||
//@trc_union parent.req == SONATA_GAP_DEV_APPEARANCE
|
||||
// @trc_union parent.req == SONATA_GAP_DEV_APPEARANCE
|
||||
uint16_t appearance;
|
||||
/// Slave preferred parameters
|
||||
//@trc_union parent.req == SONATA_GAP_DEV_SLV_PREF_PARAMS
|
||||
// @trc_union parent.req == SONATA_GAP_DEV_SLV_PREF_PARAMS
|
||||
struct sonata_gap_slv_pref slv_pref_params;
|
||||
/// Central address resolution
|
||||
//@trc_union parent.req == SONATA_GAP_DEV_CTL_ADDR_RESOL
|
||||
// @trc_union parent.req == SONATA_GAP_DEV_CTL_ADDR_RESOL
|
||||
uint8_t ctl_addr_resol;
|
||||
} sonata_gap_dev_info_val_t;
|
||||
|
||||
@@ -840,7 +840,7 @@ typedef struct sonata_gap_peer_att_info_ind {
|
||||
} sonata_gap_peer_att_info_ind_t;
|
||||
|
||||
/// Indication of peer version info
|
||||
/*@TRACE*/
|
||||
/* @TRACE */
|
||||
typedef struct sonata_gap_peer_version_ind {
|
||||
/// Manufacturer name
|
||||
uint16_t compid;
|
||||
@@ -851,35 +851,35 @@ typedef struct sonata_gap_peer_version_ind {
|
||||
} sonata_gap_peer_version_ind_t;
|
||||
/// Indication of peer features info
|
||||
|
||||
/*@TRACE*/
|
||||
/* @TRACE */
|
||||
typedef struct sonata_gap_peer_features_ind {
|
||||
/// 8-byte array for LE features
|
||||
uint8_t features[SONATA_GAP_LE_FEATS_LEN];
|
||||
} sonata_gap_peer_features_ind_t;
|
||||
|
||||
/// Indication of ongoing connection RSSI
|
||||
/*@TRACE*/
|
||||
/* @TRACE */
|
||||
typedef struct sonata_gap_con_rssi_ind {
|
||||
/// RSSI value
|
||||
int8_t rssi;
|
||||
} sonata_gap_con_rssi_ind_t;
|
||||
|
||||
/// Indication of ongoing connection Channel Map
|
||||
/*@TRACE*/
|
||||
/* @TRACE */
|
||||
typedef struct sonata_gap_con_channel_map_ind {
|
||||
/// channel map value
|
||||
sonata_le_chnl_map_t ch_map;
|
||||
} sonata_gap_con_channel_map_ind_t;
|
||||
|
||||
/// Indication of LE Ping
|
||||
/*@TRACE*/
|
||||
/* @TRACE */
|
||||
typedef struct sonata_gap_le_ping_to_val_ind {
|
||||
///Authenticated payload timeout
|
||||
/// Authenticated payload timeout
|
||||
uint16_t timeout;
|
||||
} sonata_gap_le_ping_to_val_ind_t;
|
||||
|
||||
/// Active link PHY configuration. Triggered when configuration is read or during an update.
|
||||
/*@TRACE*/
|
||||
/* @TRACE */
|
||||
typedef struct sonata_gap_le_phy_ind {
|
||||
/// LE PHY for data transmission (@see enum gap_phy_val)
|
||||
uint8_t tx_phy;
|
||||
@@ -888,7 +888,7 @@ typedef struct sonata_gap_le_phy_ind {
|
||||
} sonata_gap_le_phy_ind_t;
|
||||
|
||||
/// Parameters of the @ref SONATA_GAP_CHAN_SEL_ALGO_IND
|
||||
/*@TRACE*/
|
||||
/* @TRACE */
|
||||
typedef struct sonata_gap_chan_sel_algo_ind {
|
||||
/// Used channel selection algorithm
|
||||
uint8_t chan_sel_algo;
|
||||
@@ -953,9 +953,9 @@ typedef struct {
|
||||
uint16_t att_cfg;
|
||||
|
||||
// /// -------------- LE Data Length Extension -----------------------
|
||||
// ///Suggested value for the Controller's maximum transmitted number of payload octets to be used
|
||||
// /// Suggested value for the Controller's maximum transmitted number of payload octets to be used
|
||||
// uint16_t sugg_max_tx_octets;
|
||||
// ///Suggested value for the Controller's maximum packet transmission time to be used
|
||||
// /// Suggested value for the Controller's maximum packet transmission time to be used
|
||||
// uint16_t sugg_max_tx_time;
|
||||
|
||||
/// --------------- L2CAP Configuration ---------------------------
|
||||
@@ -982,10 +982,10 @@ typedef struct {
|
||||
|
||||
///------------------ Miscellaneou 3 -----------------------------
|
||||
bool hl_trans_dbg;
|
||||
///<host layer transport debug
|
||||
/// <host layer transport debug
|
||||
uint8_t pa_en;
|
||||
///<pa enable 1:pa enable 0:pa disable default:0
|
||||
///<pinmux: rxcore->pad12 txcore->pad17
|
||||
/// <pa enable 1:pa enable 0:pa disable default:0
|
||||
/// <pinmux: rxcore->pad12 txcore->pad17
|
||||
} sonata_gap_set_dev_config_cmd;
|
||||
|
||||
/// create directed advertising
|
||||
@@ -1262,23 +1262,23 @@ typedef struct sonata_gap_oob {
|
||||
/// Bond procedure requested information data
|
||||
typedef union sonata_gap_bond_req_data {
|
||||
/// Authentication level (@see gap_auth) (if request = SONATA_GAP_PAIRING_REQ)
|
||||
//@trc_union parent.request == SONATA_GAP_PAIRING_REQ
|
||||
// @trc_union parent.request == SONATA_GAP_PAIRING_REQ
|
||||
uint8_t auth_req;
|
||||
/// LTK Key Size (if request = SONATA_GAP_LTK_EXCH)
|
||||
//@trc_union parent.request == SONATA_GAP_LTK_EXCH
|
||||
// @trc_union parent.request == SONATA_GAP_LTK_EXCH
|
||||
uint8_t key_size;
|
||||
/// Device IO used to get TK: (if request = SONATA_GAP_TK_EXCH)
|
||||
/// - GAP_TK_OOB: TK get from out of band method
|
||||
/// - GAP_TK_DISPLAY: TK generated and shall be displayed by local device
|
||||
/// - GAP_TK_KEY_ENTRY: TK shall be entered by user using device keyboard
|
||||
//@trc_union parent.request == SONATA_GAP_TK_EXCH
|
||||
// @trc_union parent.request == SONATA_GAP_TK_EXCH
|
||||
uint8_t tk_type;
|
||||
|
||||
/// Addition OOB Data for the OOB Conf and Rand values
|
||||
//@trc_union parent.request == SONATA_GAP_OOB_EXCH
|
||||
// @trc_union parent.request == SONATA_GAP_OOB_EXCH
|
||||
struct sonata_gap_oob oob_data;
|
||||
/// Numeric Comparison Data
|
||||
//@trc_union parent.request == SONATA_GAP_NC_EXCH
|
||||
// @trc_union parent.request == SONATA_GAP_NC_EXCH
|
||||
struct sonata_gap_nc nc_data;
|
||||
} sonata_gap_bond_req_data_t;
|
||||
|
||||
@@ -1324,19 +1324,19 @@ typedef struct sonata_gap_bond_auth {
|
||||
typedef union sonata_gap_bond_data {
|
||||
/// Authentication information (@see gap_auth)
|
||||
/// (if info = SONATA_GAP_PAIRING_SUCCEED)
|
||||
//@trc_union parent.info == SONATA_GAP_PAIRING_SUCCEED
|
||||
// @trc_union parent.info == SONATA_GAP_PAIRING_SUCCEED
|
||||
struct sonata_gap_bond_auth auth;
|
||||
/// Pairing failed reason (if info = SONATA_GAP_PAIRING_FAILED)
|
||||
//@trc_union parent.info == SONATA_GAP_PAIRING_FAILED
|
||||
// @trc_union parent.info == SONATA_GAP_PAIRING_FAILED
|
||||
uint8_t reason;
|
||||
/// Long Term Key information (if info = SONATA_GAP_LTK_EXCH)
|
||||
//@trc_union parent.info == SONATA_GAP_LTK_EXCH
|
||||
// @trc_union parent.info == SONATA_GAP_LTK_EXCH
|
||||
struct sonata_gap_ltk ltk;
|
||||
/// Identity Resolving Key information (if info = SONATA_GAP_IRK_EXCH)
|
||||
//@trc_union parent.info == SONATA_GAP_IRK_EXCH
|
||||
// @trc_union parent.info == SONATA_GAP_IRK_EXCH
|
||||
struct sonata_gap_irk irk;
|
||||
/// Connection Signature Resolving Key information (if info = SONATA_GAP_CSRK_EXCH)
|
||||
//@trc_union parent.info == SONATA_GAP_CSRK_EXCH
|
||||
// @trc_union parent.info == SONATA_GAP_CSRK_EXCH
|
||||
struct sonata_gap_sec_key csrk;
|
||||
} sonata_gap_bond_data_t;
|
||||
|
||||
@@ -1362,21 +1362,21 @@ typedef struct sonata_gap_list_size_ind {
|
||||
|
||||
/// Indicates suggested default data length
|
||||
typedef struct sonata_gap_sugg_dflt_data_len_ind {
|
||||
///Host's suggested value for the Controller's maximum transmitted number of payload octets
|
||||
/// Host's suggested value for the Controller's maximum transmitted number of payload octets
|
||||
uint16_t suggted_max_tx_octets;
|
||||
///Host's suggested value for the Controller's maximum packet transmission time
|
||||
/// Host's suggested value for the Controller's maximum packet transmission time
|
||||
uint16_t suggted_max_tx_time;
|
||||
} sonata_gap_sugg_dflt_data_len_ind_t;
|
||||
|
||||
/// Indicates maximum data length
|
||||
typedef struct sonata_gap_max_data_len_ind {
|
||||
///Maximum number of payload octets that the local Controller supports for transmission
|
||||
/// Maximum number of payload octets that the local Controller supports for transmission
|
||||
uint16_t suppted_max_tx_octets;
|
||||
///Maximum time, in microseconds, that the local Controller supports for transmission
|
||||
/// Maximum time, in microseconds, that the local Controller supports for transmission
|
||||
uint16_t suppted_max_tx_time;
|
||||
///Maximum number of payload octets that the local Controller supports for reception
|
||||
/// Maximum number of payload octets that the local Controller supports for reception
|
||||
uint16_t suppted_max_rx_octets;
|
||||
///Maximum time, in microseconds, that the local Controller supports for reception
|
||||
/// Maximum time, in microseconds, that the local Controller supports for reception
|
||||
uint16_t suppted_max_rx_time;
|
||||
} sonata_gap_max_data_len_ind_t;
|
||||
|
||||
@@ -1420,9 +1420,9 @@ typedef struct sonata_gap_pairing {
|
||||
uint8_t auth;
|
||||
/// Encryption key size (7 to 16)
|
||||
uint8_t key_size;
|
||||
///Initiator key distribution (@see gap_kdist)
|
||||
/// Initiator key distribution (@see gap_kdist)
|
||||
uint8_t ikey_dist;
|
||||
///Responder key distribution (@see gap_kdist)
|
||||
/// Responder key distribution (@see gap_kdist)
|
||||
uint8_t rkey_dist;
|
||||
|
||||
/// Device security requirements (minimum security level). (@see gap_sec_req)
|
||||
@@ -1456,7 +1456,7 @@ typedef struct sonata_gap_connection_cfm {
|
||||
} sonata_gap_connection_cfm_t;
|
||||
|
||||
/// Indicate reception of a IQ Report event over a BLE connection
|
||||
/*@TRACE*/
|
||||
/* @TRACE */
|
||||
typedef struct sonata_gap_cte_iq_report_ind {
|
||||
/// Rx PHY (@see enum gap_phy_val)
|
||||
uint8_t rx_phy;
|
||||
@@ -1534,22 +1534,22 @@ typedef struct sonata_gap_per_adv_iq_report_ind {
|
||||
|
||||
union sonata_gap_bond_cfm_data {
|
||||
/// Pairing Features (request = SONATA_GAP_PAIRING_RSP)
|
||||
//@trc_union parent.request == SONATA_GAP_PAIRING_RSP
|
||||
// @trc_union parent.request == SONATA_GAP_PAIRING_RSP
|
||||
struct sonata_gap_pairing pairing_feat;
|
||||
/// LTK (request = SONATA_GAP_LTK_EXCH)
|
||||
//@trc_union parent.request == SONATA_GAP_LTK_EXCH
|
||||
// @trc_union parent.request == SONATA_GAP_LTK_EXCH
|
||||
struct sonata_gap_ltk ltk;
|
||||
/// CSRK (request = SONATA_GAP_CSRK_EXCH)
|
||||
//@trc_union parent.request == SONATA_GAP_CSRK_EXCH
|
||||
// @trc_union parent.request == SONATA_GAP_CSRK_EXCH
|
||||
struct sonata_gap_sec_key csrk;
|
||||
/// TK (request = SONATA_GAP_TK_EXCH)
|
||||
//@trc_union parent.request == SONATA_GAP_TK_EXCH
|
||||
// @trc_union parent.request == SONATA_GAP_TK_EXCH
|
||||
struct sonata_gap_sec_key tk;
|
||||
/// IRK (request = SONATA_GAP_IRK_EXCH)
|
||||
//@trc_union parent.request == SONATA_GAP_IRK_EXCH
|
||||
// @trc_union parent.request == SONATA_GAP_IRK_EXCH
|
||||
struct sonata_gap_irk irk;
|
||||
/// OOB Confirm and Random from the peer (request = SONATA_GAP_OOB_EXCH)
|
||||
//@trc_union parent.request == SONATA_GAP_OOB_EXCH
|
||||
// @trc_union parent.request == SONATA_GAP_OOB_EXCH
|
||||
struct sonata_gap_oob oob;
|
||||
};
|
||||
|
||||
@@ -1568,7 +1568,7 @@ extern PF_NOTIFY_MESH_PRF_READY pf_notify_mesh_prf_ready;
|
||||
|
||||
/// Ble complete event type
|
||||
typedef enum {
|
||||
//Sonata event Sonata
|
||||
// Sonata event Sonata
|
||||
/// Ble module on complete
|
||||
SONATA_GAP_CMP_BLE_ON = 0x0F01,
|
||||
/// Config advertising mode complete
|
||||
@@ -1604,7 +1604,7 @@ typedef enum {
|
||||
/// Delete period sync mode complete
|
||||
SONATA_GAP_CMP_PERIOD_SYNC_DELETE = 0x0F11,
|
||||
|
||||
//System event GAPM
|
||||
// System event GAPM
|
||||
/// Reset BLE subsystem: LL and HL.
|
||||
SONATA_GAP_CMP_RESET = 0x0101,
|
||||
/// Set device configuration
|
||||
@@ -1660,7 +1660,7 @@ typedef enum {
|
||||
/// Get the RF Path Compensation values used in the TX Power Level and RSSI calculation
|
||||
SONATA_GAP_CMP_GET_DEV_RF_PATH_COMP = 0x01AF,
|
||||
|
||||
//System event GAPC
|
||||
// System event GAPC
|
||||
/// Disconnect
|
||||
SONATA_GAP_CMP_DISCONNECT = 0x0201,
|
||||
/// Retrieve name of peer device.
|
||||
@@ -1685,7 +1685,7 @@ typedef enum {
|
||||
SONATA_GAP_CMP_GET_LE_PING_TO = 0x0212,
|
||||
/// set timer timeout value
|
||||
SONATA_GAP_CMP_SET_LE_PING_TO = 0x0213,
|
||||
/* LE Data Length extension*/
|
||||
/* LE Data Length extension */
|
||||
/// LE Set Data Length
|
||||
SONATA_GAP_CMP_SET_LE_PKT_SIZE = 0x0214,
|
||||
/// Central Address resolution supported
|
||||
@@ -1701,9 +1701,9 @@ typedef enum {
|
||||
/// Constant Tone Extension Response control (enable / disable)
|
||||
SONATA_GAP_CMP_CTE_RSP_CTRL = 0x0223,
|
||||
|
||||
//System event GATTM
|
||||
// System event GATTM
|
||||
|
||||
//System event GATTC
|
||||
// System event GATTC
|
||||
/// Discover all services
|
||||
SONATA_GATT_CMP_DISC_ALL_SVC = 0x0402,
|
||||
/// Read attribute
|
||||
@@ -1727,41 +1727,41 @@ typedef enum {
|
||||
|
||||
typedef struct {
|
||||
/*************** GAP Manager ***************/
|
||||
///@deprecated use @see ble_complete_callback
|
||||
/// @deprecated use @see ble_complete_callback
|
||||
void (*ble_on_complete)(uint16_t status);
|
||||
///@deprecated use @see ble_complete_callback
|
||||
/// @deprecated use @see ble_complete_callback
|
||||
void (*advertising_config_complete)(uint16_t status);
|
||||
///@deprecated use @see ble_complete_callback
|
||||
/// @deprecated use @see ble_complete_callback
|
||||
void (*initiating_config_complete)(uint16_t status);
|
||||
///@deprecated use @see ble_complete_callback
|
||||
/// @deprecated use @see ble_complete_callback
|
||||
void (*scanning_config_complete)(uint16_t status);
|
||||
///@deprecated use @see ble_complete_callback
|
||||
/// @deprecated use @see ble_complete_callback
|
||||
void (*advertising_start_complete)(uint16_t status);
|
||||
///@deprecated use @see ble_complete_callback
|
||||
/// @deprecated use @see ble_complete_callback
|
||||
void (*initiating_start_complete)(uint16_t status);
|
||||
///@deprecated use @see ble_complete_callback
|
||||
/// @deprecated use @see ble_complete_callback
|
||||
void (*scanning_start_complete)(uint16_t status);
|
||||
///@deprecated use @see ble_complete_callback
|
||||
/// @deprecated use @see ble_complete_callback
|
||||
void (*advertising_stopped_complete)(uint16_t reason);
|
||||
///@deprecated use @see ble_complete_callback
|
||||
/// @deprecated use @see ble_complete_callback
|
||||
void (*initiating_stopped_complete)(uint16_t reason);
|
||||
///@deprecated use @see ble_complete_callback
|
||||
/// @deprecated use @see ble_complete_callback
|
||||
void (*scanning_stopped_complete)(uint16_t reason);
|
||||
///@deprecated use @see ble_complete_callback
|
||||
/// @deprecated use @see ble_complete_callback
|
||||
void (*advertising_deleted_complete)(uint16_t status);
|
||||
///@deprecated use @see ble_complete_callback
|
||||
/// @deprecated use @see ble_complete_callback
|
||||
void (*initiating_deleted_complete)(uint16_t status);
|
||||
///@deprecated use @see ble_complete_callback
|
||||
/// @deprecated use @see ble_complete_callback
|
||||
void (*scanning_deleted_complete)(uint16_t status);
|
||||
///@deprecated use @see ble_complete_callback
|
||||
/// @deprecated use @see ble_complete_callback
|
||||
void (*set_advertising_data)(uint16_t status);
|
||||
///@deprecated use @see ble_complete_callback
|
||||
/// @deprecated use @see ble_complete_callback
|
||||
void (*set_white_list_complete)(uint16_t status);
|
||||
///@deprecated use @see ble_complete_callback
|
||||
/// @deprecated use @see ble_complete_callback
|
||||
|
||||
/// Callback for getting device version, BT address, advertising TX power, antenna inf.
|
||||
uint16_t (*get_local_dev_info)(sonata_gap_local_dev_info info_type,
|
||||
void *info);//gap_dev_version,gap_dev_bdaddr,gap_dev_adv_tx_power,gap_antenna_inf,gap_dbg_mem_info
|
||||
void *info); // gap_dev_version,gap_dev_bdaddr,gap_dev_adv_tx_power,gap_antenna_inf,gap_dbg_mem_info
|
||||
|
||||
/// Callback for scan result
|
||||
uint16_t (*gap_scan_result)(sonata_gap_ext_adv_report_ind_t *result);
|
||||
@@ -1801,11 +1801,11 @@ typedef struct {
|
||||
uint8_t clk_acc, uint16_t serv_data, uint8_t addr_type, uint8_t *addr);
|
||||
|
||||
/*************** GAP Controller ***************/
|
||||
///@deprecated use @see ble_complete_callback
|
||||
/// @deprecated use @see ble_complete_callback
|
||||
uint16_t (*gap_disconnect_complete)(uint8_t conidx, uint16_t status);
|
||||
///@deprecated use @see ble_complete_callback
|
||||
/// @deprecated use @see ble_complete_callback
|
||||
void (*gap_params_updated_complete)(uint8_t conidx, uint16_t status);
|
||||
///@deprecated use @see ble_complete_callback
|
||||
/// @deprecated use @see ble_complete_callback
|
||||
void (*gap_bond_complete)(uint8_t conidx, uint16_t status);
|
||||
|
||||
/// Callback for disconnect IND message
|
||||
@@ -1942,7 +1942,7 @@ uint16_t sonata_ble_config_legacy_advertising(uint8_t own_addr_type, sonata_gap_
|
||||
*/
|
||||
uint16_t sonata_ble_config_extended_advertising(uint8_t own_addr_type, sonata_gap_extended_adv_create_param_t *param);
|
||||
|
||||
//uint16_t sonata_ble_config_periodic_advertising(uint8_t own_addr_type, sonata_gap_periodic_adv_create_param_t *param);
|
||||
// uint16_t sonata_ble_config_periodic_advertising(uint8_t own_addr_type, sonata_gap_periodic_adv_create_param_t *param);
|
||||
/*!
|
||||
* @brief Config scanning data
|
||||
* @param own_addr_type: device's address type, @see sonata_gap_own_addr
|
||||
@@ -2370,21 +2370,21 @@ uint8_t *sonata_ble_get_peer_addr(uint8_t connection_id);
|
||||
*/
|
||||
uint16_t sonata_ble_gap_send_connection_cfm(uint8_t conidx, sonata_gap_connection_cfm_t *cfm);
|
||||
|
||||
///@hide
|
||||
/// @hide
|
||||
void sonata_ble_show_connection_info(void);
|
||||
|
||||
struct sonata_gap_bdaddr *sonata_ble_gap_get_bdaddr(uint8_t conidx, uint8_t src);
|
||||
|
||||
///@hide
|
||||
/// @hide
|
||||
uint16_t sonata_ble_gap_cte_set_tx_config(uint8_t conidx, uint8_t cte_types, uint8_t switching_pattern_len,
|
||||
uint8_t *antenna_id);
|
||||
|
||||
///@hide
|
||||
/// @hide
|
||||
uint16_t sonata_ble_gap_cte_response_control(uint8_t conidx, bool enable);
|
||||
|
||||
/** @}*/
|
||||
|
||||
#endif // BLE_HOST_PRESENT
|
||||
|
||||
#endif//_SONATA_GAP_API_H_
|
||||
#endif // _SONATA_GAP_API_H_
|
||||
|
||||
|
||||
@@ -31,9 +31,9 @@
|
||||
****************************************************************************************
|
||||
*/
|
||||
#include "sonata_config.h"
|
||||
///@cond
|
||||
/// @cond
|
||||
#if defined(STACK_BLE_HOST_PRESENT) || defined(BLE_HOST_PRESENT)
|
||||
///@endcond
|
||||
/// @endcond
|
||||
|
||||
#include "sonata_utils_api.h"
|
||||
#include "sonata_att.h"
|
||||
@@ -146,7 +146,7 @@ typedef enum {
|
||||
/// Unregister from peer device events
|
||||
SONATA_GATT_UNREGISTER = 0x11,
|
||||
|
||||
/* Operation flags for sending events to peer device*/
|
||||
/* Operation flags for sending events to peer devicd */
|
||||
/* ************************************************ */
|
||||
/// Send an attribute notification
|
||||
SONATA_GATT_NOTIFY = 0x12,
|
||||
@@ -175,7 +175,7 @@ typedef enum {
|
||||
SONATA_GATT_SVC_CHANGED = 0x40,
|
||||
} sonata_gatt_operation;
|
||||
|
||||
///GATT response type
|
||||
/// GATT response type
|
||||
typedef enum {
|
||||
/// Add service in database response
|
||||
SONATA_GATT_ADD_SVC_RSP = 0x0B01,
|
||||
@@ -211,7 +211,7 @@ typedef enum {
|
||||
/**
|
||||
* Attribute Description
|
||||
*/
|
||||
/*@TRACE*/
|
||||
/* @TRACE */
|
||||
typedef struct sonata_gatt_att_desc {
|
||||
/** Attribute UUID (LSB First) */
|
||||
uint8_t uuid[SONATA_ATT_UUID_128_LEN];
|
||||
@@ -254,7 +254,7 @@ typedef struct sonata_gatt_att_desc {
|
||||
} sonata_gatt_att_desc_t;
|
||||
|
||||
/// Service information
|
||||
/*@TRACE*/
|
||||
/* @TRACE */
|
||||
typedef struct sonata_gatt_svc_info {
|
||||
/// Service start handle
|
||||
uint16_t start_hdl;
|
||||
@@ -269,9 +269,9 @@ typedef struct sonata_gatt_svc_info {
|
||||
/// @brief Callbacks for GATT module
|
||||
typedef struct {
|
||||
/*************** GATT Controller ***************/
|
||||
///@deprecated use @see ble_complete_callback
|
||||
/// @deprecated use @see ble_complete_callback
|
||||
void (*gatt_disc_all_svc_complete)(uint8_t conidx, uint16_t status);
|
||||
///@deprecated use @see ble_complete_callback
|
||||
/// @deprecated use @see ble_complete_callback
|
||||
void (*gatt_read_complete)(uint8_t conidx, uint16_t status);
|
||||
|
||||
/// Callback for discover services
|
||||
@@ -283,11 +283,11 @@ typedef struct {
|
||||
|
||||
/// Callback for discover characteristic
|
||||
uint16_t (*gatt_disc_char)(uint8_t conidx, uint16_t attr_hdl, uint16_t pointer_hdl, uint8_t prop, uint8_t uuid_len,
|
||||
uint8_t *uuid); /*void(*gatt_disc_char_desc)(void);*/
|
||||
uint8_t *uuid); /* void(*gatt_disc_char_desc)(void); */
|
||||
|
||||
/// Callback for discover characteristic description
|
||||
uint16_t (*gatt_disc_char_desc)(uint8_t conidx, uint16_t attr_hdl, uint8_t uuid_len,
|
||||
uint8_t *uuid); /*void(*gatt_disc_char_desc)(void);*/
|
||||
uint8_t *uuid); /* void(*gatt_disc_char_desc)(void); */
|
||||
|
||||
/// Callback for GATT read complete
|
||||
uint16_t (*gatt_read)(uint8_t conidx, uint16_t handle, uint16_t offset, uint16_t length, uint8_t *value);
|
||||
@@ -605,7 +605,7 @@ uint16_t sonata_ble_gatt_send_svc_change_confirm(uint8_t conidx, uint16_t handle
|
||||
uint16_t sonata_ble_gatt_add_service(uint16_t start_hdl, uint8_t perm, uint8_t *uuid,
|
||||
uint8_t nb_att, sonata_gatt_att_desc_t *atts);
|
||||
|
||||
///@deprecated use sonata_ble_gatt_add_service()
|
||||
/// @deprecated use sonata_ble_gatt_add_service()
|
||||
uint16_t sonata_ble_gatt_add_service_request(uint16_t start_hdl, uint8_t perm, uint8_t *uuid,
|
||||
uint8_t nb_att, sonata_gatt_att_desc_t *atts);
|
||||
|
||||
@@ -688,5 +688,5 @@ uint16_t sonata_ble_register_gatt_callback(ble_gatt_callback *cb);
|
||||
|
||||
#endif // BLE_HOST_PRESENT
|
||||
|
||||
#endif //_SONATA_GATT_API_H_
|
||||
#endif // _SONATA_GATT_API_H_
|
||||
|
||||
|
||||
@@ -110,7 +110,7 @@ void sonata_ll_rf_test_end(void);
|
||||
*/
|
||||
void sonata_ll_df_init(void);
|
||||
|
||||
///@cond
|
||||
/// @cond
|
||||
/**
|
||||
****************************************************************************************
|
||||
* @brief ll_pa_test
|
||||
@@ -119,13 +119,13 @@ void sonata_ll_df_init(void);
|
||||
****************************************************************************************
|
||||
*/
|
||||
void sonata_ll_pa_enable(void);
|
||||
///@endcond
|
||||
/// @endcond
|
||||
/** @}*/
|
||||
void sonata_ll_df_cal(void);
|
||||
|
||||
///@cond
|
||||
/// @cond
|
||||
extern bool sonata_rw_df_dbg_enable;
|
||||
///@endcond
|
||||
/// @endcond
|
||||
|
||||
#endif //_SONATA_LL_API_H_
|
||||
#endif // _SONATA_LL_API_H_
|
||||
|
||||
|
||||
@@ -40,12 +40,12 @@
|
||||
*
|
||||
*/
|
||||
typedef enum {
|
||||
SONATA_LOG_NONE, /*!< No log output */
|
||||
SONATA_LOG_ERROR, /*!< Critical errors, software module can not recover on its own */
|
||||
SONATA_LOG_WARN, /*!< Error conditions from which recovery measures have been taken */
|
||||
SONATA_LOG_INFO, /*!< Information messages which describe normal flow of events */
|
||||
SONATA_LOG_DEBUG, /*!< Extra information which is not necessary for normal use (values, pointers, sizes, etc). */
|
||||
SONATA_LOG_VERBOSE /*!< Bigger chunks of debugging information, or frequent messages which can potentially flood the output. */
|
||||
SONATA_LOG_NONE, /* !< No log output */
|
||||
SONATA_LOG_ERROR, /* !< Critical errors, software module can not recover on its own */
|
||||
SONATA_LOG_WARN, /* !< Error conditions from which recovery measures have been taken */
|
||||
SONATA_LOG_INFO, /* !< Information messages which describe normal flow of events */
|
||||
SONATA_LOG_DEBUG, /* !< Extra information which is not necessary for normal use (values, pointers, sizes, etc). */
|
||||
SONATA_LOG_VERBOSE /* !< Bigger chunks of debugging information, or frequent messages which can potentially flood the output. */
|
||||
} sonata_log_level;
|
||||
|
||||
/*
|
||||
@@ -110,7 +110,7 @@ typedef int (*vprintf_like_t)(const char *, va_list);
|
||||
#define LOGD( format, ... ) SONATA_LOG_LEVEL_LOCAL_SIMPLE(SONATA_LOG_DEBUG, format, ##__VA_ARGS__)
|
||||
#define LOGV( format, ... ) SONATA_LOG_LEVEL_LOCAL_SIMPLE(SONATA_LOG_VERBOSE, format, ##__VA_ARGS__)
|
||||
|
||||
#else //CFG_SONATA_LOG
|
||||
#else // CFG_SONATA_LOG
|
||||
|
||||
#define LOGTE( tag, format, ... )
|
||||
#define LOGTW( tag, format, ... )
|
||||
@@ -123,7 +123,7 @@ typedef int (*vprintf_like_t)(const char *, va_list);
|
||||
#define LOGD( format, ... )
|
||||
#define LOGV( format, ... )
|
||||
|
||||
#endif //CFG_SONATA_LOG
|
||||
#endif // CFG_SONATA_LOG
|
||||
|
||||
/*
|
||||
* FUNCTION DEFINITIONS
|
||||
@@ -142,7 +142,7 @@ vprintf_like_t sonata_log_set_vprintf(vprintf_like_t func);
|
||||
*/
|
||||
void sonata_log_level_set(sonata_log_level level);
|
||||
|
||||
//Internal use
|
||||
// Internal use
|
||||
void sonata_logt_write(sonata_log_level level, const char *tag, const char *format, ...);
|
||||
|
||||
#endif // _SONATA_LOG_H_
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -119,7 +119,7 @@ int sonata_prf_bas_send_battery_level(uint8_t batt_id, uint8_t batt_lvl);
|
||||
*/
|
||||
uint16_t sonata_prf_bas_register_callback(prf_bas_callback_t *cb);
|
||||
|
||||
// #endif //(BLE_APP_BATT)
|
||||
// #endif // (BLE_APP_BATT)
|
||||
|
||||
/** @}*/
|
||||
|
||||
|
||||
@@ -30,9 +30,9 @@
|
||||
* INCLUDE FILES
|
||||
****************************************************************************************
|
||||
*/
|
||||
///@cond
|
||||
/// @cond
|
||||
#if BLE_HOST_PRESENT
|
||||
///@endcond
|
||||
/// @endcond
|
||||
#include "sonata_utils_api.h"
|
||||
#include "sonata_api_task.h"
|
||||
|
||||
@@ -128,5 +128,5 @@ extern const sonata_api_subtask_handlers_t prf_diss_api_ke_msg_handlers;
|
||||
|
||||
#endif // BLE_HOST_PRESENT
|
||||
|
||||
#endif //_SONATA_PRF_DISS_API_H_
|
||||
#endif // _SONATA_PRF_DISS_API_H_
|
||||
|
||||
|
||||
@@ -30,9 +30,9 @@
|
||||
* INCLUDE FILES
|
||||
****************************************************************************************
|
||||
*/
|
||||
///@cond
|
||||
/// @cond
|
||||
#if BLE_HOST_PRESENT
|
||||
///@endcond
|
||||
/// @endcond
|
||||
#include "sonata_utils_api.h"
|
||||
#include "gapc_task.h"
|
||||
#include "sonata_api_task.h"
|
||||
@@ -208,7 +208,7 @@
|
||||
#define HID_CONSUMER_MAIL 0xAB // Mail
|
||||
#define HID_CONSUMER_CALCULATOR 0xAC // Calculate
|
||||
#define HID_CONSUMER_MY_COMPUTER 0xAD // My Computor
|
||||
#define HID_CONSUMER_STOP 0xB0 //Stop
|
||||
#define HID_CONSUMER_STOP 0xB0 // Stop
|
||||
#define HID_CONSUMER_SCAN_NEXT_TRK 0xB5 // Scan Next Track
|
||||
#define HID_CONSUMER_SCAN_PREV_TRK 0xB6 // Scan Previous Track
|
||||
#define HID_CONSUMER_PLAY_PAUSE 0xCD // Play/Pause
|
||||
@@ -220,15 +220,15 @@
|
||||
#define HID_CONSUMER_WWW_BACK ((0x02 << 8 & 0xFF) | 0x24) // WWW Back 0x0224
|
||||
|
||||
typedef enum {
|
||||
//HID Information
|
||||
// HID Information
|
||||
SONATA_HOGPD_HID_INFORMATION_CHAR,
|
||||
//HID Control Point
|
||||
// HID Control Point
|
||||
SONATA_HOGPD_HID_CONTROL_POINT_CHAR,
|
||||
//HID Report Map
|
||||
// HID Report Map
|
||||
SONATA_HOGPD_HID_REPORT_MAP_CHAR,
|
||||
//Boot Mouse Input Report
|
||||
// Boot Mouse Input Report
|
||||
SONATA_HOGPD_HID_MOUSE_INPUT_REPORT_CHAR,
|
||||
//Report
|
||||
// Report
|
||||
SONATA_HOGPD_HID_REPORT_CHAR,
|
||||
} sonata_hogpd_info;
|
||||
|
||||
@@ -287,7 +287,7 @@ typedef enum {
|
||||
/// device address
|
||||
SONATA_LEN_BD_ADDRESS = 6,
|
||||
/// bonded dev info len
|
||||
SONATA_LEN_BONDED_DEV_INFO = 218, //218: 3, 290:4,
|
||||
SONATA_LEN_BONDED_DEV_INFO = 218, // 218: 3, 290:4,
|
||||
/// start pair on boot
|
||||
SONATA_LEN_PAIR_ON_BOOT = 1,
|
||||
} sonata_app_nvds_len;
|
||||
@@ -318,33 +318,33 @@ typedef enum {
|
||||
* @brief
|
||||
*/
|
||||
typedef enum {
|
||||
//up
|
||||
// up
|
||||
MOTION_UP = 'U',
|
||||
//down
|
||||
// down
|
||||
MOTION_DOWN = 'D',
|
||||
//left
|
||||
// left
|
||||
MOTION_LEFT = 'L',
|
||||
//right
|
||||
// right
|
||||
MOTION_RIGHT = 'R',
|
||||
//diagonal
|
||||
// diagonal
|
||||
MOTION_DIAGONAL = 'I',
|
||||
//wheel
|
||||
MOTION_WHEEL = 'W',
|
||||
//button
|
||||
// button
|
||||
BUTTON_EVENT = 'B',
|
||||
//multiple motion
|
||||
// multiple motion
|
||||
MOTION_MULTIPLE = 'M',
|
||||
//ADC
|
||||
// ADC
|
||||
MOTION_ADC = 'A',
|
||||
} sonata_mouse_motion;
|
||||
|
||||
/// Report Char. Configuration Flag Values //Report's read and write property
|
||||
/// Report Char. Configuration Flag Values // Report's read and write property
|
||||
typedef enum {
|
||||
/// Input Report
|
||||
SONATA_HOGPD_CFG_REPORT_IN = 0x01,
|
||||
/// Output Report , Report will be Writeable
|
||||
SONATA_HOGPD_CFG_REPORT_OUT = 0x02,
|
||||
//HOGPD_CFG_REPORT_FEAT can be used as a mask to check Report type
|
||||
// HOGPD_CFG_REPORT_FEAT can be used as a mask to check Report type
|
||||
/// Feature Report
|
||||
SONATA_HOGPD_CFG_REPORT_FEAT = 0x03,
|
||||
/// Input report with Write capabilities
|
||||
@@ -378,7 +378,7 @@ typedef enum {
|
||||
} sonata_hogpd_op;
|
||||
|
||||
/// Messages for HID Over GATT Profile Device Role
|
||||
/*@TRACE*/
|
||||
/* @TRACE */
|
||||
enum sonata_hogpd_msg_id {
|
||||
/// Restore bond data the HID Over GATT Profile Device Role Task
|
||||
SONATA_HOGPD_ENABLE_REQ = STACK_TASK_FIRST_MSG(SONATA_TASK_ID_HOGPD),
|
||||
@@ -505,8 +505,8 @@ typedef struct {
|
||||
* --------------------------------------------------------------------------
|
||||
*/
|
||||
typedef struct ps_mouse_report {
|
||||
int16_t repX; //x-quaddec of the mouse
|
||||
int16_t repY; //y-quaddec of the mouse
|
||||
int16_t repX; // x-quaddec of the mouse
|
||||
int16_t repY; // y-quaddec of the mouse
|
||||
} ps_mouse_report_t;
|
||||
|
||||
/*!
|
||||
@@ -660,9 +660,9 @@ void sonata_hogpd_send_error_code(uint8_t conidx, uint8_t operation, uint8_t hid
|
||||
|
||||
/** @}*/
|
||||
|
||||
///@cond
|
||||
/// @cond
|
||||
#endif // BLE_HOST_PRESENT
|
||||
///@endcond
|
||||
/// @endcond
|
||||
|
||||
#endif //_SONATA_PRF_HOGPD_API_H_
|
||||
#endif // _SONATA_PRF_HOGPD_API_H_
|
||||
|
||||
|
||||
@@ -31,9 +31,9 @@
|
||||
****************************************************************************************
|
||||
*/
|
||||
|
||||
///@cond
|
||||
/// @cond
|
||||
#if BLE_HOST_PRESENT
|
||||
///@endcond
|
||||
/// @endcond
|
||||
|
||||
#include "sonata_utils_api.h"
|
||||
|
||||
@@ -122,9 +122,9 @@ enum sonata_hogprh_info {
|
||||
SONATA_HOGPRH_INFO_MAX,
|
||||
};
|
||||
|
||||
///Parameters of the @ref HOGPRH_READ_INFO_RSP message
|
||||
/// Parameters of the @ref HOGPRH_READ_INFO_RSP message
|
||||
typedef struct sonata_hogprh_read_info_req {
|
||||
///Characteristic info @see enum hogprh_info
|
||||
/// Characteristic info @see enum hogprh_info
|
||||
uint8_t info;
|
||||
/// HID Service Instance - From 0 to HOGPRH_NB_HIDS_INST_MAX-1
|
||||
uint8_t hid_idx;
|
||||
@@ -195,7 +195,7 @@ union sonata_hogprh_data {
|
||||
/// - info = HOGPRH_REPORT
|
||||
struct sonata_hogprh_report report;
|
||||
|
||||
///Notification Configuration Value
|
||||
/// Notification Configuration Value
|
||||
/// - info = HOGPRH_REPORT_NTF_CFG
|
||||
uint16_t report_cfg;
|
||||
|
||||
@@ -212,9 +212,9 @@ union sonata_hogprh_data {
|
||||
struct sonata_hogprh_report_map_ref report_map_ref;
|
||||
};
|
||||
|
||||
///Parameters of the @ref HOGPRH_WRITE_REQ message
|
||||
/// Parameters of the @ref HOGPRH_WRITE_REQ message
|
||||
typedef struct sonata_hogprh_write_req {
|
||||
///Characteristic info @see enum hogprh_info
|
||||
/// Characteristic info @see enum hogprh_info
|
||||
uint8_t info;
|
||||
/// HID Service Instance - From 0 to HOGPRH_NB_HIDS_INST_MAX-1
|
||||
uint8_t hid_idx;
|
||||
@@ -290,9 +290,9 @@ extern const sonata_api_subtask_handlers_t prf_hogprh_api_ke_msg_handlers;
|
||||
|
||||
/** @}*/
|
||||
|
||||
///@cond
|
||||
/// @cond
|
||||
#endif // BLE_HOST_PRESENT
|
||||
///@endcond
|
||||
/// @endcond
|
||||
|
||||
#endif //_SONATA_PRF_HOGPRH_API_H_
|
||||
#endif // _SONATA_PRF_HOGPRH_API_H_
|
||||
|
||||
|
||||
@@ -30,9 +30,9 @@
|
||||
****************************************************************************************
|
||||
*/
|
||||
|
||||
///@cond
|
||||
/// @cond
|
||||
#ifdef SONATA_CFG_OTAS
|
||||
///@endcond
|
||||
/// @endcond
|
||||
#include <stdint.h>
|
||||
|
||||
/**
|
||||
@@ -46,13 +46,13 @@
|
||||
****************************************************************************************
|
||||
*/
|
||||
typedef struct prf_ota_callback {
|
||||
///app call before ota start
|
||||
/// app call before ota start
|
||||
void (*prf_ota_before_start)(void);
|
||||
///app call ota start
|
||||
/// app call ota start
|
||||
uint8_t (*prf_ota_start)(uint8_t length, uint8_t *version);
|
||||
///app call ota stop
|
||||
/// app call ota stop
|
||||
void (*prf_ota_stop)(void);
|
||||
///app call ota fail
|
||||
/// app call ota fail
|
||||
void (*prf_ota_fail)(void);
|
||||
} prf_ota_callback_t;
|
||||
|
||||
@@ -106,7 +106,7 @@ uint16_t sonata_prf_ota_register_callback(prf_ota_callback_t *cb);
|
||||
|
||||
/// Table of kernel message handlers
|
||||
extern const sonata_api_subtask_handlers_t sonata_prf_otas_ke_msg_handlers;
|
||||
#endif //SONATA_CFG_OTAS
|
||||
#endif // SONATA_CFG_OTAS
|
||||
|
||||
/** @}*/
|
||||
#endif //SONATA_PRF_OTAS_API_H_
|
||||
#endif // SONATA_PRF_OTAS_API_H_
|
||||
@@ -122,5 +122,5 @@ void sonata_genc_secret_key(uint8_t *secret_key256);
|
||||
|
||||
void sonata_genc_session_key(uint8_t *secret_key, uint8_t *skd, sonata_sec_ecdh_session_key_complete callback);
|
||||
|
||||
#endif //_SONATA_SEC_API_H_
|
||||
#endif // _SONATA_SEC_API_H_
|
||||
|
||||
|
||||
@@ -26,12 +26,12 @@
|
||||
****************************************************************************************
|
||||
*/
|
||||
//////////////////////////////////////////
|
||||
/*user configurable*/
|
||||
/* user configurabld */
|
||||
#ifdef SONATA_CFG_APP
|
||||
#ifndef CFG_APP
|
||||
#define CFG_APP
|
||||
#endif
|
||||
#endif //SONATA_CFG_APP
|
||||
#endif // SONATA_CFG_APP
|
||||
|
||||
#ifdef SONATA_CFG_HOST
|
||||
#ifndef CFG_HOST
|
||||
@@ -55,25 +55,25 @@
|
||||
|
||||
#ifdef SONATA_CFG_BLE_TRANSPORT
|
||||
#define CFG_AHITL
|
||||
#endif //SONATA_CFG_BLE_TRANSPORT
|
||||
#endif // SONATA_CFG_BLE_TRANSPORT
|
||||
|
||||
#endif //SONATA_CFG_HOST
|
||||
#endif // SONATA_CFG_HOST
|
||||
|
||||
#ifdef SONATA_CFG_BLE_TRANSPORT
|
||||
#define CFG_HCITL
|
||||
#endif //SONATA_CFG_BLE_TRANSPORT
|
||||
#endif // SONATA_CFG_BLE_TRANSPORT
|
||||
|
||||
#ifdef SONATA_CFG_OTAS
|
||||
#define CFG_PRF_OTAS
|
||||
#endif //SONATA_CFG_OTAS
|
||||
#endif // SONATA_CFG_OTAS
|
||||
|
||||
#ifdef SONATA_CFG_DIS
|
||||
#define CFG_PRF_DISS
|
||||
#endif //SONATA_CFG_DIS
|
||||
#endif // SONATA_CFG_DIS
|
||||
|
||||
#ifdef SONATA_CFG_BASS
|
||||
#define CFG_PRF_BASS
|
||||
#endif //SONATA_CFG_BASS
|
||||
#endif // SONATA_CFG_BASS
|
||||
|
||||
#ifdef SONATA_CFG_MESH
|
||||
#define CFG_BLE_MESH
|
||||
@@ -84,7 +84,7 @@
|
||||
|
||||
#if ( (defined SONATA_CFG_MESH_DBG) && (defined SONATA_CFG_DBG) )
|
||||
#define CFG_BLE_MESH_DBG
|
||||
#endif //( (defined SONATA_CFG_MESH_DBG) && (defined SONATA_CFG_DBG) )
|
||||
#endif // ( (defined SONATA_CFG_MESH_DBG) && (defined SONATA_CFG_DBG) )
|
||||
|
||||
#define CFG_BLE_MESH_RELAY
|
||||
|
||||
@@ -108,15 +108,15 @@
|
||||
|
||||
#define CFG_BLE_MESH_MDL_LIGHTS
|
||||
|
||||
#endif //SONATA_CFG_MESH
|
||||
#endif // SONATA_CFG_MESH
|
||||
|
||||
#ifdef SONATA_CFG_NVDS
|
||||
#define CFG_NVDS
|
||||
#endif //SONATA_CFG_NVDS
|
||||
#endif // SONATA_CFG_NVDS
|
||||
|
||||
#ifdef SONATA_CFG_DISPLAY
|
||||
#define CFG_DISPLAY
|
||||
#endif //SONATA_CFG_DISPLAY
|
||||
#endif // SONATA_CFG_DISPLAY
|
||||
|
||||
#ifdef SONATA_CFG_DBG
|
||||
#define CFG_DBG
|
||||
@@ -132,7 +132,7 @@
|
||||
#define CFG_TRC_EN
|
||||
|
||||
#define CFG_TRC_ALL
|
||||
#endif //SONATA_CFG_TRC
|
||||
#endif // SONATA_CFG_TRC
|
||||
|
||||
#endif /*SONATA_STACK_CONFIG_H_*/
|
||||
#endif /* SONATA_STACK_CONFIG_H_ */
|
||||
|
||||
|
||||
@@ -21,7 +21,7 @@
|
||||
****************************************************************************************
|
||||
*/
|
||||
//////////////////////////////////////////
|
||||
/*do not alter*/
|
||||
/* do not alter */
|
||||
#ifndef CFG_BLE
|
||||
#define CFG_BLE
|
||||
#endif
|
||||
@@ -55,4 +55,4 @@
|
||||
|
||||
#define CFG_NB_PRF 10
|
||||
|
||||
#endif /*SONATA_STACK_FIXED_CONFIG_H_*/
|
||||
#endif /* SONATA_STACK_FIXED_CONFIG_H_ */
|
||||
@@ -30,5 +30,5 @@
|
||||
|
||||
#define SONATA_CFG_DBG
|
||||
|
||||
#endif /*SONATA_STACK_USER_CONFIG_H_*/
|
||||
#endif /* SONATA_STACK_USER_CONFIG_H_ */
|
||||
|
||||
|
||||
@@ -47,47 +47,46 @@
|
||||
#include <stddef.h> // for NULL and size_t
|
||||
#include "compiler.h" // for __INLINE
|
||||
|
||||
|
||||
/*
|
||||
* DEFINES
|
||||
****************************************************************************************
|
||||
*/
|
||||
|
||||
/// structure of a list element header
|
||||
/*@TRACE*/
|
||||
// structure of a list element header
|
||||
/* @TRACE */
|
||||
struct util_list_hdr {
|
||||
/// Pointer to next util_list_hdr
|
||||
// Pointer to next util_list_hdr
|
||||
struct util_list_hdr *next;
|
||||
};
|
||||
|
||||
/// simplify type name of list element header
|
||||
// simplify type name of list element header
|
||||
typedef struct util_list_hdr util_list_hdr_t;
|
||||
|
||||
/// structure of a list
|
||||
// structure of a list
|
||||
struct util_list {
|
||||
/// pointer to first element of the list
|
||||
// pointer to first element of the list
|
||||
struct util_list_hdr *first;
|
||||
/// pointer to the last element
|
||||
// pointer to the last element
|
||||
struct util_list_hdr *last;
|
||||
|
||||
//#if (KE_PROFILING) //removed for rom code 20200224
|
||||
/// number of element in the list
|
||||
// #if (KE_PROFILING) //removed for rom code 20200224
|
||||
// number of element // rthe list
|
||||
uint32_t cnt;
|
||||
/// max number of element in the list
|
||||
// max number of element in the list
|
||||
uint32_t maxcnt;
|
||||
/// min number of element in the list
|
||||
// min number of element in the list
|
||||
uint32_t mincnt;
|
||||
//#endif //KE_PROFILING //removed for rom code 20200224s
|
||||
};
|
||||
// #endif // KE_PROFILING // removed for rom code 20200224s
|
||||
}; // r
|
||||
|
||||
/// simplify type name of list
|
||||
// simplify type name of list
|
||||
typedef struct util_list util_list_t;
|
||||
|
||||
/*
|
||||
* MACROS
|
||||
****************************************************************************************
|
||||
*/
|
||||
/// pop a specific element from the list
|
||||
// pop a specific element from the list
|
||||
#define UTIL_LIST_POP_ELT(list, elt) util_list_extract(&(list), &((elt)->hdr))
|
||||
|
||||
/*
|
||||
@@ -254,7 +253,6 @@ void util_list_insert_before(struct util_list *list,
|
||||
void util_list_insert_after(struct util_list *list,
|
||||
struct util_list_hdr *elt_ref_hdr, struct util_list_hdr *elt_to_add_hdr);
|
||||
|
||||
|
||||
/**
|
||||
****************************************************************************************
|
||||
* @brief Count number of elements present in the list
|
||||
@@ -294,7 +292,6 @@ __INLINE struct util_list_hdr *util_list_pick(const struct util_list *const list
|
||||
return (list->first);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
****************************************************************************************
|
||||
* @brief Return following element of a list element.
|
||||
@@ -309,5 +306,5 @@ __INLINE struct util_list_hdr *util_list_next(const struct util_list_hdr *const
|
||||
return (list_hdr->next);
|
||||
}
|
||||
|
||||
/// @} UTIL_LIST
|
||||
// @} UTIL_LIST
|
||||
#endif // _UTIL_LIST_H_
|
||||
|
||||
@@ -52,7 +52,7 @@
|
||||
#define SONATA_UTILS_API_TRC printf
|
||||
#else
|
||||
#define SONATA_UTILS_API_TRC(...)
|
||||
#endif //SONATA_API_TASK_DBG
|
||||
#endif // SONATA_API_TASK_DBG
|
||||
|
||||
/// file system first tag id for application
|
||||
#define APP_DATA_SAVE_TAG_FIRST (0x90)
|
||||
@@ -114,9 +114,9 @@ typedef uint8_t sonata_fs_tag_t;
|
||||
* @brief ble addr priority return result
|
||||
*/
|
||||
typedef enum {
|
||||
///efuse > nvds
|
||||
/// efuse > nvds
|
||||
SONATA_MAC_USE_EFUSE,
|
||||
///nvds > efuse
|
||||
/// nvds > efuse
|
||||
SONATA_MAC_USE_NVDS,
|
||||
} SONATA_MAC_PRIORITY;
|
||||
|
||||
@@ -188,13 +188,13 @@ uint16_t sonata_api_send_app_msg(uint8_t op, void *p_param);
|
||||
*/
|
||||
uint16_t sonata_api_app_msg_register(const sonata_api_app_msg_t *msg);
|
||||
|
||||
///@hide
|
||||
/// @hide
|
||||
uint8_t sonata_api_app_ke_msg_handler(void *p_param);
|
||||
|
||||
///@hide
|
||||
/// @hide
|
||||
void sonata_api_util_gap_status_print(uint8_t status);
|
||||
|
||||
///@hide
|
||||
/// @hide
|
||||
void sonata_api_util_gatt_status_print(uint8_t operation, uint8_t status);
|
||||
|
||||
/**
|
||||
@@ -449,5 +449,5 @@ __INLINE uint32_t util_read32p(void const *ptr32)
|
||||
void sonata_platform_reset(void);
|
||||
|
||||
/** @}*/
|
||||
#endif //_SONATA_UTILS_API_H_
|
||||
#endif // _SONATA_UTILS_API_H_
|
||||
|
||||
|
||||
@@ -59,7 +59,7 @@
|
||||
#include "app.h"
|
||||
#if BLE_BATT_SERVER
|
||||
#include "sonata_prf_bass_api.h"
|
||||
#endif //BLE_BATT_SERVER
|
||||
#endif // BLE_BATT_SERVER
|
||||
#ifdef SONATA_RTOS_SUPPORT
|
||||
#include "lega_rtos.h"
|
||||
#endif
|
||||
@@ -96,7 +96,7 @@ typedef struct ble_gatt_att_manager {
|
||||
/*!
|
||||
* @brief save local handle start index
|
||||
*/
|
||||
//Mark for profile dis
|
||||
// Mark for profile dis
|
||||
uint8_t ble_adv_set_state = APP_BLE_ADV_OFF;
|
||||
uint8_t app_connected_state = APP_STATE_DISCONNECTED;
|
||||
uint8_t target_address[SONATA_GAP_BD_ADDR_LEN] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
|
||||
@@ -115,8 +115,8 @@ static uint8_t app_connection_state = 0;
|
||||
static peer_conn_param_t app_peer_conn_param = {0};
|
||||
|
||||
static bool app_bond = false;
|
||||
static uint8_t app_loc_irk[KEY_LEN] = {0}; //Get in app_gap_gen_random_number_callback()
|
||||
//static uint8_t app_loc_irk[KEY_LEN]= {0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x10,0x11,0x12,0x13,0x14,0x15,0x16}; // Get in app_gap_gen_random_number_callback()
|
||||
static uint8_t app_loc_irk[KEY_LEN] = {0}; // Get in app_gap_gen_random_number_callback()
|
||||
// static uint8_t app_loc_irk[KEY_LEN]= {0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x10,0x11,0x12,0x13,0x14,0x15,0x16}; // Get in app_gap_gen_random_number_callback()
|
||||
|
||||
static uint8_t app_rand_cnt = 0;
|
||||
static uint32_t app_passkey_pincode = 0;
|
||||
@@ -130,7 +130,7 @@ bonded_dev_info_list_t bonded_dev_info = {0};
|
||||
uint8_t peer_dbaddr[SONATA_GAP_BD_ADDR_LEN] = {0};
|
||||
uint8_t local_dev_name[APP_BLE_DEVICE_NAME_LEN] = "asr_ble_demo";
|
||||
static connect_req_info_t connect_req_list [APP_BLE_CONNECT_MAX] = { 0 };
|
||||
//static adv_idx_info_t adv_idx_tbl[APP_BLE_ADV_MAX];
|
||||
// static adv_idx_info_t adv_idx_tbl[APP_BLE_ADV_MAX];
|
||||
static enum sonata_gap_io_cap app_iocap = SONATA_GAP_IO_CAP_NO_INPUT_NO_OUTPUT;
|
||||
static enum sonata_gap_auth app_auth = SONATA_GAP_AUTH_REQ_MITM_BOND;
|
||||
static uint8_t app_req_auth = SONATA_GAP_AUTH_REQ_NO_MITM_NO_BOND;
|
||||
@@ -221,7 +221,7 @@ typedef enum {
|
||||
// device address
|
||||
SONATA_LEN_BD_ADDRESS = 6,
|
||||
// bonded dev info len
|
||||
SONATA_LEN_BONDED_DEV_INFO = 218, //218: 3, 290:4,
|
||||
SONATA_LEN_BONDED_DEV_INFO = 218, // 218: 3, 290:4,
|
||||
// start pair on boot
|
||||
SONATA_LEN_PAIR_ON_BOOT = 1,
|
||||
} sonata_app_nvds_len;
|
||||
@@ -374,7 +374,7 @@ void app_ble_config_legacy_advertising(void)
|
||||
sonata_gap_directed_adv_create_param_t param = {0};
|
||||
param.disc_mode = SONATA_GAP_ADV_MODE_GEN_DISC;
|
||||
param.prop = SONATA_GAP_ADV_PROP_UNDIR_CONN_MASK;
|
||||
//param.max_tx_pwr = 0xE2;
|
||||
// param.max_tx_pwr = 0xE2;
|
||||
param.filter_pol = SONATA_ADV_ALLOW_SCAN_ANY_CON_ANY;
|
||||
// msg->adv_param.adv_param.peer_addr.addr.addr:00
|
||||
param.addr_type = SONATA_GAP_STATIC_ADDR;
|
||||
@@ -443,7 +443,7 @@ static uint16_t app_ble_set_adv_data(uint8_t adv_id)
|
||||
{
|
||||
APP_TRC("APP: %s \r\n", __FUNCTION__);
|
||||
|
||||
//Call API
|
||||
// Call API
|
||||
uint16_t ret;
|
||||
|
||||
if (app_ble_adv_data.advdataLen >= 3) {
|
||||
@@ -452,7 +452,7 @@ static uint16_t app_ble_set_adv_data(uint8_t adv_id)
|
||||
ret = sonata_ble_set_advertising_data_byid(adv_id, 0, &app_ble_adv_data.advdata[3]);
|
||||
}
|
||||
printf("adv_data:%d\r\n", adv_id);
|
||||
//Next event:SONATA_GAP_CMP_SET_ADV_DATA
|
||||
// Next event:SONATA_GAP_CMP_SET_ADV_DATA
|
||||
if (ret != API_SUCCESS) {
|
||||
APP_TRC("APP: %s ERROR:%02X\r\n", __FUNCTION__, ret);
|
||||
}
|
||||
@@ -462,14 +462,14 @@ static uint16_t app_ble_set_adv_data(uint8_t adv_id)
|
||||
void app_ble_set_adv_data_default(void)
|
||||
{
|
||||
APP_TRC("APP: %s \r\n", __FUNCTION__);
|
||||
uint8_t advData[] = { //Advertising data format
|
||||
uint8_t advData[] = { // Advertising data format
|
||||
8, SONATA_GAP_AD_TYPE_COMPLETE_NAME, 'A', 'S', 'R', '-', '0', '0', '0',
|
||||
3, SONATA_GAP_AD_TYPE_COMPLETE_LIST_16_BIT_UUID, 0x12, 0x18,
|
||||
3, SONATA_GAP_AD_TYPE_APPEARANCE, 0xC1, 0x03 //0x03C1: HID Keyboard
|
||||
3, SONATA_GAP_AD_TYPE_APPEARANCE, 0xC1, 0x03 // 0x03C1: HID Keyboard
|
||||
};
|
||||
//Call API
|
||||
// Call API
|
||||
uint16_t ret = sonata_ble_set_advertising_data(sizeof(advData), advData);
|
||||
//Next event:SONATA_GAP_CMP_SET_ADV_DATA
|
||||
// Next event:SONATA_GAP_CMP_SET_ADV_DATA
|
||||
if (ret != API_SUCCESS) {
|
||||
APP_TRC("APP: %s ERROR:%02X\r\n", __FUNCTION__, ret);
|
||||
}
|
||||
@@ -479,11 +479,11 @@ static uint16_t app_ble_set_scansponse_data(uint8_t adv_id)
|
||||
{
|
||||
APP_TRC("APP: %s \r\n", __FUNCTION__);
|
||||
|
||||
//Call API
|
||||
// Call API
|
||||
|
||||
uint16_t ret = sonata_ble_set_scan_response_data_byid(adv_id, app_ble_scan_data.respdataLen,
|
||||
app_ble_scan_data.respdata);
|
||||
//Next event:SONATA_GAP_CMP_SET_ADV_DATA
|
||||
// Next event:SONATA_GAP_CMP_SET_ADV_DATA
|
||||
if (ret != API_SUCCESS) {
|
||||
APP_TRC("APP: %s ERROR:%02X\r\n", __FUNCTION__, ret);
|
||||
ble_adv_state = BLE_ADV_STATE_CREATED;
|
||||
@@ -502,7 +502,7 @@ uint8_t app_get_adv_status()
|
||||
|
||||
static void app_ble_print_info(void)
|
||||
{
|
||||
//Print device info
|
||||
// Print device info
|
||||
// uint8_t dev_name_saved[APPNV_LEN_LOCAL_DEVICE_NAME] = {0};
|
||||
// app_nv_get_local_device_name(dev_name_saved, true);
|
||||
// printf("\r\n----BLE NAME[%s] ----\r\n", dev_name_saved + 1);
|
||||
@@ -515,10 +515,10 @@ static void app_ble_print_info(void)
|
||||
uint16_t app_ble_start_advertising(uint8_t adv_id)
|
||||
{
|
||||
APP_TRC("APP: %s adv %d\r\n", __FUNCTION__, adv_id);
|
||||
//Call api
|
||||
// Call api
|
||||
|
||||
uint16_t ret = sonata_ble_start_advertising_byid(adv_id, app_duration, app_duration);
|
||||
//Next event:SONATA_GAP_CMP_ADVERTISING_START
|
||||
// Next event:SONATA_GAP_CMP_ADVERTISING_START
|
||||
if (ret != API_SUCCESS) {
|
||||
APP_TRC("APP: %s ERROR:%02X\r\n", __FUNCTION__, ret);
|
||||
}
|
||||
@@ -537,10 +537,10 @@ uint16_t app_ble_advertising_stop(uint8_t adv_id)
|
||||
if (ble_adv_state != BLE_ADV_STATE_STARTED) {
|
||||
return API_FAILURE;
|
||||
}
|
||||
//Call api
|
||||
// Call api
|
||||
ble_adv_state = BLE_ADV_STATE_STOPPING;
|
||||
uint16_t ret = sonata_ble_stop_advertising_byid(adv_id);
|
||||
//Next event:SONATA_GAP_CMP_ADVERTISING_START
|
||||
// Next event:SONATA_GAP_CMP_ADVERTISING_START
|
||||
if (ret != API_SUCCESS) {
|
||||
APP_TRC("APP: %s ERROR:%02X\r\n", __FUNCTION__, ret);
|
||||
}
|
||||
@@ -556,7 +556,7 @@ uint16_t app_ble_stop_adv(uint8_t adv_id)
|
||||
return API_FAILURE;
|
||||
}
|
||||
uint16_t ret = sonata_ble_stop_advertising_byid(adv_id);
|
||||
//Next event:SONATA_GAP_CMP_ADVERTISING_START
|
||||
// Next event:SONATA_GAP_CMP_ADVERTISING_START
|
||||
if (ret != API_SUCCESS) {
|
||||
APP_TRC("APP: %s ERROR:%02X\r\n", __FUNCTION__, ret);
|
||||
}
|
||||
@@ -604,7 +604,7 @@ void app_ble_config_scanning(void)
|
||||
{
|
||||
APP_TRC("APP: %s \r\n", __FUNCTION__);
|
||||
uint16_t ret = sonata_ble_config_scanning(SONATA_GAP_STATIC_ADDR);
|
||||
//Next event:SONATA_GAP_CMP_SCANNING_CONFIG
|
||||
// Next event:SONATA_GAP_CMP_SCANNING_CONFIG
|
||||
if (ret != API_SUCCESS) {
|
||||
APP_TRC("APP: %s ERROR:%02X\r\n", __FUNCTION__, ret);
|
||||
}
|
||||
@@ -621,7 +621,7 @@ void app_ble_start_scanning(void)
|
||||
param.type = SONATA_GAP_SCAN_TYPE_OBSERVER;
|
||||
// For continuous scan, use OBSERVER type, use duration to control scan timeer.
|
||||
// if duration=0, will scan for ever until sonata_ble_stop_scanning() called
|
||||
//param.type = SONATA_GAP_SCAN_TYPE_OBSERVER;
|
||||
// param.type = SONATA_GAP_SCAN_TYPE_OBSERVER;
|
||||
param.prop = SONATA_GAP_SCAN_PROP_ACTIVE_1M_BIT | SONATA_GAP_SCAN_PROP_PHY_1M_BIT; // 0x05
|
||||
param.dup_filt_pol = SONATA_GAP_DUP_FILT_EN;
|
||||
param.scan_param_1m.scan_intv = 0x0140;
|
||||
@@ -631,7 +631,7 @@ void app_ble_start_scanning(void)
|
||||
param.duration = 0;
|
||||
param.period = 0;
|
||||
uint16_t ret = sonata_ble_start_scanning(¶m);
|
||||
//Scan result will show in app_gap_scan_result_callback()
|
||||
// Scan result will show in app_gap_scan_result_callback()
|
||||
if (ret != API_SUCCESS) {
|
||||
APP_TRC("APP: %s ERROR:%02X\r\n", __FUNCTION__, ret);
|
||||
}
|
||||
@@ -649,9 +649,9 @@ void app_ble_stop_scanning(void)
|
||||
void app_ble_config_initiating(void)
|
||||
{
|
||||
APP_TRC("APP: %s \r\n", __FUNCTION__);
|
||||
//Call api to config init
|
||||
// Call api to config init
|
||||
uint16_t ret = sonata_ble_config_initiating(SONATA_GAP_STATIC_ADDR);
|
||||
//Next event:SONATA_GAP_CMP_INITIATING_CONFIG
|
||||
// Next event:SONATA_GAP_CMP_INITIATING_CONFIG
|
||||
if (ret != API_SUCCESS) {
|
||||
APP_TRC("APP: %s ERROR:%02X\r\n", __FUNCTION__, ret);
|
||||
}
|
||||
@@ -725,7 +725,7 @@ void app_ble_start_initiating(uint8_t *target)
|
||||
}
|
||||
|
||||
uint16_t ret = sonata_ble_start_initiating(¶m);
|
||||
//Next event:If connected, SONATA_GAP_CMP_INITIATING_DELETE event will be received
|
||||
// Next event:If connected, SONATA_GAP_CMP_INITIATING_DELETE event will be received
|
||||
if (ret != API_SUCCESS) {
|
||||
APP_TRC("APP: %s ERROR:%02X\r\n", __FUNCTION__, ret);
|
||||
}
|
||||
@@ -816,7 +816,7 @@ static void test_adv_h(void)
|
||||
sonata_gap_directed_adv_create_param_t param = {0};
|
||||
param.disc_mode = SONATA_GAP_ADV_MODE_GEN_DISC;
|
||||
param.prop = SONATA_GAP_ADV_PROP_UNDIR_CONN_MASK;
|
||||
//param.max_tx_pwr = 0xE2;
|
||||
// param.max_tx_pwr = 0xE2;
|
||||
param.filter_pol = SONATA_ADV_ALLOW_SCAN_ANY_CON_ANY;
|
||||
// msg->adv_param.adv_param.peer_addr.addr.addr:00
|
||||
param.addr_type = SONATA_GAP_STATIC_ADDR;
|
||||
@@ -845,14 +845,14 @@ static uint16_t app_ble_complete_event_handler(sonata_ble_complete_type opt_id,
|
||||
dwparam);
|
||||
uint16_t cb_result = CB_DONE;
|
||||
switch (opt_id) {
|
||||
case SONATA_GAP_CMP_BLE_ON://0x0F01
|
||||
//ble_adv_set_state = APP_BLE_ADV_ON;
|
||||
//test_adv_h();
|
||||
case SONATA_GAP_CMP_BLE_ON: // 0x0F01
|
||||
// ble_adv_set_state = APP_BLE_ADV_ON;
|
||||
// test_adv_h();
|
||||
if (ble_cb_fun != NULL) {
|
||||
ble_cb_fun(MS_BLE_STACK_EVENT_STACK_READY);
|
||||
}
|
||||
break;
|
||||
case SONATA_GAP_CMP_ADVERTISING_CONFIG://0x0F02
|
||||
case SONATA_GAP_CMP_ADVERTISING_CONFIG: // 0x0F02
|
||||
current_adv_id = param;
|
||||
if (ble_adv_set_state == APP_BLE_ADV_ON) {
|
||||
ble_adv_state = BLE_ADV_STATE_SETTING_ADV_DATA;
|
||||
@@ -867,7 +867,7 @@ static uint16_t app_ble_complete_event_handler(sonata_ble_complete_type opt_id,
|
||||
app_ble_set_adv_data_default();
|
||||
}
|
||||
break;
|
||||
case SONATA_GAP_CMP_SET_ADV_DATA://0x01A9
|
||||
case SONATA_GAP_CMP_SET_ADV_DATA: // 0x01A9
|
||||
if (ble_adv_set_state == APP_BLE_ADV_ON) {
|
||||
if (API_SUCCESS == app_ble_set_scansponse_data(current_adv_id)) {
|
||||
if (ble_adv_state == BLE_ADV_STATE_SETTING_ADV_DATA) {
|
||||
@@ -918,7 +918,7 @@ static uint16_t app_ble_complete_event_handler(sonata_ble_complete_type opt_id,
|
||||
}
|
||||
}
|
||||
break;
|
||||
case SONATA_GAP_CMP_ADVERTISING_START ://0x0F06
|
||||
case SONATA_GAP_CMP_ADVERTISING_START: // 0x0F06
|
||||
|
||||
APP_TRC("ble_adv_state: %d set state %d\r\n", ble_adv_state, ble_adv_set_state);
|
||||
ble_adv_state = BLE_ADV_STATE_STARTED;
|
||||
@@ -956,39 +956,39 @@ static uint16_t app_ble_complete_event_handler(sonata_ble_complete_type opt_id,
|
||||
APP_TRC("SONATA_GAP_CMP_ADVERTISING_DELETE %d!!!! \r\n", param);
|
||||
ble_adv_state = BLE_ADV_STATE_IDLE;
|
||||
break;
|
||||
case SONATA_GAP_CMP_SCANNING_CONFIG ://0x0F03
|
||||
case SONATA_GAP_CMP_SCANNING_CONFIG: // 0x0F03
|
||||
app_ble_start_scanning();
|
||||
break;
|
||||
case SONATA_GAP_CMP_SCANNING_START ://0x0F07
|
||||
case SONATA_GAP_CMP_SCANNING_START: // 0x0F07
|
||||
APP_TRC("ACP: %s SONATA_GAP_CMP_SCANNING_START \r\n", __FUNCTION__);
|
||||
//app_add_profiles();
|
||||
// app_add_profiles();
|
||||
break;
|
||||
case SONATA_GAP_CMP_PROFILE_TASK_ADD://0x011B
|
||||
case SONATA_GAP_CMP_PROFILE_TASK_ADD: // 0x011B
|
||||
break;
|
||||
case SONATA_GAP_CMP_SCANNING_STOP://0x0F08
|
||||
cb_result = CB_REJECT; //delete scan instance
|
||||
case SONATA_GAP_CMP_SCANNING_STOP: // 0x0F08
|
||||
cb_result = CB_REJECT; // delete scan instance
|
||||
break;
|
||||
case SONATA_GAP_CMP_SCANNING_DELETE ://0x0F0F
|
||||
case SONATA_GAP_CMP_SCANNING_DELETE: // 0x0F0F
|
||||
break;
|
||||
case SONATA_GAP_CMP_INITIATING_CONFIG ://0x0F04
|
||||
case SONATA_GAP_CMP_INITIATING_CONFIG: // 0x0F04
|
||||
app_ble_start_initiating(target_address);
|
||||
break;
|
||||
case SONATA_GAP_CMP_INITIATING_STOP:
|
||||
cb_result = CB_REJECT; //delete scan instance
|
||||
cb_result = CB_REJECT; // delete scan instance
|
||||
break;
|
||||
case SONATA_GAP_CMP_INITIATING_DELETE ://0x0F10
|
||||
case SONATA_GAP_CMP_INITIATING_DELETE: // 0x0F10
|
||||
if (gAppEnv.appUuids.service != 0) {
|
||||
sonata_ble_gatt_disc_all_characteristic(ble_connect_id, 1, 0XFFFF);
|
||||
}
|
||||
//sonata_ble_gatt_disc_all_descriptor(ble_connect_id, 1, 0XFFFF);
|
||||
// sonata_ble_gatt_disc_all_descriptor(ble_connect_id, 1, 0XFFFF);
|
||||
break;
|
||||
case SONATA_GATT_CMP_NOTIFY:
|
||||
APP_TRC("APP_COMPLETE: %s SONATA_GATT_CMP_NOTIFY, seq:%d \r\n", __FUNCTION__, (uint16_t)dwparam);
|
||||
break;
|
||||
case SONATA_GATT_CMP_DISC_ALL_SVC://0x0402
|
||||
//sonata_ble_gatt_read_by_handle(param, demo_handle_id);
|
||||
case SONATA_GATT_CMP_DISC_ALL_SVC: // 0x0402
|
||||
// sonata_ble_gatt_read_by_handle(param, demo_handle_id);
|
||||
break;
|
||||
case SONATA_GATT_CMP_READ ://0x0408
|
||||
case SONATA_GATT_CMP_READ: // 0x0408
|
||||
break;
|
||||
case SONATA_GAP_CMP_SECURITY_REQ:
|
||||
APP_TRC("APP_COMPLETE: %s SONATA_GAP_CMP_SECURITY_REQ, seq:%d \r\n", __FUNCTION__, (uint16_t) dwparam);
|
||||
@@ -1020,7 +1020,7 @@ static uint16_t app_ble_complete_event_handler(sonata_ble_complete_type opt_id,
|
||||
}
|
||||
break;
|
||||
case SONATA_GAP_CMP_RESET:
|
||||
//APP_TRC("APP_COMPLETE: %s SONATA_GAP_CMP_RESET, seq:%d \r\n",__FUNCTION__,(uint16_t)dwparam);
|
||||
// APP_TRC("APP_COMPLETE: %s SONATA_GAP_CMP_RESET, seq:%d \r\n",__FUNCTION__,(uint16_t)dwparam);
|
||||
ble_reset_cmp();
|
||||
break;
|
||||
default:
|
||||
@@ -1037,7 +1037,7 @@ static void app_ble_gatt_add_srv_rsp_hand(uint16_t handle)
|
||||
service_reg_env.reg_list[service_reg_env.reg_nb]->state = SONATA_SERVICE_ENABLE;
|
||||
service_reg_env.reg_list[service_reg_env.reg_nb]->start_hdl = handle;
|
||||
service_reg_env.reg_nb++;
|
||||
//print_serv_env();
|
||||
// print_serv_env();
|
||||
if (service_reg_env.add_nb != service_reg_env.reg_nb) {
|
||||
APP_TRC("add new service\r\n");
|
||||
uint8_t perm = service_reg_env.reg_list[service_reg_env.reg_nb]->perm;
|
||||
@@ -1068,7 +1068,7 @@ static uint16_t app_ble_rsp_event_handler(uint16_t opt_id, uint8_t status, uint1
|
||||
switch (opt_id) {
|
||||
case SONATA_GATT_ADD_SVC_RSP: {
|
||||
APP_TRC("APP_RESPONSE: %s handle=%04X,\r\n", __FUNCTION__, handle);
|
||||
//Should save the start handle id for future use
|
||||
// Should save the start handle id for future use
|
||||
app_ble_gatt_add_srv_rsp_hand(handle);
|
||||
break;
|
||||
}
|
||||
@@ -1097,7 +1097,7 @@ static uint16_t app_get_dev_info_callback(sonata_gap_local_dev_info info_type, v
|
||||
APP_TRC("APP_CB: %s, lmp_subver =0x%04X\r\n", __FUNCTION__, dev_info->lmp_subver);
|
||||
APP_TRC("APP_CB: %s, host_subver =0x%04X\r\n", __FUNCTION__, dev_info->host_subver);
|
||||
APP_TRC("APP_CB: %s, manuf_name =0x%04X\r\n", __FUNCTION__, dev_info->manuf_name);
|
||||
#endif //SONATA_API_TASK_DBG
|
||||
#endif // SONATA_API_TASK_DBG
|
||||
}
|
||||
break;
|
||||
case SONATA_GET_DEV_BDADDR: {
|
||||
@@ -1108,7 +1108,7 @@ static uint16_t app_get_dev_info_callback(sonata_gap_local_dev_info info_type, v
|
||||
APP_TRC("%02X ", param->addr.addr.addr[i]);
|
||||
}
|
||||
APP_TRC("\r\n");
|
||||
#endif //SONATA_API_TASK_DBG
|
||||
#endif // SONATA_API_TASK_DBG
|
||||
}
|
||||
break;
|
||||
|
||||
@@ -1116,14 +1116,14 @@ static uint16_t app_get_dev_info_callback(sonata_gap_local_dev_info info_type, v
|
||||
#if APP_DBG
|
||||
sonata_gap_dev_adv_tx_power_ind_t *param = (sonata_gap_dev_adv_tx_power_ind_t *) info;
|
||||
APP_TRC("APP_CB: %s, SONATA_GET_DEV_ADV_TX_POWER power_lvl =0x%02X\r\n", __FUNCTION__, param->power_lvl);
|
||||
#endif //SONATA_API_TASK_DBG
|
||||
#endif // SONATA_API_TASK_DBG
|
||||
}
|
||||
break;
|
||||
case SONATA_GET_WLIST_SIZE: {
|
||||
#if APP_DBG
|
||||
sonata_gap_list_size_ind_t *param = (sonata_gap_list_size_ind_t *) info;
|
||||
APP_TRC("APP_CB: %s, SONATA_GET_WLIST_SIZE size =0x%02X\r\n", __FUNCTION__, param->size);
|
||||
#endif //SONATA_API_TASK_DBG
|
||||
#endif // SONATA_API_TASK_DBG
|
||||
|
||||
break;
|
||||
}
|
||||
@@ -1132,7 +1132,7 @@ static uint16_t app_get_dev_info_callback(sonata_gap_local_dev_info info_type, v
|
||||
sonata_gap_antenna_inf_ind_t *param = (sonata_gap_antenna_inf_ind_t *) info;
|
||||
APP_TRC(">>> SONATA_GET_ANTENNA_INFO supp_switching_sampl_rates =0x%02X, antennae_num =0x%02X, max_switching_pattern_len =0x%02X, max_cte_len =0x%02X\r\n",
|
||||
param->supp_switching_sampl_rates, param->antennae_num, param->max_switching_pattern_len, param->max_cte_len);
|
||||
#endif //SONATA_API_TASK_DBG
|
||||
#endif // SONATA_API_TASK_DBG
|
||||
}
|
||||
break;
|
||||
|
||||
@@ -1141,7 +1141,7 @@ static uint16_t app_get_dev_info_callback(sonata_gap_local_dev_info info_type, v
|
||||
sonata_gap_sugg_dflt_data_len_ind_t *param = (sonata_gap_sugg_dflt_data_len_ind_t *) info;
|
||||
APP_TRC(">>> SONATA_GET_SUGGESTED_DFLT_LE_DATA_LEN suggted_max_tx_octets =0x%02X, suggted_max_tx_time =0x%02X\r\n",
|
||||
param->suggted_max_tx_octets, param->suggted_max_tx_time);
|
||||
#endif //SONATA_API_TASK_DBG
|
||||
#endif // SONATA_API_TASK_DBG
|
||||
break;
|
||||
}
|
||||
case SONATA_GET_MAX_LE_DATA_LEN: {
|
||||
@@ -1149,28 +1149,28 @@ static uint16_t app_get_dev_info_callback(sonata_gap_local_dev_info info_type, v
|
||||
sonata_gap_max_data_len_ind_t *param = (sonata_gap_max_data_len_ind_t *) info;
|
||||
APP_TRC(">>> SONATA_GET_MAX_LE_DATA_LEN suppted_max_tx_octets =0x%04X, suppted_max_tx_time =0x%04X, suppted_max_rx_octets =0x%04X, suppted_max_rx_time =0x%04X\r\n",
|
||||
param->suppted_max_tx_octets, param->suppted_max_tx_time, param->suppted_max_rx_octets, param->suppted_max_rx_time);
|
||||
#endif //SONATA_API_TASK_DBG
|
||||
#endif // SONATA_API_TASK_DBG
|
||||
break;
|
||||
}
|
||||
case SONATA_GET_PAL_SIZE: {
|
||||
#if APP_DBG
|
||||
sonata_gap_list_size_ind_t *param = (sonata_gap_list_size_ind_t *) info;
|
||||
APP_TRC("APP_CB: %s, SONATA_GET_PAL_SIZE size =0x%02X\r\n", __FUNCTION__, param->size);
|
||||
#endif //SONATA_API_TASK_DBG
|
||||
#endif // SONATA_API_TASK_DBG
|
||||
break;
|
||||
}
|
||||
case SONATA_GET_RAL_SIZE: {
|
||||
#if APP_DBG
|
||||
sonata_gap_list_size_ind_t *param = (sonata_gap_list_size_ind_t *) info;
|
||||
APP_TRC("APP_CB: %s, SONATA_GET_RAL_SIZE size =0x%02X\r\n", __FUNCTION__, param->size);
|
||||
#endif //SONATA_API_TASK_DBG
|
||||
#endif // SONATA_API_TASK_DBG
|
||||
break;
|
||||
}
|
||||
case SONATA_GET_NB_ADV_SETS: {
|
||||
#if APP_DBG
|
||||
sonata_gap_nb_adv_sets_ind_t *param = (sonata_gap_nb_adv_sets_ind_t *) info;
|
||||
APP_TRC("APP_CB: %s, SONATA_GET_NB_ADV_SETS nb_adv_sets =0x%02X\r\n", __FUNCTION__, param->nb_adv_sets);
|
||||
#endif //SONATA_API_TASK_DBG
|
||||
#endif // SONATA_API_TASK_DBG
|
||||
|
||||
break;
|
||||
}
|
||||
@@ -1178,7 +1178,7 @@ static uint16_t app_get_dev_info_callback(sonata_gap_local_dev_info info_type, v
|
||||
#if APP_DBG
|
||||
sonata_gap_max_adv_data_len_ind_t *param = (sonata_gap_max_adv_data_len_ind_t *) info;
|
||||
APP_TRC(">>> SONATA_GET_MAX_LE_ADV_DATA_LEN param->length=0x%02X\r\n", param->length);
|
||||
#endif //SONATA_API_TASK_DBG
|
||||
#endif // SONATA_API_TASK_DBG
|
||||
break;
|
||||
}
|
||||
case SONATA_GET_DEV_TX_PWR: {
|
||||
@@ -1186,7 +1186,7 @@ static uint16_t app_get_dev_info_callback(sonata_gap_local_dev_info info_type, v
|
||||
sonata_gap_dev_tx_pwr_ind_t *param = (sonata_gap_dev_tx_pwr_ind_t *) info;
|
||||
APP_TRC(">>> SONATA_GET_DEV_TX_PWR min_tx_pwr =0x%04X, max_tx_pwr =0x%04X\r\n",
|
||||
param->min_tx_pwr, param->max_tx_pwr);
|
||||
#endif //SONATA_API_TASK_DBG
|
||||
#endif // SONATA_API_TASK_DBG
|
||||
break;
|
||||
}
|
||||
case SONATA_GET_DEV_RF_PATH_COMP: {
|
||||
@@ -1194,7 +1194,7 @@ static uint16_t app_get_dev_info_callback(sonata_gap_local_dev_info info_type, v
|
||||
sonata_gap_dev_rf_path_comp_ind_t *param = (sonata_gap_dev_rf_path_comp_ind_t *) info;
|
||||
APP_TRC(">>> SONATA_GET_DEV_RF_PATH_COMP tx_path_comp =0x%04X, rx_path_comp =0x%04X\r\n",
|
||||
param->tx_path_comp, param->rx_path_comp);
|
||||
#endif //SONATA_API_TASK_DBG
|
||||
#endif // SONATA_API_TASK_DBG
|
||||
break;
|
||||
}
|
||||
default:
|
||||
@@ -1304,7 +1304,7 @@ static uint16_t app_gap_disconnect_ind_callback(uint8_t conidx, uint16_t conhdl,
|
||||
}
|
||||
app_connect_req_list_del(conidx);
|
||||
app_active_delete(conidx);
|
||||
//test_adv_h();
|
||||
// test_adv_h();
|
||||
return CB_DONE;
|
||||
}
|
||||
|
||||
@@ -1333,7 +1333,7 @@ void app_ble_gatt_add_srv_rsp(uint16_t handle)
|
||||
|
||||
ble_gatt_att_reg_list_t *app_ble_get_reg_list_by_handle(uint16_t handle)
|
||||
{
|
||||
//print_serv_env();
|
||||
// print_serv_env();
|
||||
for (int i = 0; i < service_reg_env.reg_nb; i++) {
|
||||
ble_gatt_att_reg_list_t *p_list = service_reg_env.reg_list[i];
|
||||
printf("nb_att:%d\r\n", p_list->nb_att);
|
||||
@@ -1361,8 +1361,8 @@ void app_ble_gatt_read_request_handler(uint16_t handle, uint16_t *p_length, uint
|
||||
void app_user_config_write_cb(uint16_t handle, uint8_t *data, uint16_t size)
|
||||
{
|
||||
static uint16_t s_indicateEnable = 0;
|
||||
//printf("user_config_write_cb\r\n");
|
||||
if (size != sizeof(s_indicateEnable)) { //Size check
|
||||
// printf("user_config_write_cb\r\n");
|
||||
if (size != sizeof(s_indicateEnable)) { // Size check
|
||||
return ;
|
||||
}
|
||||
s_indicateEnable = *(uint16_t *)data;
|
||||
@@ -1408,7 +1408,7 @@ static uint16_t app_gatt_disc_svc_callback(uint8_t connection_id, uint16_t start
|
||||
uint8_t uuid_len, uint8_t *uuid)
|
||||
{
|
||||
uint16_t service_uuid = 0;
|
||||
//APP_TRC("APP_CB: %s, start_hdl=0x%04X, end_hdl =0x%04X, uuid=", __FUNCTION__, start_hdl, end_hdl);
|
||||
// APP_TRC("APP_CB: %s, start_hdl=0x%04X, end_hdl =0x%04X, uuid=", __FUNCTION__, start_hdl, end_hdl);
|
||||
|
||||
for (int i = 0; i < uuid_len; ++i) {
|
||||
// APP_TRC("%02X", uuid[i]);
|
||||
@@ -1434,9 +1434,9 @@ static uint16_t app_gatt_disc_char_callback(uint8_t conidx, uint16_t attr_hdl, u
|
||||
uint8_t uuid_len, uint8_t *uuid)
|
||||
{
|
||||
uint16_t char_uuid = 0;
|
||||
//APP_TRC("APP_CB: %s, attr_hdl=0x%04X, uuid=", __FUNCTION__, attr_hdl);
|
||||
// APP_TRC("APP_CB: %s, attr_hdl=0x%04X, uuid=", __FUNCTION__, attr_hdl);
|
||||
for (int i = 0; i < uuid_len; ++i) {
|
||||
//APP_TRC("%02X", uuid[i]);
|
||||
// APP_TRC("%02X", uuid[i]);
|
||||
if (i == 0) {
|
||||
char_uuid = uuid[i];
|
||||
}
|
||||
@@ -1470,9 +1470,9 @@ static uint16_t app_gatt_disc_desc_callback(uint8_t conidx, uint16_t attr_hdl, u
|
||||
{
|
||||
uint16_t service_uuid = 0;
|
||||
|
||||
//APP_TRC("APP_CB: %s, attr_hdl=0x%04X, uuid=", __FUNCTION__, attr_hdl);
|
||||
// APP_TRC("APP_CB: %s, attr_hdl=0x%04X, uuid=", __FUNCTION__, attr_hdl);
|
||||
for (int i = 0; i < uuid_len; ++i) {
|
||||
//APP_TRC("%02X", uuid[i]);
|
||||
// APP_TRC("%02X", uuid[i]);
|
||||
if (i == 0) {
|
||||
service_uuid = uuid[i];
|
||||
}
|
||||
@@ -1513,7 +1513,7 @@ void app_ble_gatt_data_send(uint16_t local_handle, uint16_t idx, uint16_t length
|
||||
if (NULL == p_list) {
|
||||
return;
|
||||
}
|
||||
//idx = 5;
|
||||
// idx = 5;
|
||||
uint16_t localhandle = p_list->start_hdl + idx;
|
||||
|
||||
APP_TRC("localhandle %ld\r\n", localhandle);
|
||||
@@ -1531,7 +1531,7 @@ void app_ble_gatt_data_send_notify(uint16_t local_handle, uint16_t idx, uint16_t
|
||||
if (NULL == p_list) {
|
||||
return;
|
||||
}
|
||||
//idx = 5;
|
||||
// idx = 5;
|
||||
uint16_t localhandle = p_list->start_hdl + idx;
|
||||
|
||||
int32_t send_status = sonata_ble_gatt_send_notify_event(0, localhandle, length, p_value);
|
||||
@@ -1577,15 +1577,15 @@ static uint8_t app_ble_search_svc(uint8_t *service_uuid)
|
||||
|
||||
int app_ble_gatt_add_svc_helper(uint16_t *start_hdl, uint8_t nb_att, ble_gatt_att_reg_t *atts)
|
||||
{
|
||||
//printf("ble_gatt_add_svc_helper\r\n");
|
||||
// printf("ble_gatt_add_svc_helper\r\n");
|
||||
|
||||
uint8_t perm = atts[0].att_desc.perm;
|
||||
//PERM_SET(perm, SVC_UUID_LEN,2);
|
||||
// PERM_SET(perm, SVC_UUID_LEN,2);
|
||||
uint8_t uuid[SONATA_ATT_UUID_128_LEN];
|
||||
uint16_t svc_hdl = *start_hdl;
|
||||
uint8_t local_idx;
|
||||
APP_TRC("nb_att %d\r\n", nb_att);
|
||||
memmove(uuid, atts[0].att_desc.uuid, SONATA_ATT_UUID_128_LEN); //the first should servicce attr!!!
|
||||
memmove(uuid, atts[0].att_desc.uuid, SONATA_ATT_UUID_128_LEN); // the first should servicce attr!!!
|
||||
local_idx = app_ble_search_svc(uuid);
|
||||
if (MAX_SERVICE_NUM != local_idx) {
|
||||
APP_TRC("found service %d\r\n", local_idx);
|
||||
@@ -1618,7 +1618,7 @@ int app_ble_gatt_add_svc_helper(uint16_t *start_hdl, uint8_t nb_att, ble_gatt_at
|
||||
att_desc[i].perm = atts[i].att_desc.perm;
|
||||
att_desc[i].max_len = atts[i].att_desc.max_len;
|
||||
att_desc[i].ext_perm = atts[i].att_desc.ext_perm;
|
||||
//PERM_SET(msg->svc_desc.atts[i].ext_perm, UUID_LEN,2);
|
||||
// PERM_SET(msg->svc_desc.atts[i].ext_perm, UUID_LEN,2);
|
||||
memcpy(att_desc[i].uuid, atts[i].att_desc.uuid, SONATA_ATT_UUID_128_LEN);
|
||||
}
|
||||
APP_TRC("nb_att %d\r\n", p_list->nb_att);
|
||||
@@ -1642,7 +1642,7 @@ int app_ble_gatt_add_svc_helper(uint16_t *start_hdl, uint8_t nb_att, ble_gatt_at
|
||||
#if (defined ALIOS_SUPPORT) || (defined HARMONYOS_SUPPORT)
|
||||
lega_rtos_exit_critical();
|
||||
#endif
|
||||
//print_serv_env();
|
||||
// print_serv_env();
|
||||
|
||||
sonata_ble_gatt_add_service_request(svc_hdl, perm, uuid, nb_att - 1, &att_desc[1]);
|
||||
sonata_api_free(att_desc);
|
||||
@@ -1740,13 +1740,13 @@ void app_gap_notify_pair_request_rsp(uint8_t *bd_addr, uint8_t accept)
|
||||
uint8_t key_size = SONATA_GAP_SMP_MAX_ENC_SIZE_LEN;
|
||||
enum sonata_gap_oob_auth oob = SONATA_GAP_OOB_AUTH_DATA_NOT_PRESENT;
|
||||
enum sonata_gap_kdist ikey_dist = SONATA_GAP_KDIST_LINKKEY; // Initiator key distribution
|
||||
enum sonata_gap_kdist rkey_dist = SONATA_GAP_KDIST_NONE; //Responder key distribution
|
||||
enum sonata_gap_kdist rkey_dist = SONATA_GAP_KDIST_NONE; // Responder key distribution
|
||||
enum sonata_gap_sec_req sec_req = SONATA_GAP_NO_SEC;
|
||||
//ikey_dist = GAP_KDIST_ENCKEY | GAP_KDIST_IDKEY;
|
||||
// ikey_dist = GAP_KDIST_ENCKEY | GAP_KDIST_IDKEY;
|
||||
// ikey_dist = GAP_KDIST_NONE;
|
||||
// rkey_dist = GAP_KDIST_NONE;
|
||||
ikey_dist = SONATA_GAP_KDIST_ENCKEY | SONATA_GAP_KDIST_IDKEY; //Initiator key distribution
|
||||
rkey_dist = SONATA_GAP_KDIST_ENCKEY | SONATA_GAP_KDIST_IDKEY; //Responder key distribution
|
||||
ikey_dist = SONATA_GAP_KDIST_ENCKEY | SONATA_GAP_KDIST_IDKEY; // Initiator key distribution
|
||||
rkey_dist = SONATA_GAP_KDIST_ENCKEY | SONATA_GAP_KDIST_IDKEY; // Responder key distribution
|
||||
sec_req = SONATA_GAP_NO_SEC;
|
||||
uint8_t conidx = app_get_conidx_by_addr(bd_addr);
|
||||
sonata_ble_gap_send_bond_cfm_for_pairing_req(conidx, NULL, accept,
|
||||
@@ -1783,7 +1783,7 @@ static uint16_t app_gap_bond_req_callback(uint8_t conidx, struct sonata_gap_bond
|
||||
uint8_t counter = 0;
|
||||
struct sonata_gap_ltk data_ltk = {0};
|
||||
uint8_t accept = 1;
|
||||
//uint8_t request = SONATA_GAP_LTK_EXCH;
|
||||
// uint8_t request = SONATA_GAP_LTK_EXCH;
|
||||
|
||||
// Generate all the values
|
||||
data_ltk.ediv = (uint16_t)util_rand_word();
|
||||
@@ -1905,7 +1905,7 @@ static uint16_t app_gap_bond_callback(uint8_t conidx, struct sonata_gap_bond_ind
|
||||
struct sonata_gap_bdaddr *bdaddr = sonata_ble_gap_get_bdaddr(conidx, SONATA_GAP_SMP_INFO_PEER);
|
||||
if (sonata_fs_write(SONATA_TAG_PEER_BD_ADDRESS, SONATA_LEN_PEER_BD_ADDRESS, bdaddr->addr.addr) != SONATA_FS_OK) {
|
||||
// An error has occurred during access to the FS
|
||||
//ASSERT_ERR(3694, 0);
|
||||
// ASSERT_ERR(3694, 0);
|
||||
} else {
|
||||
APP_TRC("peer_addr:");
|
||||
for (int i = SONATA_GAP_BD_ADDR_LEN - 1; i >= 0; --i) {
|
||||
@@ -1942,11 +1942,11 @@ static uint16_t app_gap_bond_callback(uint8_t conidx, struct sonata_gap_bond_ind
|
||||
}
|
||||
break;
|
||||
case SONATA_GAP_PAIRING_FAILED:
|
||||
//Reason see (SONATA_GAP_SMP_REM_ERR_MASK|smp_pair_fail_reason)
|
||||
// Reason see (SONATA_GAP_SMP_REM_ERR_MASK|smp_pair_fail_reason)
|
||||
APP_TRC("APP_CB: %s SONATA_GAP_PAIRING_FAILED,Reason:%02X(X)\r\n", __FUNCTION__, ind->data.reason);
|
||||
//app_ble_config_scanning();
|
||||
//app_stop_scan_timer_start();
|
||||
//sonata_ble_gap_start_security(conidx, GAP_AUTH_REQ_MITM_BOND);
|
||||
// app_ble_config_scanning();
|
||||
// app_stop_scan_timer_start();
|
||||
// sonata_ble_gap_start_security(conidx, GAP_AUTH_REQ_MITM_BOND);
|
||||
sonata_ble_gap_disconnect(conidx, SONATA_CO_ERROR_CONN_REJ_SECURITY_REASONS);
|
||||
break;
|
||||
case SONATA_GAP_LTK_EXCH:
|
||||
@@ -1997,7 +1997,7 @@ static uint16_t app_gap_bond_callback(uint8_t conidx, struct sonata_gap_bond_ind
|
||||
uint8_t app_check_device_isbonded(uint16_t in_ediv, uint8_t *in_nb)
|
||||
{
|
||||
APP_TRC("APP_CB: %s \r\n", __FUNCTION__);
|
||||
//check the latest device first
|
||||
// check the latest device first
|
||||
for (int i = bonded_dev_info.current_dev_index; i < MAX_BONDED_DEV_NUM; i++) {
|
||||
if (in_ediv == bonded_dev_info.bonded_device_info[i].ltk.ediv &&
|
||||
!memcmp(&in_nb[0], bonded_dev_info.bonded_device_info[i].ltk.randnb, SONATA_GAP_RAND_NB_LEN)) {
|
||||
@@ -2319,7 +2319,7 @@ static uint16_t app_gap_connection_req_callback(uint8_t conidx, sonata_gap_conne
|
||||
ble_connect_id = conidx;
|
||||
app_connect_req_list_add(req->peer_addr.addr, conidx);
|
||||
APP_TRC("ble_connect_id %d \r\n", ble_connect_id);
|
||||
//sonata_ble_gatt_exchange_mtu(conidx);
|
||||
// sonata_ble_gatt_exchange_mtu(conidx);
|
||||
app_connected_state = APP_STATE_CONNECTED;
|
||||
if (ble_cb_fun != NULL) {
|
||||
ble_cb_fun(MS_BLE_STACK_EVENT_CONNECTED);
|
||||
@@ -2339,7 +2339,7 @@ static uint16_t app_gap_connection_req_callback(uint8_t conidx, sonata_gap_conne
|
||||
connectionCfm.auth = SONATA_GAP_AUTH_REQ_SEC_CON_BOND;
|
||||
|
||||
sonata_ble_gap_send_connection_cfm(conidx, &connectionCfm);
|
||||
return CB_DONE; //SDK will send connection confirm message
|
||||
return CB_DONE; // SDK will send connection confirm message
|
||||
} else {
|
||||
sonata_gap_connection_cfm_t connectionCfm = {0};
|
||||
connectionCfm.auth = SONATA_GAP_AUTH_REQ_NO_MITM_NO_BOND;
|
||||
@@ -2357,7 +2357,7 @@ static uint16_t app_gap_connection_req_callback(uint8_t conidx, sonata_gap_conne
|
||||
*/
|
||||
static uint16_t app_gatt_read_request_callback(uint8_t connection_id, uint16_t handle)
|
||||
{
|
||||
//APP_TRC("APP_CB: %s, handle=0x%04X,custom_svc_start_handle=0x%04X", __FUNCTION__,handle,custom_svc_start_handle);
|
||||
// APP_TRC("APP_CB: %s, handle=0x%04X,custom_svc_start_handle=0x%04X", __FUNCTION__,handle,custom_svc_start_handle);
|
||||
APP_TRC("APP_CB: %s, handle=0x%04X,\r\n", __FUNCTION__, handle);
|
||||
uint16_t length = 250;
|
||||
uint8_t *value = sonata_api_malloc(length);
|
||||
@@ -2370,7 +2370,7 @@ static uint16_t app_gatt_read_request_callback(uint8_t connection_id, uint16_t h
|
||||
static uint16_t app_gatt_read_callback(uint8_t conidx, uint16_t handle, uint16_t offset, uint16_t length,
|
||||
uint8_t *value)
|
||||
{
|
||||
//APP_TRC("APP_CB: %s, handle=0x%04X,custom_svc_start_handle=0x%04X", __FUNCTION__,handle,custom_svc_start_handle);
|
||||
// APP_TRC("APP_CB: %s, handle=0x%04X,custom_svc_start_handle=0x%04X", __FUNCTION__,handle,custom_svc_start_handle);
|
||||
APP_TRC("APP_CB: %s, handle=0x%04X,\r\n", __FUNCTION__, handle);
|
||||
return CB_REJECT;
|
||||
}
|
||||
@@ -2387,7 +2387,7 @@ static uint16_t app_gatt_read_callback(uint8_t conidx, uint16_t handle, uint16_t
|
||||
static uint16_t app_gatt_write_request_callback(uint8_t connection_id, uint16_t handle, uint16_t offset,
|
||||
uint16_t length, uint8_t *value)
|
||||
{
|
||||
//APP_TRC("APP_CB: %s, handle=0x%04X,custom_svc_start_handle=0x%04X", __FUNCTION__,handle,custom_svc_start_handle);
|
||||
// APP_TRC("APP_CB: %s, handle=0x%04X,custom_svc_start_handle=0x%04X", __FUNCTION__,handle,custom_svc_start_handle);
|
||||
APP_TRC("APP_CB: %s, handle=0x%04X offset %d\r\n", __FUNCTION__, handle, offset);
|
||||
|
||||
sonata_ble_gatt_send_write_confirm(connection_id, handle, SONATA_GAP_ERR_NO_ERROR);
|
||||
@@ -2425,7 +2425,7 @@ static uint16_t app_gatt_mtu_changed_callback(uint8_t connection_id, uint16_t mt
|
||||
*/
|
||||
static uint16_t app_gatt_att_info_req_ind_callback(uint8_t connection_id, uint16_t handle)
|
||||
{
|
||||
//APP_TRC("APP_CB: %s, handle=0x%04X,custom_svc_start_handle=0x%04X", __FUNCTION__,handle,custom_svc_start_handle);
|
||||
// APP_TRC("APP_CB: %s, handle=0x%04X,custom_svc_start_handle=0x%04X", __FUNCTION__,handle,custom_svc_start_handle);
|
||||
APP_TRC("APP_CB: %s, handle=0x%04X\r\n", __FUNCTION__, handle);
|
||||
uint16_t length = 0;
|
||||
uint8_t status;
|
||||
@@ -2541,10 +2541,10 @@ uint16_t gap_active_stopped_callback(uint8_t actv_idx, uint8_t type, uint8_t rea
|
||||
}
|
||||
}
|
||||
if (SONATA_GAP_ACTV_TYPE_SCAN == type) {
|
||||
return CB_REJECT; //delete scan instance
|
||||
return CB_REJECT; // delete scan instance
|
||||
}
|
||||
if (SONATA_GAP_ACTV_TYPE_INIT == type) {
|
||||
return CB_REJECT; //delete init instance
|
||||
return CB_REJECT; // delete init instance
|
||||
}
|
||||
return CB_DONE;
|
||||
}
|
||||
@@ -2552,27 +2552,27 @@ uint16_t gap_active_stopped_callback(uint8_t actv_idx, uint8_t type, uint8_t rea
|
||||
static ble_gap_callback ble_gap_callbacks = {
|
||||
/*************** GAP Manager's callback ***************/
|
||||
|
||||
//Must if use scan function, peer's information will show in this callback
|
||||
// Must if use scan function, peer's information will show in this callback
|
||||
.gap_scan_result = app_gap_scan_result_callback,
|
||||
//Optional, use for get local devcie informations when call sonata_ble_get_dev_info()
|
||||
// Optional, use for get local devcie informations when call sonata_ble_get_dev_info()
|
||||
.get_local_dev_info = app_get_dev_info_callback,
|
||||
|
||||
/*************** GAP Controller's callback ***************/
|
||||
//Optional
|
||||
// Optional
|
||||
.gap_param_update_req = app_gap_param_update_req_callback,
|
||||
//Optional
|
||||
// Optional
|
||||
.gap_param_updated = app_gap_param_updated_callback,
|
||||
//Optional, used for get peer att information when call sonata_ble_gap_get_peer_info()
|
||||
// Optional, used for get peer att information when call sonata_ble_gap_get_peer_info()
|
||||
.gap_get_peer_info = app_gap_peer_info_callback,
|
||||
//Optional, used for get peer att information when call sonata_ble_gap_get_peer_info()
|
||||
// Optional, used for get peer att information when call sonata_ble_gap_get_peer_info()
|
||||
.gap_get_peer_att_info = app_gap_peer_att_info_callback,
|
||||
//Optional, if peer device get local device's information, app can deal with it in this callback
|
||||
// Optional, if peer device get local device's information, app can deal with it in this callback
|
||||
.gap_peer_get_local_info = app_gap_peer_get_local_info_callback,
|
||||
//Optional
|
||||
// Optional
|
||||
.gap_disconnect_ind = app_gap_disconnect_ind_callback,
|
||||
//Optional, if peer device set local device's name, app can deal with it in this callback
|
||||
// Optional, if peer device set local device's name, app can deal with it in this callback
|
||||
.gap_peer_set_local_device_name = app_gap_peer_set_local_device_name_callback,
|
||||
//Optional, app can save peer mac address in this callback when connected
|
||||
// Optional, app can save peer mac address in this callback when connected
|
||||
.gap_connection_req = app_gap_connection_req_callback,
|
||||
.gap_active_stopped = gap_active_stopped_callback,
|
||||
.gap_bond_req = app_gap_bond_req_callback,
|
||||
@@ -2586,31 +2586,31 @@ static ble_gap_callback ble_gap_callbacks = {
|
||||
};
|
||||
|
||||
static ble_gatt_callback ble_gatt_callbacks = {
|
||||
//Optional, add this callback if app need to save changed mtu value
|
||||
// Optional, add this callback if app need to save changed mtu value
|
||||
.gatt_mtu_changed = app_gatt_mtu_changed_callback,
|
||||
//Must,If app add custom service, app should add this callback to deal with peer device read request
|
||||
// Must,If app add custom service, app should add this callback to deal with peer device read request
|
||||
.gatt_read_req = app_gatt_read_request_callback,
|
||||
.gatt_read = app_gatt_read_callback,
|
||||
//Must,If app add custom service, app should add this callback to deal with peer device write request
|
||||
// Must,If app add custom service, app should add this callback to deal with peer device write request
|
||||
.gatt_write_req = app_gatt_write_request_callback,
|
||||
//Must if use discovery all servcie function
|
||||
// Must if use discovery all servcie function
|
||||
.gatt_disc_svc = app_gatt_disc_svc_callback,
|
||||
//Must if use discovery all characteristic function
|
||||
// Must if use discovery all characteristic function
|
||||
.gatt_disc_char = app_gatt_disc_char_callback,
|
||||
//Must if use discovery all description function
|
||||
// Must if use discovery all description function
|
||||
.gatt_disc_char_desc = app_gatt_disc_desc_callback,
|
||||
.gatt_event = app_gatt_event_callback,
|
||||
.gatt_att_info_req = app_gatt_att_info_req_ind_callback,
|
||||
};
|
||||
|
||||
static ble_complete_callback ble_complete_callbacks = {
|
||||
//Must, app can do next operation in this callback
|
||||
// Must, app can do next operation in this callback
|
||||
.ble_complete_event = app_ble_complete_event_handler,
|
||||
};
|
||||
|
||||
static ble_response_callback ble_rsp_callbacks = {
|
||||
//Must,IF app add custom service, add should save this service's start handler id,
|
||||
//this id will be used in app_gatt_read_request_callback() and app_gatt_write_request_callback()
|
||||
// Must,IF app add custom service, add should save this service's start handler id,
|
||||
// this id will be used in app_gatt_read_request_callback() and app_gatt_write_request_callback()
|
||||
.ble_rsp_event = app_ble_rsp_event_handler,
|
||||
};
|
||||
|
||||
|
||||
@@ -216,7 +216,7 @@ void lega_ble_test_mode(char *pwbuf, int blen, int argc, char **argv)
|
||||
int c = 1;
|
||||
if (strcmp(argv[c], "on") == 0) {
|
||||
printf("ble test on \r\n");
|
||||
//gpio1 output
|
||||
// gpio1 output
|
||||
g_duet_gpio11.port = GPIO11_INDEX;
|
||||
g_duet_gpio11.config = DUET_OUTPUT_PUSH_PULL;
|
||||
g_duet_gpio11.priv = NULL;
|
||||
|
||||
@@ -113,7 +113,7 @@ int app_core_evt_ind_cb_h(app_core_evt_ind_t evt, void *p_param)
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Initialize the Bluetooth protocol stack.*/
|
||||
/* Initialize the Bluetooth protocol stack. */
|
||||
int InitBtStack(void)
|
||||
{
|
||||
return BT_STATUS_SUCCESS;
|
||||
|
||||
@@ -50,4 +50,4 @@ void lega_exit_critical_expble(void);
|
||||
|
||||
void duet_write32_bit(uint32_t reg, uint8_t start_bit, uint8_t len, uint32_t src_val);
|
||||
uint32_t duet_read32_bit(uint32_t reg, uint8_t start_bit, uint8_t len);
|
||||
#endif //_LEGA_COMM_H_
|
||||
#endif // _LEGA_COMM_H_
|
||||
|
||||
@@ -65,4 +65,4 @@ extern char *component_info(uint32_t module_t);
|
||||
}\
|
||||
}while(0)
|
||||
|
||||
#endif //_LEGA_DBG_H_
|
||||
#endif // _LEGA_DBG_H_
|
||||
|
||||
@@ -112,5 +112,5 @@ inline static uint16_t __fswap16(uint16_t x)
|
||||
#define wlan_htons(x) __cpu_to_be16(x)
|
||||
// #define ntohs(x) __be16_to_cpu(x)
|
||||
|
||||
#endif //_TYPES_H_
|
||||
#endif // _TYPES_H_
|
||||
|
||||
|
||||
@@ -17,43 +17,43 @@
|
||||
#define _DUET_H_
|
||||
#include <stdint.h>
|
||||
#include <stdio.h>
|
||||
#if 0 //use duet_cm33.h
|
||||
#if 0 // use duet_cm33.h
|
||||
typedef enum { RESET = 0, SET = !RESET} FlagStatus, ITstatus;
|
||||
typedef enum { DISABLE = 0, ENABLE = !DISABLE } State;
|
||||
|
||||
typedef enum IRQn {
|
||||
/************** Processor Exceptions Numbers ******************************************/
|
||||
NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt */
|
||||
MemoryManagement_IRQn = -12, /*!< 4 Cortex-M3 Memory Management Interrupt */
|
||||
BusFault_IRQn = -11, /*!< 5 Cortex-M3 Bus Fault Interrupt */
|
||||
UsageFault_IRQn = -10, /*!< 6 Cortex-M3 Usage Fault Interrupt */
|
||||
SVCall_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */
|
||||
DebugMonitor_IRQn = -4, /*!< 12 Cortex-M3 Debug Monitor Interrupt */
|
||||
PendSV_IRQn = -2, /*!< 14 Cortex-M3 Pend SV Interrupt */
|
||||
SysTick_IRQn = -1, /*!< 15 Cortex-M3 System Tick Interrupt */
|
||||
NonMaskableInt_IRQn = -14, /* !< 2 Non Maskable Interrupt */
|
||||
MemoryManagement_IRQn = -12, /* !< 4 Cortex-M3 Memory Management Interrupt */
|
||||
BusFault_IRQn = -11, /* !< 5 Cortex-M3 Bus Fault Interrupt */
|
||||
UsageFault_IRQn = -10, /* !< 6 Cortex-M3 Usage Fault Interrupt */
|
||||
SVCall_IRQn = -5, /* !< 11 Cortex-M3 SV Call Interrupt */
|
||||
DebugMonitor_IRQn = -4, /* !< 12 Cortex-M3 Debug Monitor Interrupt */
|
||||
PendSV_IRQn = -2, /* !< 14 Cortex-M3 Pend SV Interrupt */
|
||||
SysTick_IRQn = -1, /* !< 15 Cortex-M3 System Tick Interrupt */
|
||||
/****** Interrupt Numbers *******************************************************/
|
||||
CEVA_RW_IP_IRQn = 0, /*!< CEVA RW IP Interrupt */
|
||||
SLEEP_IRQn = 1, /*!< Sleep Wake-Up Interrupt */
|
||||
WDG_IRQn = 2, /*!< Window WatchDog */
|
||||
FLASH_IRQn = 3, /*!< FLASH Interrupt */
|
||||
GPIO_IRQn = 4, /*!< GPIO Interrupt */
|
||||
TIMER_IRQn = 5, /*!< Timer Interrupt */
|
||||
CRYPTOCELL310_IRQn = 6, /*!< CryptoCell 310 Interrupt */
|
||||
DMA_IRQn = 7, /*!< Generic DMA Ctrl Interrupt */
|
||||
UART0_IRQn = 8, /*!< UART0 Interrupt */
|
||||
UART1_IRQn = 9, /*!< UART1 Interrupt */
|
||||
UART2_IRQn = 10, /*!< UART2 Interrupt */
|
||||
SPI0_IRQn = 11, /*!< SPI0 Interrupt */
|
||||
SPI1_IRQn = 12, /*!< SPI1 Interrupt */
|
||||
SPI2_IRQn = 13, /*!< SPI2 */
|
||||
I2C0_IRQn = 14, /*!< I2C0 Interrupt */
|
||||
I2C1_IRQn = 15, /*!< I2C1 Interrupt */
|
||||
SDIO_IRQn = 16, /*!< SDIO Combined Interrupt */
|
||||
D_APLL_UNLOCK_IRQn = 17, /*!< RF added: D_APLL_UNLOCK Interrupt */
|
||||
D_SX_UNLOCK_IRQn = 18, /*!< RF added: D_SX_UNLOCK Interrupt */
|
||||
PLF_WAKEUP_IRQn = 23, /*!< WiFi Platform Wake-Up Interrupt */
|
||||
I2S_IRQn = 24, /*!< I2S Interrupt */
|
||||
RW_BLE_IRQn = 25, /*!< BLE Interrupt */
|
||||
CEVA_RW_IP_IRQn = 0, /* !< CEVA RW IP Interrupt */
|
||||
SLEEP_IRQn = 1, /* !< Sleep Wake-Up Interrupt */
|
||||
WDG_IRQn = 2, /* !< Window WatchDog */
|
||||
FLASH_IRQn = 3, /* !< FLASH Interrupt */
|
||||
GPIO_IRQn = 4, /* !< GPIO Interrupt */
|
||||
TIMER_IRQn = 5, /* !< Timer Interrupt */
|
||||
CRYPTOCELL310_IRQn = 6, /* !< CryptoCell 310 Interrupt */
|
||||
DMA_IRQn = 7, /* !< Generic DMA Ctrl Interrupt */
|
||||
UART0_IRQn = 8, /* !< UART0 Interrupt */
|
||||
UART1_IRQn = 9, /* !< UART1 Interrupt */
|
||||
UART2_IRQn = 10, /* !< UART2 Interrupt */
|
||||
SPI0_IRQn = 11, /* !< SPI0 Interrupt */
|
||||
SPI1_IRQn = 12, /* !< SPI1 Interrupt */
|
||||
SPI2_IRQn = 13, /* !< SPI2 */
|
||||
I2C0_IRQn = 14, /* !< I2C0 Interrupt */
|
||||
I2C1_IRQn = 15, /* !< I2C1 Interrupt */
|
||||
SDIO_IRQn = 16, /* !< SDIO Combined Interrupt */
|
||||
D_APLL_UNLOCK_IRQn = 17, /* !< RF added: D_APLL_UNLOCK Interrupt */
|
||||
D_SX_UNLOCK_IRQn = 18, /* !< RF added: D_SX_UNLOCK Interrupt */
|
||||
PLF_WAKEUP_IRQn = 23, /* !< WiFi Platform Wake-Up Interrupt */
|
||||
I2S_IRQn = 24, /* !< I2S Interrupt */
|
||||
RW_BLE_IRQn = 25, /* !< BLE Interrupt */
|
||||
} IRQn_Type;
|
||||
#endif
|
||||
#include "duet_cm4.h"
|
||||
@@ -70,17 +70,17 @@ typedef enum IRQn {
|
||||
typedef struct Sys_Con_Block {
|
||||
union {
|
||||
struct {
|
||||
__IO uint32_t hclk_src_sel: 2;
|
||||
__IO uint32_t pclk_div_sel: 3;
|
||||
__IO uint32_t kp_sclk_sel: 1;
|
||||
__IO uint32_t timer1_sclk_sel: 1;
|
||||
__IO uint32_t timer2_sclk_sel: 1;
|
||||
__IO uint32_t timer3_sclk_sel: 1;
|
||||
__IO uint32_t timer4_sclk_sel: 1;
|
||||
__IO uint32_t hclk_src_sel : 2;
|
||||
__IO uint32_t pclk_div_sel : 3;
|
||||
__IO uint32_t kp_sclk_sel : 1;
|
||||
__IO uint32_t timer1_sclk_sel : 1;
|
||||
__IO uint32_t timer2_sclk_sel : 1;
|
||||
__IO uint32_t timer3_sclk_sel : 1;
|
||||
__IO uint32_t timer4_sclk_sel : 1;
|
||||
__IO uint32_t rw_mst_clk_freq_sel: 6;
|
||||
__I uint32_t rsv0: 1;
|
||||
__IO uint32_t pwm_pclk_sel: 1;
|
||||
__I uint32_t rsv1: 14;
|
||||
__I uint32_t rsv0 : 1;
|
||||
__IO uint32_t pwm_pclk_sel : 1;
|
||||
__I uint32_t rsv1 : 14;
|
||||
} BITS_CLK_SEL;
|
||||
__IO uint32_t REG_00;
|
||||
};
|
||||
@@ -94,10 +94,10 @@ typedef struct Sys_Con_Block {
|
||||
/* I2S clock divider */
|
||||
union {
|
||||
struct {
|
||||
__IO uint32_t i2s_ws_div: 8;
|
||||
__IO uint32_t i2s_sclk_div: 8;
|
||||
__IO uint32_t i2s_mclk_div: 8;
|
||||
__IO uint32_t RESV3: 8;
|
||||
__IO uint32_t i2s_ws_div : 8;
|
||||
__IO uint32_t i2s_sclk_div : 8;
|
||||
__IO uint32_t i2s_mclk_div : 8;
|
||||
__IO uint32_t RESV3 : 8;
|
||||
} BITS_REG_20;
|
||||
__IO uint32_t REG_20;
|
||||
};
|
||||
@@ -120,53 +120,53 @@ typedef struct Sys_Con_Block {
|
||||
__IO uint32_t REG_64;
|
||||
union {
|
||||
struct {
|
||||
__IO uint32_t zr_gp0_sel: 4;
|
||||
__IO uint32_t zr_gp1_sel: 4;
|
||||
__IO uint32_t zr_gp2_sel: 4;
|
||||
__IO uint32_t zr_gp3_sel: 4;
|
||||
__IO uint32_t zr_gp4_sel: 4;
|
||||
__IO uint32_t zr_gp5_sel: 4;
|
||||
__IO uint32_t zr_gp6_sel: 4;
|
||||
__IO uint32_t zr_gp7_sel: 4;
|
||||
__IO uint32_t zr_gp0_sel : 4;
|
||||
__IO uint32_t zr_gp1_sel : 4;
|
||||
__IO uint32_t zr_gp2_sel : 4;
|
||||
__IO uint32_t zr_gp3_sel : 4;
|
||||
__IO uint32_t zr_gp4_sel : 4;
|
||||
__IO uint32_t zr_gp5_sel : 4;
|
||||
__IO uint32_t zr_gp6_sel : 4;
|
||||
__IO uint32_t zr_gp7_sel : 4;
|
||||
} BITS_REG_68;
|
||||
__IO uint32_t REG_68; /* pinmux control */
|
||||
};
|
||||
union {
|
||||
struct {
|
||||
__IO uint32_t zr_gp8_sel: 4;
|
||||
__IO uint32_t zr_gp9_sel: 4;
|
||||
__IO uint32_t zr_gp10_sel: 4;
|
||||
__IO uint32_t zr_gp11_sel: 4;
|
||||
__IO uint32_t zr_gp12_sel: 4;
|
||||
__IO uint32_t zr_gp13_sel: 4;
|
||||
__IO uint32_t zr_gp14_sel: 4;
|
||||
__IO uint32_t zr_gp15_sel: 4;
|
||||
__IO uint32_t zr_gp8_sel : 4;
|
||||
__IO uint32_t zr_gp9_sel : 4;
|
||||
__IO uint32_t zr_gp10_sel : 4;
|
||||
__IO uint32_t zr_gp11_sel : 4;
|
||||
__IO uint32_t zr_gp12_sel : 4;
|
||||
__IO uint32_t zr_gp13_sel : 4;
|
||||
__IO uint32_t zr_gp14_sel : 4;
|
||||
__IO uint32_t zr_gp15_sel : 4;
|
||||
} BITS_REG_6C;
|
||||
__IO uint32_t REG_6C; /* pinmux control */
|
||||
};
|
||||
union {
|
||||
struct {
|
||||
__IO uint32_t zr_gp16_sel: 4;
|
||||
__IO uint32_t zr_gp17_sel: 4;
|
||||
__IO uint32_t zr_gp18_sel: 4;
|
||||
__IO uint32_t zr_gp19_sel: 4;
|
||||
__IO uint32_t zr_gp20_sel: 4;
|
||||
__IO uint32_t zr_gp21_sel: 4;
|
||||
__IO uint32_t zr_gp22_sel: 4;
|
||||
__IO uint32_t zr_gp23_sel: 4;
|
||||
__IO uint32_t zr_gp16_sel : 4;
|
||||
__IO uint32_t zr_gp17_sel : 4;
|
||||
__IO uint32_t zr_gp18_sel : 4;
|
||||
__IO uint32_t zr_gp19_sel : 4;
|
||||
__IO uint32_t zr_gp20_sel : 4;
|
||||
__IO uint32_t zr_gp21_sel : 4;
|
||||
__IO uint32_t zr_gp22_sel : 4;
|
||||
__IO uint32_t zr_gp23_sel : 4;
|
||||
} BITS_REG_70;
|
||||
__IO uint32_t REG_70; /* pinmux control */
|
||||
};
|
||||
union {
|
||||
struct {
|
||||
__IO uint32_t zr_gp24_sel: 4;
|
||||
__IO uint32_t zr_gp25_sel: 4;
|
||||
__IO uint32_t zr_gp26_sel: 4;
|
||||
__IO uint32_t zr_gp27_sel: 4;
|
||||
__IO uint32_t zr_gp28_sel: 4;
|
||||
__IO uint32_t zr_gp29_sel: 4;
|
||||
__IO uint32_t zr_gp30_sel: 4;
|
||||
__I uint32_t rsv7: 4;
|
||||
__IO uint32_t zr_gp24_sel : 4;
|
||||
__IO uint32_t zr_gp25_sel : 4;
|
||||
__IO uint32_t zr_gp26_sel : 4;
|
||||
__IO uint32_t zr_gp27_sel : 4;
|
||||
__IO uint32_t zr_gp28_sel : 4;
|
||||
__IO uint32_t zr_gp29_sel : 4;
|
||||
__IO uint32_t zr_gp30_sel : 4;
|
||||
__I uint32_t rsv7 : 4;
|
||||
} BITS_REG_74;
|
||||
__IO uint32_t REG_74; /* pinmux control */
|
||||
};
|
||||
@@ -261,17 +261,17 @@ typedef struct __DMACR {
|
||||
__I uint32_t RESV1[0x3ec]; /* 0x50 - 0xffc */
|
||||
} DMA_TypeDef;
|
||||
|
||||
#define DMA ( (DMA_TypeDef *)DMA_REG_BASE )
|
||||
#define DMA_ERROR ( *(volatile uint32_t *)(SYS_CON_REG_BASE + 0x70) )
|
||||
#define DMA_INT_STAT ( *(volatile uint32_t *)(SYS_CON_REG_BASE + 0x74) )
|
||||
#define DMA_RAW_INT_STAT ( *(volatile uint32_t *)(SYS_CON_REG_BASE + 0x78) )
|
||||
#define DMA_WAIT_ON_REQ ( *(volatile uint32_t *)(SYS_CON_REG_BASE + 0x7C) )
|
||||
#define DMA_REQ_DONE_EN ( *(volatile uint32_t *)(SYS_CON_REG_BASE + 0x80) )
|
||||
#define DMA_STALL ( *(volatile uint32_t *)(SYS_CON_REG_BASE + 0x84) )
|
||||
#define DMA_INT_CLR ( *(volatile uint32_t *)(SYS_CON_REG_BASE + 0x88) )
|
||||
#define DMA_INT_MASK ( *(volatile uint32_t *)(SYS_CON_REG_BASE + 0x8C) )
|
||||
#define DMA_HANDSHAKE_CFG0 ( *(volatile uint32_t *)(SYS_CON_REG_BASE + 0x90) )
|
||||
#define DMA_HANDSHAKE_CFG1 ( *(volatile uint32_t *)(SYS_CON_REG_BASE + 0x94) )
|
||||
#define DMA ((DMA_TypeDef *)DMA_REG_BASE)
|
||||
#define DMA_ERROR (*(volatile uint32_t *)(SYS_CON_REG_BASE + 0x70))
|
||||
#define DMA_INT_STAT (*(volatile uint32_t *)(SYS_CON_REG_BASE + 0x74))
|
||||
#define DMA_RAW_INT_STAT (*(volatile uint32_t *)(SYS_CON_REG_BASE + 0x78))
|
||||
#define DMA_WAIT_ON_REQ (*(volatile uint32_t *)(SYS_CON_REG_BASE + 0x7C))
|
||||
#define DMA_REQ_DONE_EN (*(volatile uint32_t *)(SYS_CON_REG_BASE + 0x80))
|
||||
#define DMA_STALL (*(volatile uint32_t *)(SYS_CON_REG_BASE + 0x84))
|
||||
#define DMA_INT_CLR (*(volatile uint32_t *)(SYS_CON_REG_BASE + 0x88))
|
||||
#define DMA_INT_MASK (*(volatile uint32_t *)(SYS_CON_REG_BASE + 0x8C))
|
||||
#define DMA_HANDSHAKE_CFG0 (*(volatile uint32_t *)(SYS_CON_REG_BASE + 0x90))
|
||||
#define DMA_HANDSHAKE_CFG1 (*(volatile uint32_t *)(SYS_CON_REG_BASE + 0x94))
|
||||
|
||||
#define DMA_IRQ_BIT (0X01<<7)
|
||||
#define DMA_CLK_EN (0X01<<13)
|
||||
@@ -326,12 +326,12 @@ typedef struct __I2S {
|
||||
|
||||
/* I2S clock divider */
|
||||
typedef struct {
|
||||
__IO uint32_t i2s_lrclk_divider: 9;
|
||||
__IO uint32_t i2s_lrclk_delay_sel: 1;
|
||||
__IO uint32_t i2s_sclk_divider: 10;
|
||||
__IO uint32_t i2s_mclk_divider: 10;
|
||||
__IO uint32_t i2s_slave_mode: 1;
|
||||
__IO uint32_t reserved: 1;
|
||||
__IO uint32_t i2s_lrclk_divider : 9;
|
||||
__IO uint32_t i2s_lrclk_delay_sel : 1;
|
||||
__IO uint32_t i2s_sclk_divider : 10;
|
||||
__IO uint32_t i2s_mclk_divider : 10;
|
||||
__IO uint32_t i2s_slave_mode : 1;
|
||||
__IO uint32_t reserved : 1;
|
||||
} I2S_CLK_DIV_TypeDef;
|
||||
|
||||
#define I2S_CLK_DIV ((I2S_CLK_DIV_TypeDef *)0x40000810 )
|
||||
@@ -443,18 +443,18 @@ typedef struct __I2C {
|
||||
__IO uint32_t SAR; // 0x08
|
||||
__IO uint32_t DBR;
|
||||
__IO uint32_t LCR;
|
||||
__IO uint32_t WCR; //0x14
|
||||
__IO uint32_t WCR; // 0x14
|
||||
__IO uint32_t RST_CYCL; // 0x18
|
||||
__I uint32_t BMR; //0x1c
|
||||
__I uint32_t BMR; // 0x1c
|
||||
__IO uint32_t WFIFO; // 0x20
|
||||
__IO uint32_t WFIFO_WPTR; // 0x24
|
||||
__IO uint32_t WFIFO_RPTR; // 0x28
|
||||
__IO uint32_t RFIFO; // 0x2c
|
||||
__IO uint32_t RFIFO_WPTR;
|
||||
__IO uint32_t RFIFO_RPTR; //0x34
|
||||
__IO uint32_t RESV[2]; //0x38 0x3C
|
||||
__I uint32_t WFIFO_STATUS; //0x40
|
||||
__I uint32_t RFIFO_STATUS; //0x44
|
||||
__IO uint32_t RFIFO_RPTR; // 0x34
|
||||
__IO uint32_t RESV[2]; // 0x38 0x3C
|
||||
__I uint32_t WFIFO_STATUS; // 0x40
|
||||
__I uint32_t RFIFO_STATUS; // 0x44
|
||||
} I2C_TypeDef;
|
||||
|
||||
#define I2C0_BASE 0x4008A000
|
||||
@@ -505,7 +505,7 @@ typedef struct __I2C {
|
||||
/*
|
||||
DUET PWM BEGIN
|
||||
*/
|
||||
////////////////////to do////////////////////////////
|
||||
//////////////////// to do////////////////////////////
|
||||
/*
|
||||
DUET PWM END
|
||||
*/
|
||||
@@ -531,23 +531,23 @@ typedef struct __RTC {
|
||||
|
||||
#define RTC_CNT_CYCLE_ENABLE (1 << 15)
|
||||
#define RTC_ENABLE (1 << 14)
|
||||
#define CLK32K_SEL (1 << 12) //A0V1 bug, sel ext XO no function, same as internal RC clk
|
||||
#define CLK32K_SEL (1 << 12) // A0V1 bug, sel ext XO no function, same as internal RC clk
|
||||
#define RTC_INT_ENABLE (1 << 11)
|
||||
#define SW_OVERRIDE_REG_POR (1 << 4)
|
||||
|
||||
#define RTC_TICK_CNT 32768 //1s for asic
|
||||
#define RTC_TICK_CNT 32768 // 1s for asic
|
||||
|
||||
#define GET_RTC_CURRENT_DATE() (RTC->CURRENT_DATE)
|
||||
|
||||
#define RTC_INIT_YEAR 118 //2018
|
||||
#define RTC_INIT_MONTH 8 //month 9
|
||||
#define RTC_INIT_YEAR 118 // 2018
|
||||
#define RTC_INIT_MONTH 8 // month 9
|
||||
#define RTC_INIT_DATE 12
|
||||
#define RTC_INIT_HOUR 8
|
||||
#define RTC_INIT_MINUTE 0
|
||||
#define RTC_INIT_SECOND 0
|
||||
#define RTC_INIT_WEEKDAY 0 //auto modify
|
||||
#define RTC_INIT_WEEKDAY 0 // auto modify
|
||||
|
||||
#define RTC_REFRESH_DAY 255 //255 max unit: day
|
||||
#define RTC_REFRESH_DAY 255 // 255 max unit: day
|
||||
#define RTC_REFRESH_HOUR 23 // 0 - 23
|
||||
#define RTC_REFRESH_MINUTE 59 // 0 - 59
|
||||
#define RTC_REFRESH_SECOND 59 // 0 - 59
|
||||
@@ -557,7 +557,7 @@ typedef struct __RTC {
|
||||
|
||||
#define DUET_IRQ_STS_REG_ADDR 0x40000AA0
|
||||
|
||||
//retention ram addr need to be planned
|
||||
// retention ram addr need to be planned
|
||||
#define RTC_TIME_RETENTION_RAM_ADDR 0x40008000
|
||||
#define RTC_FLAG_RETENTION_RAM_ADDR 0x40008008
|
||||
|
||||
@@ -618,7 +618,7 @@ typedef struct __UART {
|
||||
__O uint32_t ICR ; /* 0x44 */
|
||||
__IO uint32_t DMACR ; /* 0x48 */
|
||||
__I uint32_t RSV2[997] ; /* 0x04C~0xFDC */
|
||||
__I uint32_t ID[8] ; /* 0xFE0~0xFFC*/
|
||||
__I uint32_t ID[8] ; /* 0xFE0~0xFFC */
|
||||
} UART_TypeDef;
|
||||
|
||||
#define UART0_BASE (0x40080000+0x1000)
|
||||
@@ -909,4 +909,4 @@ struct DUET_EFUSE {
|
||||
/*
|
||||
DUET LPUART END
|
||||
*/
|
||||
#endif //_DUET_H_
|
||||
#endif // _DUET_H_
|
||||
|
||||
@@ -97,4 +97,4 @@ int32_t duet_adc_finalize(duet_adc_dev_t *adc_config);
|
||||
|
||||
int32_t duet_tempr_get(duet_adc_dev_t *adc_config);
|
||||
#endif
|
||||
#endif //_duet_ADC_H_
|
||||
#endif // _duet_ADC_H_
|
||||
|
||||
@@ -24,11 +24,11 @@
|
||||
#define BOOT_TYPE_MAGIC_ID 0x55AA5A00
|
||||
#define PWR_ON_RST (BOOT_TYPE_MAGIC_ID + 0x00)
|
||||
#define HARDWARE_PIN_RST (BOOT_TYPE_MAGIC_ID + 0x01)
|
||||
#define SOFTWARE_RST (BOOT_TYPE_MAGIC_ID + 0x02) //including NVIC_SystemReset and WDG RST
|
||||
#define SOFTWARE_RST (BOOT_TYPE_MAGIC_ID + 0x02) // including NVIC_SystemReset and WDG RST
|
||||
#define DEEP_SLEEP_RST (BOOT_TYPE_MAGIC_ID + 0x03)
|
||||
#define UNKNOWN_RST (BOOT_TYPE_MAGIC_ID + 0xFF)
|
||||
|
||||
void duet_cfg_boot_type(void);
|
||||
void duet_set_ds_boot_type(void);
|
||||
uint32_t duet_get_boot_type(void);
|
||||
#endif //_DUET_BOOT_H_
|
||||
#endif // _DUET_BOOT_H_
|
||||
@@ -48,7 +48,7 @@ extern "C" {
|
||||
#define DMA_OP_MODE_PERI_SCT_GAT_PRI (6)
|
||||
#define DMA_OP_MODE_PERI_SCT_GAT_ALT (7)
|
||||
|
||||
#define DMA_R_POWER_1 (0) //every dma period nums of transfer uinit
|
||||
#define DMA_R_POWER_1 (0) // every dma period nums of transfer uinit
|
||||
#define DMA_R_POWER_2 (1)
|
||||
#define DMA_R_POWER_4 (2)
|
||||
#define DMA_R_POWER_8 (3)
|
||||
@@ -62,7 +62,7 @@ extern "C" {
|
||||
|
||||
#define DMA_N_1_MAX (1024)
|
||||
|
||||
#define DMA_MAX_CHAN_NUM (32) //nums of primary channels
|
||||
#define DMA_MAX_CHAN_NUM (32) // nums of primary channels
|
||||
typedef enum {
|
||||
DMA_CH_UART0_TX = 0,
|
||||
DMA_CH_UART0_RX,
|
||||
@@ -86,7 +86,7 @@ typedef void (*duet_dma_callback_func)(uint32_t);
|
||||
|
||||
typedef struct {
|
||||
uint32_t cycle_ctl: 3;
|
||||
uint32_t next_useburst: 1;
|
||||
uint32_t next_useburst : 1;
|
||||
uint32_t n_minus_1: 10;
|
||||
uint32_t R_pow: 4;
|
||||
uint32_t src_prot: 3;
|
||||
@@ -135,4 +135,4 @@ void duet_dma_spi_rx(uint8_t ssp_idx, uint8_t *data, uint16_t len);
|
||||
void duet_dma_spi_tx(uint8_t ssp_idx, uint8_t *data, uint16_t len);
|
||||
void duet_dma_callback_register(uint8_t chn_idx, duet_dma_callback_func func);
|
||||
|
||||
#endif //__DUET_DMA_H
|
||||
#endif // __DUET_DMA_H
|
||||
|
||||
@@ -17,7 +17,7 @@
|
||||
#define _DUET_EFUSE_H_
|
||||
|
||||
#define EFUSE_READ_OP_WAIT_CYCLE 5
|
||||
#define EFUSE_WRITE_OP_WAIT_CYCLE (SYSTEM_CLOCK/100000) //10us
|
||||
#define EFUSE_WRITE_OP_WAIT_CYCLE (SYSTEM_CLOCK/100000) // 10us
|
||||
#define EFUSE_DIV_OP_WAIT_CYCLE 31
|
||||
|
||||
#define EFUSE_LDO25_OPEN 1
|
||||
@@ -35,4 +35,4 @@ void duet_efuse_word_write(uint16_t addr, uint32_t data);
|
||||
|
||||
void duet_efuse_multi_read(uint16_t start_addr, uint16_t size_in_bytes, uint8_t *pData);
|
||||
|
||||
#endif //_LEGA_EFUSE_H_
|
||||
#endif // _LEGA_EFUSE_H_
|
||||
|
||||
@@ -227,4 +227,4 @@ typedef struct {
|
||||
int32_t duet_flash_get_wifi_mac(flash_mac_addr_t *addr);
|
||||
int32_t duet_flash_set_wifi_mac(flash_mac_addr_t *addr);
|
||||
#endif
|
||||
#endif //_LEGA_FLASH_H_
|
||||
#endif // _LEGA_FLASH_H_
|
||||
|
||||
@@ -155,9 +155,9 @@ struct FlashDevice {
|
||||
#define FLASH_DRIVER_SEG __attribute__((section("seg_flash_driver")))
|
||||
|
||||
void duet_flash_alg_read_buf_clr(void);
|
||||
//void duet_flash_alg_cache_bypass(void);
|
||||
// void duet_flash_alg_cache_bypass(void);
|
||||
void duet_flash_alg_cache_enable(void);
|
||||
//void duet_flash_alg_cache_flush(void);
|
||||
// void duet_flash_alg_cache_flush(void);
|
||||
int duet_flash_alg_init (void);
|
||||
int duet_flash_alg_erase(unsigned int cmd, unsigned long adr);
|
||||
int duet_flash_alg_programpage (unsigned long adr, // Program Page Function
|
||||
@@ -168,4 +168,4 @@ void duet_flash_alg_set_clk_240(unsigned char en_240m);
|
||||
#elif defined _SPI_FLASH_120MHz_
|
||||
void duet_flash_alg_set_clk_120(unsigned char en_120m);
|
||||
#endif
|
||||
#endif //_LEGA_FLASH_ALG_H_
|
||||
#endif // _LEGA_FLASH_ALG_H_
|
||||
@@ -196,4 +196,4 @@ int32_t duet_gpio_clear_irq(duet_gpio_dev_t *gpio);
|
||||
*/
|
||||
int32_t duet_gpio_finalize(duet_gpio_dev_t *gpio);
|
||||
|
||||
#endif //_DUET_GPIO_H_
|
||||
#endif // _DUET_GPIO_H_
|
||||
|
||||
@@ -214,4 +214,4 @@ __STATIC_INLINE void i2c_set_tb(I2C_TypeDef *I2Cx)
|
||||
I2Cx->CR |= I2C_CR_TB;
|
||||
}
|
||||
|
||||
#endif //_DUET_I2C_H_
|
||||
#endif // _DUET_I2C_H_
|
||||
@@ -97,4 +97,4 @@ extern "c" {
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /*__DUET_PINMUX_H */
|
||||
#endif /* __DUET_PINMUX_H */
|
||||
@@ -23,7 +23,7 @@
|
||||
#else
|
||||
#error No any psram chip defined!!!
|
||||
#endif
|
||||
#define PSRAM_AMBA_BASE 0x30000000 //AHB base addr
|
||||
#define PSRAM_AMBA_BASE 0x30000000 // AHB base addr
|
||||
#define PSRAM_FLASH_A1_BASE PSRAM_AMBA_BASE
|
||||
#define PSRAM_FLASH_A1_TOP (PSRAM_FLASH_A1_BASE + PSRAM_FLASH_SIZE)
|
||||
#define PSRAM_FLASH_A2_BASE PSRAM_FLASH_A1_TOP
|
||||
|
||||
@@ -85,4 +85,4 @@ int32_t duet_pwm_para_chg(duet_pwm_dev_t *pwm, duet_pwm_config_t para);
|
||||
*/
|
||||
int32_t duet_pwm_finalize(duet_pwm_dev_t *pwm);
|
||||
|
||||
#endif //_DUET_PWM_H_
|
||||
#endif // _DUET_PWM_H_
|
||||
@@ -21,13 +21,13 @@ extern "C" {
|
||||
#endif
|
||||
|
||||
typedef enum {
|
||||
ITCM_DTCM_32_192, //default
|
||||
ITCM_DTCM_32_192, // default
|
||||
ITCM_DTCM_96_128,
|
||||
ITCM_DTCM_NUM
|
||||
} Tcm_Config_Type;
|
||||
|
||||
typedef enum {
|
||||
WIFI_RAM_0, //default
|
||||
WIFI_RAM_0, // default
|
||||
WIFI_RAM_32,
|
||||
WIFI_RAM_64,
|
||||
WIFI_RAM_96,
|
||||
@@ -35,7 +35,7 @@ typedef enum {
|
||||
} Wifi_Ram_Config_Type;
|
||||
|
||||
typedef enum {
|
||||
BT_RAM_0, //default
|
||||
BT_RAM_0, // default
|
||||
BT_RAM_16,
|
||||
BT_RAM_32,
|
||||
BT_RAM_NUM
|
||||
|
||||
@@ -35,4 +35,4 @@ void spi_sw_protect_write(uint16_t addr, uint16_t data);
|
||||
void rf_set_reg_bit(uint16_t reg, uint8_t start_bit, uint8_t len, uint16_t src_val);
|
||||
uint16_t rf_get_reg_bit(uint16_t reg, uint8_t start_bit, uint8_t len);
|
||||
|
||||
#endif //__RF_SPI_H__
|
||||
#endif // __RF_SPI_H__
|
||||
@@ -38,12 +38,12 @@ It implements referenced standard [SP800-90] - 10.2.1.3.2 - CTR-DRBG Instantiate
|
||||
@return A non-zero value from crys_rnd_error.h on failure.
|
||||
*/
|
||||
int duet_RND_Instantiation(CRYS_RND_Context_t
|
||||
*rndContext_ptr, /*!< [in/out] Pointer to the RND context buffer allocated by the user, which is used to
|
||||
*rndContext_ptr, /* !< [in/out] Pointer to the RND context buffer allocated by the user, which is used to
|
||||
maintain the RND state, as well as pointers to the functions used for
|
||||
random vector generation. This context must be saved and provided as a
|
||||
parameter to any API that uses the RND module.
|
||||
\note the context must be cleared before sent to the function. */
|
||||
CRYS_RND_WorkBuff_t *rndWorkBuff_ptr /*!< [in/out] Scratchpad for the RND module's work. */
|
||||
CRYS_RND_WorkBuff_t *rndWorkBuff_ptr /* !< [in/out] Scratchpad for the RND module's work. */
|
||||
);
|
||||
|
||||
/*!
|
||||
@@ -52,7 +52,7 @@ int duet_RND_Instantiation(CRYS_RND_Context_t
|
||||
@return CRYS_OK on success.
|
||||
@return A non-zero value from crys_rnd_error.h on failure.
|
||||
*/
|
||||
int duet_RND_UnInstantiation(CRYS_RND_Context_t *rndContext_ptr); /*!< [in/out] Pointer to the RND context
|
||||
int duet_RND_UnInstantiation(CRYS_RND_Context_t *rndContext_ptr); /* !< [in/out] Pointer to the RND context
|
||||
* buffer. */
|
||||
|
||||
/*!
|
||||
@@ -63,8 +63,8 @@ It implements referenced standard [SP800-90] - 10.2.1.4.2 - CTR-DRBG Reseeding a
|
||||
@return CRYS_OK on success.
|
||||
@return A non-zero value from crys_rnd_error.h on failure.
|
||||
*/
|
||||
int duet_RND_Reseeding(CRYS_RND_Context_t *rndContext_ptr, /*!< [in/out] Pointer to the RND context buffer. */
|
||||
CRYS_RND_WorkBuff_t *rndWorkBuff_ptr /*!< [in/out] Scratchpad for the RND module's work. */
|
||||
int duet_RND_Reseeding(CRYS_RND_Context_t *rndContext_ptr, /* !< [in/out] Pointer to the RND context buffer. */
|
||||
CRYS_RND_WorkBuff_t *rndWorkBuff_ptr /* !< [in/out] Scratchpad for the RND module's work. */
|
||||
);
|
||||
|
||||
/****************************************************************************************/
|
||||
@@ -82,10 +82,10 @@ The generation algorithm uses AES (FIPS-PUB 197) and Derivation Function (DF).
|
||||
@return A non-zero value from crys_rnd_error.h on failure.
|
||||
*/
|
||||
int duet_RND_GenerateVector(CRYS_RND_State_t
|
||||
*rndState_ptr, /*!< [in/out] Pointer to the RND state structure, which is part of the RND context structure.
|
||||
*rndState_ptr, /* !< [in/out] Pointer to the RND state structure, which is part of the RND context structure.
|
||||
Use rndContext->rndState field of the context for this parameter. */
|
||||
uint16_t outSizeBytes, /*!< [in] The size in bytes of the random vector required. The maximal size is 2^16 -1 bytes. */
|
||||
uint8_t *out_ptr /*!< [out] The pointer to output buffer. */
|
||||
uint16_t outSizeBytes, /* !< [in] The size in bytes of the random vector required. The maximal size is 2^16 -1 bytes. */
|
||||
uint8_t *out_ptr /* !< [out] The pointer to output buffer. */
|
||||
);
|
||||
|
||||
/****************************************************************************************/
|
||||
@@ -101,10 +101,10 @@ after ::CRYS_RND_Instantiation is called.
|
||||
@return A non-zero value from crys_rnd_error.h on failure.
|
||||
*/
|
||||
int duet_RND_SetGenerateVectorFunc(CRYS_RND_Context_t
|
||||
*rndContext_ptr, /*!< [in/out] Pointer to the RND context buffer allocated by the user,
|
||||
*rndContext_ptr, /* !< [in/out] Pointer to the RND context buffer allocated by the user,
|
||||
which is used to maintain the RND state as well as pointers
|
||||
to the functions used for random vector generation. */
|
||||
SaSiRndGenerateVectWorkFunc_t rndGenerateVectFunc /*!< [in] Pointer to the random vector generation function.
|
||||
SaSiRndGenerateVectWorkFunc_t rndGenerateVectFunc /* !< [in] Pointer to the random vector generation function.
|
||||
The pointer should point to the ::CRYS_RND_GenerateVector function. */
|
||||
);
|
||||
|
||||
@@ -124,11 +124,11 @@ The RND module must be instantiated prior to invocation of this API.
|
||||
@return A non-zero value from crys_rnd_error.h on failure.
|
||||
*/
|
||||
int duet_RND_GenerateVectorInRange(
|
||||
CRYS_RND_Context_t *rndContext_ptr, /*!< [in/out] Pointer to the RND context buffer. */
|
||||
uint32_t rndSizeInBits, /*!< [in] The size in bits of the random vector required. The allowed size in range 2 <= rndSizeInBits < 2^19-1, bits. */
|
||||
uint8_t *maxVect_ptr, /*!< [in] Pointer to the vector defining the upper limit for the random vector output, Given as little-endian byte array.
|
||||
CRYS_RND_Context_t *rndContext_ptr, /* !< [in/out] Pointer to the RND context buffer. */
|
||||
uint32_t rndSizeInBits, /* !< [in] The size in bits of the random vector required. The allowed size in range 2 <= rndSizeInBits < 2^19-1, bits. */
|
||||
uint8_t *maxVect_ptr, /* !< [in] Pointer to the vector defining the upper limit for the random vector output, Given as little-endian byte array.
|
||||
If not NULL, its actual size is treated as [(rndSizeInBits+7)/8] bytes. */
|
||||
uint8_t *rndVect_ptr /*!< [in/out] Pointer to the output buffer for the random vector. Must be at least [(rndSizeInBits+7)/8] bytes.
|
||||
uint8_t *rndVect_ptr /* !< [in/out] Pointer to the output buffer for the random vector. Must be at least [(rndSizeInBits+7)/8] bytes.
|
||||
Treated as little-endian byte array. */
|
||||
);
|
||||
|
||||
@@ -141,9 +141,9 @@ to be later used by the ::CRYS_RND_Instantiation/::CRYS_RND_Reseeding/::CRYS_RND
|
||||
@return A non-zero value from crys_rnd_error.h on failure.
|
||||
*/
|
||||
int duet_RND_AddAdditionalInput(CRYS_RND_Context_t
|
||||
*rndContext_ptr, /*!< [in/out] Pointer to the RND context buffer. */
|
||||
uint8_t *additonalInput_ptr, /*!< [in] The Additional Input buffer. */
|
||||
uint16_t additonalInputSize /*!< [in] The size of the Additional Input buffer. Must be <= 48, and a multiple of 4. */
|
||||
*rndContext_ptr, /* !< [in/out] Pointer to the RND context buffer. */
|
||||
uint8_t *additonalInput_ptr, /* !< [in] The Additional Input buffer. */
|
||||
uint16_t additonalInputSize /* !< [in] The size of the Additional Input buffer. Must be <= 48, and a multiple of 4. */
|
||||
);
|
||||
|
||||
/*!
|
||||
@@ -156,13 +156,13 @@ The user must call this function before calling functions performing KAT tests.
|
||||
@return CRYS_OK on success.
|
||||
@return A non-zero value from crys_rnd_error.h on failure.
|
||||
*/
|
||||
int duet_RND_EnterKatMode(CRYS_RND_Context_t *rndContext_ptr, /*!< [in/out] Pointer to the RND context buffer. */
|
||||
uint8_t *entrData_ptr, /*!< [in] Entropy data. */
|
||||
uint32_t entrSize, /*!< [in] Entropy size in bytes. */
|
||||
uint8_t *nonce_ptr, /*!< [in] Nonce. */
|
||||
uint32_t nonceSize, /*!< [in] Entropy size in bytes. */
|
||||
int duet_RND_EnterKatMode(CRYS_RND_Context_t *rndContext_ptr, /* !< [in/out] Pointer to the RND context buffer. */
|
||||
uint8_t *entrData_ptr, /* !< [in] Entropy data. */
|
||||
uint32_t entrSize, /* !< [in] Entropy size in bytes. */
|
||||
uint8_t *nonce_ptr, /* !< [in] Nonce. */
|
||||
uint32_t nonceSize, /* !< [in] Entropy size in bytes. */
|
||||
CRYS_RND_WorkBuff_t
|
||||
*workBuff_ptr /*!< [out] RND working buffer, must be the same buffer, which should be passed into
|
||||
*workBuff_ptr /* !< [out] RND working buffer, must be the same buffer, which should be passed into
|
||||
Instantiation/Reseeding functions. */
|
||||
);
|
||||
|
||||
@@ -175,7 +175,7 @@ The user must call this function after KAT tests before actual using RND module
|
||||
@return CRYS_OK on success.
|
||||
@return A non-zero value from crys_rnd_error.h on failure.
|
||||
*/
|
||||
void duet_RND_DisableKatMode(CRYS_RND_Context_t *rndContext_ptr /*!< [in/out] Pointer to the RND context buffer. */
|
||||
void duet_RND_DisableKatMode(CRYS_RND_Context_t *rndContext_ptr /* !< [in/out] Pointer to the RND context buffer. */
|
||||
);
|
||||
|
||||
#endif //_DUET_RND_H_
|
||||
#endif // _DUET_RND_H_
|
||||
@@ -65,8 +65,8 @@ extern "C" {
|
||||
/* SPI interrupts */
|
||||
#define SPI_INTERRUPT_RX_FIFO_OVERRUN (1 << 0)
|
||||
#define SPI_INTERRUPT_RX_TIMEOUT (1 << 1)
|
||||
#define SPI_INTERRUPT_RX_FIFO_TRIGGER (1 << 2) //there are four or more entries in rx fifo
|
||||
#define SPI_INTERRUPT_TX_FIFO_TRIGGER (1 << 3) //there are four or fewer entries in tx fifo. what happens when fifo level is exactly 4??
|
||||
#define SPI_INTERRUPT_RX_FIFO_TRIGGER (1 << 2) // there are four or more entries in rx fifo
|
||||
#define SPI_INTERRUPT_TX_FIFO_TRIGGER (1 << 3) // there are four or fewer entries in tx fifo. what happens when fifo level is exactly 4??
|
||||
#define SPI_INTERRUPT_ALL (0xf)
|
||||
#define SPI_DISABLE_INTERRUPT_ALL (0x0)
|
||||
|
||||
|
||||
@@ -31,7 +31,7 @@ typedef struct {
|
||||
} duet_timer_cb_t;
|
||||
|
||||
typedef struct {
|
||||
uint32_t period; /*us*/
|
||||
uint32_t period; /* us */
|
||||
uint8_t reload_mode;
|
||||
duet_timer_cb_handler_t cb;
|
||||
void *arg;
|
||||
@@ -92,4 +92,4 @@ void duet_timer_stop(duet_timer_dev_t *tim);
|
||||
*/
|
||||
int32_t duet_timer_finalize(duet_timer_dev_t *tim);
|
||||
|
||||
#endif //_DUET_TIMER_H_
|
||||
#endif // _DUET_TIMER_H_
|
||||
@@ -33,7 +33,7 @@ extern "C" {
|
||||
#define DUET_UART2_INDEX 2
|
||||
#define DUET_UART_NUM 3
|
||||
|
||||
/* UART BAUDRATE*/
|
||||
/* UART BAUDRATE */
|
||||
#define UART_BAUDRATE_110 (110)
|
||||
#define UART_BAUDRATE_300 (300)
|
||||
#define UART_BAUDRATE_600 (600)
|
||||
@@ -131,11 +131,11 @@ typedef enum {
|
||||
* TX/RX FIFO Level, both FIFO of depth 16
|
||||
*/
|
||||
typedef enum {
|
||||
FIFO_1_8_FULL = 0, //1/8
|
||||
FIFO_1_4_FULL = 1, //1/4
|
||||
FIFO_HALF_FULL = 2, //1/2
|
||||
FIFO_3_4_FULL = 3, //3/4
|
||||
FIFO_7_8_FULL = 4, //7/8
|
||||
FIFO_1_8_FULL = 0, // 1/8
|
||||
FIFO_1_4_FULL = 1, // 1/4
|
||||
FIFO_HALF_FULL = 2, // 1/2
|
||||
FIFO_3_4_FULL = 3, // 3/4
|
||||
FIFO_7_8_FULL = 4, // 7/8
|
||||
FIFO_NULL
|
||||
} uart_fifo_threshold_t;
|
||||
|
||||
@@ -216,4 +216,4 @@ uint8_t UART_ReceiveData(UART_TypeDef *UARTx);
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#endif //__DUET_UART_H
|
||||
#endif // __DUET_UART_H
|
||||
|
||||
@@ -28,4 +28,4 @@ extern "C" {
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#endif //__DUET_UART_INDEX_H
|
||||
#endif // __DUET_UART_INDEX_H
|
||||
@@ -52,4 +52,4 @@ void duet_wdg_reload(duet_wdg_dev_t *wdg);
|
||||
*/
|
||||
int32_t duet_wdg_finalize(duet_wdg_dev_t *wdg);
|
||||
|
||||
#endif //_LEGA_WDG_H_
|
||||
#endif // _LEGA_WDG_H_
|
||||
@@ -24,7 +24,7 @@ const duet_logic_partition_t duet_partitions[] = {
|
||||
.partition_owner = FLASH_EMBEDDED,
|
||||
.partition_description = "Bootloader",
|
||||
.partition_start_addr = BOOTLOADER_FLASH_START_ADDR,
|
||||
.partition_length = BOOTLOADER_MAX_SIZE, //64k bytes
|
||||
.partition_length = BOOTLOADER_MAX_SIZE, // 64k bytes
|
||||
.partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_DIS,
|
||||
},
|
||||
[PARTITION_PARAMETER_1] =
|
||||
@@ -40,7 +40,7 @@ const duet_logic_partition_t duet_partitions[] = {
|
||||
.partition_owner = FLASH_EMBEDDED,
|
||||
.partition_description = "KV",
|
||||
.partition_start_addr = KV_FLASH_START_ADDR,
|
||||
.partition_length = KV_MAX_SIZE, //12k bytes
|
||||
.partition_length = KV_MAX_SIZE, // 12k bytes
|
||||
.partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_EN,
|
||||
},
|
||||
[PARTITION_PARAMETER_3] =
|
||||
@@ -48,7 +48,7 @@ const duet_logic_partition_t duet_partitions[] = {
|
||||
.partition_owner = FLASH_EMBEDDED,
|
||||
.partition_description = "MIDEA_INFO",
|
||||
.partition_start_addr = MIDEA_INFO_START_ADDR,
|
||||
.partition_length = MIDEA_INFO_MAX_SIZE, //4k bytes
|
||||
.partition_length = MIDEA_INFO_MAX_SIZE, // 4k bytes
|
||||
.partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_EN,
|
||||
},
|
||||
[PARTITION_PARAMETER_4] =
|
||||
@@ -56,7 +56,7 @@ const duet_logic_partition_t duet_partitions[] = {
|
||||
.partition_owner = FLASH_EMBEDDED,
|
||||
.partition_description = "MIDEA_INFO_BKUP",
|
||||
.partition_start_addr = MIDEA_INFO_BKUP_START_ADDR,
|
||||
.partition_length = MIDEA_INFO_BKUP_MAX_SIZE, //4k bytes
|
||||
.partition_length = MIDEA_INFO_BKUP_MAX_SIZE, // 4k bytes
|
||||
.partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_EN,
|
||||
},
|
||||
[PARTITION_APPLICATION] =
|
||||
@@ -64,7 +64,7 @@ const duet_logic_partition_t duet_partitions[] = {
|
||||
.partition_owner = FLASH_EMBEDDED,
|
||||
.partition_description = "Application",
|
||||
.partition_start_addr = APP_FLASH_START_ADDR,
|
||||
.partition_length = APP_MAX_SIZE, //768k bytes
|
||||
.partition_length = APP_MAX_SIZE, // 768k bytes
|
||||
.partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_EN,
|
||||
},
|
||||
[PARTITION_OTA_TEMP] =
|
||||
@@ -72,7 +72,7 @@ const duet_logic_partition_t duet_partitions[] = {
|
||||
.partition_owner = FLASH_EMBEDDED,
|
||||
.partition_description = "OTA Storage",
|
||||
.partition_start_addr = OTA_FLASH_START_ADDR,
|
||||
.partition_length = OTA_MAX_SIZE, //768k bytes
|
||||
.partition_length = OTA_MAX_SIZE, // 768k bytes
|
||||
.partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_EN,
|
||||
},
|
||||
[PARTITION_CUSTOM_1] =
|
||||
@@ -80,7 +80,7 @@ const duet_logic_partition_t duet_partitions[] = {
|
||||
.partition_owner = FLASH_EMBEDDED,
|
||||
.partition_description = "FLASH Customer1",
|
||||
.partition_start_addr = CUST1_FLASH_START_ADDR,
|
||||
.partition_length = CUST1_MAX_SIZE, //12k bytes
|
||||
.partition_length = CUST1_MAX_SIZE, // 12k bytes
|
||||
.partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_EN,
|
||||
},
|
||||
#ifdef MS_CONFIG_OTA_SUPPORT
|
||||
@@ -89,7 +89,7 @@ const duet_logic_partition_t duet_partitions[] = {
|
||||
.partition_owner = FLASH_EMBEDDED,
|
||||
.partition_description = "OTA MCU",
|
||||
.partition_start_addr = OTA_MCU_FLASH_START_ADDR,
|
||||
.partition_length = OTA_MCU_MAX_SIZE, //192k bytes
|
||||
.partition_length = OTA_MCU_MAX_SIZE, // 192k bytes
|
||||
.partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_EN,
|
||||
},
|
||||
[PARTITION_OTA_PARA] =
|
||||
@@ -97,7 +97,7 @@ const duet_logic_partition_t duet_partitions[] = {
|
||||
.partition_owner = FLASH_EMBEDDED,
|
||||
.partition_description = "OTA PARA",
|
||||
.partition_start_addr = OTA_PARA_START_ADDR,
|
||||
.partition_length = OTA_PARA_MAX_SIZE, //4k bytes
|
||||
.partition_length = OTA_PARA_MAX_SIZE, // 4k bytes
|
||||
.partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_EN,
|
||||
},
|
||||
[PARTITION_OTA_HEAD_PARA] =
|
||||
@@ -105,16 +105,16 @@ const duet_logic_partition_t duet_partitions[] = {
|
||||
.partition_owner = FLASH_EMBEDDED,
|
||||
.partition_description = "OTA HEAD PARA",
|
||||
.partition_start_addr = OTA_HEAD_PARA_START_ADDR,
|
||||
.partition_length = OTA_HEAD_PARA_MAX_SIZE, //4k bytes
|
||||
.partition_length = OTA_HEAD_PARA_MAX_SIZE, // 4k bytes
|
||||
.partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_EN,
|
||||
},
|
||||
#endif
|
||||
[PARTITION_PARAMETER_5] =
|
||||
{
|
||||
.partition_owner = FLASH_EMBEDDED,
|
||||
.partition_description = "NVDS", //offline log
|
||||
.partition_description = "NVDS", // offline log
|
||||
.partition_start_addr = NVDS_FLASH_START_ADDR,
|
||||
.partition_length = NVDS_MAX_SIZE, //8k bytes
|
||||
.partition_length = NVDS_MAX_SIZE, // 8k bytes
|
||||
.partition_options = PAR_OPT_READ_EN | PAR_OPT_WRITE_EN,
|
||||
},
|
||||
};
|
||||
|
||||
@@ -27,10 +27,10 @@ void duet_dma_init(void)
|
||||
uint32_t tmp_value = 0;
|
||||
DMA_HANDSHAKE_CFG0 = 0XFFFFFFFF;
|
||||
DMA_HANDSHAKE_CFG1 = 0XFFFFFFFF;
|
||||
//OPEN DMA CLOCK
|
||||
// OPEN DMA CLOCK
|
||||
tmp_value = REG_RD(PERI_CLK_EN_REG0) & (~DMA_CLK_EN);
|
||||
REG_WR(PERI_CLK_EN_REG0, (tmp_value | (DMA_CLK_EN)));
|
||||
//open DMA interrupt
|
||||
// open DMA interrupt
|
||||
tmp_value = REG_RD(DUTE_IRQ_EN_REG) & (~DMA_IRQ_BIT);
|
||||
REG_WR(DUTE_IRQ_EN_REG, (tmp_value | (DMA_IRQ_BIT)));
|
||||
}
|
||||
@@ -115,7 +115,7 @@ void duet_dma_mem2mem(uint8_t chan_num, uint8_t *mem_src, uint8_t *mem_dst, uint
|
||||
DMA->CHAN_EN_SET |= (1 << dma_chan); // enbale channel 0
|
||||
NVIC_EnableIRQ(DMA_IRQn);
|
||||
DMA_INT_MASK |= (1 << dma_chan); // dma interrupt unmask, write 1
|
||||
//manually generate software request for channel 0 for mem2mem transfer
|
||||
// manually generate software request for channel 0 for mem2mem transfer
|
||||
DMA->CHAN_SW_REQ |= (1 << dma_chan);
|
||||
}
|
||||
|
||||
@@ -126,13 +126,13 @@ void duet_dma_uart_rx(uint8_t uart_idx, uint8_t *data, uint16_t len)
|
||||
UARTx = NULL;
|
||||
dma_chan = 0;
|
||||
if ( uart_idx == 2) {
|
||||
dma_chan = 5; //uart2 rx channel
|
||||
dma_chan = 5; // uart2 rx channel
|
||||
UARTx = UART2;
|
||||
} else if ( uart_idx == 1) {
|
||||
dma_chan = 3; //uart1 rx channel
|
||||
dma_chan = 3; // uart1 rx channel
|
||||
UARTx = UART1;
|
||||
} else if ( uart_idx == 0) {
|
||||
dma_chan = 1; //uart0 rx channel
|
||||
dma_chan = 1; // uart0 rx channel
|
||||
UARTx = UART0;
|
||||
} else {
|
||||
return;
|
||||
@@ -173,13 +173,13 @@ void duet_dma_uart_tx(uint8_t uart_idx, uint8_t *data, uint16_t len)
|
||||
UART_TypeDef *UARTx = NULL;
|
||||
|
||||
if ( uart_idx == 2) {
|
||||
dma_chan = 4; //uart2 tx channel
|
||||
dma_chan = 4; // uart2 tx channel
|
||||
UARTx = UART2;
|
||||
} else if ( uart_idx == 1) {
|
||||
dma_chan = 2; //uart1 tx channel
|
||||
dma_chan = 2; // uart1 tx channel
|
||||
UARTx = UART1;
|
||||
} else if ( uart_idx == 0) {
|
||||
dma_chan = 0; //uart0 tx channel
|
||||
dma_chan = 0; // uart0 tx channel
|
||||
UARTx = UART0;
|
||||
} else {
|
||||
return;
|
||||
@@ -220,13 +220,13 @@ void duet_dma_spi_tx(uint8_t ssp_idx, uint8_t *data, uint16_t len)
|
||||
Chan_Cfg_TypeDef *pChan_Cfg_Align = duet_dma_ctrl_block_init();
|
||||
SPI_TypeDef *SPIx = NULL;
|
||||
if ( ssp_idx == 0) {
|
||||
dma_chan = 6; //SPI0 tx channel
|
||||
dma_chan = 6; // SPI0 tx channel
|
||||
SPIx = SPI0;
|
||||
} else if ( ssp_idx == 1) {
|
||||
dma_chan = 8; //SPI1 tx channel
|
||||
dma_chan = 8; // SPI1 tx channel
|
||||
SPIx = SPI1;
|
||||
} else if ( ssp_idx == 2) {
|
||||
dma_chan = 10; //SPI2 tx channel
|
||||
dma_chan = 10; // SPI2 tx channel
|
||||
SPIx = SPI2;
|
||||
} else {
|
||||
return;
|
||||
@@ -269,13 +269,13 @@ void duet_dma_spi_rx(uint8_t ssp_idx, uint8_t *data, uint16_t len)
|
||||
Chan_Cfg_TypeDef ch_cfg;
|
||||
SPI_TypeDef *SPIx = NULL;
|
||||
if ( ssp_idx == 0) {
|
||||
dma_chan = 7; //SPI0 Rx channel
|
||||
dma_chan = 7; // SPI0 Rx channel
|
||||
SPIx = SPI0;
|
||||
} else if ( ssp_idx == 1) {
|
||||
dma_chan = 9; //SPI1 Rx channel
|
||||
dma_chan = 9; // SPI1 Rx channel
|
||||
SPIx = SPI1;
|
||||
} else if ( ssp_idx == 2) {
|
||||
dma_chan = 11; //SPI2 Rx channel
|
||||
dma_chan = 11; // SPI2 Rx channel
|
||||
SPIx = SPI2;
|
||||
} else {
|
||||
return;
|
||||
|
||||
@@ -25,24 +25,24 @@ void efuse_ldo25_open(void)
|
||||
uint16_t tmp_16;
|
||||
uint32_t tmp_32;
|
||||
// ----- Change APLL clock to 80MHz -----
|
||||
//SYS_CRM_WIFI_BLK_CLK = 0x1; // Enable WiFi core clock
|
||||
//delay(5); // wait for a few cycles for WiFi core clock settle
|
||||
//MDM_CLKGATEFCTRL0 = (0x1<<27); // Force RC clock open
|
||||
// SYS_CRM_WIFI_BLK_CLK = 0x1; // Enable WiFi core clock
|
||||
// delay(5); // wait for a few cycles for WiFi core clock settle
|
||||
// MDM_CLKGATEFCTRL0 = (0x1<<27); // Force RC clock open
|
||||
|
||||
//open 10uA current
|
||||
// open 10uA current
|
||||
tmp_16 = spi_mst_read(TRX_PD_CTRL1_REG_ADDR);
|
||||
tmp_16 &= (~(0x0001 << 13)); //clear bit13 (D_PD_BG)
|
||||
tmp_16 &= (~(0x0001 << 13)); // clear bit13 (D_PD_BG)
|
||||
spi_mst_write(TRX_PD_CTRL1_REG_ADDR, tmp_16);
|
||||
|
||||
tmp_16 = spi_mst_read(TRX_PD_CTRL2_REG_ADDR);
|
||||
tmp_16 &= (~(0x0003 << 2)); //clear bit<3:2> (D_PD_TRXTOP_BIAS, D_PD_TRXTOP_LDO)
|
||||
tmp_16 &= (~(0x0003 << 2)); // clear bit<3:2> (D_PD_TRXTOP_BIAS, D_PD_TRXTOP_LDO)
|
||||
spi_mst_write(TRX_PD_CTRL2_REG_ADDR, tmp_16);
|
||||
|
||||
//open PU LDO25: set D_AON_RCO32K_REG1<13> to 1
|
||||
// open PU LDO25: set D_AON_RCO32K_REG1<13> to 1
|
||||
tmp_32 = RTC_REG_RCO32K;
|
||||
RTC_REG_RCO32K = tmp_32 | (0x00000001 << (13 + 16));
|
||||
|
||||
//adjust PU LDO25 voltage: set D_AON_RCO32K_REG1<12:9> to 4'b0011
|
||||
// adjust PU LDO25 voltage: set D_AON_RCO32K_REG1<12:9> to 4'b0011
|
||||
tmp_32 = RTC_REG_RCO32K;
|
||||
tmp_32 &= ~(0x0000000F << (9 + 16));
|
||||
tmp_32 |= (0x00000003 << (9 + 16));
|
||||
@@ -132,10 +132,10 @@ void duet_efuse_word_write(uint16_t addr, uint32_t data)
|
||||
void duet_efuse_multi_read(uint16_t start_addr, uint16_t size_in_bytes, uint8_t *pData)
|
||||
{
|
||||
uint16_t i;
|
||||
//efuse init
|
||||
// efuse init
|
||||
duet_efuse_init(EFUSE_LDO25_CLOSE);
|
||||
|
||||
//efuse byte read
|
||||
// efuse byte read
|
||||
for (i = 0; i < size_in_bytes; i++) {
|
||||
*(pData + i) = duet_efuse_byte_read(start_addr + i);
|
||||
}
|
||||
|
||||
@@ -98,7 +98,7 @@ static int32_t refresh_flash_sector(duet_partition_t current_partition, uint32_t
|
||||
uint32_t end_offset = start_offset + len;
|
||||
memset(tmpbuf, 0, SPI_FLASH_SEC_SIZE);
|
||||
if ((FLASH_ACCESS_CONTROL0_DEFAULT_VALUE == FLASH_ACCESS_CONTROL0)
|
||||
&& (FLASH_ACCESS_CONTROL1_DEFAULT_VALUE == FLASH_ACCESS_CONTROL1) ) { //default flash remapping
|
||||
&& (FLASH_ACCESS_CONTROL1_DEFAULT_VALUE == FLASH_ACCESS_CONTROL1) ) { // default flash remapping
|
||||
tran_partition = current_partition;
|
||||
} else {
|
||||
if (current_partition == PARTITION_OTA_TEMP) {
|
||||
@@ -231,7 +231,7 @@ int32_t duet_flash_erase(duet_partition_t in_partition, uint32_t off_set, uint32
|
||||
addr = start_addr;
|
||||
while (size) {
|
||||
if (!(addr % SPI_FLASH_BLOCK_64K_SIZE) && (size > (SPI_FLASH_BLOCK_64K_SIZE - SPI_FLASH_SEC_SIZE))) {
|
||||
ret = duet_flash_alg_erase(BLOCK64_ERASE_CMD, addr); //250ms
|
||||
ret = duet_flash_alg_erase(BLOCK64_ERASE_CMD, addr); // 250ms
|
||||
if (ret != 0) {
|
||||
return ret;
|
||||
}
|
||||
@@ -242,7 +242,7 @@ int32_t duet_flash_erase(duet_partition_t in_partition, uint32_t off_set, uint32
|
||||
size = 0;
|
||||
}
|
||||
} else if (!(addr % SPI_FLASH_BLOCK_32K_SIZE) && (size > (SPI_FLASH_BLOCK_32K_SIZE - SPI_FLASH_SEC_SIZE))) {
|
||||
ret = duet_flash_alg_erase(BLOCK32_ERASE_CMD, addr); //170ms
|
||||
ret = duet_flash_alg_erase(BLOCK32_ERASE_CMD, addr); // 170ms
|
||||
if (ret != 0) {
|
||||
return ret;
|
||||
}
|
||||
@@ -253,7 +253,7 @@ int32_t duet_flash_erase(duet_partition_t in_partition, uint32_t off_set, uint32
|
||||
size = 0;
|
||||
}
|
||||
} else {
|
||||
ret = duet_flash_alg_erase(SECTOR_ERASE_CMD, addr); //100ms
|
||||
ret = duet_flash_alg_erase(SECTOR_ERASE_CMD, addr); // 100ms
|
||||
if (ret != 0) {
|
||||
return ret;
|
||||
}
|
||||
|
||||
@@ -50,11 +50,11 @@ FLASH_DRIVER_SEG int duet_flash_alg_check_busy (void)
|
||||
int var_rdata = 0;
|
||||
int cnt = 0;
|
||||
/* Add your Code */
|
||||
var_rdata = FLASH->QSPI_SR; //read back
|
||||
var_rdata = FLASH->QSPI_SR; // read back
|
||||
|
||||
while (((var_rdata >> 5) & 0x01) == 1) {
|
||||
var_rdata = FLASH->QSPI_SR; //read back
|
||||
if (cnt < 80000000) { //erase chip time(10s)/(160MHz*2cycle)
|
||||
var_rdata = FLASH->QSPI_SR; // read back
|
||||
if (cnt < 80000000) { // erase chip time(10s)/(160MHz*2cycle)
|
||||
cnt = cnt + 1;
|
||||
} else {
|
||||
return (1);
|
||||
@@ -69,10 +69,10 @@ FLASH_DRIVER_SEG int duet_flash_alg_check_abort_busy (void)
|
||||
int var_rdata = 0;
|
||||
int cnt = 0;
|
||||
/* Add your Code */
|
||||
var_rdata = FLASH->QSPI_SR; //read back
|
||||
var_rdata = FLASH->QSPI_SR; // read back
|
||||
|
||||
while (((var_rdata >> 6) & 0x01) == 1) {
|
||||
var_rdata = FLASH->QSPI_SR; //read back
|
||||
var_rdata = FLASH->QSPI_SR; // read back
|
||||
if (cnt < 200) { // /160MHz*10cycled
|
||||
cnt = cnt + 1;
|
||||
} else {
|
||||
@@ -107,10 +107,10 @@ FLASH_DRIVER_SEG int duet_flash_alg_polling_wip (void)
|
||||
{
|
||||
|
||||
int var_rdata = 0;
|
||||
//dumode=2'b00,fmode=2'b10,dmode=2'b01,reserved=1'b0,dcyc=5'h0,absize=2'b00,abmode=2'b00,adsize=2'b00,admode=2'b00,imode=2'b01,instruction=8'h05;
|
||||
// dumode=2'b00,fmode=2'b10,dmode=2'b01,reserved=1'b0,dcyc=5'h0,absize=2'b00,abmode=2'b00,adsize=2'b00,admode=2'b00,imode=2'b01,instruction=8'h05;
|
||||
FLASH->QSPI_CCR = 0x9000105;
|
||||
var_rdata = FLASH->QSPI_CR;
|
||||
FLASH->QSPI_CR = (var_rdata & 0xFFBFFFFF) + 0x400000; //QSPI_CR[22],apms= 1'b1;
|
||||
FLASH->QSPI_CR = (var_rdata & 0xFFBFFFFF) + 0x400000; // QSPI_CR[22],apms= 1'b1;
|
||||
FLASH->QSPI_DLR = 0x0; // one byte
|
||||
FLASH->QSPI_PSMKR = 0x1; // mask = 0x1;
|
||||
FLASH->QSPI_PSMAR = 0x0; // match = 0x0;
|
||||
@@ -125,10 +125,10 @@ FLASH_DRIVER_SEG int duet_flash_alg_polling_wip (void)
|
||||
FLASH_DRIVER_SEG int duet_flash_alg_polling_wel (void)
|
||||
{
|
||||
int var_rdata = 0;
|
||||
//dumode=2'b00,fmode=2'b10,dmode=2'b01,reserved=1'b0,dcyc=5'h0,absize=2'b00,abmode=2'b00,adsize=2'b00,admode=2'b00,imode=2'b01,instruction=8'h05;
|
||||
// dumode=2'b00,fmode=2'b10,dmode=2'b01,reserved=1'b0,dcyc=5'h0,absize=2'b00,abmode=2'b00,adsize=2'b00,admode=2'b00,imode=2'b01,instruction=8'h05;
|
||||
FLASH->QSPI_CCR = 0x9000105;
|
||||
var_rdata = FLASH->QSPI_CR;
|
||||
FLASH->QSPI_CR = (var_rdata & 0xFFBFFFFF) + 0x400000; //QSPI_CR[22],apms= 1'b1;
|
||||
FLASH->QSPI_CR = (var_rdata & 0xFFBFFFFF) + 0x400000; // QSPI_CR[22],apms= 1'b1;
|
||||
FLASH->QSPI_DLR = 0x0; // one byte
|
||||
FLASH->QSPI_PSMKR = 0x2; // mask = 0x1;
|
||||
FLASH->QSPI_PSMAR = 0x2; // match = 0x0;
|
||||
@@ -143,8 +143,8 @@ FLASH_DRIVER_SEG int duet_flash_alg_polling_wel (void)
|
||||
FLASH_DRIVER_SEG int duet_flash_alg_setqe (unsigned char quad)
|
||||
{
|
||||
|
||||
//bypass enable 0x4000308C bit10 set 1
|
||||
//*((volatile unsigned int *)(0x4000308C)) |= (1 << 10);
|
||||
// bypass enable 0x4000308C bit10 set 1
|
||||
// *((volatile unsigned int *)(0x4000308C)) |= (1 << 10);
|
||||
FLASH->QSPI_CFGR |= (1 << 10);
|
||||
duet_flash_alg_abort_en();
|
||||
duet_flash_alg_check_abort_busy();
|
||||
@@ -170,15 +170,15 @@ FLASH_DRIVER_SEG int duet_flash_alg_setqe (unsigned char quad)
|
||||
duet_flash_alg_check_busy();
|
||||
duet_flash_alg_clr_flg();
|
||||
duet_flash_alg_polling_wip();
|
||||
//bypass disable 0x4000308C bit10 clr
|
||||
//*((volatile unsigned int *)(0x4000308C)) &= ~(1 << 10);
|
||||
// bypass disable 0x4000308C bit10 clr
|
||||
// *((volatile unsigned int *)(0x4000308C)) &= ~(1 << 10);
|
||||
FLASH->QSPI_CFGR &= ~(1 << 10);
|
||||
/* Add your Code */
|
||||
|
||||
return (0); // Finished without Errors
|
||||
}
|
||||
|
||||
//use in unencryption
|
||||
// use in unencryption
|
||||
FLASH_DRIVER_SEG int duet_flash_alg_check_setqe (void)
|
||||
{
|
||||
|
||||
@@ -198,9 +198,9 @@ FLASH_DRIVER_SEG int duet_flash_alg_check_setqe (void)
|
||||
return var_rdata;
|
||||
}
|
||||
|
||||
vu32 duet_flash_line_cfg = 0; //flash line number config
|
||||
vu32 duet_flash_size_cfg = 0; //flash size config
|
||||
vu32 duet_flash_clk_cfg = 52; //flash clock config, default 52MHz
|
||||
vu32 duet_flash_line_cfg = 0; // flash line number config
|
||||
vu32 duet_flash_size_cfg = 0; // flash size config
|
||||
vu32 duet_flash_clk_cfg = 52; // flash clock config, default 52MHz
|
||||
FLASH_DRIVER_SEG void duet_flash_alg_load_cfg (void)
|
||||
{
|
||||
|
||||
@@ -208,41 +208,41 @@ FLASH_DRIVER_SEG void duet_flash_alg_load_cfg (void)
|
||||
duet_flash_alg_check_abort_busy();
|
||||
#ifdef _SPI_FLASH_240MHz_
|
||||
if (duet_flash_clk_cfg == 240) {
|
||||
FLASH->QSPI_CR = FLASH_QSPI_DIV3; //div3, //offset 0x00
|
||||
FLASH->QSPI_CR = FLASH_QSPI_DIV3; // div3, // offset 0x00
|
||||
FLASH->QSPI_CR |= 0x20; // set loop back en bit 5=1
|
||||
FLASH->QSPI_CR &= ~(7 << 13);
|
||||
FLASH->QSPI_CR |= (5 << 13); //ds = 5
|
||||
FLASH->QSPI_CR |= (5 << 13); // ds = 5
|
||||
|
||||
FLASH->QSPI_DCR = 0x00150000 ; //offset 0x04
|
||||
FLASH->QSPI_FCR = 0x0 ; //offset 0x0C
|
||||
FLASH->QSPI_DLR = 0x0 ; //offset 0x10
|
||||
FLASH->QSPI_DCR = 0x00150000 ; // offset 0x04
|
||||
FLASH->QSPI_FCR = 0x0 ; // offset 0x0C
|
||||
FLASH->QSPI_DLR = 0x0 ; // offset 0x10
|
||||
FLASH->QSPI_CCR =
|
||||
duet_flash_line_cfg; //dumode=2'b10,,sio=1'b0,fmode=2'b11,dmode=2'b10,reserved=1'b0,dcyc=5'h7,absize=2'b00,abmode=2'b00,adsize=2'b10,admode=2'b01,imode=2'b01,instruction=8'h3B;
|
||||
FLASH->QSPI_AR = 0x0 ; //offset 0x18
|
||||
FLASH->QSPI_ABR = 0x0 ; //offset 0x1C
|
||||
FLASH->QSPI_DR = 0x0 ; //offset 0x20
|
||||
FLASH->QSPI_PSMKR = 0x0 ; //offset 0x24
|
||||
FLASH->QSPI_PSMAR = 0x0 ; //offset 0x28
|
||||
FLASH->QSPI_PIR = 0x0 ; //offset 0x2C
|
||||
FLASH->QSPI_TOR = 0x12FFFF ; //offset 0x30
|
||||
FLASH->QSPI_CFGR = 0x7202; //offset 0x8C [15:12] set loop back delay=7
|
||||
duet_flash_line_cfg; // dumode=2'b10,,sio=1'b0,fmode=2'b11,dmode=2'b10,reserved=1'b0,dcyc=5'h7,absize=2'b00,abmode=2'b00,adsize=2'b10,admode=2'b01,imode=2'b01,instruction=8'h3B;
|
||||
FLASH->QSPI_AR = 0x0 ; // offset 0x18
|
||||
FLASH->QSPI_ABR = 0x0 ; // offset 0x1C
|
||||
FLASH->QSPI_DR = 0x0 ; // offset 0x20
|
||||
FLASH->QSPI_PSMKR = 0x0 ; // offset 0x24
|
||||
FLASH->QSPI_PSMAR = 0x0 ; // offset 0x28
|
||||
FLASH->QSPI_PIR = 0x0 ; // offset 0x2C
|
||||
FLASH->QSPI_TOR = 0x12FFFF ; // offset 0x30
|
||||
FLASH->QSPI_CFGR = 0x7202; // offset 0x8C [15:12] set loop back delay=7
|
||||
} else
|
||||
#endif
|
||||
{
|
||||
FLASH->QSPI_CR = FLASH_QSPI_DIV2; //div2, //offset 0x00
|
||||
FLASH->QSPI_DCR = 0x00150000 ; //offset 0x04
|
||||
FLASH->QSPI_FCR = 0x0 ; //offset 0x0C
|
||||
FLASH->QSPI_DLR = 0x0 ; //offset 0x10
|
||||
FLASH->QSPI_CR = FLASH_QSPI_DIV2; // div2, // offset 0x00
|
||||
FLASH->QSPI_DCR = 0x00150000 ; // offset 0x04
|
||||
FLASH->QSPI_FCR = 0x0 ; // offset 0x0C
|
||||
FLASH->QSPI_DLR = 0x0 ; // offset 0x10
|
||||
FLASH->QSPI_CCR =
|
||||
duet_flash_line_cfg; //dumode=2'b10,,sio=1'b0,fmode=2'b11,dmode=2'b10,reserved=1'b0,dcyc=5'h7,absize=2'b00,abmode=2'b00,adsize=2'b10,admode=2'b01,imode=2'b01,instruction=8'h3B;
|
||||
FLASH->QSPI_AR = 0x0 ; //offset 0x18
|
||||
FLASH->QSPI_ABR = 0x0 ; //offset 0x1C
|
||||
FLASH->QSPI_DR = 0x0 ; //offset 0x20
|
||||
FLASH->QSPI_PSMKR = 0x0 ; //offset 0x24
|
||||
FLASH->QSPI_PSMAR = 0x0 ; //offset 0x28
|
||||
FLASH->QSPI_PIR = 0x0 ; //offset 0x2C
|
||||
FLASH->QSPI_TOR = 0x12FFFF ; //offset 0x30
|
||||
FLASH->QSPI_CFGR = 0x202 ; //offset 0x8C bit1:direct access optimization enable
|
||||
duet_flash_line_cfg; // dumode=2'b10,,sio=1'b0,fmode=2'b11,dmode=2'b10,reserved=1'b0,dcyc=5'h7,absize=2'b00,abmode=2'b00,adsize=2'b10,admode=2'b01,imode=2'b01,instruction=8'h3B;
|
||||
FLASH->QSPI_AR = 0x0 ; // offset 0x18
|
||||
FLASH->QSPI_ABR = 0x0 ; // offset 0x1C
|
||||
FLASH->QSPI_DR = 0x0 ; // offset 0x20
|
||||
FLASH->QSPI_PSMKR = 0x0 ; // offset 0x24
|
||||
FLASH->QSPI_PSMAR = 0x0 ; // offset 0x28
|
||||
FLASH->QSPI_PIR = 0x0 ; // offset 0x2C
|
||||
FLASH->QSPI_TOR = 0x12FFFF ; // offset 0x30
|
||||
FLASH->QSPI_CFGR = 0x202 ; // offset 0x8C bit1:direct access optimization enable
|
||||
}
|
||||
|
||||
}
|
||||
@@ -251,10 +251,10 @@ FLASH_DRIVER_SEG void duet_flash_alg_load_cfg (void)
|
||||
FLASH_DRIVER_SEG int duet_flash_alg_init (void)
|
||||
{
|
||||
|
||||
//add delay to avoid confilict between flash cfg and instruction fetch by cache
|
||||
// add delay to avoid confilict between flash cfg and instruction fetch by cache
|
||||
duet_flash_alg_f_delay(32);
|
||||
duet_flash_line_cfg = FLASH_QSPI_L4; //config flash line here
|
||||
duet_flash_size_cfg = FLASH_QSPI_DCR_4M; //config flash size here
|
||||
duet_flash_line_cfg = FLASH_QSPI_L4; // config flash line here
|
||||
duet_flash_size_cfg = FLASH_QSPI_DCR_4M; // config flash size here
|
||||
duet_flash_alg_abort_en();
|
||||
duet_flash_alg_check_abort_busy();
|
||||
if (duet_flash_line_cfg == FLASH_QSPI_L4) {
|
||||
@@ -265,7 +265,7 @@ FLASH_DRIVER_SEG int duet_flash_alg_init (void)
|
||||
|
||||
duet_flash_alg_load_cfg();
|
||||
|
||||
//flush cache after flash operation
|
||||
// flush cache after flash operation
|
||||
duet_flash_alg_cache_flush();
|
||||
|
||||
return (0); // Finished without Errors
|
||||
@@ -278,7 +278,7 @@ FLASH_DRIVER_SEG int duet_flash_alg_init (void)
|
||||
FLASH_DRIVER_SEG int duet_flash_alg_erase(unsigned int cmd, unsigned long adr)
|
||||
{
|
||||
|
||||
//add delay to avoid confilict between flash cfg and instruction fetch by cache
|
||||
// add delay to avoid confilict between flash cfg and instruction fetch by cache
|
||||
duet_flash_alg_f_delay(32);
|
||||
|
||||
duet_flash_alg_abort_en();
|
||||
@@ -305,7 +305,7 @@ FLASH_DRIVER_SEG int duet_flash_alg_erase(unsigned int cmd, unsigned long adr)
|
||||
duet_flash_alg_clr_flg();
|
||||
duet_flash_alg_load_cfg();
|
||||
|
||||
//flush cache after flash operation
|
||||
// flush cache after flash operation
|
||||
duet_flash_alg_cache_flush();
|
||||
/* Add your Code */
|
||||
|
||||
@@ -324,7 +324,7 @@ FLASH_DRIVER_SEG int duet_flash_alg_programpage(unsigned long adr, unsigned long
|
||||
{
|
||||
|
||||
unsigned long sz_temp;
|
||||
//volatile int cycle_count = 0;
|
||||
// volatile int cycle_count = 0;
|
||||
int var_rdata = 0;
|
||||
int fthres = 8;
|
||||
int cnt = 0;
|
||||
@@ -342,7 +342,7 @@ FLASH_DRIVER_SEG int duet_flash_alg_programpage(unsigned long adr, unsigned long
|
||||
sz_temp = sz - 1;
|
||||
sz = (sz + 3) & ~3; // Adjust size for Words
|
||||
|
||||
//add delay to avoid confilict between flash cfg and instruction fetch by cache
|
||||
// add delay to avoid confilict between flash cfg and instruction fetch by cache
|
||||
duet_flash_alg_f_delay(32);
|
||||
|
||||
duet_flash_alg_abort_en();
|
||||
@@ -371,7 +371,7 @@ FLASH_DRIVER_SEG int duet_flash_alg_programpage(unsigned long adr, unsigned long
|
||||
}
|
||||
duet_flash_alg_f_delay(10);
|
||||
duet_flash_alg_check_busy();
|
||||
FLASH->SBUS_START = 0x01; //WRITE
|
||||
FLASH->SBUS_START = 0x01; // WRITE
|
||||
duet_flash_alg_f_delay(10);
|
||||
while (sz) {
|
||||
var_rdata = FLASH->QSPI_SR;
|
||||
@@ -387,8 +387,8 @@ FLASH_DRIVER_SEG int duet_flash_alg_programpage(unsigned long adr, unsigned long
|
||||
duet_flash_alg_polling_wip();
|
||||
duet_flash_alg_load_cfg ();
|
||||
|
||||
//flush cache after flash operation
|
||||
//lega_flash_alg_cache_flush_by_Addr(adr,sz);
|
||||
// flush cache after flash operation
|
||||
// lega_flash_alg_cache_flush_by_Addr(adr,sz);
|
||||
duet_flash_alg_cache_flush();
|
||||
|
||||
return (0); // Finished without Errors
|
||||
@@ -413,12 +413,12 @@ FLASH_DRIVER_SEG void duet_flash_alg_read_buf_clr(void)
|
||||
FLASH_DRIVER_SEG void duet_flash_alg_set_clk_120(unsigned char en_120m)
|
||||
{
|
||||
if (en_120m) {
|
||||
//flash clock is source/4
|
||||
// flash clock is source/4
|
||||
REG_WR(APB_PERI_CLK_CTRL_REG, ((REG_RD(APB_PERI_CLK_CTRL_REG) & ~(0x3)) | 0x2));
|
||||
//switch flash clock source to RF 480M
|
||||
// switch flash clock source to RF 480M
|
||||
REG_WR(WIFI_BLE_FLASH_CLK_CTRL_REG, (REG_RD(WIFI_BLE_FLASH_CLK_CTRL_REG) | (1 << 7)));
|
||||
} else {
|
||||
//switch flash clock source to XO 52M
|
||||
// switch flash clock source to XO 52M
|
||||
REG_WR(WIFI_BLE_FLASH_CLK_CTRL_REG, (REG_RD(WIFI_BLE_FLASH_CLK_CTRL_REG) & (~(1 << 7))));
|
||||
}
|
||||
}
|
||||
@@ -432,12 +432,12 @@ FLASH_DRIVER_SEG void duet_flash_alg_set_clk_240(unsigned char en_240m)
|
||||
duet_flash_alg_load_cfg();
|
||||
duet_flash_alg_cache_flush();
|
||||
|
||||
//0x0:flash clock = source APLL 480MHZ / 2
|
||||
// 0x0:flash clock = source APLL 480MHZ / 2
|
||||
REG_WR(APB_PERI_CLK_CTRL_REG, ((REG_RD(APB_PERI_CLK_CTRL_REG) & ~(0x3)) | 0x0));
|
||||
//switch flash clock source to RF 480M
|
||||
// switch flash clock source to RF 480M
|
||||
REG_WR(WIFI_BLE_FLASH_CLK_CTRL_REG, (REG_RD(WIFI_BLE_FLASH_CLK_CTRL_REG) | (1 << 7)));
|
||||
} else {
|
||||
//switch flash clock source to XO 52M
|
||||
// switch flash clock source to XO 52M
|
||||
REG_WR(WIFI_BLE_FLASH_CLK_CTRL_REG, (REG_RD(WIFI_BLE_FLASH_CLK_CTRL_REG) & (~(1 << 7))));
|
||||
|
||||
duet_flash_clk_cfg = 52;
|
||||
@@ -489,7 +489,7 @@ FLASH_DRIVER_SEG void duet_flash_alg_calibrate_shift(int prescaler)
|
||||
int match_flag[8] = {0};
|
||||
int match_interval[8] = {0};
|
||||
|
||||
//*(volatile int *)(0x40000808) = 0x2;
|
||||
// *(volatile int *)(0x40000808) = 0x2;
|
||||
REG_WR(CLK_FLASH_SEL, FLASH_240_CLK);
|
||||
|
||||
for (delay_shift = 0; delay_shift < 8; delay_shift = delay_shift + 1) {
|
||||
@@ -501,7 +501,7 @@ FLASH_DRIVER_SEG void duet_flash_alg_calibrate_shift(int prescaler)
|
||||
wdata |= (sshift & 0xF) << 27;
|
||||
wdata |= (delay_shift & 0x7) << 13;
|
||||
FLASH->QSPI_CR = wdata;
|
||||
//read_id
|
||||
// read_id
|
||||
identi = duet_flash_alg_read_id();
|
||||
|
||||
id = identi & 0xFF;
|
||||
@@ -532,7 +532,7 @@ FLASH_DRIVER_SEG void duet_flash_alg_calibrate_shift(int prescaler)
|
||||
match_interval[i] = 0;
|
||||
}
|
||||
}
|
||||
//get the best delay_shift(means max mactch_interval
|
||||
// get the best delay_shift(means max mactch_interval
|
||||
delay_shift = 0;
|
||||
for (i = 1; i < 8; i = i + 1) {
|
||||
if (match_interval[i] > match_interval[delay_shift]) {
|
||||
|
||||
@@ -19,7 +19,7 @@
|
||||
#include "duet_gpio.h"
|
||||
|
||||
duet_gpio_cb_t g_duet_gpio_handler[DUET_GPIO_TOTAL_NUM];
|
||||
//gpio pinmux function table
|
||||
// gpio pinmux function table
|
||||
const uint32_t GPIO_PINMUX_FUN[DUET_GPIO_TOTAL_NUM] = {
|
||||
0, 0, 0, 0, 1, 1, 0, 0,
|
||||
0, 0, 2, 0, 0, 0, 4, 4,
|
||||
@@ -31,18 +31,18 @@ void GPIO_IRQHandler(void)
|
||||
// duet_intrpt_enter();
|
||||
for (int i = 0; i < DUET_GPIO_TOTAL_NUM; i++) {
|
||||
if (i < DUET_GPIO_NUM_PER_GROUP) {
|
||||
//gpio group0 irq
|
||||
// gpio group0 irq
|
||||
if (GPIO_GROUP0->INTSTATUS & (0x0001 << i)) {
|
||||
//clear GPIO GROUP0 interrupt
|
||||
// clear GPIO GROUP0 interrupt
|
||||
GPIO_GROUP0->INTSTATUS = (0x0001 << i);
|
||||
if (g_duet_gpio_handler[i].cb) {
|
||||
g_duet_gpio_handler[i].cb(g_duet_gpio_handler[i].arg);
|
||||
}
|
||||
}
|
||||
} else {
|
||||
//gpio group1 irq
|
||||
// gpio group1 irq
|
||||
if (GPIO_GROUP1->INTSTATUS & (0x0001 << (i - DUET_GPIO_NUM_PER_GROUP))) {
|
||||
//clear GPIO GROUP1 interrupt
|
||||
// clear GPIO GROUP1 interrupt
|
||||
GPIO_GROUP1->INTSTATUS = (0x0001 << (i - DUET_GPIO_NUM_PER_GROUP));
|
||||
if (g_duet_gpio_handler[i].cb) {
|
||||
g_duet_gpio_handler[i].cb(g_duet_gpio_handler[i].arg);
|
||||
@@ -69,7 +69,7 @@ int32_t duet_gpio_init(duet_gpio_dev_t *gpio)
|
||||
if (NULL == gpio) {
|
||||
return EIO;
|
||||
}
|
||||
//pinmux setting
|
||||
// pinmux setting
|
||||
if (gpio->port < 8) {
|
||||
reg_value = REG_RD(PINMUX_CTRL_REG0) & (~(0x0000000F << (4 * gpio->port)));
|
||||
REG_WR(PINMUX_CTRL_REG0, (reg_value | (GPIO_PINMUX_FUN[gpio->port] << (4 * gpio->port))));
|
||||
@@ -130,9 +130,9 @@ int32_t duet_gpio_init(duet_gpio_dev_t *gpio)
|
||||
break;
|
||||
default:
|
||||
return EIO;
|
||||
//break;
|
||||
// break;
|
||||
}
|
||||
} else { //if(gpio->port < 32/24)
|
||||
} else { // if(gpio->port < 32/24)
|
||||
switch (gpio->config) {
|
||||
case DUET_ANALOG_MODE:
|
||||
break;
|
||||
@@ -174,7 +174,7 @@ int32_t duet_gpio_init(duet_gpio_dev_t *gpio)
|
||||
break;
|
||||
default:
|
||||
return EIO;
|
||||
//break;
|
||||
// break;
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
@@ -326,8 +326,8 @@ int32_t duet_gpio_enable_irq(duet_gpio_dev_t *gpio, duet_gpio_irq_trigger_t trig
|
||||
if (gpio->port < DUET_GPIO_NUM_PER_GROUP) {
|
||||
switch (trigger) {
|
||||
case DUET_IRQ_TRIGGER_RISING_EDGE:
|
||||
GPIO_GROUP0->INTTYPESET = (1 << gpio->port); //edge or level trig
|
||||
GPIO_GROUP0->INTPOLSET = (1 << gpio->port); //trig polarity
|
||||
GPIO_GROUP0->INTTYPESET = (1 << gpio->port); // edge or level trig
|
||||
GPIO_GROUP0->INTPOLSET = (1 << gpio->port); // trig polarity
|
||||
break;
|
||||
case DUET_IRQ_TRIGGER_FALLING_EDGE:
|
||||
GPIO_GROUP0->INTTYPESET = (1 << gpio->port);
|
||||
@@ -337,7 +337,7 @@ int32_t duet_gpio_enable_irq(duet_gpio_dev_t *gpio, duet_gpio_irq_trigger_t trig
|
||||
default:
|
||||
return EIO;
|
||||
}
|
||||
GPIO_GROUP0->INTENSET = (1 << gpio->port); //int enable
|
||||
GPIO_GROUP0->INTENSET = (1 << gpio->port); // int enable
|
||||
} else if (gpio->port < DUET_GPIO_TOTAL_NUM) {
|
||||
switch (trigger) {
|
||||
case DUET_IRQ_TRIGGER_RISING_EDGE:
|
||||
@@ -376,7 +376,7 @@ int32_t duet_gpio_disable_irq(duet_gpio_dev_t *gpio)
|
||||
}
|
||||
g_duet_gpio_handler[gpio->port].cb = NULL;
|
||||
g_duet_gpio_handler[gpio->port].arg = NULL;
|
||||
//NVIC_DisableIRQ(GPIO_IRQn); //common use
|
||||
// NVIC_DisableIRQ(GPIO_IRQn); // common use
|
||||
if (gpio->port < DUET_GPIO_NUM_PER_GROUP) {
|
||||
GPIO_GROUP0->INTENCLR = (1 << gpio->port);
|
||||
GPIO_GROUP0->INTTYPECLR = (1 << gpio->port);
|
||||
@@ -407,9 +407,9 @@ int32_t duet_gpio_clear_irq(duet_gpio_dev_t *gpio)
|
||||
}
|
||||
|
||||
if (gpio->port < DUET_GPIO_NUM_PER_GROUP) {
|
||||
//GPIO interrupt status
|
||||
// GPIO interrupt status
|
||||
if (GPIO_GROUP0->INTSTATUS & (1 << gpio->port)) {
|
||||
//clear GPIO interrupt status
|
||||
// clear GPIO interrupt status
|
||||
GPIO_GROUP0->INTSTATUS = (1 << gpio->port);
|
||||
}
|
||||
} else if (gpio->port < DUET_GPIO_TOTAL_NUM) {
|
||||
|
||||
@@ -22,7 +22,7 @@
|
||||
#include "duet_dma.h"
|
||||
#include "duet_i2c.h"
|
||||
|
||||
//duet_i2c_slv_callback_t g_duet_i2c_slv_callback_handler[DUET_I2C_NUM];
|
||||
// duet_i2c_slv_callback_t g_duet_i2c_slv_callback_handler[DUET_I2C_NUM];
|
||||
duet_timer_dev_t g_duet_timer1;
|
||||
volatile int g_duet_i2c_timeout = 0;
|
||||
duet_i2c_priv_cfg_t duet_i2c_priv_cfg = {
|
||||
@@ -99,8 +99,8 @@ int32_t duet_i2c_reset( I2C_TypeDef *I2Cx)
|
||||
}
|
||||
|
||||
if ( temp ) {
|
||||
I2Cx->CR &= I2C_UNIT_RESET; //clear rest of CR
|
||||
I2Cx->CR |= I2C_UNIT_RESET; //set RESET bit
|
||||
I2Cx->CR &= I2C_UNIT_RESET; // clear rest of CR
|
||||
I2Cx->CR |= I2C_UNIT_RESET; // set RESET bit
|
||||
I2Cx->SR = 0;
|
||||
I2Cx->CR &= ~I2C_UNIT_RESET; // clear RESET bit
|
||||
} else {
|
||||
@@ -215,7 +215,7 @@ int32_t duet_i2c_init(duet_i2c_dev_t *i2c)
|
||||
|
||||
duet_i2c_interrupt_config(I2Cx, I2C_INTERRUPT_SLAVE_ADDR_DET_EN | I2C_INTERRUPT_TRANS_DONE_EN |
|
||||
I2C_INTERRUPT_RX_FIFO_FULL_EN | I2C_INTERRUPT_BUS_ERROR_DET_EN \
|
||||
| I2C_INTERRUPT_MASTER_STOP_DET_EN, ENABLE);//master
|
||||
| I2C_INTERRUPT_MASTER_STOP_DET_EN, ENABLE); // master
|
||||
} else {
|
||||
/* i2c as slave */
|
||||
I2Cx->SAR = i2c->config.dev_addr; // set unit address as slave
|
||||
@@ -223,12 +223,12 @@ int32_t duet_i2c_init(duet_i2c_dev_t *i2c)
|
||||
I2Cx->CR |= (duet_i2c_priv_cfg.speed_mode << I2C_MODE_SET_POS); // set speed mode
|
||||
// I2Cx->CR |= pI2C_InitStrcut->i2c_mst_fifo_mode; // FIFO mode is not for slave mode, so this has no effect
|
||||
I2Cx->CR |= I2C_INTERRUPT_SLAVE_ADDR_DET_EN | I2C_INTERRUPT_RX_FIFO_FULL_EN | I2C_INTERRUPT_RX_BUFER_FULL_EN |
|
||||
I2C_INTERRUPT_SLAVE_STOP_DET_EN | I2C_INTERRUPT_TRANS_DONE_EN | I2C_INTERRUPT_TX_BUFFER_EMPTY_EN; //master read
|
||||
I2C_INTERRUPT_SLAVE_STOP_DET_EN | I2C_INTERRUPT_TRANS_DONE_EN | I2C_INTERRUPT_TX_BUFFER_EMPTY_EN; // master read
|
||||
I2Cx->CR |= I2C_UNIT_ENABLE; // unit enable
|
||||
|
||||
duet_i2c_interrupt_config(I2Cx, I2C_INTERRUPT_SLAVE_ADDR_DET_EN | I2C_INTERRUPT_RX_FIFO_FULL_EN |
|
||||
I2C_INTERRUPT_RX_BUFER_FULL_EN | I2C_INTERRUPT_SLAVE_STOP_DET_EN \
|
||||
| I2C_INTERRUPT_TRANS_DONE_EN | I2C_INTERRUPT_TX_BUFFER_EMPTY_EN, ENABLE);//slave
|
||||
| I2C_INTERRUPT_TRANS_DONE_EN | I2C_INTERRUPT_TX_BUFFER_EMPTY_EN, ENABLE); // slave
|
||||
}
|
||||
if (duet_i2c_priv_cfg.dma_mode == I2C_DMA_ENABLE) {
|
||||
I2Cx->CR |= I2C_DMA_ENABLE;
|
||||
@@ -236,9 +236,9 @@ int32_t duet_i2c_init(duet_i2c_dev_t *i2c)
|
||||
|
||||
// I2C interrupt enable should be put before I2C enable
|
||||
if (I2C_DEVICE0 == i2c->port) { // I2C_DEVICE0
|
||||
NVIC_EnableIRQ(I2C0_IRQn); //enable I2C0 interrupt
|
||||
NVIC_EnableIRQ(I2C0_IRQn); // enable I2C0 interrupt
|
||||
} else {
|
||||
NVIC_EnableIRQ(I2C1_IRQn); //enable I2C1 interrupt
|
||||
NVIC_EnableIRQ(I2C1_IRQn); // enable I2C1 interrupt
|
||||
}
|
||||
|
||||
/* check the bus busy after unit enable */
|
||||
@@ -279,7 +279,7 @@ int32_t duet_i2c_master_send(duet_i2c_dev_t *i2c, uint16_t dev_addr, const uint8
|
||||
g_duet_timer1.config.cb = duet_timer1_irq_handler;
|
||||
g_duet_timer1.config.arg = NULL;
|
||||
|
||||
g_duet_timer1.config.period = timeout * 1000; //us
|
||||
g_duet_timer1.config.period = timeout * 1000; // us
|
||||
|
||||
duet_timer_init(&g_duet_timer1);
|
||||
g_duet_i2c_timeout = 0;
|
||||
@@ -303,7 +303,7 @@ int32_t duet_i2c_master_send(duet_i2c_dev_t *i2c, uint16_t dev_addr, const uint8
|
||||
}
|
||||
|
||||
if (size > I2C_TX_FIFO_DEPTH) {
|
||||
//send 8 bytes
|
||||
// send 8 bytes
|
||||
for (temp = 0; temp < I2C_TX_FIFO_DEPTH; temp++) {
|
||||
if (g_duet_i2c_timeout) {
|
||||
g_duet_i2c_timeout = 0;
|
||||
@@ -312,7 +312,7 @@ int32_t duet_i2c_master_send(duet_i2c_dev_t *i2c, uint16_t dev_addr, const uint8
|
||||
}
|
||||
|
||||
if ( i2c_get_flag_status(I2Cx, I2C_STATUS_BUS_ERROR_DET) ) {
|
||||
ret = -EBUSERR; //bus error
|
||||
ret = -EBUSERR; // bus error
|
||||
goto EXIT;
|
||||
} else {
|
||||
I2Cx->WFIFO = (*data++) | I2C_TB;
|
||||
@@ -320,7 +320,7 @@ int32_t duet_i2c_master_send(duet_i2c_dev_t *i2c, uint16_t dev_addr, const uint8
|
||||
}
|
||||
size -= I2C_TX_FIFO_DEPTH;
|
||||
} else {
|
||||
//send remaining bytes
|
||||
// send remaining bytes
|
||||
for (temp = 0; temp < size; temp++) {
|
||||
if (g_duet_i2c_timeout) {
|
||||
g_duet_i2c_timeout = 0;
|
||||
@@ -329,7 +329,7 @@ int32_t duet_i2c_master_send(duet_i2c_dev_t *i2c, uint16_t dev_addr, const uint8
|
||||
}
|
||||
|
||||
if ( i2c_get_flag_status(I2Cx, I2C_STATUS_BUS_ERROR_DET) ) {
|
||||
ret = -EBUSERR; //bus error
|
||||
ret = -EBUSERR; // bus error
|
||||
goto EXIT;
|
||||
} else {
|
||||
if (temp == size - 1) {
|
||||
@@ -376,7 +376,7 @@ int32_t duet_i2c_master_recv(duet_i2c_dev_t *i2c, uint16_t dev_addr, uint8_t *da
|
||||
g_duet_timer1.config.cb = duet_timer1_irq_handler;
|
||||
g_duet_timer1.config.arg = NULL;
|
||||
|
||||
g_duet_timer1.config.period = timeout * 1000; //us
|
||||
g_duet_timer1.config.period = timeout * 1000; // us
|
||||
|
||||
duet_timer_init(&g_duet_timer1);
|
||||
g_duet_i2c_timeout = 0;
|
||||
@@ -445,20 +445,20 @@ int8_t duet_i2c_master_repeated_write_read(I2C_TypeDef *I2Cx, uint8_t slave_addr
|
||||
while ( !i2c_get_flag_status(I2Cx, I2C_STATUS_TX_FIFO_EMPTY) );
|
||||
|
||||
if (wlen > I2C_TX_FIFO_DEPTH) {
|
||||
//send 8 bytes
|
||||
// send 8 bytes
|
||||
for (temp = 0; temp < I2C_TX_FIFO_DEPTH; temp++) {
|
||||
if ( i2c_get_flag_status(I2Cx, I2C_STATUS_BUS_ERROR_DET) ) {
|
||||
return EIO; //bus error
|
||||
return EIO; // bus error
|
||||
} else {
|
||||
I2Cx->WFIFO = (*pwdata++) | I2C_TB;
|
||||
}
|
||||
}
|
||||
wlen -= I2C_TX_FIFO_DEPTH;
|
||||
} else {
|
||||
//send remaining bytes
|
||||
// send remaining bytes
|
||||
for (temp = 0; temp < wlen; temp++) {
|
||||
if ( i2c_get_flag_status(I2Cx, I2C_STATUS_BUS_ERROR_DET) ) {
|
||||
return EIO; //bus error
|
||||
return EIO; // bus error
|
||||
} else {
|
||||
if (temp == wlen - 1) {
|
||||
I2Cx->WFIFO = (*pwdata) | I2C_TB; // no need to send STOP for repeated read
|
||||
@@ -524,7 +524,7 @@ int32_t duet_i2c_mem_write(duet_i2c_dev_t *i2c, uint16_t dev_addr, uint16_t mem_
|
||||
g_duet_timer1.config.cb = duet_timer1_irq_handler;
|
||||
g_duet_timer1.config.arg = NULL;
|
||||
|
||||
g_duet_timer1.config.period = timeout * 1000; //us
|
||||
g_duet_timer1.config.period = timeout * 1000; // us
|
||||
|
||||
duet_timer_init(&g_duet_timer1);
|
||||
g_duet_i2c_timeout = 0;
|
||||
@@ -559,7 +559,7 @@ int32_t duet_i2c_mem_write(duet_i2c_dev_t *i2c, uint16_t dev_addr, uint16_t mem_
|
||||
}
|
||||
|
||||
if (len > I2C_TX_FIFO_DEPTH) {
|
||||
//send 8 bytes
|
||||
// send 8 bytes
|
||||
for (temp = 0; temp < I2C_TX_FIFO_DEPTH; temp++) {
|
||||
if (g_duet_i2c_timeout) {
|
||||
g_duet_i2c_timeout = 0;
|
||||
@@ -568,7 +568,7 @@ int32_t duet_i2c_mem_write(duet_i2c_dev_t *i2c, uint16_t dev_addr, uint16_t mem_
|
||||
}
|
||||
|
||||
if ( i2c_get_flag_status(I2Cx, I2C_STATUS_BUS_ERROR_DET) ) {
|
||||
ret = -EBUSERR; //bus error
|
||||
ret = -EBUSERR; // bus error
|
||||
goto EXIT;
|
||||
} else {
|
||||
i2c_write_byte(I2Cx, (*data++) | I2C_TB);
|
||||
@@ -576,7 +576,7 @@ int32_t duet_i2c_mem_write(duet_i2c_dev_t *i2c, uint16_t dev_addr, uint16_t mem_
|
||||
}
|
||||
len -= I2C_TX_FIFO_DEPTH;
|
||||
} else {
|
||||
//send remaining bytes
|
||||
// send remaining bytes
|
||||
for (temp = 0; temp < len; temp++) {
|
||||
if (g_duet_i2c_timeout) {
|
||||
g_duet_i2c_timeout = 0;
|
||||
@@ -585,7 +585,7 @@ int32_t duet_i2c_mem_write(duet_i2c_dev_t *i2c, uint16_t dev_addr, uint16_t mem_
|
||||
}
|
||||
|
||||
if ( i2c_get_flag_status(I2Cx, I2C_STATUS_BUS_ERROR_DET) ) {
|
||||
ret = -EBUSERR; //bus error
|
||||
ret = -EBUSERR; // bus error
|
||||
goto EXIT;
|
||||
} else {
|
||||
if (temp == len - 1) {
|
||||
@@ -633,7 +633,7 @@ int32_t duet_i2c_mem_read(duet_i2c_dev_t *i2c, uint16_t dev_addr, uint16_t mem_a
|
||||
g_duet_timer1.config.cb = duet_timer1_irq_handler;
|
||||
g_duet_timer1.config.arg = NULL;
|
||||
|
||||
g_duet_timer1.config.period = timeout * 1000; //us
|
||||
g_duet_timer1.config.period = timeout * 1000; // us
|
||||
|
||||
duet_timer_init(&g_duet_timer1);
|
||||
g_duet_i2c_timeout = 0;
|
||||
@@ -674,7 +674,7 @@ int32_t duet_i2c_mem_read(duet_i2c_dev_t *i2c, uint16_t dev_addr, uint16_t mem_a
|
||||
}
|
||||
|
||||
if ( i2c_get_flag_status(I2Cx, I2C_STATUS_BUS_ERROR_DET) ) {
|
||||
ret = -EBUSERR; //bus error
|
||||
ret = -EBUSERR; // bus error
|
||||
goto EXIT;
|
||||
} else {
|
||||
if (i == size - 1) {
|
||||
@@ -739,9 +739,9 @@ int32_t duet_i2c_finalize(duet_i2c_dev_t *i2c)
|
||||
I2Cx = I2Cx;
|
||||
// disable i2c cm4 irq
|
||||
if (I2C_DEVICE0 == i2c->port) { // I2C_DEVICE0
|
||||
NVIC_DisableIRQ(I2C0_IRQn); //disable I2C0 interrupt
|
||||
NVIC_DisableIRQ(I2C0_IRQn); // disable I2C0 interrupt
|
||||
} else {
|
||||
NVIC_DisableIRQ(I2C1_IRQn); //disable I2C1 interrupt
|
||||
NVIC_DisableIRQ(I2C1_IRQn); // disable I2C1 interrupt
|
||||
}
|
||||
|
||||
// I2C IRQ disable
|
||||
@@ -753,19 +753,19 @@ int32_t duet_i2c_finalize(duet_i2c_dev_t *i2c)
|
||||
REG_WR(DUTE_IRQ_DIS_REG, (reg_val | I2C1_IRQ_DISABLE));
|
||||
}
|
||||
|
||||
//i2c clk disable
|
||||
// i2c clk disable
|
||||
if (I2C_DEVICE0 == i2c->port) { // I2C_DEVICE0
|
||||
//I2C0 clock disable
|
||||
// I2C0 clock disable
|
||||
reg_val = REG_RD(PERI_CLK_DIS_REG1);
|
||||
REG_WR(PERI_CLK_DIS_REG1, (reg_val & ((I2C0_BUS_CLOCK_DISABLE | I2C0_PERI_CLOCK_DISABLE))));
|
||||
} else { // I2C_DEVICE1
|
||||
//I2C1 clock disable
|
||||
// I2C1 clock disable
|
||||
reg_val = REG_RD(PERI_CLK_DIS_REG1);
|
||||
REG_WR(PERI_CLK_DIS_REG1, (reg_val & ((I2C1_BUS_CLOCK_DISABLE | I2C1_PERI_CLOCK_DISABLE))));
|
||||
}
|
||||
//callback function pointer clear
|
||||
//g_duet_i2c_slv_callback_handler[i2c->port].tx_func = NULL;
|
||||
//g_duet_i2c_slv_callback_handler[i2c->port].rx_func = NULL;
|
||||
// callback function pointer clear
|
||||
// g_duet_i2c_slv_callback_handler[i2c->port].tx_func = NULL;
|
||||
// g_duet_i2c_slv_callback_handler[i2c->port].rx_func = NULL;
|
||||
|
||||
return 0;
|
||||
}
|
||||
@@ -783,7 +783,7 @@ void duet_i2c_master_dma_send(uint8_t iic_idx, uint32_t *data, uint16_t len)
|
||||
Chan_Ctl_Data_TypeDef ch_ctl_data;
|
||||
Chan_Cfg_TypeDef ch_cfg;
|
||||
|
||||
ch_ctl_data.cycle_ctl = DMA_OP_MODE_BASIC;//DMA_OP_MODE_AUTO_REQ;
|
||||
ch_ctl_data.cycle_ctl = DMA_OP_MODE_BASIC; // DMA_OP_MODE_AUTO_REQ;
|
||||
ch_ctl_data.n_minus_1 = len - 1;
|
||||
ch_ctl_data.R_pow = 0;
|
||||
ch_ctl_data.src_inc = DMA_SRC_ADDR_INC_WORD;
|
||||
@@ -801,7 +801,7 @@ void duet_i2c_master_dma_send(uint8_t iic_idx, uint32_t *data, uint16_t len)
|
||||
|
||||
// NVIC_EnableIRQ(DMA_IRQn);
|
||||
// set dma_wationreq to high for I2C single req, handshake rule 16
|
||||
//DMA_WAIT_ON_REQ |= (1<<dma_chan);
|
||||
// DMA_WAIT_ON_REQ |= (1<<dma_chan);
|
||||
DMA->CFG |= 0x1; // dma enable
|
||||
DMA_INT_MASK |= (1 << dma_chan); // dma interrupt unmask, write 1
|
||||
// set channel to use primary data struct only for basic/auto-request type
|
||||
@@ -823,7 +823,7 @@ void duet_i2c_master_dma_recv(uint8_t iic_idx, uint32_t *data, uint16_t len)
|
||||
Chan_Ctl_Data_TypeDef ch1_ctl_data;
|
||||
Chan_Cfg_TypeDef ch1_cfg;
|
||||
|
||||
ch1_ctl_data.cycle_ctl = DMA_OP_MODE_BASIC;//DMA_OP_MODE_AUTO_REQ;
|
||||
ch1_ctl_data.cycle_ctl = DMA_OP_MODE_BASIC; // DMA_OP_MODE_AUTO_REQ;
|
||||
ch1_ctl_data.n_minus_1 = len - 1;
|
||||
ch1_ctl_data.R_pow = 0;
|
||||
ch1_ctl_data.src_inc = DMA_SRC_ADDR_INC_FIX;
|
||||
|
||||
@@ -98,10 +98,10 @@ void duet_i2s_master_clock_cmd(I2S_TypeDef *I2Sx, uint32_t new_state)
|
||||
{
|
||||
if ( new_state == ENABLE) {
|
||||
I2Sx->CER |= ENABLE;
|
||||
REG_WR(0X40000844, (0x1 << 13) | (0x1 << 24)); //open clock source of i2s
|
||||
REG_WR(0X40000844, (0x1 << 13) | (0x1 << 24)); // open clock source of i2s
|
||||
} else {
|
||||
I2Sx->CER &= DISABLE;
|
||||
REG_WR(0X4000084C, (0x1 << 13) | (0x1 << 24)); //close clock source of i2s
|
||||
REG_WR(0X4000084C, (0x1 << 13) | (0x1 << 24)); // close clock source of i2s
|
||||
}
|
||||
}
|
||||
|
||||
@@ -177,9 +177,9 @@ int duet_i2s_init(I2S_TypeDef *I2Sx, duet_i2s_dev_t *pI2S_struct)
|
||||
I2S_CLK_DIV->i2s_mclk_divider = mclk_divider - 1;
|
||||
I2S_CLK_DIV->i2s_sclk_divider = sclk_divider - 1;
|
||||
I2S_CLK_DIV->i2s_lrclk_divider = lrclk_divider - 1;
|
||||
I2S_CLK_DIV->i2s_slave_mode = 0; //set to I2S master
|
||||
I2S_CLK_DIV->i2s_slave_mode = 0; // set to I2S master
|
||||
} else {
|
||||
I2S_CLK_DIV->i2s_slave_mode = 1; //set to I2S slave
|
||||
I2S_CLK_DIV->i2s_slave_mode = 1; // set to I2S slave
|
||||
}
|
||||
|
||||
return 0;
|
||||
@@ -187,7 +187,7 @@ int duet_i2s_init(I2S_TypeDef *I2Sx, duet_i2s_dev_t *pI2S_struct)
|
||||
|
||||
uint32_t duet_i2s_receive_data(I2S_TypeDef *I2Sx, uint8_t lr)
|
||||
{
|
||||
if (lr == 0) { //left channel
|
||||
if (lr == 0) { // left channel
|
||||
return I2Sx->LRBR_LTHR;
|
||||
} else { // right channel
|
||||
return I2Sx->RRBR_RTHR;
|
||||
|
||||
@@ -16,7 +16,6 @@
|
||||
#include "duet_psram.h"
|
||||
#include "duet_pinmux.h"
|
||||
|
||||
|
||||
#define PSRAM_CMD_STOP 0
|
||||
#define PSRAM_CMD_CMD 1
|
||||
#define PSRAM_CMD_ADDR 2
|
||||
@@ -80,8 +79,7 @@ static void psram_init_lut_ps_write_evict(unsigned int seq_id)
|
||||
{
|
||||
REG_WR((PSRAM_LUT0 + 0x10 * seq_id),
|
||||
((PSRAM_CMD_ADDR << 26) | (0x0 << 24) | (0x18 << 16) | (PSRAM_CMD_CMD << 10) | (0x0 << 8) | FLASH_CMD_WRITE));
|
||||
REG_WR((PSRAM_LUT1 + 0x10 * seq_id),
|
||||
((PSRAM_CMD_JMP_ON_CS << 26) | (0 << 24) | (0x00 << 16) | (21 << 10) | (0 << 8) | 0x20));
|
||||
REG_WR((PSRAM_LUT1 + 0x10 * seq_id), ((PSRAM_CMD_JMP_ON_CS << 26) | (0 << 24) | (0x00 << 16) | (21 << 10) | (0 << 8) | 0x20));
|
||||
REG_WR((PSRAM_LUT2 + 0x10 * seq_id), 0);
|
||||
REG_WR((PSRAM_LUT3 + 0x10 * seq_id), 0);
|
||||
}
|
||||
@@ -146,8 +144,7 @@ static void psram_init_lut_ps_write_evict_4x(unsigned int seq_id)
|
||||
{
|
||||
REG_WR((PSRAM_LUT0 + 0x10 * seq_id),
|
||||
((PSRAM_CMD_ADDR << 26) | (0x2 << 24) | (0x18 << 16) | (PSRAM_CMD_CMD << 10) | (0x2 << 8) | FLASH_CMD_WRITE));
|
||||
REG_WR((PSRAM_LUT1 + 0x10 * seq_id),
|
||||
((PSRAM_CMD_JMP_ON_CS << 26) | (0x2 << 24) | (0x00 << 16) | (21 << 10) | (0x2 << 8) | 0x20));
|
||||
REG_WR((PSRAM_LUT1 + 0x10 * seq_id), ((PSRAM_CMD_JMP_ON_CS << 26) | (0x2 << 24) | (0x00 << 16) | (21 << 10) | (0x2 << 8) | 0x20));
|
||||
REG_WR((PSRAM_LUT2 + 0x10 * seq_id), 0);
|
||||
REG_WR((PSRAM_LUT3 + 0x10 * seq_id), 0);
|
||||
}
|
||||
@@ -166,62 +163,63 @@ int psram_set_channel(duet_psram_channel channel)
|
||||
if (channel != PSRAM_CHANNEL_4_9 && channel != PSRAM_CHANNEL_16_21) {
|
||||
return -1;
|
||||
}
|
||||
REG_WR(ADC_SDIO_BLE_DEBUG_CTRL_REG, REG_RD(ADC_SDIO_BLE_DEBUG_CTRL_REG) & (~(1 << 3))); //disable sdio debug
|
||||
REG_WR(ADC_SDIO_BLE_DEBUG_CTRL_REG, REG_RD(ADC_SDIO_BLE_DEBUG_CTRL_REG) & (~(1 << 3))); // disable sdio debug
|
||||
if (channel == PSRAM_CHANNEL_4_9) {
|
||||
duet_pinmux_config(PAD4, PF_PSRAM); //set pad4 mux to psram
|
||||
duet_pinmux_config(PAD5, PF_PSRAM); //set pad5 mux to psram
|
||||
duet_pinmux_config(PAD6, PF_PSRAM); //set pad6 mux to psram
|
||||
duet_pinmux_config(PAD7, PF_PSRAM); //set pad7 mux to psram
|
||||
duet_pinmux_config(PAD8, PF_PSRAM); //set pad8 mux to psram
|
||||
duet_pinmux_config(PAD9, PF_PSRAM); //set pad9 mux to psram
|
||||
REG_WR(HW_CTRL_PE_PS, REG_RD(HW_CTRL_PE_PS) & 0xfffffc0f); //set all pad pull up and down
|
||||
} else {
|
||||
duet_pinmux_config(PAD16, PF_PSRAM); //set pad16 mux to psram
|
||||
duet_pinmux_config(PAD17, PF_PSRAM); //set pad17 mux to psram
|
||||
duet_pinmux_config(PAD18, PF_PSRAM); //set pad18 mux to psram
|
||||
duet_pinmux_config(PAD19, PF_PSRAM); //set pad19 mux to psram
|
||||
duet_pinmux_config(PAD20, PF_PSRAM); //set pad20 mux to psram
|
||||
duet_pinmux_config(PAD21, PF_PSRAM); //set pad21 mux to psram
|
||||
REG_WR(HW_CTRL_PE_PS, REG_RD(HW_CTRL_PE_PS) & 0xffc0ffff); //set all pad pull up and down
|
||||
}
|
||||
duet_pinmux_config(PAD4, PF_PSRAM); // set pad4 mux to psram
|
||||
duet_pinmux_config(PAD5, PF_PSRAM); // set pad5 mux to psram
|
||||
duet_pinmux_config(PAD6, PF_PSRAM); // set pad6 mux to psram
|
||||
duet_pinmux_config(PAD7, PF_PSRAM); // set pad7 mux to psram
|
||||
duet_pinmux_config(PAD8, PF_PSRAM); // set pad8 mux to psram
|
||||
duet_pinmux_config(PAD9, PF_PSRAM); // set pad9 mux to psram
|
||||
REG_WR(HW_CTRL_PE_PS,REG_RD(HW_CTRL_PE_PS)& 0xfffffc0f); // set all pad pull up and down
|
||||
} else { // set
|
||||
duet_pinmux_config(PAD16, PF_PSRAM); // sett pad16 mux to psram
|
||||
duet_pinmux_config(PAD17, PF_PSRAM); // set pad17 mux to psr// set
|
||||
duet_pinmux_config(PAD18, PF_PSRAM); // set pad18 mux to psram
|
||||
duet_pinmux_config(PAD19, PF_PSRAM); // set pad19 mux to psram
|
||||
duet_pinmux_config(PAD20, PF_PSRAM); // set pad20 mux to psram
|
||||
duet_pinmux_config(PAD21, PF_PSRAM); // set pad21 mux to psram
|
||||
REG_WR(HW_CTRL_PE_PS,REG_RD(HW_CTRL_PE_PS)& 0xffc0ffff); // set all pad pull up and down
|
||||
}// set
|
||||
REG_WR(PERI_CLK_EN_REG0, (REG_RD(PERI_CLK_EN_REG0) | (0x0000203F))); //open clock of dma and psram
|
||||
return 0;
|
||||
|
||||
return 0; // set
|
||||
}
|
||||
int psram_config(duet_psram_mode mode)
|
||||
{
|
||||
if (mode != PSRAM_MODE_SPI && mode != PSRAM_MODE_QSPI) {
|
||||
return -1;
|
||||
}
|
||||
REG_WR(PSRAM_MCR, REG_RD(PSRAM_MCR) & (~(1 << 14))); //MCR,MDIS = 0
|
||||
REG_WR(PSRAM_MCR, REG_RD(PSRAM_MCR) & (~(1 << 14))); // MCR,MDIS = 0
|
||||
|
||||
REG_WR(PSRAM_MCR, REG_RD(PSRAM_MCR) | ((3))); //MCR , AHB and SF domain reset
|
||||
REG_WR(PSRAM_MCR, REG_RD(PSRAM_MCR) | ((3))); // MCR , AHB and SF domain reset
|
||||
|
||||
REG_WR(PSRAM_MCR, REG_RD(PSRAM_MCR) & 0xfffffffc); //clear AHB and SF reset
|
||||
REG_WR(PSRAM_MCR, REG_RD(PSRAM_MCR) & 0xfffffffc); // clear AHB and SF reset
|
||||
|
||||
REG_WR(PSRAM_MCR, REG_RD(PSRAM_MCR) | 1 << 14); //MCR , MDIS=1
|
||||
REG_WR(PSRAM_MCR, REG_RD(PSRAM_MCR) | 1 << 14); // MCR , MDIS=1
|
||||
|
||||
if (mode == PSRAM_MODE_SPI) { //the simple logic has been modified. set bit7 means to use the original logic
|
||||
if (mode == PSRAM_MODE_SPI) { // the simple logic has been modified. set bit7 means to use the original logic
|
||||
REG_WR(PSRAM_SMPR, 0x00000080); // sampled by sfif_clk_b; half cycle delay
|
||||
} else {
|
||||
REG_WR(PSRAM_SMPR, 0x00000000); // sampled by sfif_clk_b; half cycle delay
|
||||
}
|
||||
|
||||
REG_WR(PSRAM_FLSHCR, 0x00000000); //set setup and hold time for psram
|
||||
REG_WR(PSRAM_FLSHCR, 0x00000000); // set setup and hold time for psram
|
||||
|
||||
//Give the default source address:
|
||||
REG_WR(PSRAM_SFAR, PSRAM_FLASH_A1_BASE); //set IDATSIZ
|
||||
// Give the default source address:
|
||||
REG_WR(PSRAM_SFAR, PSRAM_FLASH_A1_BASE); // set IDATSIZ
|
||||
|
||||
// lijin: 2018_01_11-11:07 total buffer size is 64*64b = 512B = 0x200B
|
||||
// config the ahb buffer
|
||||
// config the ahb buffer// set
|
||||
REG_WR(PSRAM_BUF0IND, 0x00000080);
|
||||
REG_WR(PSRAM_BUF1IND, 0x00000100);
|
||||
REG_WR(PSRAM_BUF2IND, 0x00000180);
|
||||
|
||||
// lijin: 2018_01_11-11:07 each buffer is 8B * 16 = 128B = 0x80B
|
||||
|
||||
//kzheng: TO DO, now hmaster[3:0] tie0, so need modified here
|
||||
//mst id =0 is CPU
|
||||
//PSRAM0_BUF0CR = 0x00001001; // CPU A9
|
||||
// kzheng: TO DO, now hmaster[3:0] tie0, so need modified here
|
||||
// mst id =0 is CPU
|
||||
// PSRAM0_BUF0CR = 0x00001001; // CPU A9
|
||||
REG_WR(PSRAM_BUF0CR, 0x00001000); // CPU A9
|
||||
REG_WR(PSRAM_BUF1CR, 0x00001006); // CPU M4
|
||||
REG_WR(PSRAM_BUF2CR, 0x00001003); // SDMA
|
||||
@@ -237,23 +235,23 @@ int psram_config(duet_psram_mode mode)
|
||||
// DELAY_CLK4X_EN = 1
|
||||
REG_WR(PSRAM_MCR, REG_RD(PSRAM_MCR) | 0x000F000C);
|
||||
|
||||
//ddr_en data aligned with 2x serial flash half clock
|
||||
//REG_WR(PSRAM_FLSHCR, REG_RD(PSRAM_FLSHCR)| 0x00010000);
|
||||
// ddr_en data aligned with 2x serial flash half clock
|
||||
// REG_WR(PSRAM_FLSHCR, REG_RD(PSRAM_FLSHCR)| 0x00010000);
|
||||
|
||||
//MCR SCLKCFG 0, dqs en =1
|
||||
// MCR SCLKCFG 0, dqs en =1
|
||||
REG_WR(PSRAM_MCR, REG_RD(PSRAM_MCR) & 0xfbffffff );
|
||||
|
||||
//dqs_loopback_en = 1, dqs_loopback_from_pad = 1
|
||||
REG_WR(PSRAM_MCR, REG_RD(PSRAM_MCR) | 3 << 24 );
|
||||
// dqs_loopback_en = 1, dqs_loopback_from_pad = 1
|
||||
REG_WR(PSRAM_MCR, REG_RD(PSRAM_MCR) | (3 << 24));
|
||||
|
||||
//ddr_en = 1, enable 2x and 4x clock
|
||||
///REG_WR(PSRAM_MCR, REG_RD(PSRAM_MCR)| 1<<7 );
|
||||
// ddr_en = 1, enable 2x and 4x clock
|
||||
/// REG_WR(PSRAM_MCR, REG_RD(PSRAM_MCR)| 1<<7 );
|
||||
|
||||
//MDIS = 0, enable psram clocks,must clear MDIS to enable clock for transfer.
|
||||
REG_WR(PSRAM_MCR, REG_RD(PSRAM_MCR) & 0xffffbfff );
|
||||
// MDIS = 0, enable psram clocks,must clear MDIS to enable clock for transfer.
|
||||
REG_WR(PSRAM_MCR, REG_RD(PSRAM_MCR) & 0xffffbfff);
|
||||
|
||||
//printf("PSRAM initialize done. \n");
|
||||
//printf("begin initialize LUT tables. \n");
|
||||
// printf("PSRAM initialize done. \n");
|
||||
// printf("begin initialize LUT tables. \n");
|
||||
|
||||
if (mode == PSRAM_MODE_SPI) {
|
||||
psram_init_lut_ps_read(0);
|
||||
@@ -272,7 +270,7 @@ int psram_config(duet_psram_mode mode)
|
||||
psram_init_lut_ps_qmode_enable(PSRAM_SEQ_ID_QUAD_ENABLE);
|
||||
psram_init_lut_ps_qmode_exit(PSRAM_SEQ_ID_QUAD_EXIT);
|
||||
|
||||
//printf(" initialize LUT tables done. \n");
|
||||
// printf(" initialize LUT tables done. \n");
|
||||
|
||||
// set read miss cmd, evict is in next lut
|
||||
REG_WR(PSRAM_BFGENCR, PSRAM_SEQ_ID_READ << 12);
|
||||
|
||||
@@ -26,41 +26,41 @@ void PWM_IRQHandler(void)
|
||||
// duet_intrpt_exit();
|
||||
}
|
||||
|
||||
//pwm pinmux init
|
||||
// pwm pinmux init
|
||||
void duet_pwm_pinmux_init(duet_pwm_dev_t *pwm)
|
||||
{
|
||||
switch (pwm->port) {
|
||||
case PWM_OUTPUT_CH0:
|
||||
//pin mux control
|
||||
//PWM0_PAD PAD14 1
|
||||
// pin mux control
|
||||
// PWM0_PAD PAD14 1
|
||||
duet_pinmux_config(PAD14, PF_PWM0);
|
||||
break;
|
||||
case PWM_OUTPUT_CH1:
|
||||
//PWM1_PAD PAD10 1
|
||||
// PWM1_PAD PAD10 1
|
||||
duet_pinmux_config(PAD10, PF_PWM1);
|
||||
break;
|
||||
case PWM_OUTPUT_CH2:
|
||||
//PWM2_PAD PAD15 1
|
||||
// PWM2_PAD PAD15 1
|
||||
duet_pinmux_config(PAD15, PF_PWM2);
|
||||
break;
|
||||
case PWM_OUTPUT_CH3:
|
||||
//PWM3_PAD PAD11 1
|
||||
// PWM3_PAD PAD11 1
|
||||
duet_pinmux_config(PAD11, PF_PWM3);
|
||||
break;
|
||||
case PWM_OUTPUT_CH4:
|
||||
//PWM4_PAD PAD6 4
|
||||
// PWM4_PAD PAD6 4
|
||||
duet_pinmux_config(PAD6, PF_PWM4);
|
||||
break;
|
||||
case PWM_OUTPUT_CH5:
|
||||
//PWM5_PAD PAD0 4
|
||||
// PWM5_PAD PAD0 4
|
||||
duet_pinmux_config(PAD0, PF_PWM5);
|
||||
break;
|
||||
case PWM_OUTPUT_CH6:
|
||||
//PWM6_PAD PAD7 4
|
||||
// PWM6_PAD PAD7 4
|
||||
duet_pinmux_config(PAD7, PF_PWM6);
|
||||
break;
|
||||
case PWM_OUTPUT_CH7:
|
||||
//PWM7_PAD PAD1 4
|
||||
// PWM7_PAD PAD1 4
|
||||
duet_pinmux_config(PAD1, PF_PWM7);
|
||||
break;
|
||||
default:
|
||||
@@ -68,7 +68,7 @@ void duet_pwm_pinmux_init(duet_pwm_dev_t *pwm)
|
||||
}
|
||||
}
|
||||
|
||||
//pwm freq and duty cycle config
|
||||
// pwm freq and duty cycle config
|
||||
void duet_pwm_cfg(duet_pwm_dev_t *pwm)
|
||||
{
|
||||
uint32_t tmp_value;
|
||||
@@ -183,17 +183,17 @@ int32_t duet_pwm_init(duet_pwm_dev_t *pwm)
|
||||
if (pwm->port >= DUET_PWM_CH_NUM) {
|
||||
return EIO;
|
||||
}
|
||||
//pinmux
|
||||
// pinmux
|
||||
duet_pwm_pinmux_init(pwm);
|
||||
|
||||
//pwm clock enable
|
||||
// pwm clock enable
|
||||
reg_value = REG_RD(PERI_CLK_EN_REG1) & (~PWM_BUS_CLK_BIT);
|
||||
REG_WR(PERI_CLK_EN_REG1, (reg_value | (PWM_BUS_CLK_BIT)));
|
||||
|
||||
PWM->PWMCFG &= ~(1 << pwm->port);
|
||||
//PWM->PWMCFG |= (CNT_CLK_DIV_EN | CLK_DIV_CFG);
|
||||
// PWM->PWMCFG |= (CNT_CLK_DIV_EN | CLK_DIV_CFG);
|
||||
duet_pwm_cfg(pwm);
|
||||
PWM->PWMINVERTTRIG = 0; //invert control
|
||||
PWM->PWMINVERTTRIG = 0; // invert control
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -251,10 +251,10 @@ int32_t duet_pwm_para_chg(duet_pwm_dev_t *pwm, duet_pwm_config_t para)
|
||||
if (pwm->port >= DUET_PWM_CH_NUM) {
|
||||
return EIO;
|
||||
}
|
||||
//duet_pwm_stop(pwm);
|
||||
// duet_pwm_stop(pwm);
|
||||
pwm->config = para;
|
||||
duet_pwm_cfg(pwm);
|
||||
//duet_pwm_start(pwm);
|
||||
// duet_pwm_start(pwm);
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -267,17 +267,17 @@ int32_t duet_pwm_para_chg(duet_pwm_dev_t *pwm, duet_pwm_config_t para)
|
||||
*/
|
||||
int32_t duet_pwm_finalize(duet_pwm_dev_t *pwm)
|
||||
{
|
||||
//pwm clock disable
|
||||
//uint32_t reg_value;
|
||||
// pwm clock disable
|
||||
// uint32_t reg_value;
|
||||
if (NULL == pwm) {
|
||||
return EIO;
|
||||
}
|
||||
if (pwm->port >= DUET_PWM_CH_NUM) {
|
||||
return EIO;
|
||||
}
|
||||
//one clk enable for 8 pwm channel
|
||||
//reg_value = REG_RD(PERI_CLK_CFG);
|
||||
//REG_WR(PERI_CLK_CFG, (reg_value&(~PWM_CLK_EN)));
|
||||
// one clk enable for 8 pwm channel
|
||||
// reg_value = REG_RD(PERI_CLK_CFG);
|
||||
// REG_WR(PERI_CLK_CFG, (reg_value&(~PWM_CLK_EN)));
|
||||
return duet_pwm_stop(pwm);
|
||||
}
|
||||
|
||||
|
||||
@@ -21,14 +21,14 @@
|
||||
void spi_sw_protect_write(uint16_t addr, uint16_t data)
|
||||
{
|
||||
*((volatile int *) (SPI_COMMAND + TRANS_MODE_OFT)) = 0;
|
||||
*((volatile int *) (SPI_COMMAND + PRESCALER_OFT)) = 3;//8:80M/16=5M, 2:80M/4=20M
|
||||
*((volatile int *) (SPI_COMMAND + PRESCALER_OFT)) = 3; // 8:80M/16=5M, 2:80M/4=20M
|
||||
*((volatile int *) (SPI_COMMAND + ADDR_REG_OFT)) = addr;
|
||||
*((volatile int *) (SPI_COMMAND + READNOTWRITE_OFT)) = 0;
|
||||
*((volatile int *) (SPI_COMMAND + WDATA_REG_OFT)) = data;
|
||||
*((volatile int *) (SPI_COMMAND + START_FLAG_OFT)) = 1;
|
||||
|
||||
while (1) {
|
||||
//printf("\n rdate:%08x\n",((uint32_t)*((volatile uint32_t *)(SPI_RDATA + RDATA_REG_OFT)) &0x00010000));
|
||||
// printf("\n rdate:%08x\n",((uint32_t)*((volatile uint32_t *)(SPI_RDATA + RDATA_REG_OFT)) &0x00010000));
|
||||
if (((uint32_t) * ((volatile uint32_t *)(SPI_RDATA + RDATA_REG_OFT)) & 0x00010000) == 0) {
|
||||
break;
|
||||
} else {
|
||||
@@ -53,7 +53,7 @@ uint16_t spi_sw_protect_read(uint16_t addr)
|
||||
*((volatile int *)(SPI_COMMAND + START_FLAG_OFT)) = 1;
|
||||
|
||||
while (1) {
|
||||
//printf("\n rdate:%08x\n",((uint32_t)*((volatile uint32_t *)(SPI_RDATA + RDATA_REG_OFT)) &0x00010000));
|
||||
// printf("\n rdate:%08x\n",((uint32_t)*((volatile uint32_t *)(SPI_RDATA + RDATA_REG_OFT)) &0x00010000));
|
||||
if (((uint32_t) * ((volatile uint32_t *)(SPI_RDATA + RDATA_REG_OFT)) & 0x00010000) == 0) {
|
||||
break;
|
||||
} else {
|
||||
@@ -76,13 +76,13 @@ void rf_sw_set_reg_bit(uint16_t reg, uint8_t start_bit, uint8_t len, uint16_t sr
|
||||
if ((reg < 0xFF) && (start_bit < 16) && (len <= 16) && (src_val < (1 << len))) {
|
||||
tmp = spi_sw_protect_read(reg);
|
||||
|
||||
mask = (1 << len) - 1; //1. clear dst bit. eg: len=4, mask = 0xf, 1111
|
||||
mask = ~(mask << start_bit); //~(mask<<4):0xff0f: 1111 1111 0000 1111
|
||||
mask = (1 << len) - 1; // 1. clear dst bit. eg: len=4, mask = 0xf, 1111
|
||||
mask = ~(mask << start_bit); // ~(mask<<4):0xff0f: 1111 1111 0000 1111
|
||||
|
||||
val = tmp & mask; //2.val =spi_read() & 0xff0f, clear [7:4]
|
||||
val = tmp & mask; // 2.val =spi_read() & 0xff0f, clear [7:4]
|
||||
|
||||
src_val = (src_val << start_bit);
|
||||
val = val | src_val; //3. val spi_read & 0xff0f | val << 4
|
||||
val = val | src_val; // 3. val spi_read & 0xff0f | val << 4
|
||||
|
||||
spi_sw_protect_write(reg, val);
|
||||
} else {
|
||||
@@ -98,7 +98,7 @@ uint16_t rf_sw_get_reg_bit(uint16_t reg, uint8_t start_bit, uint8_t len)
|
||||
if ((reg < 0xFF) && (start_bit < 16) && (len <= 16)) {
|
||||
val = spi_sw_protect_read(reg); // 1. read reg val
|
||||
|
||||
mask = (1 << len) - 1; //eg: len =4, 0xf,1111
|
||||
mask = (1 << len) - 1; // eg: len =4, 0xf,1111
|
||||
mask = mask << start_bit; // 0x0f00;
|
||||
val = val & mask; // 2. get dst bit
|
||||
|
||||
@@ -118,7 +118,7 @@ FLASH_COMMON2_SEG void spi_mst_write(uint16_t addr, uint16_t data)
|
||||
uint32_t var = 0;
|
||||
|
||||
*((volatile int *) (SPI_COMMAND + TRANS_MODE_OFT)) = 0;
|
||||
*((volatile int *) (SPI_COMMAND + PRESCALER_OFT)) = 8;//8:80M/16=5M, 2:80M/4=20M
|
||||
*((volatile int *) (SPI_COMMAND + PRESCALER_OFT)) = 8; // 8:80M/16=5M, 2:80M/4=20M
|
||||
*((volatile int *) (SPI_COMMAND + ADDR_REG_OFT)) = addr;
|
||||
*((volatile int *) (SPI_COMMAND + READNOTWRITE_OFT)) = 0;
|
||||
*((volatile int *) (SPI_COMMAND + WDATA_REG_OFT)) = data;
|
||||
@@ -130,7 +130,7 @@ FLASH_COMMON2_SEG void spi_mst_write(uint16_t addr, uint16_t data)
|
||||
} while (var);
|
||||
} else if (hw_spi_pta == 1) {
|
||||
while (1) {
|
||||
//printf("\n rdate:%08x\n",((uint32_t)*((volatile uint32_t *)(SPI_RDATA + RDATA_REG_OFT)) &0x00010000));
|
||||
// printf("\n rdate:%08x\n",((uint32_t)*((volatile uint32_t *)(SPI_RDATA + RDATA_REG_OFT)) &0x00010000));
|
||||
if (((uint32_t) * ((volatile uint32_t *)(SPI_RDATA + RDATA_REG_OFT)) & 0x00010000) == 0) {
|
||||
break;
|
||||
} else {
|
||||
@@ -190,13 +190,13 @@ FLASH_COMMON2_SEG void rf_set_reg_bit(uint16_t reg, uint8_t start_bit, uint8_t l
|
||||
if ((reg < 0xFF) && (start_bit < 16) && (len <= 16) && (src_val < (1 << len))) {
|
||||
tmp = spi_mst_read(reg);
|
||||
|
||||
mask = (1 << len) - 1; //1. clear dst bit. eg: len=4, mask = 0xf, 1111
|
||||
mask = ~(mask << start_bit); //~(mask<<4):0xff0f: 1111 1111 0000 1111
|
||||
mask = (1 << len) - 1; // 1. clear dst bit. eg: len=4, mask = 0xf, 1111
|
||||
mask = ~(mask << start_bit); // ~(mask<<4):0xff0f: 1111 1111 0000 1111
|
||||
|
||||
val = tmp & mask; //2.val =spi_read() & 0xff0f, clear [7:4]
|
||||
val = tmp & mask; // 2.val =spi_read() & 0xff0f, clear [7:4]
|
||||
|
||||
src_val = (src_val << start_bit);
|
||||
val = val | src_val; //3. val spi_read & 0xff0f | val << 4
|
||||
val = val | src_val; // 3. val spi_read & 0xff0f | val << 4
|
||||
|
||||
spi_mst_write(reg, val);
|
||||
} else {
|
||||
@@ -212,7 +212,7 @@ uint16_t rf_get_reg_bit(uint16_t reg, uint8_t start_bit, uint8_t len)
|
||||
if ((reg < 0xFF) && (start_bit < 16) && (len <= 16)) {
|
||||
val = spi_mst_read(reg); // 1. read reg val
|
||||
|
||||
mask = (1 << len) - 1; //eg: len =4, 0xf,1111
|
||||
mask = (1 << len) - 1; // eg: len =4, 0xf,1111
|
||||
mask = mask << start_bit; // 0x0f00;
|
||||
val = val & mask; // 2. get dst bit
|
||||
|
||||
|
||||
@@ -115,7 +115,7 @@ int32_t duet_spi_init(duet_spi_dev_t *spi)
|
||||
} else {
|
||||
return EIO;
|
||||
}
|
||||
//enable spi clk
|
||||
// enable spi clk
|
||||
if (SPIx == SPI0) {
|
||||
tmp_value = REG_RD(PERI_CLK_EN_REG1) & (~(SPI0_BUS_CLK_EN | SPI0_PERI_CLK_EN));
|
||||
REG_WR(PERI_CLK_EN_REG1, (tmp_value | (SPI0_BUS_CLK_EN | SPI0_PERI_CLK_EN)));
|
||||
@@ -126,7 +126,7 @@ int32_t duet_spi_init(duet_spi_dev_t *spi)
|
||||
tmp_value = REG_RD(PERI_CLK_EN_REG1) & (~(SPI2_BUS_CLK_EN | SPI2_PERI_CLK_EN));
|
||||
REG_WR(PERI_CLK_EN_REG1, (tmp_value | (SPI2_BUS_CLK_EN | SPI2_PERI_CLK_EN)));
|
||||
}
|
||||
//fpga no effect, soc need
|
||||
// fpga no effect, soc need
|
||||
duet_spi_cmd(SPIx, DISABLE);
|
||||
duet_spi_interrupt_config(SPIx, SPI_INTERRUPT_ALL, DISABLE);
|
||||
duet_spi_interrupt_clear(SPIx, SPI_INTERRUPT_ALL);
|
||||
@@ -195,9 +195,9 @@ int32_t duet_spi_init(duet_spi_dev_t *spi)
|
||||
// SPIx->DMA_CR &= ~SPI_DMA_RX_EN;
|
||||
// }
|
||||
if (spi->priv) {
|
||||
//enable rx interrupt
|
||||
// enable rx interrupt
|
||||
SPIx->IMSC |= (SPI_INTERRUPT_RX_TIMEOUT | SPI_INTERRUPT_RX_FIFO_TRIGGER);
|
||||
//enable cm4 interrupt
|
||||
// enable cm4 interrupt
|
||||
if (SPIx == SPI0) {
|
||||
tmp_value = REG_RD(DUTE_IRQ_EN_REG) & (~SPI0_IRQ_BIT);
|
||||
REG_WR(DUTE_IRQ_EN_REG, (tmp_value | (SPI0_IRQ_BIT)));
|
||||
@@ -244,13 +244,13 @@ int32_t duet_spi_finalize(duet_spi_dev_t *spi)
|
||||
return EIO;
|
||||
}
|
||||
|
||||
//disable all spi interrupt
|
||||
// disable all spi interrupt
|
||||
SPIx->IMSC = SPI_DISABLE_INTERRUPT_ALL;
|
||||
//disable all spi config
|
||||
// disable all spi config
|
||||
SPIx->CR0 = 0;
|
||||
SPIx->CR1 = 0;
|
||||
|
||||
//disable cm4 interrupt
|
||||
// disable cm4 interrupt
|
||||
if (SPI0 == SPIx) {
|
||||
tmp_value = REG_RD(DUTE_IRQ_DIS_REG) & (~SPI0_IRQ_BIT);
|
||||
REG_WR(DUTE_IRQ_DIS_REG, (tmp_value | (SPI0_IRQ_BIT)));
|
||||
@@ -265,7 +265,7 @@ int32_t duet_spi_finalize(duet_spi_dev_t *spi)
|
||||
NVIC_DisableIRQ(SPI2_IRQn);
|
||||
}
|
||||
|
||||
//spi sclk disable, fpga no effect, soc need
|
||||
// spi sclk disable, fpga no effect, soc need
|
||||
if (SPI0 == SPIx) {
|
||||
tmp_value = REG_RD(PERI_CLK_DIS_REG1) & (~(SPI0_BUS_CLK_EN | SPI0_PERI_CLK_EN));
|
||||
REG_WR(PERI_CLK_DIS_REG1, (tmp_value | (SPI0_BUS_CLK_EN | SPI0_PERI_CLK_EN)));
|
||||
@@ -294,21 +294,21 @@ int32_t duet_spi_send(duet_spi_dev_t *spi, const uint8_t *data, uint16_t size, u
|
||||
return EIO;
|
||||
}
|
||||
while (size--) {
|
||||
while ( !(duet_spi_get_flag_status(SPIx, SPI_FLAG_TX_FIFO_NOT_FULL)) ); //wait till tx fifo is not full
|
||||
while ( !(duet_spi_get_flag_status(SPIx, SPI_FLAG_TX_FIFO_NOT_FULL)) ); // wait till tx fifo is not full
|
||||
SPIx->DR = *data++;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
//void duet_spi_receive(SPI_TypeDef * SPIx, void * rx_data, uint16_t len)
|
||||
//{
|
||||
// void duet_spi_receive(SPI_TypeDef * SPIx, void * rx_data, uint16_t len)
|
||||
// {
|
||||
// while(len--)
|
||||
// {
|
||||
// while( !(spi_get_flag_status(SPIx, SPI_FLAG_RX_FIFO_NOT_EMPTY)) ); //wait till rx fifo is not empty, change to timeout mechanism???
|
||||
// while( !(spi_get_flag_status(SPIx, SPI_FLAG_RX_FIFO_NOT_EMPTY)) ); // wait till rx fifo is not empty, change to timeout mechanism???
|
||||
|
||||
// *rx_data++ = SPIx->DR ;
|
||||
// }
|
||||
//}
|
||||
// }
|
||||
|
||||
SPI_TypeDef *getSpixViaIdx(uint8_t spi_idx)
|
||||
{
|
||||
|
||||
@@ -25,13 +25,13 @@ void TIMER_IRQHandler(void)
|
||||
{
|
||||
// duet_intrpt_enter();
|
||||
if (TIMER1->MIS) {
|
||||
TIMER1->INTCLR = 1; //clear irq
|
||||
TIMER1->INTCLR = 1; // clear irq
|
||||
if (g_duet_timer_handler[DUET_TIMER1_INDEX].cb) {
|
||||
g_duet_timer_handler[DUET_TIMER1_INDEX].cb(g_duet_timer_handler[DUET_TIMER1_INDEX].arg);
|
||||
}
|
||||
}
|
||||
if (TIMER2->MIS) {
|
||||
TIMER2->INTCLR = 1; //clear irq
|
||||
TIMER2->INTCLR = 1; // clear irq
|
||||
if (g_duet_timer_handler[DUET_TIMER2_INDEX].cb) {
|
||||
g_duet_timer_handler[DUET_TIMER2_INDEX].cb(g_duet_timer_handler[DUET_TIMER2_INDEX].arg);
|
||||
}
|
||||
@@ -74,13 +74,13 @@ int32_t duet_timer_init(duet_timer_dev_t *tim)
|
||||
g_duet_timer_handler[tim->port].cb = tim->config.cb;
|
||||
g_duet_timer_handler[tim->port].arg = tim->config.arg;
|
||||
if (DUET_TIMER1_INDEX == tim->port) {
|
||||
TIMER1->CONTROL = TIMER_DISABLE; //disable timer first
|
||||
TIMER1->LOAD = tim->config.period * (system_clock / 1000000); //1000000 for us
|
||||
TIMER1->CONTROL |= (TIMER_PRESCALE | TIMER_SIZE | timer_mode); //timer control
|
||||
} else { //if(DUET_TIMER2_INDEX == tim->port)
|
||||
TIMER2->CONTROL = TIMER_DISABLE; //disable timer first
|
||||
TIMER2->LOAD = tim->config.period * (system_clock / 1000000); //1000000 for us
|
||||
TIMER2->CONTROL |= (TIMER_PRESCALE | TIMER_SIZE | timer_mode); //timer control
|
||||
TIMER1->CONTROL = TIMER_DISABLE; // disable timer first
|
||||
TIMER1->LOAD = tim->config.period * (system_clock / 1000000); // 1000000 for us
|
||||
TIMER1->CONTROL |= (TIMER_PRESCALE | TIMER_SIZE | timer_mode); // timer control
|
||||
} else { // if(DUET_TIMER2_INDEX == tim->port)
|
||||
TIMER2->CONTROL = TIMER_DISABLE; // disable timer first
|
||||
TIMER2->LOAD = tim->config.period * (system_clock / 1000000); // 1000000 for us
|
||||
TIMER2->CONTROL |= (TIMER_PRESCALE | TIMER_SIZE | timer_mode); // timer control
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
@@ -97,13 +97,13 @@ int32_t duet_timer_start(duet_timer_dev_t *tim)
|
||||
return EIO;
|
||||
}
|
||||
if (DUET_TIMER1_INDEX == tim->port) {
|
||||
TIMER1->CONTROL |= (TIMER_ENABLE | INTERRUPT_EN); //timer control
|
||||
TIMER1->CONTROL |= (TIMER_ENABLE | INTERRUPT_EN); // timer control
|
||||
} else if (DUET_TIMER2_INDEX == tim->port) {
|
||||
TIMER2->CONTROL |= (TIMER_ENABLE | INTERRUPT_EN); //timer control
|
||||
TIMER2->CONTROL |= (TIMER_ENABLE | INTERRUPT_EN); // timer control
|
||||
} else {
|
||||
return EIO;
|
||||
}
|
||||
//open TIMER interrupt
|
||||
// open TIMER interrupt
|
||||
reg_value = REG_RD(DUTE_IRQ_EN_REG) & (~TIMER_IRQ_BIT);
|
||||
REG_WR(DUTE_IRQ_EN_REG, (reg_value | (TIMER_IRQ_BIT)));
|
||||
NVIC_EnableIRQ(TIMER_IRQn); // 0x20
|
||||
@@ -124,11 +124,11 @@ int32_t duet_timer_get(duet_timer_dev_t *tim)
|
||||
return -1;
|
||||
}
|
||||
if (DUET_TIMER1_INDEX == tim->port) {
|
||||
reg_value = TIMER1->VALUE; //timer current value
|
||||
return (reg_value / (system_clock / 1000000)); //time for us
|
||||
reg_value = TIMER1->VALUE; // timer current value
|
||||
return (reg_value / (system_clock / 1000000)); // time for us
|
||||
} else if (DUET_TIMER2_INDEX == tim->port) {
|
||||
reg_value = TIMER2->VALUE; //timer current value
|
||||
return (reg_value / (system_clock / 1000000)); //time for us
|
||||
reg_value = TIMER2->VALUE; // timer current value
|
||||
return (reg_value / (system_clock / 1000000)); // time for us
|
||||
} else {
|
||||
return -1;
|
||||
}
|
||||
@@ -151,9 +151,9 @@ int32_t duet_timer_reload(duet_timer_dev_t *tim)
|
||||
return -1;
|
||||
}
|
||||
if (DUET_TIMER1_INDEX == tim->port) {
|
||||
TIMER1->LOAD = tim->config.period * (system_clock / 1000000); //1000000 for us
|
||||
} else { //if(DUET_TIMER2_INDEX == tim->port)
|
||||
TIMER2->LOAD = tim->config.period * (system_clock / 1000000); //1000000 for us
|
||||
TIMER1->LOAD = tim->config.period * (system_clock / 1000000); // 1000000 for us
|
||||
} else { // if(DUET_TIMER2_INDEX == tim->port)
|
||||
TIMER2->LOAD = tim->config.period * (system_clock / 1000000); // 1000000 for us
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
@@ -172,15 +172,15 @@ void duet_timer_stop(duet_timer_dev_t *tim)
|
||||
}
|
||||
|
||||
if (DUET_TIMER1_INDEX == tim->port) {
|
||||
TIMER1->CONTROL = TIMER_DISABLE; //timer control
|
||||
TIMER1->CONTROL = TIMER_DISABLE; // timer control
|
||||
} else if (DUET_TIMER2_INDEX == tim->port) {
|
||||
TIMER2->CONTROL = TIMER_DISABLE; //timer control
|
||||
TIMER2->CONTROL = TIMER_DISABLE; // timer control
|
||||
} else {
|
||||
return;
|
||||
}
|
||||
|
||||
//two timers use same IRQ
|
||||
//NVIC_DisableIRQ(TIMER_IRQn);
|
||||
// two timers use same IRQ
|
||||
// NVIC_DisableIRQ(TIMER_IRQn);
|
||||
g_duet_timer_handler[tim->port].cb = NULL;
|
||||
g_duet_timer_handler[tim->port].arg = NULL;
|
||||
}
|
||||
@@ -194,11 +194,11 @@ void duet_timer_stop(duet_timer_dev_t *tim)
|
||||
*/
|
||||
int32_t duet_timer_finalize(duet_timer_dev_t *tim)
|
||||
{
|
||||
//uint32_t reg_value;
|
||||
// uint32_t reg_value;
|
||||
duet_timer_stop(tim);
|
||||
// Set Timer Clock Disable
|
||||
//one clk enable for 2 timer
|
||||
//reg_value = REG_RD(PERI_CLK_DIS_REG1) & (~TIMER_BUS_CLK_BIT);
|
||||
//REG_WR(PERI_CLK_DIS_REG1, (reg_value | (TIMER_BUS_CLK_BIT)));
|
||||
// one clk enable for 2 timer
|
||||
// reg_value = REG_RD(PERI_CLK_DIS_REG1) & (~TIMER_BUS_CLK_BIT);
|
||||
// REG_WR(PERI_CLK_DIS_REG1, (reg_value | (TIMER_BUS_CLK_BIT)));
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -165,7 +165,7 @@ int32_t duet_uart_dma_config(duet_uart_dev_t *uart, uint8_t dma_tx_rx_sel, uint8
|
||||
*/
|
||||
int32_t duet_uart_init(duet_uart_dev_t *uart)
|
||||
{
|
||||
//uart sclk enable and sclk root clk setting (XTAL)
|
||||
// uart sclk enable and sclk root clk setting (XTAL)
|
||||
uint32_t tmp_value;
|
||||
UART_TypeDef *UARTx = NULL;
|
||||
if (DUET_UART0_INDEX == uart->port) {
|
||||
@@ -177,7 +177,7 @@ int32_t duet_uart_init(duet_uart_dev_t *uart)
|
||||
} else {
|
||||
return EIO;
|
||||
}
|
||||
//enable uart clk
|
||||
// enable uart clk
|
||||
if (UARTx == UART0) {
|
||||
tmp_value = REG_RD(PERI_CLK_EN_REG1) & (~(UART0_BUS_CLK_EN | UART0_PERI_CLK_EN));
|
||||
REG_WR(PERI_CLK_EN_REG1, (tmp_value | (UART0_BUS_CLK_EN | UART0_PERI_CLK_EN)));
|
||||
@@ -189,12 +189,12 @@ int32_t duet_uart_init(duet_uart_dev_t *uart)
|
||||
REG_WR(PERI_CLK_EN_REG1, (tmp_value | (UART2_BUS_CLK_EN | UART2_PERI_CLK_EN)));
|
||||
}
|
||||
|
||||
//fpga no effect, soc need
|
||||
// fpga no effect, soc need
|
||||
|
||||
// wait for the end of current charater
|
||||
while (duet_uart_get_flag_status(UARTx, UART_FLAG_BUSY));
|
||||
|
||||
//disable UART
|
||||
// disable UART
|
||||
UARTx->CR &= ~1;
|
||||
|
||||
// flush fifo by setting FEN = 0
|
||||
@@ -231,14 +231,14 @@ int32_t duet_uart_init(duet_uart_dev_t *uart)
|
||||
// enable fifo
|
||||
UARTx->LCR_H |= (ENABLE << 4);
|
||||
UARTx->IFLS &= ~(0x7);
|
||||
UARTx->IFLS |= FIFO_HALF_FULL; //tx fifo threshold
|
||||
UARTx->IFLS |= FIFO_HALF_FULL; // tx fifo threshold
|
||||
UARTx->IFLS &= ~(0x7 << 3);
|
||||
UARTx->IFLS |= (FIFO_HALF_FULL << 3); //rx fifo threshold
|
||||
UARTx->IFLS |= (FIFO_HALF_FULL << 3); // rx fifo threshold
|
||||
|
||||
if (uart->priv) {
|
||||
//enable rx interrupt
|
||||
// enable rx interrupt
|
||||
UARTx->IMSC |= (UART_RX_TIMEOUT_INTERRUPT | UART_RX_INTERRUPT);
|
||||
//enable cm4 interrupt
|
||||
// enable cm4 interrupt
|
||||
if (UARTx == UART0) {
|
||||
tmp_value = REG_RD(DUTE_IRQ_EN_REG) & (~UART0_IRQ_BIT);
|
||||
REG_WR(DUTE_IRQ_EN_REG, (tmp_value | (UART0_IRQ_BIT)));
|
||||
@@ -372,13 +372,13 @@ int32_t duet_uart_finalize(duet_uart_dev_t *uart)
|
||||
return EIO;
|
||||
}
|
||||
|
||||
//disable all uart interrupt
|
||||
// disable all uart interrupt
|
||||
UARTx->IMSC = UART_DISABLE_ALL_IRQ;
|
||||
//disable all uart config
|
||||
// disable all uart config
|
||||
UARTx->LCR_H = 0;
|
||||
UARTx->CR = 0;
|
||||
|
||||
//disable cm4 interrupt
|
||||
// disable cm4 interrupt
|
||||
if (UART0 == UARTx) {
|
||||
tmp_value = REG_RD(DUTE_IRQ_DIS_REG) & (~UART0_IRQ_BIT);
|
||||
REG_WR(DUTE_IRQ_DIS_REG, (tmp_value | (UART0_IRQ_BIT)));
|
||||
@@ -393,7 +393,7 @@ int32_t duet_uart_finalize(duet_uart_dev_t *uart)
|
||||
NVIC_DisableIRQ(UART2_IRQn);
|
||||
}
|
||||
|
||||
//uart sclk disable, fpga no effect, soc need
|
||||
// uart sclk disable, fpga no effect, soc need
|
||||
if (UART0 == UARTx) {
|
||||
tmp_value = REG_RD(PERI_CLK_DIS_REG1) & (~(UART0_BUS_CLK_EN | UART0_PERI_CLK_EN));
|
||||
REG_WR(PERI_CLK_DIS_REG1, (tmp_value | (UART0_BUS_CLK_EN | UART0_PERI_CLK_EN)));
|
||||
|
||||
@@ -23,7 +23,7 @@
|
||||
#else
|
||||
#include "lega_rtos.h"
|
||||
#endif
|
||||
//WDG APB CLOCK 0-15 BIT 4-7
|
||||
// WDG APB CLOCK 0-15 BIT 4-7
|
||||
#define APB_DIV_1 0
|
||||
#define APB_DIV_2 1
|
||||
#define APB_DIV_3 2
|
||||
@@ -105,15 +105,15 @@ int32_t duet_wdg_init(duet_wdg_dev_t *wdg)
|
||||
return EIO;
|
||||
}
|
||||
if (0 == wdg->port) {
|
||||
//OPEN WDG CLOCK
|
||||
// OPEN WDG CLOCK
|
||||
reg_value = REG_RD(PERI_CLK_EN_REG1) & (~WDG_BUS_CLK_BIT);
|
||||
REG_WR(PERI_CLK_EN_REG1, (reg_value | (WDG_BUS_CLK_BIT)));
|
||||
//WDG CLOCK DIV SET
|
||||
// WDG CLOCK DIV SET
|
||||
reg_value = REG_RD(WDG_APB_DIV_REG);
|
||||
REG_WR(WDG_APB_DIV_REG, (reg_value | (WDG_APB_DIV << 4)));
|
||||
hw_watchdog_reset(wdg->config.timeout * (SYSTEM_CLOCK / (WDG_APB_DIV + 1) / 1000 /
|
||||
2)); //1000 for ms, 2 for watchdog feature
|
||||
//ENABLE WDG IRQ
|
||||
2)); // 1000 for ms, 2 for watchdog feature
|
||||
// ENABLE WDG IRQ
|
||||
reg_value = REG_RD(DUTE_IRQ_EN_REG) & (~WDG_IRQ_BIT);
|
||||
REG_WR(DUTE_IRQ_EN_REG, (reg_value | (WDG_IRQ_BIT)));
|
||||
NVIC_EnableIRQ(WDG_IRQn);
|
||||
@@ -157,7 +157,7 @@ int32_t duet_wdg_finalize(duet_wdg_dev_t *wdg)
|
||||
return EIO;
|
||||
}
|
||||
if (0 == wdg->port) {
|
||||
//DIS WDG IRQ
|
||||
// DIS WDG IRQ
|
||||
reg_value = REG_RD(DUTE_IRQ_DIS_REG) & (~WDG_IRQ_BIT);
|
||||
REG_WR(DUTE_IRQ_DIS_REG, (reg_value | (WDG_IRQ_BIT)));
|
||||
NVIC_DisableIRQ(WDG_IRQn);
|
||||
|
||||
@@ -32,12 +32,12 @@ extern lega_mutex_t HwSecurityMutex;
|
||||
HASH operation mode
|
||||
*/
|
||||
typedef enum {
|
||||
LEGA_HASH_SHA1_mode = 0, /*!< SHA1 */
|
||||
LEGA_HASH_SHA224_mode = 1, /*!< SHA224 */
|
||||
LEGA_HASH_SHA256_mode = 2, /*!< SHA256 */
|
||||
LEGA_HASH_SHA384_mode = 3, /*!< SHA384 */
|
||||
LEGA_HASH_SHA512_mode = 4, /*!< SHA512 */
|
||||
LEGA_HASH_MD5_mode = 5, /*!< MD5 */
|
||||
LEGA_HASH_SHA1_mode = 0, /* !< SHA1 */
|
||||
LEGA_HASH_SHA224_mode = 1, /* !< SHA224 */
|
||||
LEGA_HASH_SHA256_mode = 2, /* !< SHA256 */
|
||||
LEGA_HASH_SHA384_mode = 3, /* !< SHA384 */
|
||||
LEGA_HASH_SHA512_mode = 4, /* !< SHA512 */
|
||||
LEGA_HASH_MD5_mode = 5, /* !< MD5 */
|
||||
|
||||
LEGA_HASH_NumOfModes,
|
||||
LEGA_HASH_OperationModeLast = 0x7FFFFFFF,
|
||||
@@ -55,4 +55,4 @@ int lega_hw_lib_deinit(void);
|
||||
int lega_security_engine_init(void);
|
||||
int lega_security_engine_deinit(void);
|
||||
|
||||
#endif //_LEGA_HW_COMMON_H_
|
||||
#endif // _LEGA_HW_COMMON_H_
|
||||
@@ -31,8 +31,8 @@ It implements referenced standard [SP800-90] - 10.2.1.4.2 - CTR-DRBG Reseeding a
|
||||
@return A non-zero value from crys_rnd_error.h on failure.
|
||||
*/
|
||||
int lega_RND_Reseeding(
|
||||
uint8_t *rndContext_ptr, /*!< [in/out] Pointer to the RND context buffer. */
|
||||
uint8_t *rndWorkBuff_ptr /*!< [in/out] Scratchpad for the RND module's work. */
|
||||
uint8_t *rndContext_ptr, /* !< [in/out] Pointer to the RND context buffer. */
|
||||
uint8_t *rndWorkBuff_ptr /* !< [in/out] Scratchpad for the RND module's work. */
|
||||
);
|
||||
|
||||
/****************************************************************************************/
|
||||
@@ -50,11 +50,11 @@ The generation algorithm uses AES (FIPS-PUB 197) and Derivation Function (DF).
|
||||
@return A non-zero value from crys_rnd_error.h on failure.
|
||||
*/
|
||||
int lega_RND_GenerateVector(
|
||||
uint8_t *rndState_ptr, /*!< [in/out] Pointer to the RND state structure, which is part of the RND context structure.
|
||||
uint8_t *rndState_ptr, /* !< [in/out] Pointer to the RND state structure, which is part of the RND context structure.
|
||||
Use rndContext->rndState field of the context for this parameter. */
|
||||
uint16_t
|
||||
outSizeBytes, /*!< [in] The size in bytes of the random vector required. The maximal size is 2^16 -1 bytes. */
|
||||
uint8_t *out_ptr /*!< [out] The pointer to output buffer. */
|
||||
outSizeBytes, /* !< [in] The size in bytes of the random vector required. The maximal size is 2^16 -1 bytes. */
|
||||
uint8_t *out_ptr /* !< [out] The pointer to output buffer. */
|
||||
);
|
||||
|
||||
/*************************************************************************************/
|
||||
@@ -66,9 +66,9 @@ to be later used by the ::CRYS_RND_Instantiation/::CRYS_RND_Reseeding/::CRYS_RND
|
||||
@return A non-zero value from crys_rnd_error.h on failure.
|
||||
*/
|
||||
int lega_RND_AddAdditionalInput(
|
||||
uint8_t *rndContext_ptr, /*!< [in/out] Pointer to the RND context buffer. */
|
||||
uint8_t *additonalInput_ptr, /*!< [in] The Additional Input buffer. */
|
||||
uint16_t additonalInputSize /*!< [in] The size of the Additional Input buffer. Must be <= 48, and a multiple of 4. */
|
||||
uint8_t *rndContext_ptr, /* !< [in/out] Pointer to the RND context buffer. */
|
||||
uint8_t *additonalInput_ptr, /* !< [in] The Additional Input buffer. */
|
||||
uint16_t additonalInputSize /* !< [in] The size of the Additional Input buffer. Must be <= 48, and a multiple of 4. */
|
||||
);
|
||||
|
||||
#endif //_LEGA_RND_H_
|
||||
#endif // _LEGA_RND_H_
|
||||
@@ -32,16 +32,16 @@
|
||||
* @brief wlan network interface enumeration definition.
|
||||
*/
|
||||
typedef enum {
|
||||
SOFTAP, /*Act as an access point, and other station can connect, 4 stations Max*/
|
||||
STA, /*Act as a station which can connect to an access point*/
|
||||
SOFTAP, /*Act as an access point, and other station can connect, 4 stations Max */
|
||||
STA, /*Act as a station which can connect to an access point */
|
||||
} lega_wlan_type_e;
|
||||
|
||||
typedef enum {
|
||||
EVENT_STATION_UP = 1, /*used in station mode,
|
||||
indicate station associated in open mode or 4-way-handshake done in WPA/WPA2*/
|
||||
EVENT_STATION_DOWN, /*used in station mode, indicate station deauthed*/
|
||||
EVENT_AP_UP, /*used in softap mode, indicate softap enabled*/
|
||||
EVENT_AP_DOWN, /*used in softap mode, indicate softap disabled*/
|
||||
EVENT_STATION_UP = 1, /* used in station mode,
|
||||
indicate station associated in open mode or 4-way-handshake done in WPA/WPA2 */
|
||||
EVENT_STATION_DOWN, /* used in station mode, indicate station deauthed */
|
||||
EVENT_AP_UP, /* used in softap mode, indicate softap enabled */
|
||||
EVENT_AP_DOWN, /* used in softap mode, indicate softap disabled */
|
||||
} lega_wifi_event_e;
|
||||
typedef enum {
|
||||
CONNECT_SUCC,
|
||||
@@ -56,7 +56,7 @@ typedef struct {
|
||||
uint8_t is_scan_adv;
|
||||
char ap_num; /**< The number of access points found in scanning. */
|
||||
struct {
|
||||
char ssid[32 + 1]; /*ssid max len:32. +1 is for '\0'. when ssidlen is 32 */
|
||||
char ssid[32 + 1]; /* ssid max len:32. +1 is for '\0'. when ssidlen is 32 */
|
||||
char ap_power; /**< Signal strength, min:0, max:100. */
|
||||
char bssid[6]; /* The BSSID of an access point. */
|
||||
char channel; /* The RF frequency, 1-13 */
|
||||
@@ -65,41 +65,41 @@ typedef struct {
|
||||
} lega_wlan_scan_result_t;
|
||||
|
||||
typedef enum {
|
||||
WLAN_SECURITY_OPEN, //NONE
|
||||
WLAN_SECURITY_WEP, //WEP
|
||||
WLAN_SECURITY_WPA, //WPA
|
||||
WLAN_SECURITY_WPA2, //WPA2
|
||||
WLAN_SECURITY_AUTO, //WPA or WPA2
|
||||
WLAN_SECURITY_OPEN, // NONE
|
||||
WLAN_SECURITY_WEP, // WEP
|
||||
WLAN_SECURITY_WPA, // WPA
|
||||
WLAN_SECURITY_WPA2, // WPA2
|
||||
WLAN_SECURITY_AUTO, // WPA or WPA2
|
||||
WLAN_SECURITY_MAX,
|
||||
} lega_wlan_security_e;
|
||||
|
||||
/*used in event callback of station mode, indicate softap informatino which is connected*/
|
||||
/* used in event callback of station mode, indicate softap informatino which is connected */
|
||||
typedef struct {
|
||||
int rssi; /* rssi */
|
||||
char ssid[32 + 1]; /* ssid max len:32. +1 is for '\0' when ssidlen is 32 */
|
||||
char pwd[64 + 1]; /* pwd max len:64. +1 is for '\0' when pwdlen is 64 */
|
||||
char bssid[6]; /* BSSID of the wlan needs to be connected.*/
|
||||
char bssid[6]; /* BSSID of the wlan needs to be connected. */
|
||||
#ifdef CFG_NAN_CONFIG
|
||||
char pmk[32];
|
||||
#endif
|
||||
char ssid_len; /*ssid length*/
|
||||
char pwd_len; /*password length*/
|
||||
char channel; /* wifi channel 0-13.*/
|
||||
char security; /*refer to lega_wlan_security_e*/
|
||||
char ssid_len; /* ssid length */
|
||||
char pwd_len; /* password length */
|
||||
char channel; /* wifi channel 0-13. */
|
||||
char security; /* refer to lega_wlan_security_d */
|
||||
} lega_wlan_ap_info_adv_t;
|
||||
|
||||
/*only used in station mode*/
|
||||
/* only used in station modd */
|
||||
typedef struct {
|
||||
char dhcp; /* no use currently */
|
||||
char macaddr[16]; /* mac address on the target wlan interface, ASCII*/
|
||||
char ip[16]; /* Local IP address on the target wlan interface, ASCII*/
|
||||
char macaddr[16]; /* mac address on the target wlan interface, ASCII */
|
||||
char ip[16]; /* Local IP address on the target wlan interface, ASCII */
|
||||
char gate[16]; /* Router IP address on the target wlan interface, ASCII */
|
||||
char mask[16]; /* Netmask on the target wlan interface, ASCII*/
|
||||
char dns[16]; /* no use currently , ASCII*/
|
||||
char broadcastip[16]; /* no use currently , ASCII*/
|
||||
char mask[16]; /* Netmask on the target wlan interface, ASCII */
|
||||
char dns[16]; /* no use currently , ASCII */
|
||||
char broadcastip[16]; /* no use currently , ASCII */
|
||||
} lega_wlan_ip_stat_t;
|
||||
|
||||
/*only used in station mode*/
|
||||
/* only used in station modd */
|
||||
typedef struct {
|
||||
int is_connected; /* The link to wlan is established or not, 0: disconnected, 1: connected. */
|
||||
int wifi_strength; /* Signal strength of the current connected AP */
|
||||
@@ -114,15 +114,15 @@ typedef struct {
|
||||
char pwd[64 + 1]; /* pwd max len:64. +1 is for '\0' when pwdlen is 64 */
|
||||
int interval; /* beacon listen interval */
|
||||
int hide; /* hidden SSID */
|
||||
int channel; /* Channel*/
|
||||
int channel; /* Channel */
|
||||
} lega_wlan_ap_init_t;
|
||||
|
||||
/*used in open cmd of hal_wifi_module_t*/
|
||||
/* used in open cmd of hal_wifi_module_t */
|
||||
typedef struct {
|
||||
char wifi_mode; /* refer to hal_wifi_type_t*/
|
||||
char wifi_mode; /* refer to hal_wifi_type_t */
|
||||
char security; /* security mode */
|
||||
char wifi_ssid[32]; /* in station mode, indicate SSID of the wlan needs to be connected.
|
||||
in softap mode, indicate softap SSID*/
|
||||
in softap mode, indicate softap SSID */
|
||||
char wifi_key[64]; /* in station mode, indicate Security key of the wlan needs to be connected,
|
||||
in softap mode, indicate softap password.(ignored in an open system.) */
|
||||
char local_ip_addr[16]; /* used in softap mode to config ip for dut */
|
||||
@@ -130,8 +130,8 @@ typedef struct {
|
||||
char gateway_ip_addr[16]; /* used in softap mode to config netmask for dut */
|
||||
char dns_server_ip_addr[16]; /* no use currently */
|
||||
char dhcp_mode; /* no use currently */
|
||||
char channel; /* softap channel in softap mode; connect channel in sta mode*/
|
||||
char mac_addr[6]; /* connect bssid in sta mode*/
|
||||
char channel; /* softap channel in softap mode; connect channel in sta modd */
|
||||
char mac_addr[6]; /* connect bssid in sta modd */
|
||||
char reserved[32]; /* no use currently */
|
||||
#ifdef CFG_NAN_CONFIG
|
||||
uint8_t pmk[32];
|
||||
@@ -139,14 +139,14 @@ typedef struct {
|
||||
int wifi_retry_interval; /* no use currently */
|
||||
} lega_wlan_init_type_t;
|
||||
|
||||
/*WLAN error status*/
|
||||
/*WLAN error status */
|
||||
typedef enum {
|
||||
WLAN_STA_MODE_BEACON_LOSS = 1, //in sta mode, cannot receive beacon of peer connected AP for a long time
|
||||
WLAN_STA_MODE_AUTH_FAIL, //in sta mode, connect fail during auth
|
||||
WLAN_STA_MODE_ASSOC_FAIL, //in sta mode, connect fail during association
|
||||
WLAN_STA_MODE_PASSWORD_ERR, //in sta mode, connect fail as password error
|
||||
WLAN_STA_MODE_NO_AP_FOUND, //in sta mode, connect fail as cannot find the connecting AP during scan
|
||||
WLAN_STA_MODE_DHCP_FAIL, //in sta mode, connect fail as dhcp fail
|
||||
WLAN_STA_MODE_BEACON_LOSS = 1, // in sta mode, cannot receive beacon of peer connected AP for a long time
|
||||
WLAN_STA_MODE_AUTH_FAIL, // in sta mode, connect fail during auth
|
||||
WLAN_STA_MODE_ASSOC_FAIL, // in sta mode, connect fail during association
|
||||
WLAN_STA_MODE_PASSWORD_ERR, // in sta mode, connect fail as password error
|
||||
WLAN_STA_MODE_NO_AP_FOUND, // in sta mode, connect fail as cannot find the connecting AP during scan
|
||||
WLAN_STA_MODE_DHCP_FAIL, // in sta mode, connect fail as dhcp fail
|
||||
} lega_wlan_err_status_e;
|
||||
|
||||
typedef struct {
|
||||
@@ -172,7 +172,7 @@ typedef struct {
|
||||
uint8_t sta_mac_addr[6]; /* station mac addr */
|
||||
} lega_wlan_client_addr_info_t;
|
||||
|
||||
/*store linked station info*/
|
||||
/* store linked station info */
|
||||
typedef struct {
|
||||
int client_num; /* linked station number */
|
||||
lega_wlan_client_addr_info_t sta[4]; /* linked station entry, max client number is 4 */
|
||||
@@ -202,7 +202,7 @@ typedef struct ms_hal_realtime_info_s {
|
||||
uint32_t byte_recv_speed; /* bytes receive from associate AP per second */
|
||||
uint32_t packet_send_speed; /* packets sent to associate AP per second */
|
||||
uint32_t packet_recv_speed; /* packets receive from associate AP per second */
|
||||
uint32_t errors_send_speed; /* error packet AP transmit to STA per second (retry limit and other)*/
|
||||
uint32_t errors_send_speed; /* error packet AP transmit to STA per second (retry limit and other) */
|
||||
uint32_t errors_recv_speed; /* error packet STA transmit to AP per second */
|
||||
uint32_t retrains_count; /* total retransmission include same packted retransmit in hw */
|
||||
uint8_t chn_utilization; /* measure by the radio on the scanned 20MHZ channel */
|
||||
@@ -380,13 +380,13 @@ int lega_wlan_get_link_status(lega_wlan_link_stat_t *link_status);
|
||||
*/
|
||||
lega_wlan_ap_info_adv_t *lega_wlan_get_associated_apinfo(void);
|
||||
|
||||
/*used in sniffer mode, open sniffer mode
|
||||
/* used in sniffer mode, open sniffer mode
|
||||
* @return 0 : on success.
|
||||
* @return other : error occurred
|
||||
*/
|
||||
int lega_wlan_start_monitor(void);
|
||||
|
||||
/*used in sniffer mode, close sniffer mode
|
||||
/* used in sniffer mode, close sniffer mode
|
||||
* @return 0 : on success.
|
||||
* @return other : error occurred
|
||||
*/
|
||||
@@ -417,10 +417,10 @@ int lega_wlan_set_ps_options(uint8_t listen_bc_mc, uint16_t listen_interval);
|
||||
*/
|
||||
int lega_wlan_set_ps_mode(uint8_t ps_on);
|
||||
|
||||
/*when use monitor mode, user should register this type of callback function to get the received MPDU*/
|
||||
/* when use monitor mode, user should register this type of callback function to get the received MPDU */
|
||||
typedef void (*monitor_cb_t)(uint8_t *data, int len, int rssi);
|
||||
|
||||
/*when use monitor-ap mode, user should register this type of callback function to turn off monitor */
|
||||
/* when use monitor-ap mode, user should register this type of callback function to turn off monitor */
|
||||
typedef void (*monitor_ap_cb_t)(void);
|
||||
|
||||
/** @brief used in sniffer mode, callback function to get received MPDU, should register before start_monitor
|
||||
@@ -441,7 +441,7 @@ int lega_wlan_register_monitor_cb(monitor_cb_t fn);
|
||||
*/
|
||||
int lega_wlan_register_monitor_ap_cb(monitor_ap_cb_t fn);
|
||||
|
||||
/* start adv callback function, notify the connect results*/
|
||||
/* start adv callback function, notify the connect results */
|
||||
typedef void (*start_adv_cb_t)(lega_start_adv_results_e status);
|
||||
|
||||
/** @brief used in sta mode, callback function to notify the connecting results
|
||||
@@ -476,14 +476,14 @@ int lega_wlan_nan_set_scan_channel(uint8_t channel, uint32_t duration);
|
||||
int lega_wlan_disable_nanconfig(void);
|
||||
#endif
|
||||
|
||||
/*enable WIFI stack log, will be output by uart
|
||||
/* enable WIFI stack log, will be output by uart
|
||||
*
|
||||
* @return 0 : on success.
|
||||
* @return other : error occurred
|
||||
*/
|
||||
int lega_wlan_start_debug_mode(void);
|
||||
|
||||
/*disable WIFI stack log
|
||||
/* disable WIFI stack log
|
||||
*
|
||||
* @return 0 : on success.
|
||||
* @return other : error occurred
|
||||
@@ -608,4 +608,4 @@ void lega_log_enable(void);
|
||||
void lega_log_disable(void);
|
||||
bool lega_log_is_enable(void);
|
||||
|
||||
#endif //_LEGA_WIFI_API_H_
|
||||
#endif // _LEGA_WIFI_API_H_
|
||||
|
||||
@@ -77,5 +77,5 @@ extern void wifi_event_cb(lega_wlan_event_e evt, void *info);
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif //_LEGA_WIFI_API_AOS_H_
|
||||
#endif // _LEGA_WIFI_API_AOS_H_
|
||||
|
||||
|
||||
@@ -33,4 +33,4 @@
|
||||
*/
|
||||
const char *lega_get_wifi_version(void);
|
||||
|
||||
#endif //__SYSTEM_VERSION_H__
|
||||
#endif // __SYSTEM_VERSION_H__
|
||||
|
||||
@@ -22,10 +22,10 @@
|
||||
#include "lwip/inet.h"
|
||||
#include "lega_rtos.h"
|
||||
#define TCP_MAX_TXPERF_CONNECTION 1
|
||||
#define IPERF_OUTPUT_INTERVIEW 1 //1s
|
||||
#define IPERF_OUTPUT_INTERVIEW 1 // 1s
|
||||
#define TCP_SEND_BUFSIZE (TCP_MSS)
|
||||
#define UDP_SEND_BUFSIZE (TCP_MSS+12)
|
||||
#define SEND_BUFSIZE UDP_SEND_BUFSIZE//(TCP_SEND_BUFSIZE>UDP_SEND_BUFSIZE?TCP_SEND_BUFSIZE:UDP_SEND_BUFSIZE)
|
||||
#define SEND_BUFSIZE UDP_SEND_BUFSIZE // (TCP_SEND_BUFSIZE>UDP_SEND_BUFSIZE?TCP_SEND_BUFSIZE:UDP_SEND_BUFSIZE)
|
||||
typedef unsigned long long u64_t;
|
||||
|
||||
extern char iperf_send_buf[SEND_BUFSIZE];
|
||||
@@ -71,13 +71,13 @@ extern volatile IPERF_TCP_SERVER_STATUS iperf_tcp_server_status;
|
||||
extern volatile IPERF_UDP_SERVER_STATUS iperf_udp_server_status;
|
||||
extern volatile IPERF_TCP_CLINET_STATUS iperf_tcp_client_status;
|
||||
extern volatile IPERF_UDP_CLIENT_STATUS iperf_udp_client_status;
|
||||
//extern volatile int iperf_tcp_server_term;
|
||||
//extern volatile int iperf_udp_server_term;
|
||||
//extern volatile int iperf_tcp_client_running;
|
||||
//extern volatile int iperf_udp_client_term;
|
||||
// extern volatile int iperf_tcp_server_term;
|
||||
// extern volatile int iperf_udp_server_term;
|
||||
// extern volatile int iperf_tcp_client_running;
|
||||
// extern volatile int iperf_udp_client_term;
|
||||
|
||||
struct lwip_iperf_outputInfo {
|
||||
int seconds; //start time
|
||||
int seconds; // start time
|
||||
u64_t lastByte;
|
||||
u64_t currentByte;
|
||||
u64_t lastPacketNum;
|
||||
|
||||
@@ -142,7 +142,7 @@ void lega_wifi_iperf(int argc, char **argv)
|
||||
}
|
||||
if ((iperf_config.mode == IPERF_MODE_CLIENT) && (iperf_Semaphore != NULL)) {
|
||||
if (lega_rtos_set_semaphore(&iperf_Semaphore) == kNoErr) {
|
||||
//iperf_printf("Begin to run iperf client:\n");
|
||||
// iperf_printf("Begin to run iperf client:\n");
|
||||
} else {
|
||||
iperf_printf("Run iperf client fail for semaphore error\n");
|
||||
}
|
||||
@@ -150,10 +150,10 @@ void lega_wifi_iperf(int argc, char **argv)
|
||||
}
|
||||
if (iperf_config.protocol == IPERF_PROTOCOL_TCP) {
|
||||
if (iperf_config.mode == IPERF_MODE_SERVER) {
|
||||
//tcp server
|
||||
// tcp server
|
||||
if (iperf_config.termFlag == 1) {
|
||||
//iperf_printf("Terminate iperf tcp server");
|
||||
//terminate_rxperf();
|
||||
// iperf_printf("Terminate iperf tcp server");
|
||||
// terminate_rxperf();
|
||||
do_iperf_terminate("tcp server", &rxperf_outinfo, clear_rxperf);
|
||||
} else {
|
||||
if (iperf_tcp_server_status <= IPERF_TCP_SERVER_INIT) {
|
||||
@@ -167,7 +167,7 @@ void lega_wifi_iperf(int argc, char **argv)
|
||||
}
|
||||
} else {
|
||||
if (iperf_config.mode == IPERF_MODE_SERVER) {
|
||||
//udp server
|
||||
// udp server
|
||||
if (iperf_config.termFlag == 1) {
|
||||
|
||||
do_iperf_terminate("udp server", &urxperf_outinfo, clear_urxperf);
|
||||
@@ -231,7 +231,7 @@ void lega_wifi_iperf_client_start()
|
||||
}
|
||||
for ( ;; ) {
|
||||
if (lega_rtos_get_semaphore(&iperf_Semaphore, IPERF_CLIENT_TIMEOUT_MS) == kNoErr) {
|
||||
//AT command set lwip_iperf_config over and begin to run
|
||||
// AT command set lwip_iperf_config over and begin to run
|
||||
|
||||
if (iperf_config.mode != IPERF_MODE_CLIENT) {
|
||||
continue;
|
||||
|
||||
@@ -38,7 +38,7 @@
|
||||
#define FLASH_REMAPPING_BANK0_VALUE 0xFFFFFFFF
|
||||
#define FLASH_REMAPPING_BANK1_VALUE 0x00000000
|
||||
|
||||
//size of image header
|
||||
// size of image header
|
||||
#define IMAGE_HEADER_SIZE 128
|
||||
#define IMAGE_TOKEN_SIZE 32
|
||||
#define IMAGE_APP_VERSION_MAX_SIZE 32
|
||||
@@ -58,19 +58,19 @@
|
||||
- IMAGE_LENGTH_SIZE - IMAGE_CRC_SIZE - APP_LENGTH_SIZE - APP_CRC_SIZE \
|
||||
- OTA_REGION_DIRTY_FLAG_SIZE - IMAGE_ROLL_BACK_FLAG_SIZE - IMAGE_VERIFY_DONE_SIZE)
|
||||
|
||||
//size of image
|
||||
#define IMAGE_APP_VERSION_SIZE 24 //e.g. app-1.0.2-20181115.1553
|
||||
// size of image
|
||||
#define IMAGE_APP_VERSION_SIZE 24 // e.g. app-1.0.2-20181115.1553
|
||||
|
||||
//offset in image header
|
||||
// offset in image header
|
||||
#define TOKEN_OFFSET 0
|
||||
#define APP_VERSION_OFFSET (TOKEN_OFFSET + IMAGE_TOKEN_SIZE)
|
||||
|
||||
#define IMAGE_HEADER_OFFSET 0x0 //offset in flash region
|
||||
#define IMAGE_HEADER_OFFSET 0x0 // offset in flash region
|
||||
#define OTA_IMAGE_CRC_OFFSET (IMAGE_TOKEN_SIZE + IMAGE_APP_VERSION_MAX_SIZE \
|
||||
+ FLASH_REMAPPING_EN_SIZE + FLASH_REMAPPING_BANK_SIZE + OTA_FLAG_SIZE + IMAGE_COMPRESS_EN_SIZE \
|
||||
+ IMAGE_LENGTH_SIZE)
|
||||
|
||||
//offset in pure image
|
||||
// offset in pure image
|
||||
#define IMAGE_APP_VERSION_OFFSET 0x100
|
||||
|
||||
#define OTA_VERIFY_TOKEN 0xACDF160B
|
||||
@@ -83,8 +83,8 @@ struct OTA_INFO {
|
||||
uint32_t image_compress_en;
|
||||
uint32_t ota_image_size;
|
||||
uint32_t ota_image_crc;
|
||||
uint32_t app_image_size; //for image compress, image length after de-compress
|
||||
uint32_t app_image_crc; //for image compress, image length after de-compress
|
||||
uint32_t app_image_size; // for image compress, image length after de-compress
|
||||
uint32_t app_image_crc; // for image compress, image length after de-compress
|
||||
uint32_t ota_region_dirty_flag;
|
||||
uint32_t image_roll_back_flag;
|
||||
uint32_t verify_done;
|
||||
@@ -107,9 +107,9 @@ typedef struct {
|
||||
unsigned char boot_count;
|
||||
unsigned int rec_size;
|
||||
unsigned int splict_size;
|
||||
int off_bp; /*Break point offset*/
|
||||
LEGA_OTA_RES_TYPE_E res_type; /*result type: OTA_FINISH, OTA_BREAKPOINT*/
|
||||
unsigned short param_crc; /*Parameter crc*/
|
||||
int off_bp; /*Break point offset */
|
||||
LEGA_OTA_RES_TYPE_E res_type; /* result type: OTA_FINISH, OTA_BREAKPOINT */
|
||||
unsigned short param_crc; /* Parameter crc */
|
||||
} __attribute__((packed)) lega_ota_boot_param_t;
|
||||
|
||||
/**
|
||||
@@ -166,4 +166,4 @@ const char *lega_ota_get_version(unsigned char dev_type);
|
||||
#ifdef AOS_COMP_MSMART
|
||||
void lega_ota_clear_ota_flag(void);
|
||||
#endif
|
||||
#endif //_OTA_PORT_H_
|
||||
#endif // _OTA_PORT_H_
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -23,11 +23,11 @@
|
||||
#include "FreeRTOSConfig.h"
|
||||
#include "portmacro.h"
|
||||
#endif
|
||||
//void jumpToApp(int addr)
|
||||
//{
|
||||
// void jumpToApp(int addr)
|
||||
// {
|
||||
// __asm("LDR SP, [R0]");
|
||||
// __asm("LDR PC, [R0, #4]");
|
||||
//}
|
||||
// }
|
||||
|
||||
void duet_memset(char *buf, int value, int size)
|
||||
{
|
||||
@@ -56,13 +56,13 @@ FLASH_COMMON2_SEG void delay(unsigned int cycles)
|
||||
}
|
||||
}
|
||||
|
||||
/*please open flash cache when using this function.
|
||||
otherwise, it is not accurate*/
|
||||
/* please open flash cache when using this function.
|
||||
otherwise, it is not accuratd */
|
||||
void udelay_pl(unsigned int us)
|
||||
{
|
||||
unsigned int us2cycles = us * (SYSTEM_CLOCK / 1000000) / 9;
|
||||
us2cycles = (us2cycles >= 6) ? (us2cycles - 6) : 0;
|
||||
/*9 clock cycles*/
|
||||
/* 9 clock cycles */
|
||||
while (us2cycles > 0) {
|
||||
us2cycles--;
|
||||
asm("nop");
|
||||
@@ -131,9 +131,9 @@ int convert_str_to_int(char *str)
|
||||
return val;
|
||||
}
|
||||
#endif
|
||||
//type = 1, val is uint8
|
||||
//type = 2, val is uint16
|
||||
//type = 4, val is uint32
|
||||
// type = 1, val is uint8
|
||||
// type = 2, val is uint16
|
||||
// type = 4, val is uint32
|
||||
void convert_int_to_str(unsigned int val, unsigned int type, char *ch)
|
||||
{
|
||||
int i = 0, tempVal;
|
||||
@@ -162,7 +162,7 @@ void duet_write32_bit(uint32_t reg, uint8_t start_bit, uint8_t len, uint32_t src
|
||||
if ((start_bit < 32) && (len <= 32) && (src_val <= ((1 << len) - 1))) {
|
||||
tmp = REG_RD(reg);
|
||||
|
||||
mask = (1 << len) - 1; //eg: len=4, mask = 0xf, 1111
|
||||
mask = (1 << len) - 1; // eg: len=4, mask = 0xf, 1111
|
||||
mask = ~(mask << start_bit);
|
||||
|
||||
val = tmp & mask;
|
||||
@@ -183,7 +183,7 @@ uint32_t duet_read32_bit(uint32_t reg, uint8_t start_bit, uint8_t len)
|
||||
if ((start_bit < 32) && (len <= 32)) {
|
||||
val = REG_RD(reg);
|
||||
|
||||
mask = (1 << len) - 1; //eg: len =4, 0xf,1111
|
||||
mask = (1 << len) - 1; // eg: len =4, 0xf,1111
|
||||
mask = mask << start_bit;
|
||||
val = val & mask;
|
||||
|
||||
|
||||
@@ -33,51 +33,51 @@
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define __CM0_REV 0 /*!< Core Revision r0p0 */
|
||||
#define __MPU_PRESENT 0 /*!< combo provide MPU */
|
||||
#define __ICACHE_PRESENT 1 /*!< instruction cache present */
|
||||
#define __DCACHE_PRESENT 1 /*!< data cache present */
|
||||
#define __NVIC_PRIO_BITS 3 /*!< legawifi uses 3 Bits for the Priority Levels */
|
||||
#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */
|
||||
//hightest interrupt priority is configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY&((1<<__NVIC_PRIO_BITS)-1)=5
|
||||
//lowest interrupt priority is configLIBRARY_LOWEST_INTERRUPT_PRIORITY&((1<<__NVIC_PRIO_BITS)-1)=7
|
||||
//set normal interrupt priority 6
|
||||
#define __CM0_REV 0 /* !< Core Revision r0p0 */
|
||||
#define __MPU_PRESENT 0 /* !< combo provide MPU */
|
||||
#define __ICACHE_PRESENT 1 /* !< instruction cache present */
|
||||
#define __DCACHE_PRESENT 1 /* !< data cache present */
|
||||
#define __NVIC_PRIO_BITS 3 /* !< legawifi uses 3 Bits for the Priority Levels */
|
||||
#define __Vendor_SysTickConfig 0 /* !< Set to 1 if different SysTick Config is used */
|
||||
// hightest interrupt priority is configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY&((1<<__NVIC_PRIO_BITS)-1)=5
|
||||
// lowest interrupt priority is configLIBRARY_LOWEST_INTERRUPT_PRIORITY&((1<<__NVIC_PRIO_BITS)-1)=7
|
||||
// set normal interrupt priority 6
|
||||
#define configLIBRARY_NORMAL_INTERRUPT_PRIORITY 6
|
||||
|
||||
typedef enum IRQn {
|
||||
/************** Processor Exceptions Numbers ******************************************/
|
||||
NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt */
|
||||
MemoryManagement_IRQn = -12, /*!< 4 Cortex-M3 Memory Management Interrupt */
|
||||
BusFault_IRQn = -11, /*!< 5 Cortex-M3 Bus Fault Interrupt */
|
||||
UsageFault_IRQn = -10, /*!< 6 Cortex-M3 Usage Fault Interrupt */
|
||||
SVCall_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */
|
||||
DebugMonitor_IRQn = -4, /*!< 12 Cortex-M3 Debug Monitor Interrupt */
|
||||
PendSV_IRQn = -2, /*!< 14 Cortex-M3 Pend SV Interrupt */
|
||||
SysTick_IRQn = -1, /*!< 15 Cortex-M3 System Tick Interrupt */
|
||||
NonMaskableInt_IRQn = -14, /* !< 2 Non Maskable Interrupt */
|
||||
MemoryManagement_IRQn = -12, /* !< 4 Cortex-M3 Memory Management Interrupt */
|
||||
BusFault_IRQn = -11, /* !< 5 Cortex-M3 Bus Fault Interrupt */
|
||||
UsageFault_IRQn = -10, /* !< 6 Cortex-M3 Usage Fault Interrupt */
|
||||
SVCall_IRQn = -5, /* !< 11 Cortex-M3 SV Call Interrupt */
|
||||
DebugMonitor_IRQn = -4, /* !< 12 Cortex-M3 Debug Monitor Interrupt */
|
||||
PendSV_IRQn = -2, /* !< 14 Cortex-M3 Pend SV Interrupt */
|
||||
SysTick_IRQn = -1, /* !< 15 Cortex-M3 System Tick Interrupt */
|
||||
/****** Interrupt Numbers *******************************************************/
|
||||
CEVA_RW_IP_IRQn = 0, /*!< CEVA RW IP Interrupt */
|
||||
SLEEP_IRQn = 1, /*!< Sleep Wake-Up Interrupt */
|
||||
WDG_IRQn = 2, /*!< Window WatchDog */
|
||||
FLASH_IRQn = 3, /*!< FLASH Interrupt */
|
||||
GPIO_IRQn = 4, /*!< GPIO Interrupt */
|
||||
TIMER_IRQn = 5, /*!< Timer Interrupt */
|
||||
CRYPTOCELL310_IRQn = 6, /*!< CryptoCell 310 Interrupt */
|
||||
DMA_IRQn = 7, /*!< Generic DMA Ctrl Interrupt */
|
||||
UART0_IRQn = 8, /*!< UART0 Interrupt */
|
||||
UART1_IRQn = 9, /*!< UART1 Interrupt */
|
||||
UART2_IRQn = 10, /*!< UART2 Interrupt */
|
||||
SPI0_IRQn = 11, /*!< SPI0 Interrupt */
|
||||
SPI1_IRQn = 12, /*!< SPI1 Interrupt */
|
||||
SPI2_IRQn = 13, /*!< SPI2 */
|
||||
I2C0_IRQn = 14, /*!< I2C0 Interrupt */
|
||||
I2C1_IRQn = 15, /*!< I2C1 Interrupt */
|
||||
SDIO_IRQn = 16, /*!< SDIO Combined Interrupt */
|
||||
D_APLL_UNLOCK_IRQn = 17, /*!< RF added: D_APLL_UNLOCK Interrupt */
|
||||
D_SX_UNLOCK_IRQn = 18, /*!< RF added: D_SX_UNLOCK Interrupt */
|
||||
AUX_ADC_IRQn = 20, /*!< ADC Interrupt */
|
||||
PLF_WAKEUP_IRQn = 23, /*!< WiFi Platform Wake-Up Interrupt */
|
||||
I2S_IRQn = 24, /*!< I2S Interrupt */
|
||||
RW_BLE_IRQn = 25, /*!< BLE Interrupt */
|
||||
CEVA_RW_IP_IRQn = 0, /* !< CEVA RW IP Interrupt */
|
||||
SLEEP_IRQn = 1, /* !< Sleep Wake-Up Interrupt */
|
||||
WDG_IRQn = 2, /* !< Window WatchDog */
|
||||
FLASH_IRQn = 3, /* !< FLASH Interrupt */
|
||||
GPIO_IRQn = 4, /* !< GPIO Interrupt */
|
||||
TIMER_IRQn = 5, /* !< Timer Interrupt */
|
||||
CRYPTOCELL310_IRQn = 6, /* !< CryptoCell 310 Interrupt */
|
||||
DMA_IRQn = 7, /* !< Generic DMA Ctrl Interrupt */
|
||||
UART0_IRQn = 8, /* !< UART0 Interrupt */
|
||||
UART1_IRQn = 9, /* !< UART1 Interrupt */
|
||||
UART2_IRQn = 10, /* !< UART2 Interrupt */
|
||||
SPI0_IRQn = 11, /* !< SPI0 Interrupt */
|
||||
SPI1_IRQn = 12, /* !< SPI1 Interrupt */
|
||||
SPI2_IRQn = 13, /* !< SPI2 */
|
||||
I2C0_IRQn = 14, /* !< I2C0 Interrupt */
|
||||
I2C1_IRQn = 15, /* !< I2C1 Interrupt */
|
||||
SDIO_IRQn = 16, /* !< SDIO Combined Interrupt */
|
||||
D_APLL_UNLOCK_IRQn = 17, /* !< RF added: D_APLL_UNLOCK Interrupt */
|
||||
D_SX_UNLOCK_IRQn = 18, /* !< RF added: D_SX_UNLOCK Interrupt */
|
||||
AUX_ADC_IRQn = 20, /* !< ADC Interrupt */
|
||||
PLF_WAKEUP_IRQn = 23, /* !< WiFi Platform Wake-Up Interrupt */
|
||||
I2S_IRQn = 24, /* !< I2S Interrupt */
|
||||
RW_BLE_IRQn = 25, /* !< BLE Interrupt */
|
||||
} IRQn_Type;
|
||||
|
||||
// ---------------------------------------------------------------------------
|
||||
@@ -105,10 +105,10 @@ extern uint32_t system_core_clk;
|
||||
#define V7_FPGA 1
|
||||
#define FPGA_PLATFORM V7_FPGA
|
||||
|
||||
#define PINMUX_CTRL_REG0 0x40000004 //pad0-7
|
||||
#define PINMUX_CTRL_REG1 0x40000008 //pad8-15
|
||||
#define PINMUX_CTRL_REG2 0x4000000C //pad16-23
|
||||
#define PINMUX_CTRL_REG3 0x40000010 //pad24-31
|
||||
#define PINMUX_CTRL_REG0 0x40000004 // pad0-7
|
||||
#define PINMUX_CTRL_REG1 0x40000008 // pad8-15
|
||||
#define PINMUX_CTRL_REG2 0x4000000C // pad16-23
|
||||
#define PINMUX_CTRL_REG3 0x40000010 // pad24-31
|
||||
|
||||
#define SYS_REG_BASE 0x40000000
|
||||
#define SYS_REG_BASE_FLASH_CLK ((SYS_REG_BASE + 0x808))
|
||||
@@ -155,27 +155,27 @@ extern uint32_t system_core_clk;
|
||||
#define APLL_CLK_PHY_REG_ADDR 0x6B
|
||||
#define APLL_FCAL_FSM_CTRL_ADDR 0x6E
|
||||
|
||||
//efuse memory
|
||||
// efuse memory
|
||||
typedef struct {
|
||||
uint8_t mac_addr0[6]; //0x90-0x95
|
||||
uint8_t freq_err; //0x96
|
||||
uint8_t tmmt1; //0x97
|
||||
uint8_t tmmt2; //0x98
|
||||
uint8_t cus_tx_pwr[19]; //0x99-0xab
|
||||
uint8_t cal_tx_pwr0[6]; //0xac-0xb1
|
||||
uint8_t cus_tx_total_pwr[3]; //0xb2-0xb4
|
||||
uint8_t cal_tx_evm0[6]; //0xb5-0xba
|
||||
uint8_t ble_tx_pwr0[3]; //0xbb-0xbd
|
||||
uint8_t reserved1[2]; //0xbe-0xbf
|
||||
uint8_t mac_addr1[6]; //0xc0-0xc5
|
||||
uint8_t mac_addr2[6]; //0xc6-0xcb
|
||||
uint8_t cal_tx_pwr1[6]; //0xcc-0xd1
|
||||
uint8_t cal_tx_evm1[6]; //0xd2-0xd7
|
||||
uint8_t cal_tx_pwr2[6]; //0xd8-0xdd
|
||||
uint8_t cal_tx_evm2[6]; //0xde-0xe3
|
||||
uint8_t ble_tx_pwr1[3]; //0xe4-0xe6
|
||||
uint8_t ble_tx_pwr2[3]; //0xe7-0xe9
|
||||
uint8_t reserved2[6]; //0xea-0xef
|
||||
uint8_t mac_addr0[6]; // 0x90-0x95
|
||||
uint8_t freq_err; // 0x96
|
||||
uint8_t tmmt1; // 0x97
|
||||
uint8_t tmmt2; // 0x98
|
||||
uint8_t cus_tx_pwr[19]; // 0x99-0xab
|
||||
uint8_t cal_tx_pwr0[6]; // 0xac-0xb1
|
||||
uint8_t cus_tx_total_pwr[3]; // 0xb2-0xb4
|
||||
uint8_t cal_tx_evm0[6]; // 0xb5-0xba
|
||||
uint8_t ble_tx_pwr0[3]; // 0xbb-0xbd
|
||||
uint8_t reserved1[2]; // 0xbe-0xbf
|
||||
uint8_t mac_addr1[6]; // 0xc0-0xc5
|
||||
uint8_t mac_addr2[6]; // 0xc6-0xcb
|
||||
uint8_t cal_tx_pwr1[6]; // 0xcc-0xd1
|
||||
uint8_t cal_tx_evm1[6]; // 0xd2-0xd7
|
||||
uint8_t cal_tx_pwr2[6]; // 0xd8-0xdd
|
||||
uint8_t cal_tx_evm2[6]; // 0xde-0xe3
|
||||
uint8_t ble_tx_pwr1[3]; // 0xe4-0xe6
|
||||
uint8_t ble_tx_pwr2[3]; // 0xe7-0xe9
|
||||
uint8_t reserved2[6]; // 0xea-0xef
|
||||
} efuse_info_t;
|
||||
#define EFUSE_INFO_START_ADDR 0x90
|
||||
#define EFUSE_INFO_LEN (sizeof(efuse_info_t))
|
||||
@@ -230,8 +230,8 @@ typedef struct {
|
||||
#endif
|
||||
|
||||
#define BOOTLOADER_FLASH_START_ADDR 0x10000000
|
||||
#define INFO_FLASH_START_ADDR (BOOTLOADER_FLASH_START_ADDR+BOOTLOADER_MAX_SIZE) //0x10010000
|
||||
#define APP_FLASH_START_ADDR (INFO_FLASH_START_ADDR+INFO_MAX_SIZE)//0x10012000 END 10178000
|
||||
#define INFO_FLASH_START_ADDR (BOOTLOADER_FLASH_START_ADDR+BOOTLOADER_MAX_SIZE) // 0x10010000
|
||||
#define APP_FLASH_START_ADDR (INFO_FLASH_START_ADDR+INFO_MAX_SIZE) // 0x10012000 END 10178000
|
||||
#define APAPP_FLASH_END_ADDR (APP_FLASH_START_ADDR+APP_MAX_SIZE)
|
||||
#define CUST1_FLASH_START_ADDR (APAPP_FLASH_END_ADDR+0x4000)
|
||||
|
||||
@@ -239,9 +239,9 @@ typedef struct {
|
||||
#define MIDEA_INFO_BKUP_START_ADDR 0x101FF000
|
||||
#define NVDS_FLASH_START_ADDR 0x1037E000
|
||||
|
||||
#define OTA_FLASH_START_ADDR 0x10200000 //can't change
|
||||
#define OTA_FLASH_START_ADDR 0x10200000 // can't change
|
||||
|
||||
#define KV_FLASH_START_ADDR (OTA_FLASH_START_ADDR+OTA_MAX_SIZE)//0x10366000
|
||||
#define KV_FLASH_START_ADDR (OTA_FLASH_START_ADDR+OTA_MAX_SIZE) // 0x10366000
|
||||
#ifdef MS_CONFIG_OTA_SUPPORT
|
||||
#define OTA_PARA_START_ADDR 0x101C9000
|
||||
#define OTA_HEAD_PARA_START_ADDR 0x101CA000
|
||||
|
||||
@@ -18,20 +18,20 @@
|
||||
|
||||
#ifdef STAR_MPU_ENABLE
|
||||
typedef struct {
|
||||
unsigned int type; /*!< Offset: 0x000 (R/ ) MPU Type Register */
|
||||
unsigned int ctrl; /*!< Offset: 0x004 (R/W) MPU Control Register */
|
||||
unsigned int rnr; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */
|
||||
unsigned int rbar; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */
|
||||
unsigned int rlar; /*!< Offset: 0x010 (R/W) MPU Region Limit Address and Size Register */
|
||||
unsigned int rbar_a; /*!< Offset: 0x014 (R/W) MPU Alias 1 Region Base Address Register */
|
||||
unsigned int rlar_a; /*!< Offset: 0x018 (R/W) MPU Region Base Address Register */
|
||||
unsigned int reserve1; /*!< Offset: 0x01C */
|
||||
unsigned int reserve2; /*!< Offset: 0x020 */
|
||||
unsigned int reserve3; /*!< Offset: 0x024 */
|
||||
unsigned int reserve4; /*!< Offset: 0x028 */
|
||||
unsigned int reserve5; /*!< Offset: 0x02C */
|
||||
unsigned int mair0; /*!< Offset: 0x030 (R/W) MPU Memory Attribute Indirection Register 0 */
|
||||
unsigned int mair1; /*!< Offset: 0x034 (R/W) MPU Memory Attribute Indirection Register 1 */
|
||||
unsigned int type; /* !< Offset: 0x000 (R/ ) MPU Type Register */
|
||||
unsigned int ctrl; /* !< Offset: 0x004 (R/W) MPU Control Register */
|
||||
unsigned int rnr; /* !< Offset: 0x008 (R/W) MPU Region RNRber Register */
|
||||
unsigned int rbar; /* !< Offset: 0x00C (R/W) MPU Region Base Address Register */
|
||||
unsigned int rlar; /* !< Offset: 0x010 (R/W) MPU Region Limit Address and Size Register */
|
||||
unsigned int rbar_a; /* !< Offset: 0x014 (R/W) MPU Alias 1 Region Base Address Register */
|
||||
unsigned int rlar_a; /* !< Offset: 0x018 (R/W) MPU Region Base Address Register */
|
||||
unsigned int reserve1; /* !< Offset: 0x01C */
|
||||
unsigned int reserve2; /* !< Offset: 0x020 */
|
||||
unsigned int reserve3; /* !< Offset: 0x024 */
|
||||
unsigned int reserve4; /* !< Offset: 0x028 */
|
||||
unsigned int reserve5; /* !< Offset: 0x02C */
|
||||
unsigned int mair0; /* !< Offset: 0x030 (R/W) MPU Memory Attribute Indirection Register 0 */
|
||||
unsigned int mair1; /* !< Offset: 0x034 (R/W) MPU Memory Attribute Indirection Register 1 */
|
||||
} MPU_t;
|
||||
|
||||
/* System Handler Control and State register */
|
||||
@@ -194,7 +194,7 @@ void debug_memory_access_err_check(unsigned long addr_start, unsigned long addr_
|
||||
unsigned int mode, unsigned int cacheable, unsigned int rnr);
|
||||
void mpu_init(void);
|
||||
|
||||
#else //STAR_MPU_ENABLE
|
||||
#else // STAR_MPU_ENABLE
|
||||
typedef struct {
|
||||
// MPU type register
|
||||
unsigned int type;
|
||||
@@ -367,7 +367,7 @@ typedef struct {
|
||||
void debug_memory_access_err_check(unsigned long addr_start, unsigned long addr_size, unsigned int mode);
|
||||
#endif
|
||||
|
||||
#endif //STAR_MPU_ENABLE
|
||||
#endif // STAR_MPU_ENABLE
|
||||
|
||||
#endif // MPU_H
|
||||
|
||||
|
||||
@@ -80,4 +80,4 @@ uint8_t lega_drv_wakeup_gpio_is_valid(uint8_t wakeup_gpio);
|
||||
*/
|
||||
void lega_drv_goto_deepsleep(uint32_t sleep_ms, uint8_t wakeup_gpio);
|
||||
|
||||
#endif //__PMU_H
|
||||
#endif // __PMU_H
|
||||
@@ -928,7 +928,7 @@ int printf2(const char *format, ...)
|
||||
#endif
|
||||
|
||||
#if 0
|
||||
//it's supported, but not used yet
|
||||
// it's supported, but not used yet
|
||||
int fctprintf(void (*out)(char character, void *arg), void *arg, const char *format, ...)
|
||||
{
|
||||
va_list va;
|
||||
|
||||
@@ -46,7 +46,7 @@ void printf_uart_register(uint8_t uart_idx)
|
||||
}
|
||||
#endif
|
||||
g_printf_uart = uart_idx;
|
||||
//printf("printf use uart %d\n",uart_idx);
|
||||
// printf("printf use uart %d\n",uart_idx);
|
||||
return;
|
||||
#if 0
|
||||
ERR:
|
||||
|
||||
@@ -31,9 +31,9 @@
|
||||
#include "duet_flash_kv.h"
|
||||
#include "lwip/inet.h"
|
||||
#ifdef HARMONYOS_TEMP
|
||||
//uint8_t wifi_ready = 0;
|
||||
//uint8_t ble_open = 0;
|
||||
//uint16_t ble_con_interval = 50;
|
||||
// uint8_t wifi_ready = 0;
|
||||
// uint8_t ble_open = 0;
|
||||
// uint16_t ble_con_interval = 50;
|
||||
#endif
|
||||
|
||||
typedef enum {
|
||||
@@ -148,10 +148,10 @@ int IsWifiActive(void)
|
||||
|
||||
typedef struct {
|
||||
uint8_t is_scan_adv;
|
||||
char ap_num; /**< The number of access points found in scanning. */
|
||||
char ap_num; /* *< The number of access points found in scanning. */
|
||||
struct {
|
||||
char ssid[32 + 1]; /*ssid max len:32. +1 is for '\0'. when ssidlen is 32 */
|
||||
char ap_power; /**< Signal strength, min:0, max:100. */
|
||||
char ssid[32 + 1]; /* ssid max len:32. +1 is for '\0'. when ssidlen is 32 */
|
||||
char ap_power; /* *< Signal strength, min:0, max:100. */
|
||||
char bssid[6]; /* The BSSID of an access point. */
|
||||
char channel; /* The RF frequency, 1-13 */
|
||||
uint8_t security; /* Security type, @ref wlan_sec_type_t */
|
||||
@@ -230,8 +230,8 @@ WifiErrorCode AdvanceScan(WifiScanParams *params)
|
||||
}
|
||||
|
||||
if ((params->scanType < WIFI_FREQ_SCAN) || (params->scanType > WIFI_BAND_SCAN)) {
|
||||
//return WIFI_SUCCESS;
|
||||
//adapter for xts
|
||||
// return WIFI_SUCCESS;
|
||||
// adapter for xts
|
||||
params->scanType = WIFI_BAND_SCAN;
|
||||
}
|
||||
|
||||
@@ -322,7 +322,7 @@ WifiErrorCode GetScanInfoList(WifiScanInfo *result, unsigned int *size)
|
||||
|
||||
uint8_t lega_wifi_device_config_flag_array[WIFI_MAX_CONFIG_SIZE] = {0};
|
||||
WifiDeviceConfig lega_wifi_device_config_array[WIFI_MAX_CONFIG_SIZE] = {0};
|
||||
//"wifi_device_config_flag_array" "wifi_device_config_array"
|
||||
// "wifi_device_config_flag_array" "wifi_device_config_array"
|
||||
WifiErrorCode AddDeviceConfig(const WifiDeviceConfig *config, int *result)
|
||||
{
|
||||
int i;
|
||||
@@ -348,7 +348,7 @@ WifiErrorCode AddDeviceConfig(const WifiDeviceConfig *config, int *result)
|
||||
|
||||
lega_wifi_device_config_flag_array[i] = 1;
|
||||
memcpy(&lega_wifi_device_config_array[i], config, sizeof(WifiDeviceConfig));
|
||||
//netID == 0, means invalid
|
||||
// netID == 0, means invalid
|
||||
lega_wifi_device_config_array[i].netId = i + 1;;
|
||||
*result = i + 1;
|
||||
|
||||
@@ -633,8 +633,8 @@ void wifi_event_cb(lega_wlan_event_e evt, void *info)
|
||||
}
|
||||
break;
|
||||
default:
|
||||
//lega_wifi_event_ptr->OnHotspotStaJoin
|
||||
//lega_wifi_event_ptr->OnHotspotStaLeave
|
||||
// lega_wifi_event_ptr->OnHotspotStaJoin
|
||||
// lega_wifi_event_ptr->OnHotspotStaLeave
|
||||
printf("WiFi HAL %s EVENT[%d] not implemeted yet!\r\n", __func__, evt);
|
||||
break;
|
||||
}
|
||||
@@ -699,7 +699,7 @@ WifiErrorCode DisableHotspot(void)
|
||||
lega_rtos_init_semaphore(&lega_wlan_vendor_close_ap_semaphore, 0);
|
||||
lega_wlan_close();
|
||||
if (lega_rtos_get_semaphore(&lega_wlan_vendor_close_ap_semaphore, LEGA_NEVER_TIMEOUT)) {
|
||||
//MS_LOGI("%s timeout\n",__FUNCTION__);
|
||||
// MS_LOGI("%s timeout\n",__FUNCTION__);
|
||||
}
|
||||
lega_rtos_deinit_semaphore(&lega_wlan_vendor_close_ap_semaphore);
|
||||
lega_wlan_vendor_close_ap_semaphore = 0;
|
||||
|
||||
@@ -51,7 +51,7 @@ OSBool lega_rtos_is_in_interrupt_context(void)
|
||||
{
|
||||
unsigned int state = 0;
|
||||
|
||||
state = (*(unsigned int *) CM4_ICSR) & 0x3FF; //bit0:9 is IRQ NO.
|
||||
state = (*(unsigned int *) CM4_ICSR) & 0x3FF; // bit0:9 is IRQ NO.
|
||||
|
||||
if (state != 0) {
|
||||
return TRUE;
|
||||
@@ -88,8 +88,8 @@ OSStatus lega_rtos_task_cfg_get(uint32_t index, lega_task_config_t *cfg)
|
||||
* output param: thread
|
||||
* return: OSSatus value
|
||||
*******************************************************************/
|
||||
OSStatus lega_rtos_create_thread( lega_thread_t *thread, uint8_t priority, const char *name,
|
||||
lega_thread_function_t function, uint32_t stack_size, lega_thread_arg_t arg )
|
||||
OSStatus lega_rtos_create_thread(lega_thread_t *thread, uint8_t priority, const char *name,
|
||||
lega_thread_function_t function, uint32_t stack_size, lega_thread_arg_t arg)
|
||||
{
|
||||
uint8_t autorun = 1;
|
||||
osThreadAttr_t attr = {0};
|
||||
@@ -106,7 +106,7 @@ OSStatus lega_rtos_create_thread( lega_thread_t *thread, uint8_t priority, const
|
||||
attr.cb_size = 0U;
|
||||
attr.stack_mem = NULL;
|
||||
attr.stack_size = stack_size;
|
||||
//here should add bound check!
|
||||
// here should add bound check!
|
||||
attr.priority = priority;
|
||||
if (autorun == 1) {
|
||||
threadId = osThreadNew((osThreadFunc_t)function, (void *)arg, &attr);
|
||||
@@ -126,7 +126,7 @@ OSStatus lega_rtos_create_thread( lega_thread_t *thread, uint8_t priority, const
|
||||
* output param: none
|
||||
* return: OSStatus
|
||||
*******************************************************************/
|
||||
OSStatus lega_rtos_delete_thread( lega_thread_t *thread )
|
||||
OSStatus lega_rtos_delete_thread(lega_thread_t *thread)
|
||||
{
|
||||
osThreadId_t threadId;
|
||||
if (thread == NULL) {
|
||||
@@ -154,7 +154,7 @@ OSStatus lega_rtos_delete_thread( lega_thread_t *thread )
|
||||
* output param: lega_semaphore_t* semaphore
|
||||
* return: kNoErr or kGeneralErr;
|
||||
*******************************************************************/
|
||||
OSStatus lega_rtos_init_semaphore( lega_semaphore_t *semaphore, int count )
|
||||
OSStatus lega_rtos_init_semaphore(lega_semaphore_t *semaphore, int count)
|
||||
{
|
||||
osSemaphoreId_t semId;
|
||||
|
||||
@@ -174,7 +174,7 @@ OSStatus lega_rtos_init_semaphore( lega_semaphore_t *semaphore, int count )
|
||||
* output param: semaphore
|
||||
* return: kNoErr or kGeneralErr
|
||||
*******************************************************************/
|
||||
OSStatus lega_rtos_get_semaphore( lega_semaphore_t *semaphore, uint32_t timeout_ms )
|
||||
OSStatus lega_rtos_get_semaphore(lega_semaphore_t *semaphore, uint32_t timeout_ms)
|
||||
{
|
||||
osStatus_t ret;
|
||||
|
||||
@@ -187,7 +187,7 @@ OSStatus lega_rtos_get_semaphore( lega_semaphore_t *semaphore, uint32_t timeout_
|
||||
return kNoErr;
|
||||
}
|
||||
|
||||
FLASH_COMMON2_SEG OSStatus lega_rtos_set_semaphore( lega_semaphore_t *semaphore )
|
||||
FLASH_COMMON2_SEG OSStatus lega_rtos_set_semaphore(lega_semaphore_t *semaphore)
|
||||
{
|
||||
osStatus_t ret;
|
||||
|
||||
@@ -200,7 +200,7 @@ FLASH_COMMON2_SEG OSStatus lega_rtos_set_semaphore( lega_semaphore_t *semaphore
|
||||
return kNoErr;
|
||||
}
|
||||
|
||||
OSStatus lega_rtos_deinit_semaphore( lega_semaphore_t *semaphore )
|
||||
OSStatus lega_rtos_deinit_semaphore(lega_semaphore_t *semaphore)
|
||||
{
|
||||
osStatus_t ret;
|
||||
|
||||
@@ -213,7 +213,7 @@ OSStatus lega_rtos_deinit_semaphore( lega_semaphore_t *semaphore )
|
||||
return kNoErr;
|
||||
}
|
||||
|
||||
OSBool lega_rtos_semaphore_pending_task_null( lega_semaphore_t *semaphore )
|
||||
OSBool lega_rtos_semaphore_pending_task_null(lega_semaphore_t *semaphore)
|
||||
{
|
||||
osStatus_t ret;
|
||||
|
||||
@@ -225,7 +225,7 @@ OSBool lega_rtos_semaphore_pending_task_null( lega_semaphore_t *semaphore )
|
||||
}
|
||||
}
|
||||
|
||||
OSStatus lega_rtos_init_mutex( lega_mutex_t *mutex )
|
||||
OSStatus lega_rtos_init_mutex(lega_mutex_t *mutex)
|
||||
{
|
||||
osMutexId_t mutexId;
|
||||
mutexId = osMutexNew(0);
|
||||
@@ -238,7 +238,7 @@ OSStatus lega_rtos_init_mutex( lega_mutex_t *mutex )
|
||||
return kNoErr;
|
||||
}
|
||||
|
||||
OSStatus lega_rtos_lock_mutex( lega_mutex_t *mutex, uint32_t timeout_ms )
|
||||
OSStatus lega_rtos_lock_mutex(lega_mutex_t *mutex, uint32_t timeout_ms)
|
||||
{
|
||||
osStatus_t ret;
|
||||
|
||||
@@ -251,7 +251,7 @@ OSStatus lega_rtos_lock_mutex( lega_mutex_t *mutex, uint32_t timeout_ms )
|
||||
return kNoErr;
|
||||
}
|
||||
|
||||
OSStatus lega_rtos_unlock_mutex( lega_mutex_t *mutex )
|
||||
OSStatus lega_rtos_unlock_mutex(lega_mutex_t *mutex)
|
||||
{
|
||||
osStatus_t ret;
|
||||
|
||||
@@ -264,7 +264,7 @@ OSStatus lega_rtos_unlock_mutex( lega_mutex_t *mutex )
|
||||
return kNoErr;
|
||||
}
|
||||
|
||||
OSStatus lega_rtos_deinit_mutex( lega_mutex_t *mutex )
|
||||
OSStatus lega_rtos_deinit_mutex(lega_mutex_t *mutex)
|
||||
{
|
||||
osStatus_t ret;
|
||||
|
||||
@@ -278,8 +278,8 @@ OSStatus lega_rtos_deinit_mutex( lega_mutex_t *mutex )
|
||||
return kNoErr;
|
||||
}
|
||||
|
||||
OSStatus lega_rtos_init_queue( lega_queue_t *queue, const char *name, uint32_t message_size,
|
||||
uint32_t number_of_messages )
|
||||
OSStatus lega_rtos_init_queue(lega_queue_t *queue, const char *name, uint32_t message_size,
|
||||
uint32_t number_of_messages)
|
||||
{
|
||||
osMessageQueueId_t queId;
|
||||
|
||||
@@ -294,7 +294,7 @@ OSStatus lega_rtos_init_queue( lega_queue_t *queue, const char *name, uint32_t m
|
||||
return kNoErr;
|
||||
}
|
||||
|
||||
OSStatus lega_rtos_push_to_queue( lega_queue_t *queue, void *message, uint32_t timeout_ms )
|
||||
OSStatus lega_rtos_push_to_queue(lega_queue_t *queue, void *message, uint32_t timeout_ms)
|
||||
{
|
||||
osStatus_t ret;
|
||||
|
||||
@@ -311,7 +311,7 @@ OSStatus lega_rtos_push_to_queue( lega_queue_t *queue, void *message, uint32_t t
|
||||
return kNoErr;
|
||||
}
|
||||
|
||||
OSStatus lega_rtos_pop_from_queue( lega_queue_t *queue, void *message, uint32_t timeout_ms )
|
||||
OSStatus lega_rtos_pop_from_queue(lega_queue_t *queue, void *message, uint32_t timeout_ms)
|
||||
{
|
||||
osStatus_t ret;
|
||||
|
||||
@@ -326,7 +326,7 @@ OSStatus lega_rtos_pop_from_queue( lega_queue_t *queue, void *message, uint32_t
|
||||
return kNoErr;
|
||||
}
|
||||
|
||||
OSStatus lega_rtos_deinit_queue( lega_queue_t *queue )
|
||||
OSStatus lega_rtos_deinit_queue(lega_queue_t *queue)
|
||||
{
|
||||
osStatus_t ret;
|
||||
|
||||
@@ -339,7 +339,7 @@ OSStatus lega_rtos_deinit_queue( lega_queue_t *queue )
|
||||
return kNoErr;
|
||||
}
|
||||
|
||||
OSBool lega_rtos_is_queue_empty( lega_queue_t *queue )
|
||||
OSBool lega_rtos_is_queue_empty(lega_queue_t *queue)
|
||||
{
|
||||
OSBool ret;
|
||||
lega_rtos_declare_critical();
|
||||
@@ -361,7 +361,7 @@ OSBool lega_rtos_is_queue_empty( lega_queue_t *queue )
|
||||
return ret;
|
||||
}
|
||||
|
||||
OSBool lega_rtos_is_queue_full( lega_queue_t *queue )
|
||||
OSBool lega_rtos_is_queue_full(lega_queue_t *queue)
|
||||
{
|
||||
OSBool ret;
|
||||
lega_rtos_declare_critical();
|
||||
@@ -399,7 +399,7 @@ uint32_t lega_rtos_ms_to_ticks(uint32_t ms)
|
||||
}
|
||||
|
||||
#if 1
|
||||
OSStatus lega_rtos_init_timer( lega_timer_t *timer, uint32_t time_ms, timer_handler_t function, void *arg)
|
||||
OSStatus lega_rtos_init_timer(lega_timer_t *timer, uint32_t time_ms, timer_handler_t function, void *arg)
|
||||
{
|
||||
timer->function = function;
|
||||
timer->arg = arg;
|
||||
@@ -417,8 +417,8 @@ OSStatus lega_rtos_init_timer( lega_timer_t *timer, uint32_t time_ms, timer_hand
|
||||
return kNoErr;
|
||||
}
|
||||
#else
|
||||
OSStatus lega_rtos_init_timer_name( lega_timer_t *timer, uint32_t time_ms, timer_handler_t function, void *arg,
|
||||
uint8_t *name)
|
||||
OSStatus lega_rtos_init_timer_name(lega_timer_t *timer, uint32_t time_ms, timer_handler_t function, void *arg,
|
||||
uint8_t *name)
|
||||
{
|
||||
if (!timer) {
|
||||
printf("%s %s timer err\n", __FUNCTION__, name);
|
||||
@@ -445,7 +445,7 @@ OSStatus lega_rtos_init_timer_name( lega_timer_t *timer, uint32_t time_ms, timer
|
||||
}
|
||||
#endif
|
||||
|
||||
OSStatus lega_rtos_start_timer( lega_timer_t *timer )
|
||||
OSStatus lega_rtos_start_timer(lega_timer_t *timer)
|
||||
{
|
||||
if (!timer) {
|
||||
printf("%s timer err\n", __FUNCTION__);
|
||||
@@ -458,21 +458,21 @@ OSStatus lega_rtos_start_timer( lega_timer_t *timer )
|
||||
return kGeneralErr;
|
||||
}
|
||||
|
||||
OSStatus lega_rtos_stop_timer( lega_timer_t *timer )
|
||||
OSStatus lega_rtos_stop_timer(lega_timer_t *timer)
|
||||
{
|
||||
if (!timer) {
|
||||
printf("%s timer err\n", __FUNCTION__);
|
||||
return kGeneralErr;
|
||||
}
|
||||
if (KalTimerStop((KalTimerId)(timer->handle)) == KAL_OK) {
|
||||
//printf("rtos_stop_timer\r\n");
|
||||
// printf("rtos_stop_timer\r\n");
|
||||
return kNoErr;
|
||||
}
|
||||
|
||||
return kGeneralErr;
|
||||
}
|
||||
|
||||
OSStatus lega_rtos_reload_timer( lega_timer_t *timer )
|
||||
OSStatus lega_rtos_reload_timer(lega_timer_t *timer)
|
||||
{
|
||||
if (!timer) {
|
||||
printf("%s timer err\n", __FUNCTION__);
|
||||
@@ -491,7 +491,7 @@ OSStatus lega_rtos_reload_timer( lega_timer_t *timer )
|
||||
return kNoErr;
|
||||
}
|
||||
|
||||
OSStatus lega_rtos_deinit_timer( lega_timer_t *timer )
|
||||
OSStatus lega_rtos_deinit_timer(lega_timer_t *timer)
|
||||
{
|
||||
if (!timer) {
|
||||
printf("%s timer err\n", __FUNCTION__);
|
||||
@@ -511,7 +511,7 @@ OSStatus lega_rtos_deinit_timer( lega_timer_t *timer )
|
||||
return kGeneralErr;
|
||||
}
|
||||
|
||||
OSBool lega_rtos_is_timer_running( lega_timer_t *timer )
|
||||
OSBool lega_rtos_is_timer_running(lega_timer_t *timer)
|
||||
{
|
||||
if (!timer) {
|
||||
printf("%s timer err\n", __FUNCTION__);
|
||||
@@ -538,7 +538,7 @@ uint32_t lega_rtos_ticks_to_ms(uint32_t ticks)
|
||||
return time;
|
||||
}
|
||||
|
||||
uint32_t lega_rtos_get_time( void )
|
||||
uint32_t lega_rtos_get_time(void)
|
||||
{
|
||||
return (uint32_t)lega_rtos_ticks_to_ms((unsigned int)osKernelGetTickCount());
|
||||
}
|
||||
@@ -548,7 +548,7 @@ uint32_t lega_rtos_get_system_ticks(void)
|
||||
return (uint32_t)osKernelGetTickCount();
|
||||
}
|
||||
|
||||
OSStatus lega_rtos_delay_milliseconds( uint32_t num_ms )
|
||||
OSStatus lega_rtos_delay_milliseconds(uint32_t num_ms)
|
||||
{
|
||||
uint32_t ticks;
|
||||
|
||||
@@ -572,7 +572,7 @@ void *_lega_rtos_malloc(uint32_t xWantedSize, const char *function, uint32_t lin
|
||||
lega_malloc_cnt++;
|
||||
} else {
|
||||
if (size_cache != 0) {
|
||||
printf("rtos malloc %d fail %s:%d\r\n", (unsigned int)xWantedSize, function, (unsigned int)line);
|
||||
printf("rtos malloc %u fail %s:%u\r\n", (unsigned int)xWantedSize, function, (unsigned int)line);
|
||||
}
|
||||
}
|
||||
while (size_cache) {
|
||||
@@ -609,12 +609,12 @@ void lega_rtos_realloc(void *mem, uint32_t xWantedSize)
|
||||
return;
|
||||
}
|
||||
|
||||
void *pvPortMalloc( uint32_t xWantedSize )
|
||||
void *pvPortMalloc(uint32_t xWantedSize)
|
||||
{
|
||||
return lega_rtos_malloc(xWantedSize);
|
||||
}
|
||||
|
||||
void vPortFree( void *pv )
|
||||
void vPortFree(void *pv)
|
||||
{
|
||||
lega_rtos_free(pv);
|
||||
}
|
||||
@@ -626,7 +626,7 @@ void vPortFree( void *pv )
|
||||
* output param: none
|
||||
* return:none
|
||||
*******************************************************************/
|
||||
lega_cpsr_t _lega_rtos_enter_critical( void )
|
||||
lega_cpsr_t _lega_rtos_enter_critical(void)
|
||||
{
|
||||
lega_cpsr_t cpsr_save = LOS_IntLock();
|
||||
return cpsr_save;
|
||||
@@ -639,9 +639,9 @@ lega_cpsr_t _lega_rtos_enter_critical( void )
|
||||
* output param:none
|
||||
* return:none
|
||||
*******************************************************************/
|
||||
void _lega_rtos_exit_critical( lega_cpsr_t cpsr_store)
|
||||
void _lega_rtos_exit_critical(lega_cpsr_t cpsr_store)
|
||||
{
|
||||
LOS_IntRestore( cpsr_store );
|
||||
LOS_IntRestore(cpsr_store);
|
||||
}
|
||||
|
||||
void lega_intrpt_enter(void)
|
||||
|
||||
@@ -54,7 +54,7 @@
|
||||
#define LEGA_UWIFI_RX_TASK_PRIORITY (28)
|
||||
#define LEGA_UWIFI_TASK_PRIORITY (26)
|
||||
#define LEGA_BLE_SCHEDULER_PRIORITY (29) // for testing
|
||||
#endif //ALIOS_SUPPORT
|
||||
#endif // ALIOS_SUPPORT
|
||||
|
||||
#ifdef ALIOS_SUPPORT
|
||||
#define CONFIG_KV_BUFFER_SIZE KV_CONFIG_TOTAL_SIZE
|
||||
@@ -62,7 +62,7 @@
|
||||
#define CONFIG_KV_BUFFER_SIZE 0x8000
|
||||
#else
|
||||
#define CONFIG_KV_BUFFER_SIZE 0
|
||||
#endif //ALIOS_SUPPORT
|
||||
#endif // ALIOS_SUPPORT
|
||||
|
||||
#define lega_cpsr_t UINTPTR
|
||||
#define MS_PER_SECONED 1000
|
||||
@@ -500,4 +500,4 @@ void lega_rtos_systick_reconfig(void);
|
||||
int lega_rtos_running(void);
|
||||
OSStatus lega_rtos_get_threadinfo(lega_thread_t *thread, lega_threadinfo_t *info);
|
||||
|
||||
#endif //__LEGARTOS_H__
|
||||
#endif // __LEGARTOS_H__
|
||||
@@ -18,4 +18,4 @@
|
||||
|
||||
#include "los_arch_context.h"
|
||||
|
||||
#endif //__LEGA_RTOS_PORT_H__
|
||||
#endif // __LEGA_RTOS_PORT_H__
|
||||
@@ -23,4 +23,4 @@
|
||||
UINT32 LOS_SemPendingNoTask(UINT32 semHandle);
|
||||
osStatus_t osSemaphorePendingNoTask(osSemaphoreId_t semaphore_id);
|
||||
|
||||
#endif //__LITEOS_PATCH_H__
|
||||
#endif // __LITEOS_PATCH_H__
|
||||
@@ -55,7 +55,7 @@ extern void UART2_IRQHandler(void);
|
||||
extern void GPIO_IRQHandler(void);
|
||||
void NVIC_init(void)
|
||||
{
|
||||
//set irq priority, default set configLIBRARY_NORMAL_INTERRUPT_PRIORITY
|
||||
// set irq priority, default set configLIBRARY_NORMAL_INTERRUPT_PRIORITY
|
||||
/*
|
||||
NVIC_SetPriority(UART0_IRQn,configLIBRARY_NORMAL_INTERRUPT_PRIORITY);
|
||||
NVIC_SetPriority(UART1_IRQn,configLIBRARY_NORMAL_INTERRUPT_PRIORITY);
|
||||
@@ -96,7 +96,7 @@ void NVIC_init(void)
|
||||
|
||||
void NVIC_deinit(void)
|
||||
{
|
||||
//disable NVIC irq before kernel reloc IRQ interface
|
||||
// disable NVIC irq before kernel reloc IRQ interface
|
||||
NVIC_DisableIRQ(CEVA_RW_IP_IRQn);
|
||||
NVIC_DisableIRQ(D_APLL_UNLOCK_IRQn);
|
||||
NVIC_DisableIRQ(D_SX_UNLOCK_IRQn);
|
||||
@@ -114,16 +114,16 @@ void os_post_init_hook(void)
|
||||
{
|
||||
lega_rtos_declare_critical();
|
||||
lega_rtos_enter_critical();
|
||||
*(volatile UINT32 *)OS_NVIC_CCR &= ~(UNALIGNFAULT); //allow unalign access
|
||||
*(volatile UINT32 *)OS_NVIC_CCR &= ~(UNALIGNFAULT); // allow unalign access
|
||||
lega_rtos_exit_critical();
|
||||
}
|
||||
|
||||
//static duet_uart_dev_t uart_config_struct = {0};
|
||||
// static duet_uart_dev_t uart_config_struct = {0};
|
||||
uart_dev_t uart_0;
|
||||
void board_uart_init(void)
|
||||
{
|
||||
#if (LOSCFG_USE_SHELL == 1)
|
||||
uart_0.port = PORT_UART_STD; /*logic port*/
|
||||
uart_0.port = PORT_UART_STD; /* logic port */
|
||||
uart_0.config.baud_rate = UART_BAUDRATE_115200;
|
||||
uart_0.config.data_width = DATA_8BIT;
|
||||
uart_0.config.flow_control = FLOW_CTRL_DISABLED;
|
||||
@@ -138,10 +138,10 @@ void board_uart_init(void)
|
||||
duet_uart_struct_init(&uart_config_struct);
|
||||
uart_config_struct.port = UART1_INDEX;
|
||||
uart_config_struct.priv = at_handle_uartirq;
|
||||
//set user define config
|
||||
// set user define config
|
||||
uart_config_struct.config.baud_rate = UART_BAUDRATE_115200;
|
||||
uart_config_struct.config.flow_control = FLOW_CTRL_DISABLED;
|
||||
//make config take effect
|
||||
// make config take effect
|
||||
duet_uart_init(&uart_config_struct);
|
||||
#endif
|
||||
printf_uart_register(UART1_INDEX);
|
||||
@@ -166,7 +166,7 @@ void lega_devInit()
|
||||
lega_drv_rco_cal();
|
||||
#endif
|
||||
|
||||
//init uart
|
||||
// init uart
|
||||
board_uart_init();
|
||||
|
||||
#if (LOSCFG_USE_SHELL == 1)
|
||||
@@ -186,13 +186,13 @@ void lega_devInit()
|
||||
duet_recovery_phy_fsm_config();
|
||||
#endif
|
||||
#ifdef CFG_MIMO_UF
|
||||
//config to support smartconfig in MIMO scenario
|
||||
//lega_wlan_smartconfig_mimo_enable();
|
||||
// config to support smartconfig in MIMO scenario
|
||||
// lega_wlan_smartconfig_mimo_enable();
|
||||
#endif
|
||||
|
||||
#ifdef CFG_TMMT_DETECT
|
||||
//config to enable temperature compensation
|
||||
//lega_wlan_enable_tmmt_compensation(60);
|
||||
// config to enable temperature compensation
|
||||
// lega_wlan_enable_tmmt_compensation(60);
|
||||
#endif
|
||||
#ifdef SECURITY_ENGINE_INIT
|
||||
lega_security_engine_init();
|
||||
@@ -222,9 +222,9 @@ void board_before_init(void)
|
||||
|
||||
#ifdef WIFI_BLE_INIT_ENABLE
|
||||
lega_reset_rw_rf();
|
||||
//turn off all wifi/ble clock
|
||||
// turn off all wifi/ble clock
|
||||
lega_soc_wifi_ble_clk_disable();
|
||||
//enable all soc interrupt
|
||||
// enable all soc interrupt
|
||||
lega_enable_all_soc_interrupt();
|
||||
#endif
|
||||
}
|
||||
@@ -236,7 +236,7 @@ int board_after_init(void)
|
||||
{
|
||||
lega_devInit();
|
||||
#ifdef MS_RELEASE_DOMAIN
|
||||
//LOG("log_disable");
|
||||
// LOG("log_disable");
|
||||
lega_log_disable();
|
||||
#endif
|
||||
#ifdef WIFI_BLE_INIT_ENABLE
|
||||
|
||||
@@ -33,4 +33,4 @@ int board_after_init(void);
|
||||
void board_uart_init(void);
|
||||
void NVIC_deinit(void);
|
||||
|
||||
#endif //__BOARD_H__
|
||||
#endif // __BOARD_H__
|
||||
@@ -25,8 +25,8 @@
|
||||
#ifndef _DUET_VERSION_H_
|
||||
#define _DUET_VERSION_H_
|
||||
|
||||
//ASR release version
|
||||
// ASR release version
|
||||
#define LEGA_VERSION_STR "APP-V1.3.2-OHS"
|
||||
|
||||
#endif //_DUET_VERSION_H_
|
||||
#endif // _DUET_VERSION_H_
|
||||
|
||||
|
||||
@@ -57,25 +57,25 @@ static void sys_init(void)
|
||||
os_post_init_hook();
|
||||
|
||||
#ifdef MS_RELEASE_DOMAIN
|
||||
//LOG("log_disable");
|
||||
// LOG("log_disable");
|
||||
lega_log_disable();
|
||||
#endif
|
||||
|
||||
duet_flash_kv_init();
|
||||
|
||||
board_after_init();
|
||||
//debug_memory_access_err_check(0x0, 0x10000, MPU_AP_NA_NA);
|
||||
// debug_memory_access_err_check(0x0, 0x10000, MPU_AP_NA_NA);
|
||||
|
||||
#ifdef SYSTEM_COREDUMP
|
||||
//coredump_command_register(0, NULL);
|
||||
// coredump_command_register(0, NULL);
|
||||
#endif
|
||||
|
||||
#ifdef CFG_DUAL_AP
|
||||
comm_wifi_command_register(0, NULL);
|
||||
#endif
|
||||
|
||||
//lega_at_init(AT_TASK_NAME,AT_TASK_PRIORITY,AT_TASK_STACK_SIZE);
|
||||
//lega_at_cmd_register_all();
|
||||
// lega_at_init(AT_TASK_NAME,AT_TASK_PRIORITY,AT_TASK_STACK_SIZE);
|
||||
// lega_at_cmd_register_all();
|
||||
lega_at_user_cmd_register();
|
||||
|
||||
#ifdef BLE_APP_AT_CMD
|
||||
|
||||
@@ -56,7 +56,7 @@ defined in linker script */
|
||||
.type Reset_Handler, %function
|
||||
Reset_Handler:
|
||||
|
||||
/*Set memory map*/
|
||||
/* Set memory map */
|
||||
movs r1, #0x18
|
||||
movs r2, #0x40000000
|
||||
str r1, [r2,#0x2C]
|
||||
@@ -104,11 +104,11 @@ LoopFillZerobss:
|
||||
cmp r2, r3
|
||||
bcc FillZerobss
|
||||
|
||||
/* Call the clock system intitialization function.*/
|
||||
/* Call the clock system intitialization function. */
|
||||
bl SystemInit
|
||||
/* Call static constructors */
|
||||
/* bl __libc_init_array */
|
||||
/* Call the application's entry point.*/
|
||||
/* Call the application's entry point. */
|
||||
bl main
|
||||
bx lr
|
||||
.size Reset_Handler, .-Reset_Handler
|
||||
@@ -178,7 +178,7 @@ g_pfnVectors:
|
||||
.word AUX_ADC_IRQHandler /* AUX ADC Interrupt */
|
||||
.word 0x00000000
|
||||
.word 0x00000000
|
||||
.word PLATFORM_WAKEUP_IRQHandler /*!< WiFi SOC Wake-Up Interrupt */
|
||||
.word PLATFORM_WAKEUP_IRQHandler /* !< WiFi SOC Wake-Up Interrupt */
|
||||
.word I2S_IRQHandler /* I2S */
|
||||
.word BLE_IRQHandler /* BLE Interrupt */
|
||||
|
||||
|
||||
Reference in New Issue
Block a user