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!38 hdf驱动测试整改

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Merge pull request !38 from Laowang-BearPi/master
This commit is contained in:
openharmony_sig_ci
2022-03-28 14:30:13 +00:00
committed by Gitee
parent f096dc3f27 3a2b561de5
commit d8face2caf
7 changed files with 71 additions and 97 deletions
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common/platform/gpio/stm32mp1_gpio.c
+1 -2
View File
@@ -278,7 +278,6 @@ static int32_t Mp1xxGpioSetIrq(struct GpioCntlr *cntlr, uint16_t gpio, uint16_t
{
int32_t ret = HDF_SUCCESS;
struct GpioGroup *group = NULL;
(void)mode;
unsigned int bitNum = Mp1xxToBitNum(gpio);
ret = Mp1xxGetGroupByGpioNum(cntlr, gpio, &group);
@@ -295,7 +294,7 @@ static int32_t Mp1xxGpioSetIrq(struct GpioCntlr *cntlr, uint16_t gpio, uint16_t
EXTI_HandleTypeDef hexti;
EXTI_ConfigStructure.Line = EXTI_GPIO | EXTI_EVENT | EXTI_REG1 |bitNum;
EXTI_ConfigStructure.Trigger = EXTI_TRIGGER_FALLING;
EXTI_ConfigStructure.Trigger = mode;
EXTI_ConfigStructure.GPIOSel = Mp1xxToGroupNum(gpio);
EXTI_ConfigStructure.Mode = EXTI_MODE_C1_INTERRUPT;
common/platform/iwdg/stm32mp1_iwdg.c
+1 -64
View File
@@ -126,10 +126,6 @@ struct Mp1xxIwdg {
uint32_t rate; // 时钟源频率
char *clock_source; // 时钟源名称
bool auto_feed; // 是否自动喂狗
uint32_t auto_feed_period; // 自动喂狗周期
OSAL_DECLARE_THREAD(feed_dog_thread); // 喂狗线程
uint32_t min_timeout; // 最小超时时间
uint32_t max_hw_heartbeat_ms; // 最大超时时间
};
@@ -207,7 +203,7 @@ int32_t Mp1xxIwdgStart(struct WatchdogCntlr *wdt)
// 等待状态寄存器 SR_PVU | SR_RVU 复位
while ((iwdg_sr = Mp1xxIwdgGetSr(iwdg)) & (SR_PVU | SR_RVU))
{
OsalMDelay(10);
// OsalMSleep(10);
if(!(--i)) {
HDF_LOGE("Fail to set prescaler, reload regs.");
return HDF_FAILURE;
@@ -331,49 +327,6 @@ static struct WatchdogMethod g_stm32mp1_iwdg_ops = {
.stop = NULL
};
static int Mp1xxIwdgFeedTaskFunc(void *arg)
{
// auto feed dog task
struct WatchdogCntlr *wdt = (struct WatchdogCntlr *)arg;
struct Mp1xxIwdg *iwdg = (struct Mp1xxIwdg *)wdt->priv;
while (1)
{
if (iwdg->start) {
Mp1xxIwdgFeed(wdt);
}
OsalSleep(iwdg->auto_feed_period);
}
return 0;
}
// create timer for auto feed
static int32_t Mp1xxIwdgCreateFeedDogTask(struct WatchdogCntlr *wdt)
{
#define TASK_NAME_SIZE (16)
int32_t ret;
struct Mp1xxIwdg *iwdg = (struct Mp1xxIwdg *)wdt->priv;
struct OsalThreadParam param = {0};
char task_name[TASK_NAME_SIZE] = {0};
// create thread
ret = OsalThreadCreate(&(iwdg->feed_dog_thread), (OsalThreadEntry)Mp1xxIwdgFeedTaskFunc, (void *)wdt);
if (ret != HDF_SUCCESS) {
HDF_LOGE("OsalThreadCreate fail, ret : %#x.\r\n", ret);
return HDF_FAILURE;
}
// get task name
snprintf_s(task_name, TASK_NAME_SIZE, TASK_NAME_SIZE - 1, "iwdg%d_auto_feed", iwdg->num);
param.priority = OSAL_THREAD_PRI_DEFAULT;
param.stackSize = DEFAULT_TASK_STACK_SIZE;
param.name = task_name;
return OsalThreadStart(&(iwdg->feed_dog_thread), &param);
}
static int32_t Mp1xxIwdgReadDrs(struct Mp1xxIwdg *iwdg, const struct DeviceResourceNode *node)
{
int32_t ret;
@@ -423,14 +376,6 @@ static int32_t Mp1xxIwdgReadDrs(struct Mp1xxIwdg *iwdg, const struct DeviceResou
// start
iwdg->start = drsOps->GetBool(node, "start");
// auto_feed
iwdg->auto_feed = drsOps->GetBool(node, "auto_feed");
// auto_feed_period
ret = drsOps->GetUint32(node, "auto_feed_period", &iwdg->auto_feed_period, 10);
if (ret != HDF_SUCCESS) {
HDF_LOGE("%s: read auto_feed_period fail!", __func__);
}
return HDF_SUCCESS;
}
@@ -513,14 +458,6 @@ static int32_t Mp1xxIwdgInit(struct HdfDeviceObject *device)
return HDF_FAILURE;
}
// if need aotu feed, create a task
if (iwdg->auto_feed) {
ret = Mp1xxIwdgCreateFeedDogTask(wdt);
if (ret != HDF_SUCCESS) {
HDF_LOGE("Mp1xxIwdgCreateFeedDogTask fail, ret : %#x.", ret);
}
}
return HDF_SUCCESS;
}
common/platform/uart/stm32mp1_uart.c
+25 -18
View File
@@ -134,8 +134,6 @@ static inline int32_t Mp1xxUartGetClock(struct Mp1xxUart *uart)
otherwise, use the default clock rate
*/
if (uart->clock_source != NULL) {
// get clock source real rate.
// ...
ret = HDF_SUCCESS;
}
@@ -312,14 +310,19 @@ stm32mp1_uart_write_out:
OsalSpinUnlock(&(uart->lock));
return send_size;
return ret;
}
static int32_t Mp1xxUartGetBaud(struct UartHost *host, uint32_t *baudRate)
{
int32_t ret = HDF_SUCCESS;
struct Mp1xxUart *uart = (struct Mp1xxUart *)host->priv;
struct Mp1xxUart *uart =NULL;
if (host == NULL || host->priv == NULL || baudRate == NULL) {
HDF_LOGE("%s: invalid parameter", __func__);
return HDF_ERR_INVALID_PARAM;
}
uart = (struct Mp1xxUart *)host->priv;
OsalSpinLock(&(uart->lock));
if (uart->state != UART_STATE_USEABLE) {
@@ -371,8 +374,14 @@ stm32mp1_uart_set_baud_out:
static int32_t Mp1xxUartGetAttribute(struct UartHost *host, struct UartAttribute *attribute)
{
int32_t ret = HDF_SUCCESS;
struct Mp1xxUart *uart = (struct Mp1xxUart *)host->priv;
struct UartAttribute *attr = (struct UartAttribute *)uart->priv;
struct Mp1xxUart *uart = NULL;
struct UartAttribute *attr = NULL;
if (host == NULL || host->priv == NULL || attribute == NULL) {
HDF_LOGE("%s: invalid parameter", __func__);
return HDF_ERR_INVALID_PARAM;
}
uart = (struct Mp1xxUart *)host->priv;
attr = (struct UartAttribute *)uart->priv;
OsalSpinLock(&(uart->lock));
@@ -386,25 +395,23 @@ static int32_t Mp1xxUartGetAttribute(struct UartHost *host, struct UartAttribute
static int32_t Mp1xxUartSetAttribute(struct UartHost *host, struct UartAttribute *attribute)
{
int32_t ret = HDF_SUCCESS;
struct Mp1xxUart *uart = (struct Mp1xxUart *)host->priv;
struct UartAttribute *attr = (struct UartAttribute *)uart->priv;
struct Mp1xxUart *uart = NULL;
struct UartAttribute *attr = NULL;
if (host == NULL || host->priv == NULL || attribute == NULL) {
HDF_LOGE("%s: invalid parameter", __func__);
return HDF_ERR_INVALID_PARAM;
}
uart = (struct Mp1xxUart *)host->priv;
attr = (struct UartAttribute *)uart->priv;
OsalSpinLock(&(uart->lock));
// 1. check attr
if (attribute->dataBits != UART_ATTR_DATABIT_8 || attribute->stopBits != UART_ATTR_STOPBIT_1) {
HDF_LOGE("%s: unsupport databits or stopbit.\r\n", __func__);
ret = HDF_FAILURE;
goto stm32mp1_uart_set_attribute_out;
}
// 保存新配置
memcpy_s(attr, sizeof(struct UartAttribute), attribute, sizeof(struct UartAttribute));
// 根据新配置，更新寄存器
ret = stm32mp1_uart_config(uart);
stm32mp1_uart_set_attribute_out:
dprintf("%s--------%d\r\n",__func__,ret);
OsalSpinUnlock(&(uart->lock));
return ret;
}
common/platform/uart/stm32mp1_uart_hw.c
+4 -1
View File
@@ -179,7 +179,10 @@ int32_t Mp1xxUartHwDataBits(struct Mp1xxUart *uart, uint32_t bits)
switch (bits) {
case UART_HW_DATABIT_8:
// val = val;
val |= USART_CR1_WL_8B;
break;
case UART_HW_DATABIT_7:
val |= USART_CR1_WL_7B;
break;
default:
HDF_LOGE("only support 8b.\r\n");
stm32mp1xx/sdk_liteos/hdf_config/device_info/device_info.hcs
+34 -8
View File
@@ -21,6 +21,13 @@
priority = 50;
device_gpio :: device {
device0 :: deviceNode {
policy = 2;
priority = 10;
permission = 0644;
moduleName = "HDF_PLATFORM_GPIO_MANAGER";
serviceName = "HDF_PLATFORM_GPIO_MANAGER";
}
device1 :: deviceNode {
policy = 0;
priority = 10;
permission = 0644;
@@ -31,7 +38,7 @@
}
device_iwdg :: device {
device0 :: deviceNode {
policy = 1;
policy = 2;
priority = 20;
permission = 0644;
moduleName = "stm32mp1_iwdg";
@@ -39,7 +46,7 @@
deviceMatchAttr = "stm32mp1_iwdg_0";
}
device1 :: deviceNode {
policy = 1;
policy = 2;
priority = 20;
permission = 0644;
moduleName = "stm32mp1_iwdg";
@@ -50,13 +57,21 @@
device_uart :: device {
device0 :: deviceNode {
policy = 1;
policy = 2;
priority = 40;
permission = 0644;
moduleName = "stm32mp1_uart";
serviceName = "HDF_PLATFORM_UART_4";
deviceMatchAttr = "stm32mp1_uart_4";
}
device2 :: deviceNode {
policy = 2;
priority = 40;
permission = 0644;
moduleName = "stm32mp1_uart";
serviceName = "HDF_PLATFORM_UART_5";
deviceMatchAttr = "stm32mp1_uart_5";
}
}
device_spi :: device {
device0 :: deviceNode {
@@ -68,7 +83,6 @@
deviceMatchAttr = "st_stm32mp157_spi_1";
}
}
device_mmc:: device {
device0 :: deviceNode {
policy = 2;
@@ -125,7 +139,7 @@
}
device_adc :: device {
device0 :: deviceNode {
policy = 0;
policy = 2;
priority = 50;
permission = 0644;
moduleName = "HDF_PLATFORM_ADC_MANAGER";
@@ -142,7 +156,7 @@
}
device_pwm :: device {
device0 :: deviceNode {
policy = 1;
policy = 2;
priority = 80;
permission = 0644;
moduleName = "HDF_PLATFORM_PWM";
@@ -151,6 +165,18 @@
}
}
}
display :: host {
hostName = "display_host";
device_hdf_disp :: device {
device0 :: deviceNode {
policy = 2;
priority = 140;
permission = 0660;
moduleName = "HDF_DISP";
serviceName = "hdf_disp";
}
}
}
input :: host {
hostName = "input_host";
priority = 100;
@@ -188,7 +214,7 @@
deviceMatchAttr = "zsj_gt911_5p5";
}
}
}
}
network :: host {
hostName = "network_host";
device_wifi :: device {
@@ -211,6 +237,6 @@
serviceName = "hisi";
}
}
}
}
}
}
stm32mp1xx/sdk_liteos/hdf_config/uart/uart_config.hcs
+6
View File
@@ -18,5 +18,11 @@ root {
reg_base = 0x40010000;
interrupt = 84;
}
controller_0x40011000 :: uart_controller {
match_attr = "stm32mp1_uart_5";
num = 5;
reg_base = 0x40011000;
interrupt = 85;
}
}
}
stm32mp1xx/sdk_liteos/hdf_config/watchdog/watchdog_config.hcs
-4
View File
@@ -9,9 +9,6 @@ root {
timeout_sec = 32; // default iwdg timeout(s)
auto_feed = false;
auto_feed_period = 10;
start = false;
clock_rate = 32000; // default clock source rate
@@ -23,7 +20,6 @@ root {
match_attr = "stm32mp1_iwdg_1";
num = 1;
reg_base = 0x5A002000;
auto_feed = true;
start = true;
}
}