!273 MIPI-CSI平台驱动模块添加-mipi_csi 接入平台驱动框架

Merge pull request !273 from wangyeyu/master

include/platform/mipi_csi_if.h

@@ -0,0 +1,545 @@
+/*
+ * Copyright (c) 2021 Huawei Device Co., Ltd.
+ *
+ * HDF is dual licensed: you can use it either under the terms of
+ * the GPL, or the BSD license, at your option.
+ * See the LICENSE file in the root of this repository for complete details.
+ */
+
+/**
+ * @addtogroup MIPI CSI
+ * @{
+ *
+ * @brief Defines standard MIPI CSI APIs for display driver development.
+ *
+ * This MIPI CSI module abstracts MIPI CSI capabilities of different system platforms to provide stable APIs
+ * for display driver development. You can use this module to obtain/release the MIPI CSI device handle,
+ * initialize the MIPI CSI device, and send/receive commands that interact with display peripherals.
+ *
+ * @since 1.0
+ */
+
+/**
+ * @file mipi_csi_if.h
+ *
+ * @brief Declares standard MIPI CSI APIs for display driver development.
+ *
+ *
+ *
+ * @since 1.0
+ */
+
+#ifndef MIPI_CSI_IF_H
+#define MIPI_CSI_IF_H
+
+#include "hdf_platform.h"
+
+#ifdef __cplusplus
+#if __cplusplus
+extern "C" {
+#endif
+#endif /* __cplusplus */
+
+/**
+ * @brief Maximum number of lanes supported by MIPI RX's Mipi device.
+ *
+ * @since 1.0
+ */
+#define MIPI_LANE_NUM                4
+
+/**
+ * @brief The maximum number of lanes supported by the LVDS device of Mipi Rx.
+ *
+ * @since 1.0
+ */
+#define LVDS_LANE_NUM                4
+
+/**
+ * @brief Defines the maximum number of virtual channels supported.
+ *
+ * @since 1.0
+ */
+#define WDR_VC_NUM                   4
+
+/**
+ * @brief Define the number of synchronization codes for each virtual channel of LVDS.
+ *
+ * @since 1.0
+ */
+#define SYNC_CODE_NUM                4
+
+/**
+ * @brief Maximum 3 groups of extended data types.
+ *
+ * @since 1.0
+ */
+#define MAX_EXT_DATA_TYPE_NUM        3
+
+/**
+ * @brief Lane distribution of Mipi Rx.
+ *
+ * @since 1.0
+ */
+typedef enum {
+    LANE_DIVIDE_MODE_0 = 0,
+    LANE_DIVIDE_MODE_1 = 1,
+    LANE_DIVIDE_MODE_BUTT
+} LaneDivideMode;
+
+/**
+ * @brief MIPI RX input interface type.
+ *
+ * @since 1.0
+ */
+typedef enum {
+    /** mipi */
+    INPUT_MODE_MIPI    = 0x0,
+    /** SUB_LVDS */
+    INPUT_MODE_SUBLVDS = 0x1,
+    /** LVDS */
+    INPUT_MODE_LVDS    = 0x2,
+    /* HISPI */
+    INPUT_MODE_HISPI   = 0x3,
+    /** CMOS */
+    INPUT_MODE_CMOS    = 0x4,
+    /** BT601 */
+    INPUT_MODE_BT601   = 0x5,
+    /** BT656 */
+    INPUT_MODE_BT656   = 0x6,
+    /** BT1120 */
+    INPUT_MODE_BT1120  = 0x7,
+    /** MIPI Bypass */
+    INPUT_MODE_BYPASS  = 0x8,
+    INPUT_MODE_BUTT
+} InputMode;
+
+/**
+ * @brief Mipi Rx, SLVS input rate.
+ *
+ * @since 1.0
+ */
+typedef enum {
+    /** output 1 pixel per clock */
+    MIPI_DATA_RATE_X1 = 0,
+    /** output 2 pixel per clock */
+    MIPI_DATA_RATE_X2 = 1,
+    MIPI_DATA_RATE_BUTT
+} MipiDataRate;
+
+/**
+ * @brief Mipi crop area properties.
+ *
+ * @since 1.0
+ */
+typedef struct {
+    int x;
+    int y;
+    unsigned int width;
+    unsigned int height;
+} ImgRect;
+
+/**
+ * @brief Type of data transmitted.
+ *
+ * @since 1.0
+ */
+typedef enum {
+    DATA_TYPE_RAW_8BIT = 0,
+    DATA_TYPE_RAW_10BIT,
+    DATA_TYPE_RAW_12BIT,
+    DATA_TYPE_RAW_14BIT,
+    DATA_TYPE_RAW_16BIT,
+    DATA_TYPE_YUV420_8BIT_NORMAL,
+    DATA_TYPE_YUV420_8BIT_LEGACY,
+    DATA_TYPE_YUV422_8BIT,
+    /** yuv422 8bit transform user define 16bit raw */
+    DATA_TYPE_YUV422_PACKED, 
+    DATA_TYPE_BUTT
+} DataType;
+
+/**
+ * @brief Define YUV and RAW data format and bit depth.
+ *
+ * @since 1.0
+ */
+typedef struct {
+    uint8_t devno;
+    unsigned int num;
+    unsigned int extDataBitWidth[MAX_EXT_DATA_TYPE_NUM];
+    unsigned int extDataType[MAX_EXT_DATA_TYPE_NUM];
+} ExtDataType;
+
+/**
+ * @brief MIPI D-PHY WDR MODE defines 
+ *
+ * @since 1.0
+ */
+typedef enum {
+    HI_MIPI_WDR_MODE_NONE = 0x0,
+    /** Virtual Channel */
+    HI_MIPI_WDR_MODE_VC   = 0x1,
+    /** Data Type */
+    HI_MIPI_WDR_MODE_DT   = 0x2,
+    /** DOL Mode */
+    HI_MIPI_WDR_MODE_DOL  = 0x3, 
+    HI_MIPI_WDR_MODE_BUTT
+} MipiWdrMode;
+
+/**
+ * @brief Mipi device properties.
+ *
+ * @since 1.0
+ */
+typedef struct {
+    /** data type: 8/10/12/14/16 bit */
+    DataType inputDataType;
+    /** MIPI WDR mode */
+    MipiWdrMode wdrMode;
+    /** laneId: -1 - disable */
+    short laneId[MIPI_LANE_NUM];
+
+    union {
+        /** used by the HI_MIPI_WDR_MODE_DT */
+        short dataType[WDR_VC_NUM];
+    };
+} MipiDevAttr;
+
+/**
+ * @brief LVDS WDR mode.
+ *
+ * @since 1.0
+ */
+typedef enum {
+    HI_WDR_MODE_NONE = 0x0,
+    HI_WDR_MODE_2F = 0x1,
+    HI_WDR_MODE_3F = 0x2,
+    HI_WDR_MODE_4F = 0x3,
+    HI_WDR_MODE_DOL_2F = 0x4,
+    HI_WDR_MODE_DOL_3F = 0x5,
+    HI_WDR_MODE_DOL_4F = 0x6,
+    HI_WDR_MODE_BUTT
+} WdrMode;
+
+/**
+ * @brief LVDS synchronization mode.
+ *
+ * @since 1.0
+ */
+typedef enum {
+    /** sensor SOL, EOL, SOF, EOF */
+    LVDS_SYNC_MODE_SOF = 0,
+    /** SAV, EAV */
+    LVDS_SYNC_MODE_SAV,
+    LVDS_SYNC_MODE_BUTT
+} LvdsSyncMode;
+
+/**
+ * @brief LVDS Vsync type.
+ *
+ * @since 1.0
+ */
+typedef enum {
+    LVDS_VSYNC_NORMAL   = 0x00,
+    LVDS_VSYNC_SHARE    = 0x01,
+    LVDS_VSYNC_HCONNECT = 0x02,
+    LVDS_VSYNC_BUTT
+} LvdsVsyncType;
+
+/**
+ * @brief LVDS Vsync column synchronization parameters.
+ *
+ * @since 1.0
+ */
+typedef struct {
+    LvdsVsyncType syncType;
+
+    /* hconnect vsync blanking len, valid when the syncType is LVDS_VSYNC_HCONNECT */
+    unsigned short hblank1;
+    unsigned short hblank2;
+} LvdsVsyncAttr;
+
+/**
+ * @brief Frame ID type.
+ *
+ * @since 1.0
+ */
+typedef enum {
+    LVDS_FID_NONE    = 0x00,
+    /** frame identification id in SAV 4th */
+    LVDS_FID_IN_SAV  = 0x01,
+    /** frame identification id in first data */
+    LVDS_FID_IN_DATA = 0x02,
+    LVDS_FID_BUTT
+} LvdsFidType;
+
+/**
+ * @brief Frame ID configuration information.
+ *
+ * @since 1.0
+ */
+typedef struct {
+    LvdsFidType fidType;
+
+    /** Sony DOL has the Frame Information Line, in DOL H-Connection mode,
+        should configure this flag as false to disable output the Frame Information Line */
+    unsigned char outputFil;
+} LvdsFidAttr;
+
+/**
+ * @brief LVDS bit size end mode.
+ *
+ * @since 1.0
+ */
+typedef enum {
+    LVDS_ENDIAN_LITTLE = 0x0,
+    LVDS_ENDIAN_BIG = 0x1,
+    LVDS_ENDIAN_BUTT
+} LvdsBitEndian;
+
+/**
+ * @brief LVDS / SubLVDS / HiSPi device properties.
+ *
+ * @since 1.0
+ */
+typedef struct {
+    /** data type: 8/10/12/14 bit */
+    DataType inputDataType;
+    /** WDR mode */
+    WdrMode wdrMode;
+
+    /** sync mode: SOF, SAV */
+    LvdsSyncMode syncMode;
+    /** normal, share, hconnect */
+    LvdsVsyncAttr vsyncAttr;
+    /** frame identification code */
+    LvdsFidAttr fidAttr;
+
+    /** data endian: little/big */
+    LvdsBitEndian dataEndian;
+    /** sync code endian: little/big */
+    LvdsBitEndian syncCodeEndian;
+    /** laneId: -1 - disable */
+    short laneId[LVDS_LANE_NUM];
+
+    /** each vc has 4 params, syncCode[i]:
+        syncMode is SYNC_MODE_SOF: SOF, EOF, SOL, EOL
+        syncMode is SYNC_MODE_SAV: invalid sav, invalid eav, valid sav, valid eav */
+    unsigned short syncCode[LVDS_LANE_NUM][WDR_VC_NUM][SYNC_CODE_NUM];
+} LvdsDevAttr;
+
+/**
+ * @brief The attribute of the combo device.
+ *
+ * Since MIPI RX can interface with CSI-2, LVDS, HiSPi and other timing, Mipi Rx is called a combo device.
+ *
+ * @since 1.0
+ */
+typedef struct {
+    /** device number */
+    uint8_t devno;
+    /** input mode: MIPI/LVDS/SUBLVDS/HISPI/DC */
+    InputMode inputMode;
+    MipiDataRate dataRate;
+    /** MIPI Rx device crop area (corresponding to the oringnal sensor input image size) */
+    ImgRect imgRect;
+
+    union {
+        MipiDevAttr mipiAttr;
+        LvdsDevAttr lvdsAttr;
+    };
+} ComboDevAttr;
+
+/**
+ * @brief PHY common mode voltage mode.
+ *
+ * @since 1.0
+ */
+typedef enum {
+    PHY_CMV_GE1200MV = 0x00,
+    PHY_CMV_LT1200MV = 0x01,
+    PHY_CMV_BUTT
+} PhyCmvMode;
+
+/**
+ * @brief Obtains the MIPI CSI device handle with a specified channel ID.
+ *
+ * @param id Indicates the MIPI CSI channel ID.
+ *
+ * @return Returns the MIPI CSI device handle if the operation is successful; returns <b>NULL</b> otherwise.
+ *
+ * @since 1.0
+ */
+DevHandle MipiCsiOpen(uint8_t id);
+
+/**
+ * @brief Releases the MIPI CSI device handle.
+ *
+ * @param handle Indicates the MIPI CSI device handle obtained via {@link MipiCsiOpen}.
+ *
+ * @since 1.0
+ */
+void MipiCsiClose(DevHandle handle);
+
+/**
+ * @brief Set the parameters of Mipi, CMOS or LVDS camera to the controller.
+ *
+ * The parameters including working mode, image area, image depth, data rate and physical channel.
+ *
+ * @param handle Indicates the MIPI CSI device handle obtained via {@link MipiCsiOpen}.
+ * @param pAttr Indicates the pointer to the attribute.
+ *
+ * @return Returns <b>0</b> if the operation is successful; returns a negative value otherwise.
+ *
+ * @since 1.0
+ */
+int32_t MipiCsiSetComboDevAttr(DevHandle handle, ComboDevAttr *pAttr);
+
+/**
+ * @brief Set common mode voltage mode.
+ *
+ * @param handle Indicates the MIPI CSI device handle obtained via {@link MipiCsiOpen}.
+ * @param devno There are 2 device numbers in total, pointing to 0 or 1.
+ * @param cmvMode Common mode voltage mode parameters.
+ *
+ * @return Returns <b>0</b> if the operation is successful; returns a negative value otherwise.
+ *
+ * @since 1.0
+ */
+int32_t MipiCsiSetPhyCmvmode(DevHandle handle, uint8_t devno, PhyCmvMode cmvMode);
+
+/**
+ * @brief Reset sensor.
+ *
+ * @param handle Indicates the MIPI CSI device handle obtained via {@link MipiCsiOpen}.
+ * @param snsResetSource The reset signal line number of sensor is called the reset source of sensor in software.
+ * sns is the abbreviation of sensor.
+ *
+ * @return Returns <b>0</b> if the operation is successful; returns a negative value otherwise.
+ *
+ * @since 1.0
+ */
+int32_t MipiCsiResetSensor(DevHandle handle, uint8_t snsResetSource);
+
+/**
+ * @brief Unreset sensor.
+ *
+ * @param handle Indicates the MIPI CSI device handle obtained via {@link MipiCsiOpen}.
+ * @param snsResetSource The reset signal line number of sensor is called the reset source of sensor in software.
+ * sns is the abbreviation of sensor.
+ *
+ * @return Returns <b>0</b> if the operation is successful; returns a negative value otherwise.
+ *
+ * @since 1.0
+ */
+int32_t MipiCsiUnresetSensor(DevHandle handle, uint8_t snsResetSource);
+
+/**
+ * @brief Reset Mipi Rx.
+ *
+ * Different s32WorkingViNum have different enSnsType.
+ *
+ * @param handle Indicates the MIPI CSI device handle obtained via {@link MipiCsiOpen}.
+ * @param comboDev MIPI RX or LVDS device type.
+ *
+ * @return Returns <b>0</b> if the operation is successful; returns a negative value otherwise.
+ *
+ * @since 1.0
+ */
+int32_t MipiCsiResetRx(DevHandle handle, uint8_t comboDev);
+
+/**
+ * @brief Uneset MIPI RX.
+ *
+ * @param handle Indicates the MIPI CSI device handle obtained via {@link MipiCsiOpen}.
+ * @param comboDev MIPI RX or LVDS device type.
+ *
+ * @return Returns <b>0</b> if the operation is successful; returns a negative value otherwise.
+ *
+ * @since 1.0
+ */
+int32_t MipiCsiUnresetRx(DevHandle handle, uint8_t comboDev);
+
+/**
+ * @brief Set the lane distribution of Mipi Rx.
+ *
+ * Select the specific mode according to the form of hardware connection.
+ *
+ * @param handle Indicates the MIPI CSI device handle obtained via {@link MipiCsiOpen}.
+ * @param laneDivideMode Lane division mode parameters.
+ *
+ * @since 1.0
+ */
+int32_t MipiCsiSetHsMode(DevHandle handle, LaneDivideMode laneDivideMode);
+
+/**
+ * @brief Enable Mipi clock.
+ *
+ * Decide whether to use Mipi or LVDS according to the ensnstype parameter
+ * passed by the upper layer function.
+ *
+ * @param handle Indicates the MIPI CSI device handle obtained via {@link MipiCsiOpen}.
+ * @param comboDev MIPI RX or LVDS device type.
+ *
+ * @return Returns <b>0</b> if the operation is successful; returns a negative value otherwise.
+ *
+ * @since 1.0
+ */
+int32_t MipiCsiEnableClock(DevHandle handle, uint8_t comboDev);
+
+/**
+ * @brief Disable the clock of Mipi device.
+ *
+ * @param handle Indicates the MIPI CSI device handle obtained via {@link MipiCsiOpen}.
+ * @param comboDev MIPI RX or LVDS device type.
+ *
+ * @return Returns <b>0</b> if the operation is successful; returns a negative value otherwise.
+ *
+ * @since 1.0
+ */
+int32_t MipiCsiDisableClock(DevHandle handle, uint8_t comboDev);
+
+/**
+ * @brief Enable the sensor clock on Mipi.
+ *
+ * @param handle Indicates the MIPI CSI device handle obtained via {@link MipiCsiOpen}.
+ * @param snsClkSource The clock signal line number of sensor, which is called the clock source of sensor in software.
+ * sns is the abbreviation of sensor.
+ *
+ * @return Returns <b>0</b> if the operation is successful; returns a negative value otherwise.
+ *
+ * @since 1.0
+ */
+int32_t MipiCsiEnableSensorClock(DevHandle handle, uint8_t snsClkSource);
+
+/**
+ * @brief Disable the sensor clock.
+ *
+ * @param handle Indicates the MIPI CSI device handle obtained via {@link MipiCsiOpen}.
+ * @param snsClkSource The clock signal line number of sensor, which is called the clock source of sensor in software.
+ * sns is the abbreviation of sensor.
+ *
+ * @return Returns <b>0</b> if the operation is successful; returns a negative value otherwise.
+ *
+ * @since 1.0
+ */
+int32_t MipiCsiDisableSensorClock(DevHandle handle, uint8_t snsClkSource);
+
+/**
+ * @brief Set YUV and RAW data format and bit depth.
+ *
+ * @param handle Indicates the MIPI CSI device handle obtained via {@link MipiCsiOpen}.
+ * @param dataType Pointer to image data format.
+ *
+ * @return Returns <b>0</b> if the operation is successful; returns a negative value otherwise.
+ *
+ * @since 1.0
+ */
+int32_t MipiCsiSetExtDataType(DevHandle handle, ExtDataType* dataType);
+
+#ifdef __cplusplus
+#if __cplusplus
+}
+#endif
+#endif /* __cplusplus */
+
+#endif /* MIPI_CSI_IF_H */

support/platform/include/common/platform_core.h

@@ -30,6 +30,7 @@ enum PlatformModuleType {
     PLATFORM_MODULE_CLOCK,
     PLATFORM_MODULE_REGULATOR,
     PLATFORM_MODULE_MIPI_DSI,
+    PLATFORM_MODULE_MIPI_CSI,
     PLATFORM_MODULE_UART,
     PLATFORM_MODULE_SDIO,
     PLATFORM_MODULE_MDIO,

support/platform/include/mipi_csi_core.h

@@ -0,0 +1,612 @@
+/*
+ * Copyright (c) 2021 Huawei Device Co., Ltd.
+ *
+ * HDF is dual licensed: you can use it either under the terms of
+ * the GPL, or the BSD license, at your option.
+ * See the LICENSE file in the root of this repository for complete details.
+ */
+
+#ifndef MIPI_CSI_CORE_H
+#define MIPI_CSI_CORE_H
+
+#include "hdf_base.h"
+#include "hdf_device.h"
+#include "hdf_device_desc.h"
+#include "hdf_object.h"
+#include "mipi_csi_if.h"
+#include "osal_mutex.h"
+#include "osal_spinlock.h"
+
+#ifdef __cplusplus
+#if __cplusplus
+extern "C" {
+#endif
+#endif /* __cplusplus */
+
+
+#define MAX_CNTLR_CNT         2
+#define COMBO_DEV_MAX_NUM     2
+#define MIPI_RX_MAX_DEV_NUM   2
+
+/**
+ * @brief Image size.
+ *
+ * @since 1.0
+ */
+typedef struct {
+    /** Image width */
+    unsigned int width;
+    /** Image height */
+    unsigned int height;
+} ImgSize;
+
+/**
+ * @brief LP, HS and escape mode switching timeout error.
+ *
+ * @since 1.0
+ */
+typedef struct {
+    /** Clock1 Lane switching from LP to HS timeout */
+    unsigned int clk1FsmTimeoutErrCnt;
+    /** Clock0 Lane switching from LP to HS timeout */
+    unsigned int clk0FsmTimeoutErrCnt;
+    /** Data lane0 switching from LP to HS timeout */
+    unsigned int d0FsmTimeoutErrCnt;
+    /** Data lane1 switching from LP to HS timeout */
+    unsigned int d1FsmTimeoutErrCnt;
+    /** Data lane2 switching from LP to HS timeout */
+    unsigned int d2FsmTimeoutErrCnt;
+    /** Data lane3 switching from LP to HS timeout */
+    unsigned int d3FsmTimeoutErrCnt;
+
+    /** Clock1 Lane switching to escape mode timed out */
+    unsigned int clk1FsmEscapeErrCnt;
+    /** Clock0 Lane switching to escape mode timed out */
+    unsigned int clk0FsmEscapeErrCnt;
+    /** Data lane0 switching to escape mode timed out */
+    unsigned int d0FsmEscapeErrCnt;
+    /** Data lane1 switching to escape mode timeout */
+    unsigned int d1FsmEscapeErrCnt;
+    /** Data lane2 switching to escape mode timeout */
+    unsigned int d2FsmEscapeErrCnt;
+    /** Data lane3 switching to escape mode timeout */
+    unsigned int d3FsmEscapeErrCnt;
+} PhyErrIntCnt;
+
+/**
+ * @brief Errors generated during Mipi communication, including data packets,
+ * data frames and read-write control.
+ *
+ * @since 1.0
+ */
+typedef struct {
+    /** Packet err.
+        Header has at least 2 errors and ECC cannot correct them */
+    unsigned int errEccDoubleCnt;
+    /** CRC redundancy check error count for vc3 channel data */
+    unsigned int vc3ErrCrcCnt;
+    /** CRC redundancy check error count for vc2 channel data */
+    unsigned int vc2ErrCrcCnt;
+    /** CRC redundancy check error count for Vc1 channel data */
+    unsigned int vc1ErrCrcCnt;
+    /** CRC redundancy check error count for vc0 channel data */
+    unsigned int vc0ErrCrcCnt;
+    /** ECC corrected error count for vc3 channel header */
+    unsigned int vc3ErrEccCorrectedCnt;
+    /** ECC corrected error count for vc2 channel header */
+    unsigned int vc2ErrEccCorrectedCnt;
+    /** ECC corrected error count for Vc1 channel header */
+    unsigned int vc1ErrEccCorrectedCnt;
+    /** ECC corrected error count for vc0 channel header */
+    unsigned int vc0ErrEccCorrectedCnt;
+    /** Frame sequence error count of vc3 */
+    unsigned int errIdVc3Cnt;
+    /** Frame sequence error count of vc2 */
+    unsigned int errIdVc2Cnt;
+    /** Frame sequence error count of Vc1 */
+    unsigned int errIdVc1Cnt;
+    /** Frame sequence error count or vc0 */
+    unsigned int errIdVc0Cnt;
+
+    /** Frame err.
+        Count of data types not supported by vc3 channel */
+    unsigned int errFrameDataVc3Cnt;
+    /** Count of data types not supported by vc2 channel */
+    unsigned int errFrameDataVc2Cnt;
+    /** Count of data types not supported by Vc1 channel */
+    unsigned int errFrameDataVc1Cnt;
+    /** Count of data types not supported by vc0 channel */
+    unsigned int errFrameDataVc0Cnt;
+    /** Frame sequence error count of vc3 */
+    unsigned int errFSeqVc3Cnt;
+    /** Frame sequence error count of vc2 */
+    unsigned int errFSeqVc2Cnt;
+    /** Frame sequence error count of Vc1 */
+    unsigned int errFSeqVc1Cnt;
+    /** Frame sequence error count or vc0 */
+    unsigned int errFSeqVc0Cnt;
+    /** Mismatch count of frame start and frame end short packets of vc3 channel */
+    unsigned int errFBndryMatchVc3Cnt;
+    /** Mismatch count of frame start and frame end short packets of vc2 channel */
+    unsigned int errFBndryMatchVc2Cnt;
+    /** Mismatch count of frame start and frame end short packets of Vc1 channel */
+    unsigned int errFBndryMatchVc1Cnt;
+    /** Count of mismatch between frame start and frame end short packets of vc0 channel */
+    unsigned int errFBndryMatchVc0Cnt;
+
+    /** Ctrl err.
+        Mipi read data FIFO raw interrupt count */
+    unsigned int dataFifoRderrCnt;
+    /** Mipi read command FIFO raw interrupt count */
+    unsigned int cmdFifoRderrCnt;
+    /** Mipi write data FIFO raw interrupt count */
+    unsigned int dataFifoWrerrCnt;
+    /** Mipi write command FIFO raw interrupt count */
+    unsigned int cmdFifoWrerrCnt;
+} MipiErrIntCnt;
+
+/**
+ * @brief LVDS internal read or write interrupt error.
+ *
+ * @since 1.0
+ */
+typedef struct {
+    /** CMD_ FIFO register read error interrupt count */
+    unsigned int cmdRdErrCnt;
+    /** CMD_ FIFO register write error interrupt count */
+    unsigned int cmdWrErrCnt;
+    /** Read line_ BUF error interrupt count */
+    unsigned int popErrCnt;
+    /** Synchronization error interrupt count of each lane during LVDS */
+    unsigned int lvdsStateErrCnt;
+    /** Link0 read FIFO error interrupt count */
+    unsigned int link0RdErrCnt;
+    /** Link0 write FIFO error interrupt count */
+    unsigned int link0WrErrCnt;
+} LvdsErrIntCnt;
+
+/**
+ * @brief Internal FIFO alignment error.
+ *
+ * @since 1.0
+ */
+typedef struct {
+    /** Lane3 FIFO overflow */
+    unsigned int lane3AlignErrCnt;
+    /** Lane2 FIFO overflow */
+    unsigned int lane2AlignErrCnt;
+    /** Lane1 FIFO overflow */
+    unsigned int lane1AlignErrCnt;
+    /** Lane0 FIFO overflow */
+    unsigned int lane0AlignErrCnt;
+    /** FIFO overflow */
+    unsigned int fifoFullErrCnt;
+} AlignErrIntCnt;
+
+/**
+ * @brief Controller context parameter variable.
+ *
+ * @since 1.0
+ */
+typedef struct {
+    /** Set by {@link MipiCsiSetHsMode} function */
+    LaneDivideMode laneDivideMode;
+    bool hsModeCfged;
+    /** The properties of different types of devices are set through the {@link MipiCsiSetComboDevAttr} function */
+    ComboDevAttr comboDevAttr[COMBO_DEV_MAX_NUM];
+    bool devValid[COMBO_DEV_MAX_NUM];
+    /** Whether the {@link MipiCsiSetComboDevAttr} function is called for parameter setting */
+    bool devCfged[COMBO_DEV_MAX_NUM];
+    unsigned int laneBitmap[COMBO_DEV_MAX_NUM];
+} MipiDevCtx;
+
+/**
+ * @brief Mipi CSI controller attribute and method definition.
+ *
+ * @since 1.0
+ */
+struct MipiCsiCntlr {
+    /** The services provided by this controller are sent out when the driver is bound to the HDF framework */
+    struct IDeviceIoService service;
+    /** The device side pointer is passed in when the driver binds to the HDF frame */
+    struct HdfDeviceObject *device;
+    /** device number */
+    unsigned int devNo;
+    /** All interfaces provided by the controller */
+    struct MipiCsiCntlrMethod *ops;
+    /** For all interfaces debugged by the controller, null is required when the driver is not implemented */
+    struct MipiCsiCntlrDebugMethod *debugs;
+    /** Controller context parameter variable */
+    MipiDevCtx ctx;
+    /** Lock when accessing controller context parameter variables */
+    OsalSpinlock ctxLock;
+    /** Lock when operating controller method */
+    struct OsalMutex lock;
+    /** Anonymous data pointer, used to store struct mipi_csi_device */
+    void *priv;
+};
+
+/**
+ * @brief All interfaces provided by the MIPI-CSI controller.
+ *
+ * Refer to the corresponding interface declaration for function pointer description.
+ *
+ * @since 1.0
+ */
+struct MipiCsiCntlrMethod {
+    int32_t (*setComboDevAttr)(struct MipiCsiCntlr *cntlr, ComboDevAttr *pAttr);
+    int32_t (*setPhyCmvmode)(struct MipiCsiCntlr *cntlr, uint8_t devno, PhyCmvMode cmvMode);
+    int32_t (*setExtDataType)(struct MipiCsiCntlr *cntlr, ExtDataType* dataType);
+    int32_t (*setHsMode)(struct MipiCsiCntlr *cntlr, LaneDivideMode laneDivideMode);
+    int32_t (*enableClock)(struct MipiCsiCntlr *cntlr, uint8_t comboDev);
+    int32_t (*disableClock)(struct MipiCsiCntlr *cntlr, uint8_t comboDev);
+    int32_t (*resetRx)(struct MipiCsiCntlr *cntlr, uint8_t comboDev);
+    int32_t (*unresetRx)(struct MipiCsiCntlr *cntlr, uint8_t comboDev);
+    int32_t (*enableSensorClock)(struct MipiCsiCntlr *cntlr, uint8_t snsClkSource);
+    int32_t (*disableSensorClock)(struct MipiCsiCntlr *cntlr, uint8_t snsClkSource);
+    int32_t (*resetSensor)(struct MipiCsiCntlr *cntlr, uint8_t snsResetSource);
+    int32_t (*unresetSensor)(struct MipiCsiCntlr *cntlr, uint8_t snsResetSource);
+};
+
+/**
+ * @brief For all interfaces debugged by the MIPI-CSI controller, <b>NULL</b> is required when
+ * the driver is not implemented.
+ *
+ * Refer to the corresponding interface declaration for function pointer description.
+ *
+ * @since 1.0
+ */
+struct MipiCsiCntlrDebugMethod {
+    void (*getMipiDevCtx)(struct MipiCsiCntlr *cntlr, MipiDevCtx *ctx);
+    void (*getPhyErrIntCnt)(struct MipiCsiCntlr *cntlr, unsigned int phyId, PhyErrIntCnt *errInfo);
+    void (*getMipiErrInt)(struct MipiCsiCntlr *cntlr, unsigned int phyId, MipiErrIntCnt *errInfo);
+    void (*getLvdsErrIntCnt)(struct MipiCsiCntlr *cntlr, unsigned int phyId, LvdsErrIntCnt *errInfo);
+    void (*getAlignErrIntCnt)(struct MipiCsiCntlr *cntlr, unsigned int phyId, AlignErrIntCnt *errInfo);
+    void (*getPhyData)(struct MipiCsiCntlr *cntlr, int phyId, int laneId, unsigned int *laneData);
+    void (*getPhyMipiLinkData)(struct MipiCsiCntlr *cntlr, int phyId, int laneId, unsigned int *laneData);
+    void (*getPhyLvdsLinkData)(struct MipiCsiCntlr *cntlr, int phyId, int laneId, unsigned int *laneData);
+    void (*getMipiImgsizeStatis)(struct MipiCsiCntlr *cntlr, uint8_t devno, short vc, ImgSize *pSize);
+    void (*getLvdsImgsizeStatis)(struct MipiCsiCntlr *cntlr, uint8_t devno, short vc, ImgSize *pSize);
+    void (*getLvdsLaneImgsizeStatis)(struct MipiCsiCntlr *cntlr, uint8_t devno, short lane, ImgSize *pSize);
+};
+
+int32_t MipiCsiRegisterCntlr(struct MipiCsiCntlr *cntlr, struct HdfDeviceObject *device);
+void MipiCsiUnregisterCntlr(struct MipiCsiCntlr *cntlr);
+
+/**
+  * @brief Turn HdfDeviceObject to an MipiCsiCntlr.
+ *
+ * @param device Indicates a HdfDeviceObject.
+ *
+ * @return Retrns the pointer of the MipiCsiCntlr on success; returns NULL otherwise.
+ * @since 1.0
+ */
+struct MipiCsiCntlr *MipiCsiCntlrFromDevice(const struct HdfDeviceObject *device);
+
+/**
+ * @brief Obtains the MIPI CSI device handle with a specified channel ID.
+ *
+ * @param id Indicates the MIPI CSI channel ID.
+ *
+ * @return Returns the MIPI CSI device if the operation is successful; returns <b>NULL</b> otherwise.
+ *
+ * @since 1.0
+ */
+struct MipiCsiCntlr *MipiCsiCntlrGet(uint8_t id);
+
+/**
+ * @brief Releases the MIPI CSI device handle.
+ *
+ * @param cntlr Indicates the MIPI CSI device obtained via {@link MipiCsiOpen}.
+ *
+ * @since 1.0
+ */
+void MipiCsiCntlrPut(const struct MipiCsiCntlr *cntlr);
+
+/**
+ * @brief Set the parameters of Mipi, CMOS or LVDS camera to the controller.
+ *
+ * The parameters including working mode, image area, image depth, data rate and physical channel.
+ *
+ * @param cntlr Indicates the MIPI CSI device obtained via {@link MipiCsiOpen}.
+ * @param pAttr Indicates the pointer to the attribute.
+ *
+ * @return Returns <b>0</b> if the operation is successful; returns a negative value otherwise.
+ *
+ * @since 1.0
+ */
+int32_t MipiCsiCntlrSetComboDevAttr(struct MipiCsiCntlr *cntlr, ComboDevAttr *pAttr);
+
+/**
+ * @brief Set common mode voltage mode.
+ *
+ * @param cntlr Indicates the MIPI CSI device obtained via {@link MipiCsiOpen}.
+ * @param devno There are 2 device numbers in total, pointing to 0 or 1.
+ * @param cmvMode Common mode voltage mode parameters.
+ *
+ * @return Returns <b>0</b> if the operation is successful; returns a negative value otherwise.
+ *
+ * @since 1.0
+ */
+int32_t MipiCsiCntlrSetPhyCmvmode(struct MipiCsiCntlr *cntlr, uint8_t devno, PhyCmvMode cmvMode);
+
+/**
+ * @brief Reset sensor.
+ *
+ * @param cntlr Indicates the MIPI CSI device obtained via {@link MipiCsiOpen}.
+ * @param snsResetSource The reset signal line number of sensor is called the reset source of sensor in software.
+ *
+ * @return Returns <b>0</b> if the operation is successful; returns a negative value otherwise.
+ *
+ * @since 1.0
+ */
+int32_t MipiCsiCntlrResetSensor(struct MipiCsiCntlr *cntlr, uint8_t snsResetSource);
+
+/**
+ * @brief Unreset sensor.
+ *
+ * @param cntlr Indicates the MIPI CSI device obtained via {@link MipiCsiOpen}.
+ * @param snsResetSource The reset signal line number of sensor is called the reset source of sensor in software.
+ *
+ * @return Returns <b>0</b> if the operation is successful; returns a negative value otherwise.
+ *
+ * @since 1.0
+ */
+int32_t MipiCsiCntlrUnresetSensor(struct MipiCsiCntlr *cntlr, uint8_t snsResetSource);
+
+/**
+ * @brief Reset Mipi Rx.
+ *
+ * Different s32WorkingViNum have different enSnsType.
+ *
+ * @param cntlr Indicates the MIPI CSI device obtained via {@link MipiCsiOpen}.
+ * @param comboDev MIPI RX or LVDS device type.
+ *
+ * @return Returns <b>0</b> if the operation is successful; returns a negative value otherwise.
+ *
+ * @since 1.0
+ */
+int32_t MipiCsiCntlrResetRx(struct MipiCsiCntlr *cntlr, uint8_t comboDev);
+
+/**
+ * @brief Uneset MIPI RX.
+ *
+ * @param cntlr Indicates the MIPI CSI device obtained via {@link MipiCsiOpen}.
+ * @param comboDev MIPI RX or LVDS device type.
+ *
+ * @return Returns <b>0</b> if the operation is successful; returns a negative value otherwise.
+ *
+ * @since 1.0
+ */
+int32_t MipiCsiCntlrUnresetRx(struct MipiCsiCntlr *cntlr, uint8_t comboDev);
+
+/**
+ * @brief Set the lane distribution of Mipi Rx.
+ *
+ * Select the specific mode according to the form of hardware connection.
+ *
+ * @param cntlr Indicates the MIPI CSI device obtained via {@link MipiCsiOpen}.
+ * @param laneDivideMode Lane division mode parameters.
+ *
+ * @since 1.0
+ */
+int32_t MipiCsiCntlrSetHsMode(struct MipiCsiCntlr *cntlr, LaneDivideMode laneDivideMode);
+
+/**
+ * @brief Enable Mipi clock.
+ *
+ * Decide whether to use Mipi or LVDS according to the ensnstype parameter
+ * passed by the upper layer function.
+ *
+ * @param cntlr Indicates the MIPI CSI device obtained via {@link MipiCsiOpen}.
+ * @param comboDev MIPI RX or LVDS device type.
+ *
+ * @return Returns <b>0</b> if the operation is successful; returns a negative value otherwise.
+ *
+ * @since 1.0
+ */
+int32_t MipiCsiCntlrEnableClock(struct MipiCsiCntlr *cntlr, uint8_t comboDev);
+
+/**
+ * @brief Disable the clock of Mipi device.
+ *
+ * @param cntlr Indicates the MIPI CSI device obtained via {@link MipiCsiOpen}.
+ * @param comboDev MIPI RX or LVDS device type.
+ *
+ * @return Returns <b>0</b> if the operation is successful; returns a negative value otherwise.
+ *
+ * @since 1.0
+ */
+int32_t MipiCsiCntlrDisableClock(struct MipiCsiCntlr *cntlr, uint8_t comboDev);
+
+/**
+ * @brief Enable the sensor clock on Mipi.
+ *
+ * @param cntlr Indicates the MIPI CSI device obtained via {@link MipiCsiOpen}.
+ * @param snsClkSource The clock signal line number of sensor, which is called the clock source of sensor in software.
+ *
+ * @return Returns <b>0</b> if the operation is successful; returns a negative value otherwise.
+ *
+ * @since 1.0
+ */
+int32_t MipiCsiCntlrEnableSensorClock(struct MipiCsiCntlr *cntlr, uint8_t snsClkSource);
+
+/**
+ * @brief Disable the sensor clock.
+ *
+ * @param cntlr Indicates the MIPI CSI device obtained via {@link MipiCsiOpen}.
+ * @param snsClkSource The clock signal line number of sensor, which is called the clock source of sensor in software.
+ *
+ * @return Returns <b>0</b> if the operation is successful; returns a negative value otherwise.
+ *
+ * @since 1.0
+ */
+int32_t MipiCsiCntlrDisableSensorClock(struct MipiCsiCntlr *cntlr, uint8_t snsClkSource);
+
+/**
+ * @brief Set YUV and RAW data format and bit depth.
+ *
+ * @param cntlr Indicates the MIPI CSI device obtained via {@link MipiCsiOpen}.
+ * @param dataType Pointer to image data format.
+ *
+ * @return Returns <b>0</b> if the operation is successful; returns a negative value otherwise.
+ *
+ * @since 1.0
+ */
+int32_t MipiCsiCntlrSetExtDataType(struct MipiCsiCntlr *cntlr, ExtDataType* dataType);
+
+/**
+ * @brief Get controller context parameter variable for debugging.
+ *
+ * @param cntlr Indicates the MIPI CSI device obtained via {@link MipiCsiOpen}.
+ * @param ctx Controller context parameter variable.
+ *
+ * @return Returns <b>0</b> if the operation is successful; returns a negative value otherwise.
+ *
+ * @since 1.0
+ */
+int32_t MipiCsiDebugGetMipiDevCtx(struct MipiCsiCntlr *cntlr, MipiDevCtx *ctx);
+
+/**
+ * @brief Get mode switching timeout error for debugging.
+ *
+ * @param cntlr Indicates the MIPI CSI device obtained via {@link MipiCsiOpen}.
+ * @param phyId Indicates PHY index.
+ * @param errInfo Indicates mode switching timeout error.
+ *
+ * @return Returns <b>0</b> if the operation is successful; returns a negative value otherwise.
+ *
+ * @since 1.0
+ */
+int32_t MipiCsiDebugGetPhyErrIntCnt(struct MipiCsiCntlr *cntlr, unsigned int phyId, PhyErrIntCnt *errInfo);
+
+/**
+ * @brief Get errors generated during Mipi communication for debugging.
+ *
+ * @param cntlr Indicates the MIPI CSI device obtained via {@link MipiCsiOpen}.
+ * @param phyId Indicates PHY index.
+ * @param errInfo Indicates Mipi communication error.
+ *
+ * @return Returns <b>0</b> if the operation is successful; returns a negative value otherwise.
+ *
+ * @since 1.0
+ */
+int32_t MipiCsiDebugGetMipiErrInt(struct MipiCsiCntlr *cntlr, unsigned int phyId, MipiErrIntCnt *errInfo);
+
+/**
+ * @brief Get LVDS internal read or write interrupt error for debugging.
+ *
+ * @param cntlr Indicates the MIPI CSI device obtained via {@link MipiCsiOpen}.
+ * @param phyId Indicates PHY index.
+ * @param errInfo Indicates LVDS read or write interrupt error.
+ *
+ * @return Returns <b>0</b> if the operation is successful; returns a negative value otherwise.
+ *
+ * @since 1.0
+ */
+int32_t MipiCsiDebugGetLvdsErrIntCnt(struct MipiCsiCntlr *cntlr, unsigned int phyId, LvdsErrIntCnt *errInfo);
+
+/**
+ * @brief Get internal FIFO alignment error for debugging.
+ *
+ * @param cntlr Indicates the MIPI CSI device obtained via {@link MipiCsiOpen}.
+ * @param phyId Indicates PHY index.
+ * @param errInfo Indicates FIFO alignment error.
+ *
+ * @return Returns <b>0</b> if the operation is successful; returns a negative value otherwise.
+ *
+ * @since 1.0
+ */
+int32_t MipiCsiDebugGetAlignErrIntCnt(struct MipiCsiCntlr *cntlr, unsigned int phyId, AlignErrIntCnt *errInfo);
+
+/**
+ * @brief Get PHY data for debugging.
+ *
+ * @param cntlr Indicates the MIPI CSI device obtained via {@link MipiCsiOpen}.
+ * @param phyId Indicates PHY index.
+ * @param laneId Indicates lane index, and the value range is 0 to <b>COMBO_MAX_LANE_NUM-1</b>.
+ * @param laneData Indicates a single PHY data.
+ *
+ * @return Returns <b>0</b> if the operation is successful; returns a negative value otherwise.
+ *
+ * @since 1.0
+ */
+int32_t MipiCsiDebugGetPhyData(struct MipiCsiCntlr *cntlr, int phyId, int laneId, unsigned int *laneData);
+
+/**
+ * @brief Get MIPI data for debugging.
+ *
+ * @param cntlr Indicates the MIPI CSI device obtained via {@link MipiCsiOpen}.
+ * @param phyId Indicates PHY index.
+ * @param laneId Indicates lane index, and the value range is 0 to <b>COMBO_MAX_LANE_NUM-1</b>.
+ * @param laneData Indicates a single MIPI data.
+ *
+ * @return Returns <b>0</b> if the operation is successful; returns a negative value otherwise.
+ *
+ * @since 1.0
+ */
+int32_t MipiCsiDebugGetPhyMipiLinkData(struct MipiCsiCntlr *cntlr, int phyId, int laneId, unsigned int *laneData);
+
+/**
+ * @brief Get LVDS data for debugging.
+ *
+ * @param cntlr Indicates the MIPI CSI device obtained via {@link MipiCsiOpen}.
+ * @param phyId Indicates PHY index.
+ * @param laneId Indicates lane index, and the value range is 0 to <b>COMBO_MAX_LANE_NUM-1</b>.
+ * @param laneData Indicates a single LVDS data.
+ *
+ * @return Returns <b>0</b> if the operation is successful; returns a negative value otherwise.
+ *
+ * @since 1.0
+ */
+int32_t MipiCsiDebugGetPhyLvdsLinkData(struct MipiCsiCntlr *cntlr, int phyId, int laneId, unsigned int *laneData);
+
+/**
+ * @brief Get image size of MIPI for debugging.
+ *
+ * @param cntlr Indicates the MIPI CSI device obtained via {@link MipiCsiOpen}.
+ * @param devno There are 2 device numbers in total, pointing to 0 or 1.
+ * @param vc Indicates virtual channel subscript.
+ * @param pSize Pointer to image size.
+ *
+ * @return Returns <b>0</b> if the operation is successful; returns a negative value otherwise.
+ *
+ * @since 1.0
+ */
+int32_t MipiCsiDebugGetMipiImgsizeStatis(struct MipiCsiCntlr *cntlr, uint8_t devno, short vc, ImgSize *pSize);
+
+/**
+ * @brief Get image size of LVDS for debugging.
+ *
+ * @param cntlr Indicates the MIPI CSI device obtained via {@link MipiCsiOpen}.
+ * @param devno There are 2 device numbers in total, pointing to 0 or 1.
+ * @param vc Indicates virtual channel subscript.
+ * @param pSize Pointer to image size.
+ *
+ * @return Returns <b>0</b> if the operation is successful; returns a negative value otherwise.
+ *
+ * @since 1.0
+ */
+int32_t MipiCsiDebugGetLvdsImgsizeStatis(struct MipiCsiCntlr *cntlr, uint8_t devno, short vc, ImgSize *pSize);
+
+/**
+ * @brief Get image size of LVDS-Lane for debugging.
+ *
+ * @param cntlr Indicates the MIPI CSI device obtained via {@link MipiCsiOpen}.
+ * @param devno There are 2 device numbers in total, pointing to 0 or 1.
+ * @param lane Indicates lane index, and the value range is 0 to <b>COMBO_MAX_LANE_NUM-1</b>.
+ * @param pSize Pointer to image size.
+ *
+ * @return Returns <b>0</b> if the operation is successful; returns a negative value otherwise.
+ *
+ * @since 1.0
+ */
+int32_t MipiCsiDebugGetLvdsLaneImgsizeStatis(struct MipiCsiCntlr *cntlr, uint8_t devno, short lane, ImgSize *pSize);
+
+#ifdef __cplusplus
+#if __cplusplus
+}
+#endif
+#endif /* __cplusplus */
+
+#endif

support/platform/include/mipi_csi_dev.h

@@ -0,0 +1,83 @@
+/*
+ * Copyright (c) 2021 Huawei Device Co., Ltd.
+ *
+ * HDF is dual licensed: you can use it either under the terms of
+ * the GPL, or the BSD license, at your option.
+ * See the LICENSE file in the root of this repository for complete details.
+ */
+
+#ifndef MIPI_CSI_DEV_H
+#define MIPI_CSI_DEV_H
+
+#include "hdf_base.h"
+#include "mipi_csi_if.h"
+
+typedef enum {
+    WORK_MODE_LVDS = 0x0,
+    WORK_MODE_MIPI = 0x1,
+    WORK_MODE_CMOS = 0x2,
+    WORK_MODE_BT1120 = 0x3,
+    WORK_MODE_SLVS = 0x4,
+    WORK_MODE_BUTT
+} WorkMode;
+
+typedef struct {
+    uint8_t devno;
+    PhyCmvMode cmvMode;
+} PhyCmv;
+
+#define CONFIG_HI_PROC_SHOW_SUPPORT
+
+#define HI_MIPI_IOC_MAGIC            'm'
+
+/* init data lane, input mode, data type */
+#define HI_MIPI_SET_DEV_ATTR         _IOW(HI_MIPI_IOC_MAGIC, 0x01, ComboDevAttr)
+
+/* set phy common mode voltage mode */
+#define HI_MIPI_SET_PHY_CMVMODE      _IOW(HI_MIPI_IOC_MAGIC, 0x04, PhyCmv)
+
+/* reset sensor */
+#define HI_MIPI_RESET_SENSOR         _IOW(HI_MIPI_IOC_MAGIC, 0x05, uint8_t)
+
+/* unreset sensor */
+#define HI_MIPI_UNRESET_SENSOR       _IOW(HI_MIPI_IOC_MAGIC, 0x06, uint8_t)
+
+/* reset mipi */
+#define HI_MIPI_RESET_MIPI           _IOW(HI_MIPI_IOC_MAGIC, 0x07, uint8_t)
+
+/* unreset mipi */
+#define HI_MIPI_UNRESET_MIPI         _IOW(HI_MIPI_IOC_MAGIC, 0x08, uint8_t)
+
+/* reset slvs */
+#define HI_MIPI_RESET_SLVS           _IOW(HI_MIPI_IOC_MAGIC, 0x09, uint8_t)
+
+/* unreset slvs */
+#define HI_MIPI_UNRESET_SLVS         _IOW(HI_MIPI_IOC_MAGIC, 0x0a, uint8_t)
+
+/* set mipi hs_mode */
+#define HI_MIPI_SET_HS_MODE          _IOW(HI_MIPI_IOC_MAGIC, 0x0b, LaneDivideMode)
+
+/* enable mipi clock */
+#define HI_MIPI_ENABLE_MIPI_CLOCK    _IOW(HI_MIPI_IOC_MAGIC, 0x0c, uint8_t)
+
+/* disable mipi clock */
+#define HI_MIPI_DISABLE_MIPI_CLOCK   _IOW(HI_MIPI_IOC_MAGIC, 0x0d, uint8_t)
+
+/* enable slvs clock */
+#define HI_MIPI_ENABLE_SLVS_CLOCK    _IOW(HI_MIPI_IOC_MAGIC, 0x0e, uint8_t)
+
+/* disable slvs clock */
+#define HI_MIPI_DISABLE_SLVS_CLOCK   _IOW(HI_MIPI_IOC_MAGIC, 0x0f, uint8_t)
+
+/* enable sensor clock */
+#define HI_MIPI_ENABLE_SENSOR_CLOCK  _IOW(HI_MIPI_IOC_MAGIC, 0x10, uint8_t)
+
+/* disable sensor clock */
+#define HI_MIPI_DISABLE_SENSOR_CLOCK _IOW(HI_MIPI_IOC_MAGIC, 0x11, uint8_t)
+
+#define HI_MIPI_SET_EXT_DATA_TYPE    _IOW(HI_MIPI_IOC_MAGIC, 0x12, ExtDataType)
+
+int MipiCsiDevModuleInit(uint8_t id);
+void MipiCsiDevModuleExit(uint8_t id);
+
+#endif /* MIPI_CSI_DEV_H */

support/platform/src/common/platform_common.c

@@ -53,6 +53,12 @@ static struct PlatformModuleInfo g_platformModules[] = {
         .moduleName = "PLATFORM_MODULE_MIPI_DSI",
     },
 #endif
+#if defined(LOSCFG_DRIVERS_HDF_PLATFORM_MIPI_CSI) || defined(CONFIG_DRIVERS_HDF_PLATFORM_MIPI_CSI)
+    {
+        .moduleType = PLATFORM_MODULE_MIPI_CSI,
+        .moduleName = "PLATFORM_MODULE_MIPI_CSI",
+    },
+#endif
 #if defined(LOSCFG_DRIVERS_HDF_PLATFORM_UART) || defined(CONFIG_DRIVERS_HDF_PLATFORM_UART)
     {
         .moduleType = PLATFORM_MODULE_UART,

support/platform/src/mipi_csi_core.c

@@ -0,0 +1,742 @@
+/*
+ * Copyright (c) 2021 Huawei Device Co., Ltd.
+ *
+ * HDF is dual licensed: you can use it either under the terms of
+ * the GPL, or the BSD license, at your option.
+ * See the LICENSE file in the root of this repository for complete details.
+ */
+
+#include "mipi_csi_core.h"
+#include "hdf_log.h"
+#include "osal_mem.h"
+#include "osal_time.h"
+
+#define HDF_LOG_TAG mipi_csi_core
+
+struct MipiCsiHandle {
+    struct MipiCsiCntlr *cntlr;
+    struct OsalMutex lock;
+    void *priv;
+};
+
+static struct MipiCsiHandle g_mipiCsihandle[MAX_CNTLR_CNT];
+
+int32_t MipiCsiRegisterCntlr(struct MipiCsiCntlr *cntlr, struct HdfDeviceObject *device)
+{
+    HDF_LOGI("%s: enter!", __func__);
+    if (cntlr == NULL) {
+        HDF_LOGE("%s: cntlr is NULL.", __func__);
+        return HDF_ERR_INVALID_PARAM;
+    }
+    if (cntlr->devNo >= MAX_CNTLR_CNT) {
+        HDF_LOGE("%s: cntlr->devNo is error.", __func__);
+        return HDF_ERR_INVALID_PARAM;
+    }
+    if (device == NULL) {
+        HDF_LOGE("%s: device is NULL.", __func__);
+        return HDF_FAILURE;
+    }
+
+    if (g_mipiCsihandle[cntlr->devNo].cntlr == NULL) {
+        (void)OsalMutexInit(&g_mipiCsihandle[cntlr->devNo].lock);
+        (void)OsalMutexInit(&(cntlr->lock));
+
+        g_mipiCsihandle[cntlr->devNo].cntlr = cntlr;
+        g_mipiCsihandle[cntlr->devNo].priv = NULL;
+        cntlr->device = device;
+        device->service = &(cntlr->service);
+        cntlr->priv = NULL;
+        HDF_LOGI("%s: success.", __func__);
+
+        return HDF_SUCCESS;
+    }
+
+    HDF_LOGE("%s: cntlr already exists.", __func__);
+    return HDF_FAILURE;
+}
+
+void MipiCsiUnregisterCntlr(struct MipiCsiCntlr *cntlr)
+{
+    if (cntlr == NULL) {
+        HDF_LOGE("%s: cntlr is NULL.", __func__);
+        return;
+    }
+
+    (void)OsalMutexDestroy(&(cntlr->lock));
+    (void)OsalMutexDestroy(&(g_mipiCsihandle[cntlr->devNo].lock));
+
+    HDF_LOGI("%s: success.", __func__);
+    return;
+}
+
+struct MipiCsiCntlr *MipiCsiCntlrFromDevice(const struct HdfDeviceObject *device)
+{
+    return (device == NULL) ? NULL : (struct MipiCsiCntlr *)device->service;
+}
+
+struct MipiCsiCntlr *MipiCsiCntlrGet(uint8_t number)
+{
+    struct MipiCsiCntlr *cntlr = NULL;
+    HDF_LOGI("%s: enter!", __func__);
+
+    if (number >= MAX_CNTLR_CNT) {
+        HDF_LOGE("%s: invalid number.", __func__);
+        return NULL;
+    }
+    if (g_mipiCsihandle[number].cntlr == NULL) {
+        HDF_LOGE("%s: g_mipiCsihandle[number].cntlr is NULL.", __func__);
+        return NULL;
+    }
+
+    (void)OsalMutexLock(&(g_mipiCsihandle[number].lock));
+    g_mipiCsihandle[number].cntlr->devNo = number;
+    cntlr = g_mipiCsihandle[number].cntlr;
+    (void)OsalMutexUnlock(&(g_mipiCsihandle[number].lock));
+
+    return cntlr;
+}
+
+void MipiCsiCntlrPut(const struct MipiCsiCntlr *cntlr)
+{
+    if (cntlr == NULL) {
+        HDF_LOGE("%s: cntlr is NULL.", __func__);
+        return;
+    }
+
+    uint8_t number = cntlr->devNo;
+    if (number >= MAX_CNTLR_CNT) {
+        HDF_LOGE("%s: invalid number.", __func__);
+        return;
+    }
+
+    HDF_LOGI("%s: success!", __func__);
+}
+
+int32_t MipiCsiCntlrSetComboDevAttr(struct MipiCsiCntlr *cntlr, ComboDevAttr *pAttr)
+{
+    int32_t ret;
+    HDF_LOGI("%s: enter!", __func__);
+
+    if ((cntlr == NULL) || (cntlr->ops == NULL)) {
+        HDF_LOGE("%s: cntlr or ops is NULL.", __func__);
+        return HDF_FAILURE;
+    }
+    if (pAttr == NULL) {
+        HDF_LOGE("%s: pAttr is NULL.", __func__);
+        return HDF_FAILURE;
+    }
+    if (cntlr->ops->setComboDevAttr == NULL) {
+        HDF_LOGE("%s: setComboDevAttr is NULL.", __func__);
+        return HDF_ERR_NOT_SUPPORT;
+    }
+
+    (void)OsalMutexLock(&(cntlr->lock));
+    ret =  cntlr->ops->setComboDevAttr(cntlr, pAttr);
+    (void)OsalMutexUnlock(&(cntlr->lock));
+
+    if (ret == HDF_SUCCESS) {
+        HDF_LOGI("%s: success!", __func__);
+    } else {
+        HDF_LOGE("%s: failed!", __func__);
+    }
+
+    return ret;
+}
+
+int32_t MipiCsiCntlrSetPhyCmvmode(struct MipiCsiCntlr *cntlr, uint8_t devno, PhyCmvMode cmvMode)
+{
+    int32_t ret;
+    HDF_LOGI("%s: enter!", __func__);
+
+    if ((cntlr == NULL) || (cntlr->ops == NULL)) {
+        HDF_LOGE("%s: cntlr or ops is NULL.", __func__);
+        return HDF_FAILURE;
+    }
+    if (cntlr->ops->setPhyCmvmode == NULL) {
+        HDF_LOGE("%s: setPhyCmvmode is NULL.", __func__);
+        return HDF_ERR_NOT_SUPPORT;
+    }
+
+    (void)OsalMutexLock(&(cntlr->lock));
+    ret =  cntlr->ops->setPhyCmvmode(cntlr, devno, cmvMode);
+    (void)OsalMutexUnlock(&(cntlr->lock));
+
+    if (ret == HDF_SUCCESS) {
+        HDF_LOGI("%s: success!", __func__);
+    } else {
+        HDF_LOGE("%s: failed!", __func__);
+    }
+
+    return ret;
+}
+    
+int32_t MipiCsiCntlrSetExtDataType(struct MipiCsiCntlr *cntlr, ExtDataType* dataType)
+{
+    int32_t ret;
+    HDF_LOGI("%s: enter!", __func__);
+
+    if ((cntlr == NULL) || (cntlr->ops == NULL)) {
+        HDF_LOGE("%s: cntlr or ops is NULL.", __func__);
+        return HDF_FAILURE;
+    }
+    if (dataType == NULL) {
+        HDF_LOGE("%s: dataType is NULL.", __func__);
+        return HDF_FAILURE;
+    }
+    if (cntlr->ops->setExtDataType == NULL) {
+        HDF_LOGE("%s: setExtDataType is NULL.", __func__);
+        return HDF_ERR_NOT_SUPPORT;
+    }
+
+    (void)OsalMutexLock(&(cntlr->lock));
+    ret =  cntlr->ops->setExtDataType(cntlr, dataType);
+    (void)OsalMutexUnlock(&(cntlr->lock));
+
+    if (ret == HDF_SUCCESS) {
+        HDF_LOGI("%s: success!", __func__);
+    } else {
+        HDF_LOGE("%s: failed!", __func__);
+    }
+
+    return ret;
+}
+
+int32_t MipiCsiCntlrSetHsMode(struct MipiCsiCntlr *cntlr, LaneDivideMode laneDivideMode)
+{
+    int32_t ret;
+    HDF_LOGI("%s: enter!", __func__);
+
+    if ((cntlr == NULL) || (cntlr->ops == NULL)) {
+        HDF_LOGE("%s: cntlr or ops is NULL.", __func__);
+        return HDF_FAILURE;
+    }
+    if (cntlr->ops->setHsMode == NULL) {
+        HDF_LOGE("%s: setHsMode is NULL.", __func__);
+        return HDF_ERR_NOT_SUPPORT;
+    }
+
+    (void)OsalMutexLock(&(cntlr->lock));
+    ret =  cntlr->ops->setHsMode(cntlr, laneDivideMode);
+    (void)OsalMutexUnlock(&(cntlr->lock));
+
+    if (ret == HDF_SUCCESS) {
+        HDF_LOGI("%s: success!", __func__);
+    } else {
+        HDF_LOGE("%s: failed!", __func__);
+    }
+
+    return ret;
+}
+
+int32_t MipiCsiCntlrEnableClock(struct MipiCsiCntlr *cntlr, uint8_t comboDev)
+{
+    int32_t ret;
+    HDF_LOGI("%s: enter!", __func__);
+
+    if ((cntlr == NULL) || (cntlr->ops == NULL)) {
+        HDF_LOGE("%s: cntlr or ops is NULL.", __func__);
+        return HDF_FAILURE;
+    }
+    if (cntlr->ops->enableClock == NULL) {
+        HDF_LOGE("%s: enableClock is NULL.", __func__);
+        return HDF_ERR_NOT_SUPPORT;
+    }
+
+    (void)OsalMutexLock(&(cntlr->lock));
+    ret =  cntlr->ops->enableClock(cntlr, comboDev);
+    (void)OsalMutexUnlock(&(cntlr->lock));
+
+    if (ret == HDF_SUCCESS) {
+        HDF_LOGI("%s: success!", __func__);
+    } else {
+        HDF_LOGE("%s: failed!", __func__);
+    }
+
+    return ret;
+}
+
+int32_t MipiCsiCntlrDisableClock(struct MipiCsiCntlr *cntlr, uint8_t comboDev)
+{
+    int32_t ret;
+    HDF_LOGI("%s: enter!", __func__);
+
+    if ((cntlr == NULL) || (cntlr->ops == NULL)) {
+        HDF_LOGE("%s: cntlr or ops is NULL.", __func__);
+        return HDF_FAILURE;
+    }
+    if (cntlr->ops->disableClock == NULL) {
+        HDF_LOGE("%s: disableClock is NULL.", __func__);
+        return HDF_ERR_NOT_SUPPORT;
+    }
+
+    (void)OsalMutexLock(&(cntlr->lock));
+    ret =  cntlr->ops->disableClock(cntlr, comboDev);
+    (void)OsalMutexUnlock(&(cntlr->lock));
+
+    if (ret == HDF_SUCCESS) {
+        HDF_LOGI("%s: success!", __func__);
+    } else {
+        HDF_LOGE("%s: failed!", __func__);
+    }
+
+    return ret;
+}
+
+int32_t MipiCsiCntlrResetRx(struct MipiCsiCntlr *cntlr, uint8_t comboDev)
+{
+    int32_t ret;
+    HDF_LOGI("%s: enter!", __func__);
+
+    if ((cntlr == NULL) || (cntlr->ops == NULL)) {
+        HDF_LOGE("%s: cntlr or ops is NULL.", __func__);
+        return HDF_FAILURE;
+    }
+    if (cntlr->ops->resetRx == NULL) {
+        HDF_LOGE("%s: resetRx is NULL.", __func__);
+        return HDF_ERR_NOT_SUPPORT;
+    }
+
+    (void)OsalMutexLock(&(cntlr->lock));
+    ret =  cntlr->ops->resetRx(cntlr, comboDev);
+    (void)OsalMutexUnlock(&(cntlr->lock));
+
+    if (ret == HDF_SUCCESS) {
+        HDF_LOGI("%s: success!", __func__);
+    } else {
+        HDF_LOGE("%s: failed!", __func__);
+    }
+
+    return ret;
+}
+
+int32_t MipiCsiCntlrUnresetRx(struct MipiCsiCntlr *cntlr, uint8_t comboDev)
+{
+    int32_t ret;
+    HDF_LOGI("%s: enter!", __func__);
+
+    if ((cntlr == NULL) || (cntlr->ops == NULL)) {
+        HDF_LOGE("%s: cntlr or ops is NULL.", __func__);
+        return HDF_FAILURE;
+    }
+    if (cntlr->ops->unresetRx == NULL) {
+        HDF_LOGE("%s: unresetRx is NULL.", __func__);
+        return HDF_ERR_NOT_SUPPORT;
+    }
+
+    (void)OsalMutexLock(&(cntlr->lock));
+    ret =  cntlr->ops->unresetRx(cntlr, comboDev);
+    (void)OsalMutexUnlock(&(cntlr->lock));
+
+    if (ret == HDF_SUCCESS) {
+        HDF_LOGI("%s: success!", __func__);
+    } else {
+        HDF_LOGE("%s: failed!", __func__);
+    }
+
+    return ret;
+}
+
+int32_t MipiCsiCntlrEnableSensorClock(struct MipiCsiCntlr *cntlr, uint8_t snsClkSource)
+{
+    int32_t ret;
+    HDF_LOGI("%s: enter!", __func__);
+
+    if ((cntlr == NULL) || (cntlr->ops == NULL)) {
+        HDF_LOGE("%s: cntlr or ops is NULL.", __func__);
+        return HDF_FAILURE;
+    }
+    if (cntlr->ops->enableSensorClock == NULL) {
+        HDF_LOGE("%s: enableSensorClock is NULL.", __func__);
+        return HDF_ERR_NOT_SUPPORT;
+    }
+
+    (void)OsalMutexLock(&(cntlr->lock));
+    ret =  cntlr->ops->enableSensorClock(cntlr, snsClkSource);
+    (void)OsalMutexUnlock(&(cntlr->lock));
+
+    if (ret == HDF_SUCCESS) {
+        HDF_LOGI("%s: success!", __func__);
+    } else {
+        HDF_LOGE("%s: failed!", __func__);
+    }
+
+    return ret;
+}
+
+int32_t MipiCsiCntlrDisableSensorClock(struct MipiCsiCntlr *cntlr, uint8_t snsClkSource)
+{
+    int32_t ret;
+    HDF_LOGI("%s: enter!", __func__);
+
+    if ((cntlr == NULL) || (cntlr->ops == NULL)) {
+        HDF_LOGE("%s: cntlr or ops is NULL.", __func__);
+        return HDF_FAILURE;
+    }
+    if (cntlr->ops->disableSensorClock == NULL) {
+        HDF_LOGE("%s: disableSensorClock is NULL.", __func__);
+        return HDF_ERR_NOT_SUPPORT;
+    }
+
+    (void)OsalMutexLock(&(cntlr->lock));
+    ret =  cntlr->ops->disableSensorClock(cntlr, snsClkSource);
+    (void)OsalMutexUnlock(&(cntlr->lock));
+
+    if (ret == HDF_SUCCESS) {
+        HDF_LOGI("%s: success!", __func__);
+    } else {
+        HDF_LOGE("%s: failed!", __func__);
+    }
+
+    return ret;
+}
+
+int32_t MipiCsiCntlrResetSensor(struct MipiCsiCntlr *cntlr, uint8_t snsResetSource)
+{
+    int32_t ret;
+    HDF_LOGI("%s: enter!", __func__);
+
+    if ((cntlr == NULL) || (cntlr->ops == NULL)) {
+        HDF_LOGE("%s: cntlr or ops is NULL.", __func__);
+        return HDF_FAILURE;
+    }
+    if (cntlr->ops->resetSensor == NULL) {
+        HDF_LOGE("%s: resetSensor is NULL.", __func__);
+        return HDF_ERR_NOT_SUPPORT;
+    }
+
+    (void)OsalMutexLock(&(cntlr->lock));
+    ret =  cntlr->ops->resetSensor(cntlr, snsResetSource);
+    (void)OsalMutexUnlock(&(cntlr->lock));
+
+    if (ret == HDF_SUCCESS) {
+        HDF_LOGI("%s: success!", __func__);
+    } else {
+        HDF_LOGE("%s: failed!", __func__);
+    }
+
+    return ret;
+}
+
+int32_t MipiCsiCntlrUnresetSensor(struct MipiCsiCntlr *cntlr, uint8_t snsResetSource)
+{
+    int32_t ret;
+    HDF_LOGI("%s: enter!", __func__);
+
+    if ((cntlr == NULL) || (cntlr->ops == NULL)) {
+        HDF_LOGE("%s: cntlr or ops is NULL.", __func__);
+        return HDF_FAILURE;
+    }
+    if (cntlr->ops->unresetSensor == NULL) {
+        HDF_LOGE("%s: unresetSensor is NULL.", __func__);
+        return HDF_ERR_NOT_SUPPORT;
+    }
+
+    (void)OsalMutexLock(&(cntlr->lock));
+    ret =  cntlr->ops->unresetSensor(cntlr, snsResetSource);
+    (void)OsalMutexUnlock(&(cntlr->lock));
+
+    if (ret == HDF_SUCCESS) {
+        HDF_LOGI("%s: success!", __func__);
+    } else {
+        HDF_LOGE("%s: failed!", __func__);
+    }
+
+    return ret;
+}
+
+int32_t MipiCsiDebugGetMipiDevCtx(struct MipiCsiCntlr *cntlr, MipiDevCtx *ctx)
+{
+    if (cntlr == NULL) {
+        HDF_LOGE("%s: cntlr is NULL.", __func__);
+        return HDF_FAILURE;
+    }
+    if (cntlr->debugs == NULL) {
+        HDF_LOGE("%s: debugs is NULL.", __func__);
+        return HDF_ERR_NOT_SUPPORT;
+    }
+    if (cntlr->debugs->getMipiDevCtx == NULL) {
+        HDF_LOGE("%s: getMipiDevCtx is NULL.", __func__);
+        return HDF_ERR_NOT_SUPPORT;
+    }
+    if (ctx == NULL) {
+        HDF_LOGE("%s: ctx is NULL.", __func__);
+        return HDF_FAILURE;
+    }
+
+    (void)OsalMutexLock(&(cntlr->lock));
+    cntlr->debugs->getMipiDevCtx(cntlr, ctx);
+    (void)OsalMutexUnlock(&(cntlr->lock));
+    HDF_LOGI("%s: success!", __func__);
+
+    return HDF_SUCCESS;
+}
+
+int32_t MipiCsiDebugGetPhyErrIntCnt(struct MipiCsiCntlr *cntlr, unsigned int phyId, PhyErrIntCnt *errInfo)
+{
+    if (cntlr == NULL) {
+        HDF_LOGE("%s: cntlr is NULL.", __func__);
+        return HDF_FAILURE;
+    }
+    if (cntlr->debugs == NULL) {
+        HDF_LOGE("%s: debugs is NULL.", __func__);
+        return HDF_ERR_NOT_SUPPORT;
+    }
+    if (cntlr->debugs->getPhyErrIntCnt == NULL) {
+        HDF_LOGE("%s: getPhyErrIntCnt is NULL.", __func__);
+        return HDF_ERR_NOT_SUPPORT;
+    }
+    if (errInfo == NULL) {
+        HDF_LOGE("%s: errInfo is NULL.", __func__);
+        return HDF_FAILURE;
+    }
+
+    (void)OsalMutexLock(&(cntlr->lock));
+    cntlr->debugs->getPhyErrIntCnt(cntlr, phyId, errInfo);
+    (void)OsalMutexUnlock(&(cntlr->lock));
+    HDF_LOGI("%s: success!", __func__);
+
+    return HDF_SUCCESS;
+}
+
+int32_t MipiCsiDebugGetMipiErrInt(struct MipiCsiCntlr *cntlr, unsigned int phyId, MipiErrIntCnt *errInfo)
+{
+    if (cntlr == NULL) {
+        HDF_LOGE("%s: cntlr is NULL.", __func__);
+        return HDF_FAILURE;
+    }
+    if (cntlr->debugs == NULL) {
+        HDF_LOGE("%s: debugs is NULL.", __func__);
+        return HDF_ERR_NOT_SUPPORT;
+    }
+    if (cntlr->debugs->getMipiErrInt == NULL) {
+        HDF_LOGE("%s: getMipiErrInt is NULL.", __func__);
+        return HDF_ERR_NOT_SUPPORT;
+    }
+    if (errInfo == NULL) {
+        HDF_LOGE("%s: errInfo is NULL.", __func__);
+        return HDF_FAILURE;
+    }
+
+    (void)OsalMutexLock(&(cntlr->lock));
+    cntlr->debugs->getMipiErrInt(cntlr, phyId, errInfo);
+    (void)OsalMutexUnlock(&(cntlr->lock));
+    HDF_LOGI("%s: success!", __func__);
+
+    return HDF_SUCCESS;
+}
+
+int32_t MipiCsiDebugGetLvdsErrIntCnt(struct MipiCsiCntlr *cntlr, unsigned int phyId, LvdsErrIntCnt *errInfo)
+{
+    if (cntlr == NULL) {
+        HDF_LOGE("%s: cntlr is NULL.", __func__);
+        return HDF_FAILURE;
+    }
+    if (cntlr->debugs == NULL) {
+        HDF_LOGE("%s: debugs is NULL.", __func__);
+        return HDF_ERR_NOT_SUPPORT;
+    }
+    if (cntlr->debugs->getLvdsErrIntCnt == NULL) {
+        HDF_LOGE("%s: getLvdsErrIntCnt is NULL.", __func__);
+        return HDF_ERR_NOT_SUPPORT;
+    }
+    if (errInfo == NULL) {
+        HDF_LOGE("%s: errInfo is NULL.", __func__);
+        return HDF_FAILURE;
+    }
+
+    (void)OsalMutexLock(&(cntlr->lock));
+    cntlr->debugs->getLvdsErrIntCnt(cntlr, phyId, errInfo);
+    (void)OsalMutexUnlock(&(cntlr->lock));
+    HDF_LOGI("%s: success!", __func__);
+
+    return HDF_SUCCESS;
+}
+
+int32_t MipiCsiDebugGetAlignErrIntCnt(struct MipiCsiCntlr *cntlr, unsigned int phyId, AlignErrIntCnt *errInfo)
+{
+    if (cntlr == NULL) {
+        HDF_LOGE("%s: cntlr is NULL.", __func__);
+        return HDF_FAILURE;
+    }
+    if (cntlr->debugs == NULL) {
+        HDF_LOGE("%s: debugs is NULL.", __func__);
+        return HDF_ERR_NOT_SUPPORT;
+    }
+    if (cntlr->debugs->getAlignErrIntCnt == NULL) {
+        HDF_LOGE("%s: getAlignErrIntCnt is NULL.", __func__);
+        return HDF_ERR_NOT_SUPPORT;
+    }
+    if (errInfo == NULL) {
+        HDF_LOGE("%s: errInfo is NULL.", __func__);
+        return HDF_FAILURE;
+    }
+
+    (void)OsalMutexLock(&(cntlr->lock));
+    cntlr->debugs->getAlignErrIntCnt(cntlr, phyId, errInfo);
+    (void)OsalMutexUnlock(&(cntlr->lock));
+    HDF_LOGI("%s: success!", __func__);
+
+    return HDF_SUCCESS;
+}
+
+int32_t MipiCsiDebugGetPhyData(struct MipiCsiCntlr *cntlr, int phyId, int laneId, unsigned int *laneData)
+{
+    if (cntlr == NULL) {
+        HDF_LOGE("%s: cntlr is NULL.", __func__);
+        return HDF_FAILURE;
+    }
+    if (cntlr->debugs == NULL) {
+        HDF_LOGE("%s: debugs is NULL.", __func__);
+        return HDF_ERR_NOT_SUPPORT;
+    }
+    if (cntlr->debugs->getPhyData == NULL) {
+        HDF_LOGE("%s: getPhyData is NULL.", __func__);
+        return HDF_ERR_NOT_SUPPORT;
+    }
+    if (laneData == NULL) {
+        HDF_LOGE("%s: laneData is NULL.", __func__);
+        return HDF_FAILURE;
+    }
+
+    (void)OsalMutexLock(&(cntlr->lock));
+    cntlr->debugs->getPhyData(cntlr, phyId, laneId, laneData);
+    (void)OsalMutexUnlock(&(cntlr->lock));
+    HDF_LOGI("%s: success!", __func__);
+
+    return HDF_SUCCESS;
+}
+
+int32_t MipiCsiDebugGetPhyMipiLinkData(struct MipiCsiCntlr *cntlr, int phyId, int laneId, unsigned int *laneData)
+{
+    if (cntlr == NULL) {
+        HDF_LOGE("%s: cntlr is NULL.", __func__);
+        return HDF_FAILURE;
+    }
+    if (cntlr->debugs == NULL) {
+        HDF_LOGE("%s: debugs is NULL.", __func__);
+        return HDF_ERR_NOT_SUPPORT;
+    }
+    if (cntlr->debugs->getPhyMipiLinkData == NULL) {
+        HDF_LOGE("%s: getPhyMipiLinkData is NULL.", __func__);
+        return HDF_ERR_NOT_SUPPORT;
+    }
+    if (laneData == NULL) {
+        HDF_LOGE("%s: laneData is NULL.", __func__);
+        return HDF_FAILURE;
+    }
+
+    (void)OsalMutexLock(&(cntlr->lock));
+    cntlr->debugs->getPhyMipiLinkData(cntlr, phyId, laneId, laneData);
+    (void)OsalMutexUnlock(&(cntlr->lock));
+    HDF_LOGI("%s: success!", __func__);
+
+    return HDF_SUCCESS;
+}
+
+int32_t MipiCsiDebugGetPhyLvdsLinkData(struct MipiCsiCntlr *cntlr, int phyId, int laneId, unsigned int *laneData)
+{
+    if (cntlr == NULL) {
+        HDF_LOGE("%s: cntlr is NULL.", __func__);
+        return HDF_FAILURE;
+    }
+    if (cntlr->debugs == NULL) {
+        HDF_LOGE("%s: debugs is NULL.", __func__);
+        return HDF_ERR_NOT_SUPPORT;
+    }
+    if (cntlr->debugs->getPhyLvdsLinkData == NULL) {
+        HDF_LOGE("%s: getPhyLvdsLinkData is NULL.", __func__);
+        return HDF_ERR_NOT_SUPPORT;
+    }
+    if (laneData == NULL) {
+        HDF_LOGE("%s: laneData is NULL.", __func__);
+        return HDF_FAILURE;
+    }
+
+    (void)OsalMutexLock(&(cntlr->lock));
+    cntlr->debugs->getPhyLvdsLinkData(cntlr, phyId, laneId, laneData);
+    (void)OsalMutexUnlock(&(cntlr->lock));
+    HDF_LOGI("%s: success!", __func__);
+
+    return HDF_SUCCESS;
+}
+
+int32_t MipiCsiDebugGetMipiImgsizeStatis(struct MipiCsiCntlr *cntlr, uint8_t devno, short vc, ImgSize *pSize)
+{
+    if (cntlr == NULL) {
+        HDF_LOGE("%s: cntlr is NULL.", __func__);
+        return HDF_FAILURE;
+    }
+    if (cntlr->debugs == NULL) {
+        HDF_LOGE("%s: debugs is NULL.", __func__);
+        return HDF_ERR_NOT_SUPPORT;
+    }
+    if (cntlr->debugs->getMipiImgsizeStatis == NULL) {
+        HDF_LOGE("%s: getMipiImgsizeStatis is NULL.", __func__);
+        return HDF_ERR_NOT_SUPPORT;
+    }
+    if (pSize == NULL) {
+        HDF_LOGE("%s: pSize is NULL.", __func__);
+        return HDF_FAILURE;
+    }
+
+    (void)OsalMutexLock(&(cntlr->lock));
+    cntlr->debugs->getMipiImgsizeStatis(cntlr, devno, vc, pSize);
+    (void)OsalMutexUnlock(&(cntlr->lock));
+    HDF_LOGI("%s: success!", __func__);
+
+    return HDF_SUCCESS;
+}
+
+int32_t MipiCsiDebugGetLvdsImgsizeStatis(struct MipiCsiCntlr *cntlr, uint8_t devno, short vc, ImgSize *pSize)
+{
+    if (cntlr == NULL) {
+        HDF_LOGE("%s: cntlr is NULL.", __func__);
+        return HDF_FAILURE;
+    }
+    if (cntlr->debugs == NULL) {
+        HDF_LOGE("%s: debugs is NULL.", __func__);
+        return HDF_ERR_NOT_SUPPORT;
+    }
+    if (cntlr->debugs->getLvdsImgsizeStatis == NULL) {
+        HDF_LOGE("%s: getLvdsImgsizeStatis is NULL.", __func__);
+        return HDF_ERR_NOT_SUPPORT;
+    }
+    if (pSize == NULL) {
+        HDF_LOGE("%s: pSize is NULL.", __func__);
+        return HDF_FAILURE;
+    }
+
+    (void)OsalMutexLock(&(cntlr->lock));
+    cntlr->debugs->getLvdsImgsizeStatis(cntlr, devno, vc, pSize);
+    (void)OsalMutexUnlock(&(cntlr->lock));
+    HDF_LOGI("%s: success!", __func__);
+
+    return HDF_SUCCESS;
+}
+
+int32_t MipiCsiDebugGetLvdsLaneImgsizeStatis(struct MipiCsiCntlr *cntlr, uint8_t devno, short lane, ImgSize *pSize)
+{
+    if (cntlr == NULL) {
+        HDF_LOGE("%s: cntlr is NULL.", __func__);
+        return HDF_FAILURE;
+    }
+    if (cntlr->debugs == NULL) {
+        HDF_LOGE("%s: debugs is NULL.", __func__);
+        return HDF_ERR_NOT_SUPPORT;
+    }
+    if (cntlr->debugs->getLvdsLaneImgsizeStatis == NULL) {
+        HDF_LOGE("%s: getLvdsLaneImgsizeStatis is NULL.", __func__);
+        return HDF_ERR_NOT_SUPPORT;
+    }
+    if (pSize == NULL) {
+        HDF_LOGE("%s: pSize is NULL.", __func__);
+        return HDF_FAILURE;
+    }
+
+    (void)OsalMutexLock(&(cntlr->lock));
+    cntlr->debugs->getLvdsLaneImgsizeStatis(cntlr, devno, lane, pSize);
+    (void)OsalMutexUnlock(&(cntlr->lock));
+    HDF_LOGI("%s: success!", __func__);
+
+    return HDF_SUCCESS;
+}

support/platform/src/mipi_csi_if.c

@@ -0,0 +1,82 @@
+/*
+ * Copyright (c) 2021 Huawei Device Co., Ltd.
+ *
+ * HDF is dual licensed: you can use it either under the terms of
+ * the GPL, or the BSD license, at your option.
+ * See the LICENSE file in the root of this repository for complete details.
+ */
+ 
+#include "mipi_csi_if.h"
+#include "mipi_csi_core.h"
+
+#define HDF_LOG_TAG mipi_csi_if
+
+DevHandle MipiCsiOpen(uint8_t id)
+{
+    return (DevHandle)MipiCsiCntlrGet(id);
+}
+
+void MipiCsiClose(DevHandle handle)
+{
+    MipiCsiCntlrPut((struct MipiCsiCntlr *)handle);
+}
+
+int32_t MipiCsiSetComboDevAttr(DevHandle handle, ComboDevAttr *pAttr)
+{
+    return MipiCsiCntlrSetComboDevAttr((struct MipiCsiCntlr *)handle, pAttr);
+}
+
+int32_t MipiCsiSetPhyCmvmode(DevHandle handle, uint8_t devno, PhyCmvMode cmvMode)
+{
+    return MipiCsiCntlrSetPhyCmvmode((struct MipiCsiCntlr *)handle, devno, cmvMode);
+}
+
+int32_t MipiCsiSetExtDataType(DevHandle handle, ExtDataType* dataType)
+{
+    return MipiCsiCntlrSetExtDataType((struct MipiCsiCntlr *)handle, dataType);
+}
+
+int32_t MipiCsiSetHsMode(DevHandle handle, LaneDivideMode laneDivideMode)
+{
+    return MipiCsiCntlrSetHsMode((struct MipiCsiCntlr *)handle, laneDivideMode);
+}
+
+int32_t MipiCsiEnableClock(DevHandle handle, uint8_t comboDev)
+{
+    return MipiCsiCntlrEnableClock((struct MipiCsiCntlr *)handle, comboDev);
+}
+
+int32_t MipiCsiDisableClock(DevHandle handle, uint8_t comboDev)
+{
+    return MipiCsiCntlrDisableClock((struct MipiCsiCntlr *)handle, comboDev);
+}
+
+int32_t MipiCsiResetRx(DevHandle handle, uint8_t comboDev)
+{
+    return MipiCsiCntlrResetRx((struct MipiCsiCntlr *)handle, comboDev);
+}
+
+int32_t MipiCsiUnresetRx(DevHandle handle, uint8_t comboDev)
+{
+    return MipiCsiCntlrUnresetRx((struct MipiCsiCntlr *)handle, comboDev);
+}
+
+int32_t MipiCsiEnableSensorClock(DevHandle handle, uint8_t snsClkSource)
+{
+    return MipiCsiCntlrEnableSensorClock((struct MipiCsiCntlr *)handle, snsClkSource);
+}
+
+int32_t MipiCsiDisableSensorClock(DevHandle handle, uint8_t snsClkSource)
+{
+    return MipiCsiCntlrDisableSensorClock((struct MipiCsiCntlr *)handle, snsClkSource);
+}
+
+int32_t MipiCsiResetSensor(DevHandle handle, uint8_t snsResetSource)
+{
+    return MipiCsiCntlrResetSensor((struct MipiCsiCntlr *)handle, snsResetSource);
+}
+
+int32_t MipiCsiUnresetSensor(DevHandle handle, uint8_t snsResetSource)
+{
+    return MipiCsiCntlrUnresetSensor((struct MipiCsiCntlr *)handle, snsResetSource);
+}