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riscv64/itx: Fix build issues with clang

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Nathan E. Egge
2024-02-22 11:50:56 -05:00
parent 292cc4c435
commit a3f3b99f05
1 changed files with 3 additions and 3 deletions
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src/riscv/64/itx.S
+3 -3
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@@ -738,7 +738,7 @@ function inv_txfm_add_4x8_rvv, export=1, ext=v
vle16.v v3, (t0)
li t1, 2896*8
.irp i 0, 1, 2, 3
.irp i, 0, 1, 2, 3
vsmul.vx v\i, v\i, t1
.endr
@@ -818,7 +818,7 @@ function inv_txfm_add_8x4_rvv, export=1, ext=v
.endr
li t1, 2896*8
.irp i 0, 1, 2, 3, 4, 5, 6, 7
.irp i, 0, 1, 2, 3, 4, 5, 6, 7
vsmul.vx v\i, v\i, t1
.endr
@@ -1943,7 +1943,7 @@ function inv_txfm_\variant\()add_16x8_rvv, export=1, ext=v
.endr
li t1, 2896*8
.irp i 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
.irp i, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
vsmul.vx v\i, v\i, t1
.endr