I misread the ISA doc and got the order wrong.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Fixes: dae1629778d ("aco: disable sdwa on gfx11")
Fixes: e68e6c75ca1 ("aco: use v_perm_b32 to copy 0xff00/0x00ff/0xff/0x00")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19223>
(cherry picked from commit f32dde29028a529c42431c387edade0886239aad)
For example if src0 is 0x80000000 we should return 1, not 0.
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Fixes: a5747f8ab35 ("nir: add opcodes for *find_msb_rev and lowering")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18951>
(cherry picked from commit 741dbadae09ef376c1b6176f195b73930d1294db)
Fixes: 76791db0882b3715cd7d ("mesa/x11: Remove the swrast-classic-based fake libGL")
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19221>
(cherry picked from commit 814682d00c7f016497afe52cd5c6e86f00110d7c)
LLVM 15 changed the coroutine presplit function attribute in
735e6c40b5e9 [Coroutines] Convert coroutine.presplit to enum attr
This needed to be updated in mesa.
Cc: mesa-stable
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18815>
(cherry picked from commit bcb136d548e607dbc9b72df0f575710ee03947ec)
Conflicts:
src/gallium/auxiliary/gallivm/lp_bld_intr.h
GL_MAX_FRAGMENT_UNIFORM_COMPONENTS may not report a size that
is useful to calculate the supported UBO size. Use the value
GL_MAX_UNIFORM_BLOCK_SIZE instead when the host supports this.
Related: https://gitlab.freedesktop.org/virgl/virglrenderer/-/issues/286
Fixes: 5b683ba19ac77d6c7dfd8de478678d0b90ba764f
virgl: Only progagate the uniform numbers if the numbers are actually right
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18512>
(cherry picked from commit 95cea62a9b7b4b2caa3835e4f5e04d83df1de0a3)
Conflicts:
src/virtio/virtio-gpu/virgl_hw.h
Reports d3d12 support for mapping all the contiguous planes.
This will be used by vaDeriveImage in the VA frontend
Fixes: a585d95803ca38d42b893603a85bf6442a54838a ("radeonsi/vcn: WA 10bit encoding crash in vaapi")
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18300>
(cherry picked from commit a1f904f7a3de33299932645296d481cda2163683)
vaDeriveImage should check if the underlying gallium driver can map contiguous planes
before skipping with disallowlist.
Fixes: a585d95803ca38d42b893603a85bf6442a54838a ("radeonsi/vcn: WA 10bit encoding crash in vaapi")
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18300>
(cherry picked from commit 81ae033b949953ef0c43edef3d0eb12e4741ee2e)
Conflicts:
src/gallium/include/pipe/p_video_enums.h
This failed to take fabs of the first component, implementing an unintended
formula that would return the right results in some common cases but is wrong in
general:
max { x, |y|, |z| }
instead of the intended
max { |x|, |y|, |z| }
Reexpress the implementation to make correctness obvious.
Fixes: 272e927d0e9 ("nir/spirv: initial handling of OpenCL.std extension opcodes")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18754>
(cherry picked from commit fc5c671e8785c89cf986181e0e3e7fa8742c4dce)
The loop over sources has to happen for every instruction, regardless of whether
we also need to register allocate the destination. The other source loops handle
this properly, but this one was missed.
Fixes spilling failure in shaders/android/angle/aztec_ruins/16.shader_test when
the input NIR is shuffled a bit (from reordering passes).
Fixes: 129d390bd8c ("pan/mdg: Fix bound setting in RA for sources")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19093>
(cherry picked from commit 829f769e602a7bbff4a0603076cb74ce9a966e8e)
The register file on Midgard is not large enough to sustain 256 threads in a
threadgroup when all ISA-defined registers are used. As such, we want
to advertise the smallest MAX_THREADS_PER_BLOCK permissible by the spec to
avoid compiling shaders that will necessarily spill. The minimum-maximum in
OpenGL ES 3.1 is 128, so set that on Midgard.
6 compute shaders LOST in shader-db due to exceeding this new limit. These
shaders would fault if they were attempted to be executed.
Cc: mesa-stable
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19092>
(cherry picked from commit 9b19104a30bba35c4025833d5022c8ddc6c1ccd0)
If Begin/End are called from a display list make sure to leave
the dlist.c's dispatch table in place just like the non-glthread
code does.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7335
Fixes: 7f1cac7ba682 ("mesa/glthread: enable immediate mode")
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19088>
(cherry picked from commit 7dcdd519385aaa4fddfa1368fbbbc89c408befe3)
Turn -DWINDOWS_NO_FUTEX to be pre_args for not need add direct dependencies
to dep_futex for libraries and executables.
So only add dependencies to idep_mesautil is enough.
And this will make sure all source code are either using Windows futex,
or use mtx_t consistently across different sources, other than mixed usage of
futex and mtx_t before this commit.
If -DWINDOWS_NO_FUTEX is not globally available, that would cause
/src/util/simple_mtx.h:116: undefined reference to `futex_wait'
This error is raised when
* compiled with -D min-windows-version=7
* moved futex_wait from futex.h to futex.c
* used simple_mtx_t in more codes
Or linkage error:
src/compiler/libcompiler.a.p/glsl_types.cpp.obj: in function `futex_wake':
/../../src/util/futex.h:154: undefined reference to `WaitOnAddress'
When:
* compiled with -D min-windows-version=7
* used simple_mtx_t in more codes
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7494
Fixes: c002bbeb2f7 ("util: Add a Win32 futex impl")
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19087>
(cherry picked from commit 2b64ff92843339de4321d1c2f9da6931d0533912)
When the Anv pipeline got migrated to the runtime, we gain/lost a bit
of functionality which is that the disk cache is always read
regardless of VK_ENABLE_PIPELINE_CACHE=0.
This change brings the old behavior back.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 591da9877900c ("vulkan: Add a common VkPipelineCache implementation")
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19050>
(cherry picked from commit cea113c97705ea659821a8cc8c330ded4c2e477a)
Otherwise users of `idep_vulkan_wsi` won't pull in the udev dependency,
which will cause the linker to fail later on in compiling.
The user of this dependency is lavapipe which would fail to link if this
isn't provided.
Fixes: 4885e63a6d20c57f98b7b641ea3c39a8ff3ae2dd (vulkan/wsi: implement missing wsi_register_device_event)
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19037>
(cherry picked from commit b516f59490581ff0be4773bf482648fc82f31b3a)
this ensures there's no weird perf happening, avoids using renderpass
instead of dynamic rendering, and avoids hitting an assert from broken
framebuffer construction
cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19065>
(cherry picked from commit d3880a632456879a1c06320879aa684c1886f438)
if fbfetch is setup here, it will flag rp_changed
this is already inside renderpass setup, however, so just unset it
to avoid erroneously trigering the assert
cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19065>
(cherry picked from commit 1ae26de36f51520d4285777c435e918b31dc442a)
Dont bump the depth if the application attempts to overflow or
underflow the stack.
Fixes: 6febe2b880e7 ("glthread: track all matrix stack depths")
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19059>
(cherry picked from commit a5e9e64aae2e94209e64fbb75c7b03aab3b0d39b)
In that case we need to use the sysval. That sysval can be optimized anyway in
the nonvariable case. Fixes test_basic.get_linear_ids on panfrost.
Fixes: 998d84fca56 ("nir/lower_system_values: Support lowering more intrinsics")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18662>
(cherry picked from commit f4b03ea6dc0ac0f02f780ba809c3ea551a72f947)
SPIR-V and Vulkan allow implementations to optimize
float ops assuming inputs are not NaN unless SignedZeroInfNanPreserve
execution mode is enabled.
This means isnan which is turned to nir_op_fneu(a,a) and then emitted
as SpvOpFUnordNotEqual could potentially be optimised to a const 0.
isnan is special in this approach and therefore recognise this pattern,
and emit SpvOpIsNan instead of enabling SignedZeroInfNanPreserve which
will hurt performace of some vulkan drivers.
Fixes dEQP-GL45-ES31.functional.shaders.builtin_functions.common.isnan.*
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18910>
(cherry picked from commit 69c22dd81736ee825d345078ffb252b39190e89d)
Offset decoration in spirv is unsigned and it does not have a notion of an invalid offset.
Unlike NIR which set -1 for invlaid offset. This translates to invalid spirv being produced.
Instead, just don't emit an Offset decoration.
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18910>
(cherry picked from commit b87c08b3bf707f25df2b788260381aea161d5dd8)
Otherwise we use old invalid value.
Relevant CTS tests:
dEQP-VK.pipeline.monolithic.multisample.misc.dynamic_rendering.multi_renderpass.r8g8b8a8_unorm_r16g16b16a16_sfloat_r16g16b16a16_*
Fixes: ed125e6cca188275631641784fcf3ddcbcfef193
("tu: Initial support for dynamic rendering")
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18999>
(cherry picked from commit a1c372cd847cddd2baf8fb74aa3c04bed4ca0397)
Makes things easier to handle when aiming for a static build
Cc: mesa-stable
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18117>
(cherry picked from commit ed2743eae59ac71622395299e522c091ddcee722)
We're now using PIPE_SHADER_MAX_SAMPLER_VIEWS, so this advice is
outdated.
Fixes: 620c5e9dd05 ("gallium/u_threaded_context: Use PIPE_MAX_SHADER_SAMPLER_VIEWS for sampler_buffers")
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18973>
(cherry picked from commit b666c203eed8c3bd0825b23c65bfb79c4be53735)
Failing to allocate resources when DRM_FORMAT_INVALID
is passed as a modifier breaks tegra. Change this behaviour
so that this modifier is instead interpreted as a don't care,
allowing for the driver to choose an appropriate modifier internally.
v2: change nouveau instead of tegra (Thierry Rieding)
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6693
Fixes: 129d83cac2a ("nouveau: Use format modifiers in buffer allocation")
Signed-off-by: Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18649>
(cherry picked from commit 941c70a28a8db3a852ca5245354effa2bf1e7cf8)
We don't check whether the register is overwritten between the actual
conditional test and the test of the used result, so don't try to
optimize the evaluation of the conditional.
Fixes: 79ca456b4837b3bc21cf9ef3c03c505c4b4909f6
r600/sfn: rewrite NIR backend
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18983>
(cherry picked from commit 6de40d17baf403978dd136dbbc36c0167dbf7ef9)
Docu says:
Ensure that the KILL* instruction is the last instruction
in an ALU clause, because the remaining instructions executed
in the clause do not reflect the updated valid state after
the kill operation.
Fixes: 79ca456b4837b3bc21cf9ef3c03c505c4b4909f6
r600/sfn: rewrite NIR backend
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18983>
(cherry picked from commit 99b7a12ec12d5d76826051772fe474a547582e5e)
Like on adreno 3xx, hw binning and scissor optimizations don't work correctly
together on a4xx and a5xx GPUs.
Disable binning as a workaround if scissor optimizations are being used.
Fixes: f68c6951b86a 8efaae3e1969
Signed-off-by: Alejandro Tafalla <atafalla@dnyon.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18925>
(cherry picked from commit afe4b534b52af41ba3265c7150e012f8577d03b7)
We have the correct merged color write enable state as a local var here,
use that instead of the zero cmd->state.color_write_enable. Fixes
blending in many traces with ANGLE on turnip. In the process of fixing,
clarify the logic a little bit.
Fixes: 169e03800d0f ("tu: Implement VK_EXT_color_write_enable")
Fixes: #7328
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18956>
(cherry picked from commit dadb29cf2e21ba6b28a2d9ac62dd4ff13f7df9a2)
