Made protect tracking in a single thread, and use a mailbox message system to avoid the use of lock

Add a debug mode compilation with disabled compiler optimizations

.github/FUNDING.yml

@@ -0,0 +1,12 @@
+# These are supported funding model platforms
+
+github: ptitSeb
+patreon: # Replace with a single Patreon username
+open_collective: # Replace with a single Open Collective username
+ko_fi: # Replace with a single Ko-fi username
+tidelift: # Replace with a single Tidelift platform-name/package-name e.g., npm/babel
+community_bridge: # Replace with a single Community Bridge project-name e.g., cloud-foundry
+liberapay: # Replace with a single Liberapay username
+issuehunt: # Replace with a single IssueHunt username
+otechie: # Replace with a single Otechie username
+custom: paypal.me/0ptitSeb

.gitignore

@@ -59,3 +59,8 @@ build*/
 src/git_head.h
 backup/
 
+# LLVMprivateGenerator
+/LLVMprivateGenerator/*
+!/LLVMprivateGenerator/Makefile
+!/LLVMprivateGenerator/main.cpp
+!/LLVMprivateGenerator/registered_structs.cpp

.travis.yml

@@ -0,0 +1,24 @@
+language: c
+arch:
+  - amd64
+  - arm64-graviton2
+os: linux
+dist: focal
+
+compiler:
+    - gcc
+
+addons:
+  apt:
+    packages:
+      - python3
+
+      #Build steps
+before_script:
+    - mkdir build
+    - cd build
+    - if [ "$TRAVIS_CPU_ARCH" = "arm64" ]; then cmake .. -DRK3399=1 -DCMAKE_BUILD_TYPE=RelWithDebInfo ; else cmake .. -DLD80BITS=1 -DNOALIGN=1 -DCMAKE_BUILD_TYPE=RelWithDebInfo ; fi
+
+script:
+    - make
+    - ctest --output-on-failure

CHANGELOG.md

@@ -1,27 +0,0 @@
-v0.0.6
-======
-* Added Dynarec for ARM64
-* Many general CPU opcode added to the Dynarec
-* Many SSEx opcodes added to the Dynarec
-* Added a few more symbols in libc
-* A few changes to the "thread once" handling
-* New Logo and Icon from @grayduck
-
-v0.0.4
-======
-* Added a lot of opcodes
-* Added SDL1 and SDL2 wrapping
-* OpenGL/GLU wrapping done
-* libasound / libpulse wrapping done
-* libopenal / libalure / libalut wrapping done
-* Many X11 libs wrapped
-* Added "install" with binfmt integration
-* A few games are actualy starting now (old WorldOfGoo, Into The Breach, VVVVVV and Thimbeweed Park)
-
-v0.0.2
-======
-* Using box86 as a base, implemented most planned box64 part except dynarec
-* Wrapped a few libs
-* ELF loader a bit crude, but seems working
-* Signal handling implemented
-* MMX and x87 are sharing their registers

CMakeLists.txt

@@ -1,11 +1,27 @@
-cmake_minimum_required(VERSION 3.0)
+cmake_minimum_required(VERSION 3.4)
+
+cmake_policy(SET CMP0065 NEW)
+
+SET(CMAKE_C_FLAGS_DEBUG  "-O0 -g")
+SET(CMAKE_CXX_FLAGS_DEBUG  "-O0 -g")
 
 option(RPI4ARM64 "Set to ON if targeting an RaspberryPI4 device with multiarch arm64 and armhf" ${RPI4ARM64})
+option(RK3326 "Set to ON if targeting an Rockchip RK3326 based device" ${RK3326})
 option(RK3399 "Set to ON if targeting an Rockchip RK3399 based device" ${RK3399})
+option(TEGRAX1 "Set to ON if targeting an Tegra X1 based device" ${TEGRAX1})
+option(PHYTIUM "Set to ON if targeting an Phytium (D2000 or FT2000/4) based device" ${PHYTIUM})
+option(SD845 "Set to ON if targeting a Snapragon 845 based device" ${SD845})
+option(LARCH64 "Set to ON if targeting an Loongarch64 based device" ${LARCH64})
 option(USE_CCACHE "Set to ON to use ccache if present in the system" ${USE_CCACHE})
 option(HAVE_TRACE "Set to ON to have Trace ability (needs ZydisInfo library)" ${HAVE_TRACE})
+option(NOLOADADDR "Set to ON to avoid fixing the load address of Box64" OFF)
 option(NOGIT "Set to ON if not building from a git clone repo (like when building from a zip download from github)" ${NOGIT})
-if(RK3399 OR RPI4ARM64)
+if(LARCH64)
+    set(LD80BITS OFF CACHE BOOL "")
+    set(NOALIGN OFF CACHE BOOL "")
+    set(ARM_DYNAREC OFF CACHE BOOL "")  
+endif()
+if(RK3399 OR RPI4ARM64 OR RK3326 OR TEGRAX1 OR PHYTIUM OR SD845)
     set(LD80BITS OFF CACHE BOOL "")
     set(NOALIGN OFF CACHE BOOL "")
     set(ARM_DYNAREC ON CACHE BOOL "")
@@ -34,7 +50,7 @@ project(box64 C ASM)
 
 enable_testing()
 
-set(default_build_type "RelwithDebInfo")
+set(default_build_type "RelWithDebInfo")
 if(NOT CMAKE_BUILD_TYPE AND NOT CMAKE_CONFIGURATION_TYPES)
   message(STATUS "Setting build type to '${default_build_type}' as none was specified.")
   set(CMAKE_BUILD_TYPE "${default_build_type}" CACHE STRING "Choose the type of build." FORCE)
@@ -44,13 +60,34 @@ endif()
 if(RPI4ARM64)
     add_definitions(-DRPI)
     add_definitions(-DRPI4ARM64)
-    add_definitions(-pipe -march=armv8-a+crc -mtune=cortex-a72 -mfpu=neon-fp-armv8)
-    set(CMAKE_ASM_FLAGS  "-pipe -march=armv8-a+crc -mtune=cortex-a72 -mfpu=neon-fp-armv8")
-endif()
-if(RK3399)
+    add_definitions(-pipe -march=armv8-a+crc -mtune=cortex-a72)
+    set(CMAKE_ASM_FLAGS  "-pipe -march=armv8-a+crc -mtune=cortex-a72")
+elseif(RK3326)
+    add_definitions(-DRK3326)
+    add_definitions(-pipe -march=armv8-a+crc+simd+crypto -mcpu=cortex-a35+crypto)
+    set(CMAKE_ASM_FLAGS  "-pipe -march=armv8-a+crc+simd+crypto -mcpu=cortex-a35+crypto")
+elseif(RK3399)
     add_definitions(-DRK3399)
     add_definitions(-pipe -march=armv8-a+crc+simd+crypto -mcpu=cortex-a72+crypto)
     set(CMAKE_ASM_FLAGS  "-pipe -march=armv8-a+crc+simd+crypto -mcpu=cortex-a72+crypto")
+elseif(TEGRAX1)
+    add_definitions(-DTEGRAX1)
+    add_definitions(-pipe -march=armv8-a+crc+simd+crypto -mcpu=cortex-a57+crypto)
+    set(CMAKE_ASM_FLAGS  "-pipe -march=armv8-a+crc+simd+crypto -mcpu=cortex-a57+crypto")
+elseif(PHYTIUM)
+    add_definitions(-DPHYSIUM)
+    add_definitions(-pipe -march=armv8.1-a+crc+simd+crypto)
+    set(CMAKE_ASM_FLAGS  "-pipe -march=armv8.1-a+crc+simd+crypto+aes")
+elseif(SD845)
+    add_definitions(-DSD845)
+    add_definitions(-pipe -march=armv8.2-a+simd+crypto -mtune=cortex-a75.cortex-a55)
+    set(CMAKE_ASM_FLAGS  "-pipe -march=armv8.2-a+simd+crypto -mtune=cortex-a75.cortex-a55")
+elseif(LARCH64)
+    add_definitions(-DLARCH64)
+    add_definitions(-pipe -march=loongarch64)
+    set(CMAKE_ASM_FLAGS  "-pipe -march=loongarch64")
+elseif(ARM_DYNAREC)
+    set(CMAKE_ASM_FLAGS  "-pipe -march=armv8-a+crc+simd+crypto")
 endif()
 
 if(NOGIT)
@@ -58,12 +95,13 @@ if(NOGIT)
 endif()
 
 if(HAVE_TRACE)
-    set(BOX64 box64t)
+    set(BOX64 box64)
 else()
     set(BOX64 box64)
 endif()
 
-set(BOX64_ELF_ADDRESS "0x500062800000")  #random load address...
+#set(BOX64_ELF_ADDRESS "0x500062800000")  #random load address...
+set(BOX64_ELF_ADDRESS "0x64800000")  #low address
 
 if(LD80BITS)
     add_definitions(-DHAVE_LD80BITS)
@@ -92,6 +130,8 @@ if(USE_CCACHE)
     if(CCACHE_FOUND)
         set_property(GLOBAL PROPERTY RULE_LAUNCH_COMPILE ccache)
         set_property(GLOBAL PROPERTY RULE_LAUNCH_LINK ccache)
+    else()
+        message(SEND_ERROR "ccache not found!")
     endif()
 endif()
 
@@ -112,6 +152,7 @@ set(ELFLOADER_SRC
     "${BOX64_ROOT}/src/box64context.c"
     "${BOX64_ROOT}/src/build_info.c"
     "${BOX64_ROOT}/src/custommem.c"
+    "${BOX64_ROOT}/src/mailbox.c"
     "${BOX64_ROOT}/src/dynarec/dynarec.c"
     "${BOX64_ROOT}/src/elfs/elfloader.c"
     "${BOX64_ROOT}/src/elfs/elfparser.c"
@@ -128,12 +169,18 @@ set(ELFLOADER_SRC
     "${BOX64_ROOT}/src/emu/x64run6664.c"
     "${BOX64_ROOT}/src/emu/x64run66d9.c"
     "${BOX64_ROOT}/src/emu/x64run66dd.c"
+    "${BOX64_ROOT}/src/emu/x64run66f0.c"
     "${BOX64_ROOT}/src/emu/x64run67.c"
+    "${BOX64_ROOT}/src/emu/x64run670f.c"
+    "${BOX64_ROOT}/src/emu/x64run6766.c"
+    "${BOX64_ROOT}/src/emu/x64run67660f.c"
     "${BOX64_ROOT}/src/emu/x64rund8.c"
     "${BOX64_ROOT}/src/emu/x64rund9.c"
     "${BOX64_ROOT}/src/emu/x64runda.c"
     "${BOX64_ROOT}/src/emu/x64rundb.c"
+    "${BOX64_ROOT}/src/emu/x64rundc.c"
     "${BOX64_ROOT}/src/emu/x64rundd.c"
+    "${BOX64_ROOT}/src/emu/x64runde.c"
     "${BOX64_ROOT}/src/emu/x64rundf.c"
     "${BOX64_ROOT}/src/emu/x64runf0.c"
     "${BOX64_ROOT}/src/emu/x64runf20f.c"
@@ -144,6 +191,9 @@ set(ELFLOADER_SRC
     "${BOX64_ROOT}/src/emu/x64trace.c"
     "${BOX64_ROOT}/src/librarian/librarian.c"
     "${BOX64_ROOT}/src/librarian/library.c"
+    "${BOX64_ROOT}/src/librarian/dictionnary.c"
+    "${BOX64_ROOT}/src/librarian/globalsymbols.c"
+    "${BOX64_ROOT}/src/librarian/symbols.c"
     "${BOX64_ROOT}/src/libtools/auxval.c"
     "${BOX64_ROOT}/src/libtools/myalign.c"
     "${BOX64_ROOT}/src/libtools/sdl1rwops.c"
@@ -154,6 +204,7 @@ set(ELFLOADER_SRC
     "${BOX64_ROOT}/src/tools/bridge.c"
     "${BOX64_ROOT}/src/tools/callback.c"
     "${BOX64_ROOT}/src/tools/my_cpuid.c"
+    "${BOX64_ROOT}/src/tools/gtkclass.c"
     "${BOX64_ROOT}/src/tools/pathcoll.c"
     "${BOX64_ROOT}/src/tools/fileutils.c"
     "${BOX64_ROOT}/src/tools/wine_tools.c"
@@ -163,39 +214,133 @@ set(ELFLOADER_SRC
 set(WRAPPEDS
     "${BOX64_ROOT}/src/wrapped/wrappedalure.c"
     "${BOX64_ROOT}/src/wrapped/wrappedalut.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedatk.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedatkbridge.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedatspi.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedbz2.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedcairo.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedcrashhandler.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedcrypto.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedcurl.c"
+    "${BOX64_ROOT}/src/wrapped/wrappeddbus.c"
+    "${BOX64_ROOT}/src/wrapped/wrappeddbusglib1.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedexpat.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedflac.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedfontconfig.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedfreetype.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedgconf2.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedgdkpixbuf2.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedgdkx112.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedgio2.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedglib2.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedgmodule2.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedgnutls.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedgobject2.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedgssapi.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedgssapikrb5.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedgthread2.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedgtkx112.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedkrb5.c"
     "${BOX64_ROOT}/src/wrapped/wrappedldlinux.c"
     "${BOX64_ROOT}/src/wrapped/wrappedlibasound.c"
     "${BOX64_ROOT}/src/wrapped/wrappedlibc.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedlibcrypt.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedlibcups.c"
     "${BOX64_ROOT}/src/wrapped/wrappedlibdl.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedlibform.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedlibformw.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedlibfuse.c"
     "${BOX64_ROOT}/src/wrapped/wrappedlibgl.c"
     "${BOX64_ROOT}/src/wrapped/wrappedlibglu.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedlibice.c"
     "${BOX64_ROOT}/src/wrapped/wrappedlibm.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedlibncurses.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedlibncurses6.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedlibncursesw.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedlibncursesw6.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedlibogg.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedlibpanel.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedlibpcre.c"
     "${BOX64_ROOT}/src/wrapped/wrappedlibpthread.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedlibresolv.c"
     "${BOX64_ROOT}/src/wrapped/wrappedlibrt.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedlibsm.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedlibsndfile.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedlibssl.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedlibtinfo.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedlibtinfo6.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedlibuuid.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedlibvorbis.c"
     "${BOX64_ROOT}/src/wrapped/wrappedlibx11.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedlibx11xcb.c"
     "${BOX64_ROOT}/src/wrapped/wrappedlibxau.c"
     "${BOX64_ROOT}/src/wrapped/wrappedlibxcb.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedlibxcbglx.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedlibxcbkeysyms.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedlibxcbimage.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedlibxcbrandr.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedlibxcbshape.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedlibxcbshm.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedlibxcbxfixes.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedlibxcbxtest.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedlibxcomposite.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedlibxcursor.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedlibxdamage.c"
     "${BOX64_ROOT}/src/wrapped/wrappedlibxdmcp.c"
     "${BOX64_ROOT}/src/wrapped/wrappedlibxext.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedlibxfixes.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedlibxft.c"
     "${BOX64_ROOT}/src/wrapped/wrappedlibxi.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedlibxmu.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedlibxpm.c"
     "${BOX64_ROOT}/src/wrapped/wrappedlibxrandr.c"
     "${BOX64_ROOT}/src/wrapped/wrappedlibxrender.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedlibxss.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedlibxt.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedlibxtst.c"
     "${BOX64_ROOT}/src/wrapped/wrappedlibxxf86vm.c"
     "${BOX64_ROOT}/src/wrapped/wrappedlibz.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedlzma.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedmpg123.c"
+    "${BOX64_ROOT}/src/wrapped/wrappednsl.c"
+    "${BOX64_ROOT}/src/wrapped/wrappednspr4.c"
+    "${BOX64_ROOT}/src/wrapped/wrappednss3.c"
+    "${BOX64_ROOT}/src/wrapped/wrappednssutil3.c"
     "${BOX64_ROOT}/src/wrapped/wrappedopenal.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedpango.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedpangocairo.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedpangoft2.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedplc4.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedplds4.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedpng16.c"
     "${BOX64_ROOT}/src/wrapped/wrappedpulse.c"
     "${BOX64_ROOT}/src/wrapped/wrappedpulsesimple.c"
     "${BOX64_ROOT}/src/wrapped/wrappedsdl1.c"
     "${BOX64_ROOT}/src/wrapped/wrappedsdl1image.c"
     "${BOX64_ROOT}/src/wrapped/wrappedsdl1mixer.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedsdl1net.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedsdl1sound.c"
     "${BOX64_ROOT}/src/wrapped/wrappedsdl1ttf.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedsecret1.c"
     "${BOX64_ROOT}/src/wrapped/wrappedsmpeg.c"
     "${BOX64_ROOT}/src/wrapped/wrappedsdl2.c"
     "${BOX64_ROOT}/src/wrapped/wrappedsdl2image.c"
     "${BOX64_ROOT}/src/wrapped/wrappedsdl2mixer.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedsdl2net.c"
     "${BOX64_ROOT}/src/wrapped/wrappedsdl2ttf.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedselinux.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedsmime3.c"
     "${BOX64_ROOT}/src/wrapped/wrappedsmpeg2.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedssl3.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedtcmallocminimal.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedudev0.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedudev1.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedutil.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedvorbisfile.c"
     "${BOX64_ROOT}/src/wrapped/wrappedxinerama.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedxkbcommon.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedxkbcommonx11.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedxml2.c"
 )
 
 #set(WRAPPEDS_HEAD "${BOX64_ROOT}/src/wrapped/wrappedd3dadapter9_gen.h")
@@ -209,9 +354,9 @@ set(WRAPPER "${BOX64_ROOT}/src/wrapped/generated/wrapper.c" "${BOX64_ROOT}/src/w
 
 add_custom_command(
     OUTPUT "${BOX64_ROOT}/src/wrapped/generated/functions_list.txt"
-    COMMAND "${PYTHON_EXECUTABLE}" "${BOX64_ROOT}/rebuild_wrappers.py" 
-    "${BOX64_ROOT}" 
-    "PANDORA" "HAVE_LD80BITS" "NOALIGN" "HAVE_TRACE" "--" 
+    COMMAND "${PYTHON_EXECUTABLE}" "${BOX64_ROOT}/rebuild_wrappers.py"
+    "${BOX64_ROOT}"
+    "PANDORA" "HAVE_LD80BITS" "NOALIGN" "HAVE_TRACE" "--"
     ${WRAPPEDS_HEAD}
     MAIN_DEPENDENCY "${BOX64_ROOT}/rebuild_wrappers.py"
     DEPENDS ${WRAPPEDS} ${WRAPPEDS_HEAD}
@@ -256,16 +401,17 @@ if(ARM_DYNAREC)
     #"${BOX64_ROOT}/src/dynarec/dynarec_arm64_65.c"
     "${BOX64_ROOT}/src/dynarec/dynarec_arm64_66.c"
     "${BOX64_ROOT}/src/dynarec/dynarec_arm64_67.c"
-    #"${BOX64_ROOT}/src/dynarec/dynarec_arm64_d8.c"
-    #"${BOX64_ROOT}/src/dynarec/dynarec_arm64_d9.c"
+    "${BOX64_ROOT}/src/dynarec/dynarec_arm64_d8.c"
+    "${BOX64_ROOT}/src/dynarec/dynarec_arm64_d9.c"
     #"${BOX64_ROOT}/src/dynarec/dynarec_arm64_da.c"
-    #"${BOX64_ROOT}/src/dynarec/dynarec_arm64_db.c"
-    #"${BOX64_ROOT}/src/dynarec/dynarec_arm64_dc.c"
-    #"${BOX64_ROOT}/src/dynarec/dynarec_arm64_dd.c"
+    "${BOX64_ROOT}/src/dynarec/dynarec_arm64_db.c"
+    "${BOX64_ROOT}/src/dynarec/dynarec_arm64_dc.c"
+    "${BOX64_ROOT}/src/dynarec/dynarec_arm64_dd.c"
     #"${BOX64_ROOT}/src/dynarec/dynarec_arm64_de.c"
-    #"${BOX64_ROOT}/src/dynarec/dynarec_arm64_df.c"
+    "${BOX64_ROOT}/src/dynarec/dynarec_arm64_df.c"
     "${BOX64_ROOT}/src/dynarec/dynarec_arm64_f0.c"
     "${BOX64_ROOT}/src/dynarec/dynarec_arm64_660f.c"
+    "${BOX64_ROOT}/src/dynarec/dynarec_arm64_6664.c"
     "${BOX64_ROOT}/src/dynarec/dynarec_arm64_f20f.c"
     "${BOX64_ROOT}/src/dynarec/dynarec_arm64_f30f.c"
     )
@@ -287,9 +433,9 @@ if(ARM_DYNAREC)
     add_dependencies(arm64_pass2 WRAPPERS)
     add_dependencies(arm64_pass3 WRAPPERS)
 
-    add_library(dynarec STATIC 
-        $<TARGET_OBJECTS:dynarec_arm> 
-        $<TARGET_OBJECTS:arm64_pass0> 
+    add_library(dynarec STATIC
+        $<TARGET_OBJECTS:dynarec_arm>
+        $<TARGET_OBJECTS:arm64_pass0>
         $<TARGET_OBJECTS:arm64_pass1>
         $<TARGET_OBJECTS:arm64_pass2>
         $<TARGET_OBJECTS:arm64_pass3>
@@ -313,22 +459,40 @@ else()
 endif()
 
 add_executable(${BOX64} ${ELFLOADER_SRC} ${WRAPPEDS} "${BOX64_ROOT}/src/git_head.h")
+set_target_properties(${BOX64} PROPERTIES ENABLE_EXPORTS ON)
 add_dependencies(${BOX64} WRAPPERS)
 #add_dependencies(${BOX64} PRINTER)
-target_link_libraries(${BOX64} m dl rt pthread)
+target_link_libraries(${BOX64} c m dl rt pthread)
 if(ARM_DYNAREC)
     target_link_libraries(${BOX64} dynarec)
 endif()
 
 if(${CMAKE_VERSION} VERSION_LESS "3.13")
-    set_target_properties(${BOX64} PROPERTIES LINK_FLAGS "-rdynamic -Wl,-Ttext-segment,${BOX64_ELF_ADDRESS}")
+    if(NOT NOLOADADDR)
+        if(CMAKE_C_COMPILER_ID STREQUAL "Clang")
+            set_target_properties(${BOX64} PROPERTIES LINK_FLAGS "-Wl,--image-base=${BOX64_ELF_ADDRESS}")
+        else()
+            set_target_properties(${BOX64} PROPERTIES LINK_FLAGS "-Wl,-Ttext-segment,${BOX64_ELF_ADDRESS}")
+        endif()
+    endif()
 else()
-    target_link_options(${BOX64} PUBLIC -rdynamic)
-    target_link_options(${BOX64} PUBLIC -Wl,-Ttext-segment,${BOX64_ELF_ADDRESS})
+    # If symbols are missing, try this: target_link_options(${BOX64} PUBLIC -rdynamic)
+    if(NOT NOLOADADDR)
+        if(CMAKE_C_COMPILER_ID STREQUAL "Clang")
+            target_link_options(${BOX64} PUBLIC LINKER:--image-base=${BOX64_ELF_ADDRESS})
+        else()
+            target_link_options(${BOX64} PUBLIC LINKER:-Ttext-segment,${BOX64_ELF_ADDRESS})
+        endif()
+    endif()
 endif()
 
 string(COMPARE EQUAL "${CMAKE_HOST_SYSTEM_PROCESSOR}" "i686"  _x86)
 string(COMPARE EQUAL "${CMAKE_HOST_SYSTEM_PROCESSOR}" "x86_64"  _x86_64)
+string(COMPARE EQUAL "${CMAKE_HOST_SYSTEM_PROCESSOR}" "aarch64"  _aarch64)
+
+if(_x86_64 OR _aarch64)
+  add_definitions(-DCONFIG_64BIT)
+endif()
 
 if(NOT _x86 AND NOT _x86_64)
   install(TARGETS ${BOX64}
@@ -349,6 +513,36 @@ if(NOT TARGET uninstall)
         COMMAND ${CMAKE_COMMAND} -P ${CMAKE_CURRENT_BINARY_DIR}/cmake_uninstall.cmake)
 endif()
 
+set(CPACK_GENERATOR "DEB")
+set(CPACK_DEBIAN_PACKAGE_MAINTAINER "ptitSeb")
+set(CPACK_PACKAGE_CONTACT "[email protected]")
+set(CPACK_PACKAGE_DESCRIPTION "Box64 - Linux Userspace x86_64 Emulator with a twist")
+set(CPACK_DEBIAN_PACKAGE_DEPENDS "libc6")
+set(CPACK_PACKAGE_HOMEPAGE_URL, "https://box86.org")
+file(STRINGS "${BOX64_ROOT}/src/box64version.h" TEMP_STRING REGEX "BOX64_MAJOR\\s*")
+string(REGEX REPLACE "BOX64_MAJOR" "" TEMP_STRING ${TEMP_STRING})
+string(REGEX MATCH "[0-9]" BOX64_MAJOR ${TEMP_STRING})
+file(STRINGS "${BOX64_ROOT}/src/box64version.h" TEMP_STRING REGEX "BOX64_MINOR\\s*")
+string(REGEX REPLACE "BOX64_MINOR" "" TEMP_STRING ${TEMP_STRING})
+string(REGEX MATCH "[0-9]" BOX64_MINOR ${TEMP_STRING})
+file(STRINGS "${BOX64_ROOT}/src/box64version.h" TEMP_STRING REGEX "BOX64_REVISION\\s*")
+string(REGEX REPLACE "BOX64_REVISION" "" TEMP_STRING ${TEMP_STRING})
+string(REGEX MATCH "[0-9]" BOX64_REVISION ${TEMP_STRING})
+set(CPACK_PACKAGE_VERSION_MAJOR ${BOX64_MAJOR})
+set(CPACK_PACKAGE_VERSION_MINOR ${BOX64_MINOR})
+set(CPACK_PACKAGE_VERSION_PATCH ${BOX64_REVISION})
+set(CPACK_DEBIAN_PACKAGE_CONTROL_EXTRA "${CMAKE_CURRENT_SOURCE_DIR}/postinst")
+if(_aarch64)
+    set(CPACK_DEBIAN_PACKAGE_ARCHITECTURE "arm64")
+elseif(_x86_64)
+    set(CPACK_DEBIAN_PACKAGE_ARCHITECTURE "x86_64")
+else()
+    #probably wrong...
+    execute_process(COMMAND "dpkg --print-architecture" OUTPUT_VARIABLE CPACK_DEBIAN_PACKAGE_ARCHITECTURE)
+endif()
+set(CPACK_DEBIAN_FILE_NAME "${BOX64}-${BOX64_MAJOR}.${BOX64_MINOR}.${BOX64_REVISION}_Linux-${CPACK_DEBIAN_PACKAGE_ARCHITECTURE}.deb")
+INCLUDE(CPack)
+
 add_test(test01 ${CMAKE_COMMAND} -D TEST_PROGRAM=${CMAKE_BINARY_DIR}/${BOX64} 
     -D TEST_ARGS=${CMAKE_SOURCE_DIR}/tests/test01 -D TEST_OUTPUT=tmpfile.txt 
     -D TEST_REFERENCE=${CMAKE_SOURCE_DIR}/tests/ref01.txt
@@ -424,6 +618,21 @@ add_test(test15 ${CMAKE_COMMAND} -D TEST_PROGRAM=${CMAKE_BINARY_DIR}/${BOX64}
     -D TEST_REFERENCE=${CMAKE_SOURCE_DIR}/tests/ref15.txt
     -P ${CMAKE_SOURCE_DIR}/runTest.cmake )
 
+add_test(test16 ${CMAKE_COMMAND} -D TEST_PROGRAM=${CMAKE_BINARY_DIR}/${BOX64} 
+    -D TEST_ARGS=${CMAKE_SOURCE_DIR}/tests/test16 -D TEST_OUTPUT=tmpfile.txt 
+    -D TEST_REFERENCE=${CMAKE_SOURCE_DIR}/tests/ref16.txt
+    -P ${CMAKE_SOURCE_DIR}/runTest.cmake )
+
+add_test(test17 ${CMAKE_COMMAND} -D TEST_PROGRAM=${CMAKE_BINARY_DIR}/${BOX64} 
+    -D TEST_ARGS=${CMAKE_SOURCE_DIR}/tests/test17 -D TEST_OUTPUT=tmpfile.txt 
+    -D TEST_REFERENCE=${CMAKE_SOURCE_DIR}/tests/ref17.txt
+    -P ${CMAKE_SOURCE_DIR}/runTest.cmake )
+
+add_test(aes ${CMAKE_COMMAND} -D TEST_PROGRAM=${CMAKE_BINARY_DIR}/${BOX64} 
+    -D TEST_ARGS=${CMAKE_SOURCE_DIR}/tests/test18 -D TEST_OUTPUT=tmpfile.txt 
+    -D TEST_REFERENCE=${CMAKE_SOURCE_DIR}/tests/ref18.txt
+    -P ${CMAKE_SOURCE_DIR}/runTest.cmake )
+
 file(GLOB extension_tests "${CMAKE_SOURCE_DIR}/tests/extensions/*.c")
 foreach(file ${extension_tests})
     get_filename_component(testname "${file}" NAME_WE)

COMPILE.md

@@ -1,75 +0,0 @@
-Compiling
-----
-#### for RK3399
-
-Using a 64bits OS:
-```
-git clone https://github.com/ptitSeb/box64
-cd box64
-mkdir build; cd build; cmake .. -DRK3399=1 -DCMAKE_BUILD_TYPE=RelWithDebInfo
-make -j4
-sudo make install
-```
-If it's the first install, you also need:
-```
-sudo systemctl restart systemd-binfmt
-```
-
-#### for PI4
-
-Warning, you need a 64bits OS:
-
-```
-git clone https://github.com/ptitSeb/box64
-cd box64
-mkdir build; cd build; cmake .. -DRPI4ARM64=1 -DCMAKE_BUILD_TYPE=RelWithDebInfo
-make -j4
-sudo make install
-```
-If it's the first install, you also need:
-```
-sudo systemctl restart systemd-binfmt
-```
-
-#### for Other ARM64 Linux platforms
-
- `mkdir build; cd build; cmake .. -DARM_DYNAREC=ON -DCMAKE_BUILD_TYPE=RelWithDebInfo; make -j$(nproc)`
-
-#### for x86_64 Linux
-
- `mkdir build; cd build; cmake .. -DLD80BITS=1 -DNOALIGN=1 -DCMAKE_BUILD_TYPE=RelWithDebInfo; make -j$(nproc)`
-
-#### use ccmake
-
-Alternatively, you can use the curses-bases ccmake (or any other gui frontend for cmake) to select wich platform to use interactively.
-
-#### Customize your build
-
-*use ccache if you have it* 
-
-Add `-DUSE_CCACHE=1` if you have ccache (it's better if you plan to touch the sources)
-
-*have some debug info* 
-
-The `-DCMAKE_BUILD_TYPE=RelWithDebInfo` argument makes a build that is both optimized for speed, and has debug information embedded. That way, if you have a crash or try to analyse performance, you'll have some symbols.
-
-*to have a Trace Enabled build* 
-
-To have a trace enabled build ( ***it will be slower***), add `-DHAVE_TRACE=1` but you will need, at runtime, to have the [Zydis library](https://github.com/zyantific/zydis) library in your `LD_LIBRARY_PATH` or in the system library folders.
-
-*to have ARM Dynarec*
-
-The Dynarec is only available on the ARM architecture(Right now, anyways.). Notes also that VFPv3 and NEON are required for the Dynarec. Activate it by using `-DARM_DYNAREC=1`. Also, be sure to use `-marm` in compilation flags (because many compileur use Thumb as default, and the dynarec will not work in this mode).
-
-*not building from a git clone*
-
-If you are not building from a git clone (for example, downloading a release source zipped from github), you need to activate `-DNOGIT=1` from cmake to be able to build (normal process include git sha1 of HEAD in the version that box64 print).
-
-----
-
-Testing
-----
-A few tests are included.
-They can be launched with `ctest`
-They are very basic and don't test much for now.
-

LLVMprivateGenerator/Makefile

@@ -0,0 +1,12 @@
+all: dumpSigs
+
+dumpSigs: main.o registered_structs.o
+	g++ -g3 -std=gnu++17 -fno-rtti main.o registered_structs.o -o dumpSigs "-L$(LLVM_install_dir)/lib" -lclang-cpp -lclangTooling -Wl,-rpath "-Wl,$(LLVM_install_dir)/lib"
+
+main.o: main.cpp
+	g++ -g3 -std=gnu++17 -fno-rtti -c main.cpp -Wfatal-errors "-I$(LLVM_install_dir)/include" -o main.o
+registered_structs.o: registered_structs.cpp
+	g++ -g3 -std=gnu++17 -fno-rtti -c registered_structs.cpp -Wfatal-errors -o registered_structs.o
+
+clean:
+	$(RM) dumpSigs main.o registered_structs.o

LLVMprivateGenerator/main.cpp

@@ -0,0 +1,458 @@
+#include <algorithm>
+#include <fstream>
+#include <iostream>
+#include <numeric>
+#include <unordered_map>
+#include <utility>
+#include <vector>
+
+#include <llvm/Support/raw_ostream.h>
+#include <clang/AST/ASTConsumer.h>
+#include <clang/AST/Decl.h>
+#include <clang/AST/Mangle.h>
+#include <clang/AST/PrettyPrinter.h>
+#include <clang/AST/RecursiveASTVisitor.h>
+#include <clang/Frontend/CompilerInstance.h>
+#include <clang/Frontend/FrontendActions.h>
+#include <clang/Tooling/CommonOptionsParser.h>
+#include <clang/Tooling/Tooling.h>
+
+clang::MangleContext *mangler = nullptr;
+
+std::unordered_map<std::string, std::pair<std::string, bool>> funMap;
+std::vector<std::string> funList;
+
+bool isTypeTrivial(const clang::QualType &q, const clang::QualType *qorig);
+clang::QualType getPointedType(const clang::QualType q) {
+	if (const clang::PointerType *p = q->getAs<clang::PointerType>())
+		return getPointedType(p->getPointeeType());
+	else if (const clang::ReferenceType *r = q->getAs<clang::ReferenceType>())
+		return getPointedType(r->getPointeeType());
+	else
+		return q;
+}
+
+std::string record2name(const clang::RecordDecl &q, const clang::QualType *qorig) {
+	std::string s = q.getNameAsString();
+	if (s == "") {
+		if (!qorig) return "????.!";
+		if (const clang::TypedefType *tt = (*qorig)->getAs<clang::TypedefType>()) {
+			// Typedef
+			if (clang::TypedefNameDecl *td = tt->getDecl()) {
+				return td->getNameAsString();
+			} else {
+				return "<typedef with no declaration>";
+			}
+		} else {
+			return std::string("<unknown type ") + (*qorig)->getTypeClassName() + ">";
+		}
+	} else {
+		return s;
+	}
+}
+
+char ptr2char(const std::string &str) __attribute__((const));
+const char *ptr2str(const std::string &str) __attribute__((const));
+char type2char(const clang::QualType &qual /* Canonical */, const clang::QualType *qorig) {
+	if (qual->isBuiltinType()) {
+		switch (static_cast<const clang::BuiltinType&>(*qual).getKind()) {
+		case clang::BuiltinType::Kind::Void:
+			return 'v';
+		case clang::BuiltinType::Kind::Bool:
+			return 'i';
+		case clang::BuiltinType::Kind::Char_U:
+			return 'C';
+		case clang::BuiltinType::Kind::Char_S:
+			return 'c';
+		case clang::BuiltinType::Kind::Char8:
+			return 'c';
+		case clang::BuiltinType::Kind::UChar:
+			return 'C';
+		case clang::BuiltinType::Kind::SChar:
+			return 'c';
+		case clang::BuiltinType::Kind::WChar_U:
+			return 'W';
+		case clang::BuiltinType::Kind::UShort:
+			return 'W';
+		case clang::BuiltinType::Kind::WChar_S:
+			return 'w';
+		case clang::BuiltinType::Kind::Char16:
+			return 'w';
+		case clang::BuiltinType::Kind::Short:
+			return 'w';
+		case clang::BuiltinType::Kind::UInt:
+			return 'u';
+		case clang::BuiltinType::Kind::Char32:
+			return 'i';
+		case clang::BuiltinType::Kind::Int:
+			return 'i';
+		case clang::BuiltinType::Kind::ULong:
+			return 'L';
+		case clang::BuiltinType::Kind::Long:
+			return 'l';
+		case clang::BuiltinType::Kind::ULongLong:
+			return 'U';
+		case clang::BuiltinType::Kind::LongLong:
+			return 'I';
+		case clang::BuiltinType::Kind::UInt128:
+			return 'H';
+		case clang::BuiltinType::Kind::Int128:
+			return 'H';
+		case clang::BuiltinType::Kind::Float:
+			return 'f';
+		case clang::BuiltinType::Kind::Double:
+			return 'd';
+		case clang::BuiltinType::Kind::LongDouble:
+			return 'D';
+		case clang::BuiltinType::Kind::NullPtr:
+			return 'p'; // nullptr_t
+		
+		case clang::BuiltinType::Kind::Half:
+		case clang::BuiltinType::Kind::BFloat16:
+		case clang::BuiltinType::Kind::ShortAccum:
+		case clang::BuiltinType::Kind::Accum:
+		case clang::BuiltinType::Kind::LongAccum:
+		case clang::BuiltinType::Kind::UShortAccum:
+		case clang::BuiltinType::Kind::UAccum:
+		case clang::BuiltinType::Kind::ULongAccum:
+		case clang::BuiltinType::Kind::ShortFract:
+		case clang::BuiltinType::Kind::Fract:
+		case clang::BuiltinType::Kind::LongFract:
+		case clang::BuiltinType::Kind::UShortFract:
+		case clang::BuiltinType::Kind::UFract:
+		case clang::BuiltinType::Kind::ULongFract:
+		case clang::BuiltinType::Kind::SatShortAccum:
+		case clang::BuiltinType::Kind::SatAccum:
+		case clang::BuiltinType::Kind::SatLongAccum:
+		case clang::BuiltinType::Kind::SatUShortAccum:
+		case clang::BuiltinType::Kind::SatUAccum:
+		case clang::BuiltinType::Kind::SatULongAccum:
+		case clang::BuiltinType::Kind::SatShortFract:
+		case clang::BuiltinType::Kind::SatFract:
+		case clang::BuiltinType::Kind::SatLongFract:
+		case clang::BuiltinType::Kind::SatUShortFract:
+		case clang::BuiltinType::Kind::SatUFract:
+		case clang::BuiltinType::Kind::SatULongFract:
+		case clang::BuiltinType::Kind::Float16:
+		case clang::BuiltinType::Kind::Float128:
+		case clang::BuiltinType::Kind::Overload:
+		case clang::BuiltinType::Kind::BoundMember:
+		case clang::BuiltinType::Kind::PseudoObject:
+		case clang::BuiltinType::Kind::Dependent:
+		case clang::BuiltinType::Kind::UnknownAny:
+		case clang::BuiltinType::Kind::ARCUnbridgedCast:
+		case clang::BuiltinType::Kind::BuiltinFn:
+		case clang::BuiltinType::Kind::ObjCId:
+		case clang::BuiltinType::Kind::ObjCClass:
+		case clang::BuiltinType::Kind::ObjCSel:
+#define IMAGE_TYPE(it, id, si, a, s) case clang::BuiltinType::Kind::id:
+#include <clang/Basic/OpenCLImageTypes.def>
+#undef IMAGE_TYPE
+		case clang::BuiltinType::Kind::OCLSampler:
+		case clang::BuiltinType::Kind::OCLEvent:
+		case clang::BuiltinType::Kind::OCLClkEvent:
+		case clang::BuiltinType::Kind::OCLQueue:
+		case clang::BuiltinType::Kind::OCLReserveID:
+		case clang::BuiltinType::Kind::IncompleteMatrixIdx:
+		case clang::BuiltinType::Kind::OMPArraySection:
+		case clang::BuiltinType::Kind::OMPArrayShaping:
+		case clang::BuiltinType::Kind::OMPIterator:
+#define EXT_OPAQUE_TYPE(et, id, e) case clang::BuiltinType::Kind::id:
+#include <clang/Basic/OpenCLExtensionTypes.def>
+#define SVE_TYPE(n, id, si) case clang::BuiltinType::Kind::id:
+#include <clang/Basic/AArch64SVEACLETypes.def>
+#define PPC_VECTOR_TYPE(n, id, s) case clang::BuiltinType::Kind::id:
+#include <clang/Basic/PPCTypes.def>
+#undef EXT_OPAQUE_TYPE
+#undef SVE_TYPE
+#undef PPC_VECTOR_TYPE
+			return '!';
+		default:
+			return ':';
+		}
+	} else if (qual->isEnumeralType()) {
+		const clang::EnumDecl *ed = qual->getAs<clang::EnumType>()->getDecl();
+		if (!ed) {
+			return 'i';
+		} else {
+			return type2char(ed->getIntegerType().getCanonicalType(), qorig);
+		}
+	} else if (qual->isFunctionPointerType()) {
+		return '@';
+	} else if (qual->isAnyPointerType() || qual->isReferenceType()) {
+		const clang::QualType &pointed = getPointedType(qual);
+		if (isTypeTrivial(pointed, qorig)) {
+			return 'p';
+		} else if (const clang::RecordType *rct = pointed->getAs<clang::RecordType>()) {
+			clang::RecordDecl *rc = rct->getDecl();
+			if (!rc) {
+				return '!';
+			} else if (!rc->isCompleteDefinition()) {
+				return 'p';
+			} else {
+				std::string str;
+				if (qorig) {
+					const clang::QualType qpted = getPointedType(*qorig);
+					str = record2name(*rc, &qpted);
+				} else {
+					str = record2name(*rc, nullptr);
+				}
+				char ret = ptr2char(str);
+				if (ret) return ret;
+				else {
+					return '!';
+				}
+			}
+		} else {
+			return '!';
+		}
+	} else if (const clang::RecordType *rct = qual->getAs<clang::RecordType>()) {
+		clang::RecordDecl *rc = rct->getDecl();
+		if (!rc) {
+			return '?';
+		} else if (rc->getNameAsString() == "__builtin_va_list") {
+			// va_list
+			return 'A';
+		} else {
+			return '?';
+		}
+	} else {
+		return '?';
+	}
+}
+bool isTypeTrivial(const clang::QualType &q, const clang::QualType *qorig) {
+	const char c = type2char(q, qorig);
+#define GO(chr) || (c == chr)
+	return (c == 'v')
+		GO('i') GO('u')
+		GO('I') GO('U')
+		GO('l') GO('L')
+		GO('f') GO('d')
+		GO('D') GO('K')
+		GO('0') GO('1')
+		GO('C') GO('c')
+		GO('W') GO('w')
+		GO('H')
+		GO('p');
+#undef GO
+}
+bool isTypeValid(const clang::QualType &q, const clang::QualType *qorig) {
+	const char c = type2char(q, qorig);
+	if (c == 'A') return false;
+	if (c == 'V') return false;
+	return ((c >= '0') && (c <= '9')) || ((c >= 'A') && (c <= 'Z')) || ((c >= 'a') && (c <= 'z'));
+}
+
+const std::string type2string(const clang::QualType &qual, const clang::QualType *qorig) {
+	if (qual->isBuiltinType()) {
+		return std::string("(builtin) ") + static_cast<const clang::BuiltinType&>(*qual).getName(clang::PrintingPolicy{{}}).data();
+	} else if (qual->isFunctionPointerType()) {
+		return "Callback (function pointer)";
+	} else if (qual->isAnyPointerType() || qual->isReferenceType()) {
+		std::string prefix = qual->isAnyPointerType() ? "Pointer to " : "Reference to ";
+		const clang::QualType &pointed = getPointedType(qual);
+		if (isTypeTrivial(pointed, qorig)) {
+			return prefix + "trivial object " + type2string(pointed, qorig) + " (" + type2char(pointed, qorig) + ")";
+		} else if (const clang::RecordType *rct = pointed->getAs<clang::RecordType>()) {
+			clang::RecordDecl *rc = rct->getDecl();
+			if (!rc) {
+				return prefix + "unknown record";
+			} else if (!rc->isCompleteDefinition()) {
+				return prefix + "incomplete record " + rc->getNameAsString();
+			} else {
+				std::string str;
+				if (qorig) {
+					const clang::QualType qpted = getPointedType(*qorig);
+					str = record2name(*rc, &qpted);
+				} else {
+					str = record2name(*rc, nullptr);
+				}
+				const char *ret = ptr2str(str);
+				if (ret[0] != '\0') {
+					return prefix + ret;
+				} else {
+					if (mangler && mangler->shouldMangleDeclName(rc)) {
+						std::string mangled;
+						{
+							llvm::raw_string_ostream strstr{mangled};
+							mangler->mangleName(rc, strstr);
+						}
+						return prefix + "unknown record " + str + " (=== " + mangled + ")";
+					} else {
+						return prefix + "unknown record " + str;
+					}
+				}
+			}
+		} else {
+			return prefix + "non-trivial or typedef'ed object " + type2string(pointed, qorig) + " (" + type2char(pointed, qorig) + ")";
+			//return "Pointer (maybe to callback)";
+		}
+	} else if (qual->isEnumeralType()) {
+		const clang::EnumDecl *ed = qual->getAs<clang::EnumType>()->getDecl();
+		if (!ed) {
+			return "Enumeration with unknown underlying integer type (assuming int)";
+		} else {
+			return "Enumeration with underlying type " + type2string(ed->getIntegerType().getCanonicalType(), nullptr);
+		}
+	} else if (const clang::RecordType *rct = qual->getAs<clang::RecordType>()) {
+		clang::RecordDecl *rc = rct->getDecl();
+		if (!rc) {
+			return "Unknown record";
+		} else if (rc->getNameAsString() == "__builtin_va_list") {
+			return "va_list";
+		} else {
+			return "Unknown record " + std::string(rc->getName().data());
+		}
+	} else {
+		return std::string("??? ") + qual->getTypeClassName();
+	}
+}
+
+class Visitor : public clang::RecursiveASTVisitor<Visitor> {
+public:
+	clang::ASTContext &context;
+	
+	bool shouldVisitTemplateInstantiations() const /* override */ { return true; }
+	
+	Visitor(clang::CompilerInstance &ci) : context(ci.getASTContext()) {
+		if (!mangler) {
+			mangler = clang::ItaniumMangleContext::create(context, ci.getDiagnostics());
+		}
+	}
+	
+	~Visitor() {
+		if (mangler) {
+			delete mangler;
+			mangler = nullptr;
+		}
+	}
+	
+	bool VisitDecl(clang::Decl *decl) /* override */ {
+		std::cerr << std::flush;
+		if (!decl) return true;
+		
+		if ((decl->getKind() >= clang::Decl::Kind::firstFunction) && (decl->getKind() <= clang::Decl::Kind::lastFunction)) {
+			clang::DeclaratorDecl *ddecl = static_cast<clang::DeclaratorDecl*>(decl);
+			std::cout << "Function detected!\n";
+			
+			std::string funName{ddecl->getName()};
+			
+			auto niceprint = [](const std::string &infotype, const auto &dat){ std::cout << "    " << infotype << ": " << dat << "\n"; };
+			niceprint("Function name", funName);
+			if (mangler && mangler->shouldMangleDeclName(ddecl)) {
+				std::string mangled;
+				{
+					llvm::raw_string_ostream strstr{mangled};
+					mangler->mangleName(ddecl, strstr);
+				}
+				niceprint("Function mangled name", mangled);
+				funName = std::move(mangled);
+			}
+			
+			bool valid;
+			std::string funTypeStr{""};
+			if (ddecl->getFunctionType()->isFunctionNoProtoType()) {
+				const clang::FunctionNoProtoType *funType = static_cast<const clang::FunctionNoProtoType*>(ddecl->getFunctionType());
+				const auto &retType = funType->getReturnType();
+				
+				niceprint("Function return type", type2string(retType, &retType));
+				niceprint("Canonical function return type",
+					type2string(retType.getCanonicalType(), &retType) +
+					" (" + type2char(retType.getCanonicalType(), &retType) + ")");
+				niceprint("Is sugared", funType->isSugared());
+				if (funType->isSugared()) {
+					clang::QualType qft{funType, 0};
+					niceprint("Desugared", type2string(funType->desugar(), &qft));
+				}
+				
+				funTypeStr = type2char(retType.getCanonicalType(), &retType) + std::string("Fv");
+				valid = isTypeValid(retType.getCanonicalType(), &retType);
+			} else {
+				const clang::FunctionProtoType *funType = static_cast<const clang::FunctionProtoType*>(ddecl->getFunctionType());
+				const auto &retType = funType->getReturnType();
+				
+				niceprint("Function return type", type2string(retType, &retType));
+				niceprint("Canonical function return type",
+					type2string(retType.getCanonicalType(), &retType)
+					+ " (" + type2char(retType.getCanonicalType(), &retType) + ")");
+				niceprint("Parameter count", funType->getNumParams());
+				for (const clang::QualType &type : funType->getParamTypes()) {
+					niceprint("  " + type2string(type, &type),
+						type2string(type.getCanonicalType(), &type) + " (" + type2char(type.getCanonicalType(), &type) + ")");
+				}
+				niceprint("Variadic function", funType->isVariadic() ? "yes" : "no");
+				
+				funTypeStr =
+					type2char(retType.getCanonicalType(), &retType) +
+					((funType->getNumParams() == 0)
+					 ? std::string("Fv") : std::accumulate(funType->getParamTypes().begin(), funType->getParamTypes().end(), std::string("F"),
+											[](const std::string &acc, const clang::QualType &qual){ return acc + type2char(qual.getCanonicalType(), &qual); }));
+				if (funType->isVariadic()) funTypeStr += "V";
+				valid = !funType->isVariadic() &&
+					std::accumulate(funType->getParamTypes().begin(), funType->getParamTypes().end(), isTypeValid(retType.getCanonicalType(), &retType),
+						[](bool acc, const clang::QualType &qual){ return acc && isTypeValid(qual.getCanonicalType(), &qual); });
+			}
+			
+			niceprint("Conclusion", "");
+			niceprint("Function final name", funName);
+			niceprint("Function type", funTypeStr);
+			niceprint("Valid function type", valid ? "yes" : "no");
+			std::cout << "\n";
+			
+			funMap[funName] = std::make_pair(funTypeStr, valid);
+			funList.push_back(funName);
+		}
+		
+		return true;
+	}
+};
+
+class Consumer : public clang::ASTConsumer {
+public:
+	Visitor visitor;
+	
+	Consumer(clang::CompilerInstance &ci) : visitor(ci) {
+	}
+	
+	void HandleTranslationUnit(clang::ASTContext &context) override {
+		visitor.TraverseDecl(context.getTranslationUnitDecl());
+	}
+};
+
+class Action : public clang::ASTFrontendAction {
+public:
+	virtual std::unique_ptr<clang::ASTConsumer> CreateASTConsumer(clang::CompilerInstance &ci, llvm::StringRef inFile) override {
+		return std::make_unique<Consumer>(ci);
+	}
+};
+
+int main(int argc, const char **argv) {
+	if (argc < 2) {
+		std::cerr << "Usage: " << argv[0] << " (filenames) -- [-I...]" << std::endl;
+		return 2;
+	}
+	
+	/*int fakeargc = argc + 1;
+	const char **fakeargv = new const char*[fakeargc];
+	memcpy(fakeargv, argv, argc * sizeof(char*));
+	fakeargv[fakeargc - 1] = "--";*/
+	llvm::cl::OptionCategory opcat{""};
+	clang::tooling::CommonOptionsParser op{argc, argv, opcat};
+	std::vector<std::string> paths; for (int i = 1; i < argc; ++i) paths.push_back(argv[i]);
+	
+	clang::tooling::ClangTool tool{op.getCompilations(), paths};
+	
+	tool.run(clang::tooling::newFrontendActionFactory<Action>().get());
+	
+	std::cout << "Done, outputing output.h" << std::endl;
+	std::sort(funList.begin(), funList.end());
+	std::fstream file{"output.h", std::ios_base::out};
+	for (const std::string &funName : funList) {
+		if (!funMap[funName].second) {
+			file << "//";
+		}
+		file << "GO(" << funName << ", " << funMap[funName].first << ")\n";
+	}
+	
+	return 0;
+}

LLVMprivateGenerator/registered_structs.cpp

@@ -0,0 +1,267 @@
+#include <string>
+
+#define ALL START() \
+	/* libc */ \
+	STRUCT("_IO_FILE", "a FILE") \
+	STRUCT("_G_fpos_t", "a file position") \
+	STRUCT("sockaddr", "a socket address") \
+	STRUCT("itimerspec", "an itimerspec") \
+	STRUCT("timespec", "a timespec") \
+	STRUCT("itimerval", "an itimerval") \
+	STRUCT("timeval", "a timeval") \
+	STRUCT("timex", "a timex") \
+	STRUCT("timezone", "a timezone") \
+	STRUCT("dirent", "a dirent") \
+	STRUCT("dirent64", "a dirent64") \
+	STRUCT("__dirstream", "a dir stream") \
+	STRUCT("tm", "a time structure (tm)") \
+	STRUCT("cmsghdr", "a cmsghdr") \
+	STRUCT("msghdr", "a msghdr") \
+	STRUCT("rpcent", "an rpcent") \
+	STRUCT("random_data", "a random_data structure") \
+	STRUCT("drand48_data", "a drand48_data structure") \
+	STRUCT("termios", "a termios") \
+	STRUCT("iovec", "an iovec") \
+	STRUCT("file_handle", "a file handle") \
+	STRUCT("lconv", "an lconv") \
+	STRUCT("__locale_struct", "a locale structure") \
+	STRUCT("aliasent", "an alias") \
+	STRUCT("fstab", "an fstab") \
+	STRUCT("group", "a group") \
+	STRUCT("hostent", "a hostent") \
+	STRUCT("protoent", "a protoent") \
+	STRUCT("passwd", "a password") \
+	STRUCT("spwd", "an spwd") \
+	STRUCT("ttyent", "a ttyent") \
+	STRUCT("utmp", "an utmp structure") \
+	STRUCT("utmpx", "an utmpx structure") \
+	STRUCT("ifaddrs", "an ifaddrs structure") \
+	STRUCT("statfs", "a statfs structure") \
+	STRUCT("statfs64", "a statfs64 structure") \
+	STRUCT("statvfs", "a statvfs structure") \
+	STRUCT("statvfs64", "a statvfs64 structure") \
+	STRUCT("timeb", "a timeb structure") \
+	STRUCT("_ftsent", "an _ftsent structure") \
+	STRUCT("sysinfo", "a sysinfo structure") \
+	STRUCT("rlimit", "an rlimit structure") \
+	STRUCT("rlimit64", "an rlimit64 structure") \
+	STRUCT("rusage", "an rusage structure") \
+	STRUCT("entry", "an entry structure") \
+	STRUCT("pollfd", "a pollfd structure") \
+	STRUCT("re_pattern_buffer", "a re_pattern_buffer structure") \
+	STRUCT("sembuf", "a sembuf structure") \
+	STRUCT("tms", "a tms structure") \
+	STRUCT("utsname", "an utsname structure") \
+	STRUCT("utimbuf", "an utimbuf structure") \
+	STRUCT2("__va_list_tag", "__va_list_tag (aka, a va_list)", 'A') \
+	/* ncurses */ \
+	STRUCT("_win_st", "a _win_st structure") \
+	STRUCT("MEVENT", "an MEVENT structure") \
+	TYPEDEF("cchar_t", "a cchar_t") \
+	/* zlib */ \
+	STRUCT("gz_header_s", "a gz_header_s structure") \
+	STRUCT("gzFile_s", "a gzFile_s structure") \
+	STRUCT("z_stream_s", "a z_stream_s structure") \
+	\
+	END()
+
+#define START()
+#define STRUCT(s, ret) if (str == s) { return 'p'; } else
+#define STRUCT2(s, ret, c) if (str == s) { return c; } else
+#define TYPEDEF(s, ret) if (str == s) { return 'p'; } else
+#define END() { return 0; }
+char ptr2char(const std::string &str) {
+	/*if ((str == "_IO_FILE")
+	 || (str == "_G_fpos_t")
+	 || (str == "sockaddr")
+	 || (str == "itimerspec")
+	 || (str == "timespec")
+	 || (str == "itimerval")
+	 || (str == "timeval")
+	 || (str == "timex")
+	 || (str == "timezone")
+	 || (str == "dirent")
+	 || (str == "dirent64")
+	 || (str == "__dirstream")
+	 || (str == "tm")
+	 || (str == "cmsghdr")
+	 || (str == "msghdr")
+	 || (str == "rpcent")
+	 || (str == "random_data")
+	 || (str == "drand48_data")
+	 || (str == "termios")
+	 || (str == "iovec")
+	 || (str == "file_handle")
+	 || (str == "lconv")
+	 || (str == "__locale_struct")
+	 || (str == "aliasent")
+	 || (str == "fstab")
+	 || (str == "group")
+	 || (str == "hostent")
+	 || (str == "protoent")
+	 || (str == "passwd")
+	 || (str == "spwd")
+	 || (str == "ttyent")
+	 || (str == "utmp")
+	 || (str == "utmpx")
+	 || (str == "ifaddrs")
+	 || (str == "statfs")
+	 || (str == "statfs64")
+	 || (str == "statvfs")
+	 || (str == "timeb")
+	 || (str == "_ftsent")
+	 || (str == "sysinfo")
+	 || (str == "rlimit")
+	 || (str == "rlimit64")
+	 || (str == "rusage")
+	 || (str == "entry")
+	 || (str == "pollfd")
+	 || (str == "re_pattern_buffer")
+	 || (str == "sembuf")
+	 || (str == "tms")
+	 || (str == "utsname")
+	 || (str == "utimbuf")
+	// ncurses
+	 || (str == "_win_st")
+	 
+	 || (str == "cchar_t")
+	) {
+		// FILE*, fpos_t*, ...
+		return 'p';
+	} else if (str == "__va_list_tag") {
+		return 'A';
+	} else {
+		return 0;
+	}*/
+	ALL
+}
+#undef END
+#undef TYPEDEF
+#undef STRUCT2
+#undef STRUCT
+#undef START
+
+#define START()
+#define STRUCT(s, ret) if (str == s) { return ret; } else
+#define STRUCT2(s, ret, c) if (str == s) { return ret; } else
+#define TYPEDEF(s, ret) if (str == s) { return ret; } else
+#define END() return "";
+const char *ptr2str(const std::string &str) {
+	/*if (str == "_IO_FILE") {
+		return "a FILE";
+	} else if (str == "_G_fpos_t") {
+		return "a file position";
+	} else if (str == "sockaddr") {
+		return "a socket address";
+	} else if (str == "itimerspec") {
+		return "an itimerspec";
+	} else if (str == "timespec") {
+		return "a timespec";
+	} else if (str == "itimerval") {
+		return "an itimerval";
+	} else if (str == "timeval") {
+		return "a timeval";
+	} else if (str == "timex") {
+		return "a timex";
+	} else if (str == "timezone") {
+		return "a timezone";
+	} else if (str == "dirent") {
+		return "a dirent";
+	} else if (str == "dirent64") {
+		return "a dirent64";
+	} else if (str == "__dirstream") {
+		return "a dir stream";
+	} else if (str == "tm") {
+		return "a time structure (tm)";
+	} else if (str == "cmsghdr") {
+		return "a cmsghdr";
+	} else if (str == "msghdr") {
+		return "a msghdr";
+	} else if (str == "rpcent") {
+		return "an rpcent";
+	} else if (str == "random_data") {
+		return "a random_data structure";
+	} else if (str == "drand48_data") {
+		return "a drand48_data structure";
+	} else if (str == "termios") {
+		return "a termios";
+	} else if (str == "iovec") {
+		return "an iovec";
+	} else if (str == "file_handle") {
+		return "a file handle";
+	} else if (str == "lconv") {
+		return "an lconv";
+	} else if (str == "__locale_struct") {
+		return "a locale structure";
+	} else if (str == "aliasent") {
+		return "an alias";
+	} else if (str == "fstab") {
+		return "an fstab";
+	} else if (str == "group") {
+		return "a group";
+	} else if (str == "hostent") {
+		return "a hostent";
+	} else if (str == "protoent") {
+		return "a protoent";
+	} else if (str == "passwd") {
+		return "a password";
+	} else if (str == "spwd") {
+		return "an spwd";
+	} else if (str == "ttyent") {
+		return "a ttyent";
+	} else if (str == "utmp") {
+		return "an utmp structure";
+	} else if (str == "utmpx") {
+		return "an utmpx structure";
+	} else if (str == "ifaddrs") {
+		return "an ifaddrs structure";
+	} else if (str == "statfs") {
+		return "a statfs structure";
+	} else if (str == "statfs64") {
+		return "a statfs64 structure";
+	} else if (str == "statvfs") {
+		return "a statvfs structure";
+	} else if (str == "statvfs64") {
+		return "a statvfs64 structure";
+	} else if (str == "timeb") {
+		return "a timeb structure";
+	} else if (str == "_ftsent") {
+		return "an _ftsent structure";
+	} else if (str == "sysinfo") {
+		return "a sysinfo structure";
+	} else if (str == "rlimit") {
+		return "an rlimit structure";
+	} else if (str == "rlimit64") {
+		return "an rlimit64 structure";
+	} else if (str == "rusage") {
+		return "an rusage structure";
+	} else if (str == "entry") {
+		return "an entry structure";
+	} else if (str == "pollfd") {
+		return "a pollfd structure";
+	} else if (str == "re_pattern_buffer") {
+		return "a re_pattern_buffer structure";
+	} else if (str == "sembuf") {
+		return "a sembuf structure";
+	} else if (str == "tms") {
+		return "a tms structure";
+	} else if (str == "utsname") {
+		return "an utsname structure";
+	} else if (str == "utimbuf") {
+		return "an utimbuf structure";
+	} else if (str == "__va_list_tag") {
+		return "__va_list_tag (aka, a va_list)";
+	// ncurses
+	} else if (str == "_win_st") {
+		return "a _win_st structure";
+		
+	} else if (str == "cchar_t") {
+		return "a cchar_t";
+	} else return "";*/
+	ALL
+}
+#undef END
+#undef TYPEDEF
+#undef STRUCT2
+#undef STRUCT
+#undef START

README.md

@@ -1,49 +0,0 @@
-# box64
-
-![Official logo](Box64Logo.png "Official Logo")
-Linux Userspace x86_64 Emulator with a twist
-
-----
-
-Box64 lets you run x86_64 Linux programs (such as games) on non-x86_64 Linux systems, like ARM (host system needs to be 64bit little-endian).
-
-Because Box64 uses the native versions of some "system" libraries, like libc, libm, SDL, and OpenGL, it's easy to integrate and use with most applications, and performance can be surprisingly high in some cases.
-
-Box64 integrates a DynaRec (dynamic recompiler) for the ARM64 platform, providing a speed boost between 5 to 10 times faster than only using the interpreter.
-
-Some x86 internal opcodes use parts of "Realmode X86 Emulator Library", see [x86primop.c](src/emu/x86primop.c) for copyright details
-
-<img src="Box64Icon.png" width="96" height="96">
-
-Logo and Icon made by @grayduck, thanks!
-
-----
-
-Usage
-----
-
-There are a few environment variables to control the behaviour of Box64.
-
-See [here](USAGE.md) for all environment variables and what they do.
-
-Note: Box64's Dynarec uses a mechanism with Memory Protection and a SegFault signal handler to handle JIT code. In simpler terms, if you want to use GDB to debug a running program that use JIT'd code (like mono/Unity3D), you will still have many "normal" segfaults triggering. It is suggested to use something like `handle SIGSEGV nostop` in GDB to not stop at each segfault, and maybe put a breakpoint inside `my_memprotectionhandler` in `signals.c` if you want to trap SegFaults.
-
-----
-
-Compiling/Installation
-----
-> Compilation instructions can be found [here](COMPILE.md)  
-
-----
-
-Version history
-----
-
-The change log is available [here](CHANGELOG.md)
-
-----
-
-Final words
-----
-
-(If you use Box64 in your project, please don't forget to mention Box64!)

docs/CHANGELOG.md

@@ -0,0 +1,83 @@
+Current Version
+======
+* More functions wrapped
+* Improve speed of the custom allocator used by dynarec and Hash (speedup loading)
+* Added a workaround for streamwebhelper to not load it
+* More opcodes added
+* More wrapped libraries, including gtk2
+* Added a fix for linking box64 on system using glibc 2.34+
+* Some residual fixes on thread attribute handling
+* Better handling of app that want 32bits jumps, like unity3d/mono (thanks mogery)
+* More ARM hardware option in CMake (Phytium, NX...)
+* Added loongarch64 support (interpretor only)
+* Some fixes to elfloader
+* Added a mecanism to cancel a Dynarec block construction if it triggers a segfault (instead of a crash)
+
+v0.1.4
+======
+* Reworked README a bit
+* Added some more wrapped libs
+* Added some SSE4x opcodes
+* Preliminary support for VSyscall (still missing VDSO)
+* Added support for AES-NI cpu extension, also in Dynarec (and using ARM extension if present)
+* Added some syscall
+* Added some more wrapped functions
+* Improvment to the handling of longjmp inside signal handlers
+* Improved wrapper helpers (from rajdakin)
+* Some fixes to opcodes (especially C2 flags for some x87 opcodes)
+* Handling of some specific opcode as privileged instruction (instead of NOP)
+* Fixed ELF signature detection
+* Some fixes to a few env. var. handling
+
+v0.1.2
+======
+* OpenSource!
+* A few more opcode added to the Interpretor and the Dynarec
+* Improved Native Function calling
+* Added some function to limit allocated memory to 47bits space (for Wine)
+* Improved and Fixed the functions to limit allocated memory to 32bits space
+* Wine is starting now, but not everything and every version works
+
+v0.1.0
+======
+* Improvement to ElfLoader
+* More opcode added to the Dynarec
+* More lib wrapping
+* Some fixes to a few function signature
+* Improvement to Signal handling, and internal mutex handling
+* A few fixes to some dynarec opcodes
+* A few fixes to some interpretor opcodes
+
+v0.0.8
+======
+* Improvement to SSE/x87 handling
+* More opcode added to the Dynarec
+* More lib wrapping
+
+v0.0.6
+======
+* Added Dynarec for ARM64
+* Many general CPU opcode added to the Dynarec
+* Many SSEx opcodes added to the Dynarec
+* Added a few more symbols in libc
+* A few changes to the "thread once" handling
+* New Logo and Icon from @grayduck
+
+v0.0.4
+======
+* Added a lot of opcodes
+* Added SDL1 and SDL2 wrapping
+* OpenGL/GLU wrapping done
+* libasound / libpulse wrapping done
+* libopenal / libalure / libalut wrapping done
+* Many X11 libs wrapped
+* Added "install" with binfmt integration
+* A few games are actualy starting now (old WorldOfGoo, Into The Breach, VVVVVV and Thimbeweed Park)
+
+v0.0.2
+======
+* Using box86 as a base, implemented most planned box64 part except dynarec
+* Wrapped a few libs
+* ELF loader a bit crude, but seems working
+* Signal handling implemented
+* MMX and x87 are sharing their registers

docs/COMPILE.md

@@ -0,0 +1,141 @@
+Compiling
+----
+#### for RK3399
+
+Using a 64bits OS:
+```
+git clone https://github.com/ptitSeb/box64
+cd box64
+mkdir build; cd build; cmake .. -DRK3399=1 -DCMAKE_BUILD_TYPE=RelWithDebInfo
+make -j4
+sudo make install
+```
+If it's the first install, you also need:
+```
+sudo systemctl restart systemd-binfmt
+```
+
+#### for PI4
+
+Warning, you need a 64bits OS:
+
+```
+git clone https://github.com/ptitSeb/box64
+cd box64
+mkdir build; cd build; cmake .. -DRPI4ARM64=1 -DCMAKE_BUILD_TYPE=RelWithDebInfo
+make -j4
+sudo make install
+```
+If it's the first install, you also need:
+```
+sudo systemctl restart systemd-binfmt
+```
+
+#### for TEGRA X1
+
+Using a 64bits OS:
+
+```
+git clone https://github.com/ptitSeb/box64
+cd box64
+mkdir build; cd build; cmake .. -DTEGRAX1=1 -DCMAKE_BUILD_TYPE=RelWithDebInfo
+make -j4
+sudo make install
+```
+If it's the first install, you also need:
+```
+sudo systemctl restart systemd-binfmt
+```
+
+#### for Snapdragon 845
+
+Using a 64bits OS:
+
+```
+git clone https://github.com/ptitSeb/box64
+cd box64
+mkdir build; cd build; cmake .. -DSD845=1 -DCMAKE_BUILD_TYPE=RelWithDebInfo
+make -j4
+sudo make install
+```
+If it's the first install, you also need:
+```
+sudo systemctl restart systemd-binfmt
+```
+
+
+----
+#### for Phytium
+
+Using a 64bits OS:
+```
+git clone https://github.com/ptitSeb/box64
+cd box64
+mkdir build; cd build; cmake .. -DPHYTIUM=1 -DCMAKE_BUILD_TYPE=RelWithDebInfo
+make -j4
+sudo make install
+```
+If it's the first install, you also need:
+```
+sudo systemctl restart systemd-binfmt
+```
+
+#### for LoongArch
+
+Using a 64bits OS:
+
+```
+git clone https://github.com/ptitSeb/box64
+cd box64
+mkdir build; cd build; cmake .. -DLARCH64=1 -DCMAKE_BUILD_TYPE=RelWithDebInfo
+make -j4
+sudo make install
+```
+If it's the first install, you also need:
+```
+sudo systemctl restart systemd-binfmt
+```
+
+#### for Other ARM64 Linux platforms
+
+ `mkdir build; cd build; cmake .. -DARM_DYNAREC=ON -DCMAKE_BUILD_TYPE=RelWithDebInfo; make -j$(nproc)`
+
+#### for x86_64 Linux
+
+ `mkdir build; cd build; cmake .. -DLD80BITS=1 -DNOALIGN=1 -DCMAKE_BUILD_TYPE=RelWithDebInfo; make -j$(nproc)`
+
+If you encounter some linking errors, try activating `NOLOADADDR` (`cmake -DNOLOADADDR=ON; make -j$(nproc)`).
+
+### use ccmake
+
+Alternatively, you can **use the curses-bases ccmake (or any other gui frontend for cmake)** to select wich platform to use interactively.
+
+### Customize your build
+
+*Use ccache if you have it* 
+
+Add `-DUSE_CCACHE=1` if you have ccache (it's better if you plan to touch the sources)
+
+*To have some debug info* 
+
+The `-DCMAKE_BUILD_TYPE=RelWithDebInfo` argument makes a build that is both optimized for speed, and has debug information embedded. That way, if you have a crash or try to analyse performance, you'll have some symbols.
+
+*To have a Trace Enabled build* 
+
+To have a trace enabled build ( ***the interpretor will be slightly slower***), add `-DHAVE_TRACE=1` but you will need, at runtime, to have the [Zydis library](https://github.com/zyantific/zydis) library in your `LD_LIBRARY_PATH` or in the system library folders.
+
+*To have ARM Dynarec*
+
+The Dynarec is only available on the ARM architecture(Right now, anyways.). Notes also that VFPv3 and NEON are required for the Dynarec. Activate it by using `-DARM_DYNAREC=1`.
+
+*Not building from a git clone*
+
+If you are not building from a git clone (for example, downloading a release source zipped from github), you need to activate `-DNOGIT=1` from cmake to be able to build (normal process include git sha1 of HEAD in the version that box64 print).
+
+----
+
+Testing
+----
+A few tests are included.
+They can be launched with `ctest`
+They are very basic and don't test much for now.

docs/README.md

@@ -0,0 +1,114 @@
+# box64
+
+![Official logo](img/Box64Logo.png "Official Logo")
+Linux Userspace x86_64 Emulator with a twist
+
+----
+![box64 build status](https://app.travis-ci.com/ptitSeb/box64.svg?branch=main)
+
+[中文](README_CN.md)
+
+Box64 lets you run x86_64 Linux programs (such as games) on non-x86_64 Linux systems, like ARM (host system needs to be 64bit little-endian).
+
+You can find many more Box64 video on Youtube in the [MicroLinux](https://www.youtube.com/channel/UCwFQAEj1lp3out4n7BeBatQ), [Pi Labs](https://www.youtube.com/channel/UCgfQjdc5RceRlTGfuthBs7g) or [The Byteman](https://www.youtube.com/channel/UCEr8lpIJ3B5Ctc5BvcOHSnA) Channels
+
+Because Box64 uses the native versions of some "system" libraries, like libc, libm, SDL, and OpenGL, it's easy to integrate and use with most applications, and performance can be surprisingly high in many cases. Take a look at thoses bench analysis for an example [here](https://box86.org/index.php/2021/06/game-performances/).
+
+Box64 integrates a DynaRec (dynamic recompiler) for the ARM64 platform, providing a speed boost between 5 to 10 times faster than only using the interpreter. Some high level information on how the Dynarec work can be found [here](https://box86.org/2021/07/inner-workings-a-high%e2%80%91level-view-of-box86-and-a-low%e2%80%91level-view-of-the-dynarec/).
+
+Some x64 internal opcodes use parts of "Realmode X86 Emulator Library", see [x64primop.c](../src/emu/x64primop.c) for copyright details
+
+<img src="img/Box64Icon.png" width="96" height="96">
+
+Logo and Icon made by @grayduck, thanks!
+
+----
+
+Usage
+----
+
+There are a few environment variables to control the behaviour of Box64.
+
+See [here](USAGE.md) for all environment variables and what they do.
+
+Note: Box64's Dynarec uses a mechanism with Memory Protection and a SegFault signal handler to handle JIT code. In simpler terms, if you want to use GDB to debug a running program that use JIT'd code (like mono/Unity3D), you will still have many "normal" segfaults triggering. It is suggested to use something like `handle SIGSEGV nostop` in GDB to not stop at each segfault, and maybe put a breakpoint inside `my_memprotectionhandler` in `signals.c` if you want to trap SegFaults.
+
+----
+
+Compiling/Installation
+----
+> Compilation instructions can be found [here](COMPILE.md)  
+
+----
+
+Version history
+----
+
+The change log is available [here](CHANGELOG.md)
+
+----
+
+Notes about 32-bit platforms
+----
+
+Because Box64 works by directly translating function calls from x86_64 to host system, the host system (the one Box64 is running on) needs to have 64-bits libraries. Box64 doesn't include any 64-bits <-> 32-bits translation. 
+
+So understand that box64 will only runs 64bits linux binaries. For 32bits binaries, you need box86 (with all the multiarch or proot trickery it imply on 64bits OS).
+Note that many installer (mojo setup based) will fall back to "x86" when detecting ARM64 OS, and so will try to use box86 for the setup, even if an x86_64 version exist. You can hack your way around with a fake "uname" that return "x86_64" when argument is "-m"
+
+----
+
+Notes about Unity game emulation
+----
+
+Running Unity games is a hit or miss for now. Unity uses Mono (which uses signals that are not always emulated in a 100% accurate way).
+You should also note that some Unity3D games require OpenGL 3+ which can be tricky to provide on ARM SBC (single-board computers) for now.
+So, not all Unity games work and can require a high OpenGL profile, but many actualy works now
+Hint: on Pi4, use `MESA_GL_VERSION_OVERRIDE=3.2` and with Panfrost use `PAN_MESA_DEBUG=gl3` to use higher profile if the game start then quit before showing anything.
+
+----
+
+Notes about GTK programs
+----
+
+GTK libraries are not wrapped yet on box64 (contrary to box86). Many games use gtk (setup too), like Unity game for the Screen Selection dialog. While Unity game can run without that dialog (using default setup), many just can't. For now, you'll need o put the set of gtk x86_64 libraries in the game folder (or some other folder known by box64) to get gtk support. GTK Wrapping is planned on box64.
+
+----
+
+Notes about Steam
+----
+
+Not that Steam is an hybrid 32bits / 64bits. You NEED box86 to run steam, as the client app is a 32bits binaries. It also use a 64bits local server binaries, but like most stuff using libcef/chromium. it's not working correctly on box64 for now.
+So: no Steam for now on box64.
+
+----
+
+Notes about Wine
+----
+
+Wine 64bits is supported on box64. Be aware that 64bits wine also include 32bits componant, to be able to run 32bits windws programs. The 32bits will need box86 and will not run without it. On a system where both box64 and box86 are present and working, a wine 64bits setup can run both 32bits and 64bits windows program (just use `wine` and `wine64` respectivelly)
+
+----
+
+Notes about Vulkan
+----
+
+Box64 Does not wrap Vulkan libraries yet. It's planned, but for now, vulkan program will not run on box64.
+
+----
+
+Final word
+----
+
+I want to thank everyone who has contributed to box64 developpement.
+There are many ways to contribute: code contribution, financial, hardware and advertisement!
+So, in no particular order, I want to thank:
+ * For their major code contribution: rajdakin, mogery
+ * For their major financial contribution: FlyingFathead, stormchaser3000
+ * For hardware contribution and LoongArch migration: [xiaoji](https://www.linuxgame.cn/), Deepin Beijing Develop Team
+ * For their hardware contribution: [Radxa](https://rockpi.org/), [Pine64](https://www.pine64.org/)
+ * For their continous advertisement of box64 project: salva ([microLinux](https://www.youtube.com/channel/UCwFQAEj1lp3out4n7BeBatQ)), [PILab](https://www.youtube.com/channel/UCgfQjdc5RceRlTGfuthBs7g)/[TwisterOS](https://twisteros.com/) team, [The Byteman](https://www.youtube.com/channel/UCEr8lpIJ3B5Ctc5BvcOHSnA), [NicoD](https://www.youtube.com/channel/UCpv7NFr0-9AB5xoklh3Snhg), ekianjo ([Boilingsteam](https://boilingsteam.com/))
+
+And I also thank the many other people who participated even once in the project.
+
+(If you use Box64 in your project, please don't forget to mention it!)

docs/README_CN.md

@@ -0,0 +1,119 @@
+# box64
+
+![Official logo](img/Box64Logo.png "Official Logo")
+Linux上用户空间的x86_64应用模拟器 
+
+----
+![box64 build status](https://app.travis-ci.com/ptitSeb/box64.svg?branch=main)
+
+[English](README.md)
+
+在ARM或其他非X86_64架构的Linux操作系统上，使用Box64可以运行x86_64 Linux程序（例如游戏），请注意，主机系统需要**64位小端**。
+
+您可以在Youtube的[MicroLinux](https://www.youtube.com/channel/UCwFQAEj1lp3out4n7BeBatQ)、[Pi Labs](https://www.youtube.com/channel/UCgfQjdc5RceRlTGfuthBs7g)或[The Byteman](https://www.youtube.com/channel/UCEr8lpIJ3B5Ctc5BvcOHSnA)频道找到更多Box64视频。
+
+Box64使用了一些“系统”库的原生版本，例如libc、libm、SDL和OpenGL，所以它很容易与大多数应用程序集成和使用，并且在很多情况下性能会出奇的高。点击[此处](https://box86.org/index.php/2021/06/game-performances/)查看示例的基准测试分析。
+
+Box64为ARM64平台集成了DynaRec（动态重编译器），比仅使用解释器提升5到10倍性能。关于Dynarec如何工作的更多信息，可以在[这里](https://box86.org/2021/07/inner-workings-a-high%e2%80%91level-view-of-box86-and-a-low%e2%80%91level-view-of-the-dynarec/)找到。
+
+注：DynaRec需要针对不同平台编写一部分汇编代码，目前仅支持ARM64。
+
+一些x64内部操作码使用“Realmode X86 Emulator Library”的部分内容，请参阅[x64primop.c](../src/emu/x64primop.c)了解版权详情 
+
+<img src="img/Box64Icon.png" width="96" height="96">
+
+Logo和图标由grayduck制作，感谢!
+
+----
+
+使用方法
+----
+
+若干环境变量可以设置Box64的行为。
+
+点击[这里](USAGE.md)了解所有的环境变量和它们的作用。
+
+请注意：Box64的Dynarec提供了一种机制来处理JIT代码，包含内存保护和段错误信号处理程序。简单地说，如果您想用GDB来调试一个使用JIT代码的运行程序（比如mono/Unity3D），您仍然会触发很多“正常”的段错误。建议在GDB中使用类似于`handle SIGSEGV nostop`的东西，不要在每个段错误时都停止，如果您想捕获段错误，可以在`signals.c`中的`my_memprotectionhandler`中放置一个断点。
+
+----
+
+编译/安装
+----
+> 编译说明可以在[这里](COMPILE.md)查看。  
+
+----
+
+版本历史
+----
+
+版本日志在[这里](CHANGELOG.md)。
+
+----
+
+32位平台的注意事项
+----
+
+Box64的工作原理是直接将函数调用从x86_64转换到主机系统，主机系统（Box64运行的系统）需要有64位的库。Box64并不包括任何64位<->32位的转换。
+
+所以请理解，Box64只能运行64位的Linux二进制文件。对于32位的二进制文件，需要Box86（在64位的操作系统上需要所有的multiarch库或一些proot技巧）。
+
+请注意，许多(基于mojo的)安装程序，即使存在x86_64版本，但在检测到架构为ARM64时会退回到"x86"，这时会尝试使用（如果有）box86进行安装。这时你可以使用一个假的"uname"，当它的参数为"-m"时返回"x86_64"。
+
+----
+
+关于Unity游戏模拟的注意事项
+----
+
+当前Unity游戏模拟是一件碰运气的事情。Unity使用Mono（它的信号表示，并不总能100%成功模拟）。
+
+您还应该注意，一些Unity3D游戏需要OpenGL 3+，目前在ARM SBC（单板计算机）上提供OpenGL 3+是很棘手的。
+
+所以，并不是所有的Unity游戏都能工作，而且可能需要很高的OpenGL配置，但现在很多游戏都能工作。
+
+提示：如果游戏开始后在显示任何东西之前退出，在Pi4上使用`MESA_GL_VERSION_OVERRIDE=3.2`，在Panfrost上使用`PAN_MESA_DEBUG=gl3`来使用更高的配置文件。
+
+----
+
+关于GTK程序的注意事项
+----
+
+GTK库尚未封装在Box64内（与Box86相反）。许多游戏（包括设置）都使用gtk，例如Unity游戏的屏幕选择对话框。有些Unity游戏可以在没有该对话框的情况下运行（使用默认设置），还有一些不能。您需要将一套gtk x86_64库放在游戏目录（或其他一些Box64识别的目录）中以获得gtk支持。Box64有计划封装GTK原生库。 
+
+----
+
+关于Steam的注意事项
+----
+
+Steam并不是32位/64位混合的，而是32位的，因此您需要Box86才能运行Steam。Steam也使用64位的本地服务器程序，但像大多数使用libcef/chromium的程序一样，在box64上暂时无法正常工作。
+所以：目前在box64上无法运行Steam。
+----
+
+关于Wine的注意事项
+----
+
+box64支持64位Wine，但请注意，64位的Wine还包含32位的组件，以便能够运行32位的Windws程序。32位程序需要Box86，没有它就不能运行。在Box64和Box86共存的系统上，设置64位Wine可以同时运行32位和64位windows程序（只需分别使用 `wine` 和 `wine64`）。
+
+----
+
+关于Vulkan注意事项
+----
+
+Box64尚未封装原生Vulkan库，有计划这么做，但目前，vulkan程序不能在box64上运行。
+
+----
+
+结语
+----
+
+我要感谢所有为 box64 开发做出贡献的人。
+贡献方式有很多种：代码贡献、财务帮助、捐赠捐赠和广告合作！
+以下感谢不分先后： 
+ * 代码贡献：rajdakin, mogery
+ * 财务帮助：FlyingFathead, stormchaser3000
+ * 硬件捐赠：[Radxa](https://rockpi.org/), [Pine64](https://www.pine64.org/)
+ * 硬件捐赠和LoongArch迁移：[xiaoji](https://www.linuxgame.cn)
+ * 为本项目持续的宣传：salva ([microLinux](https://www.youtube.com/channel/UCwFQAEj1lp3out4n7BeBatQ)), [PILab](https://www.youtube.com/channel/UCgfQjdc5RceRlTGfuthBs7g)/[TwisterOS](https://twisteros.com/) team, [The Byteman](https://www.youtube.com/channel/UCEr8lpIJ3B5Ctc5BvcOHSnA), [NicoD](https://www.youtube.com/channel/UCpv7NFr0-9AB5xoklh3Snhg), ekianjo ([Boilingsteam](https://boilingsteam.com/))
+
+我还要感谢很多人，即使他们只参与了一次本项目。
+
+(如果你的项目中使用了Box64，请不要忘记提及！)

docs/USAGE.md

@@ -31,6 +31,7 @@ Enables/Disables the logging of `dlsym` errors.
 #### BOX64_TRACE_FILE
 Send all log and trace to a file instead of `stdout`
 Also, if name contains `%pid` then this is replaced by the actual PID of box64 instance
+Use `stderr` to use this instead of default `stdout` 
 
 #### BOX64_TRACE
 Only on build with trace enabled. Trace allow the logging of all instruction executed, along with register dump
@@ -53,6 +54,16 @@ Only on builds with trace enabled.
  * 0 : The XMM (i.e. SSE/SSE2) register will not be logged with the general and x86 registers. (Default.)
  * 1 : Dump the XMM registers.
 
+#### BOX64_TRACE_EMM
+Only on builds with trace enabled.
+ * 0 : The EMM (i.e. XMM/x87) register will not be logged with the general and x86 registers. (Default.)
+ * 1 : Dump the EMM registers.
+
+#### BOX64_TRACE_COLOR
+Only on builds with trace enabled.
+ * 0 : The general registers will always be the default white color. (Default.)
+ * 1 : The general registers will change color in the dumps when they changed value.
+
 #### BOX64_LOAD_ADDR
 Try to load at 0xXXXXXX main binary (if binary is a PIE)
  * 0xXXXXXXXX : The load address . (Only active on PIE programs.)
@@ -123,6 +134,11 @@ Allow Box64 to continue even if a library is missing.
  * 0 : Box64 will stop if a library cannot be loaded. (Default.)
  * 1 : Continue even if a needed library cannot be loaded. Unadvised, this will, in most cases, crash later on.
 
+#### BOX64_NOPULSE
+Disables the load of pulseaudio libraries.
+ * 0 : Load pulseaudio libraries if found. (Default.)
+ * 1 : Disables the load of pulse audio libraries (libpulse and libpulse-simple), both the native library and the x86 library
+
 #### BOX64_JITGDB
 
  * 0 : Just print the Segfault message on segfault (default)

pkgbuilds/PKGBUILD-arm64

@@ -0,0 +1,44 @@
+# Maintainer: Jai-JAP <[email protected]>
+# Author: Sebastien Chevalier <[email protected]>
+pkgname=box64-arm64-git
+pkgver=1116.9243ea4
+pkgrel=1
+pkgdesc="Linux Userspace x86_64 Emulator with a twist, targeted at ARM64 Linux devices."
+arch=('aarch64')
+url="https://github.com/ptitSeb/box64"
+license=('MIT')
+optdepends=('gl4es: OpenGL 2 for GLES 2 devices')
+makedepends=('git' 'cmake' 'make')
+provides=("${pkgname%-git}" "${pkgname%-arm64-git}-git" "${pkgname%-arm64-git}")
+conflicts=("${pkgname%-git}" "${pkgname%-arm64-git}-git" "${pkgname%-arm64-git}")
+source=('git+https://github.com/ptitSeb/box64')
+md5sums=('SKIP')
+
+pkgver() {
+	cd "$srcdir/${pkgname%-arm64-git}"
+	printf "r%s.%s" "$(git rev-list --count HEAD)" "$(git rev-parse --short HEAD)"
+}
+
+prepare() {
+	cd "${srcdir}/${pkgname%-arm64-git}"
+	if [[ ! -d ./build ]]; then
+		mkdir build && cd build
+		cmake .. -DARM_DYNAREC=ON -DCMAKE_BUILD_TYPE=RelWithDebInfo
+	fi
+}
+
+build() {
+	cd "$srcdir/${pkgname%-arm64-git}/build"
+	make -j$(nproc)
+}
+
+package() {
+	cd "$srcdir/${pkgname%-arm64-git}/build"
+	make DESTDIR="${pkgdir}/" install
+	# /usr/local/bin isn't in PATH by the default,
+	# we should move it to /usr/bin
+	cd ${pkgdir}
+	mv usr/local/bin/ usr/bin/
+	# cleanup when dir is empty
+	rmdir usr/local || exit 0
+}

pkgbuilds/PKGBUILD-arm64-DEBUG

@@ -0,0 +1,44 @@
+# Maintainer: Jai-JAP <[email protected]>
+# Author: Sebastien Chevalier <[email protected]>
+pkgname=box64-arm64-git
+pkgver=1116.9243ea4
+pkgrel=1
+pkgdesc="Linux Userspace x86_64 Emulator with a twist, targeted at ARM64 Linux devices."
+arch=('aarch64')
+url="https://github.com/ptitSeb/box64"
+license=('MIT')
+optdepends=('gl4es: OpenGL 2 for GLES 2 devices')
+makedepends=('git' 'cmake' 'make')
+provides=("${pkgname%-git}" "${pkgname%-arm64-git}-git" "${pkgname%-arm64-git}")
+conflicts=("${pkgname%-git}" "${pkgname%-arm64-git}-git" "${pkgname%-arm64-git}")
+source=('git+https://github.com/ptitSeb/box64')
+md5sums=('SKIP')
+
+pkgver() {
+	cd "$srcdir/${pkgname%-arm64-git}"
+	printf "r%s.%s" "$(git rev-list --count HEAD)" "$(git rev-parse --short HEAD)"
+}
+
+prepare() {
+	cd "${srcdir}/${pkgname%-arm64-git}"
+	if [[ ! -d ./build ]]; then
+		mkdir build && cd build
+		cmake .. -DARM_DYNAREC=ON -DCMAKE_BUILD_TYPE=Debug
+	fi
+}
+
+build() {
+	cd "$srcdir/${pkgname%-arm64-git}/build"
+	make -j$(nproc)
+}
+
+package() {
+	cd "$srcdir/${pkgname%-arm64-git}/build"
+	make DESTDIR="${pkgdir}/" install
+	# /usr/local/bin isn't in PATH by the default,
+	# we should move it to /usr/bin
+	cd ${pkgdir}
+	mv usr/local/bin/ usr/bin/
+	# cleanup when dir is empty
+	rmdir usr/local || exit 0
+}

pkgbuilds/PKGBUILD-rk3399

@@ -0,0 +1,44 @@
+# Maintainer: Jai-JAP <[email protected]>
+# Author: Sebastien Chevalier <[email protected]>
+pkgname=box86-rk3399-git
+pkgver=1116.9243ea4
+pkgrel=1
+pkgdesc="Linux Userspace x86_64 Emulator with a twist, targeted at ARM64 Linux devices."
+arch=('aarch64')
+url="https://github.com/ptitSeb/box64"
+license=('MIT')
+optdepends=('gl4es: OpenGL 2 for GLES 2 devices')
+makedepends=('git' 'cmake' 'make')
+provides=("${pkgname%-git}" "${pkgname%-rk3399-git}-git" "${pkgname%-rk3399-git}")
+conflicts=("${pkgname%-git}" "${pkgname%-rk3399-git}-git" "${pkgname%-rk3399-git}")
+source=('git+https://github.com/ptitSeb/box64')
+md5sums=('SKIP')
+
+pkgver() {
+	cd "$srcdir/${pkgname%-rk3399-git}"
+	printf "r%s.%s" "$(git rev-list --count HEAD)" "$(git rev-parse --short HEAD)"
+}
+
+prepare() {
+	cd "${srcdir}/${pkgname%-rk3399-git}"
+	if [[ ! -d ./build ]]; then
+		mkdir build && cd build
+                cmake .. -DRK3399=1 -DCMAKE_BUILD_TYPE=RelWithDebInfo
+	fi
+}
+
+build() {
+	cd "$srcdir/${pkgname%-rk3399-git}/build"
+	make -j$(nproc)
+}
+
+package() {
+	cd "$srcdir/${pkgname%-rk3399-git}/build"
+	make DESTDIR="${pkgdir}/" install
+	# /usr/local/bin isn't in PATH by the default,
+	# we should move it to /usr/bin
+	cd ${pkgdir}
+	mv usr/local/bin/ usr/bin/
+	# cleanup when dir is empty
+	rmdir usr/local || exit 0
+}

pkgbuilds/PKGBUILD-rk3399-DEBUG

@@ -0,0 +1,44 @@
+# Maintainer: Jai-JAP <[email protected]>
+# Author: Sebastien Chevalier <[email protected]>
+pkgname=box86-rk3399-git
+pkgver=1116.9243ea4
+pkgrel=1
+pkgdesc="Linux Userspace x86_64 Emulator with a twist, targeted at ARM64 Linux devices."
+arch=('aarch64')
+url="https://github.com/ptitSeb/box64"
+license=('MIT')
+optdepends=('gl4es: OpenGL 2 for GLES 2 devices')
+makedepends=('git' 'cmake' 'make')
+provides=("${pkgname%-git}" "${pkgname%-rk3399-git}-git" "${pkgname%-rk3399-git}")
+conflicts=("${pkgname%-git}" "${pkgname%-rk3399-git}-git" "${pkgname%-rk3399-git}")
+source=('git+https://github.com/ptitSeb/box64')
+md5sums=('SKIP')
+
+pkgver() {
+	cd "$srcdir/${pkgname%-rk3399-git}"
+	printf "r%s.%s" "$(git rev-list --count HEAD)" "$(git rev-parse --short HEAD)"
+}
+
+prepare() {
+	cd "${srcdir}/${pkgname%-rk3399-git}"
+	if [[ ! -d ./build ]]; then
+		mkdir build && cd build
+                cmake .. -DRK3399=1 -DCMAKE_BUILD_TYPE=Debug
+	fi
+}
+
+build() {
+	cd "$srcdir/${pkgname%-rk3399-git}/build"
+	make -j$(nproc)
+}
+
+package() {
+	cd "$srcdir/${pkgname%-rk3399-git}/build"
+	make DESTDIR="${pkgdir}/" install
+	# /usr/local/bin isn't in PATH by the default,
+	# we should move it to /usr/bin
+	cd ${pkgdir}
+	mv usr/local/bin/ usr/bin/
+	# cleanup when dir is empty
+	rmdir usr/local || exit 0
+}

pkgbuilds/PKGBUILD-rpi4

@@ -0,0 +1,44 @@
+# Maintainer: Jai-JAP <[email protected]>
+# Author: Sebastien Chevalier <[email protected]>
+pkgname=box64-rpi-git
+pkgver=1116.9243ea4
+pkgrel=1
+pkgdesc="Linux Userspace x86_64 Emulator with a twist, targeted at ARM64 Linux devices."
+arch=('aarch64')
+url="https://github.com/ptitSeb/box64"
+license=('MIT')
+optdepends=('gl4es: OpenGL 2 for GLES 2 devices')
+makedepends=('git' 'cmake' 'make')
+provides=("${pkgname%-git}" "${pkgname%-rpi-git}-git" "${pkgname%-rpi-git}")
+conflicts=("${pkgname%-git}" "${pkgname%-rpi-git}-git" "${pkgname%-rpi-git}")
+source=('git+https://github.com/ptitSeb/box64')
+md5sums=('SKIP')
+
+pkgver() {
+	cd "$srcdir/${pkgname%-rpi-git}"
+	printf "r%s.%s" "$(git rev-list --count HEAD)" "$(git rev-parse --short HEAD)"
+}
+
+prepare() {
+	cd "${srcdir}/${pkgname%-rpi-git}"
+	if [[ ! -d ./build ]]; then
+		mkdir build && cd build
+		cmake .. -DRPI4ARM64=1 -DCMAKE_BUILD_TYPE=RelWithDebInfo
+	fi
+}
+
+build() {
+	cd "$srcdir/${pkgname%-rpi-git}/build"
+	make -j$(nproc)
+}
+
+package() {
+	cd "$srcdir/${pkgname%-rpi-git}/build"
+	make DESTDIR="${pkgdir}/" install
+	# /usr/local/bin isn't in PATH by the default,
+	# we should move it to /usr/bin
+	cd ${pkgdir}
+	mv usr/local/bin/ usr/bin/
+	# cleanup when dir is empty
+	rmdir usr/local || exit 0
+}

pkgbuilds/PKGBUILD-rpi4-DEBUG

@@ -0,0 +1,44 @@
+# Maintainer: Jai-JAP <[email protected]>
+# Author: Sebastien Chevalier <[email protected]>
+pkgname=box64-rpi-git
+pkgver=1116.9243ea4
+pkgrel=1
+pkgdesc="Linux Userspace x86_64 Emulator with a twist, targeted at ARM64 Linux devices."
+arch=('aarch64')
+url="https://github.com/ptitSeb/box64"
+license=('MIT')
+optdepends=('gl4es: OpenGL 2 for GLES 2 devices')
+makedepends=('git' 'cmake' 'make')
+provides=("${pkgname%-git}" "${pkgname%-rpi-git}-git" "${pkgname%-rpi-git}")
+conflicts=("${pkgname%-git}" "${pkgname%-rpi-git}-git" "${pkgname%-rpi-git}")
+source=('git+https://github.com/ptitSeb/box64')
+md5sums=('SKIP')
+
+pkgver() {
+	cd "$srcdir/${pkgname%-rpi-git}"
+	printf "r%s.%s" "$(git rev-list --count HEAD)" "$(git rev-parse --short HEAD)"
+}
+
+prepare() {
+	cd "${srcdir}/${pkgname%-rpi-git}"
+	if [[ ! -d ./build ]]; then
+		mkdir build && cd build
+		cmake .. -DRPI4ARM64=1 -DCMAKE_BUILD_TYPE=Debug
+	fi
+}
+
+build() {
+	cd "$srcdir/${pkgname%-rpi-git}/build"
+	make -j$(nproc)
+}
+
+package() {
+	cd "$srcdir/${pkgname%-rpi-git}/build"
+	make DESTDIR="${pkgdir}/" install
+	# /usr/local/bin isn't in PATH by the default,
+	# we should move it to /usr/bin
+	cd ${pkgdir}
+	mv usr/local/bin/ usr/bin/
+	# cleanup when dir is empty
+	rmdir usr/local || exit 0
+}

pkgbuilds/PKGBUILD-tegra

@@ -0,0 +1,44 @@
+# Maintainer: Jai-JAP <[email protected]>
+# Author: Sebastien Chevalier <[email protected]>
+pkgname=box64-tegra-git
+pkgver=1116.9243ea4
+pkgrel=1
+pkgdesc="Linux Userspace x86_64 Emulator with a twist, targeted at ARM64 Linux devices."
+arch=('aarch64')
+url="https://github.com/ptitSeb/box64"
+license=('MIT')
+optdepends=('gl4es: OpenGL 2 for GLES 2 devices')
+makedepends=('git' 'cmake' 'make')
+provides=("${pkgname%-git}" "${pkgname%-tegra-git}-git" "${pkgname%-tegra-git}")
+conflicts=("${pkgname%-git}" "${pkgname%-tegra-git}-git" "${pkgname%-tegra-git}")
+source=('git+https://github.com/ptitSeb/box64')
+md5sums=('SKIP')
+
+pkgver() {
+	cd "$srcdir/${pkgname%-tegra-git}"
+	printf "r%s.%s" "$(git rev-list --count HEAD)" "$(git rev-parse --short HEAD)"
+}
+
+prepare() {
+	cd "${srcdir}/${pkgname%-tegra-git}"
+	if [[ ! -d ./build ]]; then
+		mkdir build && cd build
+		cmake .. -DTEGRAX1=1 -DCMAKE_BUILD_TYPE=RelWithDebInfo
+	fi
+}
+
+build() {
+	cd "$srcdir/${pkgname%-tegra-git}/build"
+	make -j$(nproc)
+}
+
+package() {
+	cd "$srcdir/${pkgname%-tegra-git}/build"
+	make DESTDIR="${pkgdir}/" install
+	# /usr/local/bin isn't in PATH by the default,
+	# we should move it to /usr/bin
+	cd ${pkgdir}
+	mv usr/local/bin/ usr/bin/
+	# cleanup when dir is empty
+	rmdir usr/local || exit 0
+}

pkgbuilds/PKGBUILD-tegra-DEBUG

@@ -0,0 +1,44 @@
+# Maintainer: Jai-JAP <[email protected]>
+# Author: Sebastien Chevalier <[email protected]>
+pkgname=box64-tegra-git
+pkgver=1116.9243ea4
+pkgrel=1
+pkgdesc="Linux Userspace x86_64 Emulator with a twist, targeted at ARM64 Linux devices."
+arch=('aarch64')
+url="https://github.com/ptitSeb/box64"
+license=('MIT')
+optdepends=('gl4es: OpenGL 2 for GLES 2 devices')
+makedepends=('git' 'cmake' 'make')
+provides=("${pkgname%-git}" "${pkgname%-tegra-git}-git" "${pkgname%-tegra-git}")
+conflicts=("${pkgname%-git}" "${pkgname%-tegra-git}-git" "${pkgname%-tegra-git}")
+source=('git+https://github.com/ptitSeb/box64')
+md5sums=('SKIP')
+
+pkgver() {
+	cd "$srcdir/${pkgname%-tegra-git}"
+	printf "r%s.%s" "$(git rev-list --count HEAD)" "$(git rev-parse --short HEAD)"
+}
+
+prepare() {
+	cd "${srcdir}/${pkgname%-tegra-git}"
+	if [[ ! -d ./build ]]; then
+		mkdir build && cd build
+		cmake .. -DTEGRAX1=1 -DCMAKE_BUILD_TYPE=Debug
+	fi
+}
+
+build() {
+	cd "$srcdir/${pkgname%-tegra-git}/build"
+	make -j$(nproc)
+}
+
+package() {
+	cd "$srcdir/${pkgname%-tegra-git}/build"
+	make DESTDIR="${pkgdir}/" install
+	# /usr/local/bin isn't in PATH by the default,
+	# we should move it to /usr/bin
+	cd ${pkgdir}
+	mv usr/local/bin/ usr/bin/
+	# cleanup when dir is empty
+	rmdir usr/local || exit 0
+}

pkgbuilds/PKGBUILD-x86_64

@@ -0,0 +1,43 @@
+# Maintainer: Jai-JAP <[email protected]>
+# Author: Sebastien Chevalier <[email protected]>
+pkgname=box64-x64-git
+pkgver=1116.9243ea4
+pkgrel=1
+pkgdesc="Linux Userspace x86_64 Emulator with a twist, targeted at ARM64 Linux devices."
+arch=('aarch64')
+url="https://github.com/ptitSeb/box64"
+license=('MIT')
+makedepends=('git' 'cmake' 'make')
+provides=("${pkgname%-git}" "${pkgname%-x64-git}-git" "${pkgname%-x64-git}")
+conflicts=("${pkgname%-git}" "${pkgname%-x64-git}-git" "${pkgname%-x64-git}")
+source=('git+https://github.com/ptitSeb/box64')
+md5sums=('SKIP')
+
+pkgver() {
+	cd "$srcdir/${pkgname%-x64-git}"
+	printf "r%s.%s" "$(git rev-list --count HEAD)" "$(git rev-parse --short HEAD)"
+}
+
+prepare() {
+	cd "${srcdir}/${pkgname%-x64-git}"
+	if [[ ! -d ./build ]]; then
+		mkdir build && cd build
+		cmake .. -DLD80BITS=1 -DNOALIGN=1 -DCMAKE_BUILD_TYPE=RelWithDebInfo
+	fi
+}
+
+build() {
+	cd "$srcdir/${pkgname%-x64-git}/build"
+	make -j$(nproc)
+}
+
+package() {
+	cd "$srcdir/${pkgname%-x64-git}/build"
+	make DESTDIR="${pkgdir}/" install
+	# /usr/local/bin isn't in PATH by the default,
+	# we should move it to /usr/bin
+	cd ${pkgdir}
+	mv usr/local/bin/ usr/bin/
+	# cleanup when dir is empty
+	rmdir usr/local || exit 0
+}

pkgbuilds/PKGBUILD-x86_64-DEBUG

@@ -0,0 +1,43 @@
+# Maintainer: Jai-JAP <[email protected]>
+# Author: Sebastien Chevalier <[email protected]>
+pkgname=box64-x64-git
+pkgver=1116.9243ea4
+pkgrel=1
+pkgdesc="Linux Userspace x86_64 Emulator with a twist, targeted at ARM64 Linux devices."
+arch=('aarch64')
+url="https://github.com/ptitSeb/box64"
+license=('MIT')
+makedepends=('git' 'cmake' 'make')
+provides=("${pkgname%-git}" "${pkgname%-x64-git}-git" "${pkgname%-x64-git}")
+conflicts=("${pkgname%-git}" "${pkgname%-x64-git}-git" "${pkgname%-x64-git}")
+source=('git+https://github.com/ptitSeb/box64')
+md5sums=('SKIP')
+
+pkgver() {
+	cd "$srcdir/${pkgname%-x64-git}"
+	printf "r%s.%s" "$(git rev-list --count HEAD)" "$(git rev-parse --short HEAD)"
+}
+
+prepare() {
+	cd "${srcdir}/${pkgname%-x64-git}"
+	if [[ ! -d ./build ]]; then
+		mkdir build && cd build
+		cmake .. -DLD80BITS=1 -DNOALIGN=1 -DCMAKE_BUILD_TYPE=Debug
+	fi
+}
+
+build() {
+	cd "$srcdir/${pkgname%-x64-git}/build"
+	make -j$(nproc)
+}
+
+package() {
+	cd "$srcdir/${pkgname%-x64-git}/build"
+	make DESTDIR="${pkgdir}/" install
+	# /usr/local/bin isn't in PATH by the default,
+	# we should move it to /usr/bin
+	cd ${pkgdir}
+	mv usr/local/bin/ usr/bin/
+	# cleanup when dir is empty
+	rmdir usr/local || exit 0
+}

pkgbuilds/README.md

@@ -0,0 +1,24 @@
+# The directory containing all PKGBUILDs for BOX64
+## FAQ
+### 1. How to use it?
+Just download the `PKGBUILD-<your-platform>` (no need to download the whole repository), go to directory where you downloaded and type:
+```sh
+mv ./PKGBUILD-<your-platform> ./PKGBUILD
+cd ..
+makepkg -si
+```
+This will copy the PKGBUILD for your platform (where you type your platform name instead of `<your-platform>`), build it and install the PKGBUILD on 64-bit Archlinux ARM.
+
+In the future, I might try to do an unified PKGBUILD for all platforms that will recognize your platform automatically.
+
+### 2. What platforms are currently supported.
+All specified in [COMPILE.md](../COMPILE.md).
+
+### 3. Any advantages with that sollution?
+This might give you some advantages like those:
+- automatic updates (with some AUR frontends like [`pamac-aur`](https://aur.archlinux.org/packages/pamac-aur/) or [`yay`](https://aur.archlinux.org/packages/yay));
+- easily uninstall with `pacman -R` when no needed (no need other scripts nor Makefile to do this);
+- your `box64` installation is recognized as a package (where it wasn't when installing with `make install`).
+
+
+### Note: You can use [makedeb](https://github.com/makedeb/makedeb) (or) [pkgbuild2spec](https://github.com/prozum/pkgbuild2spec) to compile box64 to .deb or .rpm installer files.

postinst

@@ -0,0 +1,2 @@
+#!/bin/sh
+systemctl restart systemd-binfmt

src/box64context.c

@@ -6,6 +6,9 @@
 #include <signal.h>
 #include <sys/mman.h>
 
+#ifdef DYNAREC
+#include "dynarec/arm64_lock.h"
+#endif
 #include "box64context.h"
 #include "debug.h"
 #include "elfloader.h"
@@ -68,6 +71,93 @@ void free_tlsdatasize(void* p)
 
 void x64Syscall(x64emu_t *emu);
 
+int unlockMutex()
+{
+    int ret = unlockCustommemMutex();
+    int i;
+    #define GO(A, B)                    \
+        i = checkUnlockMutex(&A);       \
+        if(i) {                         \
+            ret|=(1<<B);                \
+        }
+
+    GO(my_context->mutex_once, 5)
+    GO(my_context->mutex_once2, 6)
+    GO(my_context->mutex_trace, 7)
+    #ifdef DYNAREC
+    GO(my_context->mutex_dyndump, 8)
+    #else
+    GO(my_context->mutex_lock, 8)
+    #endif
+    GO(my_context->mutex_tls, 9)
+    GO(my_context->mutex_thread, 10)
+    GO(my_context->mutex_bridge, 11)
+    #undef GO
+
+    return ret;
+}
+
+void relockMutex(int locks)
+{
+    relockCustommemMutex(locks);
+    #define GO(A, B)                    \
+        if(locks&(1<<B))                \
+            pthread_mutex_lock(&A);     \
+
+    GO(my_context->mutex_once, 5)
+    GO(my_context->mutex_once2, 6)
+    GO(my_context->mutex_trace, 7)
+    #ifdef DYNAREC
+    GO(my_context->mutex_dyndump, 8)
+    #else
+    GO(my_context->mutex_lock, 8)
+    #endif
+    GO(my_context->mutex_tls, 9)
+    GO(my_context->mutex_thread, 10)
+    GO(my_context->mutex_bridge, 11)
+    #undef GO
+}
+
+static void init_mutexes(box64context_t* context)
+{
+    pthread_mutexattr_t attr;
+    pthread_mutexattr_init(&attr);
+    pthread_mutexattr_settype(&attr, PTHREAD_MUTEX_ERRORCHECK);
+    pthread_mutex_init(&context->mutex_once, &attr);
+    pthread_mutex_init(&context->mutex_once2, &attr);
+    pthread_mutex_init(&context->mutex_trace, &attr);
+    #ifdef DYNAREC
+    pthread_mutex_init(&context->mutex_dyndump, &attr);
+    #else
+    pthread_mutex_init(&context->mutex_lock, &attr);
+    #endif
+    pthread_mutex_init(&context->mutex_tls, &attr);
+    pthread_mutex_init(&context->mutex_thread, &attr);
+    pthread_mutex_init(&context->mutex_bridge, &attr);
+
+    pthread_mutexattr_destroy(&attr);
+}
+
+void startMailbox(void);
+void haltMailbox(void);
+static void atfork_prepare_box64context(void)
+{
+    // semaphores will go in undetermined state
+    haltMailbox();
+}
+static void atfork_parent_box64context(void)
+{
+    // reinit mailbox only
+    init_mutexes(my_context);
+    startMailbox();
+}
+static void atfork_child_box64context(void)
+{
+    // reinit mutexes and mailbox
+    init_mutexes(my_context);
+    startMailbox();
+}
+
 EXPORTDYN
 box64context_t *NewBox64Context(int argc)
 {
@@ -87,31 +177,34 @@ box64context_t *NewBox64Context(int argc)
 
     context->maplib = NewLibrarian(context, 1);
     context->local_maplib = NewLibrarian(context, 1);
+    context->versym = NewDictionnary();
     context->system = NewBridge();
     // create vsyscall
-    context->vsyscall = AddBridge(context->system, vFv, x64Syscall, 0, NULL);
+    context->vsyscall = AddBridge(context->system, vFEv, x64Syscall, 0, NULL);
+    // create the vsyscalls
+    context->vsyscalls[0] = AddVSyscall(context->system, 96);
+    context->vsyscalls[1] = AddVSyscall(context->system, 201);
+    context->vsyscalls[2] = AddVSyscall(context->system, 309);
+    // create the alternate to map at address
+    addAlternate((void*)0xffffffffff600000, (void*)context->vsyscalls[0]);
+    addAlternate((void*)0xffffffffff600400, (void*)context->vsyscalls[1]);
+    addAlternate((void*)0xffffffffff600800, (void*)context->vsyscalls[2]);
+    // get handle to box64 itself
     context->box64lib = dlopen(NULL, RTLD_NOW|RTLD_GLOBAL);
     context->dlprivate = NewDLPrivate();
 
     context->argc = argc;
     context->argv = (char**)calloc(context->argc+1, sizeof(char*));
 
-    pthread_mutex_init(&context->mutex_once, NULL);
-    pthread_mutex_init(&context->mutex_once2, NULL);
-    pthread_mutex_init(&context->mutex_trace, NULL);
-#ifndef DYNAREC
-    pthread_mutex_init(&context->mutex_lock, NULL);
-#else
-    pthread_mutex_init(&context->mutex_dyndump, NULL);
-#endif
-    pthread_mutex_init(&context->mutex_tls, NULL);
-    pthread_mutex_init(&context->mutex_thread, NULL);
+    init_mutexes(context);
+    pthread_atfork(atfork_prepare_box64context, atfork_parent_box64context, atfork_child_box64context);
+
     pthread_key_create(&context->tlskey, free_tlsdatasize);
 
 
     for (int i=0; i<8; ++i) context->canary[i] = 1 +  getrand(255);
     context->canary[getrand(4)] = 0;
-    printf_log(LOG_DEBUG, "Setting up canary (for Stack protector) at FS:0x14, value:%08X\n", *(uint32_t*)context->canary);
+    printf_log(LOG_DEBUG, "Setting up canary (for Stack protector) at FS:0x28, value:%08X\n", *(uint32_t*)context->canary);
 
     initAllHelpers(context);
 
@@ -129,16 +222,17 @@ void FreeBox64Context(box64context_t** context)
 
     box64context_t* ctx = *context;   // local copy to do the cleanning
 
+    if(ctx->local_maplib)
+        FreeLibrarian(&ctx->local_maplib, NULL);
+    if(ctx->maplib)
+        FreeLibrarian(&ctx->maplib, NULL);
+    FreeDictionnary(&ctx->versym);
+
     for(int i=0; i<ctx->elfsize; ++i) {
         FreeElfHeader(&ctx->elfs[i]);
     }
     free(ctx->elfs);
 
-    if(ctx->maplib)
-        FreeLibrarian(&ctx->maplib);
-    if(ctx->local_maplib)
-        FreeLibrarian(&ctx->local_maplib);
-
     FreeCollection(&ctx->box64_path);
     FreeCollection(&ctx->box64_ld_lib);
     FreeCollection(&ctx->box64_emulated_libs);
@@ -174,8 +268,6 @@ void FreeBox64Context(box64context_t** context)
 
     FreeDLPrivate(&ctx->dlprivate);
 
-    free(ctx->stack);
-
     free(ctx->fullpath);
     free(ctx->box64path);
 
@@ -198,13 +290,14 @@ void FreeBox64Context(box64context_t** context)
     pthread_mutex_destroy(&ctx->mutex_once);
     pthread_mutex_destroy(&ctx->mutex_once2);
     pthread_mutex_destroy(&ctx->mutex_trace);
-#ifndef DYNAREC
-    pthread_mutex_destroy(&ctx->mutex_lock);
-#else
+    #ifdef DYNAREC
     pthread_mutex_destroy(&ctx->mutex_dyndump);
-#endif
+    #else
+    pthread_mutex_destroy(&ctx->mutex_lock);
+    #endif
     pthread_mutex_destroy(&ctx->mutex_tls);
     pthread_mutex_destroy(&ctx->mutex_thread);
+    pthread_mutex_destroy(&ctx->mutex_bridge);
 
     free_neededlib(&ctx->neededlibs);
 
@@ -249,6 +342,9 @@ void add_neededlib(needed_libs_t* needed, library_t* lib)
 {
     if(!needed)
         return;
+    for(int i=0; i<needed->size; ++i)
+        if(needed->libs[i] == lib)
+            return;
     if(needed->size == needed->cap) {
         needed->cap += 8;
         needed->libs = (library_t**)realloc(needed->libs, needed->cap*sizeof(library_t*));
@@ -266,3 +362,28 @@ void free_neededlib(needed_libs_t* needed)
         free(needed->libs);
     needed->libs = NULL;
 }
+
+void add_dependedlib(needed_libs_t* depended, library_t* lib)
+{
+    if(!depended)
+        return;
+    for(int i=0; i<depended->size; ++i)
+        if(depended->libs[i] == lib)
+            return;
+    if(depended->size == depended->cap) {
+        depended->cap += 8;
+        depended->libs = (library_t**)realloc(depended->libs, depended->cap*sizeof(library_t*));
+    }
+    depended->libs[depended->size++] = lib;
+}
+
+void free_dependedlib(needed_libs_t* depended)
+{
+    if(!depended)
+        return;
+    depended->cap = 0;
+    depended->size = 0;
+    if(depended->libs)
+        free(depended->libs);
+    depended->libs = NULL;
+}

src/box64version.h

@@ -2,7 +2,7 @@
 #define __BOX64_VERSION_H_
 
 #define BOX64_MAJOR 0
-#define BOX64_MINOR 0
-#define BOX64_REVISION 6
+#define BOX64_MINOR 1
+#define BOX64_REVISION 5
 
 #endif //__BOX64_VERSION_H_

src/dynarec/arm64_emitter.h

@@ -110,8 +110,9 @@
 #define MOVKw(Rd, imm16)                    EMIT(MOVK_gen(0, 0, ((uint16_t)imm16)&0xffff, Rd))
 #define MOVKw_LSL(Rd, imm16, shift)         EMIT(MOVK_gen(0, (shift)/16, ((uint16_t)imm16)&0xffff, Rd))
 
+// This macro will give a -Wsign-compare warning, probably bug #38341
 #define MOV32w(Rd, imm32) \
-    if(~((uint32_t)(imm32))<0xffff) {                                       \
+    if(~((uint32_t)(imm32))<0xffffu) {                                      \
         MOVNw(Rd, (~(uint32_t)(imm32))&0xffff);                             \
     } else {                                                                \
         MOVZw(Rd, (imm32)&0xffff);                                          \
@@ -137,6 +138,7 @@
 #define ADDx_REG_LSL(Rd, Rn, Rm, lsl)       EMIT(ADDSUB_REG_gen(1, 0, 0, 0b00, Rm, lsl, Rn, Rd))
 #define ADDw_REG(Rd, Rn, Rm)                EMIT(ADDSUB_REG_gen(0, 0, 0, 0b00, Rm, 0, Rn, Rd))
 #define ADDSw_REG(Rd, Rn, Rm)               EMIT(ADDSUB_REG_gen(0, 0, 1, 0b00, Rm, 0, Rn, Rd))
+#define ADDw_REG_LSL(Rd, Rn, Rm, lsl)       EMIT(ADDSUB_REG_gen(0, 0, 0, 0b00, Rm, lsl, Rn, Rd))
 #define ADDxw_REG(Rd, Rn, Rm)               EMIT(ADDSUB_REG_gen(rex.w, 0, 0, 0b00, Rm, 0, Rn, Rd))
 #define ADDSxw_REG(Rd, Rn, Rm)              EMIT(ADDSUB_REG_gen(rex.w, 0, 1, 0b00, Rm, 0, Rn, Rd))
 #define ADDxw_REG_LSR(Rd, Rn, Rm, lsr)      EMIT(ADDSUB_REG_gen(rex.w, 0, 0, 0b01, Rm, lsr, Rn, Rd))
@@ -209,14 +211,14 @@
 #define LDRSW_S9_preindex(Rt, Rn, imm9)   EMIT(LDRS_gen(0b10, 0b00, (imm9)&0x1ff, 0b11, Rn, Rt))
 
 #define LD_gen(size, op1, imm12, Rn, Rt)        ((size)<<30 | 0b111<<27 | (op1)<<24 | 0b01<<22 | (imm12)<<10 | (Rn)<<5 | (Rt))
-#define LDRx_U12(Rt, Rn, imm12)           EMIT(LD_gen(0b11, 0b01, ((uint32_t)(imm12>>3))&0xfff, Rn, Rt))
-#define LDRw_U12(Rt, Rn, imm12)           EMIT(LD_gen(0b10, 0b01, ((uint32_t)(imm12>>2))&0xfff, Rn, Rt))
-#define LDRB_U12(Rt, Rn, imm12)           EMIT(LD_gen(0b00, 0b01, ((uint32_t)(imm12))&0xfff, Rn, Rt))
-#define LDRH_U12(Rt, Rn, imm12)           EMIT(LD_gen(0b01, 0b01, ((uint32_t)(imm12>>1))&0xfff, Rn, Rt))
-#define LDRxw_U12(Rt, Rn, imm12)          EMIT(LD_gen((rex.w)?0b11:0b10, 0b01, ((uint32_t)(imm12>>(2+rex.w)))&0xfff, Rn, Rt))
+#define LDRx_U12(Rt, Rn, imm12)           EMIT(LD_gen(0b11, 0b01, ((uint32_t)((imm12)>>3))&0xfff, Rn, Rt))
+#define LDRw_U12(Rt, Rn, imm12)           EMIT(LD_gen(0b10, 0b01, ((uint32_t)((imm12)>>2))&0xfff, Rn, Rt))
+#define LDRB_U12(Rt, Rn, imm12)           EMIT(LD_gen(0b00, 0b01, ((uint32_t)((imm12)))&0xfff, Rn, Rt))
+#define LDRH_U12(Rt, Rn, imm12)           EMIT(LD_gen(0b01, 0b01, ((uint32_t)((imm12)>>1))&0xfff, Rn, Rt))
+#define LDRxw_U12(Rt, Rn, imm12)          EMIT(LD_gen((rex.w)?0b11:0b10, 0b01, ((uint32_t)((imm12)>>(2+rex.w)))&0xfff, Rn, Rt))
 
 #define LDS_gen(size, op1, imm12, Rn, Rt)       ((size)<<30 | 0b111<<27 | (op1)<<24 | 0b10<<22 | (imm12)<<10 | (Rn)<<5 | (Rt))
-#define LDRSW_U12(Rt, Rn, imm12)          EMIT(LDS_gen(0b10, 0b01, ((uint32_t)(imm12>>2))&0xfff, Rn, Rt))
+#define LDRSW_U12(Rt, Rn, imm12)          EMIT(LDS_gen(0b10, 0b01, ((uint32_t)((imm12)>>2))&0xfff, Rn, Rt))
 
 #define LDR_REG_gen(size, Rm, option, S, Rn, Rt)    ((size)<<30 | 0b111<<27 | 0b01<<22 | 1<<21 | (Rm)<<16 | (option)<<13 | (S)<<12 | (0b10)<<10 | (Rn)<<5 | (Rt))
 #define LDRx_REG(Rt, Rn, Rm)            EMIT(LDR_REG_gen(0b11, Rm, 0b011, 0, Rn, Rt))
@@ -228,13 +230,16 @@
 #define LDRB_REG(Rt, Rn, Rm)            EMIT(LDR_REG_gen(0b00, Rm, 0b011, 0, Rn, Rt))
 #define LDRH_REG(Rt, Rn, Rm)            EMIT(LDR_REG_gen(0b01, Rm, 0b011, 0, Rn, Rt))
 
-#define LDRSH_gen(size, op1, opc, imm12, Rn, Rt)    ((size)<<30 | 0b111<<27 | (op1)<<24 | (opc)<<22 | (imm12)<<10 | (Rn)<<5 | (Rt))
-#define LDRSHx_U12(Rt, Rn, imm12)           EMIT(LDRSH_gen(0b01, 0b01, 0b10, ((uint32_t)(imm12>>1))&0xfff, Rn, Rt))
-#define LDRSHw_U12(Rt, Rn, imm12)           EMIT(LDRSH_gen(0b01, 0b01, 0b11, ((uint32_t)(imm12>>1))&0xfff, Rn, Rt))
-#define LDRSHxw_U12(Rt, Rn, imm12)          EMIT(LDRSH_gen(0b01, 0b01, rex.w?0b10:0b11, ((uint32_t)(imm12>>1))&0xfff, Rn, Rt))
-#define LDRSBx_U12(Rt, Rn, imm12)           EMIT(LDRSH_gen(0b00, 0b01, 0b10, ((uint32_t)(imm12>>0))&0xfff, Rn, Rt))
-#define LDRSBw_U12(Rt, Rn, imm12)           EMIT(LDRSH_gen(0b00, 0b01, 0b11, ((uint32_t)(imm12>>0))&0xfff, Rn, Rt))
-#define LDRSBxw_U12(Rt, Rn, imm12)          EMIT(LDRSH_gen(0b00, 0b01, rex.w?0b10:0b11, ((uint32_t)(imm12>>0))&0xfff, Rn, Rt))
+#define LDRS_U12_gen(size, op1, opc, imm12, Rn, Rt)    ((size)<<30 | 0b111<<27 | (op1)<<24 | (opc)<<22 | (imm12)<<10 | (Rn)<<5 | (Rt))
+#define LDRSHx_U12(Rt, Rn, imm12)           EMIT(LDRS_U12_gen(0b01, 0b01, 0b10, ((uint32_t)(imm12>>1))&0xfff, Rn, Rt))
+#define LDRSHw_U12(Rt, Rn, imm12)           EMIT(LDRS_U12_gen(0b01, 0b01, 0b11, ((uint32_t)(imm12>>1))&0xfff, Rn, Rt))
+#define LDRSHxw_U12(Rt, Rn, imm12)          EMIT(LDRS_U12_gen(0b01, 0b01, rex.w?0b10:0b11, ((uint32_t)(imm12>>1))&0xfff, Rn, Rt))
+#define LDRSBx_U12(Rt, Rn, imm12)           EMIT(LDRS_U12_gen(0b00, 0b01, 0b10, ((uint32_t)(imm12>>0))&0xfff, Rn, Rt))
+#define LDRSBw_U12(Rt, Rn, imm12)           EMIT(LDRS_U12_gen(0b00, 0b01, 0b11, ((uint32_t)(imm12>>0))&0xfff, Rn, Rt))
+#define LDRSBxw_U12(Rt, Rn, imm12)          EMIT(LDRS_U12_gen(0b00, 0b01, rex.w?0b10:0b11, ((uint32_t)(imm12>>0))&0xfff, Rn, Rt))
+
+#define LDRS_REG_gen(size, Rm, option, S, Rn, Rt)    ((size)<<30 | 0b111<<27 | 0b10<<22 | 1<<21 | (Rm)<<16 | (option)<<13 | (S)<<12 | (0b10)<<10 | (Rn)<<5 | (Rt))
+#define LDRSW_REG(Rt, Rn, Rm)           EMIT(LDRS_REG_gen(0b10, Rm, 0b011, 0, Rn, Rt))
 
 #define LDR_PC_gen(opc, imm19, Rt)      ((opc)<<30 | 0b011<<27 | (imm19)<<5 | (Rt))
 #define LDRx_literal(Rt, imm19)         EMIT(LDR_PC_gen(0b01, ((imm19)>>2)&0x7FFFF, Rt))
@@ -250,10 +255,10 @@
 #define STRH_S9_postindex(Rt, Rn, imm9)   EMIT(STR_gen(0b01, 0b00, (imm9)&0x1ff, 0b01, Rn, Rt))
 
 #define ST_gen(size, op1, imm12, Rn, Rt)        ((size)<<30 | 0b111<<27 | (op1)<<24 | 0b00<<22 | (imm12)<<10 | (Rn)<<5 | (Rt))
-#define STRx_U12(Rt, Rn, imm12)           EMIT(ST_gen(0b11, 0b01, ((uint32_t)(imm12>>3))&0xfff, Rn, Rt))
-#define STRw_U12(Rt, Rn, imm12)           EMIT(ST_gen(0b10, 0b01, ((uint32_t)(imm12>>2))&0xfff, Rn, Rt))
-#define STRB_U12(Rt, Rn, imm12)           EMIT(ST_gen(0b00, 0b01, ((uint32_t)(imm12))&0xfff, Rn, Rt))
-#define STRH_U12(Rt, Rn, imm12)           EMIT(ST_gen(0b01, 0b01, ((uint32_t)(imm12>>1))&0xfff, Rn, Rt))
+#define STRx_U12(Rt, Rn, imm12)           EMIT(ST_gen(0b11, 0b01, ((uint32_t)((imm12)>>3))&0xfff, Rn, Rt))
+#define STRw_U12(Rt, Rn, imm12)           EMIT(ST_gen(0b10, 0b01, ((uint32_t)((imm12)>>2))&0xfff, Rn, Rt))
+#define STRB_U12(Rt, Rn, imm12)           EMIT(ST_gen(0b00, 0b01, ((uint32_t)((imm12)))&0xfff, Rn, Rt))
+#define STRH_U12(Rt, Rn, imm12)           EMIT(ST_gen(0b01, 0b01, ((uint32_t)((imm12)>>1))&0xfff, Rn, Rt))
 #define STRxw_U12(Rt, Rn, imm12)          EMIT(ST_gen((rex.w)?0b11:0b10, 0b01, ((uint32_t)((imm12)>>(2+rex.w)))&0xfff, Rn, Rt))
 
 #define STR_REG_gen(size, Rm, option, S, Rn, Rt)    ((size)<<30 | 0b111<<27 | 0b00<<22 | 1<<21 | (Rm)<<16 | (option)<<13 | (S)<<12 | (0b10)<<10 | (Rn)<<5 | (Rt))
@@ -306,6 +311,14 @@
 #define LDAXRxw(Rt, Rn)                 EMIT(MEMAX_gen(2+rex.w, 1, 31, Rn, Rt))
 #define STLXRxw(Rs, Rt, Rn)             EMIT(MEMAX_gen(2+rex.w, 0, Rs, Rn, Rt))
 
+#define MEMAX_pair(size, L, Rs, Rt2, Rn, Rt)    (1<<31 | (size)<<30 | 0b001000<<24 | (L)<<22 | 1<<21 | (Rs)<<16 | 1<<15 | (Rt2)<<10 | (Rn)<<5 | (Rt))
+#define LDAXPx(Rt, Rt2, Rn)             EMIT(MEMAX_pair(1, 1, 31, Rt2, Rn, Rt))
+#define LDAXPw(Rt, Rt2, Rn)             EMIT(MEMAX_pair(0, 1, 31, Rt2, Rn, Rt))
+#define LDAXPxw(Rt, Rt2, Rn)            EMIT(MEMAX_pair(rex.w, 1, 31, Rt2, Rn, Rt))
+#define STLXPx(Rs, Rt, Rt2, Rn)         EMIT(MEMAX_pair(1, 0, Rs, Rt2, Rn, Rt))
+#define STLXPw(Rs, Rt, Rt2, Rn)         EMIT(MEMAX_pair(0, 0, Rs, Rt2, Rn, Rt))
+#define STLXPxw(Rs, Rt, Rt2, Rn)        EMIT(MEMAX_pair(rex.w, 0, Rs, Rt2, Rn, Rt))
+
 // LOAD/STORE Exclusive
 #define MEMX_gen(size, L, Rs, Rn, Rt)       ((size)<<30 | 0b001000<<24 | (L)<<22 | (Rs)<<16 | 0<<15 | 0b11111<<10 | (Rn)<<5 | (Rt))
 #define LDXRB(Rt, Rn)                   EMIT(MEMX_gen(0b00, 1, 31, Rn, Rt))
@@ -319,6 +332,26 @@
 #define LDXRxw(Rt, Rn)                  EMIT(MEMX_gen(2+rex.w, 1, 31, Rn, Rt))
 #define STXRxw(Rs, Rt, Rn)              EMIT(MEMX_gen(2+rex.w, 0, Rs, Rn, Rt))
 
+// Prefetch
+#define PRFM_register(Rm, option, S, Rn, Rt)    (0b11<<30 | 0b111<<27 | 0b10<<22 | 1<<21 | (Rm)<<16 | (option)<<13 | (S)<<12 | 0b10<<10 | (Rn)<<5 | (Rt))
+#define PLD_L1_KEEP(Rn, Rm)             EMIT(PRFM_register(Rm, 0b011, 0, Rn, 0b00000))
+#define PLD_L2_KEEP(Rn, Rm)             EMIT(PRFM_register(Rm, 0b011, 0, Rn, 0b00010))
+#define PLD_L3_KEEP(Rn, Rm)             EMIT(PRFM_register(Rm, 0b011, 0, Rn, 0b00100))
+#define PLD_L1_STREAM(Rn, Rm)           EMIT(PRFM_register(Rm, 0b011, 0, Rn, 0b00001))
+#define PLD_L2_STREAM(Rn, Rm)           EMIT(PRFM_register(Rm, 0b011, 0, Rn, 0b00011))
+#define PLD_L3_STREAM(Rn, Rm)           EMIT(PRFM_register(Rm, 0b011, 0, Rn, 0b00101))
+
+#define PRFM_imm(imm12, Rn, Rt)         (0b11<<30 | 0b111<<27 | 0b01<<24 | 0b10<<22 | (imm12)<<10 | (Rn)<<5 | (Rt))
+#define PLD_L1_KEEP_U12(Rn, imm12)      EMIT(PRFM_imm(((imm12)>>3)&0xfff, Rn, 0b00000))
+#define PLD_L2_KEEP_U12(Rn, imm12)      EMIT(PRFM_imm(((imm12)>>3)&0xfff, Rn, 0b00010))
+#define PLD_L3_KEEP_U12(Rn, imm12)      EMIT(PRFM_imm(((imm12)>>3)&0xfff, Rn, 0b00100))
+#define PLD_L1_STREAM_U12(Rn, imm12)    EMIT(PRFM_imm(((imm12)>>3)&0xfff, Rn, 0b00001))
+#define PLD_L2_STREAM_U12(Rn, imm12)    EMIT(PRFM_imm(((imm12)>>3)&0xfff, Rn, 0b00011))
+#define PLD_L3_STREAM_U12(Rn, imm12)    EMIT(PRFM_imm(((imm12)>>3)&0xfff, Rn, 0b00101))
+
+#define PST_L1_STREAM_U12(Rn, imm12)    EMIT(PRFM_imm(((imm12)>>3)&0xfff, Rn, 0b01001))
+
+
 // BR and Branches
 #define BR_gen(Z, op, A, M, Rn, Rm)       (0b1101011<<25 | (Z)<<24 | (op)<<21 | 0b11111<<16 | (A)<<11 | (M)<<10 | (Rn)<<5 | (Rm))
 #define BR(Rn)                            EMIT(BR_gen(0, 0b00, 0, 0, Rn, 0))
@@ -403,11 +436,16 @@
 #define ORRx_REG(Rd, Rn, Rm)            EMIT(LOGIC_REG_gen(1, 0b01, 0b00, 0, Rm, 0, Rn, Rd))
 #define ORRx_REG_LSL(Rd, Rn, Rm, lsl)   EMIT(LOGIC_REG_gen(1, 0b01, 0b00, 0, Rm, lsl, Rn, Rd))
 #define ORRw_REG_LSL(Rd, Rn, Rm, lsl)   EMIT(LOGIC_REG_gen(0, 0b01, 0b00, 0, Rm, lsl, Rn, Rd))
+#define ORRxw_REG_LSL(Rd, Rn, Rm, lsl)  EMIT(LOGIC_REG_gen(rex.w, 0b01, 0b00, 0, Rm, lsl, Rn, Rd))
+#define ORRx_REG_LSR(Rd, Rn, Rm, lsr)   EMIT(LOGIC_REG_gen(1, 0b01, 0b01, 0, Rm, lsr, Rn, Rd))
+#define ORRw_REG_LSR(Rd, Rn, Rm, lsr)   EMIT(LOGIC_REG_gen(0, 0b01, 0b01, 0, Rm, lsr, Rn, Rd))
+#define ORRxw_REG_LSR(Rd, Rn, Rm, lsr)  EMIT(LOGIC_REG_gen(rex.w, 0b01, 0b01, 0, Rm, lsr, Rn, Rd))
 #define ORRxw_REG(Rd, Rn, Rm)           EMIT(LOGIC_REG_gen(rex.w, 0b01, 0b00, 0, Rm, 0, Rn, Rd))
 #define ORRw_REG(Rd, Rn, Rm)            EMIT(LOGIC_REG_gen(0, 0b01, 0b00, 0, Rm, 0, Rn, Rd))
 #define ORNx_REG(Rd, Rn, Rm)            EMIT(LOGIC_REG_gen(1, 0b01, 0b00, 1, Rm, 0, Rn, Rd))
 #define ORNw_REG(Rd, Rn, Rm)            EMIT(LOGIC_REG_gen(0, 0b01, 0b00, 1, Rm, 0, Rn, Rd))
 #define ORNxw_REG(Rd, Rn, Rm)           EMIT(LOGIC_REG_gen(rex.w, 0b01, 0b00, 1, Rm, 0, Rn, Rd))
+#define ORNx_REG_LSL(Rd, Rn, Rm, lsl)   EMIT(LOGIC_REG_gen(1, 0b01, 0b00, 1, Rm, lsl, Rn, Rd))
 #define EORx_REG(Rd, Rn, Rm)            EMIT(LOGIC_REG_gen(1, 0b10, 0b00, 0, Rm, 0, Rn, Rd))
 #define EORw_REG(Rd, Rn, Rm)            EMIT(LOGIC_REG_gen(0, 0b10, 0b00, 0, Rm, 0, Rn, Rd))
 #define EORxw_REG(Rd, Rn, Rm)           EMIT(LOGIC_REG_gen(rex.w, 0b10, 0b00, 0, Rm, 0, Rn, Rd))
@@ -420,6 +458,12 @@
 #define MOVx_REG(Rd, Rm)                ORRx_REG(Rd, xZR, Rm)
 #define MOVw_REG(Rd, Rm)                ORRw_REG(Rd, xZR, Rm)
 #define MOVxw_REG(Rd, Rm)               ORRxw_REG(Rd, xZR, Rm)
+#define LSLw_IMM(Rd, Rm, lsl)           ORRw_REG_LSL(Rd, xZR, Rm, lsl)
+#define LSLx_IMM(Rd, Rm, lsl)           ORRx_REG_LSL(Rd, xZR, Rm, lsl)
+#define LSLxw_IMM(Rd, Rm, lsl)          ORRxw_REG_LSL(Rd, xZR, Rm, lsl)
+#define LSRw_IMM(Rd, Rm, lsr)           ORRw_REG_LSR(Rd, xZR, Rm, lsr)
+#define LSRx_IMM(Rd, Rm, lsr)           ORRx_REG_LSR(Rd, xZR, Rm, lsr)
+#define LSRxw_IMM(Rd, Rm, lsr)          ORRxw_REG_LSR(Rd, xZR, Rm, lsr)
 #define MVNx_REG(Rd, Rm)                ORNx_REG(Rd, xZR, Rm)
 #define MVNx_REG_LSL(Rd, Rm, lsl)       ORNx_REG_LSL(Rd, xZR, Rm, lsl)
 #define MVNw_REG(Rd, Rm)                ORNw_REG(Rd, xZR, Rm)
@@ -548,13 +592,27 @@
 #define UMULH(Xd, Xn, Xm)               EMIT(MULH_gen(1, Xm, Xn, Xd))
 #define SMULH(Xd, Xn, Xm)               EMIT(MULH_gen(0, Xm, Xn, Xd))
 
-#define MADD_gen(sf, Rm, Ra, Rn, Rd)    ((sf)<<31 | 0b11011<<24 | (Rm)<<16 | (Ra)<<10 | (Rn)<<5 | (Rd))
-#define MADDx(Rd, Rn, Rm, Ra)           EMIT(MADD_gen(1, Rm, Ra, Rn, Rd))
-#define MADDw(Rd, Rn, Rm, Ra)           EMIT(MADD_gen(0, Rm, Ra, Rn, Rd))
-#define MADDxw(Rd, Rn, Rm, Ra)          EMIT(MADD_gen(rex.w, Rm, Ra, Rn, Rd))
+#define MADD_gen(sf, Rm, o0, Ra, Rn, Rd)    ((sf)<<31 | 0b11011<<24 | (Rm)<<16 | (o0)<<15 | (Ra)<<10 | (Rn)<<5 | (Rd))
+#define MADDx(Rd, Rn, Rm, Ra)           EMIT(MADD_gen(1, Rm, 0, Ra, Rn, Rd))
+#define MADDw(Rd, Rn, Rm, Ra)           EMIT(MADD_gen(0, Rm, 0, Ra, Rn, Rd))
+#define MADDxw(Rd, Rn, Rm, Ra)          EMIT(MADD_gen(rex.w, Rm, 0, Ra, Rn, Rd))
 #define MULx(Rd, Rn, Rm)                MADDx(Rd, Rn, Rm, xZR)
 #define MULw(Rd, Rn, Rm)                MADDw(Rd, Rn, Rm, xZR)
 #define MULxw(Rd, Rn, Rm)               MADDxw(Rd, Rn, Rm, xZR)
+#define MSUBx(Rd, Rn, Rm, Ra)           EMIT(MADD_gen(1, Rm, 1, Ra, Rn, Rd))
+#define MSUBw(Rd, Rn, Rm, Ra)           EMIT(MADD_gen(0, Rm, 1, Ra, Rn, Rd))
+#define MSUBxw(Rd, Rn, Rm, Ra)          EMIT(MADD_gen(rex.w, Rm, 1, Ra, Rn, Rd))
+#define MNEGx(Rd, Rn, Rm)               EMIT(MADD_gen(1, Rm, 1, xZR, Rn, Rd))
+#define MNEGw(Rd, Rn, Rm)               EMIT(MADD_gen(0, Rm, 1, xZR, Rn, Rd))
+#define MNEGxw(Rd, Rn, Rm)              EMIT(MADD_gen(rex.w, Rm, 1, xZR, Rn, Rd))
+
+
+// DIV
+#define DIV_gen(sf, Rm, o1, Rn, Rd)     ((sf)<<31 | 0b11010110<<21 | (Rm)<<16 | 0b00001<<11 | (o1)<<10 | (Rn)<<5 | (Rd))
+#define UDIVw(Wd, Wn, Wm)               EMIT(DIV_gen(0, Wm, 0, Wn, Wd))
+#define UDIVx(Xd, Xn, Xm)               EMIT(DIV_gen(1, Xm, 0, Xn, Xd))
+#define SDIVw(Wd, Wn, Wm)               EMIT(DIV_gen(0, Wm, 1, Wn, Wd))
+#define SDIVx(Xd, Xn, Xm)               EMIT(DIV_gen(1, Xm, 1, Xn, Xd))
 
 // CLZ
 #define CL_gen(sf, op, Rn, Rd)          ((sf)<<31 | 1<<30 | 0b11010110<<21 | 0b00010<<11 | (op)<<10 | (Rn)<<5 | (Rd))
@@ -573,9 +631,11 @@
 
 // REV
 #define REV_gen(sf, opc, Rn, Rd)        ((sf)<<31 | 1<<30 | 0b11010110<<21 | (opc)<<10 | (Rn)<<5 | (Rd))
-#define REVx(Rd, Rn)                    EMIT(REV_gen(1, 0b11, Rn, Rd))
-#define REVw(Rd, Rn)                    EMIT(REV_gen(0, 0b10, Rn, Rd))
+#define REV64x(Rd, Rn)                  EMIT(REV_gen(1, 0b11, Rn, Rd))
+#define REV32w(Rd, Rn)                  EMIT(REV_gen(0, 0b10, Rn, Rd))
 #define REVxw(Rd, Rn)                   EMIT(REV_gen(rex.w, 0b10|rex.w, Rn, Rd))
+#define REV16w(Rd, Rn)                  EMIT(REV_gen(0, 0b01, Rn, Rd))
+#define REV16x(Rd, Rn)                  EMIT(REV_gen(1, 0b01, Rn, Rd))
 
 // MRS
 #define MRS_gen(L, o0, op1, CRn, CRm, op2, Rt)  (0b1101010100<<22 | (L)<<21 | 1<<20 | (o0)<<19 | (op1)<<16 | (CRn)<<12 | (CRm)<<8 | (op2)<<5 | (Rt))
@@ -584,9 +644,31 @@
 #define MRS_nzvc(Rt)                    EMIT(MRS_gen(1, 1, 3, 4, 2, 0, Rt))
 // MSR : to System register
 #define MSR_nzvc(Rt)                    EMIT(MRS_gen(0, 1, 3, 4, 2, 0, Rt))
-// mrs    x0, fpcr : 1101010100 1 1 1 011 0100 0100 000 00000    o0=1(op0=3), op1=0b011(3) CRn=0b0100(4) CRm=0b0100(4) op2=2
-#define VMRS(Rt)                        EMIT(MRS_gen(1, 1, 3, 4, 4, 0, Rt))
-#define VMSR(Rt)                        EMIT(MRS_gen(0, 1, 3, 4, 4, 0, Rt))
+// mrs    x0, fpcr : 1101010100 1 1 1 011 0100 0100 000 00000    o0=1(op0=3), op1=0b011(3) CRn=0b0100(4) CRm=0b0100(4) op2=0
+#define MRS_fpcr(Rt)                    EMIT(MRS_gen(1, 1, 3, 4, 4, 0, Rt))
+#define MSR_fpcr(Rt)                    EMIT(MRS_gen(0, 1, 3, 4, 4, 0, Rt))
+// mrs    x0, fpsr : 1101010100 1 1 1 011 0100 0100 001 00000    o0=1(op0=3), op1=0b011(3) CRn=0b0100(4) CRm=0b0100(4) op2=1
+#define MRS_fpsr(Rt)                    EMIT(MRS_gen(1, 1, 3, 4, 4, 1, Rt))
+#define MSR_fpsr(Rt)                    EMIT(MRS_gen(0, 1, 3, 4, 4, 1, Rt))
+// NEON Saturation Bit
+#define FPSR_QC 27
+// NEON Input Denormal Cumulative
+#define FPSR_IDC    7
+// NEON IneXact Cumulative
+#define FPSR_IXC    4
+// NEON Underflow Cumulative
+#define FPSR_UFC    3
+// NEON Overflow Cumulative
+#define FPSR_OFC    2
+// NEON Divide by 0 Cumulative
+#define FPSR_DZC    1
+// NEON Invalid Operation Cumulative
+#define FPSR_IOC    0
+                     
+// FCSEL
+#define FCSEL_scalar(type, Rm, cond, Rn, Rd)    (0b11110<<24 | (type)<<22 | 1<<21 | (Rm)<<16 | (cond)<<12 | 0b11<<10 | (Rn)<<5 | (Rd))
+#define FCSELS(Sd, Sn, Sm, cond)        EMIT(FCSEL_scalar(0b00, Sm, cond, Sn, Sd))
+#define FCSELD(Dd, Dn, Dm, cond)        EMIT(FCSEL_scalar(0b01, Dm, cond, Dn, Dd))
  
 // VLDR
 #define VMEM_gen(size, opc, imm12, Rn, Rt)  ((size)<<30 | 0b111<<27 | 1<<26 | 0b01<<24 | (opc)<<22 | (imm12)<<10 | (Rn)<<5 | (Rt))
@@ -602,6 +684,22 @@
 #define VSTR64_U12(Dt, Rn, imm15)           EMIT(VMEM_gen(0b11, 0b00, ((uint32_t)(imm15>>3))&0xfff, Rn, Dt))
 // imm16 must be 4-aligned
 #define VSTR128_U12(Qt, Rn, imm16)          EMIT(VMEM_gen(0b00, 0b10, ((uint32_t)((imm16)>>4))&0xfff, Rn, Qt))
+// (imm14) must be 1-aligned
+#define VSTR16_U12(Ht, Rn, imm14)           EMIT(VMEM_gen(0b01, 0b00, ((uint32_t)(imm14>>1))&0xfff, Rn, Ht))
+
+#define VMEMUR_vector(size, opc, imm9, Rn, Rt)  ((size)<<30 | 0b111<<27 | 1<<26 | (opc)<<22 | (imm9)<<12 | (Rn)<<5 | (Rt))
+// signed offset, no alignement!
+#define VLDR8_I9(Vt, Rn, imm9)              EMIT(VMEMUR(0b00, 0b01, (imm9)&0b111111111, Rn, Vt))
+#define VLDR16_I9(Vt, Rn, imm9)             EMIT(VMEMUR(0b01, 0b01, (imm9)&0b111111111, Rn, Vt))
+#define VLDR32_I9(Vt, Rn, imm9)             EMIT(VMEMUR(0b10, 0b01, (imm9)&0b111111111, Rn, Vt))
+#define VLDR64_I9(Vt, Rn, imm9)             EMIT(VMEMUR(0b11, 0b01, (imm9)&0b111111111, Rn, Vt))
+#define VLDR128_I9(Vt, Rn, imm9)            EMIT(VMEMUR(0b00, 0b11, (imm9)&0b111111111, Rn, Vt))
+// signed offset, no alignement!
+#define VSTR8_I9(Vt, Rn, imm9)              EMIT(VMEMUR(0b00, 0b00, (imm9)&0b111111111, Rn, Vt))
+#define VSTR16_I9(Vt, Rn, imm9)             EMIT(VMEMUR(0b01, 0b00, (imm9)&0b111111111, Rn, Vt))
+#define VSTR32_I9(Vt, Rn, imm9)             EMIT(VMEMUR(0b10, 0b00, (imm9)&0b111111111, Rn, Vt))
+#define VSTR64_I9(Vt, Rn, imm9)             EMIT(VMEMUR(0b11, 0b00, (imm9)&0b111111111, Rn, Vt))
+#define VSTR128_I9(Vt, Rn, imm9)            EMIT(VMEMUR(0b00, 0b10, (imm9)&0b111111111, Rn, Vt))
 
 #define VMEMW_gen(size, opc, imm9, op2, Rn, Rt)  ((size)<<30 | 0b111<<27 | 1<<26 | (opc)<<22 | (imm9)<<12 | (op2)<<10 | 0b01<<10 | (Rn)<<5 | (Rt))
 #define VLDR64_S9_postindex(Rt, Rn, imm9)   EMIT(VMEMW_gen(0b11, 0b01, (imm9)&0x1ff, 0b01, Rn, Rt))
@@ -629,6 +727,12 @@
 #define VSTR128_REG(Qt, Rn, Rm)             EMIT(VMEM_REG_gen(0b00, 0b10, Rm, 0b011, 0, Rn, Dt))
 #define VSTR128_REG_LSL4(Qt, Rn, Rm)        EMIT(VMEM_REG_gen(0b00, 0b10, Rm, 0b011, 1, Rn, Dt))
 
+#define VLDR_PC_gen(opc, imm19, Rt)         ((opc)<<30 | 0b011<<27 | 1<<26 | (imm19)<<5 | (Rt))
+#define VLDR32_literal(Vt, imm19)           EMIT(VLDR_PC_gen(0b00, ((imm19)>>2)&0x7FFFF, Vt))
+#define VLDR64_literal(Vt, imm19)           EMIT(VLDR_PC_gen(0b01, ((imm19)>>2)&0x7FFFF, Vt))
+#define VLDR128_literal(Vt, imm19)          EMIT(VLDR_PC_gen(0b10, ((imm19)>>2)&0x7FFFF, Vt))
+
+
 #define LD1R_gen(Q, size, Rn, Rt)           ((Q)<<30 | 0b0011010<<23 | 1<<22 | 0<<21 | 0b110<<13 | (size)<<10 | (Rn)<<5 | (Rt))
 #define VLDQ1R_8(Vt, Rn)                    EMIT(LD1R_gen(1, 0b00, Rn, Vt))
 #define VLDQ1R_16(Vt, Rn)                   EMIT(LD1R_gen(1, 0b01, Rn, Vt))
@@ -664,9 +768,32 @@
 #define VSHLQ_32(Vd, Vn, shift)             EMIT(SHL_vector(1, 0b0100 | (((shift)>>3)&3), (shift)&7, Vn, Vd))
 #define VSHLQ_64(Vd, Vn, shift)             EMIT(SHL_vector(1, 0b1000 | (((shift)>>3)&7), (shift)&7, Vn, Vd))
 #define VSHL_8(Vd, Vn, shift)               EMIT(SHL_vector(0, 0b0001, (shift)&7, Vn, Vd))
-#define VSHL_16(Vd, Vn, shift)              EMIT(SHL_vector(0, 0b0010 | ((shift)>>3)&1, (shift)&7, Vn, Vd))
+#define VSHL_16(Vd, Vn, shift)              EMIT(SHL_vector(0, 0b0010 | (((shift)>>3)&1), (shift)&7, Vn, Vd))
 #define VSHL_32(Vd, Vn, shift)              EMIT(SHL_vector(0, 0b0100 | (((shift)>>3)&3), (shift)&7, Vn, Vd))
 
+#define SHL_scalar(U, size, Rm, R, S, Rn, Rd)   (0b01<<30 | (U)<<29 | 0b11110<<24 | (size)<<22 | 1<<21 | (Rm)<<16 | 0b010<<13 | (R)<<12 | (S)<<11 | 1<<10 | (Rn)<<5 | (Rd))
+#define SSHL_R_64(Vd, Vn, Vm)               EMIT(SHL_scalar(0, 0b11, Vm, 0, 0, Vn, Vd))
+#define USHL_R_64(Vd, Vn, Vm)               EMIT(SHL_scalar(1, 0b11, Vm, 0, 0, Vn, Vd))
+
+#define SHL_scalar_imm(U, immh, immb, Rn, Rd)   (0b01<<30 | 0b111110<<23 | (immh)<<19 | (immb)<<16 | 0b01010<<11 | 1<<10 | (Rn)<<5 | (Rd))
+#define SHL_64(Vd, Vn, shift)               EMIT(SHL_scalar_imm(0, 0b1000 | (((shift)>>3)&7), (shift)&7, Vn, Vd))
+
+#define SHL_vector_vector(Q, U, size, Rm, R, S, Rn, Rd) ((Q)<<30 | (U)<<29 | 0b01110<<24 | (size)<<22 | 1<<21 | (Rm)<<16 | 0b010<<13 | (R)<<12 | (S)<<11 | 1<<10 | (Rn)<<5 | (Rd))
+#define SSHL_8(Vd, Vn, Vm)                  EMIT(SHL_vector_vector(0, 0, 0b00, Vm, 0, 0, Vn, Vd))
+#define SSHL_16(Vd, Vn, Vm)                 EMIT(SHL_vector_vector(0, 0, 0b01, Vm, 0, 0, Vn, Vd))
+#define SSHL_32(Vd, Vn, Vm)                 EMIT(SHL_vector_vector(0, 0, 0b10, Vm, 0, 0, Vn, Vd))
+#define SSHLQ_8(Vd, Vn, Vm)                 EMIT(SHL_vector_vector(1, 0, 0b00, Vm, 0, 0, Vn, Vd))
+#define SSHLQ_16(Vd, Vn, Vm)                EMIT(SHL_vector_vector(1, 0, 0b01, Vm, 0, 0, Vn, Vd))
+#define SSHLQ_32(Vd, Vn, Vm)                EMIT(SHL_vector_vector(1, 0, 0b10, Vm, 0, 0, Vn, Vd))
+#define SSHLQ_64(Vd, Vn, Vm)                EMIT(SHL_vector_vector(1, 0, 0b11, Vm, 0, 0, Vn, Vd))
+#define USHL_8(Vd, Vn, Vm)                  EMIT(SHL_vector_vector(0, 1, 0b00, Vm, 0, 0, Vn, Vd))
+#define USHL_16(Vd, Vn, Vm)                 EMIT(SHL_vector_vector(0, 1, 0b01, Vm, 0, 0, Vn, Vd))
+#define USHL_32(Vd, Vn, Vm)                 EMIT(SHL_vector_vector(0, 1, 0b10, Vm, 0, 0, Vn, Vd))
+#define USHLQ_8(Vd, Vn, Vm)                 EMIT(SHL_vector_vector(1, 1, 0b00, Vm, 0, 0, Vn, Vd))
+#define USHLQ_16(Vd, Vn, Vm)                EMIT(SHL_vector_vector(1, 1, 0b01, Vm, 0, 0, Vn, Vd))
+#define USHLQ_32(Vd, Vn, Vm)                EMIT(SHL_vector_vector(1, 1, 0b10, Vm, 0, 0, Vn, Vd))
+#define USHLQ_64(Vd, Vn, Vm)                EMIT(SHL_vector_vector(1, 1, 0b11, Vm, 0, 0, Vn, Vd))
+
 #define SHR_vector(Q, U, immh, immb, Rn, Rd)  ((Q)<<30 | (U)<<29 | 0b011110<<23 | (immh)<<19 | (immb)<<16 | 0b00000<<11 | 1<<10 | (Rn)<<5 | (Rd))
 #define VSHRQ_8(Vd, Vn, shift)              EMIT(SHR_vector(1, 1, 0b0001, (8-(shift))&7, Vn, Vd))
 #define VSHRQ_16(Vd, Vn, shift)             EMIT(SHR_vector(1, 1, 0b0010 | (((16-(shift))>>3)&1), (16-(shift))&7, Vn, Vd))
@@ -683,7 +810,12 @@
 #define VSSHR_16(Vd, Vn, shift)             EMIT(SHR_vector(0, 0, 0b0010 | (((16-(shift))>>3)&1), (16-(shift))&7, Vn, Vd))
 #define VSSHR_32(Vd, Vn, shift)             EMIT(SHR_vector(0, 0, 0b0100 | (((32-(shift))>>3)&3), (32-(shift))&7, Vn, Vd))
 
+#define SHR_scalar_imm(U, immh, immb, o1, o0, Rn, Rd)   (0b01<<30 | (U)<<29 | 0b111110<<23 | (immh)<<19 | (immb)<<16 | (o1)<<13 | (o0)<<12 | 1<<10 | (Rn)<<5 | (Rd))
+#define SSHR_64(Vd, Vn, shift)              EMIT(SHR_scalar_imm(0, 0b1000 | (((64-(shift))>>3)&7), (64-(shift))&7, 0, 0, Vn, Vd))
+#define USHR_64(Vd, Vn, shift)              EMIT(SHR_scalar_imm(1, 0b1000 | (((64-(shift))>>3)&7), (64-(shift))&7, 0, 0, Vn, Vd))
+
 #define EXT_vector(Q, Rm, imm4, Rn, Rd)     ((Q)<<30 | 0b101110<<24 | (Rm)<<16 | (imm4)<<11 | (Rn)<<5 | (Rd))
+#define VEXT_8(Rd, Rn, Rm, index)           EMIT(EXT_vector(0, Rm, index, Rn, Rd))
 #define VEXTQ_8(Rd, Rn, Rm, index)          EMIT(EXT_vector(1, Rm, index, Rn, Rd))
 
 // Shift Left and Insert (not touching lower part of dest)
@@ -723,6 +855,26 @@
 #define VSUB_16(Vd, Vn, Vm)                 EMIT(ADDSUB_vector(0, 1, 0b01, Vm, Vn, Vd))
 #define VSUB_32(Vd, Vn, Vm)                 EMIT(ADDSUB_vector(0, 1, 0b10, Vm, Vn, Vd))
 
+#define NEGABS_vector(Q, U, size, Rn, Rd)   ((Q)<<30 | (U)<<29 | 0b01110<<24 | (size)<<22 | 0b10000<<17 | 0b01011<<12 | 0b10<<10 | (Rn)<<5 | (Rd))
+#define NEG_8(Vd, Vn)                       EMIT(NEGABS_vector(0, 1, 0b00, Vn, Vd))
+#define NEG_16(Vd, Vn)                      EMIT(NEGABS_vector(0, 1, 0b01, Vn, Vd))
+#define NEG_32(Vd, Vn)                      EMIT(NEGABS_vector(0, 1, 0b10, Vn, Vd))
+#define NEGQ_8(Vd, Vn)                      EMIT(NEGABS_vector(1, 1, 0b00, Vn, Vd))
+#define NEGQ_16(Vd, Vn)                     EMIT(NEGABS_vector(1, 1, 0b01, Vn, Vd))
+#define NEGQ_32(Vd, Vn)                     EMIT(NEGABS_vector(1, 1, 0b10, Vn, Vd))
+#define NEGQ_64(Vd, Vn)                     EMIT(NEGABS_vector(1, 1, 0b11, Vn, Vd))
+#define ABS_8(Vd, Vn)                       EMIT(NEGABS_vector(0, 0, 0b00, Vn, Vd))
+#define ABS_16(Vd, Vn)                      EMIT(NEGABS_vector(0, 0, 0b01, Vn, Vd))
+#define ABS_32(Vd, Vn)                      EMIT(NEGABS_vector(0, 0, 0b10, Vn, Vd))
+#define ABSQ_8(Vd, Vn)                      EMIT(NEGABS_vector(1, 0, 0b00, Vn, Vd))
+#define ABSQ_16(Vd, Vn)                     EMIT(NEGABS_vector(1, 0, 0b01, Vn, Vd))
+#define ABSQ_32(Vd, Vn)                     EMIT(NEGABS_vector(1, 0, 0b10, Vn, Vd))
+#define ABSQ_64(Vd, Vn)                     EMIT(NEGABS_vector(1, 0, 0b11, Vn, Vd))
+
+#define NEGABS_vector_scalar(U, size, Rn, Rd)   (0b01<<30 | (U)<<29 | 0b11110<<24 | (size)<<22 | 0b10000<<17 | 0b01011<<12 | 0b10<<10 | (Rn)<<5 | (Rd))
+#define NEG_64(Vd, Vn)                     EMIT(NEGABS_vector_scalar(1, 0b11, Vn, Vd))
+#define ABS_64(Vd, Vn)                     EMIT(NEGABS_vector_scalar(0, 0b11, Vn, Vd))
+
 // FMOV
 #define FMOV_general(sf, type, mode, opcode, Rn, Rd)    ((sf)<<31 | 0b11110<<24 | (type)<<22 | 1<<21 | (mode)<<19 | (opcode)<<16 | (Rn)<<5 | (Rd))
 // 32-bit to single-precision
@@ -742,12 +894,21 @@
 #define FMOVS(Sd, Sn)                       EMIT(FMOV_register(0b00, Sn, Sd))
 #define FMOVD(Dd, Dn)                       EMIT(FMOV_register(0b01, Dn, Dd))
 
+#define FMOV_vector_imm(Q, op, abc, defgh, Rd)  ((Q)<<30 | (op)<<29 | 0b0111100000<<19 | (abc)<<16 | 0b1111<<12 | 1<<10 | (defgh)<<5 | (Rd))
+#define VFMOVS_8(Vd, u8)                    EMIT(FMOV_vector_imm(0, 0, ((u8)>>5)&0b111, (u8)&0b11111, Vd))
+#define VFMOVSQ_8(Vd, u8)                   EMIT(FMOV_vector_imm(1, 0, ((u8)>>5)&0b111, (u8)&0b11111, Vd))
+#define VFMOVDQ_8(Vd, u8)                   EMIT(FMOV_vector_imm(1, 1, ((u8)>>5)&0b111, (u8)&0b11111, Vd))
+
+#define FMOV_scalar_imm(type, imm8, Rd)     (0b11110<<24 | (type)<<22 | 1<<21 | (imm8)<<13 | 0b100<<10 | (Rd))
+#define FMOVS_8(Sd, u8)                     EMIT(FMOV_scalar_imm(0b00, u8, Sd))
+#define FMOVD_8(Dd, u8)                     EMIT(FMOV_scalar_imm(0b01, u8, Dd))
+
 // VMOV
 #define VMOV_element(imm5, imm4, Rn, Rd)    (1<<30 | 1<<29 | 0b01110000<<21 | (imm5)<<16 | (imm4)<<11 | 1<<10 | (Rn)<<5 | (Rd))
-#define VMOVeB(Vd, i1, Vn, i2)              EMIT(VMOV_element(((i1)<<1) | 1, i2, Vn, Vd))
-#define VMOVeH(Vd, i1, Vn, i2)              EMIT(VMOV_element(((i1)<<2) | 2, i2<<1, Vn, Vd))
-#define VMOVeS(Vd, i1, Vn, i2)              EMIT(VMOV_element(((i1)<<3) | 4, i2<<2, Vn, Vd))
-#define VMOVeD(Vd, i1, Vn, i2)              EMIT(VMOV_element(((i1)<<4) | 8, i2<<3, Vn, Vd))
+#define VMOVeB(Vd, i1, Vn, i2)              EMIT(VMOV_element(((i1)<<1) | 1, (i2), Vn, Vd))
+#define VMOVeH(Vd, i1, Vn, i2)              EMIT(VMOV_element(((i1)<<2) | 2, (i2)<<1, Vn, Vd))
+#define VMOVeS(Vd, i1, Vn, i2)              EMIT(VMOV_element(((i1)<<3) | 4, (i2)<<2, Vn, Vd))
+#define VMOVeD(Vd, i1, Vn, i2)              EMIT(VMOV_element(((i1)<<4) | 8, (i2)<<3, Vn, Vd))
 
 #define VMOV_from(imm5, Rn, Rd)     (1<<30 | 0<<29 | 0b01110000<<21 | (imm5)<<16 | 0b0011<<11 | 1<<10 | (Rn)<<5 | (Rd))
 #define VMOVQBfrom(Vd, index, Wn)    EMIT(VMOV_from(((index)<<1) | 1, Wn, Vd))
@@ -761,6 +922,9 @@
 #define VMOVHto(Wd, Vn, index)      EMIT(UMOV_gen(0, ((index)<<2) | 2, Vn, Wd))
 #define VMOVSto(Wd, Vn, index)      EMIT(UMOV_gen(0, ((index)<<3) | 4, Vn, Wd))
 
+#define MVN_vector(Q, Rn, Rd)       ((Q)<<30 | 1<<29 | 0b01110<<24 | 0b10000<<17 | 0b00101<<12 | 0b10<<10 | (Rn)<<5 | (Rd))
+#define VMVNQ(Rd, Rn)               EMIT(MVN_vector(1, Rn, Rd))
+
 // VORR
 #define ORR_vector(Q, Rm, Rn, Rd)   ((Q)<<30 | 0b01110<<24 | 0b10<<22 | 1<<21 | (Rm)<<16 | 0b00011<<11 | 1<<10 | (Rn)<<5 | (Rd))
 #define VORRQ(Vd, Vn, Vm)           EMIT(ORR_vector(1, Vm, Vn, Vd))
@@ -802,18 +966,27 @@
 
 // ADD Pair
 #define ADDP_vector(Q, size, Rm, Rn, Rd)    ((Q)<<30 | 0b01110<<24 | (size)<<22 | 1<<21 | (Rm)<<16 | 0b10111<<11 | 1<<10 | (Rn)<<5 | (Rd))
-#define VADDPQ_8(Vd, Vn, Vm)        EMIT(ADDP(1, 0b00, Vm, Vn, Vd))
-#define VADDPQ_16(Vd, Vn, Vm)       EMIT(ADDP(1, 0b01, Vm, Vn, Vd))
-#define VADDPQ_32(Vd, Vn, Vm)       EMIT(ADDP(1, 0b10, Vm, Vn, Vd))
-#define VADDPQ_64(Vd, Vn, Vm)       EMIT(ADDP(1, 0b11, Vm, Vn, Vd))
-#define VADDP_8(Vd, Vn, Vm)         EMIT(ADDP(0, 0b00, Vm, Vn, Vd))
-#define VADDP_16(Vd, Vn, Vm)        EMIT(ADDP(0, 0b01, Vm, Vn, Vd))
-#define VADDP_32(Vd, Vn, Vm)        EMIT(ADDP(0, 0b10, Vm, Vn, Vd))
+#define VADDPQ_8(Vd, Vn, Vm)        EMIT(ADDP_vector(1, 0b00, Vm, Vn, Vd))
+#define VADDPQ_16(Vd, Vn, Vm)       EMIT(ADDP_vector(1, 0b01, Vm, Vn, Vd))
+#define VADDPQ_32(Vd, Vn, Vm)       EMIT(ADDP_vector(1, 0b10, Vm, Vn, Vd))
+#define VADDPQ_64(Vd, Vn, Vm)       EMIT(ADDP_vector(1, 0b11, Vm, Vn, Vd))
+#define VADDP_8(Vd, Vn, Vm)         EMIT(ADDP_vector(0, 0b00, Vm, Vn, Vd))
+#define VADDP_16(Vd, Vn, Vm)        EMIT(ADDP_vector(0, 0b01, Vm, Vn, Vd))
+#define VADDP_32(Vd, Vn, Vm)        EMIT(ADDP_vector(0, 0b10, Vm, Vn, Vd))
 
 #define FADDP_vector(Q, sz, Rm, Rn, Rd) ((Q)<<30 | 1<<29 | 0b01110<<24 | (sz)<<22 | 1<<21 | (Rm)<<16 | 0b11010<<11 | 1<<10 | (Rn)<<5 | (Rd))
 #define VFADDPQS(Vd, Vn, Vm)        EMIT(FADDP_vector(1, 0, Vm, Vn, Vd))
 #define VFADDPQD(Vd, Vn, Vm)        EMIT(FADDP_vector(1, 1, Vm, Vn, Vd))
 
+// NEG / ABS
+#define FNEGABS_scalar(type, opc, Rn, Rd)  (0b11110<<24 | (type)<<22 | 1<<21 | (opc)<<15 | 0b10000<<10 | (Rn)<<5 | (Rd))
+#define FNEGS(Sd, Sn)               EMIT(FNEGABS_scalar(0b00, 0b10, Sn, Sd))
+#define FNEGD(Dd, Dn)               EMIT(FNEGABS_scalar(0b01, 0b10, Dn, Dd))
+
+#define FABSS(Sd, Sn)               EMIT(FNEGABS_scalar(0b00, 0b01, Sn, Sd))
+#define FABSD(Dd, Dn)               EMIT(FNEGABS_scalar(0b01, 0b01, Dn, Dd))
+
+
 // MUL
 #define FMUL_vector(Q, sz, Rm, Rn, Rd)  ((Q)<<30 | 1<<29 | 0b01110<<24 | (sz)<<22 | 1<<21 | (Rm)<<16 | 0b11011<<11 | 1<<10 | (Rn)<<5 | (Rd))
 #define VFMULS(Sd, Sn, Sm)          EMIT(FMUL_vector(0, 0, Sm, Sn, Sd))
@@ -824,6 +997,11 @@
 #define FMULS(Sd, Sn, Sm)           EMIT(FMUL_scalar(0b00, Sm, Sn, Sd))
 #define FMULD(Dd, Dn, Dm)           EMIT(FMUL_scalar(0b01, Dm, Dn, Dd))
 
+#define FMLA_vector(Q, op, sz, Rm, Rn, Rd)	((Q)<<30 | 0b01110<<24 | (op)<<23 | (sz)<<22 | 1<<21 | (Rm)<<16 | 0b11001<<11 | 1<<10 | (Rn)<<5 | (Rd))
+#define VFMLAS(Sd, Sn, Sm)	        EMIT(FMLA_vector(0, 0, 0, Sm, Sn, Sd))
+#define VFMLAQS(Sd, Sn, Sm)	        EMIT(FMLA_vector(1, 0, 0, Sm, Sn, Sd))
+#define CFMLAQD(Dd, Dn, Dm)	        EMIT(FMLA_vector(1, 0, 1, Dm, Dn, Dd))
+
 // DIV
 #define FDIV_vector(Q, sz, Rm, Rn, Rd)  ((Q)<<30 | 1<<29 | 0b01110<<24 | (sz)<<22 | 1<<21 | (Rm)<<16 | 0b11111<<11 | 1<<10 | (Rn)<<5 | (Rd))
 #define VFDIVS(Sd, Sn, Sm)          EMIT(FDIV_vector(0, 0, Sm, Sn, Sd))
@@ -834,6 +1012,16 @@
 #define FDIVS(Sd, Sn, Sm)           EMIT(FDIV_scalar(0b00, Sm, Sn, Sd))
 #define FDIVD(Dd, Dn, Dm)           EMIT(FDIV_scalar(0b01, Dm, Dn, Dd))
 
+#define FRECPE_vector(Q, sz, Rn, Rd)   ((Q)<<30 | 0<<29 | 0b01110<<24 | 1<<23 | (sz)<<22 | 0b10000<<17 | 0b11101<<12 | 0b10<<10 | (Rn)<<5 | (Rd))
+#define VFRECPES(Vd, Vn)           EMIT(FRECPE_vector(0, 0, Vn, Vd))
+#define VFRECPEQS(Vd, Vn)          EMIT(FRECPE_vector(1, 0, Vn, Vd))
+#define VFRECPEQD(Vd, Vn)          EMIT(FRECPE_vector(1, 0, Vn, Vd))
+
+#define FRECPS_vector(Q, sz, Rm, Rn, Rd)   ((Q)<<30 | 0<<29 | 0b01110<<24 | 0<<23 | (sz)<<22 | 1<<21 | (Rm)<<16 | 0b11111<<11 | 1<<10 | (Rn)<<5 | (Rd))
+#define VFRECPSS(Vd, Vn, Vm)       EMIT(FRECPS_vector(0, 0, Vm, Vn, Vd))
+#define VFRECPSQS(Vd, Vn, Vm)      EMIT(FRECPS_vector(1, 0, Vm, Vn, Vd))
+#define VFRECPSQD(Vd, Vn, Vm)      EMIT(FRECPS_vector(1, 0, Vm, Vn, Vd))
+
 // SQRT
 #define FSQRT_vector(Q, sz, Rn, Rd)     ((Q)<<30 | 1<<29 | 0b01110<<24 | 1<<23 | (sz)<<22 | 0b10000<<17 | 0b11111<<12 | 0b10<<10 | (Rn)<<5 | (Rd))
 #define VFSQRTS(Sd, Sn)             EMIT(FSQRT_vector(0, 0, Sn, Sd))
@@ -844,6 +1032,16 @@
 #define FSQRTS(Sd, Sn)              EMIT(FSQRT_scalar(0b00, Sn, Sd))
 #define FSQRTD(Dd, Dn)              EMIT(FSQRT_scalar(0b01, Dn, Dd))
 
+#define FRSQRTE_vector(Q, sz, Rn, Rd)   ((Q)<<30 | 1<<29 | 0b01110<<24 | 1<<23 | (sz)<<22 | 0b10000<<17 | 0b11101<<12 | 0b10<<10 | (Rn)<<5 | (Rd))
+#define VFRSQRTES(Vd, Vn)           EMIT(FRSQRTE_vector(0, 0, Vn, Vd))
+#define VFRSQRTEQS(Vd, Vn)          EMIT(FRSQRTE_vector(1, 0, Vn, Vd))
+#define VFRSQRTEQD(Vd, Vn)          EMIT(FRSQRTE_vector(1, 0, Vn, Vd))
+
+#define FRSQRTS_vector(Q, sz, Rm, Rn, Rd)   ((Q)<<30 | 0<<29 | 0b01110<<24 | 1<<23 | (sz)<<22 | 1<<21 | (Rm)<<16 | 0b11111<<11 | 1<<10 | (Rn)<<5 | (Rd))
+#define VFRSQRTSS(Vd, Vn, Vm)       EMIT(FRSQRTS_vector(0, 0, Vm, Vn, Vd))
+#define VFRSQRTSQS(Vd, Vn, Vm)      EMIT(FRSQRTS_vector(1, 0, Vm, Vn, Vd))
+#define VFRSQRTSQD(Vd, Vn, Vm)      EMIT(FRSQRTS_vector(1, 0, Vm, Vn, Vd))
+
 // CMP
 #define FCMP_scalar(type, Rn, Rm, opc)  (0b11110<<24 | (type)<<22 | 1<<21 | (Rm)<<16 | 0b1000<<10 | (Rn)<<5 | (opc)<<3)
 #define FCMPS(Sn, Sm)               EMIT(FCMP_scalar(0b00, Sn, Sm, 0b00))
@@ -1019,8 +1217,8 @@
 #define SCVTFDx(Dd, Xn)             EMIT(SCVTF_scalar(1, 0b01, 0b00, 0b010, Xn, Dd))
 
 #define SCVTF_vector_scalar(U, sz, Rn, Rd)    (1<<30 | (U)<<29 | 0b11110<<24 | (sz)<<22 | 0b10000<<17 | 0b11101<<12 | 0b10<<10 | (Rn)<<5 | (Rd))
-#define SCVTFSS(Vd, Vn)             EMIT(SCVT_vector_scalar(0, 0, Vn, Vd))
-#define SCVTFDD(Vd, Vn)             EMIT(SCVT_vector_scalar(0, 1, Vn, Vd))
+#define SCVTFSS(Vd, Vn)             EMIT(SCVTF_vector_scalar(0, 0, Vn, Vd))
+#define SCVTFDD(Vd, Vn)             EMIT(SCVTF_vector_scalar(0, 1, Vn, Vd))
 
 #define SCVTF_vector(Q, U, sz, Rn, Rd)      ((Q)<<30 | (U)<<29 | 0b01110<<24 | (sz)<<22 | 0b10000<<17 | 0b11101<<12 | 0b10<<10 | (Rn)<<5 | (Rd))
 #define SCVTFS(Vd, Vn)              EMIT(SCVTF_vector(0, 0, 0, Vn, Vd))
@@ -1028,6 +1226,36 @@
 #define SCVTQFS(Vd, Vn)             EMIT(SCVTF_vector(1, 0, 0, Vn, Vd))
 #define SCVTQFD(Vd, Vn)             EMIT(SCVTF_vector(1, 0, 1, Vn, Vd))
 
+// FRINTI Floating-point Round to Integral, using current rounding mode from FPCR (vector).
+#define FRINT_vector(Q, U, o2, sz, o1, Rn, Rd) ((Q)<<30 | (U)<<29 | 0b01110<<24 | (o2)<<23 | (sz)<<22 | 0b10000<<17 | 0b1100<<13 | (o1)<<12 | 0b10<<10 | (Rn)<<5 | (Rd))
+#define VFRINTIS(Vd,Vn)             EMIT(FRINT_vector(0, 1, 1, 0, 1, Vn, Vd))
+#define VFRINTISQ(Vd,Vn)            EMIT(FRINT_vector(1, 1, 1, 0, 1, Vn, Vd))
+#define VFRINTIDQ(Vd,Vn)            EMIT(FRINT_vector(1, 1, 1, 1, 1, Vn, Vd))
+
+#define FRINTxx_scalar(type, op, Rn, Rd)  (0b11110<<24 | (type)<<22 | 1<<21 | 0b0100<<17 | (op)<<15 | 0b10000<<10 | (Rn)<<5 | (Rd))
+#define FRINT32ZS(Sd, Sn)           EMIT(FRINTxx_scalar(0b00, 0b00, Sn, Sd))
+#define FRINT32ZD(Dd, Dn)           EMIT(FRINTxx_scalar(0b01, 0b00, Dn, Dd))
+#define FRINT32XS(Sd, Sn)           EMIT(FRINTxx_scalar(0b00, 0b01, Sn, Sd))
+#define FRINT32XD(Dd, Dn)           EMIT(FRINTxx_scalar(0b01, 0b01, Dn, Dd))
+#define FRINT64ZS(Sd, Sn)           EMIT(FRINTxx_scalar(0b00, 0b10, Sn, Sd))
+#define FRINT64ZD(Dd, Dn)           EMIT(FRINTxx_scalar(0b01, 0b10, Dn, Dd))
+#define FRINT64XS(Sd, Sn)           EMIT(FRINTxx_scalar(0b00, 0b11, Sn, Sd))
+#define FRINT64XD(Dd, Dn)           EMIT(FRINTxx_scalar(0b01, 0b11, Dn, Dd))
+
+#define FRINT_scalar(type, rmode, Rn, Rd)   (0b11110<<24 | (type)<<22 | 1<<21 | 0b001<<18 | (rmode)<<15 | 0b10000<<10 | (Rn)<<5 | (Rd))
+// round toward 0 (truncate)
+#define FRINTZS(Sd, Sn)             EMIT(FRINT_scalar(0b00, 0b011, Sn, Sd))
+// round toward 0 (truncate)
+#define FRINTZD(Sd, Sn)             EMIT(FRINT_scalar(0b01, 0b011, Sn, Sd))
+// round with current FPCR mode
+#define FRINTXS(Sd, Sn)             EMIT(FRINT_scalar(0b00, 0b110, Sn, Sd))
+// round with current FPCR mode
+#define FRINTXD(Sd, Sn)             EMIT(FRINT_scalar(0b01, 0b110, Sn, Sd))
+// round with mode, mode is 0 = TieEven, 1=+inf, 2=-inf, 3=zero
+#define FRINTRRS(Sd, Sn, mode)      EMIT(FRINT_scalar(0b00, ((mode)&3), Sn, Sd))
+// round with mode, mode is 0 = TieEven, 1=+inf, 2=-inf, 3=zero
+#define FRINTRRD(Dd, Dn, mode)      EMIT(FRINT_scalar(0b01, ((mode)&3), Dn, Dd))
+
 // FMAX / FMIN
 #define FMINMAX_vector(Q, U, o1, sz, Rm, Rn, Rd)    ((Q)<<30 | (U)<<29 | 0b01110<<24 | (o1)<<23 | (sz)<<22 | 0b1<<21 | (Rm)<<16 | 0b11110<<11 | 1<<10 | (Rn)<<5 | (Rd))
 #define VFMINS(Vd, Vn, Vm)          EMIT(FMINMAX_vector(0, 0, 1, 0, Vm, Vn, Vd))
@@ -1088,6 +1316,7 @@
 #define TBL_gen(Q, Rm, len, op, Rn, Rd) ((Q)<<30 | 0b001110<<24 | (Rm)<<16 | (len)<<13 | (op)<<12 | (Rn)<<5 | (Rd))
 //Use Rm[] to pick from Rn element and store in Rd. Out-of-range element gets 0
 #define VTBLQ1_8(Rd, Rn, Rm)        EMIT(TBL_gen(1, Rm, 0b00, 0, Rn, Rd))
+#define VTBL1_8(Rd, Rn, Rm)         EMIT(TBL_gen(0, Rm, 0b00, 0, Rn, Rd))
 //Use Rm[] to pick from Rn, Rn+1 element and store in Rd. Out-of-range element gets 0
 #define VTBLQ2_8(Rd, Rn, Rm)        EMIT(TBL_gen(1, Rm, 0b01, 0, Rn, Rd))
 //Use Rm[] to pick from Rn, Rn+1, Rn+2 element and store in Rd. Out-of-range element gets 0
@@ -1116,6 +1345,14 @@
 #define VTRNQ2_8(Vd, Vn, Vm)        EMIT(TRN_gen(1, 0b00, Vm, 1, Vn, Vd))
 
 // QXTN / QXTN2
+#define QXTN_scalar(U, size, Rn, Rd)        (0b01<<30 | (U)<<29 | 0b11110<<24 | (size)<<22 | 0b10000<<17 | 0b10100<<12 | 0b10<<10 | (Rn)<<5 | (Rd))
+// Signed saturating extract Narrow, from D to S
+#define SQXTN_S_D(Sd, Dn)           EMIT(QXTN_scalar(0, 0b10, Dn, Sd))
+// Signed saturating extract Narrow, from S to H
+#define SQXTN_H_S(Hd, Sn)           EMIT(QXTN_scalar(0, 0b01, Sn, Hd))
+// Signed saturating extract Narrow, from H to B
+#define SQXTN_B_H(Bd, Hn)           EMIT(QXTN_scalar(0, 0b00, Hn, Bd))
+
 #define QXTN_vector(Q, U, size, Rn, Rd)     ((Q)<<30 | (U)<<29 | 0b01110<<24 | (size)<<22 | 0b10000<<17 | 0b10100<<12 | 0b10<<10 | (Rn)<<5 | (Rd))
 // Signed saturating extract Narrow, takes Rn element and reduce 64->32 with Signed saturation and fit lower part of Rd
 #define SQXTN_32(Rd, Rn)            EMIT(QXTN_vector(0, 0, 0b10, Rn, Rd))
@@ -1129,22 +1366,39 @@
 #define SQXTN_8(Rd, Rn)             EMIT(QXTN_vector(0, 0, 0b00, Rn, Rd))
 // Signed saturating extract Narrow, takes Rn element and reduce 16->8 with Signed saturation and fit higher part of Rd
 #define SQXTN2_8(Rd, Rn)            EMIT(QXTN_vector(1, 0, 0b00, Rn, Rd))
+// Unsigned saturating Extract Narrow, takes Rn element and reduce 64->32 with Unsigned saturation and fit lower part of Rd
+#define UQXTN_32(Rd, Rn)            EMIT(QXTN_vector(0, 1, 0b10, Rn, Rd))
+// Unsigned saturating Extract Narrow, takes Rn element and reduce 64->32 with Unsigned saturation and fit higher part of Rd
+#define UQXTN2_32(Rd, Rn)           EMIT(QXTN_vector(1, 1, 0b10, Rn, Rd))
+// Unsigned saturating extract Narrow, takes Rn element and reduce 32->16 with Unsigned saturation and fit lower part of Rd
+#define UQXTN_16(Rd, Rn)            EMIT(QXTN_vector(0, 1, 0b01, Rn, Rd))
+// Unsigned saturating extract Narrow, takes Rn element and reduce 32->16 with Unsigned saturation and fit higher part of Rd
+#define UQXTN2_16(Rd, Rn)           EMIT(QXTN_vector(1, 1, 0b01, Rn, Rd))
+// Unsigned saturating extract Narrow, takes Rn element and reduce 16->8 with Unsigned saturation and fit lower part of Rd
+#define UQXTN_8(Rd, Rn)             EMIT(QXTN_vector(0, 1, 0b00, Rn, Rd))
+// Unsigned saturating extract Narrow, takes Rn element and reduce 16->8 with Unsigned saturation and fit higher part of Rd
+#define UQXTN2_8(Rd, Rn)            EMIT(QXTN_vector(1, 1, 0b00, Rn, Rd))
+
+#define QXTUN_vector(Q, U, size, Rn, Rd)    ((Q)<<30 | (U)<<29 | 0b01110<<24 | (size)<<22 | 0b10000<<17 | 0b10010<<12 | 0b10<<10 | (Rn)<<5 | (Rd))
 // Signed saturating extract Unsigned Narrow, takes Rn element and reduce 64->32 with Unsigned saturation and fit lower part of Rd
-#define SQXTUN_32(Rd, Rn)           EMIT(QXTN_vector(0, 1, 0b10, Rn, Rd))
+#define SQXTUN_32(Rd, Rn)           EMIT(QXTUN_vector(0, 1, 0b10, Rn, Rd))
 // Signed saturating extract Unsigned Narrow, takes Rn element and reduce 64->32 with Unsigned saturation and fit higher part of Rd
-#define SQXTUN2_32(Rd, Rn)          EMIT(QXTN_vector(1, 1, 0b10, Rn, Rd))
+#define SQXTUN2_32(Rd, Rn)          EMIT(QXTUN_vector(1, 1, 0b10, Rn, Rd))
 // Signed saturating extract Unsigned Narrow, takes Rn element and reduce 32->16 with Unsigned saturation and fit lower part of Rd
-#define SQXTUN_16(Rd, Rn)           EMIT(QXTN_vector(0, 1, 0b01, Rn, Rd))
+#define SQXTUN_16(Rd, Rn)           EMIT(QXTUN_vector(0, 1, 0b01, Rn, Rd))
 // Signed saturating extract Unsigned Narrow, takes Rn element and reduce 32->16 with Unsigned saturation and fit higher part of Rd
-#define SQXTUN2_16(Rd, Rn)          EMIT(QXTN_vector(1, 1, 0b01, Rn, Rd))
+#define SQXTUN2_16(Rd, Rn)          EMIT(QXTUN_vector(1, 1, 0b01, Rn, Rd))
 // Signed saturating extract Unsigned Narrow, takes Rn element and reduce 16->8 with Unsigned saturation and fit lower part of Rd
-#define SQXTUN_8(Rd, Rn)            EMIT(QXTN_vector(0, 1, 0b00, Rn, Rd))
+#define SQXTUN_8(Rd, Rn)            EMIT(QXTUN_vector(0, 1, 0b00, Rn, Rd))
 // Signed saturating extract Unsigned Narrow, takes Rn element and reduce 16->8 with Unsigned saturation and fit higher part of Rd
-#define SQXTUN2_8(Rd, Rn)           EMIT(QXTN_vector(1, 1, 0b00, Rn, Rd))
+#define SQXTUN2_8(Rd, Rn)           EMIT(QXTUN_vector(1, 1, 0b00, Rn, Rd))
 
 // Integer CMP
 // EQual
 #define CMEQ_vector(Q, U, size, Rm, Rn, Rd)     ((Q)<<30 | (U)<<29 | 0b01110<<24 | (size)<<22 | 1<<21 | (Rm)<<16 | 0b10001<<11 | 1<<10 | (Rn)<<5 | (Rd))
+#define VCMEQ_8(Rd, Rn, Rm)         EMIT(CMEQ_vector(0, 1, 0b00, Rm, Rn, Rd))
+#define VCMEQ_16(Rd, Rn, Rm)        EMIT(CMEQ_vector(0, 1, 0b01, Rm, Rn, Rd))
+#define VCMEQ_32(Rd, Rn, Rm)        EMIT(CMEQ_vector(0, 1, 0b10, Rm, Rn, Rd))
 #define VCMEQQ_8(Rd, Rn, Rm)        EMIT(CMEQ_vector(1, 1, 0b00, Rm, Rn, Rd))
 #define VCMEQQ_16(Rd, Rn, Rm)       EMIT(CMEQ_vector(1, 1, 0b01, Rm, Rn, Rd))
 #define VCMEQQ_32(Rd, Rn, Rm)       EMIT(CMEQ_vector(1, 1, 0b10, Rm, Rn, Rd))
@@ -1166,12 +1420,50 @@
 #define VCMGTQ_16(Rd, Rn, Rm)       EMIT(CMG_vector(1, 0, 0b01, 0, Rm, Rn, Rd))
 #define VCMGTQ_32(Rd, Rn, Rm)       EMIT(CMG_vector(1, 0, 0b10, 0, Rm, Rn, Rd))
 #define VCMGTQ_64(Rd, Rn, Rm)       EMIT(CMG_vector(1, 0, 0b11, 0, Rm, Rn, Rd))
+#define VCMGT_8(Rd, Rn, Rm)         EMIT(CMG_vector(0, 0, 0b00, 0, Rm, Rn, Rd))
+#define VCMGT_16(Rd, Rn, Rm)        EMIT(CMG_vector(0, 0, 0b01, 0, Rm, Rn, Rd))
+#define VCMGT_32(Rd, Rn, Rm)        EMIT(CMG_vector(0, 0, 0b10, 0, Rm, Rn, Rd))
 // Unsigned Higher
 #define VCHIQQ_8(Rd, Rn, Rm)        EMIT(CMG_vector(1, 1, 0b00, 0, Rm, Rn, Rd))
 #define VCHIQQ_16(Rd, Rn, Rm)       EMIT(CMG_vector(1, 1, 0b01, 0, Rm, Rn, Rd))
 #define VCHIQQ_32(Rd, Rn, Rm)       EMIT(CMG_vector(1, 1, 0b10, 0, Rm, Rn, Rd))
 #define VCHIQQ_64(Rd, Rn, Rm)       EMIT(CMG_vector(1, 1, 0b11, 0, Rm, Rn, Rd))
 
+// Less Than 0
+#define CMLT_0_vector(Q, size, Rn, Rd)		((Q)<<30 | 0b01110<<24 | (size)<<22 | 0b10000<<17 | 0b01010<<12 | 0b10<<10 | (Rn)<<5 | (Rd))
+#define CMLT_0_8(Rd, Rn)		    EMIT(CMLT_0_vector(0, 0b00, Rn, Rd))
+#define CMLT_0_16(Rd, Rn)           EMIT(CMLT_0_vector(0, 0b01, Rn, Rd))
+#define CMLT_0_32(Rd, Rn)           EMIT(CMLT_0_vector(0, 0b10, Rn, Rd))
+#define CMLTQ_0_8(Rd, Rn)           EMIT(CMLT_0_vector(1, 0b00, Rn, Rd))
+#define CMLTQ_0_16(Rd, Rn)          EMIT(CMLT_0_vector(1, 0b01, Rn, Rd))
+#define CMLTQ_0_32(Rd, Rn)          EMIT(CMLT_0_vector(1, 0b10, Rn, Rd))
+#define CMLTQ_0_64(Rd, Rn)          EMIT(CMLT_0_vector(1, 0b11, Rn, Rd))
+// Equal 0
+#define CMEQ_0_vector(Q, size, Rn, Rd)          ((Q)<<30 | 0b01110<<24 | (size)<<22 | 0b10000<<17 | 0b0100<<13 | 1<<12 | 0b10<<10 | (Rn)<<5 | (Rd))
+#define CMEQ_0_8(Rd, Rn)            EMIT(CMEQ_0_vector(0, 0b00, Rn, Rd))
+#define CMEQ_0_16(Rd, Rn)           EMIT(CMEQ_0_vector(0, 0b01, Rn, Rd))
+#define CMEQ_0_32(Rd, Rn)           EMIT(CMEQ_0_vector(0, 0b10, Rn, Rd))
+#define CMEQQ_0_8(Rd, Rn)           EMIT(CMEQ_0_vector(1, 0b00, Rn, Rd))
+#define CMEQQ_0_16(Rd, Rn)          EMIT(CMEQ_0_vector(1, 0b01, Rn, Rd))
+#define CMEQQ_0_32(Rd, Rn)          EMIT(CMEQ_0_vector(1, 0b10, Rn, Rd))
+#define CMEQQ_0_64(Rd, Rn)          EMIT(CMEQ_0_vector(1, 0b11, Rn, Rd))
+
+// Vector Float CMP
+// EQual
+#define FCMP_vector(Q, U, E, sz, Rm, ac, Rn, Rd)    ((Q)<<30 | (U)<<29 | 0b01110<<24 | (E)<<23 | (sz)<<22 | 1<<21 | (Rm)<<16 | 0b1110<<12 | (ac)<<11 | 1<<10 | (Rn)<<5 | (Rd))
+#define FCMEQQD(Rd, Rn, Rm)          EMIT(FCMP_vector(1, 0, 0, 1, Rm, 0, Rn, Rd))
+#define FCMEQQS(Rd, Rn, Rm)          EMIT(FCMP_vector(1, 0, 0, 0, Rm, 0, Rn, Rd))
+// Greater or Equal
+#define FCMGEQD(Rd, Rn, Rm)          EMIT(FCMP_vector(1, 1, 0, 1, Rm, 0, Rn, Rd))
+#define FCMGEQS(Rd, Rn, Rm)          EMIT(FCMP_vector(1, 1, 0, 0, Rm, 0, Rn, Rd))
+#define FCMGEQD_ABS(Rd, Rn, Rm)      EMIT(FCMP_vector(1, 1, 0, 1, Rm, 1, Rn, Rd))
+#define FCMGEQS_ABS(Rd, Rn, Rm)      EMIT(FCMP_vector(1, 1, 0, 0, Rm, 1, Rn, Rd))
+// Greater Than
+#define FCMGTQD(Rd, Rn, Rm)          EMIT(FCMP_vector(1, 1, 1, 1, Rm, 0, Rn, Rd))
+#define FCMGTQS(Rd, Rn, Rm)          EMIT(FCMP_vector(1, 1, 1, 0, Rm, 0, Rn, Rd))
+#define FCMGTQD_ABS(Rd, Rn, Rm)      EMIT(FCMP_vector(1, 1, 1, 1, Rm, 1, Rn, Rd))
+#define FCMGTQS_ABS(Rd, Rn, Rm)      EMIT(FCMP_vector(1, 1, 1, 0, Rm, 1, Rn, Rd))
+
 // UMULL / SMULL
 #define MULL_vector(Q, U, size, Rm, Rn, Rd) ((Q)<<30 | (U)<<29 | 0b01110<<24 | (size)<<22 | 1<<21 | (Rm)<<16 | 0b1100<<12 |(Rn)<<5 |(Rd))
 #define VUMULL_8(Rd, Rn, Rm)        EMIT(MULL_vector(0, 1, 0b00, Rm, Rn, Rd))
@@ -1180,5 +1472,268 @@
 #define VUMULL2_8(Rd, Rn, Rm)       EMIT(MULL_vector(1, 1, 0b00, Rm, Rn, Rd))
 #define VUMULL2_16(Rd, Rn, Rm)      EMIT(MULL_vector(1, 1, 0b01, Rm, Rn, Rd))
 #define VUMULL2_32(Rd, Rn, Rm)      EMIT(MULL_vector(1, 1, 0b10, Rm, Rn, Rd))
+#define VSMULL_8(Rd, Rn, Rm)        EMIT(MULL_vector(0, 0, 0b00, Rm, Rn, Rd))
+#define VSMULL_16(Rd, Rn, Rm)       EMIT(MULL_vector(0, 0, 0b01, Rm, Rn, Rd))
+#define VSMULL_32(Rd, Rn, Rm)       EMIT(MULL_vector(0, 0, 0b10, Rm, Rn, Rd))
+#define VSMULL2_8(Rd, Rn, Rm)       EMIT(MULL_vector(1, 0, 0b00, Rm, Rn, Rd))
+#define VSMULL2_16(Rd, Rn, Rm)      EMIT(MULL_vector(1, 0, 0b01, Rm, Rn, Rd))
+#define VSMULL2_32(Rd, Rn, Rm)      EMIT(MULL_vector(1, 0, 0b10, Rm, Rn, Rd))
+
+// MUL
+#define MUL_vector(Q, size, Rm, Rn, Rd)     ((Q)<<30 | 0b01110<<24 | (size)<<22 | 1<<21 | (Rm)<<16 | 0b10011<<11 | 1<<10 | (Rn)<<5 | (Rd))
+#define VMUL_8(Vd, Vn, Vm)          EMIT(MUL_vector(0, 0b00, Vm, Vn, Vd))
+#define VMUL_16(Vd, Vn, Vm)         EMIT(MUL_vector(0, 0b01, Vm, Vn, Vd))
+#define VMUL_32(Vd, Vn, Vm)         EMIT(MUL_vector(0, 0b10, Vm, Vn, Vd))
+#define VMULQ_8(Vd, Vn, Vm)         EMIT(MUL_vector(1, 0b00, Vm, Vn, Vd))
+#define VMULQ_16(Vd, Vn, Vm)        EMIT(MUL_vector(1, 0b01, Vm, Vn, Vd))
+#define VMULQ_32(Vd, Vn, Vm)        EMIT(MUL_vector(1, 0b10, Vm, Vn, Vd))
+
+// (S/Q)ADD
+#define QADD_vector(Q, U, size, Rm, Rn, Rd) ((Q)<<30 | (U)<<29 | 0b01110<<24 | (size)<<22 | 1<<21 | (Rm)<<16 | 0b00001<<11 | 1<<10 | (Rn)<<5 | (Rd))
+#define SQADDQ_8(Vd, Vn, Vm)        EMIT(QADD_vector(1, 0, 0b00, Vm, Vn, Vd))
+#define SQADDQ_16(Vd, Vn, Vm)       EMIT(QADD_vector(1, 0, 0b01, Vm, Vn, Vd))
+#define SQADDQ_32(Vd, Vn, Vm)       EMIT(QADD_vector(1, 0, 0b10, Vm, Vn, Vd))
+#define SQADDQ_64(Vd, Vn, Vm)       EMIT(QADD_vector(1, 0, 0b11, Vm, Vn, Vd))
+#define UQADDQ_8(Vd, Vn, Vm)        EMIT(QADD_vector(1, 1, 0b00, Vm, Vn, Vd))
+#define UQADDQ_16(Vd, Vn, Vm)       EMIT(QADD_vector(1, 1, 0b01, Vm, Vn, Vd))
+#define UQADDQ_32(Vd, Vn, Vm)       EMIT(QADD_vector(1, 1, 0b10, Vm, Vn, Vd))
+#define UQADDQ_64(Vd, Vn, Vm)       EMIT(QADD_vector(1, 1, 0b11, Vm, Vn, Vd))
+#define SQADD_8(Vd, Vn, Vm)         EMIT(QADD_vector(0, 0, 0b00, Vm, Vn, Vd))
+#define SQADD_16(Vd, Vn, Vm)        EMIT(QADD_vector(0, 0, 0b01, Vm, Vn, Vd))
+#define SQADD_32(Vd, Vn, Vm)        EMIT(QADD_vector(0, 0, 0b10, Vm, Vn, Vd))
+#define SQADD_64(Vd, Vn, Vm)        EMIT(QADD_vector(0, 0, 0b11, Vm, Vn, Vd))
+#define UQADD_8(Vd, Vn, Vm)         EMIT(QADD_vector(0, 1, 0b00, Vm, Vn, Vd))
+#define UQADD_16(Vd, Vn, Vm)        EMIT(QADD_vector(0, 1, 0b01, Vm, Vn, Vd))
+#define UQADD_32(Vd, Vn, Vm)        EMIT(QADD_vector(0, 1, 0b10, Vm, Vn, Vd))
+#define UQADD_64(Vd, Vn, Vm)        EMIT(QADD_vector(0, 1, 0b11, Vm, Vn, Vd))
+
+// Absolute Difference
+#define AD_vector(Q, U, size, Rm, ac, Rn, Rd)   ((Q)<<30 | (U)<<29 | 0b01110<<24 | (size)<<22 | 1<<21 | (Rm)<<16 | 0b0111<<12 | (ac)<<11 | 1<<10 | (Rn)<<5 | (Rd))
+// Signed Absolute Difference and accumulate
+#define SABAQ_8(Rd, Rn, Rm)         EMIT(AD_vector(1, 0, 0b00, Rm, 1, Rn, Rd))
+#define SABAQ_16(Rd, Rn, Rm)        EMIT(AD_vector(1, 0, 0b01, Rm, 1, Rn, Rd))
+#define SABAQ_32(Rd, Rn, Rm)        EMIT(AD_vector(1, 0, 0b10, Rm, 1, Rn, Rd))
+#define SABA_8(Rd, Rn, Rm)          EMIT(AD_vector(0, 0, 0b00, Rm, 1, Rn, Rd))
+#define SABA_16(Rd, Rn, Rm)         EMIT(AD_vector(0, 0, 0b01, Rm, 1, Rn, Rd))
+#define SABA_32(Rd, Rn, Rm)         EMIT(AD_vector(0, 0, 0b10, Rm, 1, Rn, Rd))
+// Signed Absolute Difference
+#define SABDQ_8(Rd, Rn, Rm)         EMIT(AD_vector(1, 0, 0b00, Rm, 0, Rn, Rd))
+#define SABDQ_16(Rd, Rn, Rm)        EMIT(AD_vector(1, 0, 0b01, Rm, 0, Rn, Rd))
+#define SABDQ_32(Rd, Rn, Rm)        EMIT(AD_vector(1, 0, 0b10, Rm, 0, Rn, Rd))
+#define SABD_8(Rd, Rn, Rm)          EMIT(AD_vector(0, 0, 0b00, Rm, 0, Rn, Rd))
+#define SABD_16(Rd, Rn, Rm)         EMIT(AD_vector(0, 0, 0b01, Rm, 0, Rn, Rd))
+#define SABD_32(Rd, Rn, Rm)         EMIT(AD_vector(0, 0, 0b10, Rm, 0, Rn, Rd))
+
+#define ADL_vector(Q, U, size, Rm, op, Rn, Rd)  ((Q)<<30 | (U)<<29 | 0b01110<<24 | (size)<<22 | 1<<21 | (Rm)<<16 | 0b01<<14 | (op)<<13 | 1<<12 | (Rn)<<5 | (Rd))
+#define SABAL_8(Rd, Rn, Rm)         EMIT(ADL_vector(0, 0, 0b00, Rm, 0, Rn, Rd))
+#define SABAL2_8(Rd, Rn, Rm)        EMIT(ADL_vector(1, 0, 0b00, Rm, 0, Rn, Rd))
+#define SABAL_16(Rd, Rn, Rm)        EMIT(ADL_vector(0, 0, 0b01, Rm, 0, Rn, Rd))
+#define SABAL2_16(Rd, Rn, Rm)       EMIT(ADL_vector(1, 0, 0b01, Rm, 0, Rn, Rd))
+#define SABAL_32(Rd, Rn, Rm)        EMIT(ADL_vector(0, 0, 0b10, Rm, 0, Rn, Rd))
+#define SABAL2_32(Rd, Rn, Rm)       EMIT(ADL_vector(1, 0, 0b10, Rm, 0, Rn, Rd))
+#define UABAL_8(Rd, Rn, Rm)         EMIT(ADL_vector(0, 1, 0b00, Rm, 0, Rn, Rd))
+#define UABAL2_8(Rd, Rn, Rm)        EMIT(ADL_vector(1, 1, 0b00, Rm, 0, Rn, Rd))
+#define UABAL_16(Rd, Rn, Rm)        EMIT(ADL_vector(0, 1, 0b01, Rm, 0, Rn, Rd))
+#define UABAL2_16(Rd, Rn, Rm)       EMIT(ADL_vector(1, 1, 0b01, Rm, 0, Rn, Rd))
+#define UABAL_32(Rd, Rn, Rm)        EMIT(ADL_vector(0, 1, 0b10, Rm, 0, Rn, Rd))
+#define UABAL2_32(Rd, Rn, Rm)       EMIT(ADL_vector(1, 1, 0b10, Rm, 0, Rn, Rd))
+#define SABDL_8(Rd, Rn, Rm)         EMIT(ADL_vector(0, 0, 0b00, Rm, 1, Rn, Rd))
+#define SABDL2_8(Rd, Rn, Rm)        EMIT(ADL_vector(1, 0, 0b00, Rm, 1, Rn, Rd))
+#define SABDL_16(Rd, Rn, Rm)        EMIT(ADL_vector(0, 0, 0b01, Rm, 1, Rn, Rd))
+#define SABDL2_16(Rd, Rn, Rm)       EMIT(ADL_vector(1, 0, 0b01, Rm, 1, Rn, Rd))
+#define SABDL_32(Rd, Rn, Rm)        EMIT(ADL_vector(0, 0, 0b10, Rm, 1, Rn, Rd))
+#define SABDL2_32(Rd, Rn, Rm)       EMIT(ADL_vector(1, 0, 0b10, Rm, 1, Rn, Rd))
+#define UABDL_8(Rd, Rn, Rm)         EMIT(ADL_vector(0, 1, 0b00, Rm, 1, Rn, Rd))
+#define UABDL2_8(Rd, Rn, Rm)        EMIT(ADL_vector(1, 1, 0b00, Rm, 1, Rn, Rd))
+#define UABDL_16(Rd, Rn, Rm)        EMIT(ADL_vector(0, 1, 0b01, Rm, 1, Rn, Rd))
+#define UABDL2_16(Rd, Rn, Rm)       EMIT(ADL_vector(1, 1, 0b01, Rm, 1, Rn, Rd))
+#define UABDL_32(Rd, Rn, Rm)        EMIT(ADL_vector(0, 1, 0b10, Rm, 1, Rn, Rd))
+#define UABDL2_32(Rd, Rn, Rm)       EMIT(ADL_vector(1, 1, 0b10, Rm, 1, Rn, Rd))
+
+// Add Pairwise
+#define ADDLP_vector(Q, U, size, op, Rn, Rd)    ((Q)<<30 | (U)<<29 | 0b01110<<24 | (size)<<22 | 1<<21 | (op)<<14 | 0b10<<12 | 0b10<<10 | (Rn)<<5 | (Rd))
+#define SADDLPQ_8(Rd, Rn)           EMIT(ADDLP_vector(1, 0, 0b00, 0, Rn, Rd))
+#define SADDLPQ_16(Rd, Rn)          EMIT(ADDLP_vector(1, 0, 0b01, 0, Rn, Rd))
+#define SADDLPQ_32(Rd, Rn)          EMIT(ADDLP_vector(1, 0, 0b10, 0, Rn, Rd))
+#define SADDLP_8(Rd, Rn)            EMIT(ADDLP_vector(0, 0, 0b00, 0, Rn, Rd))
+#define SADDLP_16(Rd, Rn)           EMIT(ADDLP_vector(0, 0, 0b01, 0, Rn, Rd))
+#define SADDLP_32(Rd, Rn)           EMIT(ADDLP_vector(0, 0, 0b10, 0, Rn, Rd))
+#define UADDLPQ_8(Rd, Rn)           EMIT(ADDLP_vector(1, 1, 0b00, 0, Rn, Rd))
+#define UADDLPQ_16(Rd, Rn)          EMIT(ADDLP_vector(1, 1, 0b01, 0, Rn, Rd))
+#define UADDLPQ_32(Rd, Rn)          EMIT(ADDLP_vector(1, 1, 0b10, 0, Rn, Rd))
+#define UADDLP_8(Rd, Rn)            EMIT(ADDLP_vector(0, 1, 0b00, 0, Rn, Rd))
+#define UADDLP_16(Rd, Rn)           EMIT(ADDLP_vector(0, 1, 0b01, 0, Rn, Rd))
+#define UADDLP_32(Rd, Rn)           EMIT(ADDLP_vector(0, 1, 0b10, 0, Rn, Rd))
+
+// Add accros vector
+#define ADDLV_vector(Q, U, size, Rn, Rd)    ((Q)<<30 | (U)<<29 | 0b01110<<24 | (size)<<22 | 0b11000<<17 | 0b00011<<12 | 0b10<<10 | (Rn)<<5 | (Rd))
+#define SADDLVQ_8(Rd, Rn)           EMIT(ADDLV_vector(1, 0, 0b00, Rn, Rd))
+#define SADDLVQ_16(Rd, Rn)          EMIT(ADDLV_vector(1, 0, 0b01, Rn, Rd))
+#define SADDLVQ_32(Rd, Rn)          EMIT(ADDLV_vector(1, 0, 0b10, Rn, Rd))
+#define SADDLV_8(Rd, Rn)            EMIT(ADDLV_vector(0, 0, 0b00, Rn, Rd))
+#define SADDLV_16(Rd, Rn)           EMIT(ADDLV_vector(0, 0, 0b01, Rn, Rd))
+#define SADDLV_32(Rd, Rn)           EMIT(ADDLV_vector(0, 0, 0b10, Rn, Rd))
+#define UADDLVQ_8(Rd, Rn)           EMIT(ADDLV_vector(1, 1, 0b00, Rn, Rd))
+#define UADDLVQ_16(Rd, Rn)          EMIT(ADDLV_vector(1, 1, 0b01, Rn, Rd))
+#define UADDLVQ_32(Rd, Rn)          EMIT(ADDLV_vector(1, 1, 0b10, Rn, Rd))
+#define UADDLV_8(Rd, Rn)            EMIT(ADDLV_vector(0, 1, 0b00, Rn, Rd))
+#define UADDLV_16(Rd, Rn)           EMIT(ADDLV_vector(0, 1, 0b01, Rn, Rd))
+#define UADDLV_32(Rd, Rn)           EMIT(ADDLV_vector(0, 1, 0b10, Rn, Rd))
+
+// MOV Immediate
+#define MOVI_vector(Q, op, abc, cmode, defgh, Rd)   ((Q)<<30 | (op)<<29 | 0b0111100000<<19 | (abc)<<16 | (cmode)<<12 | 1<<10 | (defgh)<<5 | (Rd))
+#define MOVIQ_8(Rd, imm8)           EMIT(MOVI_vector(1, 0, (((imm8)>>5)&0b111), 0b1110, ((imm8)&0b11111), Rd))
+#define MOVI_8(Rd, imm8)            EMIT(MOVI_vector(0, 0, (((imm8)>>5)&0b111), 0b1110, ((imm8)&0b11111), Rd))
+
+// SHLL and eXtend Long
+#define SHLL_vector(Q, U, immh, immb, Rn, Rd)  ((Q)<<30 | (U)<<29 | 0b011110<<23 | (immh)<<19 | (immb)<<16 | 0b10100<<11 | 1<<10 | (Rn)<<5 | (Rd))
+#define USHLL2_8(Vd, Vn, imm)       EMIT(SHLL_vector(1, 1, 0b0001, (imm)&0x7, Vn, Vd))
+#define USHLL_8(Vd, Vn, imm)        EMIT(SHLL_vector(0, 1, 0b0001, (imm)&0x7, Vn, Vd))
+#define SSHLL2_8(Vd, Vn, imm)       EMIT(SHLL_vector(1, 0, 0b0001, (imm)&0x7, Vn, Vd))
+#define SSHLL_8(Vd, Vn, imm)        EMIT(SHLL_vector(0, 0, 0b0001, (imm)&0x7, Vn, Vd))
+#define USHLL2_16(Vd, Vn, imm)      EMIT(SHLL_vector(1, 1, 0b0010|(((imm)>>3)&1), (imm)&0x7, Vn, Vd))
+#define USHLL_16(Vd, Vn, imm)       EMIT(SHLL_vector(0, 1, 0b0010|(((imm)>>3)&1), (imm)&0x7, Vn, Vd))
+#define SSHLL2_16(Vd, Vn, imm)      EMIT(SHLL_vector(1, 0, 0b0010|(((imm)>>3)&1), (imm)&0x7, Vn, Vd))
+#define SSHLL_16(Vd, Vn, imm)       EMIT(SHLL_vector(0, 0, 0b0010|(((imm)>>3)&1), (imm)&0x7, Vn, Vd))
+#define USHLL2_32(Vd, Vn, imm)      EMIT(SHLL_vector(1, 1, 0b0100|(((imm)>>3)&3), (imm)&0x7, Vn, Vd))
+#define USHLL_32(Vd, Vn, imm)       EMIT(SHLL_vector(0, 1, 0b0100|(((imm)>>3)&3), (imm)&0x7, Vn, Vd))
+#define SSHLL2_32(Vd, Vn, imm)      EMIT(SHLL_vector(1, 0, 0b0100|(((imm)>>3)&3), (imm)&0x7, Vn, Vd))
+#define SSHLL_32(Vd, Vn, imm)       EMIT(SHLL_vector(0, 0, 0b0100|(((imm)>>3)&3), (imm)&0x7, Vn, Vd))
+
+#define UXTL_8(Vd, Vn)              USHLL_8(Vd, Vn, 0)
+#define UXTL2_8(Vd, Vn)             USHLL2_8(Vd, Vn, 0)
+#define UXTL_16(Vd, Vn)             USHLL_16(Vd, Vn, 0)
+#define UXTL2_16(Vd, Vn)            USHLL2_16(Vd, Vn, 0)
+#define UXTL_32(Vd, Vn)             USHLL_32(Vd, Vn, 0)
+#define UXTL2_32(Vd, Vn)            USHLL2_32(Vd, Vn, 0)
+
+#define SXTL_8(Vd, Vn)              SSHLL_8(Vd, Vn, 0)
+#define SXTL2_8(Vd, Vn)             SSHLL2_8(Vd, Vn, 0)
+#define SXTL_16(Vd, Vn)             SSHLL_16(Vd, Vn, 0)
+#define SXTL2_16(Vd, Vn)            SSHLL2_16(Vd, Vn, 0)
+#define SXTL_32(Vd, Vn)             SSHLL_32(Vd, Vn, 0)
+#define SXTL2_32(Vd, Vn)            SSHLL2_32(Vd, Vn, 0)
+
+// SHRN
+#define QSHRN_vector(Q, U, immh, immb, op, Rn, Rd)  ((Q)<<30 | (U)<<29 | 0b011110<<23 | (immh)<<19 | (immb)<<16 | 0b1001<<12 | (op)<<11 | 1<<10 | (Rn)<<5 | (Rd))
+#define UQSHRN_8(Vd, Vn, imm)       EMIT(QSHRN_vector(0, 1, 0b0001, (8-(imm))&0x7, 0, Vn, Vd))
+#define UQSHRN2_8(Vd, Vn, imm)      EMIT(QSHRN_vector(1, 1, 0b0001, (8-(imm))&0x7, 0, Vn, Vd))
+#define SQSHRN_8(Vd, Vn, imm)       EMIT(QSHRN_vector(0, 0, 0b0001, (8-(imm))&0x7, 0, Vn, Vd))
+#define SQSHRN2_8(Vd, Vn, imm)      EMIT(QSHRN_vector(1, 0, 0b0001, (8-(imm))&0x7, 0, Vn, Vd))
+#define UQSHRN_16(Vd, Vn, imm)      EMIT(QSHRN_vector(0, 1, 0b0010|(((16-(imm))>>3)&1), (16-(imm))&0x7, 0, Vn, Vd))
+#define UQSHRN2_16(Vd, Vn, imm)     EMIT(QSHRN_vector(1, 1, 0b0010|(((16-(imm))>>3)&1), (16-(imm))&0x7, 0, Vn, Vd))
+#define SQSHRN_16(Vd, Vn, imm)      EMIT(QSHRN_vector(0, 0, 0b0010|(((16-(imm))>>3)&1), (16-(imm))&0x7, 0, Vn, Vd))
+#define SQSHRN2_16(Vd, Vn, imm)     EMIT(QSHRN_vector(1, 0, 0b0010|(((16-(imm))>>3)&1), (16-(imm))&0x7, 0, Vn, Vd))
+#define UQSHRN_32(Vd, Vn, imm)      EMIT(QSHRN_vector(0, 1, 0b0100|(((32-(imm))>>3)&3), (32-(imm))&0x7, 0, Vn, Vd))
+#define UQSHRN2_32(Vd, Vn, imm)     EMIT(QSHRN_vector(1, 1, 0b0100|(((32-(imm))>>3)&3), (32-(imm))&0x7, 0, Vn, Vd))
+#define SQSHRN_32(Vd, Vn, imm)      EMIT(QSHRN_vector(0, 0, 0b0100|(((32-(imm))>>3)&3), (32-(imm))&0x7, 0, Vn, Vd))
+#define SQSHRN2_32(Vd, Vn, imm)     EMIT(QSHRN_vector(1, 0, 0b0100|(((32-(imm))>>3)&3), (32-(imm))&0x7, 0, Vn, Vd))
+
+// UQSUB
+#define QSUB_vector(Q, U, size, Rm, Rn, Rd)     ((Q)<<30 | (U)<<29 | 0b01110<<24 | (size)<<22 | 1<<21 | (Rm)<<16 | 0b00101<<11 | 1<<10 | (Rn)<<5 | (Rd))
+#define UQSUB_8(Vd, Vn, Vm)         EMIT(QSUB_vector(0, 1, 0b00, Vm, Vn, Vd))
+#define UQSUB_16(Vd, Vn, Vm)        EMIT(QSUB_vector(0, 1, 0b01, Vm, Vn, Vd))
+#define UQSUB_32(Vd, Vn, Vm)        EMIT(QSUB_vector(0, 1, 0b10, Vm, Vn, Vd))
+#define UQSUB_64(Vd, Vn, Vm)        EMIT(QSUB_vector(0, 1, 0b11, Vm, Vn, Vd))
+#define SQSUB_8(Vd, Vn, Vm)         EMIT(QSUB_vector(0, 0, 0b00, Vm, Vn, Vd))
+#define SQSUB_16(Vd, Vn, Vm)        EMIT(QSUB_vector(0, 0, 0b01, Vm, Vn, Vd))
+#define SQSUB_32(Vd, Vn, Vm)        EMIT(QSUB_vector(0, 0, 0b10, Vm, Vn, Vd))
+#define SQSUB_64(Vd, Vn, Vm)        EMIT(QSUB_vector(0, 0, 0b11, Vm, Vn, Vd))
+#define UQSUBQ_8(Vd, Vn, Vm)        EMIT(QSUB_vector(1, 1, 0b00, Vm, Vn, Vd))
+#define UQSUBQ_16(Vd, Vn, Vm)       EMIT(QSUB_vector(1, 1, 0b01, Vm, Vn, Vd))
+#define UQSUBQ_32(Vd, Vn, Vm)       EMIT(QSUB_vector(1, 1, 0b10, Vm, Vn, Vd))
+#define UQSUBQ_64(Vd, Vn, Vm)       EMIT(QSUB_vector(1, 1, 0b11, Vm, Vn, Vd))
+#define SQSUBQ_8(Vd, Vn, Vm)        EMIT(QSUB_vector(1, 0, 0b00, Vm, Vn, Vd))
+#define SQSUBQ_16(Vd, Vn, Vm)       EMIT(QSUB_vector(1, 0, 0b01, Vm, Vn, Vd))
+#define SQSUBQ_32(Vd, Vn, Vm)       EMIT(QSUB_vector(1, 0, 0b10, Vm, Vn, Vd))
+#define SQSUBQ_64(Vd, Vn, Vm)       EMIT(QSUB_vector(1, 0, 0b11, Vm, Vn, Vd))
+
+// MAX/MIN vector
+#define MINMAX_vector(Q, U, size, Rm, op, Rn, Rd)   ((Q)<<30 | (U)<<29 | 0b01110<<24 | (size)<<22 | 1<<21 | (Rm)<<16 | 0b0110<<12 | (op)<<11 | 1<<10 | (Rn)<<5 | (Rd))
+#define SMAX_8(Vd, Vn, Vm)          EMIT(MINMAX_vector(0, 0, 0b00, Vm, 0, Vn, Vd))
+#define SMAX_16(Vd, Vn, Vm)         EMIT(MINMAX_vector(0, 0, 0b01, Vm, 0, Vn, Vd))
+#define SMAX_32(Vd, Vn, Vm)         EMIT(MINMAX_vector(0, 0, 0b10, Vm, 0, Vn, Vd))
+#define SMAX_64(Vd, Vn, Vm)         EMIT(MINMAX_vector(0, 0, 0b11, Vm, 0, Vn, Vd))
+#define UMAX_8(Vd, Vn, Vm)          EMIT(MINMAX_vector(0, 1, 0b00, Vm, 0, Vn, Vd))
+#define UMAX_16(Vd, Vn, Vm)         EMIT(MINMAX_vector(0, 1, 0b01, Vm, 0, Vn, Vd))
+#define UMAX_32(Vd, Vn, Vm)         EMIT(MINMAX_vector(0, 1, 0b10, Vm, 0, Vn, Vd))
+#define UMAX_64(Vd, Vn, Vm)         EMIT(MINMAX_vector(0, 1, 0b11, Vm, 0, Vn, Vd))
+#define SMIN_8(Vd, Vn, Vm)          EMIT(MINMAX_vector(0, 0, 0b00, Vm, 1, Vn, Vd))
+#define SMIN_16(Vd, Vn, Vm)         EMIT(MINMAX_vector(0, 0, 0b01, Vm, 1, Vn, Vd))
+#define SMIN_32(Vd, Vn, Vm)         EMIT(MINMAX_vector(0, 0, 0b10, Vm, 1, Vn, Vd))
+#define SMIN_64(Vd, Vn, Vm)         EMIT(MINMAX_vector(0, 0, 0b11, Vm, 1, Vn, Vd))
+#define UMIN_8(Vd, Vn, Vm)          EMIT(MINMAX_vector(0, 1, 0b00, Vm, 1, Vn, Vd))
+#define UMIN_16(Vd, Vn, Vm)         EMIT(MINMAX_vector(0, 1, 0b01, Vm, 1, Vn, Vd))
+#define UMIN_32(Vd, Vn, Vm)         EMIT(MINMAX_vector(0, 1, 0b10, Vm, 1, Vn, Vd))
+#define UMIN_64(Vd, Vn, Vm)         EMIT(MINMAX_vector(0, 1, 0b11, Vm, 1, Vn, Vd))
+#define SMAXQ_8(Vd, Vn, Vm)         EMIT(MINMAX_vector(1, 0, 0b00, Vm, 0, Vn, Vd))
+#define SMAXQ_16(Vd, Vn, Vm)        EMIT(MINMAX_vector(1, 0, 0b01, Vm, 0, Vn, Vd))
+#define SMAXQ_32(Vd, Vn, Vm)        EMIT(MINMAX_vector(1, 0, 0b10, Vm, 0, Vn, Vd))
+#define SMAXQ_64(Vd, Vn, Vm)        EMIT(MINMAX_vector(1, 0, 0b11, Vm, 0, Vn, Vd))
+#define UMAXQ_8(Vd, Vn, Vm)         EMIT(MINMAX_vector(1, 1, 0b00, Vm, 0, Vn, Vd))
+#define UMAXQ_16(Vd, Vn, Vm)        EMIT(MINMAX_vector(1, 1, 0b01, Vm, 0, Vn, Vd))
+#define UMAXQ_32(Vd, Vn, Vm)        EMIT(MINMAX_vector(1, 1, 0b10, Vm, 0, Vn, Vd))
+#define UMAXQ_64(Vd, Vn, Vm)        EMIT(MINMAX_vector(1, 1, 0b11, Vm, 0, Vn, Vd))
+#define SMINQ_8(Vd, Vn, Vm)         EMIT(MINMAX_vector(1, 0, 0b00, Vm, 1, Vn, Vd))
+#define SMINQ_16(Vd, Vn, Vm)        EMIT(MINMAX_vector(1, 0, 0b01, Vm, 1, Vn, Vd))
+#define SMINQ_32(Vd, Vn, Vm)        EMIT(MINMAX_vector(1, 0, 0b10, Vm, 1, Vn, Vd))
+#define SMINQ_64(Vd, Vn, Vm)        EMIT(MINMAX_vector(1, 0, 0b11, Vm, 1, Vn, Vd))
+#define UMINQ_8(Vd, Vn, Vm)         EMIT(MINMAX_vector(1, 1, 0b00, Vm, 1, Vn, Vd))
+#define UMINQ_16(Vd, Vn, Vm)        EMIT(MINMAX_vector(1, 1, 0b01, Vm, 1, Vn, Vd))
+#define UMINQ_32(Vd, Vn, Vm)        EMIT(MINMAX_vector(1, 1, 0b10, Vm, 1, Vn, Vd))
+#define UMINQ_64(Vd, Vn, Vm)        EMIT(MINMAX_vector(1, 1, 0b11, Vm, 1, Vn, Vd))
+
+// HADD vector
+#define HADD_vector(Q, U, size, Rm, Rn, Rd)     ((Q)<<30 | (U)<<29 | 0b01110<<24 | (size)<<22 | 1<<21 | (Rm)<<16 | 1<<10 | (Rn)<<5 | (Rd))
+#define SHADD_8(Vd, Vn, Vm)         EMIT(HADD_vector(0, 0, 0b00, Vm, Vn, Vd))
+#define SHADD_16(Vd, Vn, Vm)        EMIT(HADD_vector(0, 0, 0b01, Vm, Vn, Vd))
+#define SHADD_32(Vd, Vn, Vm)        EMIT(HADD_vector(0, 0, 0b10, Vm, Vn, Vd))
+#define SHADDQ_8(Vd, Vn, Vm)        EMIT(HADD_vector(1, 0, 0b00, Vm, Vn, Vd))
+#define SHADDQ_16(Vd, Vn, Vm)       EMIT(HADD_vector(1, 0, 0b01, Vm, Vn, Vd))
+#define SHADDQ_32(Vd, Vn, Vm)       EMIT(HADD_vector(1, 0, 0b10, Vm, Vn, Vd))
+#define UHADD_8(Vd, Vn, Vm)         EMIT(HADD_vector(0, 1, 0b00, Vm, Vn, Vd))
+#define UHADD_16(Vd, Vn, Vm)        EMIT(HADD_vector(0, 1, 0b01, Vm, Vn, Vd))
+#define UHADD_32(Vd, Vn, Vm)        EMIT(HADD_vector(0, 1, 0b10, Vm, Vn, Vd))
+#define UHADDQ_8(Vd, Vn, Vm)        EMIT(HADD_vector(1, 1, 0b00, Vm, Vn, Vd))
+#define UHADDQ_16(Vd, Vn, Vm)       EMIT(HADD_vector(1, 1, 0b01, Vm, Vn, Vd))
+#define UHADDQ_32(Vd, Vn, Vm)       EMIT(HADD_vector(1, 1, 0b10, Vm, Vn, Vd))
+
+#define RHADD_vector(Q, U, size, Rm, Rn, Rd)    ((Q)<<30 | (U)<<29 | 0b01110<<24 | (size)<<22 | 1<<21 | (Rm)<<16 | 0b00010<<11 | 1<<10 | (Rn)<<5 | (Rd))
+#define SRHADD_8(Vd, Vn, Vm)        EMIT(RHADD_vector(0, 0, 0b00, Vm, Vn, Vd))
+#define SRHADD_16(Vd, Vn, Vm)       EMIT(RHADD_vector(0, 0, 0b01, Vm, Vn, Vd))
+#define SRHADD_32(Vd, Vn, Vm)       EMIT(RHADD_vector(0, 0, 0b10, Vm, Vn, Vd))
+#define SRHADDQ_8(Vd, Vn, Vm)       EMIT(RHADD_vector(1, 0, 0b00, Vm, Vn, Vd))
+#define SRHADDQ_16(Vd, Vn, Vm)      EMIT(RHADD_vector(1, 0, 0b01, Vm, Vn, Vd))
+#define SRHADDQ_32(Vd, Vn, Vm)      EMIT(RHADD_vector(1, 0, 0b10, Vm, Vn, Vd))
+#define URHADD_8(Vd, Vn, Vm)        EMIT(RHADD_vector(0, 1, 0b00, Vm, Vn, Vd))
+#define URHADD_16(Vd, Vn, Vm)       EMIT(RHADD_vector(0, 1, 0b01, Vm, Vn, Vd))
+#define URHADD_32(Vd, Vn, Vm)       EMIT(RHADD_vector(0, 1, 0b10, Vm, Vn, Vd))
+#define URHADDQ_8(Vd, Vn, Vm)       EMIT(RHADD_vector(1, 1, 0b00, Vm, Vn, Vd))
+#define URHADDQ_16(Vd, Vn, Vm)      EMIT(RHADD_vector(1, 1, 0b01, Vm, Vn, Vd))
+#define URHADDQ_32(Vd, Vn, Vm)      EMIT(RHADD_vector(1, 1, 0b10, Vm, Vn, Vd))
+
+// QRDMULH Signed saturating (Rounding) Doubling Multiply returning High half
+#define QDMULH_vector(Q, U, size, Rm, Rn, Rd)   ((Q)<<30 | (U)<<29 | 0b01110<<24 | (size)<<22 | 1<<21 | (Rm)<<16 | 0b10110<<11 | 1<<10 | (Rn)<<5 | (Rd))
+#define SQRDMULH_8(Vd, Vn, Vm)      EMIT(QDMULH_vector(0, 1, 0b00, Vm, Vn, Vd))
+#define SQRDMULH_16(Vd, Vn, Vm)     EMIT(QDMULH_vector(0, 1, 0b01, Vm, Vn, Vd))
+#define SQRDMULH_32(Vd, Vn, Vm)     EMIT(QDMULH_vector(0, 1, 0b10, Vm, Vn, Vd))
+#define SQRDMULHQ_8(Vd, Vn, Vm)     EMIT(QDMULH_vector(1, 1, 0b00, Vm, Vn, Vd))
+#define SQRDMULHQ_16(Vd, Vn, Vm)    EMIT(QDMULH_vector(1, 1, 0b01, Vm, Vn, Vd))
+#define SQRDMULHQ_32(Vd, Vn, Vm)    EMIT(QDMULH_vector(1, 1, 0b10, Vm, Vn, Vd))
+#define SQDMULH_8(Vd, Vn, Vm)       EMIT(QDMULH_vector(0, 0, 0b00, Vm, Vn, Vd))
+#define SQDMULH_16(Vd, Vn, Vm)      EMIT(QDMULH_vector(0, 0, 0b01, Vm, Vn, Vd))
+#define SQDMULH_32(Vd, Vn, Vm)      EMIT(QDMULH_vector(0, 0, 0b10, Vm, Vn, Vd))
+#define SQDMULHQ_8(Vd, Vn, Vm)      EMIT(QDMULH_vector(1, 0, 0b00, Vm, Vn, Vd))
+#define SQDMULHQ_16(Vd, Vn, Vm)     EMIT(QDMULH_vector(1, 0, 0b01, Vm, Vn, Vd))
+#define SQDMULHQ_32(Vd, Vn, Vm)     EMIT(QDMULH_vector(1, 0, 0b10, Vm, Vn, Vd))
+
+// AES extensions
+#define AES_gen(D, Rn, Rd)      (0b01001110<<24 | 0b00<<22 | 0b10100<<17 | 0b0010<<13 | (D)<<12 | 0b10<<10 | (Rn)<<5 | (Rd))
+#define AESD(Vd, Vn)    EMIT(AES_gen(1, Vn, Vd))
+#define AESE(Vd, Vn)    EMIT(AES_gen(0, Vn, Vd))
+
+#define AESMC_gen(D, Rn, Rd)    (0b01001110<<24 | 0b00<<22 | 0b10100<<17 | 0b0011<<13 | (D)<<12 | 0b10<<10 | (Rn)<<5 | (Rd))
+#define AESIMC(Vd, Vn)  EMIT(AESMC_gen(1, Vn, Vd))
+#define AESMC(Vd, Vn)   EMIT(AESMC_gen(0, Vn, Vd))
 
 #endif  //__ARM64_EMITTER_H__

src/dynarec/arm64_lock.S

@@ -13,8 +13,11 @@
 .global arm64_lock_write_d
 .global arm64_lock_read_dd
 .global arm64_lock_write_dd
+.global arm64_lock_read_dq
+.global arm64_lock_write_dq
 .global arm64_lock_xchg
 .global arm64_lock_storeifnull
+.global arm64_lock_storeifref
 
 
 arm64_lock_read_b:
@@ -42,15 +45,12 @@ arm64_lock_write_h:
 arm64_lock_read_d:
     // address is x0, return is x0
     ldaxr    w0, [x0]
-    #ldx     w0,[x0]
     ret
 
 arm64_lock_write_d:
     // address is x0, value is w1, return is x0
     mov     x2, x0
     stlxr   w0, w1, [x2]
-    #str     w1, [x2]
-    mov     w0, 0
     ret
 
 arm64_lock_read_dd:
@@ -64,24 +64,49 @@ arm64_lock_write_dd:
     stlxr   w0, x1, [x2]
     ret
 
+arm64_lock_read_dq:
+    // address is r2, return is r0, r1
+    ldaxp   x4, x3, [x2]
+    str     x4, [x0]
+    str     x3, [x1]
+    ret
+
+arm64_lock_write_dq:
+    // address is r2, value is r0, r1, return is r0
+    // r0 needs to be aligned
+    stlxp   w3, x0, x1, [x2]
+    mov     w0, w3
+    ret
+
+
 arm64_lock_xchg:
     // address is x0, value is x1, return old value in x0
     ldaxr   x2, [x0]
     stlxr   w3, x1, [x0]
-    cmp     w3, #1
-    beq     arm64_lock_xchg
+    cbnz    w3, arm64_lock_xchg
     mov     x0, x2
     ret
 
 arm64_lock_storeifnull:
-    // address is x0, value is x1, x1 store to x0 only if [x0] is 0. return new [x0] value (so x1 or old value)
+    // address is x0, value is x1, x1 store to x0 only if [x0] is 0, return new [x0] value (so x1 or old value)
     ldaxr   x2, [x0]
-    cmp     x2, #0
-    bne     arm64_lock_storeifnull_exit
+    cbnz    x2, arm64_lock_storeifnull_exit
     mov     x2, x1
     stlxr   w3, x2, [x0]
-    cmp     w3, #1
-    beq     arm64_lock_storeifnull
+    cbnz    w3, arm64_lock_storeifnull
 arm64_lock_storeifnull_exit:
     mov     x0, x2
     ret
+
+arm64_lock_storeifref:
+    // address is x0, value is x1, x1 store to x0 only if [x0] is x2, return new [x0] value (so x1 or old value)
+    ldaxr   x3, [x0]
+    cmp     x2, x3
+    bne     arm64_lock_storeifref_exit
+    stlxr   w4, x1, [x0]
+    cbnz    w4, arm64_lock_storeifref
+    mov     x0, x1
+    ret
+arm64_lock_storeifref_exit:
+    mov     x0, x3
+    ret

src/dynarec/arm64_lock.h

@@ -17,15 +17,23 @@ extern uint32_t arm64_lock_read_d(void* addr);
 // STLXR of ADDR, return 0 if ok, 1 if not
 extern int arm64_lock_write_d(void* addr, uint32_t val);
 
-// LDAXRD of ADDR
+// LDAXR of ADDR
 extern uint64_t arm64_lock_read_dd(void* addr);
 // STLXR of ADDR, return 0 if ok, 1 if not
 extern int arm64_lock_write_dd(void* addr, uint64_t val);
 
-// Atomicaly exchange value at [p] with val, return old p
+// LDAXRD of ADDR
+extern void arm64_lock_read_dq(uint64_t * a, uint64_t* b, void* addr);
+// STLXRD of ADDR, return 0 if ok, 1 if not
+extern int arm64_lock_write_dq(uint64_t a, uint64_t b, void* addr);
+
+// Atomically exchange value at [p] with val, return old p
 extern uintptr_t arm64_lock_xchg(void* p, uintptr_t val);
 
-// Atomicaly store value to [p] only if [p] is NULL. Return new [p] value (so val or old)
-extern void* arm64_lock_storeifnull(void*p, void* val);
+// Atomically store val to [p] only if [p] is 0. Return new [p] value (so val or old)
+extern uint64_t arm64_lock_storeifnull(void* p, uint64_t val);
 
-#endif  //__ARM64_LOCK__H__
+// Atomically store val to [p] only if [p] is ref. Return new [p] value (so val or old)
+extern uint64_t arm64_lock_storeifref(void* p, uint64_t val, uint64_t ref);
+
+#endif  //__ARM64_LOCK__H__

src/dynarec/arm64_next.S

@@ -18,7 +18,10 @@ arm64_next:
     stp     x12, x13, [sp, (8 *  4)]
     stp     x14, x15, [sp, (8 *  6)]
     stp     x16, x17, [sp, (8 *  8)]
-    str     x18, [sp, (8 * 10)]
+    stp     x18, x27, [sp, (8 * 10)]    // also save x27(rip) to allow change in LinkNext
+
+    mov     x2, lr      // "from" is in lr, so put in x2
+    add     x3, sp, 8*11    // x3 is address to change rip
     // call the function
     bl      LinkNext
     // preserve return value
@@ -29,7 +32,7 @@ arm64_next:
     ldp     x12, x13, [sp, (8 *  4)]
     ldp     x14, x15, [sp, (8 *  6)]
     ldp     x16, x17, [sp, (8 *  8)]
-    ldr     x18, [sp, (8 * 10)]
+    ldp     x18, x27, [sp, (8 * 10)]
     add     sp,  sp, (8 * 12)
     // return offset is jump address
     br      x3

src/dynarec/arm64_printer.c

@@ -180,10 +180,21 @@ const char* arm64_print(uint32_t opcode, uintptr_t addr)
     }
     if(isMask(opcode, "0x011000iiiiiiiiiiiiiiiiiiittttt", &a)) {
         int size = ((opcode>>30)&1)?3:2;
-        int offset = signExtend(imm, 9)<<size;
+        int offset = signExtend(imm, 19)<<2;
         snprintf(buff, sizeof(buff), "LDR %s, [#%+d]\t;%p", (size==2)?Wt[Rt]:Xt[Rt], offset, (void*)(addr+offset));
         return buff;
     }
+    if(isMask(opcode, "10011000iiiiiiiiiiiiiiiiiiittttt", &a)) {
+        int offset = signExtend(imm, 19)<<2;
+        snprintf(buff, sizeof(buff), "LDRSW %s, [#%+d]\t;%p", Xt[Rt], offset, (void*)(addr+offset));
+        return buff;
+    }
+    if(isMask(opcode, "ff011100iiiiiiiiiiiiiiiiiiittttt", &a)) {
+        int offset = signExtend(imm, 19)<<2;
+        const char* Y[] = {"S", "D", "Q", "?"};
+        snprintf(buff, sizeof(buff), "LDR %s%d, [#%+d]\t;%p", Y[sf], Rt, offset, (void*)(addr+offset));
+        return buff;
+    }
     if(isMask(opcode, "1x111000011mmmmmoooS10nnnnnttttt", &a)) {
         int size = (opcode>>30)&3;
         const char* extend[] = {"?0", "?1", "UXTW", "LSL", "?4", "?5", "SXTW", "SXTX"};
@@ -267,12 +278,20 @@ const char* arm64_print(uint32_t opcode, uintptr_t addr)
             snprintf(buff, sizeof(buff), "STR%c %s, [%s]", size?'H':'B', Xt[Rt], XtSp[Rn]);
         return buff;
     }    
-    if(isMask(opcode, "101110011xiiiiiiiiiiiinnnnnttttt", &a)) {
+    if(isMask(opcode, "1011100110iiiiiiiiiiiinnnnnttttt", &a)) {
         int offset = imm<<2;
         if(!offset)
-            snprintf(buff, sizeof(buff), "LDRSW %s, [%s]", a.x?Xt[Rt]:Wt[Rt], XtSp[Rn]);
+            snprintf(buff, sizeof(buff), "LDRSW %s, [%s]", Xt[Rt], XtSp[Rn]);
         else
-            snprintf(buff, sizeof(buff), "LDRSW %s, [%s, #%d]", a.x?Xt[Rt]:Wt[Rt], XtSp[Rn], offset);
+            snprintf(buff, sizeof(buff), "LDRSW %s, [%s, #%d]", Xt[Rt], XtSp[Rn], offset);
+        return buff;
+    }
+    if(isMask(opcode, "011110011xiiiiiiiiiiiinnnnnttttt", &a)) {
+        int offset = imm<<1;
+        if(!offset)
+            snprintf(buff, sizeof(buff), "LDRSH %s, [%s]", a.x?Wt[Rt]:Xt[Rt], XtSp[Rn]);
+        else
+            snprintf(buff, sizeof(buff), "LDRSH %s, [%s, #%d]", a.x?Wt[Rt]:Xt[Rt], XtSp[Rn], offset);
         return buff;
     }
     if(isMask(opcode, "001110011xiiiiiiiiiiiinnnnnttttt", &a)) {
@@ -601,7 +620,7 @@ const char* arm64_print(uint32_t opcode, uintptr_t addr)
         else if(immr==0 && imms==0b001111)
             snprintf(buff, sizeof(buff), "SXTH %s, %s", sf?Xt[Rd]:Wt[Rd], sf?Xt[Rn]:Wt[Rn]);
         else if(sf && immr==0 && imms==0b011111)
-            snprintf(buff, sizeof(buff), "SXTW %s, %s", Xt[Rd], Xt[Rn]);
+            snprintf(buff, sizeof(buff), "SXTW %s, %s", Xt[Rd], Wt[Rn]);
         else if(imms>=immr)
             snprintf(buff, sizeof(buff), "SBFX %s, %s, %d, %d", sf?Xt[Rd]:Wt[Rd], sf?Xt[Rn]:Wt[Rn], immr, imms-immr+1);
         else
@@ -699,7 +718,7 @@ const char* arm64_print(uint32_t opcode, uintptr_t addr)
         return buff;
     }
 
-    if(isMask(opcode, "f1011010100mmmmmdddd00nnnnnddddd", &a)) {
+    if(isMask(opcode, "f1011010100mmmmmcccc00nnnnnddddd", &a)) {
         if(Rm!=31 && (cond&0b1110)!=0b1110 && Rn!=31 && Rn==Rm)
             snprintf(buff, sizeof(buff), "CINV %s, %s, %s, %s", sf?Xt[Rd]:Wt[Rd], sf?Xt[Rn]:Wt[Rn], sf?Xt[Rm]:Wt[Rm], conds[cond^1]);    
         else if(Rm==31 && (cond&0b1110)!=0b1110 && Rn==31)
@@ -758,6 +777,19 @@ const char* arm64_print(uint32_t opcode, uintptr_t addr)
             snprintf(buff, sizeof(buff), "MADD %s, %s, %s, %s", sf?Xt[Rd]:Wt[Rd], sf?Xt[Rn]:Wt[Rn], sf?Xt[Rm]:Wt[Rm], sf?Xt[Ra]:Wt[Ra]);
         return buff;
     }
+    if(isMask(opcode, "f0011011000mmmmm1aaaaannnnnddddd", &a)) {
+        if(Ra==31)
+            snprintf(buff, sizeof(buff), "MNEG %s, %s, %s", sf?Xt[Rd]:Wt[Rd], sf?Xt[Rn]:Wt[Rn], sf?Xt[Rm]:Wt[Rm]);
+        else
+            snprintf(buff, sizeof(buff), "MSUB %s, %s, %s, %s", sf?Xt[Rd]:Wt[Rd], sf?Xt[Rn]:Wt[Rn], sf?Xt[Rm]:Wt[Rm], sf?Xt[Ra]:Wt[Ra]);
+        return buff;
+    }
+
+    // DIV
+    if(isMask(opcode, "f0011010110mmmmm00001onnnnnddddd", &a)) {
+        snprintf(buff, sizeof(buff), "%cDIV %s, %s, %s", option?'S':'U', sf?Xt[Rd]:Wt[Rd], sf?Xt[Rn]:Wt[Rn], sf?Xt[Rm]:Wt[Rm]);
+        return buff;
+    }
 
     // MRS / MSR
     if(isMask(opcode, "110101010001opppnnnnmmmm222ttttt", &a)) {
@@ -840,6 +872,42 @@ const char* arm64_print(uint32_t opcode, uintptr_t addr)
         return buff;
     }
 
+    // VADD / VSUB
+    if(isMask(opcode, "0QU01110ff1mmmmm100001nnnnnddddd", &a)) {
+        const char* Y[] = {"8B", "16B", "4H", "8H", "2S", "4S", "??", "2D"};
+        const char* Vd = Y[((sf)<<1) | a.Q];
+        snprintf(buff, sizeof(buff), "V%s V%d.%s, V%d.%s, V%d.%s", a.U?"SUB":"ADD", Rd, Vd, Rn, Vd, Rm, Vd);
+        return buff;
+    }
+
+    // VMUL
+    if(isMask(opcode, "0Q001110ff1mmmmm100111nnnnnddddd", &a)) {
+        const char* Y[] = {"8B", "16B", "4H", "8H", "2S", "4S", "??", "2D"};
+        const char* Vd = Y[((sf)<<1) | a.Q];
+        snprintf(buff, sizeof(buff), "VMUL V%d.%s, V%d.%s, V%d.%s", Rd, Vd, Rn, Vd, Rm, Vd);
+        return buff;
+    }
+    // CMP
+    if(isMask(opcode, "0Q101110ff1mmmmm100011nnnnnddddd", &a)) {
+        const char* Y[] = {"8B", "16B", "4H", "8H", "2S", "4S", "??", "2D"};
+        const char* Vd = Y[((sf)<<1) | a.Q];
+        snprintf(buff, sizeof(buff), "VCMEQ V%d.%s, V%d.%s, V%d.%s", Rd, Vd, Rn, Vd, Rm, Vd);
+        return buff;
+    }
+
+    // Shift
+    if(isMask(opcode, "0QU011110hhhhrrr000001nnnnnddddd", &a)) {
+        const char* Y[] = {"8B", "16B", "4H", "8H", "2S", "4S", "??", "2D"};
+        const char* Vd ="??";
+        int s = 0;
+        if(shift==0b0001) {Vd = Y[a.Q]; s=16-((shift)<<3 | immr);}
+        else if((shift&0b1110)==0b0010) {Vd = Y[2+a.Q]; s=32-((shift)<<3 | immr);}
+        else if((shift&0b1100)==0b0100) {Vd = Y[4+a.Q]; s=64-((shift)<<3 | immr);}
+        else if((shift&0b1000)==0b1000) {Vd = Y[6+a.Q]; s=128-((shift)<<3 | immr);}
+        snprintf(buff, sizeof(buff), "%cSHR V%d.%s, V%d.%s, #%d", a.U?'U':'S', Rd, Vd, Rn, Vd, s);
+        return buff;
+    }
+
     // INS
     if(isMask(opcode, "01101110000rrrrr0ssss1nnnnnddddd", &a)) {
         char s = '?';
@@ -905,7 +973,7 @@ const char* arm64_print(uint32_t opcode, uintptr_t addr)
         char s = a.Q?'V':'D';
         char d = sf?'D':'S';
         int n = (a.Q && !sf)?4:2;
-        snprintf(buff, sizeof(buff), "VFSUB %c%d.%d%c, %c%d.%d%c, %c%d.%c%d", s, Rd, n, d, s, Rn, n, d, s, Rm, s, d);
+        snprintf(buff, sizeof(buff), "VFSUB %c%d.%d%c, %c%d.%d%c, %c%d.%d%c", s, Rd, n, d, s, Rn, n, d, s, Rm, n, d);
         return buff;
     }
     if(isMask(opcode, "00011110ff1mmmmm001110nnnnnddddd", &a)) {
@@ -933,7 +1001,7 @@ const char* arm64_print(uint32_t opcode, uintptr_t addr)
         char s = a.Q?'V':'D';
         char d = sf?'D':'S';
         int n = (a.Q && !sf)?4:2;
-        snprintf(buff, sizeof(buff), "VFDIV %c%d.%d%c, %c%d.%d%c, %c%d.%c%d", s, Rd, n, d, s, Rn, n, d, s, Rm, s, d);
+        snprintf(buff, sizeof(buff), "VFDIV %c%d.%d%c, %c%d.%d%c, %c%d.%d%c", s, Rd, n, d, s, Rn, n, d, s, Rm, n, d);
         return buff;
     }
     if(isMask(opcode, "00011110ff1mmmmm000110nnnnnddddd", &a)) {
@@ -965,6 +1033,19 @@ const char* arm64_print(uint32_t opcode, uintptr_t addr)
             snprintf(buff, sizeof(buff), "FCMP %c%d, %c%d", s, Rn, s, Rm);
         return buff;
     }
+    //FMIN/FMAX
+    if(isMask(opcode, "00011110ff1mmmmm01oo10nnnnnddddd", &a)) {
+        char s = (sf==0)?'S':((sf==1)?'D':'?');
+        snprintf(buff, sizeof(buff), "F%s %c%d, %c%d, %c%d", (option==3)?"MINNM":((option==2)?"MINNMP":((!option)?"MAXNM":"MAXNMP")), s, Rd, s, Rn, s, Rm);
+        return buff;
+    }
+    if(isMask(opcode, "0Q001110of1mmmmm110001nnnnnddddd", &a)) {
+        char s = (sf==0)?'S':((sf==1)?'D':'?');
+        int n = (sf==0)?2:1;
+        n *= a.Q?2:1;
+        snprintf(buff, sizeof(buff), "F%sNM%s V%d.%d%c, V%d.%d%c, V%d.%d%c", option?"MIN":"MAX", a.Q?"Q":"", Rd, n, s, Rn, n, s, Rm, n, s);
+        return buff;
+    }
 
     // FCVT
     if(isMask(opcode, "f0011110pp10010U000000nnnnnddddd", &a)) {
@@ -992,6 +1073,13 @@ const char* arm64_print(uint32_t opcode, uintptr_t addr)
         snprintf(buff, sizeof(buff), "SCVTF %c%d, %s", s, Rd, sf?Xt[Rn]:Wt[Rn]);
         return buff;
     }
+    if(isMask(opcode, "0QU011100f100001110110nnnnnddddd", &a)) {
+        char s = a.Q?'V':'D';
+        char d = sf?'D':'S';
+        int n = (a.Q && !sf)?4:2;
+        snprintf(buff, sizeof(buff), "%cCVTF %c%d.%d%c, %c%d.%d%c", a.U?'U':'S', s, Rd, n, d, s, Rn, n, d);
+        return buff;
+    }
 
     if(isMask(opcode, "0001111000100010110000nnnnnddddd", &a)) {
         snprintf(buff, sizeof(buff), "FCVT D%d, S%d", Rd, Rn);
@@ -1002,13 +1090,25 @@ const char* arm64_print(uint32_t opcode, uintptr_t addr)
         return buff;
     }
     if(isMask(opcode, "0Q00111001100001011110nnnnnddddd", &a)) {
-        snprintf(buff, sizeof(buff), "FCVTL%s V%d.2D, V%d.%dS", a.Q?"2":"", Rd, Rn, a.Q?4:0);
+        snprintf(buff, sizeof(buff), "FCVTL%s V%d.2D, V%d.%dS", a.Q?"2":"", Rd, Rn, a.Q?4:2);
         return buff;
     }
-    if(isMask(opcode, "0Q10111000100001011010nnnnnddddd", &a)) {
+    if(isMask(opcode, "0Q10111001100001011010nnnnnddddd", &a)) {
         snprintf(buff, sizeof(buff), "FCVTXN%s V%d.%dS, V%d.2D", a.Q?"2":"", Rd, a.Q?4:2, Rn);
         return buff;
     }
+    if(isMask(opcode, "01U11110of100001101o10nnnnnddddd", &a)) {
+        char s = (sf==0)?'S':((sf==1)?'D':'?');
+        const char* roundings[] = {"N", "M", "P", "Z"};
+        snprintf(buff, sizeof(buff), "FCVT%s%s %c%d, %c%d", roundings[option], a.U?"U":"", s, Rd, s, Rn);
+        return buff;
+    }
+    if(isMask(opcode, "f0011110oo1cc000000000nnnnnddddd", &a)) {
+        char s = (option==0)?'S':((option==1)?'D':'?');
+        const char* roundings[] = {"N", "P", "M", "Z"};
+        snprintf(buff, sizeof(buff), "FCVT%sS %s, %c%d", roundings[a.c], sf?Xt[Rd]:Wt[Rd], s, Rn);
+        return buff;
+    }
 
     // FMOV
     if(isMask(opcode, "00011110pp100000010000nnnnnddddd", &a)) {
@@ -1031,6 +1131,196 @@ const char* arm64_print(uint32_t opcode, uintptr_t addr)
         return buff;
     }
 
+    // TBL / TBX
+    if(isMask(opcode, "0Q001110000mmmmm0ffo00nnnnnddddd", &a)) {
+        char X = (option)?'X':'L';
+        const char* Y = (a.Q)?"16B":"8B";
+        if(sf==0)
+            snprintf(buff, sizeof(buff), "TB%c V%d.%s, {V%d.16B}, V%d.%s", X, Rd, Y, Rn, Rm, Y);
+        else if(sf==1)
+            snprintf(buff, sizeof(buff), "TB%c V%d.%s, {V%d.16B, V%d.16B}, V%d.%s", X, Rd, Y, Rn, Rn+1, Rm, Y);
+        else if(sf==2)
+            snprintf(buff, sizeof(buff), "TB%c V%d.%s, {V%d.16B, V%d.16B, V%d.16B}, V%d.%s", X, Rd, Y, Rn, Rn+1, Rn+2, Rm, Y);
+        else
+            snprintf(buff, sizeof(buff), "TB%c V%d.%s, {V%d.16B, V%d.16B, V%d.16B, V%d.16B}, V%d.%s", X, Rd, Y, Rn, Rn+1, Rn+2, Rn+3, Rm, Y);
+        return buff;
+    }
+
+    // ZIP / UZP
+    if(isMask(opcode, "0Q001110ff0mmmmm0o1110nnnnnddddd", &a)) {
+        const char* Y[] = {"8B", "16B", "4H", "8H", "2S", "4S", "??", "2D"};
+        const char* Vd = Y[(sf<<1) | a.Q];
+        snprintf(buff, sizeof(buff), "ZIP%d V%d.%s, V%d.%s, V%d.%s", a.o+1, Rd, Vd, Rn, Vd, Rm, Vd);
+        return buff;
+    }
+    if(isMask(opcode, "0Q001110ff0mmmmm0o0110nnnnnddddd", &a)) {
+        const char* Y[] = {"8B", "16B", "4H", "8H", "2S", "4S", "??", "2D"};
+        const char* Vd = Y[(sf<<1) | a.Q];
+        snprintf(buff, sizeof(buff), "UZP%d V%d.%s, V%d.%s, V%d.%s", a.o+1, Rd, Vd, Rn, Vd, Rm, Vd);
+        return buff;
+    }
+
+    // EXT
+    if(isMask(opcode, "0Q101110000mmmmm0iiii0nnnnnddddd", &a)) {
+        const char* Y[] = {"8B", "16B"};
+        const char* Vd = Y[a.Q];
+        snprintf(buff, sizeof(buff), "EXT V%d.%s, V%d.%s, V%d.%s, #%d", Rd, Vd, Rn, Vd, Rm, Vd, imm);
+        return buff;
+    }
+
+    // Absolute Difference
+    // SABA / SABD / UABA / UABD
+    if(isMask(opcode, "0QU01110ff1mmmmm0111c1nnnnnddddd", &a)) {
+        const char* Y[] = {"8B", "16B", "4H", "8H", "2S", "4S", "??", "???"};
+        const char* Vd = Y[(sf<<1) | a.Q];
+        snprintf(buff, sizeof(buff), "%cAB%c V%d.%s, V%d.%s, V%d.%s", a.U?'U':'S', a.c?'A':'D', Rd, Vd, Rn, Vd, Rm, Vd);
+        return buff;
+    }
+    if(isMask(opcode, "0QU01110ff1mmmmm01c100nnnnnddddd", &a)) {
+        const char* Y[] = {"8B", "16B", "4H", "8H", "2S", "4S", "??", "???"};
+        const char* Vd = Y[(sf<<1) | a.Q];
+        const char* Z[] = {"8H", "4S", "2D", "?"};
+        const char* Va = Z[(sf<<1)];
+        snprintf(buff, sizeof(buff), "%cAB%cL%s V%d.%s, V%d.%s, V%d.%s", a.U?'U':'S', a.c?'A':'D', a.Q?"2":"", Rd, Va, Rn, Vd, Rm, Vd);
+        return buff;
+    }
+    // Add pair / accros vector
+    if(isMask(opcode, "0QU01110ff1000000c1010nnnnnddddd", &a)) {
+        const char* Y[] = {"8B", "16B", "4H", "8H", "2S", "4S", "??", "???"};
+        const char* Vd = Y[(sf<<1) | a.Q];
+        const char* Z[] = {"4H", "8H", "2S", "4S", "1D", "2D", "??", "???"};
+        const char* Va = Z[(sf<<1) | a.Q];
+        snprintf(buff, sizeof(buff), "%cAD%cLP V%d.%s, V%d.%s", a.U?'U':'S', a.c?'A':'D', Rd, Va, Rn, Vd);
+        return buff;
+    }
+    if(isMask(opcode, "0QU01110ff110000001110nnnnnddddd", &a)) {
+        const char* Y[] = {"8B", "16B", "4H", "8H", "2S", "4S", "??", "???"};
+        const char* Vd = Y[(sf<<1) | a.Q];
+        const char* Z[] = {"H", "S", "D", "?"};
+        snprintf(buff, sizeof(buff), "%cADDLV V%d.%s, V%d.%s", a.U?'U':'S', Rd, Z[sf], Rn, Vd);
+        return buff;
+    }
+    // HADD
+    if(isMask(opcode, "0QU01110ff1mmmmm000001nnnnnddddd", &a)) {
+        const char* Y[] = {"8B", "16B", "4H", "8H", "2S", "4S", "??", "???"};
+        const char* Vd = Y[(sf<<1) | a.Q];
+        snprintf(buff, sizeof(buff), "%cHADD V%d.%s, V%d.%s, V%d.%s", a.U?'U':'S', Rd, Vd, Rn, Vd, Rm, Vd);
+        return buff;
+    }
+    if(isMask(opcode, "0QU01110ff1mmmmm000101nnnnnddddd", &a)) {
+        const char* Y[] = {"8B", "16B", "4H", "8H", "2S", "4S", "??", "???"};
+        const char* Vd = Y[(sf<<1) | a.Q];
+        snprintf(buff, sizeof(buff), "%cRHADD V%d.%s, V%d.%s, V%d.%s", a.U?'U':'S', Rd, Vd, Rn, Vd, Rm, Vd);
+        return buff;
+    }
+    //SQ(R)DMULH
+    if(isMask(opcode, "0QU01110ff1mmmmm101101nnnnnddddd", &a)) {
+        const char* Y[] = {"8B", "16B", "4H", "8H", "2S", "4S", "??", "???"};
+        const char* Vd = Y[(sf<<1) | a.Q];
+        snprintf(buff, sizeof(buff), "SQ%sDMULH V%d.%s, V%d.%s, V%d.%s", a.U?"R":"", Rd, Vd, Rn, Vd, Rm, Vd);
+        return buff;
+    }
+    
+    // MOV immediate
+    if(isMask(opcode, "0Q00111100000iii111001iiiiiddddd", &a)) {
+        const char* Y[] = {"8B", "16B"};
+        const char* Vd = Y[a.Q];
+        snprintf(buff, sizeof(buff), "MOVI V%d.%s, #0x%x", Rd, Vd, imm);
+        return buff;
+    }
+
+    // LD1/ST1 single structure
+    if(isMask(opcode, "0Q0011010L000000cc0Sffnnnnnttttt", &a)) {
+        int scale = a.c;
+        int idx = 0;
+        const char* Y[] = {"B", "H", "S", "D"};
+        switch(scale) {
+            case 3: scale = sf; /* rep = 1; */ break;
+            case 0: idx = (a.Q<<3) | (a.S<<2) | sf; break;
+            case 1: idx = (a.Q<<2) | (a.S<<1) | (sf>>1); break;
+            case 2: if(!(sf&1))
+                        idx = (a.Q<<1) | a.S;
+                    else {
+                        scale = 3;
+                        idx = a.Q;
+                    }
+                    break;
+        }
+        snprintf(buff, sizeof(buff), "%s1 {V%d.%s}[%d], [%s]", a.L?"LD":"ST", Rt, Y[scale], idx, XtSp[Rn]);
+        return buff;
+    }
+    // LDUR/STUR
+    if(isMask(opcode, "ff111100cL0iiiiiiiii00nnnnnttttt", &a)) {
+        const char* Y[] = {"B", "H", "S", "D", "Q"};
+        int sz = sf;
+        if(sz==0 && a.c)
+            sz = 4;
+        int offset = signExtend(imm, 9);
+        if(!offset)
+            snprintf(buff, sizeof(buff), "%sUR %s%d, [%s]", a.L?"LD":"ST", Y[sz], Rd, XtSp[Rn]);
+        else
+            snprintf(buff, sizeof(buff), "%sUR %s%d, [%s, %+d]", a.L?"LD":"ST", Y[sz], Rd, XtSp[Rn], imm);
+        return buff;
+    }
+    // LDR/STR vector immediate
+    if(isMask(opcode, "ff111101cLiiiiiiiiiiiinnnnnttttt", &a)) {
+        const char* Y[] = {"B", "H", "S", "D", "Q"};
+        int sz = sf;
+        if(sz==0 && a.c)
+            sz = 4;
+        int offset = imm<<sz;
+        if(!offset)
+            snprintf(buff, sizeof(buff), "%sR %s%d, [%s]", a.L?"LD":"ST", Y[sz], Rd, XtSp[Rn]);
+        else
+            snprintf(buff, sizeof(buff), "%sR %s%d, [%s, %+d]", a.L?"LD":"ST", Y[sz], Rd, XtSp[Rn], imm);
+        return buff;
+    }
+
+    // (S/U)QXT(U)N
+    if(isMask(opcode, "0Q101110ff100001001010nnnnnddddd", &a)) {
+        const char* Y[] = {"8B", "16B", "4H", "8H", "2S", "4S", "?", "??"};
+        const char* Vd = Y[(sf<<1) | a.Q];
+        const char* Z[] = {"8H", "4S", "2D", "?"};
+        const char* Va = Z[sf];
+        snprintf(buff, sizeof(buff), "SQXTUN%s V%d.%s, V%d.%s", a.Q?"2":"", Rd, Vd, Rn, Va);
+        return buff;
+    }
+    if(isMask(opcode, "0QU01110ff100001010010nnnnnddddd", &a)) {
+        const char* Y[] = {"8B", "16B", "4H", "8H", "2S", "4S", "?", "??"};
+        const char* Vd = Y[(sf<<1) | a.Q];
+        const char* Z[] = {"8H", "4S", "2D", "?"};
+        const char* Va = Z[sf];
+        snprintf(buff, sizeof(buff), "%cQXTN%s V%d.%s, V%d.%s", a.U?'U':'S', a.Q?"2":"", Rd, Vd, Rn, Va);
+        return buff;
+    }
+
+    // (S/U)SSHL(2) / (U/S)XTL(2)
+    if(isMask(opcode, "0QU011110hhhhiii101001nnnnnddddd", &a)) {
+        const char* Y[] = {"8B", "16B", "4H", "8H", "2S", "4S", "?", "??"};
+        const char* Z[] = {"8H", "4S", "2D", "?"};
+        int sz = 3;
+        if((a.h&0b1111)==0b0001) sz=0;
+        else if((a.h&0b1110)==0b0010) sz=1;
+        else if((a.h&0b1100)==0b0100) sz=2;
+        int sh=(((a.h)<<3)|(imm)) - (8<<sz);
+        const char* Vd = Y[(sz<<1)|a.Q];
+        const char* Va = Z[sz];
+        if(!sh)
+            snprintf(buff, sizeof(buff), "%cXTL%s V%d.%s, V%d.%s", a.U?'U':'S', a.Q?"2":"", Rd, Va, Rn, Vd);
+        else
+            snprintf(buff, sizeof(buff), "%cSHLL%s V%d.%s, V%d.%s, #%d", a.U?'U':'S', a.Q?"2":"", Rd, Va, Rn, Vd, sh);
+        return buff;
+    }
+    
+    // AES
+    if(isMask(opcode, "0100111000101000010f10nnnnnddddd", &a)) {
+        snprintf(buff, sizeof(buff), "AES%c V%d.16B, V%d.16B", sf?'D':'E', Rd, Rn);
+        return buff;
+    }
+    if(isMask(opcode, "0100111000101000011f10nnnnnddddd", &a)) {
+        snprintf(buff, sizeof(buff), "AES%sMC V%d.16B, V%d.16B", sf?"I":"", Rd, Rn);
+        return buff;
+    }
 
 
     snprintf(buff, sizeof(buff), "%08X ???", __builtin_bswap32(opcode));

src/dynarec/dynablock.c

@@ -2,6 +2,7 @@
 #include <stdlib.h>
 #include <pthread.h>
 #include <errno.h>
+#include <setjmp.h>
 
 #include "debug.h"
 #include "box64context.h"
@@ -69,7 +70,7 @@ void FreeDynablock(dynablock_t* db)
         if(db->parent->direct) {
             uintptr_t addr = (uintptr_t)db->x64_addr;
             if(addr>=startdb && addr<enddb)
-                db->parent->direct[addr-startdb] = NULL;
+                arm64_lock_xchg(&db->parent->direct[addr-startdb], 0);   // secured write
         }
         // remove jumptable
         setJumpTableDefault64(db->x64_addr);
@@ -81,7 +82,9 @@ void FreeDynablock(dynablock_t* db)
         // only the father free the DynarecMap
         if(!db->father) {
             dynarec_log(LOG_DEBUG, " -- FreeDyrecMap(%p, %d)\n", db->block, db->size);
+            pthread_mutex_lock(&my_context->mutex_dyndump);
             FreeDynarecMap(db, (uintptr_t)db->block, db->size);
+            pthread_mutex_unlock(&my_context->mutex_dyndump);
         }
         free(db->sons);
         free(db->instsize);
@@ -165,10 +168,10 @@ void MarkDirectDynablock(dynablocklist_t* dynablocks, uintptr_t addr, uintptr_t
                     MarkDynablock(db);
 }
 
-void FreeRangeDynablock(dynablocklist_t* dynablocks, uintptr_t addr, uintptr_t size)
+int FreeRangeDynablock(dynablocklist_t* dynablocks, uintptr_t addr, uintptr_t size)
 {
     if(!dynablocks)
-        return;
+        return 1;
 
     if(dynablocks->direct) {
         dynablock_t* db;
@@ -176,34 +179,38 @@ void FreeRangeDynablock(dynablocklist_t* dynablocks, uintptr_t addr, uintptr_t s
         khint_t k;
         kh_dynablocks_t *blocks = kh_init(dynablocks);
         // copy in a temporary list
-        if(dynablocks->direct) {
-            uintptr_t startdb = dynablocks->text;
-            uintptr_t enddb = startdb + dynablocks->textsz;
-            uintptr_t start = addr;
-            uintptr_t end = addr+size;
-            if(start<startdb)
-                start = startdb;
-            if(end>enddb)
-                end = enddb;
-            if(end>startdb && start<enddb)
-                for(uintptr_t i = start; i<end; ++i) {
-                    db = (dynablock_t*)arm64_lock_xchg(&dynablocks->direct[i-startdb], 0);
-                    if(db) {
-                        if(db->father)
-                            db = db->father;
-                        if(db->parent==dynablocks) {
-                            k = kh_put(dynablocks, blocks, (uintptr_t)db, &ret);
-                            kh_value(blocks, k) = db;
-                        }
+        uintptr_t startdb = dynablocks->text;
+        uintptr_t enddb = startdb + dynablocks->textsz;
+        uintptr_t start = addr;
+        uintptr_t end = addr+size;
+        if(start<startdb)
+            start = startdb;
+        if(end>enddb)
+            end = enddb;
+        if(end>startdb && start<enddb)
+            for(uintptr_t i = start; i<end; ++i) {
+                db = (dynablock_t*)arm64_lock_xchg(&dynablocks->direct[i-startdb], 0);
+                if(db) {
+                    if(db->father)
+                        db = db->father;
+                    if(db->parent==dynablocks) {
+                        k = kh_put(dynablocks, blocks, (uintptr_t)db, &ret);
+                        kh_value(blocks, k) = db;
                     }
                 }
-        }
+            }
         // purge the list
         kh_foreach_value(blocks, db,
             FreeDynablock(db);
         );
         kh_destroy(dynablocks, blocks);
+        // check emptyness
+        for(uintptr_t i=0; i<dynablocks->textsz; ++i)
+            if(dynablocks->direct[i])
+                return 0;
+        return 1;
     }
+    return 1;
 }
 void MarkRangeDynablock(dynablocklist_t* dynablocks, uintptr_t addr, uintptr_t size)
 {
@@ -214,7 +221,7 @@ void MarkRangeDynablock(dynablocklist_t* dynablocks, uintptr_t addr, uintptr_t s
         uintptr_t new_size = size + dynablocks->maxsz;
         MarkDirectDynablock(dynablocks, new_addr, new_size);
         // the blocks check before
-        for(int idx=(new_addr)>>DYNAMAP_SHIFT; idx<(addr>>DYNAMAP_SHIFT); ++idx)
+        for(unsigned idx=(new_addr)>>DYNAMAP_SHIFT; idx<(addr>>DYNAMAP_SHIFT); ++idx)
             MarkDirectDynablock(getDB(idx), new_addr, new_size);
     }
 }
@@ -247,10 +254,6 @@ dynablock_t *AddNewDynablock(dynablocklist_t* dynablocks, uintptr_t addr, int* c
         return NULL;
     }
     if((addr<dynablocks->text) || (addr>=(dynablocks->text+dynablocks->textsz))) {
-        // this should be useless
-        //dynarec_log(LOG_INFO, "Warning: Refused to create a Direct Block that is out-of-bound: dynablocks=%p (%p:%p), addr=%p\n", dynablocks, (void*)(dynablocks->text), (void*)(dynablocks->text+dynablocks->textsz), (void*)addr);
-        //*created = 0;
-        //return NULL;
         return AddNewDynablock(getDBFromAddress(addr), addr, created);
     }
     dynablock_t* block = NULL;
@@ -258,7 +261,7 @@ dynablock_t *AddNewDynablock(dynablocklist_t* dynablocks, uintptr_t addr, int* c
     if(dynablocks->direct) {
         block = dynablocks->direct[addr-dynablocks->text];
         if(block) {
-            dynarec_log(LOG_DUMP, "Block already exist in Direct Map\n");
+            dynarec_log(LOG_VERBOSE, "Block already exist in Direct Map\n");
             *created = 0;
             return block;
         }
@@ -269,16 +272,16 @@ dynablock_t *AddNewDynablock(dynablocklist_t* dynablocks, uintptr_t addr, int* c
     
     if(!dynablocks->direct) {
         dynablock_t** p = (dynablock_t**)calloc(dynablocks->textsz, sizeof(dynablock_t*));
-        if(arm64_lock_storeifnull(&dynablocks->direct, p)!=p)
+        if(arm64_lock_storeifnull(&dynablocks->direct, (uint64_t)p) != (uint64_t)p)
             free(p);    // someone already create the direct array, too late...
     }
 
     // create and add new block
-    dynarec_log(LOG_DUMP, "Ask for DynaRec Block creation @%p\n", (void*)addr);
+    dynarec_log(LOG_VERBOSE, "Ask for DynaRec Block creation @%p\n", (void*)addr);
 
     block = (dynablock_t*)calloc(1, sizeof(dynablock_t));
     block->parent = dynablocks; 
-    dynablock_t* tmp = (dynablock_t*)arm64_lock_storeifnull(&dynablocks->direct[addr-dynablocks->text], block);
+    dynablock_t* tmp = (dynablock_t*)arm64_lock_storeifnull(&dynablocks->direct[addr-dynablocks->text], (uint64_t)block);
     if(tmp !=  block) {
         // a block appeard!
         free(block);
@@ -290,6 +293,14 @@ dynablock_t *AddNewDynablock(dynablocklist_t* dynablocks, uintptr_t addr, int* c
     return block;
 }
 
+//TODO: move this to dynrec_arm.c and track allocated structure to avoid memory leak
+static __thread struct __jmp_buf_tag dynarec_jmpbuf;
+
+void cancelFillBlock()
+{
+    longjmp(&dynarec_jmpbuf, 1);
+}
+
 /* 
     return NULL if block is not found / cannot be created. 
     Don't create if create==0
@@ -323,44 +334,46 @@ static dynablock_t* internalDBGetBlock(x64emu_t* emu, uintptr_t addr, uintptr_t
     if(!created)
         return block;   // existing block...
 
-    #if 1
-    if(box64_dynarec_dump)
-        pthread_mutex_lock(&my_context->mutex_dyndump);
-    #endif
     // fill the block
     block->x64_addr = (void*)addr;
-    if(!FillBlock64(block, filladdr)) {
-        void* old = (void*)arm64_lock_xchg(&dynablocks->direct[addr-dynablocks->text], 0);
-        if(old!=block && old) {// put it back in place, strange things are happening here!
+    pthread_mutex_lock(&my_context->mutex_dyndump);
+    if(sigsetjmp(&dynarec_jmpbuf, 1)) {
+        printf_log(LOG_INFO, "FillBlock at %p triggered a segfault, cancelling\n", (void*)addr);
+        return NULL;
+    }
+    void* ret = FillBlock64(block, filladdr);
+    pthread_mutex_unlock(&my_context->mutex_dyndump);
+    if(!ret) {
+        dynarec_log(LOG_DEBUG, "Fillblock of block %p for %p returned an error\n", block, (void*)addr);
+        void* old = (void*)arm64_lock_storeifref(&dynablocks->direct[addr-dynablocks->text], 0, (uint64_t)block);
+        if(old != block && old) {
+            // put it back in place, strange things are happening here!
             dynarec_log(LOG_INFO, "Warning, a wild block appeared at %p: %p\n", (void*)addr, old);
-            arm64_lock_xchg(&dynablocks->direct[addr-dynablocks->text], (uintptr_t)old);
+            // doing nothing else, the block has not been written
         }
         free(block);
         block = NULL;
     }
-    #if 1
-    if(box64_dynarec_dump)
-        pthread_mutex_unlock(&my_context->mutex_dyndump);
-    #endif
     // check size
     if(block && block->x64_size) {
         int blocksz = block->x64_size;
         if(dynablocks->maxsz<blocksz) {
             dynablocks->maxsz = blocksz;
-            for(int idx=(addr>>DYNAMAP_SHIFT)+1; idx<=((addr+blocksz)>>DYNAMAP_SHIFT); ++idx) {
+            for(unsigned idx=(addr>>DYNAMAP_SHIFT)+1; idx<=((addr+blocksz)>>DYNAMAP_SHIFT); ++idx) {
                 dynablocklist_t* dblist;
                 if((dblist = getDB(idx)))
                     if(dblist->maxsz<blocksz)
                         dblist->maxsz = blocksz;
             }
         }
-        lockDB();
-        protectDBnolock((uintptr_t)block->x64_addr, block->x64_size);
+        protectDB((uintptr_t)block->x64_addr, block->x64_size);
         // fill-in jumptable
         addJumpTableIfDefault64(block->x64_addr, block->block);
-        for(int i=0; i<block->sons_size; ++i)
+        for(int i=0; i<block->sons_size; ++i) {
             addJumpTableIfDefault64(block->sons[i]->x64_addr, block->sons[i]->block);
-        unlockDB();
+            block->sons[i]->done = 1;
+        }
+        block->done = 1;
     }
 
     dynarec_log(LOG_DEBUG, " --- DynaRec Block %s @%p:%p (%p, 0x%x bytes, with %d son(s))\n", created?"created":"recycled", (void*)addr, (void*)(addr+((block)?block->x64_size:0)), (block)?block->block:0, (block)?block->size:0, (block)?block->sons_size:0);
@@ -385,13 +398,11 @@ dynablock_t* DBGetBlock(x64emu_t* emu, uintptr_t addr, int create, dynablock_t**
             db = internalDBGetBlock(emu, addr, addr, create, *current);
         } else {
             father->need_test = 0;
-            lockDB();
-            protectDBnolock((uintptr_t)father->x64_addr, father->x64_size);
+            protectDB((uintptr_t)father->x64_addr, father->x64_size);
             // fill back jumptable
             addJumpTableIfDefault64(father->x64_addr, father->block);
             for(int i=0; i<father->sons_size; ++i)
                 addJumpTableIfDefault64(father->sons[i]->x64_addr, father->sons[i]->block);
-            unlockDB();
         }
     } 
     return db;
@@ -413,13 +424,11 @@ dynablock_t* DBAlternateBlock(x64emu_t* emu, uintptr_t addr, uintptr_t filladdr)
             db = internalDBGetBlock(emu, addr, filladdr, create, NULL);
         } else {
             father->need_test = 0;
-            lockDB();
-            protectDBnolock((uintptr_t)father->x64_addr, father->x64_size);
+            protectDB((uintptr_t)father->x64_addr, father->x64_size);
             // fill back jumptable
             addJumpTableIfDefault64(father->x64_addr, father->block);
             for(int i=0; i<father->sons_size; ++i)
                 addJumpTableIfDefault64(father->sons[i]->x64_addr, father->sons[i]->block);
-            unlockDB();
         }
     } 
     return db;

src/dynarec/dynarec.c

@@ -19,6 +19,7 @@
 #ifdef DYNAREC
 #include "dynablock.h"
 #include "dynablock_private.h"
+#include "bridge.h"
 #endif
 
 #ifdef DYNAREC
@@ -30,16 +31,14 @@ void arm64_epilog_fast() EXPORTDYN;
 #endif
 
 #ifdef DYNAREC
-#ifdef HAVE_TRACE
 uintptr_t getX64Address(dynablock_t* db, uintptr_t arm_addr);
-#endif
-void* LinkNext(x64emu_t* emu, uintptr_t addr, void* x2)
+
+void* LinkNext(x64emu_t* emu, uintptr_t addr, void* x2, uintptr_t* x3)
 {
     #ifdef HAVE_TRACE
     if(!addr) {
-        x2-=8;  // actual PC is 2 instructions ahead
-        dynablock_t* db = FindDynablockFromNativeAddress(x2);
-        printf_log(LOG_NONE, "Warning, jumping to NULL address from %p (db=%p, x64addr=%p)\n", x2, db, db?(void*)getX64Address(db, (uintptr_t)x2):NULL);
+        dynablock_t* db = FindDynablockFromNativeAddress(x2-4);
+        printf_log(LOG_NONE, "Warning, jumping to NULL address from %p (db=%p, x64addr=%p)\n", x2-4, db, db?(void*)getX64Address(db, (uintptr_t)x2-4):NULL);
     }
     #endif
     dynablock_t* current = NULL;
@@ -47,8 +46,22 @@ void* LinkNext(x64emu_t* emu, uintptr_t addr, void* x2)
     dynablock_t* block = DBGetBlock(emu, addr, 1, &current);
     if(!block) {
         // no block, let link table as is...
-        //tableupdate(arm64_epilog, addr, table);
-        return arm64_epilog;
+        if(hasAlternate((void*)addr)) {
+            printf_log(LOG_INFO, "Jmp address has alternate: %p", (void*)addr);
+            addr = (uintptr_t)getAlternate((void*)addr);    // set new address
+            R_RIP = addr;   // but also new RIP!
+            *x3 = addr; // and the RIP in x27 register
+            printf_log(LOG_INFO, " -> %p\n", (void*)addr);
+            block = DBGetBlock(emu, addr, 1, &current);
+        }
+        if(!block) {
+            #ifdef HAVE_TRACE
+            dynablock_t* db = FindDynablockFromNativeAddress(x2-4);
+            printf_log(LOG_INFO, "Warning, jumping to a no-block address %p from %p (db=%p, x64addr=%p)\n", (void*)addr, x2-4, db, db?(void*)getX64Address(db, (uintptr_t)x2-4):NULL);
+            #endif
+            //tableupdate(arm64_epilog, addr, table);
+            return arm64_epilog;
+        }
     }
     if(!block->done) {
         // not finished yet... leave linker
@@ -64,6 +77,11 @@ void* LinkNext(x64emu_t* emu, uintptr_t addr, void* x2)
 }
 #endif
 
+#ifdef __GNUC__
+// Disable "clobbered" warnings
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wclobbered"
+#endif
 void DynaCall(x64emu_t* emu, uintptr_t addr)
 {
     // prepare setjump for signal handling
@@ -75,7 +93,7 @@ void DynaCall(x64emu_t* emu, uintptr_t addr)
             ejb->emu = emu;
             ejb->jmpbuf_ok = 1;
             jmpbuf_reset = 1;
-            if(setjmp((struct __jmp_buf_tag*)ejb->jmpbuf)) {
+            if(sigsetjmp((struct __jmp_buf_tag*)ejb->jmpbuf, 1)) {
                 printf_log(LOG_DEBUG, "Setjmp DynaCall, fs=0x%x\n", ejb->emu->segs[_FS]);
                 addr = R_RIP;   // not sure if it should still be inside DynaCall!
             }
@@ -124,7 +142,7 @@ void DynaCall(x64emu_t* emu, uintptr_t addr)
                     ejb->emu = emu;
                     ejb->jmpbuf_ok = 1;
                     jmpbuf_reset = 1;
-                    if(setjmp((struct __jmp_buf_tag*)ejb->jmpbuf)) {
+                    if(sigsetjmp((struct __jmp_buf_tag*)ejb->jmpbuf, 1)) {
                         printf_log(LOG_DEBUG, "Setjmp inner DynaCall, fs=0x%x\n", ejb->emu->segs[_FS]);
                         addr = R_RIP;
                     }
@@ -134,7 +152,8 @@ void DynaCall(x64emu_t* emu, uintptr_t addr)
         emu->quit = 0;  // reset Quit flags...
         emu->df = d_none;
         if(emu->quitonlongjmp && emu->longjmp) {
-            emu->longjmp = 0;   // don't change anything because of the longjmp
+            if(emu->quitonlongjmp==1)
+                emu->longjmp = 0;   // don't change anything because of the longjmp
         } else {
             R_RBX = old_rbx;
             R_RDI = old_rdi;
@@ -165,7 +184,7 @@ int DynaRun(x64emu_t* emu)
 #ifdef DYNAREC
             jmpbuf_reset = 1;
 #endif
-            if(setjmp((struct __jmp_buf_tag*)ejb->jmpbuf))
+            if(sigsetjmp((struct __jmp_buf_tag*)ejb->jmpbuf, 1))
                 printf_log(LOG_DEBUG, "Setjmp DynaRun, fs=0x%x\n", ejb->emu->segs[_FS]);
         }
     }
@@ -202,7 +221,7 @@ int DynaRun(x64emu_t* emu)
                     ejb->emu = emu;
                     ejb->jmpbuf_ok = 1;
                     jmpbuf_reset = 1;
-                    if(setjmp((struct __jmp_buf_tag*)ejb->jmpbuf))
+                    if(sigsetjmp((struct __jmp_buf_tag*)ejb->jmpbuf, 1))
                         printf_log(LOG_DEBUG, "Setjmp inner DynaRun, fs=0x%x\n", ejb->emu->segs[_FS]);
                 }
             }
@@ -213,4 +232,7 @@ int DynaRun(x64emu_t* emu)
         ejb->jmpbuf_ok = 0;
     return 0;
 #endif
-}
+}
+#ifdef __GNUC__
+#pragma GCC diagnostic pop
+#endif

src/dynarec/dynarec_arm64.c

@@ -315,8 +315,11 @@ int Table64(dynarec_arm_t *dyn, uint64_t val)
             idx = i;
     // not found, add it
     if(idx==-1) {
+        if(dyn->table64size == dyn->table64cap) {
+            dyn->table64cap+=4;
+            dyn->table64 = (uint64_t*)realloc(dyn->table64, dyn->table64cap * sizeof(uint64_t));
+        }
         idx = dyn->table64size++;
-        dyn->table64 = (uint64_t*)realloc(dyn->table64, dyn->table64size * sizeof(uint64_t));
         dyn->table64[idx] = val;
     }
     // calculate offset
@@ -325,30 +328,37 @@ int Table64(dynarec_arm_t *dyn, uint64_t val)
 }
 
 
-void arm_pass0(dynarec_arm_t* dyn, uintptr_t addr);
-void arm_pass1(dynarec_arm_t* dyn, uintptr_t addr);
-void arm_pass2(dynarec_arm_t* dyn, uintptr_t addr);
-void arm_pass3(dynarec_arm_t* dyn, uintptr_t addr);
+uintptr_t arm_pass0(dynarec_arm_t* dyn, uintptr_t addr);
+uintptr_t arm_pass1(dynarec_arm_t* dyn, uintptr_t addr);
+uintptr_t arm_pass2(dynarec_arm_t* dyn, uintptr_t addr);
+uintptr_t arm_pass3(dynarec_arm_t* dyn, uintptr_t addr);
 
 void* FillBlock64(dynablock_t* block, uintptr_t addr) {
-    if(addr>=box64_nodynarec_start && addr<box64_nodynarec_end)
-        return NULL;
+    if(addr>=box64_nodynarec_start && addr<box64_nodynarec_end) {
+        block->done = 1;
+        return (void*)block;
+    }
+    // protect the 1st page
+    protectDB(addr, 1);
     // init the helper
     dynarec_arm_t helper = {0};
     helper.start = addr;
-    arm_pass0(&helper, addr);
-    if(!helper.size) {
-        dynarec_log(LOG_DEBUG, "Warning, null-sized dynarec block (%p)\n", (void*)addr);
+    uintptr_t start = addr;
+    uintptr_t end = arm_pass0(&helper, addr);
+    if(!helper.size || !isprotectedDB(addr, 1)) {
+        dynarec_log(LOG_DEBUG, "Warning, null-sized dynarec block (%p) or write on purge on pass0\n", (void*)addr);
         block->done = 1;
         return (void*)block;
     }
     helper.cap = helper.size+3; // needs epilog handling
     helper.insts = (instruction_arm64_t*)calloc(helper.cap, sizeof(instruction_arm64_t));
+    // already protect the block and compute hash signature
+    if((addr&~0xfff)!=(end&~0xfff)) // need to protect some other pages too
+        protectDB(addr, end-addr);  //end is 1byte after actual end
+    uint32_t hash = X31_hash_code((void*)addr, end-addr);
     // pass 1, addresses, x64 jump addresses, flags
     arm_pass1(&helper, addr);
     // calculate barriers
-    uintptr_t start = helper.insts[0].x64.addr;
-    uintptr_t end = helper.insts[helper.size].x64.addr+helper.insts[helper.size].x64.size;
     for(int i=0; i<helper.size; ++i)
         if(helper.insts[i].x64.jmp) {
             uintptr_t j = helper.insts[i].x64.jmp;
@@ -376,10 +386,10 @@ void* FillBlock64(dynablock_t* block, uintptr_t addr) {
     // pass 2, instruction size
     arm_pass2(&helper, addr);
     // ok, now allocate mapped memory, with executable flag on
-    int sz = helper.arm_size + helper.table64size*sizeof(uint64_t);
+    size_t sz = helper.arm_size + helper.table64size*sizeof(uint64_t);
     void* p = (void*)AllocDynarecMap(block, sz);
     if(p==NULL) {
-        dynarec_log(LOG_DEBUG, "AllocDynarecMap(%p, %d) failed, cancelling block\n", block, sz);
+        dynarec_log(LOG_DEBUG, "AllocDynarecMap(%p, %zu) failed, cancelling block\n", block, sz);
         free(helper.insts);
         free(helper.next);
         free(helper.table64);
@@ -394,15 +404,17 @@ void* FillBlock64(dynablock_t* block, uintptr_t addr) {
     }
     // pass 3, emit (log emit arm opcode)
     if(box64_dynarec_dump) {
-        dynarec_log(LOG_NONE, "%s%04d|Emitting %d bytes for %d x64 bytes", (box64_dynarec_dump>1)?"\e[01;36m":"", GetTID(), helper.arm_size, helper.isize); 
+        dynarec_log(LOG_NONE, "%s%04d|Emitting %zu bytes for %u x64 bytes", (box64_dynarec_dump>1)?"\e[01;36m":"", GetTID(), helper.arm_size, helper.isize); 
         printFunctionAddr(helper.start, " => ");
         dynarec_log(LOG_NONE, "%s\n", (box64_dynarec_dump>1)?"\e[m":"");
     }
-    helper.arm_size = 0;
     int oldtable64size = helper.table64size;
+    size_t oldarmsize = helper.arm_size;
+    helper.arm_size = 0;
+    helper.table64size = 0; // reset table64 (but not the cap)
     arm_pass3(&helper, addr);
-    if(sz!=(helper.arm_size + helper.table64size*8)) {
-        printf_log(LOG_NONE, "BOX64: Warning, size difference in block between pass2 (%d) & pass3 (%d)!\n", sz, helper.arm_size+helper.table64size*8);
+    if((oldarmsize!=helper.arm_size) || (oldtable64size<helper.table64size)) {
+        printf_log(LOG_NONE, "BOX64: Warning, size difference in block between pass2 (%zu) & pass3 (%zu)!\n", sz, helper.arm_size+helper.table64size*8);
         uint8_t *dump = (uint8_t*)helper.start;
         printf_log(LOG_NONE, "Dump of %d x64 opcodes:\n", helper.size);
         for(int i=0; i<helper.size; ++i) {
@@ -413,10 +425,19 @@ void* FillBlock64(dynablock_t* block, uintptr_t addr) {
         }
         printf_log(LOG_NONE, "Table64 \t%d -> %d\n", oldtable64size*8, helper.table64size*8);
         printf_log(LOG_NONE, " ------------\n");
+
+        free(helper.insts);
+        free(helper.next);
+        free(helper.table64);
+        free(helper.sons_x64);
+        free(helper.sons_arm);
+        FreeDynarecMap(block, (uintptr_t)p, sz);
+        return NULL;
+
     }
     // add table64 if needed
     if(helper.table64size) {
-        memcpy(p+helper.arm_size, helper.table64, helper.table64size*8);
+        memcpy((void*)helper.tablestart, helper.table64, helper.table64size*8);
     }
     // all done...
     __clear_cache(p, p+sz);   // need to clear the cache before execution...
@@ -441,10 +462,15 @@ void* FillBlock64(dynablock_t* block, uintptr_t addr) {
     block->need_test = 0;
     //block->x64_addr = (void*)start;
     block->x64_size = end-start;
-    if(box64_dynarec_largest<block->x64_size)
-        box64_dynarec_largest = block->x64_size;
     block->hash = X31_hash_code(block->x64_addr, block->x64_size);
-    // fill sons if any
+    // Check if something changed, to abbort if it as
+    if(block->hash != hash || !isprotectedDB(addr, end-addr)) {
+        dynarec_log(LOG_INFO, "Warning, a block changed while beeing processed hash(%p:%ld)=%x/%x\n", block->x64_addr, block->x64_size, block->hash, hash);
+        free(helper.sons_x64);
+        free(helper.sons_arm);
+        FreeDynarecMap(block, (uintptr_t)p, sz);
+        return NULL;
+    }    // fill sons if any
     dynablock_t** sons = NULL;
     int sons_size = 0;
     if(helper.sons_size) {
@@ -458,10 +484,12 @@ void* FillBlock64(dynablock_t* block, uintptr_t addr) {
                 son->x64_size = end-helper.sons_x64[i];
                 if(!son->x64_size) {printf_log(LOG_NONE, "Warning, son with null x64 size! (@%p / ARM=%p)", son->x64_addr, son->block);}
                 son->father = block;
-                son->done = 1;
-                sons[sons_size++] = son;
+                son->size = sz + son->block - block->block; // update size count, for debugging
+                //son->done = 1;
                 if(!son->parent)
                     son->parent = block->parent;
+                sons[sons_size] = son;
+                ++sons_size;
             }
         }
         if(sons_size) {
@@ -472,6 +500,6 @@ void* FillBlock64(dynablock_t* block, uintptr_t addr) {
     }
     free(helper.sons_x64);
     free(helper.sons_arm);
-    block->done = 1;
+    //block->done = 1;
     return (void*)block;
-}
+}

src/dynarec/dynarec_arm64_64.c

@@ -22,17 +22,30 @@
 #include "dynarec_arm64_helper.h"
 #include "dynarec_arm64_functions.h"
 
+#define GETG        gd = ((nextop&0x38)>>3)+(rex.r<<3)
 
-uintptr_t dynarec64_64(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int* ok, int* need_epilog)
+uintptr_t dynarec64_64(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int seg, int* ok, int* need_epilog)
 {
+    (void)ip; (void)rep; (void)need_epilog;
+
     uint8_t opcode = F8;
     uint8_t nextop;
-    int32_t j32;
-    uint8_t gd, ed;
-    uint8_t wback;
-    int64_t i64;
-    int fixedaddress;
-    MAYUSE(j32);
+    uint8_t u8;
+    uint8_t gd, ed, eb1, eb2;
+    uint8_t wback, wb1, wb2, wb;
+    int64_t i64, j64;
+    int v0;
+    int q0;
+    int d0;
+    int64_t fixedaddress;
+    MAYUSE(eb1);
+    MAYUSE(eb2);
+    MAYUSE(wb1);
+    MAYUSE(wb2);
+    MAYUSE(j64);
+    MAYUSE(d0);
+    MAYUSE(q0);
+    MAYUSE(v0);
 
     while((opcode==0xF2) || (opcode==0xF3)) {
         rep = opcode-0xF1;
@@ -47,24 +60,245 @@ uintptr_t dynarec64_64(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
 
     switch(opcode) {
 
+        case 0x03:
+            INST_NAME("ADD Gd, Seg:Ed");
+            SETFLAGS(X_ALL, SF_SET_PENDING);
+            grab_segdata(dyn, addr, ninst, x4, seg);
+            nextop = F8;
+            GETGD;
+            GETEDO(x4, 0);
+            emit_add32(dyn, ninst, rex, gd, ed, x3, x4);
+            break;
+
+        case 0x0F:
+            opcode = F8;
+            switch(opcode) {
+
+                case 0x10:
+                    switch(rep) {
+                        case 1:
+                            INST_NAME("MOVSD Gx, Ex");
+                            nextop = F8;
+                            GETG;
+                            if(MODREG) {
+                                ed = (nextop&7)+ (rex.b<<3);
+                                v0 = sse_get_reg(dyn, ninst, x1, gd);
+                                d0 = sse_get_reg(dyn, ninst, x1, ed);
+                                VMOVeD(v0, 0, d0, 0);
+                            } else {
+                                grab_segdata(dyn, addr, ninst, x4, seg);
+                                v0 = sse_get_reg_empty(dyn, ninst, x1, gd);
+                                addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0xfff<<3, 7, rex, 0, 0);
+                                ADDx_REG(x4, x4, ed);
+                                VLDR64_U12(v0, x4, fixedaddress); // upper part reseted
+                            }
+                            break;
+                        case 2:
+                            INST_NAME("MOVSS Gx, Ex");
+                            nextop = F8;
+                            GETG;
+                            if(MODREG) {
+                                v0 = sse_get_reg(dyn, ninst, x1, gd);
+                                q0 = sse_get_reg(dyn, ninst, x1, (nextop&7) + (rex.b<<3));
+                                VMOVeS(v0, 0, q0, 0);
+                            } else {
+                                grab_segdata(dyn, addr, ninst, x4, seg);
+                                v0 = sse_get_reg_empty(dyn, ninst, x1, gd);
+                                addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0xfff<<2, 3, rex, 0, 0);
+                                ADDx_REG(x4, x4, ed);
+                                VLDR32_U12(v0, x4, fixedaddress);
+                            }
+                            break;
+                        default:
+                            DEFAULT;
+                    }
+                    break;
+                case 0x11:
+                    switch(rep) {
+                        case 1:
+                            INST_NAME("MOVSD Ex, Gx");
+                            nextop = F8;
+                            GETG;
+                            v0 = sse_get_reg(dyn, ninst, x1, gd);
+                            if(MODREG) {
+                                ed = (nextop&7)+ (rex.b<<3);
+                                d0 = sse_get_reg(dyn, ninst, x1, ed);
+                                VMOVeD(d0, 0, v0, 0);
+                            } else {
+                                grab_segdata(dyn, addr, ninst, x4, seg);
+                                addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0xfff<<3, 7, rex, 0, 0);
+                                ADDx_REG(x4, x4, ed);
+                                VSTR64_U12(v0, x4, fixedaddress);
+                            }
+                            break;
+                        case 2:
+                            INST_NAME("MOVSS Ex, Gx");
+                            nextop = F8;
+                            GETG;
+                            v0 = sse_get_reg(dyn, ninst, x1, gd);
+                            if(MODREG) {
+                                q0 = sse_get_reg(dyn, ninst, x1, (nextop&7) + (rex.b<<3));
+                                VMOVeS(q0, 0, v0, 0);
+                            } else {
+                                grab_segdata(dyn, addr, ninst, x4, seg);
+                                addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0xfff<<2, 3, rex, 0, 0);
+                                ADDx_REG(x4, x4, ed);
+                                VSTR32_U12(v0, x4, fixedaddress);
+                            }
+                            break;
+                        default:
+                            DEFAULT;
+                    }
+                    break;
+
+                case 0xAF:
+                    INST_NAME("IMUL Gd, Ed");
+                    SETFLAGS(X_ALL, SF_PENDING);
+                    nextop = F8;
+                    grab_segdata(dyn, addr, ninst, x4, seg);
+                    GETGD;
+                    GETEDO(x4, 0);
+                    if(rex.w) {
+                        // 64bits imul
+                        UFLAG_IF {
+                            SMULH(x3, gd, ed);
+                            MULx(gd, gd, ed);
+                            UFLAG_OP1(x3);
+                            UFLAG_RES(gd);
+                            UFLAG_DF(x3, d_imul64);
+                        } else {
+                            MULxw(gd, gd, ed);
+                        }
+                    } else {
+                        // 32bits imul
+                        UFLAG_IF {
+                            SMULL(gd, gd, ed);
+                            UFLAG_RES(gd);
+                            LSRx(x3, gd, 32);
+                            UFLAG_OP1(x3);
+                            UFLAG_DF(x3, d_imul32);
+                            MOVw_REG(gd, gd);
+                        } else {
+                            MULxw(gd, gd, ed);
+                        }
+                    }
+                    break;
+
+                default:
+                    DEFAULT;
+            }
+            break;
+
         case 0x33:
-            INST_NAME("XOR Gd, FS:Ed");
-            SETFLAGS(X_ALL, SF_SET);
-            grab_segdata(dyn, addr, ninst, x4, _FS);
+            INST_NAME("XOR Gd, Seg:Ed");
+            SETFLAGS(X_ALL, SF_SET_PENDING);
+            grab_segdata(dyn, addr, ninst, x4, seg);
             nextop = F8;
             GETGD;
             GETEDO(x4, 0);
             emit_xor32(dyn, ninst, rex, gd, ed, x3, x4);
             break;
                     
+        case 0x39:
+            INST_NAME("CMP Seg:Ed, Gd");
+            SETFLAGS(X_ALL, SF_SET_PENDING);
+            grab_segdata(dyn, addr, ninst, x4, seg);
+            nextop = F8;
+            GETGD;
+            GETEDO(x4, 0);
+            emit_cmp32(dyn, ninst, rex, ed, gd, x3, x4, x5);
+            break;
+
+        case 0x66:
+            addr = dynarec64_6664(dyn, addr, ip, ninst, rex, rep, ok, need_epilog);
+            break;
+
+        case 0x80:
+            nextop = F8;
+            grab_segdata(dyn, addr, ninst, x1, seg);
+            switch((nextop>>3)&7) {
+                case 0: //ADD
+                    INST_NAME("ADD Eb, Ib");
+                    SETFLAGS(X_ALL, SF_SET_PENDING);
+                    GETEBO(x1, 1);
+                    u8 = F8;
+                    emit_add8c(dyn, ninst, x1, u8, x2, x4);
+                    EBBACK;
+                    break;
+                case 1: //OR
+                    INST_NAME("OR Eb, Ib");
+                    SETFLAGS(X_ALL, SF_SET_PENDING);
+                    GETEBO(x1, 1);
+                    u8 = F8;
+                    emit_or8c(dyn, ninst, x1, u8, x2, x4);
+                    EBBACK;
+                    break;
+                case 2: //ADC
+                    INST_NAME("ADC Eb, Ib");
+                    READFLAGS(X_CF);
+                    SETFLAGS(X_ALL, SF_SET_PENDING);
+                    GETEBO(x1, 1);
+                    u8 = F8;
+                    emit_adc8c(dyn, ninst, x1, u8, x2, x4, x5);
+                    EBBACK;
+                    break;
+                case 3: //SBB
+                    INST_NAME("SBB Eb, Ib");
+                    READFLAGS(X_CF);
+                    SETFLAGS(X_ALL, SF_SET_PENDING);
+                    GETEBO(x1, 1);
+                    u8 = F8;
+                    emit_sbb8c(dyn, ninst, x1, u8, x2, x4, x5);
+                    EBBACK;
+                    break;
+                case 4: //AND
+                    INST_NAME("AND Eb, Ib");
+                    SETFLAGS(X_ALL, SF_SET_PENDING);
+                    GETEBO(x1, 1);
+                    u8 = F8;
+                    emit_and8c(dyn, ninst, x1, u8, x2, x4);
+                    EBBACK;
+                    break;
+                case 5: //SUB
+                    INST_NAME("SUB Eb, Ib");
+                    SETFLAGS(X_ALL, SF_SET_PENDING);
+                    GETEBO(x1, 1);
+                    u8 = F8;
+                    emit_sub8c(dyn, ninst, x1, u8, x2, x4, x5);
+                    EBBACK;
+                    break;
+                case 6: //XOR
+                    INST_NAME("XOR Eb, Ib");
+                    SETFLAGS(X_ALL, SF_SET_PENDING);
+                    GETEBO(x1, 1);
+                    u8 = F8;
+                    emit_xor8c(dyn, ninst, x1, u8, x2, x4);
+                    EBBACK;
+                    break;
+                case 7: //CMP
+                    INST_NAME("CMP Eb, Ib");
+                    SETFLAGS(X_ALL, SF_SET_PENDING);
+                    GETEBO(x1, 1);
+                    u8 = F8;
+                    if(u8) {
+                        MOV32w(x2, u8);
+                        emit_cmp8(dyn, ninst, x1, x2, x3, x4, x5);
+                    } else {
+                        emit_cmp8_0(dyn, ninst, x1, x3, x4);
+                    }
+                    break;
+                default:
+                    DEFAULT;
+            }
+            break;
         case 0x81:
         case 0x83:
             nextop = F8;
-            grab_segdata(dyn, addr, ninst, x6, _FS);
+            grab_segdata(dyn, addr, ninst, x6, seg);
             switch((nextop>>3)&7) {
                 case 0: //ADD
                     if(opcode==0x81) {INST_NAME("ADD Ed, Id");} else {INST_NAME("ADD Ed, Ib");}
-                    SETFLAGS(X_ALL, SF_SET);
+                    SETFLAGS(X_ALL, SF_SET_PENDING);
                     GETEDO(x6, (opcode==0x81)?4:1);
                     if(opcode==0x81) i64 = F32S; else i64 = F8S;
                     emit_add32c(dyn, ninst, rex, ed, i64, x3, x4, x5);
@@ -72,7 +306,7 @@ uintptr_t dynarec64_64(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     break;
                 case 1: //OR
                     if(opcode==0x81) {INST_NAME("OR Ed, Id");} else {INST_NAME("OR Ed, Ib");}
-                    SETFLAGS(X_ALL, SF_SET);
+                    SETFLAGS(X_ALL, SF_SET_PENDING);
                     GETEDO(x6, (opcode==0x81)?4:1);
                     if(opcode==0x81) i64 = F32S; else i64 = F8S;
                     emit_or32c(dyn, ninst, rex, ed, i64, x3, x4);
@@ -81,7 +315,7 @@ uintptr_t dynarec64_64(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                 case 2: //ADC
                     if(opcode==0x81) {INST_NAME("ADC Ed, Id");} else {INST_NAME("ADC Ed, Ib");}
                     READFLAGS(X_CF);
-                    SETFLAGS(X_ALL, SF_SET);
+                    SETFLAGS(X_ALL, SF_SET_PENDING);
                     GETEDO(x6, (opcode==0x81)?4:1);
                     if(opcode==0x81) i64 = F32S; else i64 = F8S;
                     MOV64xw(x5, i64);
@@ -91,7 +325,7 @@ uintptr_t dynarec64_64(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                 case 3: //SBB
                     if(opcode==0x81) {INST_NAME("SBB Ed, Id");} else {INST_NAME("SBB Ed, Ib");}
                     READFLAGS(X_CF);
-                    SETFLAGS(X_ALL, SF_SET);
+                    SETFLAGS(X_ALL, SF_SET_PENDING);
                     GETEDO(x6, (opcode==0x81)?4:1);
                     if(opcode==0x81) i64 = F32S; else i64 = F8S;
                     MOV64xw(x5, i64);
@@ -100,7 +334,7 @@ uintptr_t dynarec64_64(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     break;
                 case 4: //AND
                     if(opcode==0x81) {INST_NAME("AND Ed, Id");} else {INST_NAME("AND Ed, Ib");}
-                    SETFLAGS(X_ALL, SF_SET);
+                    SETFLAGS(X_ALL, SF_SET_PENDING);
                     GETEDO(x6, (opcode==0x81)?4:1);
                     if(opcode==0x81) i64 = F32S; else i64 = F8S;
                     emit_and32c(dyn, ninst, rex, ed, i64, x3, x4);
@@ -108,7 +342,7 @@ uintptr_t dynarec64_64(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     break;
                 case 5: //SUB
                     if(opcode==0x81) {INST_NAME("SUB Ed, Id");} else {INST_NAME("SUB Ed, Ib");}
-                    SETFLAGS(X_ALL, SF_SET);
+                    SETFLAGS(X_ALL, SF_SET_PENDING);
                     GETEDO(x6, (opcode==0x81)?4:1);
                     if(opcode==0x81) i64 = F32S; else i64 = F8S;
                     emit_sub32c(dyn, ninst, rex, ed, i64, x3, x4, x5);
@@ -116,7 +350,7 @@ uintptr_t dynarec64_64(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     break;
                 case 6: //XOR
                     if(opcode==0x81) {INST_NAME("XOR Ed, Id");} else {INST_NAME("XOR Ed, Ib");}
-                    SETFLAGS(X_ALL, SF_SET);
+                    SETFLAGS(X_ALL, SF_SET_PENDING);
                     GETEDO(x6, (opcode==0x81)?4:1);
                     if(opcode==0x81) i64 = F32S; else i64 = F8S;
                     emit_xor32c(dyn, ninst, rex, ed, i64, x3, x4);
@@ -124,7 +358,7 @@ uintptr_t dynarec64_64(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     break;
                 case 7: //CMP
                     if(opcode==0x81) {INST_NAME("CMP Ed, Id");} else {INST_NAME("CMP Ed, Ib");}
-                    SETFLAGS(X_ALL, SF_SET);
+                    SETFLAGS(X_ALL, SF_SET_PENDING);
                     GETEDO(x6, (opcode==0x81)?4:1);
                     if(opcode==0x81) i64 = F32S; else i64 = F8S;
                     if(i64) {
@@ -137,8 +371,8 @@ uintptr_t dynarec64_64(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             break;
             
         case 0x89:
-            INST_NAME("MOV FS:Ed, Gd");
-            grab_segdata(dyn, addr, ninst, x4, _FS);
+            INST_NAME("MOV Seg:Ed, Gd");
+            grab_segdata(dyn, addr, ninst, x4, seg);
             nextop=F8;
             GETGD;
             if(MODREG) {   // reg <= reg
@@ -150,8 +384,8 @@ uintptr_t dynarec64_64(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             break;
 
         case 0x8B:
-            INST_NAME("MOV Gd, FS:Ed");
-            grab_segdata(dyn, addr, ninst, x4, _FS);
+            INST_NAME("MOV Gd, Seg:Ed");
+            grab_segdata(dyn, addr, ninst, x4, seg);
             nextop=F8;
             GETGD;
             if(MODREG) {   // reg <= reg
@@ -162,9 +396,32 @@ uintptr_t dynarec64_64(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             }
             break;
 
+        case 0xC6:
+            INST_NAME("MOV Seg:Eb, Ib");
+            grab_segdata(dyn, addr, ninst, x4, seg);
+            nextop=F8;
+            if(MODREG) {   // reg <= u8
+                u8 = F8;
+                if(!rex.rex) {
+                    ed = (nextop&7);
+                    eb1 = xRAX+(ed&3);  // Ax, Cx, Dx or Bx
+                    eb2 = (ed&4)>>2;    // L or H
+                } else {
+                    eb1 = xRAX+(nextop&7)+(rex.b<<3);
+                    eb2 = 0;            
+                }
+                MOV32w(x3, u8);
+                BFIx(eb1, x3, eb2*8, 8);
+            } else {                    // mem <= u8
+                addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0, 0, rex, 0, 1);
+                u8 = F8;
+                MOV32w(x3, u8);
+                STRB_REG(x3, ed, x4);
+            }
+            break;
         case 0xC7:
-            INST_NAME("MOV FS:Ed, Id");
-            grab_segdata(dyn, addr, ninst, x4, _FS);
+            INST_NAME("MOV Seg:Ed, Id");
+            grab_segdata(dyn, addr, ninst, x4, seg);
             nextop=F8;
             if(MODREG) {   // reg <= i32
                 i64 = F32S;
@@ -178,9 +435,412 @@ uintptr_t dynarec64_64(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             }
             break;
 
+        case 0xD1:
+            nextop = F8;
+            grab_segdata(dyn, addr, ninst, x6, seg);
+            switch((nextop>>3)&7) {
+                case 0:
+                    INST_NAME("ROL Ed, 1");
+                    SETFLAGS(X_OF|X_CF, SF_SUBSET);
+                    GETEDO(x6, 0);
+                    emit_rol32c(dyn, ninst, rex, ed, 1, x3, x4);
+                    WBACKO(x6);
+                    break;
+                case 1:
+                    INST_NAME("ROR Ed, 1");
+                    SETFLAGS(X_OF|X_CF, SF_SUBSET);
+                    GETEDO(x6, 0);
+                    emit_ror32c(dyn, ninst, rex, ed, 1, x3, x4);
+                    WBACKO(x6);
+                    break;
+                case 2:
+                    INST_NAME("RCL Ed, 1");
+                    MESSAGE(LOG_DUMP, "Need Optimization\n");
+                    READFLAGS(X_CF);
+                    SETFLAGS(X_OF|X_CF, SF_SET);
+                    MOV32w(x2, 1);
+                    GETEDO(x6, 0);
+                    if(wback) {ADDx_REG(x6, x6, wback); wback=x6;}
+                    if(ed!=x1) {MOVxw_REG(x1, ed);}
+                    CALL_(rcl32, ed, x6);
+                    WBACK;
+                    break;
+                case 3:
+                    INST_NAME("RCR Ed, 1");
+                    MESSAGE(LOG_DUMP, "Need Optimization\n");
+                    READFLAGS(X_CF);
+                    SETFLAGS(X_OF|X_CF, SF_SET);
+                    MOV32w(x2, 1);
+                    GETEDO(x6, 0);
+                    if(wback) {ADDx_REG(x6, x6, wback); wback=x6;}
+                    if(ed!=x1) {MOVxw_REG(x1, ed);}
+                    CALL_(rcr32, ed, x6);
+                    WBACK;
+                    break;
+                case 4:
+                case 6:
+                    INST_NAME("SHL Ed, 1");
+                    SETFLAGS(X_ALL, SF_SET_PENDING);    // some flags are left undefined
+                    GETEDO(x6, 0);
+                    emit_shl32c(dyn, ninst, rex, ed, 1, x3, x4);
+                    WBACKO(x6);
+                    break;
+                case 5:
+                    INST_NAME("SHR Ed, 1");
+                    SETFLAGS(X_ALL, SF_SET_PENDING);    // some flags are left undefined
+                    GETEDO(x6, 0);
+                    emit_shr32c(dyn, ninst, rex, ed, 1, x3, x4);
+                    WBACKO(x6);
+                    break;
+                case 7:
+                    INST_NAME("SAR Ed, 1");
+                    SETFLAGS(X_ALL, SF_SET_PENDING);    // some flags are left undefined
+                    GETEDO(x6, 0);
+                    emit_sar32c(dyn, ninst, rex, ed, 1, x3, x4);
+                    WBACKO(x6);
+                    break;
+            }
+            break;
+        case 0xD3:
+            nextop = F8;
+            grab_segdata(dyn, addr, ninst, x6, seg);
+            switch((nextop>>3)&7) {
+                case 0:
+                    INST_NAME("ROL Ed, CL");
+                    SETFLAGS(X_OF|X_CF, SF_SUBSET);
+                    if(rex.w) {
+                        ANDSx_mask(x3, xRCX, 1, 0, 0b00101);  //mask=0x000000000000003f
+                    } else {
+                        ANDSw_mask(x3, xRCX, 0, 0b00100);  //mask=0x00000001f
+                    }
+                    MOV64xw(x4, (rex.w?64:32));
+                    SUBx_REG(x3, x4, x3);
+                    GETEDO(x6, 0);
+                    if(!rex.w && MODREG) {MOVw_REG(ed, ed);}
+                    B_NEXT(cEQ);
+                    RORxw_REG(ed, ed, x3);
+                    WBACKO(x6);
+                    UFLAG_IF {  // calculate flags directly
+                        CMPSw_U12(x3, rex.w?63:31);
+                        B_MARK(cNE);
+                            LSRxw(x4, ed, rex.w?63:31);
+                            ADDxw_REG(x4, x4, ed);
+                            BFIw(xFlags, x4, F_OF, 1);
+                        MARK;
+                        BFIw(xFlags, ed, F_CF, 1);
+                        UFLAG_DF(x2, d_none);
+                    }
+                    break;
+                case 1:
+                    INST_NAME("ROR Ed, CL");
+                    SETFLAGS(X_OF|X_CF, SF_SUBSET);
+                    if(rex.w) {
+                        ANDSx_mask(x3, xRCX, 1, 0, 0b00101);  //mask=0x000000000000003f
+                    } else {
+                        ANDSw_mask(x3, xRCX, 0, 0b00100);  //mask=0x00000001f
+                    }
+                    GETEDO(x6, 0);
+                    if(!rex.w && MODREG) {MOVw_REG(ed, ed);}
+                    B_NEXT(cEQ);
+                    RORxw_REG(ed, ed, x3);
+                    WBACKO(x6);
+                    UFLAG_IF {  // calculate flags directly
+                        CMPSw_U12(x3, 1);
+                        B_MARK(cNE);
+                            LSRxw(x2, ed, rex.w?62:30); // x2 = d>>30
+                            EORw_REG_LSR(x2, x2, x2, 1); // x2 = ((d>>30) ^ ((d>>30)>>1))
+                            BFIw(xFlags, x2, F_OF, 1);
+                        MARK;
+                        LSRxw(x2, ed, rex.w?63:31);
+                        BFIw(xFlags, x2, F_CF, 1);
+                        UFLAG_DF(x2, d_none);
+                    }
+                    break;
+                case 2:
+                    INST_NAME("RCL Ed, CL");
+                    MESSAGE(LOG_DUMP, "Need Optimization\n");
+                    READFLAGS(X_CF);
+                    SETFLAGS(X_OF|X_CF, SF_SET);
+                    if(rex.w) {
+                        ANDSx_mask(x2, xRCX, 1, 0, 0b00101);  //mask=0x000000000000003f
+                    } else {
+                        ANDSw_mask(x2, xRCX, 0, 0b00100);  //mask=0x00000001f
+                    }
+                    GETEDO(x6, 0);
+                    if(wback) {ADDx_REG(x6, x6, wback); wback=x6;}
+                    if(!rex.w && MODREG) {MOVw_REG(ed, ed);}
+                    B_NEXT(cEQ);
+                    CALL_(rex.w?((void*)rcl64):((void*)rcl32), ed, x6);
+                    WBACK;
+                    break;
+                case 3:
+                    INST_NAME("RCR Ed, CL");
+                    MESSAGE(LOG_DUMP, "Need Optimization\n");
+                    READFLAGS(X_CF);
+                    SETFLAGS(X_OF|X_CF, SF_SET);
+                    if(rex.w) {
+                        ANDSx_mask(x2, xRCX, 1, 0, 0b00101);  //mask=0x000000000000003f
+                    } else {
+                        ANDSw_mask(x2, xRCX, 0, 0b00100);  //mask=0x00000001f
+                    }
+                    GETEDO(x6, 0);
+                    if(wback) {ADDx_REG(x6, x6, wback); wback=x6;}
+                    if(!rex.w && MODREG) {MOVw_REG(ed, ed);}
+                    B_NEXT(cEQ);
+                    CALL_(rex.w?((void*)rcr64):((void*)rcr32), ed, x6);
+                    WBACK;
+                    break;
+                case 4:
+                case 6:
+                    INST_NAME("SHL Ed, CL");
+                    SETFLAGS(X_ALL, SF_SET_PENDING);    // some flags are left undefined
+                    if(rex.w) {
+                        ANDSx_mask(x3, xRCX, 1, 0, 0b00101);  //mask=0x000000000000003f
+                    } else {
+                        ANDSw_mask(x3, xRCX, 0, 0b00100);  //mask=0x00000001f
+                    }
+                    GETEDO(x6, 0);
+                    if(!rex.w && MODREG) {MOVw_REG(ed, ed);}
+                    B_NEXT(cEQ);
+                    emit_shl32(dyn, ninst, rex, ed, x3, x5, x4);
+                    WBACKO(x6);
+                    break;
+                case 5:
+                    INST_NAME("SHR Ed, CL");
+                    SETFLAGS(X_ALL, SF_SET_PENDING);    // some flags are left undefined
+                    if(rex.w) {
+                        ANDSx_mask(x3, xRCX, 1, 0, 0b00101);  //mask=0x000000000000003f
+                    } else {
+                        ANDSw_mask(x3, xRCX, 0, 0b00100);  //mask=0x00000001f
+                    }
+                    GETEDO(x6, 0);
+                    if(!rex.w && MODREG) {MOVw_REG(ed, ed);}
+                    B_NEXT(cEQ);
+                    emit_shr32(dyn, ninst, rex, ed, x3, x5, x4);
+                    WBACKO(x6);
+                    break;
+                case 7:
+                    INST_NAME("SAR Ed, CL");
+                    SETFLAGS(X_ALL, SF_PENDING);
+                    if(rex.w) {
+                        ANDSx_mask(x3, xRCX, 1, 0, 0b00101);  //mask=0x000000000000003f
+                    } else {
+                        ANDSw_mask(x3, xRCX, 0, 0b00100);  //mask=0x00000001f
+                    }
+                    GETEDO(x6, 0);
+                    if(!rex.w && MODREG) {MOVw_REG(ed, ed);}
+                    B_NEXT(cEQ);
+                    UFLAG_OP12(ed, x3);
+                    ASRxw_REG(ed, ed, x3);
+                    WBACKO(x6);
+                    UFLAG_RES(ed);
+                    UFLAG_DF(x3, rex.w?d_sar64:d_sar32);
+                    break;
+            }
+            break;
+            
+        case 0xF7:
+            nextop = F8;
+            switch((nextop>>3)&7) {
+                case 0:
+                case 1:
+                    INST_NAME("TEST Ed, Id");
+                    SETFLAGS(X_ALL, SF_SET_PENDING);
+                    GETEDO(x6, 4);
+                    i64 = F32S;
+                    MOV64xw(x2, i64);
+                    emit_test32(dyn, ninst, rex, ed, x2, x3, x4);
+                    break;
+                case 2:
+                    INST_NAME("NOT Ed");
+                    GETEDO(x6, 4);
+                    MVNxw_REG(ed, ed);
+                    WBACKO(x6);
+                    break;
+                case 3:
+                    INST_NAME("NEG Ed");
+                    SETFLAGS(X_ALL, SF_SET_PENDING);
+                    GETEDO(x6, 0);
+                    emit_neg32(dyn, ninst, rex, ed, x3, x4);
+                    WBACKO(x6);
+                    break;
+                case 4:
+                    INST_NAME("MUL EAX, Ed");
+                    SETFLAGS(X_ALL, SF_PENDING);
+                    UFLAG_DF(x2, rex.w?d_mul64:d_mul32);
+                    GETEDO(x6, 0);
+                    if(rex.w) {
+                        if(ed==xRDX) gd=x3; else gd=xRDX;
+                        UMULH(gd, xRAX, ed);
+                        MULx(xRAX, xRAX, ed);
+                        if(gd!=xRDX) {MOVx_REG(xRDX, gd);}
+                    } else {
+                        UMULL(xRDX, xRAX, ed);  //64 <- 32x32
+                        MOVw_REG(xRAX, xRDX);
+                        LSRx(xRDX, xRDX, 32);
+                    }
+                    UFLAG_RES(xRAX);
+                    UFLAG_OP1(xRDX);
+                    break;
+                case 5:
+                    INST_NAME("IMUL EAX, Ed");
+                    SETFLAGS(X_ALL, SF_PENDING);
+                    UFLAG_DF(x2, rex.w?d_imul64:d_imul32);
+                    GETEDO(x6, 0);
+                    if(rex.w) {
+                        if(ed==xRDX) gd=x3; else gd=xRDX;
+                        SMULH(gd, xRAX, ed);
+                        MULx(xRAX, xRAX, ed);
+                        if(gd!=xRDX) {MOVx_REG(xRDX, gd);}
+                    } else {
+                        SMULL(xRDX, xRAX, ed);  //64 <- 32x32
+                        MOVw_REG(xRAX, xRDX);
+                        LSRx(xRDX, xRDX, 32);
+                    }
+                    UFLAG_RES(xRAX);
+                    UFLAG_OP1(xRDX);
+                    break;
+                case 6:
+                    INST_NAME("DIV Ed");
+                    SETFLAGS(X_ALL, SF_SET);
+                    if(!rex.w) {
+                        SET_DFNONE(x2);
+                        GETEDO(x6, 0);
+                        MOVw_REG(x3, xRAX);
+                        ORRx_REG_LSL(x3, x3, xRDX, 32);
+                        if(MODREG) {
+                            MOVw_REG(x4, ed);
+                            ed = x4;
+                        }
+                        UDIVx(x2, x3, ed);
+                        MSUBx(x4, x2, ed, xRAX);
+                        MOVw_REG(xRAX, x2);
+                        MOVw_REG(xRDX, x4);
+                    } else {
+                        if(ninst && dyn->insts 
+                           && dyn->insts[ninst-1].x64.addr 
+                           && *(uint8_t*)(dyn->insts[ninst-1].x64.addr)==0x31 
+                           && *(uint8_t*)(dyn->insts[ninst-1].x64.addr+1)==0xD2) {
+                            SET_DFNONE(x2);
+                            GETEDO(x6, 0);
+                            UDIVx(x2, xRAX, ed);
+                            MSUBx(xRDX, x2, ed, xRAX);
+                            MOVx_REG(xRAX, x2);
+                        } else {
+                            GETEDO(x6, 0);
+                            CBZxw_MARK(xRDX);
+                            if(ed!=x1) {MOVx_REG(x1, ed);}
+                            CALL(div64, -1);
+                            B_NEXT_nocond;
+                            MARK;
+                            UDIVx(x2, xRAX, ed);
+                            MSUBx(xRDX, x2, ed, xRAX);
+                            MOVx_REG(xRAX, x2);
+                            SET_DFNONE(x2);
+                        }
+                    }
+                    break;
+                case 7:
+                    INST_NAME("IDIV Ed");
+                    SETFLAGS(X_ALL, SF_SET);
+                    if(!rex.w) {
+                        SET_DFNONE(x2)
+                        GETSEDOw(x6, 0);
+                        MOVw_REG(x3, xRAX);
+                        ORRx_REG_LSL(x3, x3, xRDX, 32);
+                        SDIVx(x2, x3, wb);
+                        MSUBx(x4, x2, wb, x3);
+                        MOVw_REG(xRAX, x2);
+                        MOVw_REG(xRDX, x4);
+                    } else {
+                        if(ninst && dyn->insts
+                           &&  dyn->insts[ninst-1].x64.addr 
+                           && *(uint8_t*)(dyn->insts[ninst-1].x64.addr)==0x48
+                           && *(uint8_t*)(dyn->insts[ninst-1].x64.addr+1)==0x99) {
+                            SET_DFNONE(x2)
+                            GETEDO(x6, 0);
+                            SDIVx(x2, xRAX, ed);
+                            MSUBx(xRDX, x2, ed, xRAX);
+                            MOVx_REG(xRAX, x2);
+                        } else {
+                            GETEDO(x6, 0);
+                            CBZxw_MARK(xRDX);
+                            MVNx_REG(x2, xRDX);
+                            CBZxw_MARK(x2);
+                            if(ed!=x1) {MOVx_REG(x1, ed);}
+                            CALL((void*)idiv64, -1);
+                            B_NEXT_nocond;
+                            MARK;
+                            SDIVx(x2, xRAX, ed);
+                            MSUBx(xRDX, x2, ed, xRAX);
+                            MOVx_REG(xRAX, x2);
+                            SET_DFNONE(x2)
+                        }
+                    }
+                    break;
+            }
+            break;
+            
+        case 0xFF:
+            nextop = F8;
+            grab_segdata(dyn, addr, ninst, x6, seg);
+            switch((nextop>>3)&7) {
+                case 0: // INC Ed
+                    INST_NAME("INC Ed");
+                    SETFLAGS(X_ALL&~X_CF, SF_SUBSET);
+                    GETEDO(x6, 0);
+                    emit_inc32(dyn, ninst, rex, ed, x3, x4);
+                    WBACKO(x6);
+                    break;
+                case 1: //DEC Ed
+                    INST_NAME("DEC Ed");
+                    SETFLAGS(X_ALL&~X_CF, SF_SUBSET);
+                    GETEDO(x6, 0);
+                    emit_dec32(dyn, ninst, rex, ed, x3, x4);
+                    WBACKO(x6);
+                    break;
+                case 2: // CALL Ed
+                    INST_NAME("CALL Ed");
+                    PASS2IF(dyn->insts && 
+                           ((ninst && dyn->insts[ninst-1].x64.set_flags)
+                        || ((ninst>1) && dyn->insts[ninst-2].x64.set_flags)), 1)
+                    {
+                        READFLAGS(X_PEND);          // that's suspicious
+                    } else {
+                        SETFLAGS(X_ALL, SF_SET);    //Hack to put flag in "don't care" state
+                    }
+                    GETEDOx(x6, 0);
+                    BARRIER(1);
+                    BARRIER_NEXT(1);
+                    if(!dyn->insts || ninst==dyn->size-1) {
+                        *need_epilog = 0;
+                        *ok = 0;
+                    }
+                    GETIP(addr);
+                    PUSH1(xRIP);
+                    jump_to_next(dyn, 0, ed, ninst);
+                    break;
+                case 4: // JMP Ed
+                    INST_NAME("JMP Ed");
+                    BARRIER(1);
+                    GETEDOx(x6, 0);
+                    jump_to_next(dyn, 0, ed, ninst);
+                    *need_epilog = 0;
+                    *ok = 0;
+                    break;
+                case 6: // Push Ed
+                    INST_NAME("PUSH Ed");
+                    GETEDOx(x6, 0);
+                    PUSH1(ed);
+                    break;
+
+                default:
+                    DEFAULT;
+            }
+            break;
+
         default:
             DEFAULT;
     }
     return addr;
 }
-

src/dynarec/dynarec_arm64_66.c

@@ -27,15 +27,18 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
 {
     uint8_t opcode = F8;
     uint8_t nextop, u8;
-    int32_t i32, j32;
     int16_t i16;
     uint16_t u16;
+    uint64_t u64;
+    int32_t i32;
+    int64_t j64;
     uint8_t gd, ed;
     uint8_t wback, wb1;
-    int fixedaddress;
-    MAYUSE(u16);
+    int64_t fixedaddress;
     MAYUSE(u8);
-    MAYUSE(j32);
+    MAYUSE(u16);
+    MAYUSE(u64);
+    MAYUSE(j64);
 
     while((opcode==0x2E) || (opcode==0x66))   // ignoring CS: or multiple 0x66
         opcode = F8;
@@ -51,10 +54,13 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
         opcode = F8;
     }
 
+    if(rex.w && opcode!=0x0f)   // rex.w cancels "66", but not for 66 0f type of prefix
+        return dynarec64_00(dyn, addr-1, ip, ninst, rex, rep, ok, need_epilog); // addr-1, to "put back" opcode
+
     switch(opcode) {
         case 0x01:
             INST_NAME("ADD Ew, Gw");
-            SETFLAGS(X_ALL, SF_SET);
+            SETFLAGS(X_ALL, SF_SET_PENDING);
             nextop = F8;
             GETGW(x2);
             GETEW(x1, 0);
@@ -63,7 +69,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             break;
         case 0x03:
             INST_NAME("ADD Gw, Ew");
-            SETFLAGS(X_ALL, SF_SET);
+            SETFLAGS(X_ALL, SF_SET_PENDING);
             nextop = F8;
             GETGW(x1);
             GETEW(x2, 0);
@@ -72,7 +78,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             break;
         case 0x05:
             INST_NAME("ADD AX, Iw");
-            SETFLAGS(X_ALL, SF_PENDING);
+            SETFLAGS(X_ALL, SF_SET_PENDING);
             i32 = F16;
             UXTHw(x1, xRAX);
             MOV32w(x2, i32);
@@ -82,7 +88,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                 
         case 0x09:
             INST_NAME("OR Ew, Gw");
-            SETFLAGS(X_ALL, SF_SET);
+            SETFLAGS(X_ALL, SF_SET_PENDING);
             nextop = F8;
             GETGW(x2);
             GETEW(x1, 0);
@@ -91,7 +97,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             break;
         case 0x0B:
             INST_NAME("OR Gw, Ew");
-            SETFLAGS(X_ALL, SF_SET);
+            SETFLAGS(X_ALL, SF_SET_PENDING);
             nextop = F8;
             GETGW(x1);
             GETEW(x2, 0);
@@ -100,7 +106,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             break;
         case 0x0D:
             INST_NAME("OR AX, Iw");
-            SETFLAGS(X_ALL, SF_SET);
+            SETFLAGS(X_ALL, SF_SET_PENDING);
             i32 = F16;
             UXTHw(x1, xRAX);
             MOV32w(x2, i32);
@@ -114,7 +120,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
         case 0x11:
             INST_NAME("ADC Ew, Gw");
             READFLAGS(X_CF);
-            SETFLAGS(X_ALL, SF_SET);
+            SETFLAGS(X_ALL, SF_SET_PENDING);
             nextop = F8;
             GETGW(x2);
             GETEW(x1, 0);
@@ -124,7 +130,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
         case 0x13:
             INST_NAME("ADC Gw, Ew");
             READFLAGS(X_CF);
-            SETFLAGS(X_ALL, SF_SET);
+            SETFLAGS(X_ALL, SF_SET_PENDING);
             nextop = F8;
             GETGW(x1);
             GETEW(x2, 0);
@@ -134,7 +140,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
         case 0x15:
             INST_NAME("ADC AX, Iw");
             READFLAGS(X_CF);
-            SETFLAGS(X_ALL, SF_SET);
+            SETFLAGS(X_ALL, SF_SET_PENDING);
             i32 = F16;
             UXTHw(x1, xRAX);
             MOV32w(x2, i32);
@@ -145,7 +151,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
         case 0x19:
             INST_NAME("SBB Ew, Gw");
             READFLAGS(X_CF);
-            SETFLAGS(X_ALL, SF_SET);
+            SETFLAGS(X_ALL, SF_SET_PENDING);
             nextop = F8;
             GETGW(x2);
             GETEW(x1, 0);
@@ -155,7 +161,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
         case 0x1B:
             INST_NAME("SBB Gw, Ew");
             READFLAGS(X_CF);
-            SETFLAGS(X_ALL, SF_SET);
+            SETFLAGS(X_ALL, SF_SET_PENDING);
             nextop = F8;
             GETGW(x1);
             GETEW(x2, 0);
@@ -165,17 +171,17 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
         case 0x1D:
             INST_NAME("SBB AX, Iw");
             READFLAGS(X_CF);
-            SETFLAGS(X_ALL, SF_SET);
-            i16 = F16;
+            SETFLAGS(X_ALL, SF_SET_PENDING);
+            i16 = F16S;
             UXTHw(x1, xRAX);
-            MOV32w(x2, i16);
+            MOVZw(x2, i16);
             emit_sbb16(dyn, ninst, x1, x2, x3, x4);
             BFIx(xRAX, x1, 0, 16);
             break;
 
         case 0x21:
             INST_NAME("AND Ew, Gw");
-            SETFLAGS(X_ALL, SF_SET);
+            SETFLAGS(X_ALL, SF_SET_PENDING);
             nextop = F8;
             GETGW(x2);
             GETEW(x1, 0);
@@ -184,7 +190,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             break;
         case 0x23:
             INST_NAME("AND Gw, Ew");
-            SETFLAGS(X_ALL, SF_SET);
+            SETFLAGS(X_ALL, SF_SET_PENDING);
             nextop = F8;
             GETGW(x1);
             GETEW(x2, 0);
@@ -193,7 +199,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             break;
         case 0x25:
             INST_NAME("AND AX, Iw");
-            SETFLAGS(X_ALL, SF_SET);
+            SETFLAGS(X_ALL, SF_SET_PENDING);
             i32 = F16;
             UXTHw(x1, xRAX);
             MOV32w(x2, i32);
@@ -203,7 +209,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
 
         case 0x29:
             INST_NAME("SUB Ew, Gw");
-            SETFLAGS(X_ALL, SF_SET);
+            SETFLAGS(X_ALL, SF_SET_PENDING);
             nextop = F8;
             GETGW(x2);
             GETEW(x1, 0);
@@ -212,7 +218,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             break;
         case 0x2B:
             INST_NAME("SUB Gw, Ew");
-            SETFLAGS(X_ALL, SF_SET);
+            SETFLAGS(X_ALL, SF_SET_PENDING);
             nextop = F8;
             GETGW(x1);
             GETEW(x2, 0);
@@ -221,7 +227,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             break;
         case 0x2D:
             INST_NAME("SUB AX, Iw");
-            SETFLAGS(X_ALL, SF_SET);
+            SETFLAGS(X_ALL, SF_SET_PENDING);
             i32 = F16;
             UXTHw(x1, xRAX);
             MOV32w(x2, i32);
@@ -231,7 +237,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
 
         case 0x31:
             INST_NAME("XOR Ew, Gw");
-            SETFLAGS(X_ALL, SF_SET);
+            SETFLAGS(X_ALL, SF_SET_PENDING);
             nextop = F8;
             GETGW(x2);
             GETEW(x1, 0);
@@ -240,7 +246,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             break;
         case 0x33:
             INST_NAME("XOR Gw, Ew");
-            SETFLAGS(X_ALL, SF_SET);
+            SETFLAGS(X_ALL, SF_SET_PENDING);
             nextop = F8;
             GETGW(x1);
             GETEW(x2, 0);
@@ -249,7 +255,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             break;
         case 0x35:
             INST_NAME("XOR AX, Iw");
-            SETFLAGS(X_ALL, SF_SET);
+            SETFLAGS(X_ALL, SF_SET_PENDING);
             i32 = F16;
             UXTHw(x1, xRAX);
             MOV32w(x2, i32);
@@ -259,7 +265,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
 
         case 0x39:
             INST_NAME("CMP Ew, Gw");
-            SETFLAGS(X_ALL, SF_SET);
+            SETFLAGS(X_ALL, SF_SET_PENDING);
             nextop = F8;
             GETGW(x2);
             GETEW(x1, 0);
@@ -267,7 +273,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             break;
         case 0x3B:
             INST_NAME("CMP Gw, Ew");
-            SETFLAGS(X_ALL, SF_SET);
+            SETFLAGS(X_ALL, SF_SET_PENDING);
             nextop = F8;
             GETGW(x1);
             GETEW(x2, 0);
@@ -275,7 +281,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             break;
         case 0x3D:
             INST_NAME("CMP AX, Iw");
-            SETFLAGS(X_ALL, SF_SET);
+            SETFLAGS(X_ALL, SF_SET_PENDING);
             i32 = F16;
             UXTHw(x1, xRAX);
             if(i32) {
@@ -286,6 +292,14 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             }
             break;
 
+        case 0x64:
+            addr = dynarec64_6664(dyn, addr, ip, ninst, rex, rep, ok, need_epilog);
+            break;
+
+        case 0x66:
+            addr = dynarec64_66(dyn, addr, ip, ninst, rex, rep, ok, need_epilog);
+            break;
+
         case 0x69:
             INST_NAME("IMUL Gw,Ew,Iw");
             SETFLAGS(X_ALL, SF_PENDING);
@@ -324,76 +338,76 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     } else {
                         INST_NAME("ADD Ew, Ib");
                     }
-                    SETFLAGS(X_ALL, SF_SET);
-                    GETEW(x1, (opcode==81)?2:1);
+                    SETFLAGS(X_ALL, SF_SET_PENDING);
+                    GETEW(x1, (opcode==0x81)?2:1);
                     if(opcode==0x81) i16 = F16S; else i16 = F8S;
-                    MOV32w(x5, i16);
+                    MOVZw(x5, i16);
                     emit_add16(dyn, ninst, ed, x5, x2, x4);
                     EWBACK;
                     break;
                 case 1: //OR
                     if(opcode==0x81) {INST_NAME("OR Ew, Iw");} else {INST_NAME("OR Ew, Ib");}
-                    SETFLAGS(X_ALL, SF_SET);
-                    GETEW(x1, (opcode==81)?2:1);
+                    SETFLAGS(X_ALL, SF_SET_PENDING);
+                    GETEW(x1, (opcode==0x81)?2:1);
                     if(opcode==0x81) i16 = F16S; else i16 = F8S;
-                    MOV32w(x5, i16);
+                    MOVZw(x5, i16);
                     emit_or16(dyn, ninst, x1, x5, x2, x4);
                     EWBACK;
                     break;
                 case 2: //ADC
                     if(opcode==0x81) {INST_NAME("ADC Ew, Iw");} else {INST_NAME("ADC Ew, Ib");}
                     READFLAGS(X_CF);
-                    SETFLAGS(X_ALL, SF_SET);
-                    GETEW(x1, (opcode==81)?2:1);
+                    SETFLAGS(X_ALL, SF_SET_PENDING);
+                    GETEW(x1, (opcode==0x81)?2:1);
                     if(opcode==0x81) i16 = F16S; else i16 = F8S;
-                    MOV32w(x5, i16);
+                    MOVZw(x5, i16);
                     emit_adc16(dyn, ninst, x1, x5, x2, x4);
                     EWBACK;
                     break;
                 case 3: //SBB
                     if(opcode==0x81) {INST_NAME("SBB Ew, Iw");} else {INST_NAME("SBB Ew, Ib");}
                     READFLAGS(X_CF);
-                    SETFLAGS(X_ALL, SF_SET);
-                    GETEW(x1, (opcode==81)?2:1);
+                    SETFLAGS(X_ALL, SF_SET_PENDING);
+                    GETEW(x1, (opcode==0x81)?2:1);
                     if(opcode==0x81) i16 = F16S; else i16 = F8S;
-                    MOV32w(x5, i16);
+                    MOVZw(x5, i16);
                     emit_sbb16(dyn, ninst, x1, x5, x2, x4);
                     EWBACK;
                     break;
                 case 4: //AND
                     if(opcode==0x81) {INST_NAME("AND Ew, Iw");} else {INST_NAME("AND Ew, Ib");}
-                    SETFLAGS(X_ALL, SF_SET);
-                    GETEW(x1, (opcode==81)?2:1);
+                    SETFLAGS(X_ALL, SF_SET_PENDING);
+                    GETEW(x1, (opcode==0x81)?2:1);
                     if(opcode==0x81) i16 = F16S; else i16 = F8S;
-                    MOV32w(x5, i16);
+                    MOVZw(x5, i16);
                     emit_and16(dyn, ninst, x1, x5, x2, x4);
                     EWBACK;
                     break;
                 case 5: //SUB
                     if(opcode==0x81) {INST_NAME("SUB Ew, Iw");} else {INST_NAME("SUB Ew, Ib");}
-                    SETFLAGS(X_ALL, SF_SET);
-                    GETEW(x1, (opcode==81)?2:1);
+                    SETFLAGS(X_ALL, SF_SET_PENDING);
+                    GETEW(x1, (opcode==0x81)?2:1);
                     if(opcode==0x81) i16 = F16S; else i16 = F8S;
-                    MOV32w(x5, i16);
+                    MOVZw(x5, i16);
                     emit_sub16(dyn, ninst, x1, x5, x2, x4);
                     EWBACK;
                     break;
                 case 6: //XOR
                     if(opcode==0x81) {INST_NAME("XOR Ew, Iw");} else {INST_NAME("XOR Ew, Ib");}
-                    SETFLAGS(X_ALL, SF_SET);
-                    GETEW(x1, (opcode==81)?2:1);
+                    SETFLAGS(X_ALL, SF_SET_PENDING);
+                    GETEW(x1, (opcode==0x81)?2:1);
                     if(opcode==0x81) i16 = F16S; else i16 = F8S;
-                    MOV32w(x5, i16);
+                    MOVZw(x5, i16);
                     emit_xor16(dyn, ninst, x1, x5, x2, x4);
                     EWBACK;
                     break;
                 case 7: //CMP
                     if(opcode==0x81) {INST_NAME("CMP Ew, Iw");} else {INST_NAME("CMP Ew, Ib");}
-                    SETFLAGS(X_ALL, SF_SET);
-                    GETEW(x1, (opcode==81)?2:1);
+                    SETFLAGS(X_ALL, SF_SET_PENDING);
+                    GETEW(x1, (opcode==0x81)?2:1);
                     if(opcode==0x81) i16 = F16S; else i16 = F8S;
                     if(i16) {
-                        MOV32w(x2, i16);
+                        MOVZw(x2, i16);
                         emit_cmp16(dyn, ninst, x1, x2, x3, x4, x5);
                     } else
                         emit_cmp16_0(dyn, ninst, x1, x3, x4);
@@ -403,7 +417,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             
         case 0x85:
             INST_NAME("TEST Ew, Gw");
-            SETFLAGS(X_ALL, SF_SET);
+            SETFLAGS(X_ALL, SF_SET_PENDING);
             nextop = F8;
             GETEW(x1, 0);
             GETGW(x2);
@@ -440,8 +454,44 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             }
             break;
 
-        case 0x90:
-            INST_NAME("NOP");
+            case 0x90:
+            case 0x91:
+            case 0x92:
+            case 0x93:
+            case 0x94:
+            case 0x95:
+            case 0x96:
+            case 0x97:
+                gd = xRAX+(opcode&0x07)+(rex.b<<3);
+                if(gd==xRAX) {
+                    INST_NAME("NOP");
+                } else {
+                    INST_NAME("XCHG AX, Reg");
+                    MOVw_REG(x2, xRAX);
+                    BFIx(xRAX, gd, 0, 16);
+                    BFIx(gd, x2, 0, 16);
+                }
+            break;
+
+        case 0x98:
+            INST_NAME("CBW");
+            SXTBw(x1, xRAX);
+            BFIw(xRAX, x1, 0, 16);
+            break;
+
+        case 0xA1:
+            INST_NAME("MOV EAX,Od");
+            u64 = F64;
+            MOV64x(x1, u64);
+            LDRH_U12(x2, x1, 0);
+            BFIx(xRAX, x2, 0, 16);
+            break;
+
+        case 0xA3:
+            INST_NAME("MOV Od,EAX");
+            u64 = F64;
+            MOV64x(x1, u64);
+            STRH_U12(xRAX, x1, 0);
             break;
 
         case 0xA5:
@@ -473,13 +523,36 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
 
         case 0xA9:
             INST_NAME("TEST AX,Iw");
-            SETFLAGS(X_ALL, SF_SET);
+            SETFLAGS(X_ALL, SF_SET_PENDING);
             u16 = F16;
             MOV32w(x2, u16);
             UBFXx(x1, xRAX, 0, 16);
             emit_test16(dyn, ninst, x1, x2, x3, x4, x5);
             break;
 
+        case 0xAB:
+            if(rep) {
+                INST_NAME("REP STOSW");
+                CBZx_NEXT(xRCX);
+                TBNZ_MARK2(xFlags, F_DF);
+                MARK;   // Part with DF==0
+                STRH_S9_postindex(xRAX, xRDI, 2);
+                SUBx_U12(xRCX, xRCX, 1);
+                CBNZx_MARK(xRCX);
+                B_NEXT_nocond;
+                MARK2;  // Part with DF==1
+                STRH_S9_postindex(xRAX, xRDI, -2);
+                SUBx_U12(xRCX, xRCX, 1);
+                CBNZx_MARK2(xRCX);
+                // done
+            } else {
+                INST_NAME("STOSW");
+                GETDIR(x3, 2);
+                STRH_U12(xRAX, xRDI, 0);
+                ADDx_REG(xRDI, xRDI, x3);
+            }
+            break;
+
         case 0xB8:
         case 0xB9:
         case 0xBA:
@@ -500,6 +573,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             switch((nextop>>3)&7) {
                 case 0:
                     INST_NAME("ROL Ew, Ib");
+                    MESSAGE(LOG_DUMP, "Need Optimization\n");
                     SETFLAGS(X_OF|X_CF, SF_SET);
                     GETEW(x1, 1);
                     u8 = F8;
@@ -509,6 +583,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     break;
                 case 1:
                     INST_NAME("ROR Ew, Ib");
+                    MESSAGE(LOG_DUMP, "Need Optimization\n");
                     SETFLAGS(X_OF|X_CF, SF_SET);
                     GETEW(x1, 1);
                     u8 = F8;
@@ -518,6 +593,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     break;
                 case 2:
                     INST_NAME("RCL Ew, Ib");
+                    MESSAGE(LOG_DUMP, "Need Optimization\n");
                     READFLAGS(X_CF);
                     SETFLAGS(X_OF|X_CF, SF_SET);
                     GETEW(x1, 1);
@@ -528,6 +604,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     break;
                 case 3:
                     INST_NAME("RCR Ew, Ib");
+                    MESSAGE(LOG_DUMP, "Need Optimization\n");
                     READFLAGS(X_CF);
                     SETFLAGS(X_OF|X_CF, SF_SET);
                     GETEW(x1, 1);
@@ -539,24 +616,26 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                 case 4:
                 case 6:
                     INST_NAME("SHL Ew, Ib");
+                    UFLAG_IF {MESSAGE(LOG_DUMP, "Need Optimization for flags\n");}
                     SETFLAGS(X_ALL, SF_PENDING);
                     GETEW(x1, 1);
                     u8 = F8;
                     MOV32w(x2, (u8&0x1f));
                     UFLAG_OP12(ed, x2)
-                    LSLw_REG(ed, ed, x2);
+                    LSLw_IMM(ed, ed, u8&0x1f);
                     EWBACK;
                     UFLAG_RES(ed);
                     UFLAG_DF(x3, d_shl16);
                     break;
                 case 5:
                     INST_NAME("SHR Ed, Ib");
+                    UFLAG_IF {MESSAGE(LOG_DUMP, "Need Optimization for flags\n");}
                     SETFLAGS(X_ALL, SF_PENDING);
                     GETEW(x1, 1);
                     u8 = F8;
                     MOV32w(x2, (u8&0x1f));
                     UFLAG_OP12(ed, x2)
-                    LSRw_REG(ed, ed, x2);
+                    LSRw_IMM(ed, ed, u8&0x1f);
                     EWBACK;
                     UFLAG_RES(ed);
                     UFLAG_DF(x3, d_shr16);
@@ -564,6 +643,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                 case 7:
                     INST_NAME("SAR Ed, Ib");
                     SETFLAGS(X_ALL, SF_PENDING);
+                    UFLAG_IF {MESSAGE(LOG_DUMP, "Need Optimization for flags\n");}
                     GETSEW(x1, 0);
                     u8 = F8;
                     MOV32w(x2, (u8&0x1f));
@@ -604,6 +684,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                         INST_NAME("ROL Ew, CL");
                         ANDSw_mask(x2, xRCX, 0, 0b00100);
                     }
+                    MESSAGE(LOG_DUMP, "Need Optimization\n");
                     SETFLAGS(X_OF|X_CF, SF_SET);
                     GETEW(x1, 0);
                     CALL_(rol16, x1, x3);
@@ -617,6 +698,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                         INST_NAME("ROR Ew, CL");
                         ANDSw_mask(x2, xRCX, 0, 0b00100);
                     }
+                    MESSAGE(LOG_DUMP, "Need Optimization\n");
                     SETFLAGS(X_OF|X_CF, SF_SET);
                     GETEW(x1, 0);
                     CALL_(ror16, x1, x3);
@@ -624,6 +706,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     break;
                 case 2:
                     if(opcode==0xD1) {INST_NAME("RCL Ew, 1"); } else { INST_NAME("RCL Ew, CL");}
+                    MESSAGE(LOG_DUMP, "Need Optimization\n");
                     READFLAGS(X_CF);
                     SETFLAGS(X_OF|X_CF, SF_SET);
                     if(opcode==0xD1) {MOV32w(x2, 1);} else {ANDSw_mask(x2, xRCX, 0, 0b00100);}
@@ -633,6 +716,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     break;
                 case 3:
                     if(opcode==0xD1) {INST_NAME("RCR Ew, 1");} else {INST_NAME("RCR Ew, CL");}
+                    MESSAGE(LOG_DUMP, "Need Optimization\n");
                     READFLAGS(X_CF);
                     SETFLAGS(X_OF|X_CF, SF_SET);
                     if(opcode==0xD1) {MOV32w(x2, 1);} else {ANDSw_mask(x2, xRCX, 0, 0b00100);}
@@ -649,6 +733,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                         INST_NAME("SHL Ew, CL");
                         ANDSw_mask(x4, xRCX, 0, 0b00100);
                     }
+                    UFLAG_IF {MESSAGE(LOG_DUMP, "Need Optimization for flags\n");}
                     SETFLAGS(X_ALL, SF_PENDING);
                     GETEW(x1, 0);
                     UFLAG_OP12(ed, x4)
@@ -665,6 +750,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                         INST_NAME("SHR Ew, CL");
                         ANDSw_mask(x4, xRCX, 0, 0b00100);
                     }
+                    UFLAG_IF {MESSAGE(LOG_DUMP, "Need Optimization for flags\n");}
                     SETFLAGS(X_ALL, SF_PENDING);
                     GETEW(x1, 0);
                     UFLAG_OP12(ed, x4)
@@ -681,6 +767,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                         INST_NAME("SAR Ew, CL");
                         ANDSw_mask(x4, xRCX, 0, 0b00100);
                     }
+                    UFLAG_IF {MESSAGE(LOG_DUMP, "Need Optimization for flags\n");}
                     SETFLAGS(X_ALL, SF_PENDING);
                     GETSEW(x1, 0);
                     UFLAG_OP12(ed, x4)
@@ -698,7 +785,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                 case 0:
                 case 1:
                     INST_NAME("TEST Ew, Iw");
-                    SETFLAGS(X_ALL, SF_SET);
+                    SETFLAGS(X_ALL, SF_SET_PENDING);
                     GETEW(x1, 2);
                     u16 = F16;
                     MOV32w(x2, u16);
@@ -712,7 +799,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     break;
                 case 3:
                     INST_NAME("NEG Ew");
-                    SETFLAGS(X_ALL, SF_SET);
+                    SETFLAGS(X_ALL, SF_SET_PENDING);
                     GETEW(x1, 0);
                     emit_neg16(dyn, ninst, ed, x2, x4);
                     EWBACK;
@@ -741,12 +828,14 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     break;
                 case 6:
                     INST_NAME("DIV Ew");
+                    MESSAGE(LOG_DUMP, "Need Optimization\n");
                     SETFLAGS(X_ALL, SF_SET);
                     GETEW(x1, 0);
                     CALL(div16, -1);
                     break;
                 case 7:
                     INST_NAME("IDIV Ew");
+                    MESSAGE(LOG_DUMP, "Need Optimization\n");
                     SETFLAGS(X_ALL, SF_SET);
                     GETEW(x1, 0);
                     CALL(idiv16, -1);
@@ -766,7 +855,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     break;
                 case 1:
                     INST_NAME("DEC Ew");
-                    SETFLAGS(X_ALL&~X_CF, SF_SET);
+                    SETFLAGS(X_ALL&~X_CF, SF_SUBSET);
                     GETEW(x1, 0);
                     emit_dec16(dyn, ninst, x1, x2, x4);
                     EWBACK;
@@ -780,4 +869,3 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
     }
     return addr;
 }
-

src/dynarec/dynarec_arm64_6664.c

@@ -0,0 +1,129 @@
+#include <stdio.h>
+#include <stdlib.h>
+#include <stddef.h>
+#include <pthread.h>
+#include <errno.h>
+
+#include "debug.h"
+#include "box64context.h"
+#include "dynarec.h"
+#include "emu/x64emu_private.h"
+#include "emu/x64run_private.h"
+#include "x64run.h"
+#include "x64emu.h"
+#include "box64stack.h"
+#include "callback.h"
+#include "emu/x64run_private.h"
+#include "x64trace.h"
+#include "dynarec_arm64.h"
+#include "dynarec_arm64_private.h"
+#include "arm64_printer.h"
+
+#include "dynarec_arm64_helper.h"
+#include "dynarec_arm64_functions.h"
+
+#define GETG        gd = ((nextop&0x38)>>3)+(rex.r<<3)
+
+uintptr_t dynarec64_6664(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int* ok, int* need_epilog)
+{
+    (void)ip; (void)rep; (void)need_epilog;
+
+    uint8_t opcode = F8;
+    uint8_t nextop;
+    uint8_t gd, ed;
+    int v0, v1;
+    int64_t fixedaddress;
+
+    // REX prefix before the 66 are ignored
+    rex.rex = 0;
+    while(opcode>=0x40 && opcode<=0x4f) {
+        rex.rex = opcode;
+        opcode = F8;
+    }
+
+    /*if(rex.w && opcode!=0x0f) {   // rex.w cancels "66", but not for 66 0f type of prefix
+        MESSAGE(LOG_DUMP, "Here!\n");
+        return dynarec64_64(dyn, addr-2, ip, ninst, rex, rep, ok, need_epilog);
+    }*/
+
+    switch(opcode) {
+
+        case 0x0F:
+            opcode = F8;
+            switch(opcode) {
+
+            case 0xD6:
+                INST_NAME("MOVQ Ex, Gx");
+                nextop = F8;
+                GETG;
+                v0 = sse_get_reg(dyn, ninst, x1, gd);
+                if(MODREG) {
+                    v1 = sse_get_reg_empty(dyn, ninst, x1, (nextop&7) + (rex.b<<3));
+                    FMOVD(v1, v0);
+                } else {
+                    grab_segdata(dyn, addr, ninst, x4, _FS);
+                    addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0, 0, rex, 0, 0);
+                    VSTR64_REG(v0, ed, x4);
+                }
+                break;
+
+                default:
+                    DEFAULT;
+            }
+            break;
+
+        case 0x89:
+            INST_NAME("MOV FS:Ew, Gw");
+            nextop = F8;
+            GETGD;  // don't need GETGW here
+            if(MODREG) {
+                ed = xRAX+(nextop&7)+(rex.b<<3);
+                if(rex.w) {
+                    MOVx_REG(ed, gd);
+                } else {
+                    if(ed!=gd) {
+                        BFIx(ed, gd, 0, 16);
+                    }
+                }
+            } else {
+                grab_segdata(dyn, addr, ninst, x4, _FS);
+                addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, 0, 0, rex, 0, 0);
+                if(rex.w) {
+                    STRx_REG(gd, ed, x4);
+                } else {
+                    STRH_REG(gd, ed, x4);
+                }
+            }
+            break;
+
+        case 0x8B:
+            INST_NAME("MOV Gd, FS:Ed");
+            nextop=F8;
+            GETGD;
+            if(MODREG) {   // reg <= reg
+                ed = xRAX+(nextop&7)+(rex.b<<3);
+                if(rex.w) {
+                    MOVx_REG(gd, ed);
+                } else {
+                    if(ed!=gd) {
+                        BFIx(gd, ed, 0, 16);
+                    }
+                }
+            } else {                    // mem <= reg
+                grab_segdata(dyn, addr, ninst, x4, _FS);
+                addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, 0, 0, rex, 0, 0);
+                if(rex.w) {
+                    LDRx_REG(gd, ed, x4);
+                } else {
+                    LDRH_REG(x1, ed, x4);
+                    BFIx(gd, x1, 0, 16);
+                }
+            }
+            break;
+
+
+        default:
+            DEFAULT;
+    }
+    return addr;
+}

src/dynarec/dynarec_arm64_67.c

@@ -22,14 +22,34 @@
 #include "dynarec_arm64_helper.h"
 #include "dynarec_arm64_functions.h"
 
+#define GETGX(a)                        \
+    gd = ((nextop&0x38)>>3)+(rex.r<<3); \
+    a = sse_get_reg(dyn, ninst, x1, gd)
+
+#define GETGM(a)                        \
+    gd = ((nextop&0x38)>>3);            \
+    a = mmx_get_reg(dyn, ninst, x1, gd)
+
+#define GETGm   gd = ((nextop&0x38)>>3)
 
 uintptr_t dynarec64_67(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int* ok, int* need_epilog)
 {
+    (void)ip; (void)need_epilog;
+
     uint8_t opcode = F8;
+    uint8_t nextop;
+    uint8_t gd, ed, wback, wb;
+    int64_t fixedaddress;
     int8_t  i8;
-    int32_t i32, j32;
-    MAYUSE(j32);
+    uint8_t u8;
+    int32_t i32;
+    int64_t j64, i64;
+    int v0, v1, s0;
     MAYUSE(i32);
+    MAYUSE(j64);
+    MAYUSE(v0);
+    MAYUSE(v1);
+    MAYUSE(s0);
 
     // REX prefix before the 67 are ignored
     rex.rex = 0;
@@ -37,9 +57,173 @@ uintptr_t dynarec64_67(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
         rex.rex = opcode;
         opcode = F8;
     }
+    rep = 0;
+    while((opcode==0xF2) || (opcode==0xF3)) {
+        rep = opcode-0xF1;
+        opcode = F8;
+    }
 
     switch(opcode) {
 
+        case 0x0F:
+            opcode=F8;
+            switch(opcode) {
+
+                case 0x2E:
+                    // no special check...
+                case 0x2F:
+                    if(rep) {
+                        DEFAULT;
+                    } else {
+                        if(opcode==0x2F) {INST_NAME("COMISS Gx, Ex");} else {INST_NAME("UCOMISS Gx, Ex");}
+                        SETFLAGS(X_ALL, SF_SET);
+                        nextop = F8;
+                        GETGX(v0);
+                        if(MODREG) {
+                            s0 = sse_get_reg(dyn, ninst, x1, (nextop&7) + (rex.b<<3));
+                        } else {
+                            s0 = fpu_get_scratch(dyn);
+                            addr = geted32(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0xfff<<2, 3, rex, 0, 0);
+                            VLDR32_U12(s0, ed, fixedaddress);
+                        }
+                        FCMPS(v0, s0);
+                        FCOMI(x1, x2);
+                    }
+                    break;
+
+                case 0x6F:
+                    INST_NAME("MOVQ Gm, Em");
+                    nextop = F8;
+                    GETGm;
+                    if(MODREG) {
+                        v1 = mmx_get_reg(dyn, ninst, x1, nextop&7); // no rex.b on MMX
+                        v0 = mmx_get_reg_empty(dyn, ninst, x1, gd);
+                        VMOVeD(v0, 0, v1, 0);
+                    } else {
+                        v0 = mmx_get_reg_empty(dyn, ninst, x1, gd);
+                        addr = geted32(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0xfff<<3, 7, rex, 0, 0);
+                        VLDR64_U12(v0, ed, fixedaddress);
+                    }
+                    break;
+
+                case 0x7F:
+                    INST_NAME("MOVQ Em, Gm");
+                    nextop = F8;
+                    GETGM(v0);
+                    if(MODREG) {
+                        v1 = mmx_get_reg_empty(dyn, ninst, x1, nextop&7);
+                        VMOV(v1, v0);
+                    } else {
+                        addr = geted32(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0xfff<<3, 7, rex, 0, 0);
+                        VSTR64_U12(v0, ed, fixedaddress);
+                    }
+                    break;
+
+                default:
+                    DEFAULT;
+            }
+            break;
+
+        case 0x89:
+            INST_NAME("MOV Ed, Gd");
+            nextop=F8;
+            GETGD;
+            if(MODREG) {   // reg <= reg
+                MOVxw_REG(xRAX+(nextop&7)+(rex.b<<3), gd);
+            } else {                    // mem <= reg
+                addr = geted32(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, 0xfff<<(2+rex.w), (1<<(2+rex.w))-1, rex, 0, 0);
+                STRxw_U12(gd, ed, fixedaddress);
+            }
+            break;
+
+        case 0x8D:
+            INST_NAME("LEA Gd, Ed");
+            nextop=F8;
+            GETGD;
+            if(MODREG) {   // reg <= reg? that's an invalid operation
+                DEFAULT;
+            } else {                    // mem <= reg
+                // should a geted32 be created, to use 32bits regs instead of 64bits?
+                addr = geted32(dyn, addr, ninst, nextop, &ed, gd, &fixedaddress, 0, 0, rex, 0, 0);
+                if(ed!=gd) {
+                    MOVw_REG(gd, ed);
+                }
+            }
+            break;
+
+        case 0xC1:
+            nextop = F8;
+            switch((nextop>>3)&7) {
+                case 0:
+                    INST_NAME("ROL Ed, Ib");
+                    SETFLAGS(X_OF|X_CF, SF_SUBSET);
+                    GETED32(1);
+                    u8 = (F8)&(rex.w?0x3f:0x1f);
+                    emit_rol32c(dyn, ninst, rex, ed, u8, x3, x4);
+                    if(u8) { WBACK; }
+                    break;
+                case 1:
+                    INST_NAME("ROR Ed, Ib");
+                    SETFLAGS(X_OF|X_CF, SF_SUBSET);
+                    GETED32(1);
+                    u8 = (F8)&(rex.w?0x3f:0x1f);
+                    emit_ror32c(dyn, ninst, rex, ed, u8, x3, x4);
+                    if(u8) { WBACK; }
+                    break;
+                case 2:
+                    INST_NAME("RCL Ed, Ib");
+                    MESSAGE(LOG_DUMP, "Need Optimization\n");
+                    READFLAGS(X_CF);
+                    SETFLAGS(X_OF|X_CF, SF_SET);
+                    GETED32W(x4, x1, 1);
+                    u8 = F8;
+                    MOV32w(x2, u8);
+                    CALL_(rex.w?((void*)rcl64):((void*)rcl32), ed, x4);
+                    WBACK;
+                    break;
+                case 3:
+                    INST_NAME("RCR Ed, Ib");
+                    MESSAGE(LOG_DUMP, "Need Optimization\n");
+                    READFLAGS(X_CF);
+                    SETFLAGS(X_OF|X_CF, SF_SET);
+                    GETED32W(x4, x1, 1);
+                    u8 = F8;
+                    MOV32w(x2, u8);
+                    CALL_(rex.w?((void*)rcr64):((void*)rcr32), ed, x4);
+                    WBACK;
+                    break;
+                case 4:
+                case 6:
+                    INST_NAME("SHL Ed, Ib");
+                    SETFLAGS(X_ALL, SF_SET_PENDING);    // some flags are left undefined
+                    GETED32(1);
+                    u8 = (F8)&(rex.w?0x3f:0x1f);
+                    emit_shl32c(dyn, ninst, rex, ed, u8, x3, x4);
+                    WBACK;
+                    break;
+                case 5:
+                    INST_NAME("SHR Ed, Ib");
+                    SETFLAGS(X_ALL, SF_SET_PENDING);    // some flags are left undefined
+                    GETED32(1);
+                    u8 = (F8)&(rex.w?0x3f:0x1f);
+                    emit_shr32c(dyn, ninst, rex, ed, u8, x3, x4);
+                    if(u8) {
+                        WBACK;
+                    }
+                    break;
+                case 7:
+                    INST_NAME("SAR Ed, Ib");
+                    SETFLAGS(X_ALL, SF_SET_PENDING);    // some flags are left undefined
+                    GETED32(1);
+                    u8 = (F8)&(rex.w?0x3f:0x1f);
+                    emit_sar32c(dyn, ninst, rex, ed, u8, x3, x4);
+                    if(u8) {
+                        WBACK;
+                    }
+                    break;
+            }
+            break;
+            
         #define GO(NO, YES)   \
             BARRIER(2); \
             JUMP(addr+i8);\
@@ -94,9 +278,153 @@ uintptr_t dynarec64_67(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             break;
         #undef GO
 
+        case 0xE8:
+            return dynarec64_00(dyn, addr-1, ip, ninst, rex, rep, ok, need_epilog); // addr-1, to "put back" opcode)
+
+        case 0xF7:
+            nextop = F8;
+            switch((nextop>>3)&7) {
+                case 0:
+                case 1:
+                    INST_NAME("TEST Ed, Id");
+                    SETFLAGS(X_ALL, SF_SET_PENDING);
+                    GETED32H(x1, 4);
+                    i64 = F32S;
+                    MOV64xw(x2, i64);
+                    emit_test32(dyn, ninst, rex, ed, x2, x3, x4);
+                    break;
+                case 2:
+                    INST_NAME("NOT Ed");
+                    GETED32(4);
+                    MVNxw_REG(ed, ed);
+                    WBACK;
+                    break;
+                case 3:
+                    INST_NAME("NEG Ed");
+                    SETFLAGS(X_ALL, SF_SET_PENDING);
+                    GETED32(0);
+                    emit_neg32(dyn, ninst, rex, ed, x3, x4);
+                    WBACK;
+                    break;
+                case 4:
+                    INST_NAME("MUL EAX, Ed");
+                    SETFLAGS(X_ALL, SF_PENDING);
+                    UFLAG_DF(x2, rex.w?d_mul64:d_mul32);
+                    GETED32(0);
+                    if(rex.w) {
+                        if(ed==xRDX) gd=x3; else gd=xRDX;
+                        UMULH(gd, xRAX, ed);
+                        MULx(xRAX, xRAX, ed);
+                        if(gd!=xRDX) {MOVx_REG(xRDX, gd);}
+                    } else {
+                        UMULL(xRDX, xRAX, ed);  //64 <- 32x32
+                        MOVw_REG(xRAX, xRDX);
+                        LSRx(xRDX, xRDX, 32);
+                    }
+                    UFLAG_RES(xRAX);
+                    UFLAG_OP1(xRDX);
+                    break;
+                case 5:
+                    INST_NAME("IMUL EAX, Ed");
+                    SETFLAGS(X_ALL, SF_PENDING);
+                    UFLAG_DF(x2, rex.w?d_imul64:d_imul32);
+                    GETED32(0);
+                    if(rex.w) {
+                        if(ed==xRDX) gd=x3; else gd=xRDX;
+                        SMULH(gd, xRAX, ed);
+                        MULx(xRAX, xRAX, ed);
+                        if(gd!=xRDX) {MOVx_REG(xRDX, gd);}
+                    } else {
+                        SMULL(xRDX, xRAX, ed);  //64 <- 32x32
+                        MOVw_REG(xRAX, xRDX);
+                        LSRx(xRDX, xRDX, 32);
+                    }
+                    UFLAG_RES(xRAX);
+                    UFLAG_OP1(xRDX);
+                    break;
+                case 6:
+                    INST_NAME("DIV Ed");
+                    SETFLAGS(X_ALL, SF_SET);
+                    if(!rex.w) {
+                        SET_DFNONE(x2);
+                        GETED32(0);
+                        MOVw_REG(x3, xRAX);
+                        ORRx_REG_LSL(x3, x3, xRDX, 32);
+                        if(MODREG) {
+                            MOVw_REG(x4, ed);
+                            ed = x4;
+                        }
+                        UDIVx(x2, x3, ed);
+                        MSUBx(x4, x2, ed, xRAX);
+                        MOVw_REG(xRAX, x2);
+                        MOVw_REG(xRDX, x4);
+                    } else {
+                        if(ninst && dyn->insts 
+                           && dyn->insts[ninst-1].x64.addr 
+                           && *(uint8_t*)(dyn->insts[ninst-1].x64.addr)==0x31 
+                           && *(uint8_t*)(dyn->insts[ninst-1].x64.addr+1)==0xD2) {
+                            SET_DFNONE(x2);
+                            GETED32(0);
+                            UDIVx(x2, xRAX, ed);
+                            MSUBx(xRDX, x2, ed, xRAX);
+                            MOVx_REG(xRAX, x2);
+                        } else {
+                            GETED32H(x1, 0);  // get edd changed addr, so cannot be called 2 times for same op...
+                            CBZxw_MARK(xRDX);
+                            if(ed!=x1) {MOVx_REG(x1, ed);}
+                            CALL(div64, -1);
+                            B_NEXT_nocond;
+                            MARK;
+                            UDIVx(x2, xRAX, ed);
+                            MSUBx(xRDX, x2, ed, xRAX);
+                            MOVx_REG(xRAX, x2);
+                            SET_DFNONE(x2);
+                        }
+                    }
+                    break;
+                case 7:
+                    INST_NAME("IDIV Ed");
+                    SETFLAGS(X_ALL, SF_SET);
+                    if(!rex.w) {
+                        SET_DFNONE(x2)
+                        GETSED32w(0);
+                        MOVw_REG(x3, xRAX);
+                        ORRx_REG_LSL(x3, x3, xRDX, 32);
+                        SDIVx(x2, x3, wb);
+                        MSUBx(x4, x2, wb, x3);
+                        MOVw_REG(xRAX, x2);
+                        MOVw_REG(xRDX, x4);
+                    } else {
+                        if(ninst && dyn->insts
+                           &&  dyn->insts[ninst-1].x64.addr 
+                           && *(uint8_t*)(dyn->insts[ninst-1].x64.addr)==0x48
+                           && *(uint8_t*)(dyn->insts[ninst-1].x64.addr+1)==0x99) {
+                            SET_DFNONE(x2)
+                            GETED32(0);
+                            SDIVx(x2, xRAX, ed);
+                            MSUBx(xRDX, x2, ed, xRAX);
+                            MOVx_REG(xRAX, x2);
+                        } else {
+                            GETED32H(x1, 0);  // get edd changed addr, so cannot be called 2 times for same op...
+                            CBZxw_MARK(xRDX);
+                            MVNx_REG(x2, xRDX);
+                            CBZxw_MARK(x2);
+                            if(ed!=x1) {MOVx_REG(x1, ed);}
+                            CALL((void*)idiv64, -1);
+                            B_NEXT_nocond;
+                            MARK;
+                            SDIVx(x2, xRAX, ed);
+                            MSUBx(xRDX, x2, ed, xRAX);
+                            MOVx_REG(xRAX, x2);
+                            SET_DFNONE(x2)
+                        }
+                    }
+                    break;
+            }
+            break;
+
         default:
             DEFAULT;
     }
     return addr;
 }
-

src/dynarec/dynarec_arm64_d8.c

@@ -0,0 +1,232 @@
+#include <stdio.h>
+#include <stdlib.h>
+#include <stddef.h>
+#include <pthread.h>
+#include <errno.h>
+
+#include "debug.h"
+#include "box64context.h"
+#include "dynarec.h"
+#include "emu/x64emu_private.h"
+#include "emu/x64run_private.h"
+#include "x64run.h"
+#include "x64emu.h"
+#include "box64stack.h"
+#include "callback.h"
+#include "emu/x64run_private.h"
+#include "x64trace.h"
+#include "dynarec_arm64.h"
+#include "dynarec_arm64_private.h"
+#include "arm64_printer.h"
+#include "emu/x87emu_private.h"
+
+#include "dynarec_arm64_helper.h"
+#include "dynarec_arm64_functions.h"
+
+
+uintptr_t dynarec64_D8(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int* ok, int* need_epilog)
+{
+    (void)ip; (void)rep; (void)need_epilog;
+
+    uint8_t nextop = F8;
+    uint8_t ed;
+    int64_t fixedaddress;
+    int v1, v2;
+    int s0;
+
+    MAYUSE(s0);
+    MAYUSE(v2);
+    MAYUSE(v1);
+
+    switch(nextop) {
+        case 0xC0:
+        case 0xC1:
+        case 0xC2:
+        case 0xC3:
+        case 0xC4:
+        case 0xC5:
+        case 0xC6:
+        case 0xC7:
+            INST_NAME("FADD ST0, STx");
+            v1 = x87_get_st(dyn, ninst, x1, x2, 0);
+            v2 = x87_get_st(dyn, ninst, x1, x2, nextop&7);
+            FADDD(v1, v1, v2);
+            break;
+        case 0xC8:
+        case 0xC9:
+        case 0xCA:
+        case 0xCB:
+        case 0xCC:
+        case 0xCD:
+        case 0xCE:
+        case 0xCF:
+            INST_NAME("FMUL ST0, STx");
+            v1 = x87_get_st(dyn, ninst, x1, x2, 0);
+            v2 = x87_get_st(dyn, ninst, x1, x2, nextop&7);
+            FMULD(v1, v1, v2);
+            break;
+        case 0xD0:
+        case 0xD1:
+        case 0xD2:
+        case 0xD3:
+        case 0xD4:
+        case 0xD5:
+        case 0xD6:
+        case 0xD7:
+            INST_NAME("FCOM ST0, STx");
+            v1 = x87_get_st(dyn, ninst, x1, x2, 0);
+            v2 = x87_get_st(dyn, ninst, x1, x2, nextop&7);
+            FCMPD(v1, v2);
+            FCOM(x1, x2, x3);
+            break;
+        case 0xD8:
+        case 0xD9:
+        case 0xDA:
+        case 0xDB:
+        case 0xDC:
+        case 0xDD:
+        case 0xDE:
+        case 0xDF:
+            INST_NAME("FCOMP ST0, STx");
+            v1 = x87_get_st(dyn, ninst, x1, x2, 0);
+            v2 = x87_get_st(dyn, ninst, x1, x2, nextop&7);
+            FCMPD(v1, v2);
+            FCOM(x1, x2, x3);
+            x87_do_pop(dyn, ninst);
+            break;
+        case 0xE0:
+        case 0xE1:
+        case 0xE2:
+        case 0xE3:
+        case 0xE4:
+        case 0xE5:
+        case 0xE6:
+        case 0xE7:
+            INST_NAME("FSUB ST0, STx");
+            v1 = x87_get_st(dyn, ninst, x1, x2, 0);
+            v2 = x87_get_st(dyn, ninst, x1, x2, nextop&7);
+            FSUBD(v1, v1, v2);
+            break;
+        case 0xE8:
+        case 0xE9:
+        case 0xEA:
+        case 0xEB:
+        case 0xEC:
+        case 0xED:
+        case 0xEE:
+        case 0xEF:
+            INST_NAME("FSUBR ST0, STx");
+            v1 = x87_get_st(dyn, ninst, x1, x2, 0);
+            v2 = x87_get_st(dyn, ninst, x1, x2, nextop&7);
+            FSUBD(v1, v2, v1);
+            break;
+        case 0xF0:
+        case 0xF1:
+        case 0xF2:
+        case 0xF3:
+        case 0xF4:
+        case 0xF5:
+        case 0xF6:
+        case 0xF7:
+            INST_NAME("FDIV ST0, STx");
+            v1 = x87_get_st(dyn, ninst, x1, x2, 0);
+            v2 = x87_get_st(dyn, ninst, x1, x2, nextop&7);
+            FDIVD(v1, v1, v2);
+            break;
+        case 0xF8:
+        case 0xF9:
+        case 0xFA:
+        case 0xFB:
+        case 0xFC:
+        case 0xFD:
+        case 0xFE:
+        case 0xFF:
+            INST_NAME("FDIVR ST0, STx");
+            v1 = x87_get_st(dyn, ninst, x1, x2, 0);
+            v2 = x87_get_st(dyn, ninst, x1, x2, nextop&7);
+            FDIVD(v1, v2, v1);
+            break;
+      
+        default:
+            switch((nextop>>3)&7) {
+                case 0:
+                    INST_NAME("FADD ST0, float[ED]");
+                    v1 = x87_get_st(dyn, ninst, x1, x2, 0);
+                    s0 = fpu_get_scratch(dyn);
+                    addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, 0xfff<<2, 3, rex, 0, 0);
+                    VLDR32_U12(s0, ed, fixedaddress);
+                    FCVT_D_S(s0, s0);
+                    FADDD(v1, v1, s0);
+                    break;
+                case 1:
+                    INST_NAME("FMUL ST0, float[ED]");
+                    v1 = x87_get_st(dyn, ninst, x1, x2, 0);
+                    s0 = fpu_get_scratch(dyn);
+                    addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, 0xfff<<2, 3, rex, 0, 0);
+                    VLDR32_U12(s0, ed, fixedaddress);
+                    FCVT_D_S(s0, s0);
+                    FMULD(v1, v1, s0);
+                    break;
+                case 2:
+                    INST_NAME("FCOM ST0, float[ED]");
+                    v1 = x87_get_st(dyn, ninst, x1, x2, 0);
+                    s0 = fpu_get_scratch(dyn);
+                    addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, 0xfff<<2, 3, rex, 0, 0);
+                    VLDR32_U12(s0, ed, fixedaddress);
+                    FCVT_D_S(s0, s0);
+                    FCMPD(v1, s0);
+                    FCOM(x1, x2, x3);
+                    break;
+                case 3:
+                    INST_NAME("FCOMP ST0, float[ED]");
+                    v1 = x87_get_st(dyn, ninst, x1, x2, 0);
+                    s0 = fpu_get_scratch(dyn);
+                    addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, 0xfff<<2, 3, rex, 0, 0);
+                    VLDR32_U12(s0, ed, fixedaddress);
+                    FCVT_D_S(s0, s0);
+                    FCMPD(v1, s0);
+                    FCOM(x1, x2, x3);
+                    x87_do_pop(dyn, ninst);
+                    break;
+                case 4:
+                    INST_NAME("FSUB ST0, float[ED]");
+                    v1 = x87_get_st(dyn, ninst, x1, x2, 0);
+                    s0 = fpu_get_scratch(dyn);
+                    addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, 0xfff<<2, 3, rex, 0, 0);
+                    VLDR32_U12(s0, ed, fixedaddress);
+                    FCVT_D_S(s0, s0);
+                    FSUBD(v1, v1, s0);
+                    break;
+                case 5:
+                    INST_NAME("FSUBR ST0, float[ED]");
+                    v1 = x87_get_st(dyn, ninst, x1, x2, 0);
+                    s0 = fpu_get_scratch(dyn);
+                    addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, 0xfff<<2, 3, rex, 0, 0);
+                    VLDR32_U12(s0, ed, fixedaddress);
+                    FCVT_D_S(s0, s0);
+                    FSUBD(v1, s0, v1);
+                    break;
+                case 6:
+                    INST_NAME("FDIV ST0, float[ED]");
+                    v1 = x87_get_st(dyn, ninst, x1, x2, 0);
+                    s0 = fpu_get_scratch(dyn);
+                    addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, 0xfff<<2, 3, rex, 0, 0);
+                    VLDR32_U12(s0, ed, fixedaddress);
+                    FCVT_D_S(s0, s0);
+                    FDIVD(v1, v1, s0);
+                    break;
+                case 7:
+                    INST_NAME("FDIVR ST0, float[ED]");
+                    v1 = x87_get_st(dyn, ninst, x1, x2, 0);
+                    s0 = fpu_get_scratch(dyn);
+                    addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, 0xfff<<2, 3, rex, 0, 0);
+                    VLDR32_U12(s0, ed, fixedaddress);
+                    FCVT_D_S(s0, s0);
+                    FDIVD(v1, s0, v1);
+                    break;
+                default:
+                    DEFAULT;
+            }
+    }
+    return addr;
+}

src/dynarec/dynarec_arm64_d9.c

@@ -0,0 +1,356 @@
+#include <stdio.h>
+#include <stdlib.h>
+#include <stddef.h>
+#include <pthread.h>
+#include <errno.h>
+
+#include "debug.h"
+#include "box64context.h"
+#include "dynarec.h"
+#include "emu/x64emu_private.h"
+#include "emu/x64run_private.h"
+#include "x64run.h"
+#include "x64emu.h"
+#include "box64stack.h"
+#include "callback.h"
+#include "emu/x64run_private.h"
+#include "x64trace.h"
+#include "dynarec_arm64.h"
+#include "dynarec_arm64_private.h"
+#include "arm64_printer.h"
+#include "emu/x87emu_private.h"
+
+#include "dynarec_arm64_helper.h"
+#include "dynarec_arm64_functions.h"
+
+
+uintptr_t dynarec64_D9(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int* ok, int* need_epilog)
+{
+    (void)ip; (void)rep; (void)need_epilog;
+
+    uint8_t nextop = F8;
+    uint8_t ed;
+    uint8_t wback, wb1;
+    int64_t fixedaddress;
+    int v1, v2;
+    int s0;
+    int i1, i2, i3;
+
+    MAYUSE(s0);
+    MAYUSE(v2);
+    MAYUSE(v1);
+
+    switch(nextop) {
+        case 0xC0:
+        case 0xC1:
+        case 0xC2:
+        case 0xC3:
+        case 0xC4:
+        case 0xC5:
+        case 0xC6:
+        case 0xC7:
+            INST_NAME("FLD STx");
+            v1 = x87_get_st(dyn, ninst, x1, x2, nextop&7);
+            v2 = x87_do_push(dyn, ninst);
+            FMOVD(v2, v1);
+            break;
+
+        case 0xC8:
+        case 0xC9:
+        case 0xCA:
+        case 0xCB:
+        case 0xCC:
+        case 0xCD:
+        case 0xCE:
+        case 0xCF:
+            INST_NAME("FXCH STx");
+            // swap the cache value, not the double value itself :p
+            i1 = x87_get_cache(dyn, ninst, x1, x2, nextop&7);
+            i2 = x87_get_cache(dyn, ninst, x1, x2, 0);
+            i3 = dyn->x87cache[i1];
+            dyn->x87cache[i1] = dyn->x87cache[i2];
+            dyn->x87cache[i2] = i3;
+            break;
+
+        case 0xD0:
+            INST_NAME("FNOP");
+            break;
+
+        case 0xE0:
+            INST_NAME("FCHS");
+            v1 = x87_get_st(dyn, ninst, x1, x2, 0);
+            FNEGD(v1, v1);
+            break;
+        case 0xE1:
+            INST_NAME("FABS");
+            v1 = x87_get_st(dyn, ninst, x1, x2, 0);
+            FABSD(v1, v1);
+            break;
+
+        case 0xE4:
+            INST_NAME("FTST");
+            v1 = x87_get_st(dyn, ninst, x1, x2, 0);
+            FCMPD_0(v1);
+            FCOM(x1, x2, x3);   // same flags...
+            break;
+        case 0xE5:
+            INST_NAME("FXAM");
+            MESSAGE(LOG_DUMP, "Need Optimization\n");
+            x87_refresh(dyn, ninst, x1, x2, 0);
+            CALL(fpu_fxam, -1);  // should be possible inline, but is it worth it?
+            break;
+
+        case 0xE8:
+            INST_NAME("FLD1");
+            v1 = x87_do_push(dyn, ninst);
+            FTABLE64(v1, 1.0);
+            break;
+        case 0xE9:
+            INST_NAME("FLDL2T");
+            v1 = x87_do_push(dyn, ninst);
+            FTABLE64(v1, L2T);
+            break;
+        case 0xEA:     
+            INST_NAME("FLDL2E");
+            v1 = x87_do_push(dyn, ninst);
+            FTABLE64(v1, L2E);
+            break;
+        case 0xEB:
+            INST_NAME("FLDPI");
+            v1 = x87_do_push(dyn, ninst);
+            FTABLE64(v1, PI);
+            break;
+        case 0xEC:
+            INST_NAME("FLDLG2");
+            v1 = x87_do_push(dyn, ninst);
+            FTABLE64(v1, LG2);
+            break;
+        case 0xED:
+            INST_NAME("FLDLN2");
+            v1 = x87_do_push(dyn, ninst);
+            FTABLE64(v1, LN2);
+            break;
+        case 0xEE:
+            INST_NAME("FLDZ");
+            v1 = x87_do_push(dyn, ninst);
+            FTABLE64(v1, 0.0);
+            break;
+
+        case 0xFA:
+            INST_NAME("FSQRT");
+            v1 = x87_get_st(dyn, ninst, x1, x2, 0);
+            FSQRTD(v1, v1);
+            break;
+
+        case 0xFC:
+            INST_NAME("FRNDINT");
+            MESSAGE(LOG_DUMP, "Need Optimization\n");
+            // use C helper for now, nothing staightforward is available
+            x87_forget(dyn, ninst, x1, x2, 0);
+            CALL(arm_frndint, -1);
+            /*
+            v1 = x87_get_st(dyn, ninst, x1, x2, 0);
+            VCMP_F64_0(v1);
+            VMRS_APSR();
+            B_NEXT(cVS);    // Unordered, skip
+            B_NEXT(cEQ);    // Zero, skip
+            u8 = x87_setround(dyn, ninst, x1, x2, x3);
+            VCVT_S32_F64(x1, v1);   // limit to 32bits....
+            VCVT_F64_S32(v1, x1);
+            x87_restoreround(dyn, ninst, u8);
+            */
+            break;
+        case 0xF0:
+            INST_NAME("F2XM1");
+            MESSAGE(LOG_DUMP, "Need Optimization\n");
+            x87_forget(dyn, ninst, x1, x2, 0);
+            CALL(arm_f2xm1, -1);
+            break;
+        case 0xF1:
+            INST_NAME("FYL2X");
+            MESSAGE(LOG_DUMP, "Need Optimization\n");
+            x87_forget(dyn, ninst, x1, x2, 0);
+            x87_forget(dyn, ninst, x1, x2, 1);
+            CALL(arm_fyl2x, -1);
+            x87_do_pop(dyn, ninst);
+            break;
+        case 0xF2:
+            INST_NAME("FTAN");
+            MESSAGE(LOG_DUMP, "Need Optimization\n");
+            x87_forget(dyn, ninst, x1, x2, 0);
+            CALL(arm_ftan, -1);
+            v1 = x87_do_push(dyn, ninst);
+            FTABLE64(v1, 1.0);
+            break;
+        case 0xF3:
+            INST_NAME("FPATAN");
+            MESSAGE(LOG_DUMP, "Need Optimization\n");
+            x87_forget(dyn, ninst, x1, x2, 0);
+            x87_forget(dyn, ninst, x1, x2, 1);
+            CALL(arm_fpatan, -1);
+            x87_do_pop(dyn, ninst);
+            break;
+        case 0xF4:
+            INST_NAME("FXTRACT");
+            MESSAGE(LOG_DUMP, "Need Optimization\n");
+            x87_do_push_empty(dyn, ninst, 0);
+            x87_forget(dyn, ninst, x1, x2, 1);
+            CALL(arm_fxtract, -1);
+            break;
+        case 0xF5:
+            INST_NAME("FPREM1");
+            MESSAGE(LOG_DUMP, "Need Optimization\n");
+            x87_forget(dyn, ninst, x1, x2, 0);
+            x87_forget(dyn, ninst, x1, x2, 1);
+            CALL(arm_fprem1, -1);
+            break;
+        case 0xF6:
+            INST_NAME("FDECSTP");
+            fpu_purgecache(dyn, ninst, x1, x2, x3);
+            LDRw_U12(x2, xEmu, offsetof(x64emu_t, top));
+            SUBw_U12(x2, x2, 1);
+            ANDw_mask(x2, x2, 0, 2);    //mask=7
+            STRw_U12(x2, xEmu, offsetof(x64emu_t, top));
+            break;
+        case 0xF7:
+            INST_NAME("FINCSTP");
+            fpu_purgecache(dyn, ninst, x1, x2, x3);
+            LDRw_U12(x2, xEmu, offsetof(x64emu_t, top));
+            ADDw_U12(x2, x2, 1);
+            ANDw_mask(x2, x2, 0, 2);    //mask=7
+            STRw_U12(x2, xEmu, offsetof(x64emu_t, top));
+            break;
+        case 0xF8:
+            INST_NAME("FPREM");
+            MESSAGE(LOG_DUMP, "Need Optimization\n");
+            x87_forget(dyn, ninst, x1, x2, 0);
+            x87_forget(dyn, ninst, x1, x2, 1);
+            CALL(arm_fprem, -1);
+            break;
+        case 0xF9:
+            INST_NAME("FYL2XP1");
+            MESSAGE(LOG_DUMP, "Need Optimization\n");
+            x87_forget(dyn, ninst, x1, x2, 0);
+            x87_forget(dyn, ninst, x1, x2, 1);
+            CALL(arm_fyl2xp1, -1);
+            x87_do_pop(dyn, ninst);
+            break;
+        case 0xFB:
+            INST_NAME("FSINCOS");
+            MESSAGE(LOG_DUMP, "Need Optimization\n");
+            x87_do_push_empty(dyn, ninst, 0);
+            x87_forget(dyn, ninst, x1, x2, 1);
+            CALL(arm_fsincos, -1);
+            break;
+        case 0xFD:
+            INST_NAME("FSCALE");
+            MESSAGE(LOG_DUMP, "Need Optimization\n");
+            x87_forget(dyn, ninst, x1, x2, 0);
+            x87_forget(dyn, ninst, x1, x2, 1);
+            CALL(arm_fscale, -1);
+            break;
+        case 0xFE:
+            INST_NAME("FSIN");
+            MESSAGE(LOG_DUMP, "Need Optimization\n");
+            x87_forget(dyn, ninst, x1, x2, 0);
+            CALL(arm_fsin, -1);
+            break;
+        case 0xFF:
+            INST_NAME("FCOS");
+            MESSAGE(LOG_DUMP, "Need Optimization\n");
+            x87_forget(dyn, ninst, x1, x2, 0);
+            CALL(arm_fcos, -1);
+            break;
+
+
+        case 0xD1:
+        case 0xD4:
+        case 0xD5:
+        case 0xD6:
+        case 0xD7:
+        case 0xD8:
+        case 0xD9:
+        case 0xDA:
+        case 0xDB:
+        case 0xDC:
+        case 0xDD:
+        case 0xDE:
+        case 0xDF:
+        case 0xE2:
+        case 0xE3:
+        case 0xE6:
+        case 0xE7:
+        case 0xEF:
+            DEFAULT;
+            break;
+             
+        default:
+            switch((nextop>>3)&7) {
+                case 0:
+                    INST_NAME("FLD ST0, float[ED]");
+                    v1 = x87_do_push(dyn, ninst);
+                    s0 = fpu_get_scratch(dyn);
+                    addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, 0xfff<<2, 3, rex, 0, 0);
+                    VLDR32_U12(s0, ed, fixedaddress);
+                    FCVT_D_S(v1, s0);
+                    break;
+                case 2:
+                    INST_NAME("FST float[ED], ST0");
+                    v1 = x87_get_st(dyn, ninst, x1, x2, 0);
+                    s0 = fpu_get_scratch(dyn);
+                    FCVT_S_D(s0, v1);
+                    addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, 0xfff<<2, 3, rex, 0, 0);
+                    VSTR32_U12(s0, ed, fixedaddress);
+                    break;
+                case 3:
+                    INST_NAME("FSTP float[ED], ST0");
+                    v1 = x87_get_st(dyn, ninst, x1, x2, 0);
+                    s0 = fpu_get_scratch(dyn);
+                    FCVT_S_D(s0, v1);
+                    addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, 0xfff<<2, 3, rex, 0, 0);
+                    VSTR32_U12(s0, ed, fixedaddress);
+                    x87_do_pop(dyn, ninst);
+                    break;
+                case 4:
+                    INST_NAME("FLDENV Ed");
+                    MESSAGE(LOG_DUMP, "Need Optimization\n");
+                    fpu_purgecache(dyn, ninst, x1, x2, x3); // maybe only x87, not SSE?
+                    addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0, 0, rex, 0, 0);
+                    if(ed!=x1) {
+                        MOVx_REG(x1, ed);
+                    }
+                    MOV32w(x2, 0);
+                    CALL(fpu_loadenv, -1);
+                    break;
+                case 5:
+                    INST_NAME("FLDCW Ew");
+                    GETEW(x1, 0);
+                    STRH_U12(x1, xEmu, offsetof(x64emu_t, cw));    // hopefully cw is not too far for an imm8
+                    UBFXw(x1, x1, 10, 2);    // extract round
+                    STRw_U12(x1, xEmu, offsetof(x64emu_t, round));
+                    break;
+                case 6:
+                    INST_NAME("FNSTENV Ed");
+                    MESSAGE(LOG_DUMP, "Need Optimization\n");
+                    fpu_purgecache(dyn, ninst, x1, x2, x3); // maybe only x87, not SSE?
+                    addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0, 0, rex, 0, 0);
+                    if(ed!=x1) {
+                        MOVx_REG(x1, ed);
+                    }
+                    MOV32w(x2, 0);
+                    CALL(fpu_savenv, -1);
+                    break;
+                case 7:
+                    INST_NAME("FNSTCW Ew");
+                    addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, 0xfff<<1, 1, rex, 0, 0);
+                    ed = x1;
+                    wb1 = 1;
+                    LDRH_U12(x1, xEmu, offsetof(x64emu_t, cw));
+                    EWBACK;
+                    break;
+                default:
+                    DEFAULT;
+            }
+    }
+    return addr;
+}

src/dynarec/dynarec_arm64_db.c

@@ -0,0 +1,307 @@
+#include <stdio.h>
+#include <stdlib.h>
+#include <stddef.h>
+#include <pthread.h>
+#include <errno.h>
+
+#include "debug.h"
+#include "box64context.h"
+#include "dynarec.h"
+#include "emu/x64emu_private.h"
+#include "emu/x64run_private.h"
+#include "x64run.h"
+#include "x64emu.h"
+#include "box64stack.h"
+#include "callback.h"
+#include "emu/x64run_private.h"
+#include "x64trace.h"
+#include "dynarec_arm64.h"
+#include "dynarec_arm64_private.h"
+#include "arm64_printer.h"
+#include "emu/x87emu_private.h"
+
+#include "dynarec_arm64_helper.h"
+#include "dynarec_arm64_functions.h"
+
+
+uintptr_t dynarec64_DB(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int* ok, int* need_epilog)
+{
+    (void)ip; (void)rep; (void)need_epilog;
+
+    uint8_t nextop = F8;
+    uint8_t ed;
+    uint8_t wback;
+    uint8_t u8;
+    int64_t fixedaddress;
+    int v1, v2;
+    int s0;
+    int64_t j64;
+
+    MAYUSE(s0);
+    MAYUSE(v2);
+    MAYUSE(v1);
+    MAYUSE(j64);
+
+    switch(nextop) {
+        case 0xC0:
+        case 0xC1:
+        case 0xC2:
+        case 0xC3:
+        case 0xC4:
+        case 0xC5:
+        case 0xC6:
+        case 0xC7:
+            INST_NAME("FCMOVNB ST0, STx");
+            READFLAGS(X_CF);
+            v1 = x87_get_st(dyn, ninst, x1, x2, 0);
+            v2 = x87_get_st(dyn, ninst, x1, x2, nextop&7);
+            TSTw_mask(xFlags, 0, 0);    //mask=1<<F_CF
+            FCSELD(v1, v2, v1, cEQ);    // F_CF==0
+            break;
+        case 0xC8:
+        case 0xC9:
+        case 0xCA:
+        case 0xCB:
+        case 0xCC:
+        case 0xCD:
+        case 0xCE:
+        case 0xCF:
+            INST_NAME("FCMOVNE ST0, STx");
+            READFLAGS(X_ZF);
+            v1 = x87_get_st(dyn, ninst, x1, x2, 0);
+            v2 = x87_get_st(dyn, ninst, x1, x2, nextop&7);
+            TSTw_mask(xFlags, 0b011010, 0); //mask=1<<F_ZF
+            FCSELD(v1, v2, v1, cEQ);        // F_ZF==0
+            break;
+        case 0xD0:
+        case 0xD1:
+        case 0xD2:
+        case 0xD3:
+        case 0xD4:
+        case 0xD5:
+        case 0xD6:
+        case 0xD7:
+            INST_NAME("FCMOVNBE ST0, STx");
+            READFLAGS(X_CF|X_ZF);
+            v1 = x87_get_st(dyn, ninst, x1, x2, 0);
+            v2 = x87_get_st(dyn, ninst, x1, x2, nextop&7);
+            MOV32w(x1, (1<<F_CF)|(1<<F_ZF));
+            TSTw_REG(xFlags, x1);
+            FCSELD(v1, v2, v1, cEQ);   // F_CF==0 & F_ZF==0
+            break;
+        case 0xD8:
+        case 0xD9:
+        case 0xDA:
+        case 0xDB:
+        case 0xDC:
+        case 0xDD:
+        case 0xDE:
+        case 0xDF:
+            INST_NAME("FCMOVNU ST0, STx");
+            READFLAGS(X_PF);
+            v1 = x87_get_st(dyn, ninst, x1, x2, 0);
+            v2 = x87_get_st(dyn, ninst, x1, x2, nextop&7);
+            TSTw_mask(xFlags, 0b011110, 0); //mask=1<<F_PF
+            FCSELD(v1, v2, v1, cEQ);        // F_PF==0
+            break;
+        case 0xE1:
+            INST_NAME("FDISI8087_NOP"); // so.. NOP?
+            break;
+        case 0xE2:
+            INST_NAME("FNCLEX");
+            LDRH_U12(x2, xEmu, offsetof(x64emu_t, sw));
+            MOV32w(x1, 0);
+            BFIw(x2, x1, 0, 8);  // IE .. PE, SF, ES
+            BFIw(x2, x1, 15, 1); // B
+            STRH_U12(x2, xEmu, offsetof(x64emu_t, sw));
+            break;
+        case 0xE3:
+            INST_NAME("FNINIT");
+            MESSAGE(LOG_DUMP, "Need Optimization\n");
+            x87_purgecache(dyn, ninst, x1, x2, x3);
+            CALL(reset_fpu, -1);
+            break;
+        case 0xE8:
+        case 0xE9:
+        case 0xEA:
+        case 0xEB:
+        case 0xEC:
+        case 0xED:
+        case 0xEE:
+        case 0xEF:
+            INST_NAME("FUCOMI ST0, STx");
+            SETFLAGS(X_ALL, SF_SET);
+            v1 = x87_get_st(dyn, ninst, x1, x2, 0);
+            v2 = x87_get_st(dyn, ninst, x1, x2, nextop&7);
+            FCMPD(v1, v2);
+            FCOMI(x1, x2);
+            break;
+        case 0xF0:  
+        case 0xF1:
+        case 0xF2:
+        case 0xF3:
+        case 0xF4:
+        case 0xF5:
+        case 0xF6:
+        case 0xF7:
+            INST_NAME("FCOMI ST0, STx");
+            SETFLAGS(X_ALL, SF_SET);
+            v1 = x87_get_st(dyn, ninst, x1, x2, 0);
+            v2 = x87_get_st(dyn, ninst, x1, x2, nextop&7);
+            FCMPD(v1, v2);
+            FCOMI(x1, x2);
+            break;
+
+        case 0xE0:
+        case 0xE4:
+        case 0xE5:
+        case 0xE6:
+        case 0xE7:
+            DEFAULT;
+            break;
+
+        default:
+            switch((nextop>>3)&7) {
+                case 0:
+                    INST_NAME("FILD ST0, Ed");
+                    v1 = x87_do_push(dyn, ninst);
+                    s0 = fpu_get_scratch(dyn);
+                    addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, 0xfff<<2, 3, rex, 0, 0);
+                    VLDR32_U12(s0, ed, fixedaddress);
+                    SXTL_32(v1, s0);
+                    SCVTFDD(v1, v1);
+                    break;
+                case 1:
+                    INST_NAME("FISTTP Ed, ST0");
+                    v1 = x87_get_st(dyn, ninst, x1, x2, 0);
+                    if(MODREG) {
+                        ed = xRAX+(nextop&7)+(rex.b<<3);
+                        wback = 0;
+                    } else {
+                        addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, 0xfff<<2, 3, rex, 0, 0);
+                        ed = x1;
+                    }
+                    s0 = fpu_get_scratch(dyn);
+                    #if 0
+                    FRINT32ZD(s0, v1);
+                    FCVTZSwD(ed, s0);
+                    WBACK;
+                    #else
+                    MRS_fpsr(x5);
+                    BFCw(x5, FPSR_IOC, 1);   // reset IOC bit
+                    MSR_fpsr(x5);
+                    FRINTZD(s0, v1);
+                    VFCVTZSd(s0, s0);
+                    SQXTN_S_D(s0, s0);
+                    VSTR32_U12(s0, wback, fixedaddress);
+                    MRS_fpsr(x5);   // get back FPSR to check the IOC bit
+                    TBZ_MARK3(x5, FPSR_IOC);
+                    MOV32w(x5, 0x80000000);
+                    STRw_U12(x5, wback, fixedaddress);
+                    MARK3;
+                    #endif
+                    x87_do_pop(dyn, ninst);
+                    break;
+                case 2:
+                    INST_NAME("FIST Ed, ST0");
+                    v1 = x87_get_st(dyn, ninst, x1, x2, 0);
+                    u8 = x87_setround(dyn, ninst, x1, x2, x4); // x1 have the modified RPSCR reg
+                    if(MODREG) {
+                        ed = xRAX+(nextop&7)+(rex.b<<3);
+                        wback = 0;
+                    } else {
+                        addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, 0xfff<<2, 3, rex, 0, 0);
+                        ed = x1;
+                    }
+                    s0 = fpu_get_scratch(dyn);
+                    #if 0
+                    FRINT32XD(s0, v1);
+                    FCVTZSwD(ed, s0);
+                    WBACK;
+                    #else
+                    MRS_fpsr(x5);
+                    BFCw(x5, FPSR_IOC, 1);   // reset IOC bit
+                    MSR_fpsr(x5);
+                    FRINTXD(s0, v1);
+                    VFCVTZSd(s0, s0);
+                    SQXTN_S_D(s0, s0);
+                    VSTR32_U12(s0, wback, fixedaddress);
+                    MRS_fpsr(x5);   // get back FPSR to check the IOC bit
+                    TBZ_MARK3(x5, FPSR_IOC);
+                    MOV32w(x5, 0x80000000);
+                    STRw_U12(x5, wback, fixedaddress);
+                    MARK3;
+                    #endif
+                    x87_restoreround(dyn, ninst, u8);
+                    break;
+                case 3:
+                    INST_NAME("FISTP Ed, ST0");
+                    v1 = x87_get_st(dyn, ninst, x1, x2, 0);
+                    u8 = x87_setround(dyn, ninst, x1, x2, x4); // x1 have the modified RPSCR reg
+                    if(MODREG) {
+                        ed = xRAX+(nextop&7)+(rex.b<<3);
+                        wback = 0;
+                    } else {
+                        addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, 0xfff<<2, 3, rex, 0, 0);
+                        ed = x1;
+                    }
+                    s0 = fpu_get_scratch(dyn);
+                    #if 0
+                    FRINT32XD(s0, v1);
+                    FCVTZSwD(ed, s0);
+                    WBACK;
+                    #else
+                    MRS_fpsr(x5);
+                    BFCw(x5, FPSR_IOC, 1);   // reset IOC bit
+                    MSR_fpsr(x5);
+                    FRINTXD(s0, v1);
+                    VFCVTZSd(s0, s0);
+                    SQXTN_S_D(s0, s0);
+                    VSTR32_U12(s0, wback, fixedaddress);
+                    MRS_fpsr(x5);   // get back FPSR to check the IOC bit
+                    TBZ_MARK3(x5, FPSR_IOC);
+                    MOV32w(x5, 0x80000000);
+                    STRw_U12(x5, wback, fixedaddress);
+                    MARK3;
+                    #endif
+                    x87_restoreround(dyn, ninst, u8);
+                    x87_do_pop(dyn, ninst);
+                    break;
+                case 5:
+                    INST_NAME("FLD tbyte");
+                    addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0, 0, rex, 0, 0);
+                    if(PK(0)==0xDB && ((PK(1)>>3)&7)==7) {
+                        // the FLD is immediatly followed by an FSTP
+                        LDRx_U12(x5, ed, 0);
+                        LDRH_U12(x6, ed, 8);
+                        // no persistant scratch register, so unrool both instruction here...
+                        MESSAGE(LOG_DUMP, "\tHack: FSTP tbyte\n");
+                        nextop = F8;    //0xDB
+                        nextop = F8;    //modrm
+                        addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0, 0, rex, 0, 0);
+                        STRx_U12(x5, ed, 0);
+                        STRH_U12(x6, ed, 8);
+                    } else {
+                        if(ed!=x1) {
+                            MOVx_REG(x1, ed);
+                        }
+                        x87_do_push_empty(dyn, ninst, x3);
+                        CALL(arm_fld, -1);
+                    }
+                    break;
+                case 7:
+                    INST_NAME("FSTP tbyte");
+                    x87_forget(dyn, ninst, x1, x3, 0);
+                    addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0, 0, rex, 0, 0);
+                    if(ed!=x1) {
+                        MOVx_REG(x1, ed);
+                    }
+                    CALL(arm_fstp, -1);
+                    x87_do_pop(dyn, ninst);
+                    break;
+                default:
+                    DEFAULT;
+            }
+    }
+    return addr;
+}

src/dynarec/dynarec_arm64_dc.c

@@ -0,0 +1,219 @@
+#include <stdio.h>
+#include <stdlib.h>
+#include <stddef.h>
+#include <pthread.h>
+#include <errno.h>
+
+#include "debug.h"
+#include "box64context.h"
+#include "dynarec.h"
+#include "emu/x64emu_private.h"
+#include "emu/x64run_private.h"
+#include "x64run.h"
+#include "x64emu.h"
+#include "box64stack.h"
+#include "callback.h"
+#include "emu/x64run_private.h"
+#include "x64trace.h"
+#include "dynarec_arm64.h"
+#include "dynarec_arm64_private.h"
+#include "arm64_printer.h"
+#include "emu/x87emu_private.h"
+
+#include "dynarec_arm64_helper.h"
+#include "dynarec_arm64_functions.h"
+
+
+uintptr_t dynarec64_DC(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int* ok, int* need_epilog)
+{
+    (void)ip; (void)rep; (void)need_epilog;
+
+    uint8_t nextop = F8;
+    uint8_t wback;
+    int64_t fixedaddress;
+    int v1, v2;
+
+    MAYUSE(v2);
+    MAYUSE(v1);
+
+    switch(nextop) {
+        case 0xC0:
+        case 0xC1:
+        case 0xC2:
+        case 0xC3:
+        case 0xC4:
+        case 0xC5:
+        case 0xC6:
+        case 0xC7:
+            INST_NAME("FADD STx, ST0");
+            v2 = x87_get_st(dyn, ninst, x1, x2, 0);
+            v1 = x87_get_st(dyn, ninst, x1, x2, nextop&7);
+            FADDD(v1, v1, v2);
+            break;
+        case 0xC8:
+        case 0xC9:
+        case 0xCA:
+        case 0xCB:
+        case 0xCC:
+        case 0xCD:
+        case 0xCE:
+        case 0xCF:
+            INST_NAME("FMUL STx, ST0");
+            v2 = x87_get_st(dyn, ninst, x1, x2, 0);
+            v1 = x87_get_st(dyn, ninst, x1, x2, nextop&7);
+            FMULD(v1, v1, v2);
+            break;
+        case 0xD0:
+        case 0xD1:
+        case 0xD2:
+        case 0xD3:
+        case 0xD4:
+        case 0xD5:
+        case 0xD6:
+        case 0xD7:
+            INST_NAME("FCOM ST0, STx"); //yep
+            v1 = x87_get_st(dyn, ninst, x1, x2, 0);
+            v2 = x87_get_st(dyn, ninst, x1, x2, nextop&7);
+            FCMPD(v1, v2);
+            FCOM(x1, x2, x3);
+            break;
+        case 0xD8:
+        case 0xD9:
+        case 0xDA:
+        case 0xDB:
+        case 0xDC:
+        case 0xDD:
+        case 0xDE:
+        case 0xDF:
+            INST_NAME("FCOMP ST0, STx");
+            v1 = x87_get_st(dyn, ninst, x1, x2, 0);
+            v2 = x87_get_st(dyn, ninst, x1, x2, nextop&7);
+            FCMPD(v1, v2);
+            FCOM(x1, x2, x3);
+            x87_do_pop(dyn, ninst);
+            break;
+        case 0xE0:
+        case 0xE1:
+        case 0xE2:
+        case 0xE3:
+        case 0xE4:
+        case 0xE5:
+        case 0xE6:
+        case 0xE7:
+            INST_NAME("FSUBR STx, ST0");
+            v2 = x87_get_st(dyn, ninst, x1, x2, 0);
+            v1 = x87_get_st(dyn, ninst, x1, x2, nextop&7);
+            FSUBD(v1, v2, v1);
+            break;
+        case 0xE8:
+        case 0xE9:
+        case 0xEA:
+        case 0xEB:
+        case 0xEC:
+        case 0xED:
+        case 0xEE:
+        case 0xEF:
+            INST_NAME("FSUB STx, ST0");
+            v2 = x87_get_st(dyn, ninst, x1, x2, 0);
+            v1 = x87_get_st(dyn, ninst, x1, x2, nextop&7);
+            FSUBD(v1, v1, v2);
+            break;
+        case 0xF0:
+        case 0xF1:
+        case 0xF2:
+        case 0xF3:
+        case 0xF4:
+        case 0xF5:
+        case 0xF6:
+        case 0xF7:
+            INST_NAME("FDIVR STx, ST0");
+            v2 = x87_get_st(dyn, ninst, x1, x2, 0);
+            v1 = x87_get_st(dyn, ninst, x1, x2, nextop&7);
+            FDIVD(v1, v2, v1);
+            break;       
+        case 0xF8:
+        case 0xF9:
+        case 0xFA:
+        case 0xFB:
+        case 0xFC:
+        case 0xFD:
+        case 0xFE:
+        case 0xFF:
+            INST_NAME("FDIV STx, ST0");
+            v2 = x87_get_st(dyn, ninst, x1, x2, 0);
+            v1 = x87_get_st(dyn, ninst, x1, x2, nextop&7);
+            FDIVD(v1, v1, v2);
+            break;
+        default:
+            switch((nextop>>3)&7) {
+                case 0:
+                    INST_NAME("FADD ST0, double[ED]");
+                    v1 = x87_get_st(dyn, ninst, x1, x2, 0);
+                    v2 = fpu_get_scratch(dyn);
+                    addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, 0xfff<<3, 3, rex, 0, 0);
+                    VLDR64_U12(v2, wback, fixedaddress);
+                    FADDD(v1, v1, v2);
+                    break;
+                case 1:
+                    INST_NAME("FMUL ST0, double[ED]");
+                    v1 = x87_get_st(dyn, ninst, x1, x2, 0);
+                    v2 = fpu_get_scratch(dyn);
+                    addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, 0xfff<<3, 3, rex, 0, 0);
+                    VLDR64_U12(v2, wback, fixedaddress);
+                    FMULD(v1, v1, v2);
+                    break;
+                case 2:
+                    INST_NAME("FCOM ST0, double[ED]");
+                    v1 = x87_get_st(dyn, ninst, x1, x2, 0);
+                    v2 = fpu_get_scratch(dyn);
+                    addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, 0xfff<<3, 3, rex, 0, 0);
+                    VLDR64_U12(v2, wback, fixedaddress);
+                    FCMPD(v1, v2);
+                    FCOM(x1, x2, x3);
+                    break;
+                case 3:
+                    INST_NAME("FCOMP ST0, double[ED]");
+                    v1 = x87_get_st(dyn, ninst, x1, x2, 0);
+                    v2 = fpu_get_scratch(dyn);
+                    addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, 0xfff<<3, 3, rex, 0, 0);
+                    VLDR64_U12(v2, wback, fixedaddress);
+                    FCMPD(v1, v2);
+                    FCOM(x1, x2, x3);
+                    x87_do_pop(dyn, ninst);
+                    break;
+                case 4:
+                    INST_NAME("FSUB ST0, double[ED]");
+                    v1 = x87_get_st(dyn, ninst, x1, x2, 0);
+                    v2 = fpu_get_scratch(dyn);
+                    addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, 0xfff<<3, 3, rex, 0, 0);
+                    VLDR64_U12(v2, wback, fixedaddress);
+                    FSUBD(v1, v1, v2);
+                    break;
+                case 5:
+                    INST_NAME("FSUBR ST0, double[ED]");
+                    v1 = x87_get_st(dyn, ninst, x1, x2, 0);
+                    v2 = fpu_get_scratch(dyn);
+                    addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, 0xfff<<3, 3, rex, 0, 0);
+                    VLDR64_U12(v2, wback, fixedaddress);
+                    FSUBD(v1, v2, v1);
+                    break;
+                case 6:
+                    INST_NAME("FDIV ST0, double[ED]");
+                    v1 = x87_get_st(dyn, ninst, x1, x2, 0);
+                    v2 = fpu_get_scratch(dyn);
+                    addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, 0xfff<<3, 3, rex, 0, 0);
+                    VLDR64_U12(v2, wback, fixedaddress);
+                    FDIVD(v1, v1, v2);
+                    break;
+                case 7:
+                    INST_NAME("FDIVR ST0, double[ED]");
+                    v1 = x87_get_st(dyn, ninst, x1, x2, 0);
+                    v2 = fpu_get_scratch(dyn);
+                    addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, 0xfff<<3, 3, rex, 0, 0);
+                    VLDR64_U12(v2, wback, fixedaddress);
+                    FDIVD(v1, v2, v1);
+                    break;
+            }
+    }
+    return addr;
+}

src/dynarec/dynarec_arm64_dd.c

@@ -0,0 +1,205 @@
+#include <stdio.h>
+#include <stdlib.h>
+#include <stddef.h>
+#include <pthread.h>
+#include <errno.h>
+
+#include "debug.h"
+#include "box64context.h"
+#include "dynarec.h"
+#include "emu/x64emu_private.h"
+#include "emu/x64run_private.h"
+#include "x64run.h"
+#include "x64emu.h"
+#include "box64stack.h"
+#include "callback.h"
+#include "emu/x64run_private.h"
+#include "x64trace.h"
+#include "dynarec_arm64.h"
+#include "dynarec_arm64_private.h"
+#include "arm64_printer.h"
+#include "emu/x87emu_private.h"
+
+#include "dynarec_arm64_helper.h"
+#include "dynarec_arm64_functions.h"
+
+
+uintptr_t dynarec64_DD(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int* ok, int* need_epilog)
+{
+    (void)ip; (void)rep; (void)need_epilog;
+
+    uint8_t nextop = F8;
+    uint8_t ed;
+    int64_t fixedaddress;
+    int v1, v2;
+    int s0;
+
+    MAYUSE(s0);
+    MAYUSE(v2);
+    MAYUSE(v1);
+
+    switch(nextop) {
+        case 0xC0:
+        case 0xC1:
+        case 0xC2:
+        case 0xC3:
+        case 0xC4:
+        case 0xC5:
+        case 0xC6:
+        case 0xC7:
+            INST_NAME("FFREE STx");
+            MESSAGE(LOG_DUMP, "Need Optimization\n");
+            x87_purgecache(dyn, ninst, x1, x2, x3);
+            MOV32w(x1, nextop-0xC0);
+            CALL(fpu_do_free, -1);
+            break;
+        case 0xD0:
+        case 0xD1:
+        case 0xD2:
+        case 0xD3:
+        case 0xD4:
+        case 0xD5:
+        case 0xD6:
+        case 0xD7:
+            INST_NAME("FST ST0, STx");
+            v1 = x87_get_st(dyn, ninst, x1, x2, 0);
+            v2 = x87_get_st(dyn, ninst, x1, x2, nextop&7);
+            FMOVD(v2, v1);
+            break;
+        case 0xD8:
+            INST_NAME("FSTP ST0, ST0");
+            x87_do_pop(dyn, ninst);
+            break;
+        case 0xD9:
+        case 0xDA:
+        case 0xDB:
+        case 0xDC:
+        case 0xDD:
+        case 0xDE:
+        case 0xDF:
+            INST_NAME("FSTP ST0, STx");
+            v1 = x87_get_st(dyn, ninst, x1, x2, 0);
+            v2 = x87_get_st(dyn, ninst, x1, x2, nextop&7);
+            FMOVD(v2, v1);
+            x87_do_pop(dyn, ninst);
+            break;
+
+        case 0xE0:
+        case 0xE1:
+        case 0xE2:
+        case 0xE3:
+        case 0xE4:
+        case 0xE5:
+        case 0xE6:
+        case 0xE7:
+            INST_NAME("FUCOM ST0, STx");
+            v1 = x87_get_st(dyn, ninst, x1, x2, 0);
+            v2 = x87_get_st(dyn, ninst, x1, x2, nextop&7);
+            FCMPD(v1, v2);
+            FCOM(x1, x2, x3);
+            break;
+        case 0xE8:
+        case 0xE9:
+        case 0xEA:
+        case 0xEB:
+        case 0xEC:
+        case 0xED:
+        case 0xEE:
+        case 0xEF:
+            INST_NAME("FUCOMP ST0, STx");
+            v1 = x87_get_st(dyn, ninst, x1, x2, 0);
+            v2 = x87_get_st(dyn, ninst, x1, x2, nextop&7);
+            FCMPD(v1, v2);
+            FCOM(x1, x2, x3);
+            x87_do_pop(dyn, ninst);
+            break;
+
+        case 0xC8:
+        case 0xC9:
+        case 0xCA:
+        case 0xCB:
+        case 0xCC:
+        case 0xCD:
+        case 0xCE:
+        case 0xCF:
+        case 0xF0:
+        case 0xF1:
+        case 0xF2:
+        case 0xF3:
+        case 0xF4:
+        case 0xF5:
+        case 0xF6:
+        case 0xF7:
+        case 0xF8:
+        case 0xF9:
+        case 0xFA:
+        case 0xFB:
+        case 0xFC:
+        case 0xFD:
+        case 0xFE:
+        case 0xFF:
+            DEFAULT;
+            break;
+
+        default:
+            switch((nextop>>3)&7) {
+                case 0:
+                    INST_NAME("FLD double");
+                    v1 = x87_do_push(dyn, ninst);
+                    addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0xfff<<3, 7, rex, 0, 0);
+                    VLDR64_U12(v1, ed, fixedaddress);
+                    break;
+                case 1:
+                    INST_NAME("FISTTP i64, ST0");
+                    v1 = x87_do_push(dyn, ninst);
+                    addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0xfff<<3, 7, rex, 0, 0);
+                    s0 = fpu_get_scratch(dyn);
+                    FRINT64ZD(s0, v1);
+                    FCVTZSxD(x2, s0);
+                    STRx_U12(x2, ed, fixedaddress);
+                    x87_do_pop(dyn, ninst);
+                    break;
+                case 2:
+                    INST_NAME("FST double");
+                    v1 = x87_get_st(dyn, ninst, x1, x2, 0);
+                    addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0xfff<<3, 7, rex, 0, 0);
+                    VSTR64_U12(v1, ed, fixedaddress);
+                    break;
+                case 3:
+                    INST_NAME("FSTP double");
+                    v1 = x87_get_st(dyn, ninst, x1, x2, 0);
+                    addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0xfff<<3, 7, rex, 0, 0);
+                    VSTR64_U12(v1, ed, fixedaddress);
+                    x87_do_pop(dyn, ninst);
+                    break;
+                case 4: 
+                    INST_NAME("FRSTOR m108byte");
+                    MESSAGE(LOG_DUMP, "Need Optimization\n");
+                    fpu_purgecache(dyn, ninst, x1, x2, x3);
+                    addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0, 0, rex, 0, 0);
+                    if(ed!=x1) {MOVx_REG(x1, ed);}
+                    CALL(arm_frstor, -1);
+                    break;
+                case 6: 
+                    INST_NAME("FSAVE m108byte");
+                    MESSAGE(LOG_DUMP, "Need Optimization\n");
+                    fpu_purgecache(dyn, ninst, x1, x2, x3);
+                    addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0, 0, rex, 0, 0);
+                    if(ed!=x1) {MOVx_REG(x1, ed);}
+                    CALL(arm_fsave, -1);
+                    break;
+                case 7:
+                    INST_NAME("FNSTSW m2byte");
+                    fpu_purgecache(dyn, ninst, x1, x2, x3);
+                    addr = geted(dyn, addr, ninst, nextop, &ed, x4, &fixedaddress, 0xfff<<1, 1, rex, 0, 0);
+                    LDRw_U12(x1, xEmu, offsetof(x64emu_t, top));
+                    LDRH_U12(x3, xEmu, offsetof(x64emu_t, sw));
+                    BFIw(x3, x1, 11, 3); // inject TOP at bit 11 (3 bits)
+                    STRH_U12(x3, ed, fixedaddress);   // store whole sw flags
+                    break;
+                default:
+                    DEFAULT;
+            }
+    }
+    return addr;
+}

src/dynarec/dynarec_arm64_df.c

@@ -0,0 +1,295 @@
+#include <stdio.h>
+#include <stdlib.h>
+#include <stddef.h>
+#include <pthread.h>
+#include <errno.h>
+
+#include "debug.h"
+#include "box64context.h"
+#include "dynarec.h"
+#include "emu/x64emu_private.h"
+#include "emu/x64run_private.h"
+#include "x64run.h"
+#include "x64emu.h"
+#include "box64stack.h"
+#include "callback.h"
+#include "emu/x64run_private.h"
+#include "x64trace.h"
+#include "dynarec_arm64.h"
+#include "dynarec_arm64_private.h"
+#include "arm64_printer.h"
+#include "emu/x87emu_private.h"
+
+#include "dynarec_arm64_helper.h"
+#include "dynarec_arm64_functions.h"
+
+
+uintptr_t dynarec64_DF(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int* ok, int* need_epilog)
+{
+    (void)ip; (void)rep; (void)need_epilog;
+
+    uint8_t nextop = F8;
+    uint8_t ed, wback, u8;
+    int v1, v2;
+    int s0;
+    int64_t j64;
+    int64_t fixedaddress;
+
+    MAYUSE(s0);
+    MAYUSE(v2);
+    MAYUSE(v1);
+    MAYUSE(j64);
+
+    switch(nextop) {
+        case 0xC0:
+        case 0xC1:
+        case 0xC2:
+        case 0xC3:
+        case 0xC4:
+        case 0xC5:
+        case 0xC6:
+        case 0xC7:
+            INST_NAME("FFREEP STx");
+            // not handling Tag...
+            x87_do_pop(dyn, ninst);
+            break;
+
+        case 0xE0:
+            INST_NAME("FNSTSW AX");
+            LDRw_U12(x2, xEmu, offsetof(x64emu_t, top));
+            LDRH_U12(x1, xEmu, offsetof(x64emu_t, sw));
+            BFIw(x1, x2, 11, 3); // inject top
+            BFIw(xRAX, x1, 0, 16);
+            break;
+        case 0xE8:
+        case 0xE9:
+        case 0xEA:
+        case 0xEB:
+        case 0xEC:
+        case 0xED:
+        case 0xEE:
+        case 0xEF:
+            INST_NAME("FUCOMIP ST0, STx");
+            SETFLAGS(X_ALL, SF_SET);
+            v1 = x87_get_st(dyn, ninst, x1, x2, 0);
+            v2 = x87_get_st(dyn, ninst, x1, x2, nextop&7);
+            FCMPD(v1, v2);
+            FCOMI(x1, x2);
+            x87_do_pop(dyn, ninst);
+            break;
+        case 0xF0:
+        case 0xF1:
+        case 0xF2:
+        case 0xF3:
+        case 0xF4:
+        case 0xF5:
+        case 0xF6:
+        case 0xF7:
+            INST_NAME("FCOMIP ST0, STx");
+            SETFLAGS(X_ALL, SF_SET);
+            v1 = x87_get_st(dyn, ninst, x1, x2, 0);
+            v2 = x87_get_st(dyn, ninst, x1, x2, nextop&7);
+            FCMPD(v1, v2);
+            FCOMI(x1, x2);
+            x87_do_pop(dyn, ninst);
+            break;
+
+        case 0xC8:
+        case 0xC9:
+        case 0xCA:
+        case 0xCB:
+        case 0xCC:
+        case 0xCD:
+        case 0xCE:
+        case 0xCF:
+        case 0xD0:
+        case 0xD1:
+        case 0xD2:
+        case 0xD3:
+        case 0xD4:
+        case 0xD5:
+        case 0xD6:
+        case 0xD7:
+        case 0xD8:
+        case 0xD9:
+        case 0xDA:
+        case 0xDB:
+        case 0xDC:
+        case 0xDD:
+        case 0xDE:
+        case 0xDF:
+        case 0xE1:
+        case 0xE2:
+        case 0xE3:
+        case 0xE4:
+        case 0xE5:
+        case 0xE6:
+        case 0xE7:
+        case 0xF8:
+        case 0xF9:
+        case 0xFA:
+        case 0xFB:
+        case 0xFC:
+        case 0xFD:
+        case 0xFE:
+        case 0xFF:
+            DEFAULT;
+            break;
+
+        default:
+            switch((nextop>>3)&7) {
+                case 0:
+                    INST_NAME("FILD ST0, Ew");
+                    v1 = x87_do_push(dyn, ninst);
+                    addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, 0xfff<<1, 1, rex, 0, 0);
+                    LDRSHw_U12(x1, wback, fixedaddress);
+                    SCVTFDw(v1, x1);
+                    break;
+                case 1:
+                    INST_NAME("FISTTP Ew, ST0");
+                    v1 = x87_get_st(dyn, ninst, x1, x2, 0);
+                    addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, 0xfff<<1, 1, rex, 0, 0);
+                    ed = x1;
+                    s0 = fpu_get_scratch(dyn);
+                    #if 0
+                    // this version needs ARM v8.5, //TODO: add detection of this extensio to use it
+                    FRINT32ZD(s0, v1);
+                    // no saturation instruction on Arm, so using NEON
+                    VFCVTZSd(s0, s0);
+                    SQXTN_S_D(s0, s0);
+                    SQXTN_H_S(s0, s0);
+                    VSTR16_U12(s0, wback, fixedaddress);
+                    #else
+                    MRS_fpsr(x5);
+                    BFCw(x5, FPSR_IOC, 1);   // reset IOC bit
+                    MSR_fpsr(x5);
+                    VFCVTZSd(s0, v1);
+                    SQXTN_S_D(s0, s0);
+                    SQXTN_H_S(s0, s0);
+                    VSTR16_U12(s0, wback, fixedaddress);
+                    MRS_fpsr(x5);   // get back FPSR to check the IOC bit
+                    TBZ_MARK3(x5, FPSR_IOC);
+                    MOV32w(x5, 0x8000);
+                    STRH_U12(x5, wback, fixedaddress);
+                    MARK3;
+                    #endif
+                    x87_do_pop(dyn, ninst);
+                    break;
+                case 2:
+                    INST_NAME("FIST Ew, ST0");
+                    v1 = x87_get_st(dyn, ninst, x1, x2, 0);
+                    u8 = x87_setround(dyn, ninst, x1, x2, x4);
+                    addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, 0xfff<<1, 1, rex, 0, 0);
+                    ed = x1;
+                    s0 = fpu_get_scratch(dyn);
+                    #if 0
+                    FRINT32XD(s0, v1);
+                    // no saturation instruction on Arm, so using NEON
+                    VFCVTZSd(s0, s0);
+                    SQXTN_S_D(s0, s0);
+                    SQXTN_H_S(s0, s0);
+                    VSTR16_U12(s0, wback, fixedaddress);
+                    #else
+                    MRS_fpsr(x5);
+                    BFCw(x5, FPSR_IOC, 1);   // reset IOC bit
+                    MSR_fpsr(x5);
+                    FRINTXD(s0, v1);
+                    VFCVTZSd(s0, s0);
+                    SQXTN_S_D(s0, s0);
+                    SQXTN_H_S(s0, s0);
+                    VSTR16_U12(s0, wback, fixedaddress);
+                    MRS_fpsr(x5);   // get back FPSR to check the IOC bit
+                    TBZ_MARK3(x5, FPSR_IOC);
+                    MOV32w(x5, 0x8000);
+                    STRH_U12(x5, wback, fixedaddress);
+                    MARK3;
+                    #endif
+                    x87_restoreround(dyn, ninst, u8);
+                    break;
+                case 3:
+                    INST_NAME("FISTP Ew, ST0");
+                    v1 = x87_get_st(dyn, ninst, x1, x2, 0);
+                    u8 = x87_setround(dyn, ninst, x1, x2, x4);
+                    addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, 0xfff<<1, 1, rex, 0, 0);
+                    ed = x1;
+                    s0 = fpu_get_scratch(dyn);
+                    #if 0
+                    FRINT32XD(s0, v1);
+                    // no saturation instruction on Arm, so using NEON
+                    VFCVTZSd(s0, s0);
+                    SQXTN_S_D(s0, s0);
+                    SQXTN_H_S(s0, s0);
+                    VSTR16_U12(s0, wback, fixedaddress);
+                    #else
+                    MRS_fpsr(x5);
+                    BFCw(x5, FPSR_IOC, 1);   // reset IOC bit
+                    MSR_fpsr(x5);
+                    FRINTXD(s0, v1);
+                    VFCVTZSd(s0, s0);
+                    SQXTN_S_D(s0, s0);
+                    SQXTN_H_S(s0, s0);
+                    VSTR16_U12(s0, wback, fixedaddress);
+                    MRS_fpsr(x5);   // get back FPSR to check the IOC bit
+                    TBZ_MARK3(x5, FPSR_IOC);
+                    MOV32w(x5, 0x8000);
+                    STRH_U12(x5, wback, fixedaddress);
+                    MARK3;
+                    #endif
+                    x87_do_pop(dyn, ninst);
+                    x87_restoreround(dyn, ninst, u8);
+                    break;
+                case 4:
+                    INST_NAME("FBLD ST0, tbytes");
+                    x87_do_push_empty(dyn, ninst, x1);
+                    addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0, 0, rex, 0, 0);
+                    if(ed!=x1) {MOVx_REG(x1, ed);}
+                    CALL(fpu_fbld, -1);
+                    break;
+                case 5:
+                    INST_NAME("FILD ST0, i64");
+                    v1 = x87_do_push(dyn, ninst);
+                    addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, 0xfff<<3, 7, rex, 0, 0);
+                    LDRx_U12(x1, wback, fixedaddress);
+                    SCVTFDx(v1, x1);
+                    break;
+                case 6:
+                    INST_NAME("FBSTP tbytes, ST0");
+                    x87_forget(dyn, ninst, x1, x2, 0);
+                    addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0, 0, rex, 0, 0);
+                    if(ed!=x1) {MOVx_REG(x1, ed);}
+                    CALL(fpu_fbst, -1);
+                    x87_do_pop(dyn, ninst);
+                    break;
+                case 7:
+                    INST_NAME("FISTP i64, ST0");
+                    v1 = x87_get_st(dyn, ninst, x1, x2, 0);
+                    u8 = x87_setround(dyn, ninst, x1, x2, x4);
+                    addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, 0xfff<<3, 7, rex, 0, 0);
+                    ed = x1;
+                    s0 = fpu_get_scratch(dyn);
+                    #if 0
+                    FRINT64XD(s0, v1);
+                    VFCVTZSd(s0, s0);
+                    VSTR64_U12(s0, wback, fixedaddress);
+                    #else
+                    MRS_fpsr(x5);
+                    BFCw(x5, FPSR_IOC, 1);   // reset IOC bit
+                    MSR_fpsr(x5);
+                    FRINTXD(s0, v1);
+                    VFCVTZSd(s0, s0);
+                    VSTR64_U12(s0, wback, fixedaddress);
+                    MRS_fpsr(x5);   // get back FPSR to check the IOC bit
+                    TBZ_MARK3(x5, FPSR_IOC);
+                    MOV64x(x5, 0x8000000000000000LL);
+                    STRx_U12(x5, wback, fixedaddress);
+                    MARK3;
+                    #endif
+                    x87_restoreround(dyn, ninst, u8);
+                    x87_do_pop(dyn, ninst);
+                    break;
+                default:
+                    DEFAULT;
+            }
+    }
+    return addr;
+}

src/dynarec/dynarec_arm64_emit_logic.c

@@ -23,9 +23,10 @@
 #include "dynarec_arm64_functions.h"
 #include "dynarec_arm64_helper.h"
 
-// emit OR32 instruction, from s1 , s2, store result in s1 using s3 and s4 as scratch
+// emit OR32 instruction, from s1, s2, store result in s1 using s3 and s4 as scratch
 void emit_or32(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int s2, int s3, int s4)
 {
+    MAYUSE(s2);
     IFX(X_PEND) {
         STRxw_U12(s1, xEmu, offsetof(x64emu_t, op1));
         STRxw_U12(s2, xEmu, offsetof(x64emu_t, op2));
@@ -89,9 +90,10 @@ void emit_or32c(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int64_t c, int
     }
 }
 
-// emit XOR32 instruction, from s1 , s2, store result in s1 using s3 and s4 as scratch
+// emit XOR32 instruction, from s1, s2, store result in s1 using s3 and s4 as scratch
 void emit_xor32(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int s2, int s3, int s4)
 {
+    MAYUSE(s2);
     IFX(X_PEND) {
         STRxw_U12(s1, xEmu, offsetof(x64emu_t, op1));
         STRxw_U12(s2, xEmu, offsetof(x64emu_t, op2));
@@ -155,9 +157,10 @@ void emit_xor32c(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int64_t c, in
     }
 }
 
-// emit AND32 instruction, from s1 , s2, store result in s1 using s3 and s4 as scratch
+// emit AND32 instruction, from s1, s2, store result in s1 using s3 and s4 as scratch
 void emit_and32(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int s2, int s3, int s4)
 {
+    MAYUSE(s2);
     IFX(X_PEND) {
         STRxw_U12(s1, xEmu, offsetof(x64emu_t, op1));
         STRxw_U12(s2, xEmu, offsetof(x64emu_t, op2));
@@ -227,9 +230,10 @@ void emit_and32c(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int64_t c, in
     }
 }
 
-// emit OR8 instruction, from s1 , s2, store result in s1 using s3 and s4 as scratch, s4 can be same as s2 (and so s2 destroyed)
+// emit OR8 instruction, from s1, s2, store result in s1 using s3 and s4 as scratch, s4 can be same as s2 (and so s2 destroyed)
 void emit_or8(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4)
 {
+    MAYUSE(s2);
     IFX(X_PEND) {
         STRB_U12(s1, xEmu, offsetof(x64emu_t, op1));
         STRB_U12(s2, xEmu, offsetof(x64emu_t, op2));
@@ -292,9 +296,10 @@ void emit_or8c(dynarec_arm_t* dyn, int ninst, int s1, int32_t c, int s3, int s4)
     }
 }
 
-// emit XOR8 instruction, from s1 , s2, store result in s1 using s3 and s4 as scratch, s4 can be same as s2 (and so s2 destroyed)
+// emit XOR8 instruction, from s1, s2, store result in s1 using s3 and s4 as scratch, s4 can be same as s2 (and so s2 destroyed)
 void emit_xor8(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4)
 {
+    MAYUSE(s2);
     IFX(X_PEND) {
         STRB_U12(s1, xEmu, offsetof(x64emu_t, op1));
         STRB_U12(s2, xEmu, offsetof(x64emu_t, op2));
@@ -357,9 +362,10 @@ void emit_xor8c(dynarec_arm_t* dyn, int ninst, int s1, int32_t c, int s3, int s4
     }
 }
 
-// emit AND8 instruction, from s1 , s2, store result in s1 using s3 and s4 as scratch, s4 can be same as s2 (and so s2 destroyed)
+// emit AND8 instruction, from s1, s2, store result in s1 using s3 and s4 as scratch, s4 can be same as s2 (and so s2 destroyed)
 void emit_and8(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4)
 {
+    MAYUSE(s2);
     IFX(X_PEND) {
         STRB_U12(s1, xEmu, offsetof(x64emu_t, op1));
         STRB_U12(s2, xEmu, offsetof(x64emu_t, op2));
@@ -429,9 +435,10 @@ void emit_and8c(dynarec_arm_t* dyn, int ninst, int s1, int32_t c, int s3, int s4
 }
 
 
-// emit OR16 instruction, from s1 , s2, store result in s1 using s3 and s4 as scratch, s4 can be same as s2 (and so s2 destroyed)
+// emit OR16 instruction, from s1, s2, store result in s1 using s3 and s4 as scratch, s4 can be same as s2 (and so s2 destroyed)
 void emit_or16(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4)
 {
+    MAYUSE(s2);
     IFX(X_PEND) {
         STRH_U12(s1, xEmu, offsetof(x64emu_t, op1));
         STRH_U12(s2, xEmu, offsetof(x64emu_t, op2));
@@ -507,9 +514,10 @@ void emit_or16(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4)
 //    }
 //}
 
-// emit XOR16 instruction, from s1 , s2, store result in s1 using s3 and s4 as scratch, s4 can be same as s2 (and so s2 destroyed)
+// emit XOR16 instruction, from s1, s2, store result in s1 using s3 and s4 as scratch, s4 can be same as s2 (and so s2 destroyed)
 void emit_xor16(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4)
 {
+    MAYUSE(s2);
     IFX(X_PEND) {
         STRH_U12(s1, xEmu, offsetof(x64emu_t, op1));
         STRH_U12(s2, xEmu, offsetof(x64emu_t, op2));
@@ -585,9 +593,10 @@ void emit_xor16(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4)
 //    }
 //}
 
-// emit AND16 instruction, from s1 , s2, store result in s1 using s3 and s4 as scratch, s4 can be same as s2 (and so s2 destroyed)
+// emit AND16 instruction, from s1, s2, store result in s1 using s3 and s4 as scratch, s4 can be same as s2 (and so s2 destroyed)
 void emit_and16(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4)
 {
+    MAYUSE(s2);
     IFX(X_PEND) {
         STRH_U12(s1, xEmu, offsetof(x64emu_t, op1));
         STRH_U12(s2, xEmu, offsetof(x64emu_t, op2));
@@ -667,4 +676,4 @@ void emit_and16(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4)
 //    IFX(X_PF) {
 //        emit_pf(dyn, ninst, s1, s3, s4);
 //    }
-//}
+//}

src/dynarec/dynarec_arm64_emit_math.c

@@ -23,9 +23,10 @@
 #include "dynarec_arm64_functions.h"
 #include "dynarec_arm64_helper.h"
 
-// emit ADD32 instruction, from s1 , s2, store result in s1 using s3 and s4 as scratch
+// emit ADD32 instruction, from s1, s2, store result in s1 using s3 and s4 as scratch
 void emit_add32(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int s2, int s3, int s4)
 {
+    MAYUSE(s2);
     IFX(X_PEND) {
         STRxw_U12(s1, xEmu, offsetof(x64emu_t, op1));
         STRxw_U12(s2, xEmu, offsetof(x64emu_t, op2));
@@ -51,21 +52,17 @@ void emit_add32(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int s2, int s3
         LSRxw(s4, s3, 3);
         BFIxw(xFlags, s4, F_AF, 1);    // AF: bc & 0x08
     }
-    IFX(X_ZF|X_CF|X_OF) {
-        MOV32w(s3, (1<<F_ZF)|(1<<F_CF)|(1<<F_OF));
-        BICx(xFlags, xFlags, s3);
-    }
     IFX(X_ZF) {
-        Bcond(cNE, +8);
-        ORRw_mask(xFlags, xFlags, 0b011010, 0); // mask=0x40
+        CSETw(s4, cEQ);
+        BFIw(xFlags, s4, F_ZF, 1);
     }
     IFX(X_CF) {
-        Bcond(cCC, +8);
-        ORRw_mask(xFlags, xFlags, 0, 0);    // mask=0x01
+        CSETw(s4, cCS);
+        BFIw(xFlags, s4, F_CF, 1);
     }
     IFX(X_OF) {
-        Bcond(cVC, +8);
-        ORRw_mask(xFlags, xFlags, 0b010101, 0);  // mask=0x800
+        CSETw(s4, cVS);
+        BFIw(xFlags, s4, F_OF, 1);
     }
     IFX(X_SF) {
         LSRxw(s3, s1, (rex.w)?63:31);
@@ -76,9 +73,10 @@ void emit_add32(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int s2, int s3
     }
 }
 
-// emit ADD32 instruction, from s1 , constant c, store result in s1 using s3 and s4 as scratch
+// emit ADD32 instruction, from s1, constant c, store result in s1 using s3 and s4 as scratch
 void emit_add32c(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int64_t c, int s3, int s4, int s5)
 {
+    MAYUSE(s5);
     if(s1==xRSP && (!dyn->insts || dyn->insts[ninst].x64.need_flags==X_PEND))
     {
         // special case when doing math on ESP and only PEND is needed: ignoring it!
@@ -126,21 +124,17 @@ void emit_add32c(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int64_t c, in
         LSRxw(s4, s3, 3);
         BFIxw(xFlags, s4, F_AF, 1);    // AF: bc & 0x08
     }
-    IFX(X_ZF|X_CF|X_OF) {
-        MOV32w(s3, (1<<F_ZF)|(1<<F_CF)|(1<<F_OF));
-        BICx(xFlags, xFlags, s3);
-    }
     IFX(X_ZF) {
-        Bcond(cNE, +8);
-        ORRw_mask(xFlags, xFlags, 0b011010, 0); // mask=0x40
+        CSETw(s4, cEQ);
+        BFIw(xFlags, s4, F_ZF, 1);
     }
     IFX(X_CF) {
-        Bcond(cCC, +8);
-        ORRw_mask(xFlags, xFlags, 0, 0);    // mask=0x01
+        CSETw(s4, cCS);
+        BFIw(xFlags, s4, F_CF, 1);
     }
     IFX(X_OF) {
-        Bcond(cVC, +8);
-        ORRw_mask(xFlags, xFlags, 0b010101, 0);  // mask=0x800
+        CSETw(s4, cVS);
+        BFIw(xFlags, s4, F_OF, 1);
     }
     IFX(X_SF) {
         LSRxw(s3, s1, (rex.w)?63:31);
@@ -151,9 +145,10 @@ void emit_add32c(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int64_t c, in
     }
 }
 
-// emit SUB32 instruction, from s1 , s2, store result in s1 using s3 and s4 as scratch
+// emit SUB32 instruction, from s1, s2, store result in s1 using s3 and s4 as scratch
 void emit_sub32(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int s2, int s3, int s4)
 {
+    MAYUSE(s2);
     IFX(X_PEND) {
         STRxw_U12(s1, xEmu, offsetof(x64emu_t, op1));
         STRxw_U12(s2, xEmu, offsetof(x64emu_t, op2));
@@ -180,22 +175,18 @@ void emit_sub32(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int s2, int s3
         LSRxw(s4, s3, 3);
         BFIx(xFlags, s4, F_AF, 1);    // AF: bc & 0x08
     }
-    IFX(X_ZF|X_CF|X_OF) {
-        MOV32w(s3, (1<<F_ZF)|(1<<F_CF)|(1<<F_OF));
-        BICx(xFlags, xFlags, s3);
-    }
     IFX(X_ZF) {
-        Bcond(cNE, +8);
-        ORRw_mask(xFlags, xFlags, 0b011010, 0); // mask=0x40
+        CSETw(s4, cEQ);
+        BFIw(xFlags, s4, F_ZF, 1);
     }
     IFX(X_CF) {
         // inverted carry
-        Bcond(cCS, +8);
-        ORRw_mask(xFlags, xFlags, 0, 0);    // mask=0x01
+        CSETw(s4, cCC);
+        BFIw(xFlags, s4, F_CF, 1);
     }
     IFX(X_OF) {
-        Bcond(cVC, +8);
-        ORRw_mask(xFlags, xFlags, 0b010101, 0);  // mask=0x800
+        CSETw(s4, cVS);
+        BFIw(xFlags, s4, F_OF, 1);
     }
     IFX(X_SF) {
         LSRxw(s3, s1, (rex.w)?63:31);
@@ -206,9 +197,10 @@ void emit_sub32(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int s2, int s3
     }
 }
 
-// emit SUB32 instruction, from s1 , constant c, store result in s1 using s3 and s4 as scratch
+// emit SUB32 instruction, from s1, constant c, store result in s1 using s3 and s4 as scratch
 void emit_sub32c(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int64_t c, int s3, int s4, int s5)
 {
+    MAYUSE(s5);
     if(s1==xRSP && (!dyn->insts || dyn->insts[ninst].x64.need_flags==X_PEND))
     {
         // special case when doing math on RSP and only PEND is needed: ignoring it!
@@ -256,22 +248,18 @@ void emit_sub32c(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int64_t c, in
         LSRxw(s4, s3, 3);
         BFIw(xFlags, s4, F_AF, 1);    // AF: bc & 0x08
     }
-    IFX(X_ZF|X_CF|X_OF) {
-        MOV32w(s3, (1<<F_ZF)|(1<<F_CF)|(1<<F_OF));
-        BICx(xFlags, xFlags, s3);
-    }
     IFX(X_ZF) {
-        Bcond(cNE, +8);
-        ORRw_mask(xFlags, xFlags, 0b011010, 0); // mask=0x40
+        CSETw(s4, cEQ);
+        BFIw(xFlags, s4, F_ZF, 1);
     }
     IFX(X_CF) {
         // inverted carry
-        Bcond(cCS, +8);
-        ORRw_mask(xFlags, xFlags, 0, 0);    // mask=0x01
+        CSETw(s4, cCC);
+        BFIw(xFlags, s4, F_CF, 1);
     }
     IFX(X_OF) {
-        Bcond(cVC, +8);
-        ORRw_mask(xFlags, xFlags, 0b010101, 0);  // mask=0x800
+        CSETw(s4, cVS);
+        BFIw(xFlags, s4, F_OF, 1);
     }
     IFX(X_SF) {
         LSRxw(s3, s1, (rex.w)?63:31);
@@ -282,9 +270,10 @@ void emit_sub32c(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int64_t c, in
     }
 }
 
-// emit ADD8 instruction, from s1 , s2, store result in s1 using s3 and s4 as scratch, with save_s4 is s4 need to be saved
+// emit ADD8 instruction, from s1, s2, store result in s1 using s3 and s4 as scratch
 void emit_add8(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4)
 {
+    MAYUSE(s2);
     IFX(X_PEND) {
         STRB_U12(s1, xEmu, offsetof(x64emu_t, op1));
         STRB_U12(s2, xEmu, offsetof(x64emu_t, op2));
@@ -331,7 +320,7 @@ void emit_add8(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4)
     }
 }
 
-// emit ADD8 instruction, from s1 , const c, store result in s1 using s3 and s4 as scratch, with save_s4 is s4 need to be saved
+// emit ADD8 instruction, from s1, const c, store result in s1 using s3 and s4 as scratch
 void emit_add8c(dynarec_arm_t* dyn, int ninst, int s1, int c, int s3, int s4)
 {
     IFX(X_PEND) {
@@ -383,9 +372,10 @@ void emit_add8c(dynarec_arm_t* dyn, int ninst, int s1, int c, int s3, int s4)
     }
 }
 
-// emit SUB8 instruction, from s1 , s2, store result in s1 using s3 and s4 as scratch, with save_s4 is s4 need to be saved
+// emit SUB8 instruction, from s1, s2, store result in s1 using s3 and s4 as scratch
 void emit_sub8(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4)
 {
+    MAYUSE(s2);
     IFX(X_PEND) {
         STRB_U12(s1, xEmu, offsetof(x64emu_t, op1));
         STRB_U12(s2, xEmu, offsetof(x64emu_t, op2));
@@ -434,9 +424,10 @@ void emit_sub8(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4)
     }
 }
 
-// emit SUB8 instruction, from s1 , constant c, store result in s1 using s3 and s4 as scratch
+// emit SUB8 instruction, from s1, constant c, store result in s1 using s3 and s4 as scratch
 void emit_sub8c(dynarec_arm_t* dyn, int ninst, int s1, int c, int s3, int s4, int s5)
 {
+    MAYUSE(s5);
     IFX(X_ALL|X_PEND) {
         MOV32w(s5, c&0xff);
     }
@@ -491,9 +482,10 @@ void emit_sub8c(dynarec_arm_t* dyn, int ninst, int s1, int c, int s3, int s4, in
     }
 }
 
-// emit ADD16 instruction, from s1 , s2, store result in s1 using s3 and s4 as scratch, with save_s4 is s4 need to be saved
+// emit ADD16 instruction, from s1, s2, store result in s1 using s3 and s4 as scratch
 void emit_add16(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4)
 {
+    MAYUSE(s2);
     IFX(X_PEND) {
         STRH_U12(s1, xEmu, offsetof(x64emu_t, op1));
         STRH_U12(s2, xEmu, offsetof(x64emu_t, op2));
@@ -541,7 +533,7 @@ void emit_add16(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4)
     }
 }
 
-// emit ADD16 instruction, from s1 , const c, store result in s1 using s3 and s4 as scratch, with save_s4 is s4 need to be saved
+// emit ADD16 instruction, from s1, const c, store result in s1 using s3 and s4 as scratch
 //void emit_add16c(dynarec_arm_t* dyn, int ninst, int s1, int c, int s3, int s4)
 //{
 //    IFX(X_PEND) {
@@ -608,9 +600,10 @@ void emit_add16(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4)
 //    }
 //}
 
-// emit SUB16 instruction, from s1 , s2, store result in s1 using s3 and s4 as scratch, with save_s4 is s4 need to be saved
+// emit SUB16 instruction, from s1, s2, store result in s1 using s3 and s4 as scratch
 void emit_sub16(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4)
 {
+    MAYUSE(s2);
     IFX(X_PEND) {
         STRH_U12(s1, xEmu, offsetof(x64emu_t, op1));
         STRH_U12(s2, xEmu, offsetof(x64emu_t, op2));
@@ -659,7 +652,7 @@ void emit_sub16(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4)
     }
 }
 
-// emit SUB16 instruction, from s1 , constant c, store result in s1 using s3 and s4 as scratch
+// emit SUB16 instruction, from s1, constant c, store result in s1 using s3 and s4 as scratch
 //void emit_sub16c(dynarec_arm_t* dyn, int ninst, int s1, int c, int s3, int s4)
 //{
 //    IFX(X_PEND) {
@@ -756,17 +749,13 @@ void emit_inc32(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int s3, int s4
         LSRxw(s4, s3, 3);
         BFIxw(xFlags, s4, F_AF, 1);    // AF: bc & 0x08
     }
-    IFX(X_ZF|X_OF) {
-        MOV32w(s3, (1<<F_ZF)|(1<<F_OF));
-        BICx(xFlags, xFlags, s3);
-    }
     IFX(X_ZF) {
-        Bcond(cNE, +8);
-        ORRw_mask(xFlags, xFlags, 0b011010, 0); // mask=0x40
+        CSETw(s4, cEQ);
+        BFIw(xFlags, s4, F_ZF, 1);
     }
     IFX(X_OF) {
-        Bcond(cVC, +8);
-        ORRw_mask(xFlags, xFlags, 0b010101, 0);  // mask=0x800
+        CSETw(s4, cVS);
+        BFIw(xFlags, s4, F_OF, 1);
     }
     IFX(X_SF) {
         LSRxw(s3, s1, rex.w?63:31);
@@ -777,7 +766,7 @@ void emit_inc32(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int s3, int s4
     }
 }
 
-// emit INC8 instruction, from s1, store result in s1 using s3 and s4 as scratch, with save_s4 is s4 need to be saved
+// emit INC8 instruction, from s1, store result in s1 using s3 and s4 as scratch
 void emit_inc8(dynarec_arm_t* dyn, int ninst, int s1, int s3, int s4)
 {
     IFX(X_PEND) {
@@ -822,7 +811,7 @@ void emit_inc8(dynarec_arm_t* dyn, int ninst, int s1, int s3, int s4)
     }
 }
 
-// emit INC16 instruction, from s1 , store result in s1 using s3 and s4 as scratch, with save_s4 is s4 need to be saved
+// emit INC16 instruction, from s1, store result in s1 using s3 and s4 as scratch
 void emit_inc16(dynarec_arm_t* dyn, int ninst, int s1, int s3, int s4)
 {
     IFX(X_PEND) {
@@ -900,17 +889,13 @@ void emit_dec32(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int s3, int s4
         LSRxw(s4, s3, 3);
         BFIw(xFlags, s4, F_AF, 1);    // AF: bc & 0x08
     }
-    IFX(X_ZF|X_OF) {
-        MOV32w(s3, (1<<F_ZF)|(1<<F_OF));
-        BICx(xFlags, xFlags, s3);
-    }
     IFX(X_ZF) {
-        Bcond(cNE, +8);
-        ORRw_mask(xFlags, xFlags, 0b011010, 0); // mask=0x40
+        CSETw(s4, cEQ);
+        BFIw(xFlags, s4, F_ZF, 1);
     }
     IFX(X_OF) {
-        Bcond(cVC, +8);
-        ORRw_mask(xFlags, xFlags, 0b010101, 0);  // mask=0x800
+        CSETw(s4, cVS);
+        BFIw(xFlags, s4, F_OF, 1);
     }
     IFX(X_SF) {
         LSRxw(s3, s1, rex.w?63:31);
@@ -1009,9 +994,10 @@ void emit_dec16(dynarec_arm_t* dyn, int ninst, int s1, int s3, int s4)
     }
 }
 
-// emit ADC32 instruction, from s1 , s2, store result in s1 using s3 and s4 as scratch
+// emit ADC32 instruction, from s1, s2, store result in s1 using s3 and s4 as scratch
 void emit_adc32(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int s2, int s3, int s4)
 {
+    MAYUSE(s2);
     IFX(X_PEND) {
         STRxw_U12(s1, xEmu, offsetof(x64emu_t, op1));
         STRxw_U12(s2, xEmu, offsetof(x64emu_t, op2));
@@ -1062,7 +1048,7 @@ void emit_adc32(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int s2, int s3
     }
 }
 
-// emit ADC32 instruction, from s1 , constant c, store result in s1 using s3 and s4 as scratch
+// emit ADC32 instruction, from s1, constant c, store result in s1 using s3 and s4 as scratch
 //void emit_adc32c(dynarec_arm_t* dyn, int ninst, int s1, int32_t c, int s3, int s4)
 //{
 //    IFX(X_PEND) {
@@ -1132,9 +1118,10 @@ void emit_adc32(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int s2, int s3
 //    }
 //}
 
-// emit ADC8 instruction, from s1 , s2, store result in s1 using s3 and s4 as scratch, with save_s4 is s4 need to be saved
+// emit ADC8 instruction, from s1, s2, store result in s1 using s3 and s4 as scratch
 void emit_adc8(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4)
 {
+    MAYUSE(s2);
     IFX(X_PEND) {
         STRB_U12(s1, xEmu, offsetof(x64emu_t, op1));
         STRB_U12(s2, xEmu, offsetof(x64emu_t, op2));
@@ -1185,9 +1172,10 @@ void emit_adc8(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4)
     }
 }
 
-// emit ADC8 instruction, from s1 , const c, store result in s1 using s3 and s4 as scratch, with save_s4 is s4 need to be saved
+// emit ADC8 instruction, from s1, const c, store result in s1 using s3 and s4 as scratch
 void emit_adc8c(dynarec_arm_t* dyn, int ninst, int s1, int c, int s3, int s4, int s5)
 {
+    MAYUSE(s5);
     MOV32w(s5, c&0xff);
     IFX(X_PEND) {
         STRB_U12(s1, xEmu, offsetof(x64emu_t, op1));
@@ -1239,9 +1227,10 @@ void emit_adc8c(dynarec_arm_t* dyn, int ninst, int s1, int c, int s3, int s4, in
     }
 }
 
-// emit ADC16 instruction, from s1 , s2, store result in s1 using s3 and s4 as scratch, with save_s4 is s4 need to be saved
+// emit ADC16 instruction, from s1, s2, store result in s1 using s3 and s4 as scratch
 void emit_adc16(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4)
 {
+    MAYUSE(s2);
     IFX(X_PEND) {
         STRH_U12(s1, xEmu, offsetof(x64emu_t, op1));
         STRH_U12(s2, xEmu, offsetof(x64emu_t, op2));
@@ -1257,7 +1246,7 @@ void emit_adc16(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4)
     MSR_nzvc(s3);      // load CC into ARM CF
     ADCw_REG(s1, s1, s2);
     IFX(X_PEND) {
-        STRw_REG(s1, xEmu, offsetof(x64emu_t, res));
+        STRH_U12(s1, xEmu, offsetof(x64emu_t, res));
     }
     IFX(X_AF|X_OF) {
         ORRw_REG(s3, s4, s2);    // s3 = op1 | op2
@@ -1292,7 +1281,7 @@ void emit_adc16(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4)
     }
 }
 
-// emit ADC16 instruction, from s1 , const c, store result in s1 using s3 and s4 as scratch, with save_s4 is s4 need to be saved
+// emit ADC16 instruction, from s1, const c, store result in s1 using s3 and s4 as scratch
 //void emit_adc16c(dynarec_arm_t* dyn, int ninst, int s1, int c, int s3, int s4)
 //{
 //    IFX(X_PEND) {
@@ -1359,9 +1348,10 @@ void emit_adc16(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4)
 //    }
 //}
 
-// emit SBB32 instruction, from s1 , s2, store result in s1 using s3 and s4 as scratch
+// emit SBB32 instruction, from s1, s2, store result in s1 using s3 and s4 as scratch
 void emit_sbb32(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int s2, int s3, int s4)
 {
+    MAYUSE(s2);
     IFX(X_PEND) {
         STRxw_U12(s1, xEmu, offsetof(x64emu_t, op1));
         STRxw_U12(s2, xEmu, offsetof(x64emu_t, op2));
@@ -1414,7 +1404,7 @@ void emit_sbb32(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int s2, int s3
     }
 }
 
-// emit SBB32 instruction, from s1 , constant c, store result in s1 using s3 and s4 as scratch
+// emit SBB32 instruction, from s1, constant c, store result in s1 using s3 and s4 as scratch
 //void emit_sbb32c(dynarec_arm_t* dyn, int ninst, int s1, int32_t c, int s3, int s4)
 //{
 //    IFX(X_PEND) {
@@ -1486,9 +1476,10 @@ void emit_sbb32(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int s2, int s3
 //    }
 //}
 
-// emit SBB8 instruction, from s1 , s2, store result in s1 using s3 and s4 as scratch, with save_s4 is s4 need to be saved
+// emit SBB8 instruction, from s1, s2, store result in s1 using s3 and s4 as scratch
 void emit_sbb8(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4)
 {
+    MAYUSE(s2);
     IFX(X_PEND) {
         STRB_U12(s1, xEmu, offsetof(x64emu_t, op1));
         STRB_U12(s2, xEmu, offsetof(x64emu_t, op2));
@@ -1540,9 +1531,10 @@ void emit_sbb8(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4)
     }
 }
 
-// emit SBB8 instruction, from s1 , constant c, store result in s1 using s3 and s4 as scratch
+// emit SBB8 instruction, from s1, constant c, store result in s1 using s3 and s4 as scratch
 void emit_sbb8c(dynarec_arm_t* dyn, int ninst, int s1, int c, int s3, int s4, int s5)
 {
+    MAYUSE(s5);
     MOV32w(s5, c&0xff);
     IFX(X_PEND) {
         STRB_U12(s1, xEmu, offsetof(x64emu_t, op1));
@@ -1595,9 +1587,10 @@ void emit_sbb8c(dynarec_arm_t* dyn, int ninst, int s1, int c, int s3, int s4, in
     }
 }
 
-// emit SBB16 instruction, from s1 , s2, store result in s1 using s3 and s4 as scratch, with save_s4 is s4 need to be saved
+// emit SBB16 instruction, from s1, s2, store result in s1 using s3 and s4 as scratch
 void emit_sbb16(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4)
 {
+    MAYUSE(s2);
     IFX(X_PEND) {
         STRH_U12(s1, xEmu, offsetof(x64emu_t, op1));
         STRH_U12(s2, xEmu, offsetof(x64emu_t, op2));
@@ -1649,7 +1642,7 @@ void emit_sbb16(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4)
     }
 }
 
-// emit SBB16 instruction, from s1 , constant c, store result in s1 using s3 and s4 as scratch
+// emit SBB16 instruction, from s1, constant c, store result in s1 using s3 and s4 as scratch
 //void emit_sbb16c(dynarec_arm_t* dyn, int ninst, int s1, int c, int s3, int s4)
 //{
 //    IFX(X_PEND) {
@@ -1853,4 +1846,4 @@ void emit_neg8(dynarec_arm_t* dyn, int ninst, int s1, int s3, int s4)
     IFX(X_PF) {
         emit_pf(dyn, ninst, s1, s3, s4);
     }
-}
+}

src/dynarec/dynarec_arm64_emit_shift.c

@@ -26,8 +26,9 @@
 // emit SHL32 instruction, from s1 , shift s2, store result in s1 using s3 and s4 as scratch. s3 can be same as s2
 void emit_shl32(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int s2, int s3, int s4)
 {
-    int32_t j32;
-    MAYUSE(j32);
+    MAYUSE(s2);
+    int64_t j64;
+    MAYUSE(j64);
 
     IFX(X_PEND) {
         STRxw_U12(s1, xEmu, offsetof(x64emu_t, op1));
@@ -60,9 +61,8 @@ void emit_shl32(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int s2, int s3
     }
     IFX(X_ZF) {
         TSTxw_REG(s1, s1);
-        BFCx(xFlags, F_ZF, 1);
-        Bcond(cNE, +8);
-        ORRw_mask(xFlags, xFlags, 0b011010, 0); // mask=0x40
+        CSETw(s4, cEQ);
+        BFIw(xFlags, s4, F_ZF, 1);
     }
     IFX(X_SF) {
         LSRxw(s4, s1, (rex.w)?63:31);
@@ -71,9 +71,8 @@ void emit_shl32(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int s2, int s3
     IFX(X_OF) {
         CMPSxw_U12(s2, 1);   // if s2==1
             IFX(X_SF) {} else {LSRxw(s4, s1, (rex.w)?63:31);}
-            Bcond(cNE, 4+3*4);
-            BFCw(xFlags, F_OF, 1);
             EORxw_REG(s4, s4, xFlags);  // CF is set if OF is asked
+            CSELw(s4, s4, wZR, cEQ);
             BFIw(xFlags, s4, F_OF, 1);
     }
     IFX(X_PF) {
@@ -101,7 +100,7 @@ void emit_shl32c(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int32_t c, in
         }
         return;
     }
-    IFX(X_CF) {
+    IFX(X_CF|X_OF) {
         LSRxw(s3, s1, (rex.w?64:32)-c);
         BFIxw(xFlags, s3, F_CF, 1);
     }
@@ -112,9 +111,8 @@ void emit_shl32c(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int32_t c, in
     }
     IFX(X_ZF) {
         TSTxw_REG(s1, s1);
-        BFCx(xFlags, F_ZF, 1);
-        Bcond(cNE, +8);
-        ORRw_mask(xFlags, xFlags, 0b011010, 0); // mask=0x40
+        CSETw(s4, cEQ);
+        BFIw(xFlags, s4, F_ZF, 1);
     }
     IFX(X_SF) {
         LSRxw(s4, s1, (rex.w)?63:31);
@@ -123,7 +121,6 @@ void emit_shl32c(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int32_t c, in
     IFX(X_OF) {
         if(c==1) {
             IFX(X_SF) {} else {LSRxw(s4, s1, (rex.w)?63:31);}
-            Bcond(cNE, +12);
             EORxw_REG(s4, s4, xFlags);  // CF is set if OF is asked
             BFIw(xFlags, s4, F_OF, 1);
         } else {
@@ -138,8 +135,9 @@ void emit_shl32c(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int32_t c, in
 // emit SHR32 instruction, from s1 , s2, store result in s1 using s3 and s4 as scratch, s2 can be same as s3
 void emit_shr32(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int s2, int s3, int s4)
 {
-    int32_t j32;
-    MAYUSE(j32);
+    MAYUSE(s2);
+    int64_t j64;
+    MAYUSE(j64);
 
     IFX(X_PEND) {
         STRxw_U12(s1, xEmu, offsetof(x64emu_t, op1));
@@ -167,9 +165,8 @@ void emit_shr32(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int s2, int s3
     }
     IFX(X_ZF) {
         TSTxw_REG(s1, s1);
-        BFCx(xFlags, F_ZF, 1);
-        Bcond(cNE, +8);
-        ORRw_mask(xFlags, xFlags, 0b011010, 0); // mask=0x40
+        CSETw(s4, cEQ);
+        BFIw(xFlags, s4, F_ZF, 1);
     }
     IFX(X_SF) {
         LSRxw(s4, s1, (rex.w)?63:31);
@@ -209,8 +206,10 @@ void emit_shr32c(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int32_t c, in
         return;
     }
     IFX(X_CF) {
-        LSRxw_REG(s3, s1, c-1);
-        BFIw(xFlags, s3, 0, 1);
+        if(c>1) {
+            LSRxw(s3, s1, c-1);
+        }
+        BFIw(xFlags, (c>1)?s3:s1, 0, 1);
     }
     LSRxw(s1, s1, c);
     IFX(X_PEND) {
@@ -218,9 +217,8 @@ void emit_shr32c(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int32_t c, in
     }
     IFX(X_ZF) {
         TSTxw_REG(s1, s1);
-        BFCx(xFlags, F_ZF, 1);
-        Bcond(cNE, +8);
-        ORRw_mask(xFlags, xFlags, 0b011010, 0); // mask=0x40
+        CSETw(s4, cEQ);
+        BFIw(xFlags, s4, F_ZF, 1);
     }
     IFX(X_SF) {
         LSRxw(s4, s1, (rex.w)?63:31);
@@ -255,19 +253,20 @@ void emit_sar32c(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int32_t c, in
         }
         return;
     }
+    IFX(X_CF) {
+        if(c>1) {
+            ASRxw(s3, s1, c-1);
+        }
+        BFIw(xFlags, (c>1)?s3:s1, 0, 1);
+    }
     ASRxw(s1, s1, c);
     IFX(X_PEND) {
         STRxw_U12(s1, xEmu, offsetof(x64emu_t, res));
     }
     IFX(X_ZF) {
         TSTw_REG(s1, s1);
-        BFCx(xFlags, F_ZF, 1);
-        Bcond(cNE, +8);
-        ORRw_mask(xFlags, xFlags, 0b011010, 0); // mask=0x40
-    }
-    IFX(X_CF) {
-        ASRxw(s3, s1, c-1);
-        BFIw(xFlags, s3, 0, 1);
+        CSETw(s4, cEQ);
+        BFIw(xFlags, s4, F_ZF, 1);
     }
     IFX(X_SF) {
         LSRxw(s4, s1, (rex.w)?63:31);
@@ -281,6 +280,7 @@ void emit_sar32c(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int32_t c, in
 // emit ROL32 instruction, from s1 , constant c, store result in s1 using s3 and s4 as scratch
 void emit_rol32c(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int32_t c, int s3, int s4)
 {
+    MAYUSE(rex); MAYUSE(s1); MAYUSE(s3); MAYUSE(s4);
     IFX(X_PEND) {
         MOV32w(s3, c);
         STRxw_U12(s3, xEmu, offsetof(x64emu_t, op2));
@@ -312,6 +312,7 @@ void emit_rol32c(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int32_t c, in
 // emit ROR32 instruction, from s1 , constant c, store result in s1 using s3 and s4 as scratch
 void emit_ror32c(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int32_t c, int s3, int s4)
 {
+    MAYUSE(s1); MAYUSE(s3); MAYUSE(s4);
     IFX(X_PEND) {
         MOV32w(s3, c);
         STRxw_U12(s3, xEmu, offsetof(x64emu_t, op2));
@@ -343,119 +344,106 @@ void emit_ror32c(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int32_t c, in
 }
 
 // emit SHRD32 instruction, from s1, fill s2 , constant c, store result in s1 using s3 and s4 as scratch
-//void emit_shrd32c(dynarec_arm_t* dyn, int ninst, int s1, int s2, int32_t c, int s3, int s4)
-//{
-//    c&=0x1f;
-//    IFX(X_PEND) {
-//        MOVW(s3, c);
-//        STR_IMM9(s1, xEmu, offsetof(x64emu_t, op1));
-//        STR_IMM9(s3, xEmu, offsetof(x64emu_t, op2));
-//        // same flags calc as shr32
-//        SET_DF(s4, d_shr32);
-//    } else IFX(X_ALL) {
-//        SET_DFNONE(s4);
-//    }
-//    if(!c) {
-//        IFX(X_PEND) {
-//            STR_IMM9(s1, xEmu, offsetof(x64emu_t, res));
-//        }
-//        return;
-//    }
-//    IFX(X_CF) {
-//        MOVS_REG_LSR_IMM5(s1, s1, c);
-//    } else {
-//        MOV_REG_LSR_IMM5(s1, s1, c);
-//    }
-//    IFX(X_ZF|X_CF) {
-//        BIC_IMM8(xFlags, xFlags, (1<<F_ZF)|(1<<F_CF), 0);
-//    }
-//    IFX(X_CF) {
-//        ORR_IMM8_COND(cCS, xFlags, xFlags, 1<<F_CF, 0);
-//    }
-//    IFX(X_ZF) {
-//        ORRS_REG_LSL_IMM5(s1, s1, s2, 32-c);
-//    } else {
-//        ORR_REG_LSL_IMM5(s1, s1, s2, 32-c);
-//    }
-//    IFX(X_PEND) {
-//        STR_IMM9(s1, xEmu, offsetof(x64emu_t, res));
-//    }
-//    IFX(X_ZF) {
-//        ORR_IMM8_COND(cEQ, xFlags, xFlags, 1<<F_ZF, 0);
-//    }
-//    IFX(X_SF) {
-//        MOV_REG_LSR_IMM5(s3, s1, 31);
-//        BFI(xFlags, s3, F_SF, 1);
-//    }
-//    IFX(X_OF) {
-//        if(c==1) {
-//            MOV_REG_LSR_IMM5(s4, s1, 30);
-//            XOR_REG_LSR_IMM8(s4, s4, s4, 1);
-//            BFI(xFlags, s4, F_OF, 1);
-//        }
-//    }
-//    IFX(X_PF) {
-//        emit_pf(dyn, ninst, s1, s3, s4);
-//    }
-//}
+void emit_shrd32c(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int s2, int32_t c, int s3, int s4)
+{
+    c&=(rex.w?0x3f:0x1f);
+    IFX(X_PEND) {
+        MOV32w(s3, c);
+        STRxw_U12(s1, xEmu, offsetof(x64emu_t, op1));
+        STRxw_U12(s3, xEmu, offsetof(x64emu_t, op2));
+        // same flags computation as with shl64/shl32
+        SET_DF(s4, rex.w?d_shl64:d_shl32);
+    } else IFX(X_ALL) {
+        SET_DFNONE(s4);
+    }
+    if(!c) {
+        IFX(X_PEND) {
+            STRxw_U12(s1, xEmu, offsetof(x64emu_t, res));
+        }
+        return;
+    }
+    IFX(X_CF) {
+        if(c>1) {
+            LSRxw(s3, s1, c-1);
+        }
+        BFIw(xFlags, (c>1)?s3:s1, 0, 1);
+    }
+    LSRxw(s3, s1, c);
+    ORRxw_REG_LSL(s1, s3, s2, (rex.w?64:32)-c);
+    IFX(X_PEND) {
+        STRxw_U12(s1, xEmu, offsetof(x64emu_t, res));
+    }
+    IFX(X_ZF) {
+        TSTxw_REG(s1, s1);
+        CSETw(s4, cEQ);
+        BFIw(xFlags, s4, F_ZF, 1);
+    }
+    IFX(X_SF) {
+        LSRxw(s4, s1, (rex.w)?63:31);
+        BFIx(xFlags, s4, F_SF, 1);
+    }
+    IFX(X_OF) {
+        if(c==1) {
+            LSRxw(s4, s1, rex.w?62:30);
+            EORw_REG_LSR(s4, s4, s4, 1);
+            BFIw(xFlags, s4, F_OF, 1);
+        }
+    }
+    IFX(X_PF) {
+        emit_pf(dyn, ninst, s1, s3, s4);
+    }
+}
 
-//void emit_shld32c(dynarec_arm_t* dyn, int ninst, int s1, int s2, int32_t c, int s3, int s4)
-//{
-//    c&=0x1f;
-//    IFX(X_PEND) {
-//        MOVW(s3, c);
-//        STR_IMM9(s1, xEmu, offsetof(x64emu_t, op1));
-//        STR_IMM9(s3, xEmu, offsetof(x64emu_t, op2));
-//        // same flags computation as with shl32
-//        SET_DF(s4, d_shl32);
-//    } else IFX(X_ALL) {
-//        SET_DFNONE(s4);
-//    }
-//    if(c==0) {
-//        IFX(F_OF) {
-//            BFC(xFlags, F_OF, 1);
-//        }
-//        IFX(X_PEND) {
-//            STR_IMM9(s1, xEmu, offsetof(x64emu_t, res));
-//        }
-//        return;
-//    }
-//    IFX(X_CF) {
-//        MOV_REG_LSR_IMM5(s3, s1, 32-c);
-//        BFI(xFlags, s3, F_CF, 1);
-//    }
-//    IFX(X_OF) {
-//        MOVS_REG_LSL_IMM5(s1, s1, c);
-//    } else {
-//        MOV_REG_LSL_IMM5(s1, s1, c);
-//    }
-//    IFX(X_OF) {
-//        if(c==1) {
-//            UBFX(s3, s2, 0, 1);
-//            XOR_IMM8_COND(cCS, s3, s3, 1);
-//            BFI(xFlags, s3, F_OF, 1);
-//        } else {
-//            BFC(xFlags, F_OF, 1);
-//        }
-//    }
-//    IFX(X_ZF) {
-//        ORRS_REG_LSR_IMM5(s1, s1, s2, 32-c);
-//    } else {
-//        ORR_REG_LSR_IMM5(s1, s1, s2, 32-c);
-//    }
-//
-//    IFX(X_PEND) {
-//        STR_IMM9(s1, xEmu, offsetof(x64emu_t, res));
-//    }
-//    IFX(X_ZF) {
-//        ORR_IMM8_COND(cEQ, xFlags, xFlags, 1<<F_ZF, 0);
-//        BIC_IMM8_COND(cNE, xFlags, xFlags, 1<<F_ZF, 0);
-//    }
-//    IFX(X_SF) {
-//        MOV_REG_LSR_IMM5(s3, s1, 31);
-//        BFI(xFlags, s3, F_SF, 1);
-//    }
-//    IFX(X_PF) {
-//        emit_pf(dyn, ninst, s1, s3, s4);
-//    }
-//}
+void emit_shld32c(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int s2, int32_t c, int s3, int s4)
+{
+    c&=(rex.w?0x3f:0x1f);
+    IFX(X_PEND) {
+        MOV32w(s3, c);
+        STRxw_U12(s1, xEmu, offsetof(x64emu_t, op1));
+        STRxw_U12(s3, xEmu, offsetof(x64emu_t, op2));
+        // same flags computation as with shl64/shl32
+        SET_DF(s4, rex.w?d_shl64:d_shl32);
+    } else IFX(X_ALL) {
+        SET_DFNONE(s4);
+    }
+    if(c==0) {
+        IFX(F_OF) {
+            BFCx(xFlags, F_OF, 1);
+        }
+        IFX(X_PEND) {
+            STRxw_U12(s1, xEmu, offsetof(x64emu_t, res));
+        }
+        return;
+    }
+    IFX(X_CF|X_OF) {
+        LSRxw(s3, s1, (rex.w?64:32)-c);
+        BFIxw(xFlags, s3, F_CF, 1);
+    }
+    LSLxw(s3, s1, c);
+    ORRxw_REG_LSR(s1, s3, s2, (rex.w?64:32)-c);
+
+    IFX(X_PEND) {
+        STRxw_U12(s1, xEmu, offsetof(x64emu_t, res));
+    }
+    IFX(X_ZF) {
+        TSTxw_REG(s1, s1);
+        CSETw(s4, cEQ);
+        BFIw(xFlags, s4, F_ZF, 1);
+    }
+    IFX(X_SF) {
+        LSRxw(s4, s1, (rex.w)?63:31);
+        BFIx(xFlags, s4, F_SF, 1);
+    }
+    IFX(X_OF) {
+        if(c==1) {
+            UBFXxw(s3, s1, rex.w?63:31, 1);
+            EORxw_REG(s3, s3, xFlags);  // CF is set if OF is asked
+            BFIw(xFlags, s3, F_OF, 1);
+        } else {
+            BFCw(xFlags, F_OF, 1);
+        }
+    }
+    IFX(X_PF) {
+        emit_pf(dyn, ninst, s1, s3, s4);
+    }
+}

src/dynarec/dynarec_arm64_emit_tests.c

@@ -23,10 +23,11 @@
 #include "dynarec_arm64_functions.h"
 #include "dynarec_arm64_helper.h"
 
-// emit CMP32 instruction, from cmp s1 , s2, using s3 and s4 as scratch
+// emit CMP32 instruction, from cmp s1, s2, using s3 and s4 as scratch
 void emit_cmp32(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int s2, int s3, int s4, int s5)
 {
-    IFX(X_PEND) {
+    MAYUSE(s1); MAYUSE(s2);
+    IFX_PENDOR0 {
         STRxw_U12(s1, xEmu, offsetof(x64emu_t, op1));
         STRxw_U12(s2, xEmu, offsetof(x64emu_t, op2));
         SET_DF(s4, rex.w?d_cmp64:d_cmp32);
@@ -38,7 +39,7 @@ void emit_cmp32(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int s2, int s3
         BICxw(s4, s2, s1);      // s4 = ~op1 & op2
     }
     SUBSxw_REG(s5, s1, s2);   // res = s1 - s2
-    IFX(X_PEND) {
+    IFX_PENDOR0 {
         STRxw_U12(s5, xEmu, offsetof(x64emu_t, res));
     }
     IFX(X_AF) {
@@ -47,22 +48,18 @@ void emit_cmp32(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int s2, int s3
         LSRxw(s4, s3, 3);
         BFIx(xFlags, s4, F_AF, 1);    // AF: bc & 0x08
     }
-    IFX(X_ZF|X_CF|X_OF) {
-        MOV32w(s4, (1<<F_ZF)|(1<<F_CF)|(1<<F_OF));
-        BICx(xFlags, xFlags, s4);
-    }
     IFX(X_ZF) {
-        Bcond(cNE, +8);
-        ORRw_mask(xFlags, xFlags, 0b011010, 0); // mask=0x40
+        CSETw(s4, cEQ);
+        BFIw(xFlags, s4, F_ZF, 1);
     }
     IFX(X_CF) {
         // inverted carry
-        Bcond(cCS, +8);
-        ORRw_mask(xFlags, xFlags, 0, 0);    // mask=0x01
+        CSETw(s4, cCC);
+        BFIw(xFlags, s4, F_CF, 1);
     }
     IFX(X_OF) {
-        Bcond(cVC, +8);
-        ORRw_mask(xFlags, xFlags, 0b010101, 0);  // mask=0x800
+        CSETw(s4, cVS);
+        BFIw(xFlags, s4, F_OF, 1);
     }
     IFX(X_SF) {
         LSRxw(s3, s5, (rex.w)?63:31);
@@ -76,7 +73,7 @@ void emit_cmp32(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int s2, int s3
 // emit CMP32 instruction, from cmp s1 , 0, using s3 and s4 as scratch
 void emit_cmp32_0(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int s3, int s4)
 {
-    IFX(X_PEND) {
+    IFX_PENDOR0 {
         MOV64xw(s4, 0);
         STRxw_U12(s1, xEmu, offsetof(x64emu_t, op1));
         STRxw_U12(s4, xEmu, offsetof(x64emu_t, op2));
@@ -88,18 +85,18 @@ void emit_cmp32_0(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int s3, int
     SUBSxw_U12(s3, s1, 0);   // res = s1 - 0
     // and now the tricky ones (and mostly unused), PF and AF
     // bc = (res & (~d | s)) | (~d & s) => is 0 here...
-    IFX(X_ZF|X_CF|X_OF|X_AF) {
-        MOV32w(s4, (1<<F_ZF)|(1<<F_CF)|(1<<F_OF)|(1<<F_AF));
+    IFX(X_OF|X_AF) {
+        MOV32w(s4, (1<<F_OF)|(1<<F_AF));
         BICw(xFlags, xFlags, s4);
     }
     IFX(X_ZF) {
-        Bcond(cNE, +8);
-        ORRw_mask(xFlags, xFlags, 0b011010, 0); // mask=0x40
+        CSETw(s4, cEQ);
+        BFIw(xFlags, s4, F_ZF, 1);
     }
     IFX(X_CF) {
         // inverted carry
-        Bcond(cCS, +8);
-        ORRw_mask(xFlags, xFlags, 0, 0);    // mask=0x01
+        CSETw(s4, cCC);
+        BFIw(xFlags, s4, F_CF, 1);
     }
     IFX(X_SF) {
         LSRxw(s3, s1, (rex.w)?63:31);
@@ -110,10 +107,11 @@ void emit_cmp32_0(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int s3, int
     }
 }
 
-// emit CMP16 instruction, from cmp s1 , s2, using s3 and s4 as scratch
+// emit CMP16 instruction, from cmp s1, s2, using s3 and s4 as scratch
 void emit_cmp16(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4, int s5)
 {
-    IFX(X_PEND) {
+    MAYUSE(s1); MAYUSE(s2);
+    IFX_PENDOR0 {
         STRH_U12(s1, xEmu, offsetof(x64emu_t, op1));
         STRH_U12(s2, xEmu, offsetof(x64emu_t, op2));
         SET_DF(s3, d_cmp16);
@@ -121,7 +119,7 @@ void emit_cmp16(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4, i
         SET_DFNONE(s3);
     }
     SUBw_REG(s5, s1, s2);   // res = s1 - s2
-    IFX(X_PEND) {
+    IFX_PENDOR0 {
         STRH_U12(s5, xEmu, offsetof(x64emu_t, res));
     }
     IFX(X_ZF) {
@@ -162,7 +160,7 @@ void emit_cmp16(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4, i
 // emit CMP16 instruction, from cmp s1 , #0, using s3 and s4 as scratch
 void emit_cmp16_0(dynarec_arm_t* dyn, int ninst, int s1, int s3, int s4)
 {
-    IFX(X_PEND) {
+    IFX_PENDOR0 {
         MOV32w(s3, 0);
         STRH_U12(s1, xEmu, offsetof(x64emu_t, op1));
         STRH_U12(s3, xEmu, offsetof(x64emu_t, op2));
@@ -189,10 +187,11 @@ void emit_cmp16_0(dynarec_arm_t* dyn, int ninst, int s1, int s3, int s4)
         emit_pf(dyn, ninst, s1, s3, s4);
     }
 }
-// emit CMP8 instruction, from cmp s1 , s2, using s3 and s4 as scratch
+// emit CMP8 instruction, from cmp s1, s2, using s3 and s4 as scratch
 void emit_cmp8(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4, int s5)
 {
-    IFX(X_PEND) {
+    MAYUSE(s1); MAYUSE(s2);
+    IFX_PENDOR0 {
         STRB_U12(s1, xEmu, offsetof(x64emu_t, op1));
         STRB_U12(s2, xEmu, offsetof(x64emu_t, op2));
         SET_DF(s4, d_cmp8);
@@ -204,7 +203,7 @@ void emit_cmp8(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4, in
     } else {
         SUBw_REG(s5, s1, s2);   // res = s1 - s2
     }
-    IFX(X_PEND) {
+    IFX_PENDOR0 {
         STRB_U12(s5, xEmu, offsetof(x64emu_t, res));
     }
     IFX(X_ZF) {
@@ -242,7 +241,7 @@ void emit_cmp8(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4, in
 // emit CMP8 instruction, from cmp s1 , 0, using s3 and s4 as scratch
 void emit_cmp8_0(dynarec_arm_t* dyn, int ninst, int s1, int s3, int s4)
 {
-    IFX(X_PEND) {
+    IFX_PENDOR0 {
         STRB_U12(s1, xEmu, offsetof(x64emu_t, op1));
         MOV32w(s4, 0);
         STRB_U12(s4, xEmu, offsetof(x64emu_t, op2));
@@ -252,8 +251,8 @@ void emit_cmp8_0(dynarec_arm_t* dyn, int ninst, int s1, int s3, int s4)
         SET_DFNONE(s4);
     }
     // bc = (res & (~d | s)) | (~d & s) = 0
-    IFX(X_CF | X_AF | X_ZF | X_OF) {
-        MOV32w(s3, (1<<F_ZF)|(1<<F_CF)|(1<<F_AF)|(1<<F_OF));
+    IFX(X_CF | X_AF | X_OF) {
+        MOV32w(s3, (1<<F_CF)|(1<<F_AF)|(1<<F_OF));
         BICw(xFlags, xFlags, s3);
     }
     IFX(X_ZF) {
@@ -270,10 +269,11 @@ void emit_cmp8_0(dynarec_arm_t* dyn, int ninst, int s1, int s3, int s4)
     }
 }
 
-// emit TEST32 instruction, from test s1 , s2, using s3 and s4 as scratch
+// emit TEST32 instruction, from test s1, s2, using s3 and s4 as scratch
 void emit_test32(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int s2, int s3, int s4)
 {
-    IFX(X_PEND) {
+    MAYUSE(s1); MAYUSE(s2); MAYUSE(s3); MAYUSE(s4);
+    IFX_PENDOR0 {
         SET_DF(s3, rex.w?d_tst64:d_tst32);
     } else {
         SET_DFNONE(s4);
@@ -283,7 +283,7 @@ void emit_test32(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int s2, int s
         BICw(xFlags, xFlags, s3);
     }
     ANDSxw_REG(s3, s1, s2);   // res = s1 & s2
-    IFX(X_PEND) {
+    IFX_PENDOR0 {
         STRxw_U12(s3, xEmu, offsetof(x64emu_t, res));
     }
     IFX(X_ZF) {
@@ -296,7 +296,7 @@ void emit_test32(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int s2, int s
     }
     // PF: (((emu->x64emu_parity_tab[(res) / 32] >> ((res) % 32)) & 1) == 0)
     IFX(X_PF) {
-        ANDw_mask(s3, s3, 0b011011, 000010); // 0xE0
+        ANDw_mask(s3, s3, 0b011011, 0b000010); // 0xE0
         LSRw(s3, s3, 5);
         MOV64x(s4, (uintptr_t)GetParityTab());
         LDRw_REG_LSL2(s4, s4, s3);
@@ -307,10 +307,11 @@ void emit_test32(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int s2, int s
     }
 }
 
-// emit TEST16 instruction, from test s1 , s2, using s3 and s4 as scratch
+// emit TEST16 instruction, from test s1, s2, using s3 and s4 as scratch
 void emit_test16(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4, int s5)
 {
-    IFX(X_PEND) {
+    MAYUSE(s1); MAYUSE(s2);
+    IFX_PENDOR0 {
         SET_DF(s3, d_tst16);
     } else {
         SET_DFNONE(s4);
@@ -322,7 +323,7 @@ void emit_test16(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4,
         BFCw(xFlags, F_CF, 1);
     }
     ANDSw_REG(s5, s1, s2);   // res = s1 & s2
-    IFX(X_PEND) {
+    IFX_PENDOR0 {
         STRH_U12(s5, xEmu, offsetof(x64emu_t, res));
     }
     IFX(X_ZF) {
@@ -339,10 +340,11 @@ void emit_test16(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4,
     }
 }
 
-// emit TEST8 instruction, from test s1 , s2, using s3 and s4 as scratch
+// emit TEST8 instruction, from test s1, s2, using s3 and s4 as scratch
 void emit_test8(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4, int s5)
 {
-    IFX(X_PEND) {
+    MAYUSE(s1); MAYUSE(s2);
+    IFX_PENDOR0 {
         SET_DF(s3, d_tst8);
     } else {
         SET_DFNONE(s4);
@@ -354,7 +356,7 @@ void emit_test8(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4, i
         BFCw(xFlags, F_CF, 1);
     }
     ANDSw_REG(s5, s1, s2);   // res = s1 & s2
-    IFX(X_PEND) {
+    IFX_PENDOR0 {
         STRB_U12(s5, xEmu, offsetof(x64emu_t, res));
     }
     IFX(X_ZF) {

src/dynarec/dynarec_arm64_f0.c

@@ -25,17 +25,20 @@
 
 uintptr_t dynarec64_F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int* ok, int* need_epilog)
 {
+    (void)ip; (void)rep; (void)need_epilog;
+
     uint8_t opcode = F8;
     uint8_t nextop;
-    int32_t j32;
-    uint8_t gd, ed;
-    uint8_t wback, wb2, gb1, gb2;
-    int64_t i64;
-    int fixedaddress;
+    uint8_t gd, ed, u8;
+    uint8_t wback, wb1, wb2, gb1, gb2;
+    int32_t i32;
+    int64_t i64, j64;
+    int64_t fixedaddress;
     MAYUSE(gb1);
     MAYUSE(gb2);
+    MAYUSE(wb1);
     MAYUSE(wb2);
-    MAYUSE(j32);
+    MAYUSE(j64);
 
     while((opcode==0xF2) || (opcode==0xF3)) {
         rep = opcode-0xF1;
@@ -51,7 +54,7 @@ uintptr_t dynarec64_F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
     switch(opcode) {
         case 0x00:
             INST_NAME("LOCK ADD Eb, Gb");
-            SETFLAGS(X_ALL, SF_SET);
+            SETFLAGS(X_ALL, SF_SET_PENDING);
             nextop = F8;
             GETGB(x2);
             if((nextop&0xC0)==0xC0) {
@@ -77,7 +80,7 @@ uintptr_t dynarec64_F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             break;
         case 0x01:
             INST_NAME("LOCK ADD Ed, Gd");
-            SETFLAGS(X_ALL, SF_SET);
+            SETFLAGS(X_ALL, SF_SET_PENDING);
             nextop = F8;
             GETGD;
             if((nextop&0xC0)==0xC0) {
@@ -93,13 +96,31 @@ uintptr_t dynarec64_F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             }
             break;
 
+        case 0x09:
+            INST_NAME("LOCK OR Ed, Gd");
+            SETFLAGS(X_ALL, SF_SET_PENDING);
+            nextop = F8;
+            GETGD;
+            if(MODREG) {
+                ed = xRAX+(nextop&7)+(rex.b<<3);
+                emit_or32(dyn, ninst, rex, ed, gd, x3, x4);
+            } else {
+                addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, 0, 0, rex, 0, 0);
+                MARKLOCK;
+                LDAXRxw(x1, wback);
+                emit_or32(dyn, ninst, rex, x1, gd, x3, x4);
+                STLXRxw(x3, x1, wback);
+                CBNZx_MARKLOCK(x3);
+            }
+            break;
+
         case 0x0F:
             nextop = F8;
             switch(nextop) {
 
                 case 0xB1:
                     INST_NAME("LOCK CMPXCHG Ed, Gd");
-                    SETFLAGS(X_ALL, SF_SET);
+                    SETFLAGS(X_ALL, SF_SET_PENDING);
                     nextop = F8;
                     GETGD;
                     if(MODREG) {
@@ -120,8 +141,7 @@ uintptr_t dynarec64_F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                         // Aligned version
                         MARKLOCK;
                         LDAXRxw(x1, wback);
-                        ed = x1;
-                        CMPSxw_REG(xRAX, ed);
+                        CMPSxw_REG(xRAX, x1);
                         B_MARK(cNE);
                         // EAX == Ed
                         STLXRxw(x4, gd, wback);
@@ -132,24 +152,22 @@ uintptr_t dynarec64_F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                         MARK3;
                         LDRxw_U12(x1, wback, 0);
                         LDAXRB(x3, wback); // dummy read, to arm the write...
-                        ed = x1;
-                        CMPSxw_REG(xRAX, ed);
+                        CMPSxw_REG(xRAX, x1);
                         B_MARK(cNE);
                         // EAX == Ed
                         STLXRB(x4, gd, wback);
                         CBNZx_MARK3(x4);
                         STRxw_U12(gd, wback, 0);
-                        B_MARK_nocond;
                         MARK;
                         // Common part (and fallback for EAX != Ed)
-                        UFLAG_IF {emit_cmp32(dyn, ninst, rex, xRAX, ed, x3, x4, x5);}
-                        MOVxw_REG(xRAX, ed);
+                        UFLAG_IF {emit_cmp32(dyn, ninst, rex, xRAX, x1, x3, x4, x5);}
+                        MOVxw_REG(xRAX, x1);    // upper par of RAX will be erase on 32bits, no mater what
                     }
                     break;
 
                 case 0xC1:
                     INST_NAME("LOCK XADD Gd, Ed");
-                    SETFLAGS(X_ALL, SF_SET);
+                    SETFLAGS(X_ALL, SF_SET_PENDING);
                     nextop = F8;
                     GETGD;
                     if(MODREG) {
@@ -185,11 +203,418 @@ uintptr_t dynarec64_F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     }
                     break;
 
+                case 0xC7:
+                    INST_NAME("LOCK CMPXCHG8B Gq, Eq");
+                    SETFLAGS(X_ZF, SF_SUBSET);
+                    nextop = F8;
+                    addr = geted(dyn, addr, ninst, nextop, &wback, x1, &fixedaddress, 0, 0, rex, 0, 0);
+                    MARKLOCK;
+                    LDAXPxw(x2, x3, wback);
+                    CMPSxw_REG(xRAX, x2);
+                    B_MARK(cNE);    // EAX != Ed[0]
+                    CMPSxw_REG(xRDX, x3);
+                    B_MARK(cNE);    // EDX != Ed[1]
+                    STLXPxw(x4, xRBX, xRCX, wback);
+                    CBNZx_MARKLOCK(x4);
+                    MOV32w(x1, 1);
+                    B_MARK3_nocond;
+                    MARK;
+                    MOVxw_REG(xRAX, x2);
+                    MOVxw_REG(xRDX, x3);
+                    MOV32w(x1, 0);
+                    MARK3;
+                    BFIw(xFlags, x1, F_ZF, 1);
+                    break;
+
                 default:
                     DEFAULT;
             }
             break;
                     
+        case 0x29:
+            INST_NAME("LOCK SUB Ed, Gd");
+            SETFLAGS(X_ALL, SF_SET_PENDING);
+            nextop = F8;
+            GETGD;
+            if(MODREG) {
+                ed = xRAX+(nextop&7)+(rex.b<<3);
+                emit_sub32(dyn, ninst, rex, ed, gd, x3, x4);
+            } else {
+                addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, 0, 0, rex, 0, 0);
+                MARKLOCK;
+                LDAXRxw(x1, wback);
+                emit_sub32(dyn, ninst, rex, x1, gd, x3, x4);
+                STLXRxw(x3, x1, wback);
+                CBNZx_MARKLOCK(x3);
+            }
+            break;
+
+        case 0x66:
+            opcode = F8;
+            switch(opcode) {
+                case 0x81:
+                case 0x83:
+                    nextop = F8;
+                    switch((nextop>>3)&7) {
+                        case 0: //ADD
+                            if(opcode==0x81) {
+                                INST_NAME("LOCK ADD Ew, Iw");
+                            } else {
+                                INST_NAME("LOCK ADD Ew, Iw");
+                            }
+                            SETFLAGS(X_ALL, SF_SET_PENDING);
+                            if(MODREG) {
+                                if(opcode==0x81) i32 = F16S; else i32 = F8S;
+                                ed = xRAX+(nextop&7)+(rex.b<<3);
+                                MOV32w(x5, i32);
+                                UXTHw(x6, ed);
+                                emit_add16(dyn, ninst, x6, x5, x3, x4);
+                                BFIx(ed, x6, 0, 16);
+                            } else {
+                                addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, 0, 0, rex, 0, (opcode==0x81)?2:1);
+                                if(opcode==0x81) i32 = F32S; else i32 = F8S;
+                                MOV32w(x5, i32);
+                                TSTx_mask(wback, 1, 0, 0);    // mask=1
+                                B_MARK(cNE);
+                                MARKLOCK;
+                                LDAXRH(x1, wback);
+                                emit_add16(dyn, ninst, x1, x5, x3, x4);
+                                STLXRH(x3, x1, wback);
+                                CBNZx_MARKLOCK(x3);
+                                B_NEXT_nocond;
+                                MARK;   // unaligned! also, not enough 
+                                LDRH_U12(x1, wback, 0);
+                                LDAXRB(x4, wback);
+                                BFIw(x1, x4, 0, 8); // re-inject
+                                emit_add16(dyn, ninst, x1, x5, x3, x4);
+                                STLXRB(x3, x1, wback);
+                                CBNZx_MARK(x3);
+                                STRH_U12(x1, wback, 0);    // put the whole value
+                            }
+                            break;
+                        case 1: //OR
+                            if(opcode==0x81) {INST_NAME("LOCK OR Ew, Iw");} else {INST_NAME("LOCK OR Ew, Iw");}
+                            SETFLAGS(X_ALL, SF_SET_PENDING);
+                            if(MODREG) {
+                                if(opcode==0x81) i32 = F16S; else i32 = F8S;
+                                ed = xRAX+(nextop&7)+(rex.b<<3);
+                                MOV32w(x5, i32);
+                                UXTHw(x6, ed);
+                                emit_or16(dyn, ninst, x6, x5, x3, x4);
+                                BFIx(ed, x6, 0, 16);
+                            } else {
+                                addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, 0, 0, rex, 0, (opcode==0x81)?2:1);
+                                if(opcode==0x81) i32 = F16S; else i32 = F8S;
+                                MOV32w(x5, i32);
+                                MARKLOCK;
+                                LDAXRH(x1, wback);
+                                emit_or16(dyn, ninst, x1, x5, x3, x4);
+                                STLXRH(x3, x1, wback);
+                                CBNZx_MARKLOCK(x3);
+                            }
+                            break;
+                        case 2: //ADC
+                            if(opcode==0x81) {INST_NAME("LOCK ADC Ew, Iw");} else {INST_NAME("LOCK ADC Ew, Ib");}
+                            READFLAGS(X_CF);
+                            SETFLAGS(X_ALL, SF_SET_PENDING);
+                            if(MODREG) {
+                                if(opcode==0x81) i32 = F16S; else i32 = F8S;
+                                ed = xRAX+(nextop&7)+(rex.b<<3);
+                                MOV32w(x5, i32);
+                                UXTHw(x6, ed);
+                                emit_adc16(dyn, ninst, x6, x5, x3, x4);
+                                BFIx(ed, x6, 0, 16);
+                            } else {
+                                addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, 0, 0, rex, 0, (opcode==0x81)?2:1);
+                                if(opcode==0x81) i32 = F16S; else i32 = F8S;
+                                MOV32w(x5, i32);
+                                MARKLOCK;
+                                LDAXRH(x1, wback);
+                                emit_adc16(dyn, ninst, x1, x5, x3, x4);
+                                STLXRH(x3, x1, wback);
+                                CBNZx_MARKLOCK(x3);
+                            }
+                            break;
+                        case 3: //SBB
+                            if(opcode==0x81) {INST_NAME("LOCK SBB Ew, Iw");} else {INST_NAME("LOCK SBB Ew, Ib");}
+                            READFLAGS(X_CF);
+                            SETFLAGS(X_ALL, SF_SET_PENDING);
+                            if(MODREG) {
+                                if(opcode==0x81) i32 = F16S; else i32 = F8S;
+                                ed = xRAX+(nextop&7)+(rex.b<<3);
+                                MOV32w(x5, i32);
+                                UXTHw(x6, ed);
+                                emit_sbb16(dyn, ninst, x6, x5, x3, x4);
+                                BFIx(ed, x6, 0, 16);
+                            } else {
+                                addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, 0, 0, rex, 0, (opcode==0x81)?2:1);
+                                if(opcode==0x81) i32 = F16S; else i32 = F8S;
+                                MOV32w(x5, i32);
+                                MARKLOCK;
+                                LDAXRH(x1, wback);
+                                emit_sbb16(dyn, ninst, x1, x5, x3, x4);
+                                STLXRH(x3, x1, wback);
+                                CBNZx_MARKLOCK(x3);
+                            }
+                            break;
+                        case 4: //AND
+                            if(opcode==0x81) {INST_NAME("LOCK AND Ew, Iw");} else {INST_NAME("LOCK AND Ew, Ib");}
+                            SETFLAGS(X_ALL, SF_SET_PENDING);
+                            if(MODREG) {
+                                if(opcode==0x81) i32 = F16S; else i32 = F8S;
+                                ed = xRAX+(nextop&7)+(rex.b<<3);
+                                MOV32w(x5, i32);
+                                UXTHw(x6, ed);
+                                emit_and16(dyn, ninst, x6, x5, x3, x4);
+                                BFIx(ed, x6, 0, 16);
+                            } else {
+                                addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, 0, 0, rex, 0, (opcode==0x81)?2:1);
+                                if(opcode==0x81) i32 = F16S; else i32 = F8S;
+                                MOV32w(x5, i32);
+                                MARKLOCK;
+                                LDAXRH(x1, wback);
+                                emit_and16(dyn, ninst, x1, x5, x3, x4);
+                                STLXRH(x3, x1, wback);
+                                CBNZx_MARKLOCK(x3);
+                            }
+                            break;
+                        case 5: //SUB
+                            if(opcode==0x81) {INST_NAME("LOCK SUB Ew, Iw");} else {INST_NAME("LOCK SUB Ew, Ib");}
+                            SETFLAGS(X_ALL, SF_SET_PENDING);
+                            if(MODREG) {
+                                if(opcode==0x81) i32 = F16S; else i32 = F8S;
+                                ed = xRAX+(nextop&7)+(rex.b<<3);
+                                MOV32w(x5, i32);
+                                UXTHw(x6, ed);
+                                emit_sub16(dyn, ninst, x6, x5, x3, x4);
+                                BFIx(ed, x6, 0, 16);
+                            } else {
+                                addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, 0, 0, rex, 0, (opcode==0x81)?2:1);
+                                if(opcode==0x81) i32 = F16S; else i32 = F8S;
+                                MOV32w(x5, i32);
+                                TSTx_mask(wback, 1, 0, 0);    // mask=1
+                                B_MARK(cNE);
+                                MARKLOCK;
+                                LDAXRH(x1, wback);
+                                emit_sub16(dyn, ninst, x1, x5, x3, x4);
+                                STLXRH(x3, x1, wback);
+                                CBNZx_MARKLOCK(x3);
+                                B_NEXT_nocond;
+                                MARK;   // unaligned! also, not enough 
+                                LDRH_U12(x1, wback, 0);
+                                LDAXRB(x4, wback);
+                                BFIw(x1, x4, 0, 8); // re-inject
+                                emit_sub16(dyn, ninst, x1, x5, x3, x4);
+                                STLXRB(x3, x1, wback);
+                                CBNZx_MARK(x3);
+                                STRH_U12(x1, wback, 0);    // put the whole value
+                            }
+                            break;
+                        case 6: //XOR
+                            if(opcode==0x81) {INST_NAME("LOCK XOR Ew, Iw");} else {INST_NAME("LOCK XOR Ew, Ib");}
+                            SETFLAGS(X_ALL, SF_SET_PENDING);
+                            if(MODREG) {
+                                if(opcode==0x81) i32 = F16S; else i32 = F8S;
+                                ed = xRAX+(nextop&7)+(rex.b<<3);
+                                MOV32w(x5, i32);
+                                UXTHw(x6, ed);
+                                emit_xor16(dyn, ninst, x6, x5, x3, x4);
+                                BFIx(ed, x6, 0, 16);
+                            } else {
+                                addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, 0, 0, rex, 0, (opcode==0x81)?2:1);
+                                if(opcode==0x81) i32 = F16S; else i32 = F8S;
+                                MOV32w(x5, i32);
+                                MARKLOCK;
+                                LDAXRH(x1, wback);
+                                emit_xor16(dyn, ninst, x1, x5, x3, x4);
+                                STLXRH(x3, x1, wback);
+                                CBNZx_MARKLOCK(x3);
+                            }
+                            break;
+                        case 7: //CMP
+                            if(opcode==0x81) {INST_NAME("(LOCK) CMP Ew, Iw");} else {INST_NAME("(LOCK) CMP Ew, Ib");}
+                            SETFLAGS(X_ALL, SF_SET_PENDING);
+                            GETEW(x6, (opcode==0x81)?2:1);
+                            (void)wb1;
+                            // No need to LOCK, this is readonly
+                            if(opcode==0x81) i32 = F16S; else i32 = F8S;
+                            if(i32) {
+                                MOV32w(x5, i32);
+                                UXTHw(x6, ed);
+                                emit_cmp16(dyn, ninst, x6, x5, x3, x4, x6);
+                                BFIx(ed, x6, 0, 16);
+                            } else {
+                                emit_cmp16_0(dyn, ninst, ed, x3, x4);
+                            }
+                            break;
+                    }
+                    break;
+                default:
+                    DEFAULT;
+            }
+            break;
+
+        case 0x80:
+            nextop = F8;
+            switch((nextop>>3)&7) {
+                case 0: //ADD
+                    INST_NAME("ADD Eb, Ib");
+                    SETFLAGS(X_ALL, SF_SET_PENDING);
+                    if(MODREG) {
+                        GETEB(x1, 1);
+                        u8 = F8;
+                        emit_add8c(dyn, ninst, x1, u8, x2, x4);
+                        wb1 = 0;
+                    } else {
+                        addr = geted(dyn, addr, ninst, nextop, &wback, x5, &fixedaddress, 0, 0, rex, 0, 1);
+                        u8 = F8;
+                        wb1 = 1;
+                        MARKLOCK;
+                        LDAXRB(x1, wback);
+                        emit_add8c(dyn, ninst, x1, u8, x2, x4);
+                        STLXRB(x3, x1, wback);
+                        CBNZx_MARKLOCK(x3);
+                    }
+                    EBBACK;
+                    break;
+                case 1: //OR
+                    INST_NAME("OR Eb, Ib");
+                    SETFLAGS(X_ALL, SF_SET_PENDING);
+                    if(MODREG) {
+                        GETEB(x1, 1);
+                        u8 = F8;
+                        emit_or8c(dyn, ninst, x1, u8, x2, x4);
+                        wb1 = 0;
+                    } else {
+                        addr = geted(dyn, addr, ninst, nextop, &wback, x5, &fixedaddress, 0, 0, rex, 0, 1);
+                        u8 = F8;
+                        wb1 = 1;
+                        MARKLOCK;
+                        LDAXRB(x1, wback);
+                        emit_or8c(dyn, ninst, x1, u8, x2, x4);
+                        STLXRB(x3, x1, wback);
+                        CBNZx_MARKLOCK(x3);
+                    }
+                    EBBACK;
+                    break;
+                case 2: //ADC
+                    INST_NAME("ADC Eb, Ib");
+                    READFLAGS(X_CF);
+                    SETFLAGS(X_ALL, SF_SET_PENDING);
+                    if(MODREG) {
+                        GETEB(x1, 1);
+                        u8 = F8;
+                        emit_adc8c(dyn, ninst, x1, u8, x2, x4, x5);
+                        wb1 = 0;
+                    } else {
+                        addr = geted(dyn, addr, ninst, nextop, &wback, x5, &fixedaddress, 0, 0, rex, 0, 1);
+                        u8 = F8;
+                        wb1 = 1;
+                        MARKLOCK;
+                        LDAXRB(x1, wback);
+                        emit_adc8c(dyn, ninst, x1, u8, x2, x4, x5);
+                        STLXRB(x3, x1, wback);
+                        CBNZx_MARKLOCK(x3);
+                    }
+                    EBBACK;
+                    break;
+                case 3: //SBB
+                    INST_NAME("SBB Eb, Ib");
+                    READFLAGS(X_CF);
+                    SETFLAGS(X_ALL, SF_SET_PENDING);
+                    if(MODREG) {
+                        GETEB(x1, 1);
+                        u8 = F8;
+                        emit_sbb8c(dyn, ninst, x1, u8, x2, x4, x5);
+                        wb1 = 0;
+                    } else {
+                        addr = geted(dyn, addr, ninst, nextop, &wback, x5, &fixedaddress, 0, 0, rex, 0, 1);
+                        u8 = F8;
+                        wb1 = 1;
+                        MARKLOCK;
+                        LDAXRB(x1, wback);
+                        emit_sbb8c(dyn, ninst, x1, u8, x2, x4, x5);
+                        STLXRB(x3, x1, wback);
+                        CBNZx_MARKLOCK(x3);
+                    }
+                    EBBACK;
+                    break;
+                case 4: //AND
+                    INST_NAME("AND Eb, Ib");
+                    SETFLAGS(X_ALL, SF_SET_PENDING);
+                    if(MODREG) {
+                        GETEB(x1, 1);
+                        u8 = F8;
+                        emit_and8c(dyn, ninst, x1, u8, x2, x4);
+                        wb1 = 0;
+                    } else {
+                        addr = geted(dyn, addr, ninst, nextop, &wback, x5, &fixedaddress, 0, 0, rex, 0, 1);
+                        u8 = F8;
+                        wb1 = 1;
+                        MARKLOCK;
+                        LDAXRB(x1, wback);
+                        emit_and8c(dyn, ninst, x1, u8, x2, x4);
+                        STLXRB(x3, x1, wback);
+                        CBNZx_MARKLOCK(x3);
+                    }
+                    EBBACK;
+                    break;
+                case 5: //SUB
+                    INST_NAME("SUB Eb, Ib");
+                    SETFLAGS(X_ALL, SF_SET_PENDING);
+                    if(MODREG) {
+                        GETEB(x1, 1);
+                        u8 = F8;
+                        emit_sub8c(dyn, ninst, x1, u8, x2, x4, x5);
+                        wb1 = 0;
+                    } else {
+                        addr = geted(dyn, addr, ninst, nextop, &wback, x5, &fixedaddress, 0, 0, rex, 0, 1);
+                        u8 = F8;
+                        wb1 = 1;
+                        MARKLOCK;
+                        LDAXRB(x1, wback);
+                        emit_sub8c(dyn, ninst, x1, u8, x2, x4, x5);
+                        STLXRB(x3, x1, wback);
+                        CBNZx_MARKLOCK(x3);
+                    }
+                    EBBACK;
+                    break;
+                case 6: //XOR
+                    INST_NAME("XOR Eb, Ib");
+                    SETFLAGS(X_ALL, SF_SET_PENDING);
+                    if(MODREG) {
+                        GETEB(x1, 1);
+                        u8 = F8;
+                        emit_xor8c(dyn, ninst, x1, u8, x2, x4);
+                        wb1 = 0;
+                    } else {
+                        addr = geted(dyn, addr, ninst, nextop, &wback, x5, &fixedaddress, 0, 0, rex, 0, 1);
+                        u8 = F8;
+                        wb1 = 1;
+                        MARKLOCK;
+                        LDAXRB(x1, wback);
+                        emit_xor8c(dyn, ninst, x1, u8, x2, x4);
+                        STLXRB(x3, x1, wback);
+                        CBNZx_MARKLOCK(x3);
+                    }
+                    EBBACK;
+                    break;
+                case 7: //CMP
+                    INST_NAME("CMP Eb, Ib");
+                    SETFLAGS(X_ALL, SF_SET_PENDING);
+                    GETEB(x1, 1);
+                    u8 = F8;
+                    if(u8) {
+                        MOV32w(x2, u8);
+                        emit_cmp8(dyn, ninst, x1, x2, x3, x4, x5);
+                    } else {
+                        emit_cmp8_0(dyn, ninst, x1, x3, x4);
+                    }
+                    break;
+                default:
+                    DEFAULT;
+            }
+            break;
         case 0x81:
         case 0x83:
             nextop = F8;
@@ -200,7 +625,7 @@ uintptr_t dynarec64_F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     } else {
                         INST_NAME("LOCK ADD Ed, Ib");
                     }
-                    SETFLAGS(X_ALL, SF_SET);
+                    SETFLAGS(X_ALL, SF_SET_PENDING);
                     if(MODREG) {
                         if(opcode==0x81) i64 = F32S; else i64 = F8S;
                         ed = xRAX+(nextop&7)+(rex.b<<3);
@@ -210,7 +635,7 @@ uintptr_t dynarec64_F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                         addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, 0, 0, rex, 0, (opcode==0x81)?4:1);
                         if(opcode==0x81) i64 = F32S; else i64 = F8S;
                         MOV64xw(x5, i64);
-                        TSTx_mask(wback, 1, 0, 1+rex.w);    // mask=3 or 7
+                        TSTx_mask(wback, 1, 0, 0);    // mask=1
                         B_MARK(cNE);
                         MARKLOCK;
                         LDAXRxw(x1, wback);
@@ -230,7 +655,7 @@ uintptr_t dynarec64_F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     break;
                 case 1: //OR
                     if(opcode==0x81) {INST_NAME("LOCK OR Ed, Id");} else {INST_NAME("LOCK OR Ed, Ib");}
-                    SETFLAGS(X_ALL, SF_SET);
+                    SETFLAGS(X_ALL, SF_SET_PENDING);
                     if(MODREG) {
                         if(opcode==0x81) i64 = F32S; else i64 = F8S;
                         ed = xRAX+(nextop&7)+(rex.b<<3);
@@ -250,7 +675,7 @@ uintptr_t dynarec64_F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                 case 2: //ADC
                     if(opcode==0x81) {INST_NAME("LOCK ADC Ed, Id");} else {INST_NAME("LOCK ADC Ed, Ib");}
                     READFLAGS(X_CF);
-                    SETFLAGS(X_ALL, SF_SET);
+                    SETFLAGS(X_ALL, SF_SET_PENDING);
                     if(MODREG) {
                         if(opcode==0x81) i64 = F32S; else i64 = F8S;
                         ed = xRAX+(nextop&7)+(rex.b<<3);
@@ -270,7 +695,7 @@ uintptr_t dynarec64_F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                 case 3: //SBB
                     if(opcode==0x81) {INST_NAME("LOCK SBB Ed, Id");} else {INST_NAME("LOCK SBB Ed, Ib");}
                     READFLAGS(X_CF);
-                    SETFLAGS(X_ALL, SF_SET);
+                    SETFLAGS(X_ALL, SF_SET_PENDING);
                     if(MODREG) {
                         if(opcode==0x81) i64 = F32S; else i64 = F8S;
                         ed = xRAX+(nextop&7)+(rex.b<<3);
@@ -289,7 +714,7 @@ uintptr_t dynarec64_F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     break;
                 case 4: //AND
                     if(opcode==0x81) {INST_NAME("LOCK AND Ed, Id");} else {INST_NAME("LOCK AND Ed, Ib");}
-                    SETFLAGS(X_ALL, SF_SET);
+                    SETFLAGS(X_ALL, SF_SET_PENDING);
                     if(MODREG) {
                         if(opcode==0x81) i64 = F32S; else i64 = F8S;
                         ed = xRAX+(nextop&7)+(rex.b<<3);
@@ -308,7 +733,7 @@ uintptr_t dynarec64_F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     break;
                 case 5: //SUB
                     if(opcode==0x81) {INST_NAME("LOCK SUB Ed, Id");} else {INST_NAME("LOCK SUB Ed, Ib");}
-                    SETFLAGS(X_ALL, SF_SET);
+                    SETFLAGS(X_ALL, SF_SET_PENDING);
                     if(MODREG) {
                         if(opcode==0x81) i64 = F32S; else i64 = F8S;
                         ed = xRAX+(nextop&7)+(rex.b<<3);
@@ -318,7 +743,7 @@ uintptr_t dynarec64_F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                         addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, 0, 0, rex, 0, (opcode==0x81)?4:1);
                         if(opcode==0x81) i64 = F32S; else i64 = F8S;
                         MOV64xw(x5, i64);
-                        TSTx_mask(wback, 1, 0, 1+rex.w);    // mask=3 or 7
+                        TSTx_mask(wback, 1, 0, 0);    // mask=1
                         B_MARK(cNE);
                         MARKLOCK;
                         LDAXRxw(x1, wback);
@@ -338,7 +763,7 @@ uintptr_t dynarec64_F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     break;
                 case 6: //XOR
                     if(opcode==0x81) {INST_NAME("LOCK XOR Ed, Id");} else {INST_NAME("LOCK XOR Ed, Ib");}
-                    SETFLAGS(X_ALL, SF_SET);
+                    SETFLAGS(X_ALL, SF_SET_PENDING);
                     if(MODREG) {
                         if(opcode==0x81) i64 = F32S; else i64 = F8S;
                         ed = xRAX+(nextop&7)+(rex.b<<3);
@@ -357,8 +782,8 @@ uintptr_t dynarec64_F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     break;
                 case 7: //CMP
                     if(opcode==0x81) {INST_NAME("(LOCK) CMP Ed, Id");} else {INST_NAME("(LOCK) CMP Ed, Ib");}
-                    SETFLAGS(X_ALL, SF_SET);
-                    GETED(0);
+                    SETFLAGS(X_ALL, SF_SET_PENDING);
+                    GETED((opcode==0x81)?4:1);
                     // No need to LOCK, this is readonly
                     if(opcode==0x81) i64 = F32S; else i64 = F8S;
                     if(i64) {
@@ -371,9 +796,96 @@ uintptr_t dynarec64_F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             }
             break;
             
+        case 0x87:
+            INST_NAME("LOCK XCHG Ed, Gd");
+            nextop = F8;
+            if(MODREG) {
+                GETGD;
+                GETED(0);
+                MOVxw_REG(x1, gd);
+                MOVxw_REG(gd, ed);
+                MOVxw_REG(ed, x1);
+            } else {
+                GETGD;
+                addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, 0, 0, rex, 0, 0);
+                TSTx_mask(ed, 1, 0, 1+rex.w);    // mask=3 or 7
+                B_MARK(cNE);
+                MARKLOCK;
+                LDAXRxw(x1, ed);
+                STLXRxw(x3, gd, ed);
+                CBNZx_MARKLOCK(x3);
+                B_MARK2_nocond;
+                MARK;
+                LDRxw_U12(x1, ed, 0);
+                STRxw_U12(gd, ed, 0);
+                MARK2;
+                MOVxw_REG(gd, x1);
+            }
+            break;
+            
+        case 0xFF:
+            nextop = F8;
+            switch((nextop>>3)&7)
+            {
+                case 0: // INC Ed
+                    INST_NAME("LOCK INC Ed");
+                    SETFLAGS(X_ALL&~X_CF, SF_SUBSET);
+                    if(MODREG) {
+                        ed = xRAX+(nextop&7)+(rex.b<<3);
+                        emit_inc32(dyn, ninst, rex, ed, x3, x4);
+                    } else {
+                        addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, 0, 0, rex, 0, 0);
+                        TSTx_mask(wback, 1, 0, 1+rex.w);    // mask=3 or 7
+                        B_MARK(cNE);    // unaligned
+                        MARKLOCK;
+                        LDAXRxw(x1, wback);
+                        emit_inc32(dyn, ninst, rex, x1, x3, x4);
+                        STLXRxw(x3, x1, wback);
+                        CBNZx_MARKLOCK(x3);
+                        B_NEXT_nocond;
+                        MARK;
+                        LDRxw_U12(x1, wback, 0);
+                        LDAXRB(x4, wback);
+                        BFIxw(x1, x4, 0, 8); // re-inject
+                        emit_inc32(dyn, ninst, rex, x1, x3, x4);
+                        STLXRB(x3, x1, wback);
+                        CBNZw_MARK(x3);
+                        STRxw_U12(x1, wback, 0);
+                    }
+                    break;
+                case 1: //DEC Ed
+                    INST_NAME("LOCK DEC Ed");
+                    SETFLAGS(X_ALL&~X_CF, SF_SUBSET);
+                    if(MODREG) {
+                        ed = xRAX+(nextop&7)+(rex.b<<3);
+                        emit_dec32(dyn, ninst, rex, ed, x3, x4);
+                    } else {
+                        addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, 0, 0, rex, 0, 0);
+                        TSTx_mask(wback, 1, 0, 1+rex.w);    // mask=3 or 7
+                        B_MARK(cNE);    // unaligned
+                        MARKLOCK;
+                        LDAXRxw(x1, wback);
+                        emit_dec32(dyn, ninst, rex, x1, x3, x4);
+                        STLXRxw(x3, x1, wback);
+                        CBNZx_MARKLOCK(x3);
+                        B_NEXT_nocond;
+                        MARK;
+                        LDRxw_U12(x1, wback, 0);
+                        LDAXRB(x4, wback);
+                        BFIxw(x1, x4, 0, 8); // re-inject
+                        emit_dec32(dyn, ninst, rex, x1, x3, x4);
+                        STLXRB(x3, x1, wback);
+                        CBNZw_MARK(x3);
+                        STRxw_U12(x1, wback, 0);
+                    }
+                    break;
+                default:
+                    DEFAULT;
+            }
+            break;
+            
         default:
             DEFAULT;
     }
     return addr;
 }
-

src/dynarec/dynarec_arm64_f20f.c

@@ -37,16 +37,23 @@
 #define GETGX(a)    gd = ((nextop&0x38)>>3)+(rex.r<<3); \
                     a = sse_get_reg(dyn, ninst, x1, gd)
 
+#define GETGX_empty(a)  gd = ((nextop&0x38)>>3)+(rex.r<<3); \
+                        a = sse_get_reg_empty(dyn, ninst, x1, gd)
+
 uintptr_t dynarec64_F20F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int* ok, int* need_epilog)
 {
+    (void)ip; (void)need_epilog;
+
     uint8_t opcode = F8;
     uint8_t nextop;
     uint8_t gd, ed;
     uint8_t wback;
+    uint8_t u8;
+    uint64_t u64;
     int v0, v1;
     int q0;
     int d0, d1;
-    int fixedaddress;
+    int64_t fixedaddress;
 
 #ifdef PRECISE_CVT
     int j32;
@@ -68,7 +75,7 @@ uintptr_t dynarec64_F20F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
                 ed = (nextop&7)+ (rex.b<<3);
                 v0 = sse_get_reg(dyn, ninst, x1, gd);
                 d0 = sse_get_reg(dyn, ninst, x1, ed);
-                VMOV(v0, d0);
+                VMOVeD(v0, 0, d0, 0);
             } else {
                 v0 = sse_get_reg_empty(dyn, ninst, x1, gd);
                 addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0xfff<<3, 7, rex, 0, 0);
@@ -83,12 +90,27 @@ uintptr_t dynarec64_F20F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
             if(MODREG) {
                 ed = (nextop&7)+ (rex.b<<3);
                 d0 = sse_get_reg(dyn, ninst, x1, ed);
-                VMOV(d0, v0);
+                VMOVeD(d0, 0, v0, 0);
             } else {
                 addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0xfff<<3, 7, rex, 0, 0);
                 VSTR64_U12(v0, ed, fixedaddress);
             }
             break;
+        case 0x12:
+            INST_NAME("MOVDDUP Gx, Ex");
+            nextop = F8;
+            GETG;
+            if(MODREG) {
+                d0 = sse_get_reg(dyn, ninst, x1, (nextop&7)+(rex.b<<3));
+                v0 = sse_get_reg_empty(dyn, ninst, x1, gd);
+                VMOVeD(v0, 0, d0, 0);
+            } else {
+                v0 = sse_get_reg_empty(dyn, ninst, x1, gd);
+                addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0xfff<<3, 7, rex, 0, 0);
+                VLDR64_U12(v0, ed, fixedaddress);
+            }
+            VMOVeD(v0, 1, v0, 0);
+            break;
 
         case 0x2A:
             INST_NAME("CVTSI2SD Gx, Ed");
@@ -188,7 +210,7 @@ uintptr_t dynarec64_F20F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
         case 0x5D:
             INST_NAME("MINSD Gx, Ex");
             nextop = F8;
-            gd = (nextop&0x38)>>3;
+            GETG;
             v0 = sse_get_reg(dyn, ninst, x1, gd);
             GETEX(v1, 0);
             // MINSD: if any input is NaN, or Ex[0]<Gx[0], copy Ex[0] -> Gx[0]
@@ -208,7 +230,7 @@ uintptr_t dynarec64_F20F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
         case 0x5F:
             INST_NAME("MAXSD Gx, Ex");
             nextop = F8;
-            gd = (nextop&0x38)>>3;
+            GETG;
             v0 = sse_get_reg(dyn, ninst, x1, gd);
             GETEX(v1, 0);
             // MAXSD: if any input is NaN, or Ex[0]>Gx[0], copy Ex[0] -> Gx[0]
@@ -217,6 +239,29 @@ uintptr_t dynarec64_F20F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
             VMOVeD(v0, 0, d0, 0);   // to not erase uper part
             break;
 
+        case 0x70:
+            INST_NAME("PSHUFLW Gx, Ex, Ib");
+            nextop = F8;
+            GETEX(v1, 1);
+            GETGX(v0);
+
+            u8 = F8;
+            // only low part need to be suffled. VTBL only handle 8bits value, so the 16bits suffles need to be changed in 8bits
+            u64 = 0;
+            for (int i=0; i<4; ++i) {
+                u64 |= ((uint64_t)((u8>>(i*2))&3)*2+0)<<(i*16+0);
+                u64 |= ((uint64_t)((u8>>(i*2))&3)*2+1)<<(i*16+8);
+            }
+            MOV64x(x2, u64);
+            d0 = fpu_get_scratch(dyn);
+            VMOVQDfrom(d0, 0, x2);
+            VTBL1_8(d0, v1, d0);
+            VMOVeD(v0, 0, d0, 0);
+            if(v0!=v1) {
+                VMOVeD(v0, 1, v1, 1);
+            }
+            break;
+
         case 0x7C:
             INST_NAME("HADDPS Gx, Ex");
             nextop = F8;
@@ -231,9 +276,72 @@ uintptr_t dynarec64_F20F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
             VFADDPQS(v0, v0, v1);
             break;
             
+        case 0xC2:
+            INST_NAME("CMPSD Gx, Ex, Ib");
+            nextop = F8;
+            GETGX(v0);
+            GETEX(v1, 1);
+            u8 = F8;
+            if((u8&7)==6){
+                FCMPD(v1, v0);
+            } else {
+                FCMPD(v0, v1);
+            }
+            switch(u8&7) {
+                case 0: CSETMx(x2, cEQ); CSELx(x2, xZR, x2, cVS); break;   // Equal
+                case 1: CSETMx(x2, cMI); CSELx(x2, xZR, x2, cVS); break;   // Less than
+                case 2: CSETMx(x2, cLE); CSELx(x2, xZR, x2, cVS); break;   // Less or equal
+                case 3: CSETMx(x2, cVS); break;   // NaN
+                case 4: CSETMx(x2, cNE); break;   // Not Equal
+                case 5: CSETMx(x2, cCS); break;   // Greater or equal or unordered
+                case 6: CSETMx(x2, cLT); break;   // Greater or unordered, test inverted, N!=V so unordered or less than (inverted)
+                case 7: CSETMx(x2, cVC); break;   // not NaN
+            }
+            VMOVQDfrom(v0, 0, x2);
+            break;
+
+        case 0xD0:
+            INST_NAME("ADDSUBPS Gx, Ex");
+            nextop = F8;
+            GETGX(v0);
+            GETEX(v1, 0);
+            q0 = fpu_get_scratch(dyn);
+            static float addsubps[4] = {-1.f, 1.f, -1.f, 1.f};
+            MAYUSE(addsubps);
+            TABLE64(x2, (uintptr_t)&addsubps);
+            VLDR128_U12(q0, x2, 0);
+            VFMLAQS(v0, v1, q0);
+            break;
+
+        case 0xE6:
+            INST_NAME("CVTPD2DQ Gx, Ex");
+            nextop = F8;
+            GETEX(v1, 0);
+            GETGX_empty(v0);
+            u8 = sse_setround(dyn, ninst, x1, x2, x3);
+            FRINTXD(v0, v1);
+            x87_restoreround(dyn, ninst, u8);
+            VFCVTNSQD(v0, v0);  // convert double -> int64
+            SQXTN_32(v0, v0);   // convert int64 -> int32 with saturation in lower part, RaZ high part
+            break;
+
+        case 0xF0:
+            INST_NAME("LDDQU Gx,Ex");
+            nextop = F8;
+            GETG;
+            if(MODREG) {
+                v1 = sse_get_reg(dyn, ninst, x1, (nextop&7)+(rex.b<<3));
+                v0 = sse_get_reg_empty(dyn, ninst, x1, gd);
+                VMOVQ(v0, v1);
+            } else {
+                v0 = sse_get_reg_empty(dyn, ninst, x1, gd);
+                addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0xfff<<4, 7, rex, 0, 0);
+                VLDR128_U12(v0, ed, fixedaddress);
+            }
+            break;
+
         default:
             DEFAULT;
     }
     return addr;
 }
-

src/dynarec/dynarec_arm64_f30f.c

@@ -42,14 +42,18 @@
 
 uintptr_t dynarec64_F30F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int* ok, int* need_epilog)
 {
+    (void)ip; (void)need_epilog;
+
     uint8_t opcode = F8;
     uint8_t nextop, u8;
     uint8_t gd, ed;
     uint8_t wback;
+    uint64_t u64;
     int v0, v1;
     int q0, q1;
     int d0, d1;
-    int fixedaddress;
+    int64_t fixedaddress;
+    int64_t j64;
 
     MAYUSE(d0);
     MAYUSE(d1);
@@ -57,6 +61,7 @@ uintptr_t dynarec64_F30F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
     MAYUSE(q1);
     MAYUSE(v0);
     MAYUSE(v1);
+    MAYUSE(j64);
 
     switch(opcode) {
 
@@ -115,6 +120,12 @@ uintptr_t dynarec64_F30F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
             VTRNQ2_32(q0, q1, q1);
             break;
 
+        case 0x1E:
+            INST_NAME("NOP / ENDBR32 / ENDBR64");
+            nextop = F8;
+            FAKEED;
+            break;
+
         case 0x2A:
             INST_NAME("CVTSI2SS Gx, Ed");
             nextop = F8;
@@ -136,7 +147,31 @@ uintptr_t dynarec64_F30F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
             GETEX(d0, 0);
             FCVTZSxwS(gd, d0);
             break;
-
+        case 0x2D:
+            INST_NAME("CVTSS2SI Gd, Ex");
+            nextop = F8;
+            GETGD;
+            GETEX(q0, 0);
+            #ifdef PRECISE_CVT
+            LDRH_U12(x1, xEmu, offsetof(x64emu_t, mxcsr));
+            UBFXx(x1, x1, 13, 2);   // extract round requested
+            LSLx_REG(x1, x1, 3);
+            ADDx_U12(x1, x1, 8);    // add the actual add+jump opcodes
+            // Construct a "switch case", with each case 2 instructions, so 8 bytes
+            BL(+4); // Branch with Link to next, so LR gets next PC address
+            ADDx_REG(xLR, xLR, x1);
+            B(xLR); // could use RET, but it's not really one
+            FCVTNSxwS(gd, q0);  // 0: Nearest (even)
+            B_NEXT_nocond;
+            FCVTMSxwS(gd, q0);  // 1: Toward -inf
+            B_NEXT_nocond;
+            FCVTPSxwS(gd, q0);  // 2: Toward +inf
+            B_NEXT_nocond;
+            FCVTZSxwS(gd, q0);  // 3: Toward 0
+            #else
+            FCVTNSxwS(gd, q0);
+            #endif
+            break;
         case 0x51:
             INST_NAME("SQRTSS Gx, Ex");
             nextop = F8;
@@ -146,6 +181,33 @@ uintptr_t dynarec64_F30F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
             FSQRTS(d1, d0);
             VMOVeS(v0, 0, d1, 0);
             break;
+        case 0x52:
+            INST_NAME("RSQRTSS Gx, Ex");
+            nextop = F8;
+            GETEX(v1, 0);
+            GETGX_empty(v0);
+            d0 = fpu_get_scratch(dyn);
+            d1 = fpu_get_scratch(dyn);
+            // so here: F32: Imm8 = abcd efgh that gives => aBbbbbbc defgh000 00000000 00000000
+            // and want 1.0f = 0x3f800000
+            // so 00111111 10000000 00000000 00000000
+            // a = 0, b = 1, c = 1, d = 1, efgh=0
+            // 0b01110000
+            FMOVS_8(d0, 0b01110000);
+            FSQRTS(d1, v1);
+            FDIVS(d0, d0, d1);
+            VMOVeS(v0, 0, d0, 0);
+            break;
+        case 0x53:
+            INST_NAME("RCPSS Gx, Ex");
+            nextop = F8;
+            GETGX(v0);
+            GETEX(v1, 0);
+            d0 = fpu_get_scratch(dyn);
+            FMOVS_8(d0, 0b01110000);    //1.0f
+            FDIVS(d0, d0, v1);
+            VMOVeS(v0, 0, d0, 0);
+            break;
 
         case 0x58:
             INST_NAME("ADDSS Gx, Ex");
@@ -174,6 +236,13 @@ uintptr_t dynarec64_F30F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
             FCVT_D_S(d0, v1);
             VMOVeD(v0, 0, d0, 0);
             break;
+        case 0x5B:
+            INST_NAME("CVTPS2DQ Gx, Ex");
+            nextop = F8;
+            GETEX(d0, 0);
+            GETGX_empty(v0);
+            VFCVTZSQS(v0, d0);
+            break;
 
         case 0x5C:
             INST_NAME("SUBSS Gx, Ex");
@@ -227,6 +296,28 @@ uintptr_t dynarec64_F30F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
                 VLDR128_U12(v0, ed, fixedaddress);
             }
             break;
+        case 0x70:
+            INST_NAME("PSHUFHW Gx, Ex, Ib");
+            nextop = F8;
+            GETEX(v1, 1);
+            GETGX(v0);
+
+            u8 = F8;
+            // only high part need to be suffled. VTBL only handle 8bits value, so the 16bits suffles need to be changed in 8bits
+            u64 = 0;
+            for (int i=0; i<4; ++i) {
+                u64 |= ((uint64_t)((u8>>(i*2))&3)*2+8)<<(i*16+0);
+                u64 |= ((uint64_t)((u8>>(i*2))&3)*2+9)<<(i*16+8);
+            }
+            MOV64x(x2, u64);
+            d0 = fpu_get_scratch(dyn);
+            VMOVQDfrom(d0, 0, x2);
+            VTBL1_8(d0, v1, d0);
+            VMOVeD(v0, 1, d0, 0);
+            if(v0!=v1) {
+                VMOVeD(v0, 0, v1, 0);
+            }
+            break;
 
         case 0x7E:
             INST_NAME("MOVQ Gx, Ex");
@@ -257,6 +348,36 @@ uintptr_t dynarec64_F30F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
             }
             break;
 
+        case 0xBC:
+            INST_NAME("TZCNT Gd, Ed");
+            SETFLAGS(X_CF|X_ZF, SF_SUBSET);
+            SET_DFNONE(x1);
+            nextop = F8;
+            GETED(0);
+            GETGD;
+            TSTxw_REG(ed, ed);
+            BFIw(xFlags, x1, F_CF, 1);  // CF = is source 0?
+            RBITxw(x1, ed);   // reverse
+            CLZxw(gd, x1);    // x2 gets leading 0 == TZCNT
+            TSTxw_REG(gd, gd);
+            CSETw(x1, cEQ);
+            BFIw(xFlags, x1, F_ZF, 1);  // ZF = is dest 0?
+            break;
+        case 0xBD:
+            INST_NAME("LZCNT Gd, Ed");
+            SETFLAGS(X_CF|X_ZF, SF_SUBSET);
+            SET_DFNONE(x1);
+            nextop = F8;
+            GETED(0);
+            GETGD;
+            TSTxw_REG(ed, ed);
+            BFIw(xFlags, x1, F_CF, 1);  // CF = is source 0?
+            CLZxw(gd, x1);    // x2 gets leading 0 == LZCNT
+            TSTxw_REG(gd, gd);
+            CSETw(x1, cEQ);
+            BFIw(xFlags, x1, F_ZF, 1);  // ZF = is dest 0?
+            break;
+
         case 0xC2:
             INST_NAME("CMPSS Gx, Ex, Ib");
             nextop = F8;
@@ -269,22 +390,44 @@ uintptr_t dynarec64_F30F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
                 FCMPS(v0, v1);
             }
             switch(u8&7) {
-                case 0: CSETMw(x2, cEQ); break;   // Equal
-                case 1: CSETMw(x2, cMI); break;   // Less than
-                case 2: //CSETMw(x2, cLE); break;   // Less or equal (or unordered on ARM64, not on x86...)
-                        CSETMw(x2, cPL); CSINVw(x2, xZR, x2, cEQ); break;   // so use a 2 step here, but 1st test inverted because 2nd step invert again
+                case 0: CSETMw(x2, cEQ); CSELw(x2, xZR, x2, cVS); break;   // Equal
+                case 1: CSETMw(x2, cMI); CSELw(x2, xZR, x2, cVS); break;   // Less than
+                case 2: CSETMw(x2, cLE); CSELw(x2, xZR, x2, cVS); break;   // Less or equal
                 case 3: CSETMw(x2, cVS); break;   // NaN
-                case 4: CSETMw(x2, cNE); break;   // Not Equal (or unordered on ARM, not on X86...)
+                case 4: CSETMw(x2, cNE); break;   // Not Equal
                 case 5: CSETMw(x2, cCS); break;   // Greater or equal or unordered
-                case 6: CSETMw(x2, cLT); break;   // Greater or unordered, test inverted, N!=V so unordereded or less than (inverted)
+                case 6: CSETMw(x2, cLT); break;   // Greater or unordered, test inverted, N!=V so unordered or less than (inverted)
                 case 7: CSETMw(x2, cVC); break;   // not NaN
             }
             VMOVQSfrom(v0, 0, x2);
             break;
 
+        case 0xD6:
+            INST_NAME("MOVQ2DQ Gx, Em");
+            nextop = F8;
+            GETGX_empty(v0);
+            if(MODREG) {
+                v1 = mmx_get_reg(dyn, ninst, x1, (nextop&7));
+                VEORQ(v0, v0, v0);  // usefull?
+                VMOV(v0, v1);
+            } else {
+                addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0xfff<<3, 7, rex, 0, 0);
+                VLDR64_U12(v0, ed, fixedaddress);
+            }
+            break;
+
+        case 0xE6:
+            INST_NAME("CVTDQ2PD Gx, Ex");
+            nextop = F8;
+            GETEX(v1, 0);
+            GETGX_empty(v0);
+            d0 = fpu_get_scratch(dyn);
+            SXTL_32(v0, v1);
+            SCVTQFD(v0, v0);    // there is only I64 -> Double vector conversion, not from i32
+            break;
+
         default:
             DEFAULT;
     }
     return addr;
 }
-

src/dynarec/dynarec_arm64_functions.c

@@ -25,10 +25,12 @@
 #include "dynarec_arm64.h"
 #include "dynarec_arm64_private.h"
 #include "dynarec_arm64_functions.h"
+#include "custommem.h"
+#include "bridge.h"
 
 void arm_fstp(x64emu_t* emu, void* p)
 {
-    if(ST0.q!=STld(0).ref)
+    if(ST0.q!=STld(0).uref)
         D2LD(&ST0.d, p);
     else
         memcpy(p, &STld(0).ld, 10);
@@ -36,7 +38,8 @@ void arm_fstp(x64emu_t* emu, void* p)
 
 void arm_print_armreg(x64emu_t* emu, uintptr_t reg, uintptr_t n)
 {
-    dynarec_log(LOG_DEBUG, "R%ld=0x%lx (%ld)\n", n, reg, reg);
+    (void)emu;
+    dynarec_log(LOG_DEBUG, "R%lu=0x%lx (%lu)\n", n, reg, reg);
 }
 
 void arm_f2xm1(x64emu_t* emu)
@@ -50,6 +53,7 @@ void arm_fyl2x(x64emu_t* emu)
 void arm_ftan(x64emu_t* emu)
 {
     ST0.d = tan(ST0.d);
+    emu->sw.f.F87_C2 = 0;
 }
 void arm_fpatan(x64emu_t* emu)
 {
@@ -78,6 +82,7 @@ void arm_fyl2xp1(x64emu_t* emu)
 void arm_fsincos(x64emu_t* emu)
 {
     sincos(ST1.d, &ST1.d, &ST0.d);
+    emu->sw.f.F87_C2 = 0;
 }
 void arm_frndint(x64emu_t* emu)
 {
@@ -85,15 +90,18 @@ void arm_frndint(x64emu_t* emu)
 }
 void arm_fscale(x64emu_t* emu)
 {
-    ST0.d *= exp2(trunc(ST1.d));
+    if(ST0.d!=0.0)
+        ST0.d *= exp2(trunc(ST1.d));
 }
 void arm_fsin(x64emu_t* emu)
 {
     ST0.d = sin(ST0.d);
+    emu->sw.f.F87_C2 = 0;
 }
 void arm_fcos(x64emu_t* emu)
 {
     ST0.d = cos(ST0.d);
+    emu->sw.f.F87_C2 = 0;
 }
 
 void arm_fbld(x64emu_t* emu, uint8_t* ed)
@@ -106,8 +114,8 @@ void arm_fild64(x64emu_t* emu, int64_t* ed)
     int64_t tmp;
     memcpy(&tmp, ed, sizeof(tmp));
     ST0.d = tmp;
-    STll(0).ll = tmp;
-    STll(0).ref = ST0.q;
+    STll(0).sq = tmp;
+    STll(0).sref = ST0.sq;
 }
 
 void arm_fbstp(x64emu_t* emu, uint8_t* ed)
@@ -118,8 +126,8 @@ void arm_fbstp(x64emu_t* emu, uint8_t* ed)
 void arm_fistp64(x64emu_t* emu, int64_t* ed)
 {
     // used of memcpy to avoid aligments issues
-    if(STll(0).ref==ST(0).q) {
-        memcpy(ed, &STll(0).ll, sizeof(int64_t));
+    if(STll(0).sref==ST(0).sq) {
+        memcpy(ed, &STll(0).sq, sizeof(int64_t));
     } else {
         int64_t tmp;
         if(isgreater(ST0.d, (double)(int64_t)0x7fffffffffffffffLL) || isless(ST0.d, (double)(int64_t)0x8000000000000000LL) || !isfinite(ST0.d))
@@ -141,7 +149,7 @@ void arm_fld(x64emu_t* emu, uint8_t* ed)
 {
     memcpy(&STld(0).ld, ed, 10);
     LD2D(&STld(0), &ST(0).d);
-    STld(0).ref = ST0.q;
+    STld(0).uref = ST0.q;
 }
 
 void arm_ud(x64emu_t* emu)
@@ -183,6 +191,125 @@ void arm_fprem1(x64emu_t* emu)
     emu->sw.f.F87_C3 = ((tmp32s>>1)&1);
     emu->sw.f.F87_C1 = ((tmp32s>>2)&1);
 }
+
+static uint8_t ff_mult(uint8_t a, uint8_t b)
+{
+	int retval = 0;
+
+	for(int i = 0; i < 8; i++) {
+		if((b & 1) == 1) 
+			retval ^= a;
+		
+		if((a & 0x80)) {
+			a <<= 1;
+			a  ^= 0x1b;
+		} else {
+			a <<= 1;
+		}
+		
+		b >>= 1;
+	}
+	
+	return retval;
+}
+
+void arm_aesimc(x64emu_t* emu, int xmm)
+{
+    sse_regs_t eax1 = emu->xmm[xmm];
+
+    for(int j=0; j<4; ++j) {
+        emu->xmm[xmm].ub[0+j*4] = ff_mult(0x0E, eax1.ub[0+j*4]) ^ ff_mult(0x0B, eax1.ub[1+j*4]) ^ ff_mult(0x0D, eax1.ub[2+j*4]) ^ ff_mult(0x09, eax1.ub[3+j*4]);
+        emu->xmm[xmm].ub[1+j*4] = ff_mult(0x09, eax1.ub[0+j*4]) ^ ff_mult(0x0E, eax1.ub[1+j*4]) ^ ff_mult(0x0B, eax1.ub[2+j*4]) ^ ff_mult(0x0D, eax1.ub[3+j*4]);
+        emu->xmm[xmm].ub[2+j*4] = ff_mult(0x0D, eax1.ub[0+j*4]) ^ ff_mult(0x09, eax1.ub[1+j*4]) ^ ff_mult(0x0E, eax1.ub[2+j*4]) ^ ff_mult(0x0B, eax1.ub[3+j*4]);
+        emu->xmm[xmm].ub[3+j*4] = ff_mult(0x0B, eax1.ub[0+j*4]) ^ ff_mult(0x0D, eax1.ub[1+j*4]) ^ ff_mult(0x09, eax1.ub[2+j*4]) ^ ff_mult(0x0E, eax1.ub[3+j*4]);
+    }
+}
+void arm_aesmc(x64emu_t* emu, int xmm)
+{
+    sse_regs_t eax1 = emu->xmm[xmm];
+
+    for(int j=0; j<4; ++j) {
+        emu->xmm[xmm].ub[0+j*4] = ff_mult(0x02, eax1.ub[0+j*4]) ^ ff_mult(0x03, eax1.ub[1+j*4]) ^               eax1.ub[2+j*4]  ^               eax1.ub[3+j*4] ;
+        emu->xmm[xmm].ub[1+j*4] =               eax1.ub[0+j*4]  ^ ff_mult(0x02, eax1.ub[1+j*4]) ^ ff_mult(0x03, eax1.ub[2+j*4]) ^               eax1.ub[3+j*4] ;
+        emu->xmm[xmm].ub[2+j*4] =               eax1.ub[0+j*4]  ^               eax1.ub[1+j*4]  ^ ff_mult(0x02, eax1.ub[2+j*4]) ^ ff_mult(0x03, eax1.ub[3+j*4]);
+        emu->xmm[xmm].ub[3+j*4] = ff_mult(0x03, eax1.ub[0+j*4]) ^               eax1.ub[1+j*4]  ^               eax1.ub[2+j*4]  ^ ff_mult(0x02, eax1.ub[3+j*4]);
+    }
+}
+void arm_aesdlast(x64emu_t* emu, int xmm)
+{
+                            //   A0 B1 C2 D3 E4 F5 G6 H7 I8 J9 Ka Lb Mc Nd Oe Pf
+                            //   A  N  K  H  E  B  O  L  I  F  C  P  M  J  G  D
+    const uint8_t invshiftrows[] = {0,13,10, 7, 4, 1,14,11, 8, 5, 2,15,12, 9, 6, 3};
+    const uint8_t invsubbytes[256] = {
+        0x52, 0x09, 0x6a, 0xd5, 0x30, 0x36, 0xa5, 0x38, 0xbf, 0x40, 0xa3, 0x9e, 0x81, 0xf3, 0xd7, 0xfb,
+        0x7c, 0xe3, 0x39, 0x82, 0x9b, 0x2f, 0xff, 0x87, 0x34, 0x8e, 0x43, 0x44, 0xc4, 0xde, 0xe9, 0xcb,
+        0x54, 0x7b, 0x94, 0x32, 0xa6, 0xc2, 0x23, 0x3d, 0xee, 0x4c, 0x95, 0x0b, 0x42, 0xfa, 0xc3, 0x4e,
+        0x08, 0x2e, 0xa1, 0x66, 0x28, 0xd9, 0x24, 0xb2, 0x76, 0x5b, 0xa2, 0x49, 0x6d, 0x8b, 0xd1, 0x25,
+        0x72, 0xf8, 0xf6, 0x64, 0x86, 0x68, 0x98, 0x16, 0xd4, 0xa4, 0x5c, 0xcc, 0x5d, 0x65, 0xb6, 0x92,
+        0x6c, 0x70, 0x48, 0x50, 0xfd, 0xed, 0xb9, 0xda, 0x5e, 0x15, 0x46, 0x57, 0xa7, 0x8d, 0x9d, 0x84,
+        0x90, 0xd8, 0xab, 0x00, 0x8c, 0xbc, 0xd3, 0x0a, 0xf7, 0xe4, 0x58, 0x05, 0xb8, 0xb3, 0x45, 0x06,
+        0xd0, 0x2c, 0x1e, 0x8f, 0xca, 0x3f, 0x0f, 0x02, 0xc1, 0xaf, 0xbd, 0x03, 0x01, 0x13, 0x8a, 0x6b,
+        0x3a, 0x91, 0x11, 0x41, 0x4f, 0x67, 0xdc, 0xea, 0x97, 0xf2, 0xcf, 0xce, 0xf0, 0xb4, 0xe6, 0x73,
+        0x96, 0xac, 0x74, 0x22, 0xe7, 0xad, 0x35, 0x85, 0xe2, 0xf9, 0x37, 0xe8, 0x1c, 0x75, 0xdf, 0x6e,
+        0x47, 0xf1, 0x1a, 0x71, 0x1d, 0x29, 0xc5, 0x89, 0x6f, 0xb7, 0x62, 0x0e, 0xaa, 0x18, 0xbe, 0x1b,
+        0xfc, 0x56, 0x3e, 0x4b, 0xc6, 0xd2, 0x79, 0x20, 0x9a, 0xdb, 0xc0, 0xfe, 0x78, 0xcd, 0x5a, 0xf4,
+        0x1f, 0xdd, 0xa8, 0x33, 0x88, 0x07, 0xc7, 0x31, 0xb1, 0x12, 0x10, 0x59, 0x27, 0x80, 0xec, 0x5f,
+        0x60, 0x51, 0x7f, 0xa9, 0x19, 0xb5, 0x4a, 0x0d, 0x2d, 0xe5, 0x7a, 0x9f, 0x93, 0xc9, 0x9c, 0xef,
+        0xa0, 0xe0, 0x3b, 0x4d, 0xae, 0x2a, 0xf5, 0xb0, 0xc8, 0xeb, 0xbb, 0x3c, 0x83, 0x53, 0x99, 0x61,
+        0x17, 0x2b, 0x04, 0x7e, 0xba, 0x77, 0xd6, 0x26, 0xe1, 0x69, 0x14, 0x63, 0x55, 0x21, 0x0c, 0x7d,
+    };
+
+    sse_regs_t eax1;
+    for(int i=0; i<16; ++i)
+        eax1.ub[i] = emu->xmm[xmm].ub[invshiftrows[i]];
+    //STATE ← InvSubBytes( STATE );
+    for(int i=0; i<16; ++i)
+        emu->xmm[xmm].ub[i] = invsubbytes[eax1.ub[i]];
+
+}
+void arm_aeselast(x64emu_t* emu, int xmm)
+{
+                            //   A0 B1 C2 D3 E4 F5 G6 H7 I8 J9 Ka Lb Mc Nd Oe Pf
+                            //   A  F  K  P  E  J  O  D  I  N  C  H  M  B  G  L
+    const uint8_t shiftrows[] = {0, 5,10,15, 4, 9,14, 3, 8,13, 2, 7,12, 1, 6,11};
+    const uint8_t subbytes[256] = {
+        0x63, 0x7c, 0x77, 0x7b, 0xf2, 0x6b, 0x6f, 0xc5, 0x30, 0x01, 0x67, 0x2b, 0xfe, 0xd7, 0xab, 0x76,
+        0xca, 0x82, 0xc9, 0x7d, 0xfa, 0x59, 0x47, 0xf0, 0xad, 0xd4, 0xa2, 0xaf, 0x9c, 0xa4, 0x72, 0xc0,
+        0xb7, 0xfd, 0x93, 0x26, 0x36, 0x3f, 0xf7, 0xcc, 0x34, 0xa5, 0xe5, 0xf1, 0x71, 0xd8, 0x31, 0x15,
+        0x04, 0xc7, 0x23, 0xc3, 0x18, 0x96, 0x05, 0x9a, 0x07, 0x12, 0x80, 0xe2, 0xeb, 0x27, 0xb2, 0x75,
+        0x09, 0x83, 0x2c, 0x1a, 0x1b, 0x6e, 0x5a, 0xa0, 0x52, 0x3b, 0xd6, 0xb3, 0x29, 0xe3, 0x2f, 0x84,
+        0x53, 0xd1, 0x00, 0xed, 0x20, 0xfc, 0xb1, 0x5b, 0x6a, 0xcb, 0xbe, 0x39, 0x4a, 0x4c, 0x58, 0xcf,
+        0xd0, 0xef, 0xaa, 0xfb, 0x43, 0x4d, 0x33, 0x85, 0x45, 0xf9, 0x02, 0x7f, 0x50, 0x3c, 0x9f, 0xa8,
+        0x51, 0xa3, 0x40, 0x8f, 0x92, 0x9d, 0x38, 0xf5, 0xbc, 0xb6, 0xda, 0x21, 0x10, 0xff, 0xf3, 0xd2,
+        0xcd, 0x0c, 0x13, 0xec, 0x5f, 0x97, 0x44, 0x17, 0xc4, 0xa7, 0x7e, 0x3d, 0x64, 0x5d, 0x19, 0x73,
+        0x60, 0x81, 0x4f, 0xdc, 0x22, 0x2a, 0x90, 0x88, 0x46, 0xee, 0xb8, 0x14, 0xde, 0x5e, 0x0b, 0xdb,
+        0xe0, 0x32, 0x3a, 0x0a, 0x49, 0x06, 0x24, 0x5c, 0xc2, 0xd3, 0xac, 0x62, 0x91, 0x95, 0xe4, 0x79,
+        0xe7, 0xc8, 0x37, 0x6d, 0x8d, 0xd5, 0x4e, 0xa9, 0x6c, 0x56, 0xf4, 0xea, 0x65, 0x7a, 0xae, 0x08,
+        0xba, 0x78, 0x25, 0x2e, 0x1c, 0xa6, 0xb4, 0xc6, 0xe8, 0xdd, 0x74, 0x1f, 0x4b, 0xbd, 0x8b, 0x8a,
+        0x70, 0x3e, 0xb5, 0x66, 0x48, 0x03, 0xf6, 0x0e, 0x61, 0x35, 0x57, 0xb9, 0x86, 0xc1, 0x1d, 0x9e,
+        0xe1, 0xf8, 0x98, 0x11, 0x69, 0xd9, 0x8e, 0x94, 0x9b, 0x1e, 0x87, 0xe9, 0xce, 0x55, 0x28, 0xdf,
+        0x8c, 0xa1, 0x89, 0x0d, 0xbf, 0xe6, 0x42, 0x68, 0x41, 0x99, 0x2d, 0x0f, 0xb0, 0x54, 0xbb, 0x16,
+    };
+
+    sse_regs_t eax1;
+    for(int i=0; i<16; ++i)
+        eax1.ub[i] = emu->xmm[xmm].ub[shiftrows[i]];
+    //STATE ← SubBytes( STATE );
+    for(int i=0; i<16; ++i)
+        emu->xmm[xmm].ub[i] = subbytes[eax1.ub[i]];
+}
+void arm_aesd(x64emu_t* emu, int xmm)
+{
+    arm_aesdlast(emu, xmm);
+    arm_aesimc(emu, xmm);
+}
+void arm_aese(x64emu_t* emu, int xmm)
+{
+    arm_aeselast(emu, xmm);
+    arm_aesmc(emu, xmm);
+}
+
+
 #define XMM0    0
 #define XMM8    16
 #define X870    8
@@ -244,6 +371,7 @@ void fpu_reset_reg(dynarec_arm_t* dyn)
 // Get if ED will have the correct parity. Not emiting anything. Parity is 2 for DWORD or 3 for QWORD
 int getedparity(dynarec_arm_t* dyn, int ninst, uintptr_t addr, uint8_t nextop, int parity, int delta)
 {
+    (void)dyn; (void)ninst;
 
     uint32_t tested = (1<<parity)-1;
     if((nextop&0xC0)==0xC0)
@@ -282,6 +410,8 @@ int getedparity(dynarec_arm_t* dyn, int ninst, uintptr_t addr, uint8_t nextop, i
 // Do the GETED, but don't emit anything...
 uintptr_t fakeed(dynarec_arm_t* dyn, uintptr_t addr, int ninst, uint8_t nextop) 
 {
+    (void)dyn; (void)addr; (void)ninst;
+
     if((nextop&0xC0)==0xC0)
         return addr;
     if(!(nextop&0xC0)) {
@@ -310,16 +440,18 @@ uintptr_t fakeed(dynarec_arm_t* dyn, uintptr_t addr, int ninst, uint8_t nextop)
 
 int isNativeCall(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t* calladdress, int* retn)
 {
+    (void)dyn;
+
 #define PK(a)       *(uint8_t*)(addr+a)
 #define PK32(a)     *(int32_t*)(addr+a)
 
-    if(!addr)
+    if(!addr || !getProtection(addr))
         return 0;
     if(PK(0)==0xff && PK(1)==0x25) {            // "absolute" jump, maybe the GOT (well, RIP relative in fact)
         uintptr_t a1 = addr + 6 + (PK32(2));    // need to add a check to see if the address is from the GOT !
-        addr = *(uintptr_t*)a1; 
+        addr = (uintptr_t)getAlternate(*(void**)a1);
     }
-    if(addr<0x10000)    // too low, that is suspicious
+    if(!addr || !getProtection(addr))
         return 0;
     onebridge_t *b = (onebridge_t*)(addr);
     if(b->CC==0xCC && b->S=='S' && b->C=='C' && b->w!=(wrapper_t)0 && b->f!=(uintptr_t)PltResolver) {
@@ -332,4 +464,3 @@ int isNativeCall(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t* calladdress, int
 #undef PK32
 #undef PK
 }
-

src/dynarec/dynarec_arm64_functions.h

@@ -29,6 +29,13 @@ void arm_fsave(x64emu_t* emu, uint8_t* ed);
 void arm_frstor(x64emu_t* emu, uint8_t* ed);
 void arm_fprem1(x64emu_t* emu);
 
+void arm_aesd(x64emu_t* emu, int xmm);
+void arm_aese(x64emu_t* emu, int xmm);
+void arm_aesdlast(x64emu_t* emu, int xmm);
+void arm_aeselast(x64emu_t* emu, int xmm);
+void arm_aesimc(x64emu_t* emu, int xmm);
+
+
 void arm_ud(x64emu_t* emu);
 
 // Get an FPU scratch reg

src/dynarec/dynarec_arm64_helper.c

@@ -26,8 +26,10 @@
 #include "dynarec_arm64_helper.h"
 
 /* setup r2 to address pointed by ED, also fixaddress is an optionnal delta in the range [-absmax, +absmax], with delta&mask==0 to be added to ed for LDR/STR */
-uintptr_t geted(dynarec_arm_t* dyn, uintptr_t addr, int ninst, uint8_t nextop, uint8_t* ed, uint8_t hint, int* fixaddress, int absmax, uint32_t mask, rex_t rex, int s, int delta)
+uintptr_t geted(dynarec_arm_t* dyn, uintptr_t addr, int ninst, uint8_t nextop, uint8_t* ed, uint8_t hint, int64_t* fixaddress, int absmax, uint32_t mask, rex_t rex, int s, int delta)
 {
+    MAYUSE(dyn); MAYUSE(ninst); MAYUSE(delta);
+
     uint8_t ret = x2;
     uint8_t scratch = x2;
     *fixaddress = 0;
@@ -41,7 +43,7 @@ uintptr_t geted(dynarec_arm_t* dyn, uintptr_t addr, int ninst, uint8_t nextop, u
             uint8_t sib = F8;
             int sib_reg = ((sib>>3)&7)+(rex.x<<3);
             if((sib&0x7)==5) {
-                uint64_t tmp = F32S64;
+                int64_t tmp = F32S;
                 if (sib_reg!=4) {
                     if(tmp && ((tmp<absmin) || (tmp>absmax) || (tmp&mask))) {
                         MOV64x(scratch, tmp);
@@ -62,9 +64,21 @@ uintptr_t geted(dynarec_arm_t* dyn, uintptr_t addr, int ninst, uint8_t nextop, u
             }
         } else if((nextop&7)==5) {
             uint64_t tmp = F32S64;
-            MOV64x(ret, tmp);
-            GETIP(addr+delta);
-            ADDx_REG(ret, ret, xRIP);
+            if((tmp>=absmin) && (tmp<=absmax) && !(tmp&mask)) {
+                GETIP(addr+delta);
+                ret = xRIP;
+                *fixaddress = tmp;
+            } else if(tmp<0x1000) {
+                GETIP(addr+delta);
+                ADDx_U12(ret, xRIP, tmp);
+            } else if(tmp+addr+delta<0x1000000000000LL) {  // 3 opcodes to load immediate is cheap enough
+                tmp += addr+delta;
+                MOV64x(ret, tmp);
+            } else {
+                MOV64x(ret, tmp);
+                GETIP(addr+delta);
+                ADDx_REG(ret, ret, xRIP);
+            }
         } else {
             ret = xRAX+(nextop&7)+(rex.b<<3);
         }
@@ -140,9 +154,132 @@ uintptr_t geted(dynarec_arm_t* dyn, uintptr_t addr, int ninst, uint8_t nextop, u
     return addr;
 }
 
-/* setup r2 to address pointed by ED, r3 as scratch also fixaddress is an optionnal delta in the range [-absmax, +absmax], with delta&mask==0 to be added to ed for LDR/STR */
-uintptr_t geted16(dynarec_arm_t* dyn, uintptr_t addr, int ninst, uint8_t nextop, uint8_t* ed, uint8_t hint, int* fixaddress, int absmax, uint32_t mask, int s)
+/* setup r2 to address pointed by ED, also fixaddress is an optionnal delta in the range [-absmax, +absmax], with delta&mask==0 to be added to ed for LDR/STR */
+uintptr_t geted32(dynarec_arm_t* dyn, uintptr_t addr, int ninst, uint8_t nextop, uint8_t* ed, uint8_t hint, int64_t* fixaddress, int absmax, uint32_t mask, rex_t rex, int s, int delta)
 {
+    MAYUSE(dyn); MAYUSE(ninst); MAYUSE(delta);
+
+    uint8_t ret = x2;
+    uint8_t scratch = x2;
+    *fixaddress = 0;
+    if(hint>0) ret = hint;
+    if(hint>0 && hint<xRAX) scratch = hint;
+    int absmin = 0;
+    if(s) absmin=-absmax;
+    MAYUSE(scratch);
+    if(!(nextop&0xC0)) {
+        if((nextop&7)==4) {
+            uint8_t sib = F8;
+            int sib_reg = ((sib>>3)&7)+(rex.x<<3);
+            if((sib&0x7)==5) {
+                int64_t tmp = F32S;
+                if (sib_reg!=4) {
+                    if(tmp && ((tmp<absmin) || (tmp>absmax) || (tmp&mask))) {
+                        MOV64x(scratch, tmp);
+                        ADDw_REG_LSL(ret, scratch, xRAX+sib_reg, (sib>>6));
+                    } else {
+                        LSLw(ret, xRAX+sib_reg, (sib>>6));
+                        *fixaddress = tmp;
+                    }
+                } else {
+                    MOV64x(ret, tmp);
+                }
+            } else {
+                if (sib_reg!=4) {
+                    ADDw_REG_LSL(ret, xRAX+(sib&0x7)+(rex.b<<3), xRAX+sib_reg, (sib>>6));
+                } else {
+                    ret = xRAX+(sib&0x7)+(rex.b<<3);
+                }
+            }
+        } else if((nextop&7)==5) {
+            uint32_t tmp = F32;
+            MOV32w(ret, tmp);
+            GETIP(addr+delta);
+            ADDw_REG(ret, ret, xRIP);
+        } else {
+            ret = xRAX+(nextop&7)+(rex.b<<3);
+            if(ret==hint) {
+                MOVw_REG(hint, ret);    //to clear upper part
+            }
+        }
+    } else {
+        int64_t i64;
+        uint8_t sib = 0;
+        int sib_reg = 0;
+        if((nextop&7)==4) {
+            sib = F8;
+            sib_reg = ((sib>>3)&7)+(rex.x<<3);
+        }
+        if(nextop&0x80)
+            i64 = F32S;
+        else 
+            i64 = F8S;
+        if(i64==0 || ((i64>=absmin) && (i64<=absmax)  && !(i64&mask))) {
+            *fixaddress = i64;
+            if((nextop&7)==4) {
+                if (sib_reg!=4) {
+                    ADDw_REG_LSL(ret, xRAX+(sib&0x07)+(rex.b<<3), xRAX+sib_reg, (sib>>6));
+                } else {
+                    ret = xRAX+(sib&0x07)+(rex.b<<3);
+                }
+            } else {
+                ret = xRAX+(nextop&0x07)+(rex.b<<3);
+            }
+        } else {
+            int64_t sub = (i64<0)?1:0;
+            if(sub) i64 = -i64;
+            if(i64<0x1000) {
+                if((nextop&7)==4) {
+                    if (sib_reg!=4) {
+                        ADDw_REG_LSL(scratch, xRAX+(sib&0x07)+(rex.b<<3), xRAX+sib_reg, (sib>>6));
+                    } else {
+                        scratch = xRAX+(sib&0x07)+(rex.b<<3);
+                    }
+                } else
+                    scratch = xRAX+(nextop&0x07)+(rex.b<<3);
+                if(sub) {
+                    SUBw_U12(ret, scratch, i64);
+                } else {
+                    ADDw_U12(ret, scratch, i64);
+                }
+            } else {
+                MOV32w(scratch, i64);
+                if((nextop&7)==4) {
+                    if (sib_reg!=4) {
+                        if(sub) {
+                            SUBw_REG(scratch, xRAX+(sib&0x07)+(rex.b<<3), scratch);
+                        } else {
+                            ADDw_REG(scratch, scratch, xRAX+(sib&0x07)+(rex.b<<3));
+                        }
+                        ADDw_REG_LSL(ret, scratch, xRAX+sib_reg, (sib>>6));
+                    } else {
+                        PASS3(int tmp = xRAX+(sib&0x07)+(rex.b<<3));
+                        if(sub) {
+                            SUBw_REG(ret, tmp, scratch);
+                        } else {
+                            ADDw_REG(ret, tmp, scratch);
+                        }
+                    }
+                } else {
+                    PASS3(int tmp = xRAX+(nextop&0x07)+(rex.b<<3));
+                    if(sub) {
+                        SUBw_REG(ret, tmp, scratch);
+                    } else {
+                        ADDw_REG(ret, tmp, scratch);
+                    }
+                }
+            }
+        }
+    }
+    *ed = ret;
+    return addr;
+}
+
+/* setup r2 to address pointed by ED, r3 as scratch also fixaddress is an optionnal delta in the range [-absmax, +absmax], with delta&mask==0 to be added to ed for LDR/STR */
+uintptr_t geted16(dynarec_arm_t* dyn, uintptr_t addr, int ninst, uint8_t nextop, uint8_t* ed, uint8_t hint, int64_t* fixaddress, int absmax, uint32_t mask, int s)
+{
+    MAYUSE(dyn); MAYUSE(ninst);
+
     uint8_t ret = x2;
     uint8_t scratch = x3;
     *fixaddress = 0;
@@ -151,7 +288,7 @@ uintptr_t geted16(dynarec_arm_t* dyn, uintptr_t addr, int ninst, uint8_t nextop,
     MAYUSE(scratch);
     uint32_t m = nextop&0xC7;
     uint32_t n = (m>>6)&3;
-    int32_t offset = 0;
+    int64_t offset = 0;
     int absmin = 0;
     if(s) absmin = -absmax;
     if(!n && m==6) {
@@ -219,7 +356,9 @@ uintptr_t geted16(dynarec_arm_t* dyn, uintptr_t addr, int ninst, uint8_t nextop,
 
 void jump_to_epilog(dynarec_arm_t* dyn, uintptr_t ip, int reg, int ninst)
 {
+    MAYUSE(dyn); MAYUSE(ip); MAYUSE(ninst);
     MESSAGE(LOG_DUMP, "Jump to epilog\n");
+
     if(reg) {
         if(reg!=xRIP) {
             MOVx_REG(xRIP, reg);
@@ -233,6 +372,7 @@ void jump_to_epilog(dynarec_arm_t* dyn, uintptr_t ip, int reg, int ninst)
 
 void jump_to_next(dynarec_arm_t* dyn, uintptr_t ip, int reg, int ninst)
 {
+    MAYUSE(dyn); MAYUSE(ninst);
     MESSAGE(LOG_DUMP, "Jump to next\n");
 
     if(reg) {
@@ -263,12 +403,13 @@ void jump_to_next(dynarec_arm_t* dyn, uintptr_t ip, int reg, int ninst)
     #ifdef HAVE_TRACE
     //MOVx(x2, 15);    no access to PC reg 
     #endif
-    BR(x3);
+    BLR(x3); // save LR...
 }
 
 void ret_to_epilog(dynarec_arm_t* dyn, int ninst)
 {
-    MESSAGE(LOG_DUMP, "Ret next\n");
+    MAYUSE(dyn); MAYUSE(ninst);
+    MESSAGE(LOG_DUMP, "Ret to epilog\n");
     POP1(xRIP);
     uintptr_t tbl = getJumpTable64();
     MOV64x(x2, tbl);
@@ -281,12 +422,13 @@ void ret_to_epilog(dynarec_arm_t* dyn, int ninst)
     UBFXx(x3, xRIP, 0, JMPTABL_SHIFT);
     LDRx_REG_LSL3(x2, x2, x3);
     MOVx_REG(x1, xRIP);
-    BR(x2);
+    BLR(x2); // save LR
 }
 
 void retn_to_epilog(dynarec_arm_t* dyn, int ninst, int n)
 {
-    MESSAGE(LOG_DUMP, "Retn epilog\n");
+    MAYUSE(dyn); MAYUSE(ninst);
+    MESSAGE(LOG_DUMP, "Retn to epilog\n");
     POP1(xRIP);
     if(n>0xfff) {
         MOV32w(w1, n);
@@ -305,12 +447,14 @@ void retn_to_epilog(dynarec_arm_t* dyn, int ninst, int n)
     UBFXx(x3, xRIP, 0, JMPTABL_SHIFT);
     LDRx_REG_LSL3(x2, x2, x3);
     MOVx_REG(x1, xRIP);
-    BR(x2);
+    BLR(x2); // save LR
 }
 
-void iret_to_epilog(dynarec_arm_t* dyn, int ninst)
+void iret_to_epilog(dynarec_arm_t* dyn, int ninst, int is64bits)
 {
-    MESSAGE(LOG_DUMP, "IRet epilog\n");
+    #warning TODO: is64bits
+    MAYUSE(ninst);
+    MESSAGE(LOG_DUMP, "IRet to epilog\n");
     // POP IP
     POP1(xRIP);
     // POP CS
@@ -318,12 +462,20 @@ void iret_to_epilog(dynarec_arm_t* dyn, int ninst)
     STRH_U12(x2, xEmu, offsetof(x64emu_t, segs[_CS]));
     MOVZw(x1, 0);
     STRx_U12(x1, xEmu, offsetof(x64emu_t, segs_serial[_CS]));
+    STRx_U12(x1, xEmu, offsetof(x64emu_t, segs_serial[_SS]));
     // POP EFLAGS
     POP1(xFlags);
     MOV32w(x1, 0x3F7FD7);
     ANDx_REG(xFlags, xFlags, x1);
     ORRx_mask(xFlags, xFlags, 1, 0b111111, 0);
     SET_DFNONE(x1);
+    // POP RSP
+    POP1(x3);
+    // POP SS
+    POP1(x2);
+    STRH_U12(x2, xEmu, offsetof(x64emu_t, segs[_SS]));
+    // set new RSP
+    MOVx_REG(xRSP, x3);
     // Ret....
     MOV64x(x2, (uintptr_t)arm64_epilog);  // epilog on purpose, CS might have changed!
     BR(x2);
@@ -331,12 +483,13 @@ void iret_to_epilog(dynarec_arm_t* dyn, int ninst)
 
 void call_c(dynarec_arm_t* dyn, int ninst, void* fnc, int reg, int ret, int saveflags, int savereg)
 {
+    MAYUSE(fnc);
     if(savereg==0)
         savereg = 7;
     if(saveflags) {
         STRx_U12(xFlags, xEmu, offsetof(x64emu_t, eflags));
     }
-    fpu_pushcache(dyn, ninst, reg);
+    fpu_pushcache(dyn, ninst, reg, 0);
     if(ret!=-2) {
         STPx_S7_preindex(xEmu, savereg, xSP, -16);   // ARM64 stack needs to be 16byte aligned
         STPx_S7_offset(xRAX, xRCX, xEmu, offsetof(x64emu_t, regs[_AX]));    // x9..x15, x16,x17,x18 those needs to be saved by caller
@@ -366,17 +519,64 @@ void call_c(dynarec_arm_t* dyn, int ninst, void* fnc, int reg, int ret, int save
         GO(R8, R9);
         #undef GO
     }
-    fpu_popcache(dyn, ninst, reg);
+    fpu_popcache(dyn, ninst, reg, 0);
     if(saveflags) {
         LDRx_U12(xFlags, xEmu, offsetof(x64emu_t, eflags));
     }
     SET_NODF();
 }
 
+void call_n(dynarec_arm_t* dyn, int ninst, void* fnc, int w)
+{
+    MAYUSE(fnc);
+    STRx_U12(xFlags, xEmu, offsetof(x64emu_t, eflags));
+    fpu_pushcache(dyn, ninst, x3, 1);
+    // x9..x15, x16,x17,x18 those needs to be saved by caller
+    // RDI, RSI, RDX, RCX, R8, R9 are used for function call
+    STPx_S7_preindex(xEmu, xRBX, xSP, -16);   // ARM64 stack needs to be 16byte aligned
+    STPx_S7_offset(xRSP, xRBP, xEmu, offsetof(x64emu_t, regs[_SP]));
+    // float and double args
+    if(abs(w)>1) {
+        MESSAGE(LOG_DUMP, "Getting %d XMM args\n", abs(w)-1);
+        for(int i=0; i<abs(w)-1; ++i) {
+            sse_get_reg(dyn, ninst, x7, i);
+        }
+    }
+    if(w<0) {
+        MESSAGE(LOG_DUMP, "Return in XMM0\n");
+        sse_get_reg_empty(dyn, ninst, x7, 0);
+    }
+    // prepare regs for native call
+    MOVx_REG(0, xRDI);
+    MOVx_REG(x1, xRSI);
+    MOVx_REG(x2, xRDX);
+    MOVx_REG(x3, xRCX);
+    MOVx_REG(x4, xR8);
+    MOVx_REG(x5, xR9);
+    // native call
+    TABLE64(16, (uintptr_t)fnc);    // using x16 as scratch regs for call address
+    BLR(16);
+    // put return value in x86 regs
+    if(w>0) {
+        MOVx_REG(xRAX, 0);
+        MOVx_REG(xRDX, x1);
+    }
+    // all done, restore all regs
+    LDPx_S7_postindex(xEmu, xRBX, xSP, 16);
+    #define GO(A, B) LDPx_S7_offset(x##A, x##B, xEmu, offsetof(x64emu_t, regs[_##A]))
+    GO(RSP, RBP);
+    #undef GO
+
+    fpu_popcache(dyn, ninst, x3, 1);
+    LDRx_U12(xFlags, xEmu, offsetof(x64emu_t, eflags));
+    SET_NODF();
+}
+
 void grab_segdata(dynarec_arm_t* dyn, uintptr_t addr, int ninst, int reg, int segment)
 {
-    int32_t j32;
-    MAYUSE(j32);
+    (void)addr;
+    int64_t j64;
+    MAYUSE(j64);
     MESSAGE(LOG_DUMP, "Get %s Offset\n", (segment==_FS)?"FS":"GS");
     int t1 = x1, t2 = x4;
     if(reg==t1) ++t1;
@@ -400,45 +600,52 @@ void grab_segdata(dynarec_arm_t* dyn, uintptr_t addr, int ninst, int reg, int se
 // x87 stuffs
 static void x87_reset(dynarec_arm_t* dyn, int ninst)
 {
+    (void)ninst;
 #if STEP > 1
     for (int i=0; i<8; ++i)
         dyn->x87cache[i] = -1;
     dyn->x87stack = 0;
+#else
+    (void)dyn;
 #endif
 }
 
 void x87_stackcount(dynarec_arm_t* dyn, int ninst, int scratch)
 {
 #if STEP > 1
+    MAYUSE(scratch);
     if(!dyn->x87stack)
         return;
     MESSAGE(LOG_DUMP, "\tSynch x87 Stackcount (%d)\n", dyn->x87stack);
     int a = dyn->x87stack;
     // Add x87stack to emu fpu_stack
-    LDRx_U12(scratch, xEmu, offsetof(x64emu_t, fpu_stack));
+    LDRw_U12(scratch, xEmu, offsetof(x64emu_t, fpu_stack));
     if(a>0) {
-        ADDx_U12(scratch, scratch, a);
+        ADDw_U12(scratch, scratch, a);
     } else {
-        SUBx_U12(scratch, scratch, -a);
+        SUBw_U12(scratch, scratch, -a);
     }
-    STRx_U12(scratch, xEmu, offsetof(x64emu_t, fpu_stack));
+    STRw_U12(scratch, xEmu, offsetof(x64emu_t, fpu_stack));
     // Sub x87stack to top, with and 7
-    LDRx_U12(scratch, xEmu, offsetof(x64emu_t, top));
+    LDRw_U12(scratch, xEmu, offsetof(x64emu_t, top));
     if(a>0) {
-        SUBx_U12(scratch, scratch, a);
+        SUBw_U12(scratch, scratch, a);
     } else {
-        ADDx_U12(scratch, scratch, -a);
+        ADDw_U12(scratch, scratch, -a);
     }
-    ADDx_U12(scratch, scratch, 7);
-    STRx_U12(scratch, xEmu, offsetof(x64emu_t, top));
+    ANDw_mask(scratch, scratch, 0, 2);  //mask=7
+    STRw_U12(scratch, xEmu, offsetof(x64emu_t, top));
     // reset x87stack
     dyn->x87stack = 0;
     MESSAGE(LOG_DUMP, "\t------x87 Stackcount\n");
+#else
+    (void)dyn; (void)ninst; (void)scratch;
 #endif
 }
 
 int x87_do_push(dynarec_arm_t* dyn, int ninst)
 {
+    (void)ninst;
 #if STEP > 1
     dyn->x87stack+=1;
     // move all regs in cache, and find a free one
@@ -452,6 +659,7 @@ int x87_do_push(dynarec_arm_t* dyn, int ninst)
         }
     return ret;
 #else
+    (void)dyn;
     return 0;
 #endif
 }
@@ -465,10 +673,13 @@ void x87_do_push_empty(dynarec_arm_t* dyn, int ninst, int s1)
             ++dyn->x87cache[i];
     if(s1)
         x87_stackcount(dyn, ninst, s1);
+#else
+    (void)dyn; (void)ninst; (void)s1;
 #endif
 }
 void x87_do_pop(dynarec_arm_t* dyn, int ninst)
 {
+    (void)ninst;
 #if STEP > 1
     dyn->x87stack-=1;
     // move all regs in cache, poping ST0
@@ -480,12 +691,16 @@ void x87_do_pop(dynarec_arm_t* dyn, int ninst)
                 dyn->x87reg[i] = -1;
             }
         }
+#else
+    (void)dyn;
 #endif
 }
 
-static void x87_purgecache(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3)
+void x87_purgecache(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3)
 {
+    (void)ninst;
 #if STEP > 1
+    MAYUSE(s1); MAYUSE(s2); MAYUSE(s3);
     int ret = 0;
     for (int i=0; i<8 && !ret; ++i)
         if(dyn->x87cache[i] != -1)
@@ -498,15 +713,15 @@ static void x87_purgecache(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3
         // reset x87stack
         dyn->x87stack = 0;
         // Add x87stack to emu fpu_stack
-        LDRx_U12(s2, xEmu, offsetof(x64emu_t, fpu_stack));
+        LDRw_U12(s2, xEmu, offsetof(x64emu_t, fpu_stack));
         if(a>0) {
-            ADDx_U12(s2, s2, a);
+            ADDw_U12(s2, s2, a);
         } else {
-            SUBx_U12(s2, s2, -a);
+            SUBw_U12(s2, s2, -a);
         }
-        STRx_U12(s2, xEmu, offsetof(x64emu_t, fpu_stack));
+        STRw_U12(s2, xEmu, offsetof(x64emu_t, fpu_stack));
         // Sub x87stack to top, with and 7
-        LDRx_U12(s2, xEmu, offsetof(x64emu_t, top));
+        LDRw_U12(s2, xEmu, offsetof(x64emu_t, top));
         // update tags (and top at the same time)
         if(a>0) {
             // new tag to fulls
@@ -514,7 +729,7 @@ static void x87_purgecache(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3
             ADDx_U12(s1, xEmu, offsetof(x64emu_t, p_regs));
             for (int i=0; i<a; ++i) {
                 SUBw_U12(s2, s2, 1);
-                ANDw_mask(s2, s2, 0b011111, 1);    // (emu->top + st)&7
+                ANDw_mask(s2, s2, 0, 2); //mask=7    // (emu->top + st)&7
                 STRw_REG_LSL2(s3, s1, s2);
             }
         } else {
@@ -524,7 +739,7 @@ static void x87_purgecache(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3
             for (int i=0; i<-a; ++i) {
                 STRw_REG_LSL2(s3, s1, s2);
                 ADDw_U12(s2, s2, 1);
-                ANDw_mask(s2, s2, 0b011111, 1);    // (emu->top + st)&7
+                ANDw_mask(s2, s2, 0, 2); //mask=7    // (emu->top + st)&7
             }
         }
         STRw_U12(s2, xEmu, offsetof(x64emu_t, top));
@@ -534,19 +749,21 @@ static void x87_purgecache(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3
     if(ret!=0) {
         // --- set values
         // prepare offset to fpu => s1
-        ADDx_U12(s1, xEmu, offsetof(x64emu_t, mmx87));
+        ADDx_U12(s1, xEmu, offsetof(x64emu_t, x87));
         // Get top
         // loop all cache entries
         for (int i=0; i<8; ++i)
             if(dyn->x87cache[i]!=-1) {
                 ADDw_U12(s3, s2, dyn->x87cache[i]);
-                ANDw_mask(s3, s3, 0b011111, 1);    // (emu->top + st)&7
+                ANDw_mask(s3, s3, 0, 2); //mask=7   // (emu->top + st)&7
                 VSTR64_REG_LSL3(dyn->x87reg[i], s1, s3);
                 fpu_free_reg(dyn, dyn->x87reg[i]);
                 dyn->x87reg[i] = -1;
                 dyn->x87cache[i] = -1;
             }
     }
+#else
+    (void)dyn; (void)s1; (void)s2; (void)s3;
 #endif
 }
 
@@ -554,6 +771,7 @@ static void x87_purgecache(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3
 static void x87_reflectcache(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3)
 {
 #if STEP > 1
+    MAYUSE(s2); MAYUSE(s3);
     x87_stackcount(dyn, ninst, s1);
     int ret = 0;
     for (int i=0; (i<8) && (!ret); ++i)
@@ -562,23 +780,27 @@ static void x87_reflectcache(dynarec_arm_t* dyn, int ninst, int s1, int s2, int
     if(!ret)    // nothing to do
         return;
     // prepare offset to fpu => s1
-    ADDx_U12(s1, xEmu, offsetof(x64emu_t, mmx87));
+    ADDx_U12(s1, xEmu, offsetof(x64emu_t, x87));
     // Get top
     LDRw_U12(s2, xEmu, offsetof(x64emu_t, top));
     // loop all cache entries
     for (int i=0; i<8; ++i)
         if(dyn->x87cache[i]!=-1) {
             ADDw_U12(s3, s2, dyn->x87cache[i]);
-            ANDw_mask(s3, s3, 0b011111, 1);    // (emu->top + i)&7
-            VLDR64_REG_LSL3(dyn->x87reg[i], s1, s3);
+            ANDw_mask(s3, s3, 0, 2); // mask=7   // (emu->top + i)&7
+            VSTR64_REG_LSL3(dyn->x87reg[i], s1, s3);
         }
+#else
+    (void)dyn; (void)ninst; (void)s1; (void)s2; (void)s3;
 #endif
 }
 #endif
 
 int x87_get_cache(dynarec_arm_t* dyn, int ninst, int s1, int s2, int st)
 {
+    (void)ninst;
 #if STEP > 1
+    MAYUSE(s1); MAYUSE(s2);
     // search in cache first
     for (int i=0; i<8; ++i)
         if(dyn->x87cache[i]==st)
@@ -592,7 +814,7 @@ int x87_get_cache(dynarec_arm_t* dyn, int ninst, int s1, int s2, int st)
     // found, setup and grab the value
     dyn->x87cache[ret] = st;
     dyn->x87reg[ret] = fpu_get_reg_x87(dyn);
-    ADDx_U12(s1, xEmu, offsetof(x64emu_t, mmx87));
+    ADDx_U12(s1, xEmu, offsetof(x64emu_t, x87));
     LDRw_U12(s2, xEmu, offsetof(x64emu_t, top));
     int a = st - dyn->x87stack;
     if(a) {
@@ -601,13 +823,14 @@ int x87_get_cache(dynarec_arm_t* dyn, int ninst, int s1, int s2, int st)
         } else {
             ADDw_U12(s2, s2, a);
         }
-        ANDw_mask(s2, s2, 0b011111, 1);
+        ANDw_mask(s2, s2, 0, 2); //mask=7
     }
     VLDR64_REG_LSL3(dyn->x87reg[ret], s1, s2);
     MESSAGE(LOG_DUMP, "\t-------x87 Cache for ST%d\n", st);
 
     return ret;
 #else
+    (void)dyn; (void)s1; (void)s2; (void)st;
     return 0;
 #endif
 }
@@ -617,6 +840,7 @@ int x87_get_st(dynarec_arm_t* dyn, int ninst, int s1, int s2, int a)
 #if STEP > 1
     return dyn->x87reg[x87_get_cache(dyn, ninst, s1, s2, a)];
 #else
+    (void)dyn; (void)ninst; (void)s1; (void)s2; (void)a;
     return 0;
 #endif
 }
@@ -625,6 +849,7 @@ int x87_get_st(dynarec_arm_t* dyn, int ninst, int s1, int s2, int a)
 void x87_refresh(dynarec_arm_t* dyn, int ninst, int s1, int s2, int st)
 {
 #if STEP > 1
+    MAYUSE(s2);
     x87_stackcount(dyn, ninst, s1);
     int ret = -1;
     for (int i=0; (i<8) && (ret==-1); ++i)
@@ -634,22 +859,25 @@ void x87_refresh(dynarec_arm_t* dyn, int ninst, int s1, int s2, int st)
         return;
     MESSAGE(LOG_DUMP, "\tRefresh x87 Cache for ST%d\n", st);
     // prepare offset to fpu => s1
-    ADDx_U12(s1, xEmu, offsetof(x64emu_t, mmx87));
+    ADDx_U12(s1, xEmu, offsetof(x64emu_t, x87));
     // Get top
     LDRw_U12(s2, xEmu, offsetof(x64emu_t, top));
     // Update
     if(st) {
         ADDw_U12(s2, s2, st);
-        ANDw_mask(s2, s2, 0b011111, 1);    // (emu->top + i)&7
+        ANDw_mask(s2, s2, 0, 2); //mask=7    // (emu->top + i)&7
     }
     VLDR64_REG_LSL3(dyn->x87reg[ret], s1, s2);
     MESSAGE(LOG_DUMP, "\t--------x87 Cache for ST%d\n", st);
+#else
+    (void)dyn; (void)ninst; (void)s1; (void)s2; (void)st;
 #endif
 }
 
 void x87_forget(dynarec_arm_t* dyn, int ninst, int s1, int s2, int st)
 {
 #if STEP > 1
+    MAYUSE(s2);
     x87_stackcount(dyn, ninst, s1);
     int ret = -1;
     for (int i=0; (i<8) && (ret==-1); ++i)
@@ -659,32 +887,36 @@ void x87_forget(dynarec_arm_t* dyn, int ninst, int s1, int s2, int st)
         return;
     MESSAGE(LOG_DUMP, "\tForget x87 Cache for ST%d\n", st);
     // prepare offset to fpu => s1
-    ADDx_U12(s1, xEmu, offsetof(x64emu_t, mmx87));
+    ADDx_U12(s1, xEmu, offsetof(x64emu_t, x87));
     // Get top
     LDRw_U12(s2, xEmu, offsetof(x64emu_t, top));
     // Update
     if(st) {
         ADDw_U12(s2, s2, st);
-        ANDw_mask(s2, s2, 0b011111, 1);    // (emu->top + i)&7
+        ANDw_mask(s2, s2, 0, 2); //mask=7    // (emu->top + i)&7
     }
-    VLDR64_REG_LSL3(dyn->x87reg[ret], s1, s2);
+    VSTR64_REG_LSL3(dyn->x87reg[ret], s1, s2);
     MESSAGE(LOG_DUMP, "\t--------x87 Cache for ST%d\n", st);
     // and forget that cache
     fpu_free_reg(dyn, dyn->x87reg[ret]);
     dyn->x87cache[ret] = -1;
     dyn->x87reg[ret] = -1;
+#else
+    (void)dyn; (void)ninst; (void)s1; (void)s2; (void)st;
 #endif
 }
 
 void x87_reget_st(dynarec_arm_t* dyn, int ninst, int s1, int s2, int st)
 {
+    (void)ninst;
 #if STEP > 1
+    MAYUSE(s1); MAYUSE(s2);
     // search in cache first
     for (int i=0; i<8; ++i)
         if(dyn->x87cache[i]==st) {
             // refresh the value
             MESSAGE(LOG_DUMP, "\tRefresh x87 Cache for ST%d\n", st);
-            ADDx_U12(s1, xEmu, offsetof(x64emu_t, mmx87));
+            ADDx_U12(s1, xEmu, offsetof(x64emu_t, x87));
             LDRw_U12(s2, xEmu, offsetof(x64emu_t, top));
             int a = st - dyn->x87stack;
             if(a<0) {
@@ -692,7 +924,7 @@ void x87_reget_st(dynarec_arm_t* dyn, int ninst, int s1, int s2, int st)
             } else {
                 ADDw_U12(s2, s2, a);
             }
-            ANDw_mask(s2, s2, 0b011111, 1);    // (emu->top + i)&7
+            ANDw_mask(s2, s2, 0, 2); //mask=7    // (emu->top + i)&7
             VLDR64_REG_LSL3(dyn->x87reg[i], s1, s2);
             MESSAGE(LOG_DUMP, "\t-------x87 Cache for ST%d\n", st);
             // ok
@@ -708,7 +940,7 @@ void x87_reget_st(dynarec_arm_t* dyn, int ninst, int s1, int s2, int st)
     // found, setup and grab the value
     dyn->x87cache[ret] = st;
     dyn->x87reg[ret] = fpu_get_reg_x87(dyn);
-    ADDx_U12(s1, xEmu, offsetof(x64emu_t, mmx87));
+    ADDx_U12(s1, xEmu, offsetof(x64emu_t, x87));
     LDRw_U12(s2, xEmu, offsetof(x64emu_t, top));
     int a = st - dyn->x87stack;
     if(a<0) {
@@ -716,84 +948,97 @@ void x87_reget_st(dynarec_arm_t* dyn, int ninst, int s1, int s2, int st)
     } else {
         ADDw_U12(s2, s2, a);
     }
-    ANDw_mask(s2, s2, 0b011111, 1);    // (emu->top + i)&7
+    ANDw_mask(s2, s2, 0, 2); //mask=7    // (emu->top + i)&7
     VLDR64_REG_LSL3(dyn->x87reg[ret], s1, s2);
     MESSAGE(LOG_DUMP, "\t-------x87 Cache for ST%d\n", st);
+#else
+    (void)dyn; (void)s1; (void)s2; (void)st;
 #endif
 }
 
-static int round_map[] = {0, 2, 1, 3};  // map x64 -> arm round flag
-
 // Set rounding according to cw flags, return reg to restore flags
 int x87_setround(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3)
 {
-    LDRH_U12(s1, xEmu, offsetof(x64emu_t, cw));
-    UBFXx(s2, s1, 10, 2);    // extract round...
-    MOV64x(s1, (uintptr_t)round_map);
-    LDRw_REG_LSL2(s2, s1, s2);
-    VMRS(s1);               // get fpscr
+    MAYUSE(dyn); MAYUSE(ninst);
+    MAYUSE(s1); MAYUSE(s2);
+    LDRw_U12(s1, xEmu, offsetof(x64emu_t, round));
+    UBFXw(s2, s1, 1, 1);        // bit 1 of round in bit 0 (zero extented) of s2
+    BFIw(s2, s1, 1, 1);         // bit 0 of round in bit 1 of s2
+    MRS_fpcr(s1);               // get fpscr
     MOVx_REG(s3, s1);
-    BFIx(s1, s2, 22, 2);     // inject new round
-    VMSR(s1);               // put new fpscr
+    BFIx(s1, s2, 22, 2);        // inject new round
+    MSR_fpcr(s1);               // put new fpscr
     return s3;
 }
 
 // Set rounding according to mxcsr flags, return reg to restore flags
 int sse_setround(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3)
 {
+    MAYUSE(dyn); MAYUSE(ninst);
+    MAYUSE(s1); MAYUSE(s2);
     LDRH_U12(s1, xEmu, offsetof(x64emu_t, mxcsr));
-    UBFXx(s2, s1, 13, 2);    // extract round...
-    MOV64x(s1, (uintptr_t)round_map);
-    LDRw_REG_LSL2(s2, s1, s2);
-    VMRS(s1);               // get fpscr
+    RBITw(s2, s1);              // round is on bits 13-14 on x86,
+    LSRw(s2, s2, 17);           // but we want the reverse of that
+    MRS_fpcr(s1);               // get fpscr
     MOVx_REG(s3, s1);
     BFIx(s1, s2, 22, 2);     // inject new round
-    VMSR(s1);               // put new fpscr
+    MSR_fpcr(s1);               // put new fpscr
     return s3;
 }
 
 // Restore round flag
 void x87_restoreround(dynarec_arm_t* dyn, int ninst, int s1)
 {
-    VMSR(s1);               // put back fpscr
+    MAYUSE(dyn); MAYUSE(ninst);
+    MAYUSE(s1);
+    MSR_fpcr(s1);               // put back fpscr
 }
 
 // MMX helpers
 static void mmx_reset(dynarec_arm_t* dyn, int ninst)
 {
+    (void)ninst;
 #if STEP > 1
+    MAYUSE(dyn);
     for (int i=0; i<8; ++i)
         dyn->mmxcache[i] = -1;
+#else
+    (void)dyn;
 #endif
 }
 // get neon register for a MMX reg, create the entry if needed
 int mmx_get_reg(dynarec_arm_t* dyn, int ninst, int s1, int a)
 {
+    (void)ninst; (void)s1;
 #if STEP > 1
     if(dyn->mmxcache[a]!=-1)
         return dyn->mmxcache[a];
     int ret = dyn->mmxcache[a] = fpu_get_reg_emm(dyn, a);
-    VLDR64_U12(ret, xEmu, offsetof(x64emu_t, mmx87[a]));
+    VLDR64_U12(ret, xEmu, offsetof(x64emu_t, mmx[a]));
     return ret;
 #else
+    (void)dyn; (void)a;
     return 0;
 #endif
 }
 // get neon register for a MMX reg, but don't try to synch it if it needed to be created
 int mmx_get_reg_empty(dynarec_arm_t* dyn, int ninst, int s1, int a)
 {
+    (void)ninst; (void)s1;
 #if STEP > 1
     if(dyn->mmxcache[a]!=-1)
         return dyn->mmxcache[a];
     int ret = dyn->mmxcache[a] = fpu_get_reg_emm(dyn, a);
     return ret;
 #else
+    (void)dyn; (void)a;
     return 0;
 #endif
 }
 // purge the MMX cache only(needs 3 scratch registers)
-static void mmx_purgecache(dynarec_arm_t* dyn, int ninst, int s1)
+void mmx_purgecache(dynarec_arm_t* dyn, int ninst, int s1)
 {
+    (void)ninst; (void)s1;
 #if STEP > 1
     int old = -1;
     for (int i=0; i<8; ++i)
@@ -802,23 +1047,28 @@ static void mmx_purgecache(dynarec_arm_t* dyn, int ninst, int s1)
                 MESSAGE(LOG_DUMP, "\tPurge MMX Cache ------\n");
                 ++old;
             }
-            VSTR64_U12(dyn->mmxcache[i], xEmu, offsetof(x64emu_t, mmx87[i]));
+            VSTR64_U12(dyn->mmxcache[i], xEmu, offsetof(x64emu_t, mmx[i]));
             fpu_free_reg(dyn, dyn->mmxcache[i]);
             dyn->mmxcache[i] = -1;
         }
     if(old!=-1) {
         MESSAGE(LOG_DUMP, "\t------ Purge MMX Cache\n");
     }
+#else
+    (void)dyn;
 #endif
 }
 #ifdef HAVE_TRACE
 static void mmx_reflectcache(dynarec_arm_t* dyn, int ninst, int s1)
 {
+    (void) ninst; (void)s1;
 #if STEP > 1
     for (int i=0; i<8; ++i)
         if(dyn->mmxcache[i]!=-1) {
-            VLDR64_U12(dyn->mmxcache[i], xEmu, offsetof(x64emu_t, mmx87[i]));
+            VLDR64_U12(dyn->mmxcache[i], xEmu, offsetof(x64emu_t, mmx[i]));
         }
+#else
+    (void)dyn;
 #endif
 }
 #endif
@@ -827,14 +1077,18 @@ static void mmx_reflectcache(dynarec_arm_t* dyn, int ninst, int s1)
 // SSE / SSE2 helpers
 static void sse_reset(dynarec_arm_t* dyn, int ninst)
 {
+    (void)ninst;
 #if STEP > 1
     for (int i=0; i<16; ++i)
         dyn->ssecache[i] = -1;
+#else
+    (void)dyn;
 #endif
 }
 // get neon register for a SSE reg, create the entry if needed
 int sse_get_reg(dynarec_arm_t* dyn, int ninst, int s1, int a)
 {
+    (void) ninst; (void)s1;
 #if STEP > 1
     if(dyn->ssecache[a]!=-1)
         return dyn->ssecache[a];
@@ -842,24 +1096,43 @@ int sse_get_reg(dynarec_arm_t* dyn, int ninst, int s1, int a)
     VLDR128_U12(ret, xEmu, offsetof(x64emu_t, xmm[a]));
     return ret;
 #else
+    (void)dyn; (void)a;
     return 0;
 #endif
 }
 // get neon register for a SSE reg, but don't try to synch it if it needed to be created
 int sse_get_reg_empty(dynarec_arm_t* dyn, int ninst, int s1, int a)
 {
+    (void) ninst; (void)s1;
 #if STEP > 1
     if(dyn->ssecache[a]!=-1)
         return dyn->ssecache[a];
     int ret = dyn->ssecache[a] = fpu_get_reg_xmm(dyn, a);
     return ret;
 #else
+    (void)dyn; (void)a;
     return 0;
 #endif
 }
+// forget neon register for a SSE reg, create the entry if needed
+void sse_forget_reg(dynarec_arm_t* dyn, int ninst, int a)
+{
+    (void) ninst;
+#if STEP > 1
+    if(dyn->ssecache[a]==-1)
+        return;
+    VSTR128_U12(dyn->ssecache[a], xEmu, offsetof(x64emu_t, xmm[a]));
+    fpu_free_reg(dyn, dyn->ssecache[a]);
+    dyn->ssecache[a] = -1;
+#else
+    (void)dyn; (void)a;
+#endif
+    return;
+}
 // purge the SSE cache for XMM0..XMM7 (to use before function native call)
 void sse_purge07cache(dynarec_arm_t* dyn, int ninst, int s1)
 {
+    (void) ninst; (void)s1;
 #if STEP > 1
     int old = -1;
     for (int i=0; i<8; ++i)
@@ -875,12 +1148,15 @@ void sse_purge07cache(dynarec_arm_t* dyn, int ninst, int s1)
     if(old!=-1) {
         MESSAGE(LOG_DUMP, "\t------ Purge XMM0..7 Cache\n");
     }
+#else
+    (void)dyn;
 #endif
 }
 
 // purge the SSE cache only
 static void sse_purgecache(dynarec_arm_t* dyn, int ninst, int s1)
 {
+    (void) ninst; (void)s1;
 #if STEP > 1
     int old = -1;
     for (int i=0; i<16; ++i)
@@ -896,55 +1172,68 @@ static void sse_purgecache(dynarec_arm_t* dyn, int ninst, int s1)
     if(old!=-1) {
         MESSAGE(LOG_DUMP, "\t------ Purge SSE Cache\n");
     }
+#else
+    (void)dyn;
 #endif
 }
 #ifdef HAVE_TRACE
 static void sse_reflectcache(dynarec_arm_t* dyn, int ninst, int s1)
 {
+    (void) ninst; (void)s1;
 #if STEP > 1
     for (int i=0; i<16; ++i)
         if(dyn->ssecache[i]!=-1) {
             VSTR128_U12(dyn->ssecache[i], xEmu, offsetof(x64emu_t, xmm[i]));
         }
+#else
+    (void)dyn;
 #endif
 }
 #endif
 
-void fpu_pushcache(dynarec_arm_t* dyn, int ninst, int s1)
+void fpu_pushcache(dynarec_arm_t* dyn, int ninst, int s1, int not07)
 {
+    (void) ninst; (void)s1;
 #if STEP > 1
+    int start = not07?8:0;
     // only SSE regs needs to be push back to xEmu
     int n=0;
-    for (int i=0; i<16; i++)
+    for (int i=start; i<16; i++)
         if(dyn->ssecache[i]!=-1)
             ++n;
     if(!n)
         return;
     MESSAGE(LOG_DUMP, "\tPush XMM Cache (%d)------\n", n);
-    for (int i=0; i<16; ++i)
+    for (int i=start; i<16; ++i)
         if(dyn->ssecache[i]!=-1) {
             VSTR128_U12(dyn->ssecache[i], xEmu, offsetof(x64emu_t, xmm[i]));
         }
     MESSAGE(LOG_DUMP, "\t------- Push XMM Cache (%d)\n", n);
+#else
+    (void)dyn;
 #endif
 }
 
-void fpu_popcache(dynarec_arm_t* dyn, int ninst, int s1)
+void fpu_popcache(dynarec_arm_t* dyn, int ninst, int s1, int not07)
 {
+    (void) ninst; (void)s1;
 #if STEP > 1
+    int start = not07?8:0;
     // only SSE regs needs to be pop back from xEmu
     int n=0;
-    for (int i=0; i<16; i++)
+    for (int i=start; i<16; i++)
         if(dyn->ssecache[i]!=-1)
             ++n;
     if(!n)
         return;
     MESSAGE(LOG_DUMP, "\tPop XMM Cache (%d)------\n", n);
-    for (int i=0; i<16; ++i)
+    for (int i=start; i<16; ++i)
         if(dyn->ssecache[i]!=-1) {
             VLDR128_U12(dyn->ssecache[i], xEmu, offsetof(x64emu_t, xmm[i]));
         }
     MESSAGE(LOG_DUMP, "\t------- Pop XMM Cache (%d)\n", n);
+#else
+    (void)dyn;
 #endif
 }
 
@@ -977,6 +1266,8 @@ void fpu_reset(dynarec_arm_t* dyn, int ninst)
 
 void emit_pf(dynarec_arm_t* dyn, int ninst, int s1, int s3, int s4)
 {
+    MAYUSE(dyn); MAYUSE(ninst);
+    MAYUSE(s1); MAYUSE(s3); MAYUSE(s4);
     // PF: (((emu->x64emu_parity_tab[(res) / 32] >> ((res) % 32)) & 1) == 0)
     ANDw_mask(s3, s1, 0b011011, 0b000010); // mask=0xE0
     LSRw(s3, s3, 5);
@@ -986,4 +1277,4 @@ void emit_pf(dynarec_arm_t* dyn, int ninst, int s1, int s3, int s4)
     LSRw_REG(s4, s4, s3);
     MVNw_REG(s4, s4);
     BFIw(xFlags, s4, F_PF, 1);
-}
+}

src/dynarec/dynarec_arm64_helper.h

@@ -47,7 +47,7 @@
                     ed = xRAX+(nextop&7)+(rex.b<<3);    \
                     wback = 0;                          \
                 } else {                                \
-                    addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, 0xfff<<3, 3, rex, 0, D); \
+                    addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, 0xfff<<3, 7, rex, 0, D); \
                     LDRx_U12(x1, wback, fixedaddress);  \
                     ed = x1;                            \
                 }
@@ -55,10 +55,38 @@
                     ed = xEAX+(nextop&7)+(rex.b<<3);    \
                     wback = 0;                          \
                 } else {                                \
-                    addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, 0xfff<<2, 2, rex, 0, D); \
+                    addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, 0xfff<<2, 3, rex, 0, D); \
                     LDRw_U12(x1, wback, fixedaddress);  \
                     ed = x1;                            \
                 }
+#define GETSEDw(D)  if((nextop&0xC0)==0xC0) {           \
+                    ed = xRAX+(nextop&7)+(rex.b<<3);    \
+                    SXTWx(x1, ed);                      \
+                    wb = x1;                            \
+                    wback = 0;                          \
+                } else {                                \
+                    addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, 0xfff<<2, 3, rex, 0, D); \
+                    LDRSW_U12(x1, wback, fixedaddress); \
+                    wb = ed = x1;                       \
+                }
+#define GETED32(D)  if(MODREG) {                        \
+                    ed = xRAX+(nextop&7)+(rex.b<<3);    \
+                    wback = 0;                          \
+                } else {                                \
+                    addr = geted32(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, 0xfff<<(2+rex.w), (1<<(2+rex.w))-1, rex, 0, D); \
+                    LDRxw_U12(x1, wback, fixedaddress); \
+                    ed = x1;                            \
+                }
+#define GETSED32w(D)  if((nextop&0xC0)==0xC0) {         \
+                    ed = xRAX+(nextop&7)+(rex.b<<3);    \
+                    SXTWx(x1, ed);                      \
+                    wb = x1;                            \
+                    wback = 0;                          \
+                } else {                                \
+                    addr = geted32(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, 0xfff<<2, 3, rex, 0, D); \
+                    LDRSW_U12(x1, wback, fixedaddress); \
+                    wb = ed = x1;                       \
+                }
 //GETEDH can use hint for ed, and r1 or r2 for wback (depending on hint). wback is 0 if ed is xEAX..xEDI
 #define GETEDH(hint, D) if(MODREG) {                    \
                     ed = xRAX+(nextop&7)+(rex.b<<3);    \
@@ -68,8 +96,16 @@
                     LDRxw_U12(hint, wback, fixedaddress); \
                     ed = hint;                            \
                 }
+#define GETED32H(hint, D) if(MODREG) {                  \
+                    ed = xRAX+(nextop&7)+(rex.b<<3);    \
+                    wback = 0;                          \
+                } else {                                \
+                    addr = geted32(dyn, addr, ninst, nextop, &wback, (hint==x2)?x1:x2, &fixedaddress, 0xfff<<(2+rex.w), (1<<(2+rex.w))-1, rex, 0, D); \
+                    LDRxw_U12(hint, wback, fixedaddress); \
+                    ed = hint;                            \
+                }
 //GETEDW can use hint for wback and ret for ed. wback is 0 if ed is xEAX..xEDI
-#define GETEDW(hint, ret, D)   if(MODREG) {              \
+#define GETEDW(hint, ret, D)   if(MODREG) {             \
                     ed = xRAX+(nextop&7)+(rex.b<<3);    \
                     MOVxw_REG(ret, ed);                 \
                     wback = 0;                          \
@@ -78,6 +114,15 @@
                     ed = ret;                           \
                     LDRxw_U12(ed, wback, fixedaddress); \
                 }
+#define GETED32W(hint, ret, D)   if(MODREG) {           \
+                    ed = xRAX+(nextop&7)+(rex.b<<3);    \
+                    MOVxw_REG(ret, ed);                 \
+                    wback = 0;                          \
+                } else {                                \
+                    addr = geted32(dyn, addr, ninst, nextop, &wback, hint, &fixedaddress, 0xfff<<(2+rex.w), (1<<(2+rex.w))-1, rex, 0, D); \
+                    ed = ret;                           \
+                    LDRxw_U12(ed, wback, fixedaddress); \
+                }
 // Write back ed in wback (if wback not 0)
 #define WBACK       if(wback) {STRxw_U12(ed, wback, fixedaddress);}
 // Write back ed in wback (if wback not 0)
@@ -96,6 +141,25 @@
                     ed = x1;                            \
                 }
 #define WBACKO(O)   if(wback) {STRxw_REG(ed, wback, O);}
+//GETEDOx can use r1 for ed, and r2 for wback. wback is 0 if ed is xEAX..xEDI
+#define GETEDOx(O, D)  if(MODREG) {                     \
+                    ed = xRAX+(nextop&7)+(rex.b<<3);    \
+                    wback = 0;                          \
+                } else {                                \
+                    addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, 0, 0, rex, 0, D); \
+                    LDRx_REG(x1, wback, O);             \
+                    ed = x1;                            \
+                }
+#define GETSEDOw(O, D)  if((nextop&0xC0)==0xC0) {       \
+                    ed = xRAX+(nextop&7)+(rex.b<<3);    \
+                    SXTWx(x1, ed);                      \
+                    wb = x1;                            \
+                    wback = 0;                          \
+                } else {                                \
+                    addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, 0, 0, rex, 0, D); \
+                    LDRSW_REG(x1, wback, O);            \
+                    wb = ed = x1;                       \
+                }
 //FAKEELike GETED, but doesn't get anything
 #define FAKEED  if(!MODREG) {   \
                     addr = fakeed(dyn, addr, ninst, nextop); \
@@ -166,19 +230,24 @@
                     ed = i;                     \
                 }
 //GETEBO will use i for ed, i is also Offset, and can use r3 for wback.
-#define GETEBO(i) if((nextop&0xC0)==0xC0) {  \
-                    wback = (nextop&7);     \
-                    wb2 = (wback>>2);       \
-                    wback = xEAX+(wback&3); \
-                    UBFXx(i, wback, wb2, 8);\
-                    wb1 = 0;                \
-                    ed = i;                 \
-                } else {                    \
-                    addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, 0, 0); \
-                    ADD_REG_LSL_IMM5(wback, wback, i, 0);   \
-                    LDRB_IMM9(i, wback, fixedaddress);      \
-                    wb1 = 1;                \
-                    ed = i;                 \
+#define GETEBO(i, D) if(MODREG) {               \
+                    if(rex.rex) {               \
+                        wback = xRAX+(nextop&7)+(rex.b<<3);     \
+                        wb2 = 0;                \
+                    } else {                    \
+                        wback = (nextop&7);     \
+                        wb2 = (wback>>2)*8;     \
+                        wback = xRAX+(wback&3); \
+                    }                           \
+                    UBFXx(i, wback, wb2, 8);    \
+                    wb1 = 0;                    \
+                    ed = i;                     \
+                } else {                        \
+                    addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, 0, 0, rex, 0, D); \
+                    ADDx_REG(wback, wback, i);  \
+                    LDRB_U12(i, wback, fixedaddress);      \
+                    wb1 = 1;                    \
+                    ed = i;                     \
                 }
 //GETSEB sign extend EB, will use i for ed, and can use r3 for wback.
 #define GETSEB(i, D) if(MODREG) {                \
@@ -211,7 +280,7 @@
                         gb1 = xRAX+(gd&3);      \
                     }                           \
                     gd = i;                     \
-                    UBFXx(gd, gb1, gb2, 8);
+                    UBFXx(gd, gb1, gb2*8, 8);
 //GETSGB signe extend GB, will use i for gd
 #define GETSGB(i)   if(rex.rex) {               \
                         gb1 = xRAX+((nextop&0x38)>>3)+(rex.r<<3);     \
@@ -243,109 +312,126 @@
 // R0 will not be pushed/popd if ret is -2. Flags are not save/restored
 #define CALL_S(F, ret) call_c(dyn, ninst, F, x7, ret, 0, 0)
 
-#define MARK    if(dyn->insts) {dyn->insts[ninst].mark = (uintptr_t)dyn->arm_size;}
+#define MARK    if(dyn->insts) {dyn->insts[ninst].mark = dyn->arm_size;}
 #define GETMARK ((dyn->insts)?dyn->insts[ninst].mark:(dyn->arm_size+4))
-#define MARK2   if(dyn->insts) {dyn->insts[ninst].mark2 = (uintptr_t)dyn->arm_size;}
+#define MARK2   if(dyn->insts) {dyn->insts[ninst].mark2 = dyn->arm_size;}
 #define GETMARK2 ((dyn->insts)?dyn->insts[ninst].mark2:(dyn->arm_size+4))
-#define MARK3   if(dyn->insts) {dyn->insts[ninst].mark3 = (uintptr_t)dyn->arm_size;}
+#define MARK3   if(dyn->insts) {dyn->insts[ninst].mark3 = dyn->arm_size;}
 #define GETMARK3 ((dyn->insts)?dyn->insts[ninst].mark3:(dyn->arm_size+4))
-#define MARKF   if(dyn->insts) {dyn->insts[ninst].markf = (uintptr_t)dyn->arm_size;}
+#define MARKF   if(dyn->insts) {dyn->insts[ninst].markf = dyn->arm_size;}
 #define GETMARKF ((dyn->insts)?dyn->insts[ninst].markf:(dyn->arm_size+4))
-#define MARKSEG if(dyn->insts) {dyn->insts[ninst].markseg = (uintptr_t)dyn->arm_size;}
+#define MARKSEG if(dyn->insts) {dyn->insts[ninst].markseg = dyn->arm_size;}
 #define GETMARKSEG ((dyn->insts)?dyn->insts[ninst].markseg:(dyn->arm_size+4))
-#define MARKLOCK if(dyn->insts) {dyn->insts[ninst].marklock = (uintptr_t)dyn->arm_size;}
+#define MARKLOCK if(dyn->insts) {dyn->insts[ninst].marklock = dyn->arm_size;}
 #define GETMARKLOCK ((dyn->insts)?dyn->insts[ninst].marklock:(dyn->arm_size+4))
 
-// Branch to MARK if cond (use j32)
+// Branch to MARK if cond (use j64)
 #define B_MARK(cond)                \
-    j32 = GETMARK-(dyn->arm_size);  \
-    Bcond(cond, j32)
-// Branch to MARK unconditionnal (use j32)
+    j64 = GETMARK-(dyn->arm_size);  \
+    Bcond(cond, j64)
+// Branch to MARK unconditionnal (use j64)
 #define B_MARK_nocond               \
-    j32 = GETMARK-(dyn->arm_size);  \
-    B(j32)
-// Branch to MARK if reg is not 0 (use j32)
+    j64 = GETMARK-(dyn->arm_size);  \
+    B(j64)
+// Branch to MARK if reg is 0 (use j64)
+#define CBZxw_MARK(reg)             \
+    j64 = GETMARK-(dyn->arm_size);  \
+    CBZxw(reg, j64)
+// Branch to MARK if reg is not 0 (use j64)
 #define CBNZx_MARK(reg)             \
-    j32 = GETMARK-(dyn->arm_size);  \
-    CBNZx(reg, j32)
-// Branch to MARK if reg is not 0 (use j32)
+    j64 = GETMARK-(dyn->arm_size);  \
+    CBNZx(reg, j64)
+// Branch to MARK if reg is not 0 (use j64)
 #define CBNZw_MARK(reg)             \
-    j32 = GETMARK-(dyn->arm_size);  \
-    CBNZw(reg, j32)
-// Branch to MARK2 if cond (use j32)
+    j64 = GETMARK-(dyn->arm_size);  \
+    CBNZw(reg, j64)
+// Branch to MARK2 if cond (use j64)
 #define B_MARK2(cond)               \
-    j32 = GETMARK2-(dyn->arm_size); \
-    Bcond(cond, j32)
-// Branch to MARK2 unconditionnal (use j32)
+    j64 = GETMARK2-(dyn->arm_size); \
+    Bcond(cond, j64)
+// Branch to MARK2 unconditionnal (use j64)
 #define B_MARK2_nocond              \
-    j32 = GETMARK2-(dyn->arm_size); \
-    B(j32)
-// Branch to MARK2 if reg is not 0 (use j32)
+    j64 = GETMARK2-(dyn->arm_size); \
+    B(j64)
+// Branch to MARK2 if reg is not 0 (use j64)
 #define CBNZx_MARK2(reg)            \
-    j32 = GETMARK2-(dyn->arm_size); \
-    CBNZx(reg, j32)
+    j64 = GETMARK2-(dyn->arm_size); \
+    CBNZx(reg, j64)
 // Test bit N of A and branch to MARK2 if set
 #define TBNZ_MARK2(A, N)            \
-    j32 = GETMARK2-(dyn->arm_size); \
-    TBNZ(A, N, j32)
-// Branch to MARK3 if cond (use j32)
+    j64 = GETMARK2-(dyn->arm_size); \
+    TBNZ(A, N, j64)
+// Branch to MARK3 if cond (use j64)
 #define B_MARK3(cond)               \
-    j32 = GETMARK3-(dyn->arm_size); \
-    Bcond(cond, j32)
-// Branch to MARK3 unconditionnal (use j32)
+    j64 = GETMARK3-(dyn->arm_size); \
+    Bcond(cond, j64)
+// Branch to MARK3 unconditionnal (use j64)
 #define B_MARK3_nocond              \
-    j32 = GETMARK3-(dyn->arm_size); \
-    B(j32)
-// Branch to MARK3 if reg is not 0 (use j32)
+    j64 = GETMARK3-(dyn->arm_size); \
+    B(j64)
+// Branch to MARK3 if reg is not 0 (use j64)
 #define CBNZx_MARK3(reg)            \
-    j32 = GETMARK3-(dyn->arm_size); \
-    CBNZx(reg, j32)
+    j64 = GETMARK3-(dyn->arm_size); \
+    CBNZx(reg, j64)
 // Test bit N of A and branch to MARK3 if set
 #define TBNZ_MARK3(A, N)            \
-    j32 = GETMARK3-(dyn->arm_size); \
-    TBNZ(A, N, j32)
+    j64 = GETMARK3-(dyn->arm_size); \
+    TBNZ(A, N, j64)
 // Test bit N of A and branch to MARK3 if not set
 #define TBZ_MARK3(A, N)             \
-    j32 = GETMARK3-(dyn->arm_size); \
-    TBZ(A, N, j32)
-// Branch to next instruction if cond (use j32)
+    j64 = GETMARK3-(dyn->arm_size); \
+    TBZ(A, N, j64)
+// Branch to next instruction if cond (use j64)
 #define B_NEXT(cond)     \
-    j32 = (dyn->insts)?(dyn->insts[ninst].epilog-(dyn->arm_size)):0; \
-    Bcond(cond, j32)
-// Branch to next instruction unconditionnal (use j32)
+    j64 = (dyn->insts)?(dyn->insts[ninst].epilog-(dyn->arm_size)):0; \
+    Bcond(cond, j64)
+// Branch to next instruction unconditionnal (use j64)
 #define B_NEXT_nocond                                               \
-    j32 = (dyn->insts)?(dyn->insts[ninst].epilog-(dyn->arm_size)):0;\
-    B(j32)
-// Branch to next instruction if reg is 0 (use j32)
+    j64 = (dyn->insts)?(dyn->insts[ninst].epilog-(dyn->arm_size)):0;\
+    B(j64)
+// Branch to next instruction if reg is 0 (use j64)
 #define CBZw_NEXT(reg)    \
-    j32 =  (dyn->insts)?(dyn->insts[ninst].epilog-(dyn->arm_size)):0; \
-    CBZw(reg, j32)
-// Branch to next instruction if reg is 0 (use j32)
+    j64 =  (dyn->insts)?(dyn->insts[ninst].epilog-(dyn->arm_size)):0; \
+    CBZw(reg, j64)
+// Branch to next instruction if reg is 0 (use j64)
 #define CBZx_NEXT(reg)    \
-    j32 =  (dyn->insts)?(dyn->insts[ninst].epilog-(dyn->arm_size)):0; \
-    CBZx(reg, j32)
-// Branch to MARKSEG if cond (use j32)
+    j64 =  (dyn->insts)?(dyn->insts[ninst].epilog-(dyn->arm_size)):0; \
+    CBZx(reg, j64)
+// Branch to next instruction if reg is not 0 (use j64)
+#define CBNZx_NEXT(reg)   \
+    j64 =  (dyn->insts)?(dyn->insts[ninst].epilog-(dyn->arm_size)):0; \
+    CBNZx(reg, j64)
+// Test bit N of A and branch to next instruction if not set
+#define TBZ_NEXT(A, N)              \
+    j64 = (dyn->insts)?(dyn->insts[ninst].epilog-(dyn->arm_size)):0; \
+    TBZ(A, N, j64)
+// Test bit N of A and branch to next instruction if set
+#define TBNZ_NEXT(A, N)             \
+    j64 = (dyn->insts)?(dyn->insts[ninst].epilog-(dyn->arm_size)):0; \
+    TBNZ(A, N, j64)
+// Branch to MARKSEG if cond (use j64)
 #define B_MARKSEG(cond)    \
-    j32 = GETMARKSEG-(dyn->arm_size);   \
-    Bcond(cond, j32)
-// Branch to MARKSEG if reg is 0 (use j32)
+    j64 = GETMARKSEG-(dyn->arm_size);   \
+    Bcond(cond, j64)
+// Branch to MARKSEG if reg is 0 (use j64)
 #define CBZw_MARKSEG(reg)    \
-    j32 = GETMARKSEG-(dyn->arm_size);   \
-    CBZw(reg, j32)
-// Branch to MARKSEG if reg is not 0 (use j32)
+    j64 = GETMARKSEG-(dyn->arm_size);   \
+    CBZw(reg, j64)
+// Branch to MARKSEG if reg is not 0 (use j64)
 #define CBNZw_MARKSEG(reg)              \
-    j32 = GETMARKSEG-(dyn->arm_size);   \
-    CBNZw(reg, j32)
-// Branch to MARKLOCK if cond (use j32)
+    j64 = GETMARKSEG-(dyn->arm_size);   \
+    CBNZw(reg, j64)
+// Branch to MARKLOCK if cond (use j64)
 #define B_MARKLOCK(cond)    \
-    j32 = GETMARKLOCK-(dyn->arm_size);   \
-    Bcond(cond, j32)
-// Branch to MARKLOCK if reg is not 0 (use j32)
+    j64 = GETMARKLOCK-(dyn->arm_size);   \
+    Bcond(cond, j64)
+// Branch to MARKLOCK if reg is not 0 (use j64)
 #define CBNZx_MARKLOCK(reg)             \
-    j32 = GETMARKLOCK-(dyn->arm_size);  \
-    CBNZx(reg, j32)
+    j64 = GETMARKLOCK-(dyn->arm_size);  \
+    CBNZx(reg, j64)
 
 #define IFX(A)  if(dyn->insts && (dyn->insts[ninst].x64.need_flags&(A)))
+#define IFX_PENDOR0  if(dyn->insts && (dyn->insts[ninst].x64.need_flags&(X_PEND) || !dyn->insts[ninst].x64.need_flags))
 #define IFXX(A) if(dyn->insts && (dyn->insts[ninst].x64.need_flags==(A)))
 #define IFX2X(A, B) if(dyn->insts && (dyn->insts[ninst].x64.need_flags==(A) || dyn->insts[ninst].x64.need_flags==(B) || dyn->insts[ninst].x64.need_flags==((A)|(B))))
 #define IFXN(A, B)  if(dyn->insts && (dyn->insts[ninst].x64.need_flags&(A) && !(dyn->insts[ninst].x64.need_flags&(B))))
@@ -353,8 +439,8 @@
 // Generate FCOM with s1 and s2 scratch regs (the VCMP is already done)
 #define FCOM(s1, s2, s3)                                                    \
     LDRH_U12(s3, xEmu, offsetof(x64emu_t, sw));   /*offset is 8bits right?*/\
-    MOV32w(s1, 0b01000111);                                                 \
-    BICw_REG_LSL(s3, s3, s1, 8);                                            \
+    MOV32w(s1, 0b0100011100000000);                                         \
+    BICw_REG(s3, s3, s1);                                                   \
     CSETw(s1, cMI); /* 1 if less than, 0 else */                            \
     MOV32w(s2, 0b01000101); /* unordered */                                 \
     CSELw(s1, s2, s1, cVS);                                                 \
@@ -390,6 +476,8 @@
 
 
 #define STORE_REG(A)    STRx_U12(x##A, xEmu, offsetof(x64emu_t, regs[_##A]))
+#define STP_REGS(A, B)  STPx_S7_offset(x##A, x##B, xEmu, offsetof(x64emu_t, regs[_##A]))
+#define LDP_REGS(A, B)  LDPx_S7_offset(x##A, x##B, xEmu, offsetof(x64emu_t, regs[_##A]))
 #define STORE_XEMU_REGS(A)  \
     STORE_REG(RAX);         \
     STORE_REG(RCX);         \
@@ -445,15 +533,26 @@
     STRx_U12(xFlags, xEmu, offsetof(x64emu_t, eflags)); \
     if(A) {STRx_U12(A, xEmu, offsetof(x64emu_t, ip));}
 
+// Need to also store current value of some register, as they may be used by functions like setjump
+// so RBX, RSP, RBP, R12..R15 (other are scratch or parameters), R10-R11 not usefull, but why not
+// RBX, RSP and RBP are already saved in call function
 #define STORE_XEMU_CALL(A)  \
+    STP_REGS(R10, R11);     \
+    STP_REGS(R12, R13);     \
+    STP_REGS(R14, R15);     \
     if(A) {STPx_S7_offset(xFlags, A, xEmu, offsetof(x64emu_t, eflags));}    \
     else {STRx_U12(xFlags, xEmu, offsetof(x64emu_t, eflags));}
 
-#define LOAD_XEMU_CALL(A)  \
+#define LOAD_XEMU_CALL(A)   \
     if(A) {LDPx_S7_offset(xFlags, A, xEmu, offsetof(x64emu_t, eflags));}    \
     else {LDRx_U12(xFlags, xEmu, offsetof(x64emu_t, eflags));};             \
     if(A==xRIP) dyn->last_ip = 0
 
+#define LOAD_XEMU_REM()     \
+    LDP_REGS(R10, R11);     \
+    LDP_REGS(R12, R13);     \
+    LDP_REGS(R14, R15)
+
 #define SET_DFNONE(S)    if(!dyn->dfnone) {MOVZw(S, d_none); STRw_U12(S, xEmu, offsetof(x64emu_t, df)); dyn->dfnone=1;}
 #define SET_DF(S, N)     if((N)!=d_none) {MOVZw(S, (N)); STRw_U12(S, xEmu, offsetof(x64emu_t, df)); dyn->dfnone=0;} else SET_DFNONE(S)
 #define SET_NODF()          dyn->dfnone = 0
@@ -461,11 +560,11 @@
 
 #ifndef READFLAGS
 #define READFLAGS(A) \
-    if(((A)!=X_PEND) && dyn->state_flags!=SF_SET) {     \
+    if(((A)!=X_PEND) && dyn->state_flags!=SF_SET && dyn->state_flags!=SF_SET_PENDING) { \
         if(dyn->state_flags!=SF_PENDING) {              \
             LDRw_U12(x3, xEmu, offsetof(x64emu_t, df)); \
-            j32 = (GETMARKF)-(dyn->arm_size);           \
-            CBZw(x3, j32);                              \
+            j64 = (GETMARKF)-(dyn->arm_size);           \
+            CBZw(x3, j64);                              \
         }                                               \
         CALL_(UpdateFlags, -1, 0);                      \
         MARKF;                                          \
@@ -475,9 +574,11 @@
 #endif
 #ifndef SETFLAGS
 #define SETFLAGS(A, B)  \
-    if(dyn->state_flags!=SF_SET && B==SF_SUBSET && (dyn->insts[ninst].x64.need_flags&(~((A)|X_PEND)))) \
-        READFLAGS(dyn->insts[ninst].x64.need_flags&(~(A)));    \
-    dyn->state_flags = (B==SF_SUBSET)?SF_SET:B
+    if(dyn->state_flags!=SF_SET && B==SF_SUBSET && (dyn->insts[ninst].x64.need_flags&(~((A)/*|X_PEND*/)))) \
+        READFLAGS(dyn->insts[ninst].x64.need_flags&(~(A)|X_PEND));  \
+    dyn->state_flags = (B==SF_SUBSET)?SF_SET:                       \
+        ((B==SF_SET_PENDING && !(dyn->insts[ninst].x64.need_flags&X_PEND)?SF_SET:B))
+
 #endif
 #ifndef JUMP
 #define JUMP(A) 
@@ -503,6 +604,9 @@
 #ifndef TABLE64
 #define TABLE64(A, V)
 #endif
+#ifndef FTABLE64
+#define FTABLE64(A, V)
+#endif
 
 #if STEP < 2
 #define GETIP(A)
@@ -518,14 +622,20 @@
         }                                               \
     } else {                                            \
         dyn->last_ip = (A);                             \
-        TABLE64(xRIP, dyn->last_ip);                    \
+        if(dyn->last_ip<0xffffffff) {                   \
+            MOV64x(xRIP, dyn->last_ip);                 \
+        } else                                          \
+            TABLE64(xRIP, dyn->last_ip);                \
     }
 #define GETIP_(A)                                       \
     if(dyn->last_ip && ((A)-dyn->last_ip)<0x1000) {     \
         uint64_t _delta_ip = (A)-dyn->last_ip;          \
         if(_delta_ip) {ADDx_U12(xRIP, xRIP, _delta_ip);}\
     } else {                                            \
-        TABLE64(xRIP, (A));                             \
+        if((A)<0xffffffff) {                            \
+            MOV64x(xRIP, (A));                          \
+        } else                                          \
+            TABLE64(xRIP, (A));                         \
     }
 #endif
 
@@ -566,18 +676,21 @@ void* arm64_next(x64emu_t* emu, uintptr_t addr);
 #define dynarec64_DF       STEPNAME(dynarec64_DF)
 #define dynarec64_F0       STEPNAME(dynarec64_F0)
 #define dynarec64_660F     STEPNAME(dynarec64_660F)
+#define dynarec64_6664     STEPNAME(dynarec64_6664)
 #define dynarec64_F20F     STEPNAME(dynarec64_F20F)
 #define dynarec64_F30F     STEPNAME(dynarec64_F30F)
 
-#define geted           STEPNAME(geted_)
-#define geted16         STEPNAME(geted16_)
-#define jump_to_epilog  STEPNAME(jump_to_epilog_)
-#define jump_to_next    STEPNAME(jump_to_next_)
-#define ret_to_epilog   STEPNAME(ret_to_epilog_)
-#define retn_to_epilog  STEPNAME(retn_to_epilog_)
-#define iret_to_epilog  STEPNAME(iret_to_epilog_)
-#define call_c          STEPNAME(call_c_)
-#define grab_segdata    STEPNAME(grab_segdata_)
+#define geted           STEPNAME(geted)
+#define geted32         STEPNAME(geted32)
+#define geted16         STEPNAME(geted16)
+#define jump_to_epilog  STEPNAME(jump_to_epilog)
+#define jump_to_next    STEPNAME(jump_to_next)
+#define ret_to_epilog   STEPNAME(ret_to_epilog)
+#define retn_to_epilog  STEPNAME(retn_to_epilog)
+#define iret_to_epilog  STEPNAME(iret_to_epilog)
+#define call_c          STEPNAME(call_c)
+#define call_n          STEPNAME(call_n)
+#define grab_segdata    STEPNAME(grab_segdata)
 #define emit_cmp8       STEPNAME(emit_cmp8)
 #define emit_cmp16      STEPNAME(emit_cmp16)
 #define emit_cmp32      STEPNAME(emit_cmp32)
@@ -666,21 +779,27 @@ void* arm64_next(x64emu_t* emu, uintptr_t addr);
 #define mmx_get_reg_empty STEPNAME(mmx_get_reg_empty)
 #define sse_get_reg     STEPNAME(sse_get_reg)
 #define sse_get_reg_empty STEPNAME(sse_get_reg_empty)
+#define sse_forget_reg   STEPNAME(sse_forget_reg)
 #define sse_purge07cache STEPNAME(sse_purge07cache)
 
 #define fpu_pushcache   STEPNAME(fpu_pushcache)
 #define fpu_popcache    STEPNAME(fpu_popcache)
 #define fpu_reset       STEPNAME(fpu_reset)
 #define fpu_purgecache  STEPNAME(fpu_purgecache)
+#define mmx_purgecache  STEPNAME(mmx_purgecache)
+#define x87_purgecache  STEPNAME(x87_purgecache)
 #ifdef HAVE_TRACE
 #define fpu_reflectcache STEPNAME(fpu_reflectcache)
 #endif
 
 /* setup r2 to address pointed by */
-uintptr_t geted(dynarec_arm_t* dyn, uintptr_t addr, int ninst, uint8_t nextop, uint8_t* ed, uint8_t hint, int* fixaddress, int absmax, uint32_t mask, rex_t rex, int s, int delta);
+uintptr_t geted(dynarec_arm_t* dyn, uintptr_t addr, int ninst, uint8_t nextop, uint8_t* ed, uint8_t hint, int64_t* fixaddress, int absmax, uint32_t mask, rex_t rex, int s, int delta);
 
 /* setup r2 to address pointed by */
-uintptr_t geted16(dynarec_arm_t* dyn, uintptr_t addr, int ninst, uint8_t nextop, uint8_t* ed, uint8_t hint, int* fixaddress, int absmax, uint32_t mask, int s);
+uintptr_t geted32(dynarec_arm_t* dyn, uintptr_t addr, int ninst, uint8_t nextop, uint8_t* ed, uint8_t hint, int64_t* fixaddress, int absmax, uint32_t mask, rex_t rex, int s, int delta);
+
+/* setup r2 to address pointed by */
+uintptr_t geted16(dynarec_arm_t* dyn, uintptr_t addr, int ninst, uint8_t nextop, uint8_t* ed, uint8_t hint, int64_t* fixaddress, int absmax, uint32_t mask, int s);
 
 
 // generic x64 helper
@@ -688,8 +807,9 @@ void jump_to_epilog(dynarec_arm_t* dyn, uintptr_t ip, int reg, int ninst);
 void jump_to_next(dynarec_arm_t* dyn, uintptr_t ip, int reg, int ninst);
 void ret_to_epilog(dynarec_arm_t* dyn, int ninst);
 void retn_to_epilog(dynarec_arm_t* dyn, int ninst, int n);
-void iret_to_epilog(dynarec_arm_t* dyn, int ninst);
+void iret_to_epilog(dynarec_arm_t* dyn, int ninst, int is64bits);
 void call_c(dynarec_arm_t* dyn, int ninst, void* fnc, int reg, int ret, int saveflags, int save_reg);
+void call_n(dynarec_arm_t* dyn, int ninst, void* fnc, int w);
 void grab_segdata(dynarec_arm_t* dyn, uintptr_t addr, int ninst, int reg, int segment);
 void emit_cmp8(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4, int s5);
 void emit_cmp16(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4, int s5);
@@ -758,8 +878,8 @@ void emit_shr32c(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int32_t c, in
 void emit_sar32c(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int32_t c, int s3, int s4);
 void emit_rol32c(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int32_t c, int s3, int s4);
 void emit_ror32c(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int32_t c, int s3, int s4);
-//void emit_shrd32c(dynarec_arm_t* dyn, int ninst, int s1, int s2, int32_t c, int s3, int s4);
-//void emit_shld32c(dynarec_arm_t* dyn, int ninst, int s1, int s2, int32_t c, int s3, int s4);
+void emit_shrd32c(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int s2, int32_t c, int s3, int s4);
+void emit_shld32c(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int s2, int32_t c, int s3, int s4);
 
 void emit_pf(dynarec_arm_t* dyn, int ninst, int s1, int s3, int s4);
 
@@ -800,6 +920,8 @@ int mmx_get_reg_empty(dynarec_arm_t* dyn, int ninst, int s1, int a);
 int sse_get_reg(dynarec_arm_t* dyn, int ninst, int s1, int a);
 // get neon register for a SSE reg, but don't try to synch it if it needed to be created
 int sse_get_reg_empty(dynarec_arm_t* dyn, int ninst, int s1, int a);
+// forget neon register for a SSE reg, create the entry if needed
+void sse_forget_reg(dynarec_arm_t* dyn, int ninst, int a);
 // purge the XMM0..XMM7 cache (before function call)
 void sse_purge07cache(dynarec_arm_t* dyn, int ninst, int s1);
 
@@ -808,28 +930,33 @@ void sse_purge07cache(dynarec_arm_t* dyn, int ninst, int s1);
 void fpu_reset(dynarec_arm_t* dyn, int ninst);
 // purge the FPU cache (needs 3 scratch registers)
 void fpu_purgecache(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3);
+// purge MMX cache
+void mmx_purgecache(dynarec_arm_t* dyn, int ninst, int s1);
+// purge x87 cache
+void x87_purgecache(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3);
 #ifdef HAVE_TRACE
 void fpu_reflectcache(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3);
 #endif
-void fpu_pushcache(dynarec_arm_t* dyn, int ninst, int s1);
-void fpu_popcache(dynarec_arm_t* dyn, int ninst, int s1);
+void fpu_pushcache(dynarec_arm_t* dyn, int ninst, int s1, int not07);
+void fpu_popcache(dynarec_arm_t* dyn, int ninst, int s1, int not07);
 
-uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, int* ok, int* need_epilog);
+uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int* ok, int* need_epilog);
 uintptr_t dynarec64_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int* ok, int* need_epilog);
-uintptr_t dynarec64_64(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep,int* ok, int* need_epilog);
+uintptr_t dynarec64_64(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int seg, int* ok, int* need_epilog);
 //uintptr_t dynarec64_65(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep,int* ok, int* need_epilog);
 uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int* ok, int* need_epilog);
 uintptr_t dynarec64_67(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int* ok, int* need_epilog);
-//uintptr_t dynarec64_D8(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int* ok, int* need_epilog);
-//uintptr_t dynarec64_D9(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int* ok, int* need_epilog);
+uintptr_t dynarec64_D8(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int* ok, int* need_epilog);
+uintptr_t dynarec64_D9(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int* ok, int* need_epilog);
 //uintptr_t dynarec64_DA(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int* ok, int* need_epilog);
-//uintptr_t dynarec64_DB(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int* ok, int* need_epilog);
-//uintptr_t dynarec64_DC(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int* ok, int* need_epilog);
-//uintptr_t dynarec64_DD(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int* ok, int* need_epilog);
+uintptr_t dynarec64_DB(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int* ok, int* need_epilog);
+uintptr_t dynarec64_DC(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int* ok, int* need_epilog);
+uintptr_t dynarec64_DD(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int* ok, int* need_epilog);
 //uintptr_t dynarec64_DE(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int* ok, int* need_epilog);
-//uintptr_t dynarec64_DF(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int* ok, int* need_epilog);
+uintptr_t dynarec64_DF(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int* ok, int* need_epilog);
 uintptr_t dynarec64_F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int* ok, int* need_epilog);
 uintptr_t dynarec64_660F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int* ok, int* need_epilog);
+uintptr_t dynarec64_6664(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int* ok, int* need_epilog);
 uintptr_t dynarec64_F20F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int* ok, int* need_epilog);
 uintptr_t dynarec64_F30F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int* ok, int* need_epilog);
 
@@ -941,4 +1068,4 @@ uintptr_t dynarec64_F30F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
             , cNE, cEQ, X_SF|X_OF|X_ZF)                     \
         break
 
-#endif //__DYNAREC_ARM64_HELPER_H__
+#endif //__DYNAREC_ARM64_HELPER_H__

src/dynarec/dynarec_arm64_pass.c

@@ -25,22 +25,25 @@
 #error No STEP defined
 #endif
 
-void arm_pass(dynarec_arm_t* dyn, uintptr_t addr)
+uintptr_t arm_pass(dynarec_arm_t* dyn, uintptr_t addr)
 {
     int ok = 1;
     int ninst = 0;
     uintptr_t ip = addr;
+    uintptr_t init_addr = addr;
+    rex_t rex;
+    int rep;    // 0 none, 1=F2 prefix, 2=F3 prefix
     int need_epilog = 1;
     dyn->sons_size = 0;
     // Clean up (because there are multiple passes)
     dyn->state_flags = 0;
     dyn->dfnone = 0;
     dyn->last_ip = ip;  // RIP is always set at start of block!
+    MAYUSE(init_addr);
     fpu_reset(dyn, ninst);
     // ok, go now
     INIT;
     while(ok) {
-        if(dyn->insts && (ninst>dyn->size)) {dynarec_log(LOG_NONE, "Warning, too many inst treated (%d / %d)\n",ninst, dyn->size);}
         ip = addr;
         if(dyn->insts && (dyn->insts[ninst].x64.barrier==1)) {
             dyn->last_ip = 0;
@@ -65,7 +68,25 @@ void arm_pass(dynarec_arm_t* dyn, uintptr_t addr)
         }
 #endif
 
-        addr = dynarec64_00(dyn, addr, ip, ninst, &ok, &need_epilog);
+        rep = 0;
+        uint8_t pk = PK(0);
+        while((pk==0xF2) || (pk==0xF3)) {
+            rep = pk-0xF1;
+            ++addr;
+            pk = PK(0);
+        }
+        while(pk==0x3E) {   //Branch Taken Hint ignored
+            ++addr;
+            pk = PK(0);
+        }
+        rex.rex = 0;
+        while(pk>=0x40 && pk<=0x4f) {
+            rex.rex = pk;
+            ++addr;
+            pk = PK(0);
+        }
+
+        addr = dynarec64_00(dyn, addr, ip, ninst, rex, rep, &ok, &need_epilog);
 
         INST_EPILOG;
 
@@ -79,7 +100,7 @@ void arm_pass(dynarec_arm_t* dyn, uintptr_t addr)
         if(!ok && !need_epilog && dyn->insts && (addr < (dyn->start+dyn->isize))) {
             ok = 1;
         }
-        if(!ok && !need_epilog && !dyn->insts && getProtection(addr+3))
+        if(!ok && !need_epilog && !dyn->insts && getProtection(addr+3)&~PROT_CUSTOM)
             if(*(uint32_t*)addr!=0) {   // check if need to continue (but is next 4 bytes are 0, stop)
                 uintptr_t next = get_closest_next(dyn, addr);
                 if(next && (
@@ -94,6 +115,20 @@ void arm_pass(dynarec_arm_t* dyn, uintptr_t addr)
             }
         if(ok<0)  {ok = 0; need_epilog=1;}
         ++ninst;
+        #if STEP == 0
+        if(ok && !isJumpTableDefault64((void*)addr))
+        #else
+        if(ok && dyn->insts && (ninst==dyn->size))
+        #endif
+        {
+            #if STEP == 3
+            dynarec_log(LOG_DEBUG, "Stopping block %p (%d / %d)\n",(void*)init_addr, ninst, dyn->size); 
+            #endif
+            BARRIER(2);
+            fpu_purgecache(dyn, ninst, x1, x2, x3);
+            jump_to_next(dyn, addr, 0, ninst);
+            ok=0; need_epilog=0;
+        }
     }
     if(need_epilog) {
         fpu_purgecache(dyn, ninst, x1, x2, x3);
@@ -101,4 +136,5 @@ void arm_pass(dynarec_arm_t* dyn, uintptr_t addr)
     }
     FINI;
     MESSAGE(LOG_DUMP, "---- END OF BLOCK ---- (%d, %d sons)\n", dyn->size, dyn->sons_size);
+    return addr;
 }

src/dynarec/dynarec_arm64_pass2.h

@@ -7,4 +7,5 @@
 #define INST_EPILOG dyn->insts[ninst].epilog = dyn->arm_size; 
 #define INST_NAME(name) 
 #define NEW_BARRIER_INST    if(ninst) ++dyn->sons_size
-#define TABLE64(A, V)   if((V)>0xffffffffLL) {Table64(dyn, (V)); EMIT(0);} else {MOV64x(A, V);}
+#define TABLE64(A, V)   {Table64(dyn, (V)); EMIT(0);}
+#define FTABLE64(A, V)  {mmx87_regs_t v = {.d = V}; Table64(dyn, v.q); EMIT(0);}

src/dynarec/dynarec_arm64_pass3.h

@@ -32,4 +32,5 @@
     ++dyn->sons_size;                               \
     }
 
-#define TABLE64(A, V)   if((V)>0xffffffffLL) {int val64offset = Table64(dyn, (V)); MESSAGE(LOG_DUMP, "  Table64: 0x%lx\n", (V)); LDRx_literal(A, val64offset);} else {MOV64x(A, V);}
+#define TABLE64(A, V)   {int val64offset = Table64(dyn, (V)); MESSAGE(LOG_DUMP, "  Table64: 0x%lx\n", (V)); LDRx_literal(A, val64offset);}
+#define FTABLE64(A, V)  {mmx87_regs_t v = {.d = V}; int val64offset = Table64(dyn, v.q); MESSAGE(LOG_DUMP, "  FTable64: %g\n", v.d); VLDR64_literal(A, val64offset);}

src/dynarec/dynarec_arm64_private.h

@@ -28,7 +28,7 @@ typedef struct dynarec_arm_s {
     uint32_t            isize;      // size in byte of x64 instructions included
     void*               block;      // memory pointer where next instruction is emited
     uintptr_t           arm_start;  // start of the arm code
-    int                 arm_size;   // size of emitted arm code
+    size_t              arm_size;   // size of emitted arm code
     int                 state_flags;// actual state for on-demand flags
     uintptr_t           last_ip;    // last set IP in RIP (or NULL if unclean state)
     int8_t              x87cache[8];// cache status for the 8 x87 register behind the fpu stack
@@ -42,6 +42,7 @@ typedef struct dynarec_arm_s {
     int                 dfnone;     // if defered flags is already set to df_none
     uint64_t            *table64;   // table of 64bits value
     int                 table64size;// size of table (will be appended at end of executable code)
+    int                 table64cap;
     uintptr_t           tablestart;
     uintptr_t*          next;       // variable array of "next" jump address
     int                 next_sz;
@@ -58,4 +59,4 @@ int is_instructions(dynarec_arm_t *dyn, uintptr_t addr, int n);
 
 int Table64(dynarec_arm_t *dyn, uint64_t val);  // add a value to etable64 (if needed) and gives back the imm19 to use in LDR_literal
 
-#endif //__DYNAREC_ARM_PRIVATE_H_
+#endif //__DYNAREC_ARM_PRIVATE_H_

src/dynarec/dynarec_private.h

@@ -15,8 +15,9 @@
 #define SF_UNKNOWN  0
 #define SF_SET      1
 #define SF_PENDING  2
-#define SF_MAYSET   3
-#define SF_SUBSET   4
+#define SF_SET_PENDING      3
+#define SF_MAYSET   4
+#define SF_SUBSET   5
 
 typedef struct instruction_x64_s {
     uintptr_t   addr;   //address of the instruction

src/elfs/elfload_dump.c

@@ -225,13 +225,14 @@ const char* DumpRelType(int t)
     return buff;
 }
 
-const char* DumpSym(elfheader_t *h, Elf64_Sym* sym)
+const char* DumpSym(elfheader_t *h, Elf64_Sym* sym, int version)
 {
     static char buff[4096];
+    const char* vername = (version==-1)?"(none)":((version==0)?"*local*":((version==1)?"*global*":GetSymbolVersion(h, version)));
     memset(buff, 0, sizeof(buff));
-    sprintf(buff, "\"%s\", value=%p, size=%ld, info/other=%d/%d index=%d", 
+    sprintf(buff, "\"%s\", value=%p, size=%ld, info/other=%d/%d index=%d (ver=%d/%s)", 
         h->DynStr+sym->st_name, (void*)sym->st_value, sym->st_size,
-        sym->st_info, sym->st_other, sym->st_shndx);
+        sym->st_info, sym->st_other, sym->st_shndx, version, vername);
     return buff;
 }
 
@@ -246,116 +247,118 @@ const char* IdxSymName(elfheader_t *h, int sym)
 
 void DumpMainHeader(Elf64_Ehdr *header, elfheader_t *h)
 {
-    if(box64_log>=LOG_DUMP) {
-        printf_log(LOG_DUMP, "ELF Dump main header\n");
-        printf_log(LOG_DUMP, "  Entry point = %p\n", (void*)header->e_entry);
-        printf_log(LOG_DUMP, "  Program Header table offset = %p\n", (void*)header->e_phoff);
-        printf_log(LOG_DUMP, "  Section Header table offset = %p\n", (void*)header->e_shoff);
-        printf_log(LOG_DUMP, "  Flags = 0x%X\n", header->e_flags);
-        printf_log(LOG_DUMP, "  ELF Header size = %d\n", header->e_ehsize);
-        printf_log(LOG_DUMP, "  Program Header Entry num/size = %d(%d)/%d\n", h->numPHEntries, header->e_phnum, header->e_phentsize);
-        printf_log(LOG_DUMP, "  Section Header Entry num/size = %d(%d)/%d\n", h->numSHEntries, header->e_shnum, header->e_shentsize);
-        printf_log(LOG_DUMP, "  Section Header index num = %d(%d)\n", h->SHIdx, header->e_shstrndx);
-        printf_log(LOG_DUMP, "ELF Dump ==========\n");
+    if(box64_dump) {
+        printf_dump(LOG_NEVER, "ELF Dump main header\n");
+        printf_dump(LOG_NEVER, "  Entry point = %p\n", (void*)header->e_entry);
+        printf_dump(LOG_NEVER, "  Program Header table offset = %p\n", (void*)header->e_phoff);
+        printf_dump(LOG_NEVER, "  Section Header table offset = %p\n", (void*)header->e_shoff);
+        printf_dump(LOG_NEVER, "  Flags = 0x%X\n", header->e_flags);
+        printf_dump(LOG_NEVER, "  ELF Header size = %d\n", header->e_ehsize);
+        printf_dump(LOG_NEVER, "  Program Header Entry num/size = %zu(%d)/%d\n", h->numPHEntries, header->e_phnum, header->e_phentsize);
+        printf_dump(LOG_NEVER, "  Section Header Entry num/size = %zu(%d)/%d\n", h->numSHEntries, header->e_shnum, header->e_shentsize);
+        printf_dump(LOG_NEVER, "  Section Header index num = %zu(%d)\n", h->SHIdx, header->e_shstrndx);
+        printf_dump(LOG_NEVER, "ELF Dump ==========\n");
 
-        printf_log(LOG_DUMP, "ELF Dump PEntries (%d)\n", h->numSHEntries);
-        for (int i=0; i<h->numPHEntries; ++i)
-            printf_log(LOG_DUMP, "  PHEntry %04d : %s\n", i, DumpPHEntry(h->PHEntries+i));
-        printf_log(LOG_DUMP, "ELF Dump PEntries ====\n");
+        printf_dump(LOG_NEVER, "ELF Dump PEntries (%zu)\n", h->numPHEntries);
+        for (size_t i=0; i<h->numPHEntries; ++i)
+            printf_dump(LOG_NEVER, "  PHEntry %04zu : %s\n", i, DumpPHEntry(h->PHEntries+i));
+        printf_dump(LOG_NEVER, "ELF Dump PEntries ====\n");
 
-        printf_log(LOG_DUMP, "ELF Dump Sections (%d)\n", h->numSHEntries);
-        for (int i=0; i<h->numSHEntries; ++i)
-            printf_log(LOG_DUMP, "  Section %04d : %s\n", i, DumpSection(h->SHEntries+i, h->SHStrTab));
-        printf_log(LOG_DUMP, "ELF Dump Sections ====\n");
+        printf_dump(LOG_NEVER, "ELF Dump Sections (%zu)\n", h->numSHEntries);
+        for (size_t i=0; i<h->numSHEntries; ++i)
+            printf_dump(LOG_NEVER, "  Section %04zu : %s\n", i, DumpSection(h->SHEntries+i, h->SHStrTab));
+        printf_dump(LOG_NEVER, "ELF Dump Sections ====\n");
     }
 }
 
 void DumpSymTab(elfheader_t *h)
 {
-    if(box64_log>=LOG_DUMP && h->SymTab) {
+    if(box64_dump && h->SymTab) {
         const char* name = ElfName(h);
-        printf_log(LOG_DUMP, "ELF Dump SymTab(%d)=\n", h->numSymTab);
-        for (int i=0; i<h->numSymTab; ++i)
-            printf_log(LOG_DUMP, "  %s:SymTab[%d] = \"%s\", value=%p, size=%ld, info/other=%d/%d index=%d\n", name, 
+        printf_dump(LOG_NEVER, "ELF Dump SymTab(%zu)=\n", h->numSymTab);
+        for (size_t i=0; i<h->numSymTab; ++i)
+            printf_dump(LOG_NEVER, "  %s:SymTab[%zu] = \"%s\", value=%p, size=%ld, info/other=%d/%d index=%d\n", name, 
                 i, h->StrTab+h->SymTab[i].st_name, (void*)h->SymTab[i].st_value, h->SymTab[i].st_size,
                 h->SymTab[i].st_info, h->SymTab[i].st_other, h->SymTab[i].st_shndx);
-        printf_log(LOG_DUMP, "ELF Dump SymTab=====\n");
+        printf_dump(LOG_NEVER, "ELF Dump SymTab=====\n");
     }
 }
 
 void DumpDynamicSections(elfheader_t *h)
 {
-    if(box64_log>=LOG_DUMP && h->Dynamic) {
-        printf_log(LOG_DUMP, "ELF Dump Dynamic(%d)=\n", h->numDynamic);
-        for (int i=0; i<h->numDynamic; ++i)
-            printf_log(LOG_DUMP, "  Dynamic %04d : %s\n", i, DumpDynamic(h->Dynamic+i));
-        printf_log(LOG_DUMP, "ELF Dump Dynamic=====\n");
+    if(box64_dump && h->Dynamic) {
+        printf_dump(LOG_NEVER, "ELF Dump Dynamic(%zu)=\n", h->numDynamic);
+        for (size_t i=0; i<h->numDynamic; ++i)
+            printf_dump(LOG_NEVER, "  Dynamic %04zu : %s\n", i, DumpDynamic(h->Dynamic+i));
+        printf_dump(LOG_NEVER, "ELF Dump Dynamic=====\n");
     }
 }
 
 void DumpDynSym(elfheader_t *h)
 {
-    if(box64_log>=LOG_DUMP && h->DynSym) {
+    if(box64_dump && h->DynSym) {
         const char* name = ElfName(h);
-        printf_log(LOG_DUMP, "ELF Dump DynSym(%d)=\n", h->numDynSym);
-        for (int i=0; i<h->numDynSym; ++i)
-            printf_log(LOG_DUMP, "  %s:DynSym[%d] = %s\n", name, i, DumpSym(h, h->DynSym+i));
-        printf_log(LOG_DUMP, "ELF Dump DynSym=====\n");
+        printf_dump(LOG_NEVER, "ELF Dump DynSym(%zu)=\n", h->numDynSym);
+        for (size_t i=0; i<h->numDynSym; ++i) {
+            int version = h->VerSym?((Elf64_Half*)((uintptr_t)h->VerSym+h->delta))[i]:-1;
+            printf_dump(LOG_NEVER, "  %s:DynSym[%zu] = %s\n", name, i, DumpSym(h, h->DynSym+i, version));
+        }
+        printf_dump(LOG_NEVER, "ELF Dump DynSym=====\n");
     }
 }
 
 void DumpDynamicNeeded(elfheader_t *h)
 {
-    if(box64_log>=LOG_DUMP && h->DynStrTab) {
-        printf_log(LOG_DUMP, "ELF Dump DT_NEEDED=====\n");
-        for (int i=0; i<h->numDynamic; ++i)
+    if(box64_dump && h->DynStrTab) {
+        printf_dump(LOG_NEVER, "ELF Dump DT_NEEDED=====\n");
+        for (size_t i=0; i<h->numDynamic; ++i)
             if(h->Dynamic[i].d_tag==DT_NEEDED) {
-                printf_log(LOG_DUMP, "  Needed : %s\n", h->DynStrTab+h->Dynamic[i].d_un.d_val + h->delta);
+                printf_dump(LOG_NEVER, "  Needed : %s\n", h->DynStrTab+h->Dynamic[i].d_un.d_val + h->delta);
             }
-        printf_log(LOG_DUMP, "ELF Dump DT_NEEDED=====\n");
+        printf_dump(LOG_NEVER, "ELF Dump DT_NEEDED=====\n");
     }
 }
 
 void DumpDynamicRPath(elfheader_t *h)
 {
-    if(box64_log>=LOG_DUMP && h->DynStrTab) {
-        printf_log(LOG_DUMP, "ELF Dump DT_RPATH/DT_RUNPATH=====\n");
-        for (int i=0; i<h->numDynamic; ++i) {
+    if(box64_dump && h->DynStrTab) {
+        printf_dump(LOG_NEVER, "ELF Dump DT_RPATH/DT_RUNPATH=====\n");
+        for (size_t i=0; i<h->numDynamic; ++i) {
             if(h->Dynamic[i].d_tag==DT_RPATH) {
-                printf_log(LOG_DUMP, "   RPATH : %s\n", h->DynStrTab+h->Dynamic[i].d_un.d_val + h->delta);
+                printf_dump(LOG_NEVER, "   RPATH : %s\n", h->DynStrTab+h->Dynamic[i].d_un.d_val + h->delta);
             }
             if(h->Dynamic[i].d_tag==DT_RUNPATH) {
-                printf_log(LOG_DUMP, " RUNPATH : %s\n", h->DynStrTab+h->Dynamic[i].d_un.d_val + h->delta);
+                printf_dump(LOG_NEVER, " RUNPATH : %s\n", h->DynStrTab+h->Dynamic[i].d_un.d_val + h->delta);
             }
         }
-        printf_log(LOG_DUMP, "=====ELF Dump DT_RPATH/DT_RUNPATH\n");
+        printf_dump(LOG_NEVER, "=====ELF Dump DT_RPATH/DT_RUNPATH\n");
     }
 }
 
 void DumpRelTable(elfheader_t *h, int cnt, Elf64_Rel *rel, const char* name)
 {
-    if(box64_log>=LOG_DUMP) {
+    if(box64_dump) {
         const char* elfname = ElfName(h);
-        printf_log(LOG_DUMP, "ELF Dump %s Table(%d) @%p\n", name, cnt, rel);
+        printf_dump(LOG_NEVER, "ELF Dump %s Table(%d) @%p\n", name, cnt, rel);
         for (int i = 0; i<cnt; ++i)
-            printf_log(LOG_DUMP, "  %s:Rel[%d] = %p (0x%lX: %s, sym=0x%0lX/%s)\n", elfname,
+            printf_dump(LOG_NEVER, "  %s:Rel[%d] = %p (0x%lX: %s, sym=0x%0lX/%s)\n", elfname,
                 i, (void*)rel[i].r_offset, rel[i].r_info, DumpRelType(ELF64_R_TYPE(rel[i].r_info)), 
                 ELF64_R_SYM(rel[i].r_info), IdxSymName(h, ELF64_R_SYM(rel[i].r_info)));
-        printf_log(LOG_DUMP, "ELF Dump Rel Table=====\n");
+        printf_dump(LOG_NEVER, "ELF Dump Rel Table=====\n");
     }
 }
 
 void DumpRelATable(elfheader_t *h, int cnt, Elf64_Rela *rela, const char* name)
 {
-    if(box64_log>=LOG_DUMP && h->rela) {
+    if(box64_dump && h->rela) {
         const char* elfname = ElfName(h);
-        printf_log(LOG_DUMP, "ELF Dump %s Table(%d) @%p\n", name, cnt, rela);
+        printf_dump(LOG_NEVER, "ELF Dump %s Table(%d) @%p\n", name, cnt, rela);
         for (int i = 0; i<cnt; ++i)
-            printf_log(LOG_DUMP, "  %s:RelA[%d] = %p (0x%lX: %s, sym=0x%lX/%s) Addend=%ld\n", elfname,
+            printf_dump(LOG_NEVER, "  %s:%s[%d] = %p (0x%lX: %s, sym=0x%lX/%s) Addend=0x%lx\n", elfname, name,
                 i, (void*)rela[i].r_offset, rela[i].r_info, DumpRelType(ELF64_R_TYPE(rela[i].r_info)), 
                 ELF64_R_SYM(rela[i].r_info), IdxSymName(h, ELF64_R_SYM(rela[i].r_info)), 
                 rela[i].r_addend);
-        printf_log(LOG_DUMP, "ELF Dump RelA Table=====\n");
+        printf_dump(LOG_NEVER, "ELF Dump %s Table=====\n", name);
     }
 }
 
@@ -366,24 +369,24 @@ void DumpBinary(char* p, int sz)
     unsigned char* d = (unsigned char*)p;
     int delta = ((uintptr_t)p)&0xf;
     for (int i = 0; sz; ++i) {
-        printf_log(LOG_DUMP, "%p ", (void*)(((uintptr_t)d)&~0xf));
+        printf_dump(LOG_NEVER, "%p ", (void*)(((uintptr_t)d)&~0xf));
         int n = 16 - delta;
         if (n>sz) n = sz;
         int fill = 16-sz;
         for (int j = 0; j<delta; ++j)
-            printf_log(LOG_DUMP, "   ");
+            printf_dump(LOG_NEVER, "   ");
         for (int j = 0; j<n; ++j)
-            printf_log(LOG_DUMP, "%02X ", d[j]);
+            printf_dump(LOG_NEVER, "%02X ", d[j]);
         for (int j = 0; j<fill; ++j)
-            printf_log(LOG_DUMP, "   ");
-        printf_log(LOG_DUMP, " | ");
+            printf_dump(LOG_NEVER, "   ");
+        printf_dump(LOG_NEVER, " | ");
         for (int j = 0; j<delta; ++j)
-            printf_log(LOG_DUMP, " ");
+            printf_dump(LOG_NEVER, " ");
         for (int j = 0; j<n; ++j)
-            printf_log(LOG_DUMP, "%c", (d[j]<32 || d[j]>127)?'.':d[j]);
+            printf_dump(LOG_NEVER, "%c", (d[j]<32 || d[j]>127)?'.':d[j]);
         for (int j = 0; j<fill; ++j)
-            printf_log(LOG_DUMP, " ");
-        printf_log(LOG_DUMP, "\n");
+            printf_dump(LOG_NEVER, " ");
+        printf_dump(LOG_NEVER, "\n");
         d+=n;
         sz-=n;
         delta=0;

src/elfs/elfloader_private.h

@@ -13,23 +13,28 @@ typedef struct needed_libs_s needed_libs_t;
 struct elfheader_s {
     char*       name;
     char*       path;   // Resolved path to file
-    int         numPHEntries;
+    size_t      numPHEntries;
     Elf64_Phdr  *PHEntries;
-    int         numSHEntries;
+    size_t      numSHEntries;
     Elf64_Shdr  *SHEntries;
-    int         SHIdx;
-    int         numSST;
+    size_t      SHIdx;
+    size_t      numSST;
     char*       SHStrTab;
     char*       StrTab;
     Elf64_Sym*  SymTab;
-    int         numSymTab;
+    size_t      numSymTab;
     char*       DynStr;
     Elf64_Sym*  DynSym;
-    int         numDynSym;
+    size_t      numDynSym;
     Elf64_Dyn*  Dynamic;
-    int         numDynamic;
+    size_t      numDynamic;
     char*       DynStrTab;
-    int         szDynStrTab;
+    size_t      szDynStrTab;
+    Elf64_Half* VerSym;
+    Elf64_Verneed*  VerNeed;
+    int         szVerNeed;
+    Elf64_Verdef*   VerDef;
+    int         szVerDef;
     int         e_type;
 
     intptr_t    delta;  // should be 0
@@ -37,19 +42,19 @@ struct elfheader_s {
     uintptr_t   entrypoint;
     uintptr_t   initentry;
     uintptr_t   initarray;
-    int         initarray_sz;
+    size_t      initarray_sz;
     uintptr_t   finientry;
     uintptr_t   finiarray;
-    int         finiarray_sz;
+    size_t      finiarray_sz;
 
     uintptr_t   rel;
-    int         relsz;
+    size_t      relsz;
     int         relent;
     uintptr_t   rela;
-    int         relasz;
+    size_t      relasz;
     int         relaent;
     uintptr_t   jmprel;
-    int         pltsz;
+    size_t      pltsz;
     int         pltent;
     uint64_t    pltrel;
     uintptr_t   gotplt;
@@ -60,18 +65,20 @@ struct elfheader_s {
     uintptr_t   plt;
     uintptr_t   plt_end;
     uintptr_t   text;
-    int         textsz;
+    size_t      textsz;
 
     uintptr_t   paddr;
     uintptr_t   vaddr;
-    int         align;
+    size_t      align;
     uint64_t    memsz;
     uint64_t    stacksz;
-    int         stackalign;
-    uint32_t    tlssize;
-    int         tlsalign;
+    size_t      stackalign;
+    uintptr_t   tlsaddr;
+    uint64_t    tlssize;
+    uint64_t    tlsfilesize;
+    size_t      tlsalign;
 
-    int32_t     tlsbase;    // the base of the tlsdata in the global tlsdata (always negative)
+    int64_t     tlsbase;    // the base of the tlsdata in the global tlsdata (always negative)
 
     int         init_done;
     int         fini_done;
@@ -133,4 +140,4 @@ struct elfheader_s {
 
 elfheader_t* ParseElfHeader(FILE* f, const char* name, int exec);
 
-#endif //__ELFLOADER_PRIVATE_H_
+#endif //__ELFLOADER_PRIVATE_H_

src/elfs/elfparser.c

@@ -43,7 +43,7 @@ int FindSection(Elf64_Shdr *s, int n, char* SHStrTab, const char* name)
     return 0;
 }
 
-void LoadNamedSection(FILE *f, Elf64_Shdr *s, int size, char* SHStrTab, const char* name, const char* clearname, uint32_t type, void** what, int* num)
+void LoadNamedSection(FILE *f, Elf64_Shdr *s, int size, char* SHStrTab, const char* name, const char* clearname, uint32_t type, void** what, size_t* num)
 {
     int n = FindSection(s, size, SHStrTab, name);
     printf_log(LOG_DEBUG, "Loading %s (idx = %d)\n", clearname, n);
@@ -71,8 +71,13 @@ elfheader_t* ParseElfHeader(FILE* f, const char* name, int exec)
         return NULL;
     }
     if(header.e_ident[EI_CLASS]!=ELFCLASS64) {
+        if(strstr(name, ".so")) {
+            // less naging on libs...
+            printf_log(LOG_DEBUG, "Not a 64bits ELF (%d)\n", header.e_ident[EI_CLASS]);
+            return NULL;
+        }
         if(header.e_ident[EI_CLASS]==ELFCLASS32) {
-            printf_log(LOG_INFO, "This is a 32bits ELF! box64 can only run 64bits ELF!\n");
+            printf_log(LOG_INFO, "This is a 32bits ELF! box64 can only run 64bits ELF (%s)!\n", name);
         } else {
             printf_log(LOG_INFO, "Not a 64bits ELF (%d)\n", header.e_ident[EI_CLASS]);
         }
@@ -136,7 +141,7 @@ elfheader_t* ParseElfHeader(FILE* f, const char* name, int exec)
             h->numSHEntries = section.sh_size;
         }
         // now read all section headers
-        printf_log(LOG_DEBUG, "Read %d Section header\n", h->numSHEntries);
+        printf_log(LOG_DEBUG, "Read %zu Section header\n", h->numSHEntries);
         h->SHEntries = (Elf64_Shdr*)calloc(h->numSHEntries, sizeof(Elf64_Shdr));
         fseeko64(f, header.e_shoff ,SEEK_SET);
         if(fread(h->SHEntries, sizeof(Elf64_Shdr), h->numSHEntries, f)!=h->numSHEntries) {
@@ -152,7 +157,7 @@ elfheader_t* ParseElfHeader(FILE* f, const char* name, int exec)
         }
     }
 
-    printf_log(LOG_DEBUG, "Read %d Program header\n", h->numPHEntries);
+    printf_log(LOG_DEBUG, "Read %zu Program header\n", h->numPHEntries);
     h->PHEntries = (Elf64_Phdr*)calloc(h->numPHEntries, sizeof(Elf64_Phdr));
     fseeko64(f, header.e_phoff ,SEEK_SET);
     if(fread(h->PHEntries, sizeof(Elf64_Phdr), h->numPHEntries, f)!=h->numPHEntries) {
@@ -167,68 +172,125 @@ elfheader_t* ParseElfHeader(FILE* f, const char* name, int exec)
             h->SHIdx = h->SHEntries[0].sh_link;
         }
         if(h->SHIdx > h->numSHEntries) {
-            printf_log(LOG_INFO, "Incoherent Section String Table Index : %d / %d\n", h->SHIdx, h->numSHEntries);
+            printf_log(LOG_INFO, "Incoherent Section String Table Index : %zu / %zu\n", h->SHIdx, h->numSHEntries);
             FreeElfHeader(&h);
             return NULL;
         }
         // load Section table
-        printf_log(LOG_DEBUG, "Loading Sections Table String (idx = %d)\n", h->SHIdx);
+        printf_log(LOG_DEBUG, "Loading Sections Table String (idx = %zu)\n", h->SHIdx);
         if(LoadSH(f, h->SHEntries+h->SHIdx, (void*)&h->SHStrTab, ".shstrtab", SHT_STRTAB)) {
             FreeElfHeader(&h);
             return NULL;
         }
-        if(box64_log>=LOG_DUMP) DumpMainHeader(&header, h);
+        if(box64_dump) DumpMainHeader(&header, h);
 
         LoadNamedSection(f, h->SHEntries, h->numSHEntries, h->SHStrTab, ".strtab", "SymTab Strings", SHT_STRTAB, (void**)&h->StrTab, NULL);
         LoadNamedSection(f, h->SHEntries, h->numSHEntries, h->SHStrTab, ".symtab", "SymTab", SHT_SYMTAB, (void**)&h->SymTab, &h->numSymTab);
-        if(box64_log>=LOG_DUMP && h->SymTab) DumpSymTab(h);
+        if(box64_dump && h->SymTab) DumpSymTab(h);
 
         LoadNamedSection(f, h->SHEntries, h->numSHEntries, h->SHStrTab, ".dynamic", "Dynamic", SHT_DYNAMIC, (void**)&h->Dynamic, &h->numDynamic);
-        if(box64_log>=LOG_DUMP && h->Dynamic) DumpDynamicSections(h);
+        if(box64_dump && h->Dynamic) DumpDynamicSections(h);
         // grab DT_REL & DT_RELA stuffs
         // also grab the DT_STRTAB string table
         {
-            for (int i=0; i<h->numDynamic; ++i) {
-                if(h->Dynamic[i].d_tag == DT_REL)
-                    h->rel = h->Dynamic[i].d_un.d_ptr;
-                else if(h->Dynamic[i].d_tag == DT_RELSZ)
-                    h->relsz = h->Dynamic[i].d_un.d_val;
-                else if(h->Dynamic[i].d_tag == DT_RELENT)
-                    h->relent = h->Dynamic[i].d_un.d_val;
-                else if(h->Dynamic[i].d_tag == DT_RELA)
-                    h->rela = h->Dynamic[i].d_un.d_ptr;
-                else if(h->Dynamic[i].d_tag == DT_RELASZ)
-                    h->relasz = h->Dynamic[i].d_un.d_val;
-                else if(h->Dynamic[i].d_tag == DT_RELAENT)
-                    h->relaent = h->Dynamic[i].d_un.d_val;
-                else if(h->Dynamic[i].d_tag == DT_PLTGOT)
-                    h->pltgot = h->Dynamic[i].d_un.d_val;
-                else if(h->Dynamic[i].d_tag == DT_PLTREL)
-                    h->pltrel = h->Dynamic[i].d_un.d_val;
-                else if(h->Dynamic[i].d_tag == DT_PLTRELSZ)
-                    h->pltsz = h->Dynamic[i].d_un.d_val;
-                else if(h->Dynamic[i].d_tag == DT_JMPREL)
-                    h->jmprel = h->Dynamic[i].d_un.d_val;
-                else if(h->Dynamic[i].d_tag == DT_STRTAB)
-                    h->DynStrTab = (char*)(h->Dynamic[i].d_un.d_ptr);
-                else if(h->Dynamic[i].d_tag == DT_STRSZ)
-                    h->szDynStrTab = h->Dynamic[i].d_un.d_val;
+            for (size_t i=0; i<h->numDynamic; ++i) {
+                Elf64_Dyn d = h->Dynamic[i];
+                Elf64_Word val = d.d_un.d_val;
+                Elf64_Addr ptr = d.d_un.d_ptr;
+                switch (d.d_tag) {
+                case DT_REL:
+                    h->rel = ptr;
+                    break;
+                case DT_RELSZ:
+                    h->relsz = val;
+                    break;
+                case DT_RELENT:
+                    h->relent = val;
+                    break;
+                case DT_RELA:
+                    h->rela = ptr;
+                    break;
+                case DT_RELASZ:
+                    h->relasz = val;
+                    break;
+                case DT_RELAENT:
+                    h->relaent = val;
+                    break;
+                case DT_PLTGOT:
+                    h->pltgot = ptr;
+                    break;
+                case DT_PLTREL:
+                    h->pltrel = val;
+                    break;
+                case DT_PLTRELSZ:
+                    h->pltsz = val;
+                    break;
+                case DT_JMPREL:
+                    h->jmprel = ptr;
+                    break;
+                case DT_STRTAB:
+                    h->DynStrTab = (char*)(ptr);
+                    break;
+                case DT_STRSZ:
+                    h->szDynStrTab = val;
+                    break;
+                case DT_INIT: // Entry point
+                    h->initentry = ptr;
+                    printf_log(LOG_DEBUG, "The DT_INIT is at address %p\n", (void*)h->initentry);
+                    break;
+                case DT_INIT_ARRAY:
+                    h->initarray = ptr;
+                    printf_log(LOG_DEBUG, "The DT_INIT_ARRAY is at address %p\n", (void*)h->initarray);
+                    break;
+                case DT_INIT_ARRAYSZ:
+                    h->initarray_sz = val / sizeof(Elf64_Addr);
+                    printf_log(LOG_DEBUG, "The DT_INIT_ARRAYSZ is %zu\n", h->initarray_sz);
+                    break;
+                case DT_FINI: // Exit hook
+                    h->finientry = ptr;
+                    printf_log(LOG_DEBUG, "The DT_FINI is at address %p\n", (void*)h->finientry);
+                    break;
+                case DT_FINI_ARRAY:
+                    h->finiarray = ptr;
+                    printf_log(LOG_DEBUG, "The DT_FINI_ARRAY is at address %p\n", (void*)h->finiarray);
+                    break;
+                case DT_FINI_ARRAYSZ:
+                    h->finiarray_sz = val / sizeof(Elf64_Addr);
+                    printf_log(LOG_DEBUG, "The DT_FINI_ARRAYSZ is %zu\n", h->finiarray_sz);
+                    break;
+                case DT_VERNEEDNUM:
+                    h->szVerNeed = val;
+                    printf_log(LOG_DEBUG, "The DT_VERNEEDNUM is %d\n", h->szVerNeed);
+                    break;
+                case DT_VERNEED:
+                    h->VerNeed = (Elf64_Verneed*)ptr;
+                    printf_log(LOG_DEBUG, "The DT_VERNEED is at address %p\n", h->VerNeed);
+                    break;
+                case DT_VERDEFNUM:
+                    h->szVerDef = val;
+                    printf_log(LOG_DEBUG, "The DT_VERDEFNUM is %d\n", h->szVerDef);
+                    break;
+                case DT_VERDEF:
+                    h->VerDef = (Elf64_Verdef*)ptr;
+                    printf_log(LOG_DEBUG, "The DT_VERDEF is at address %p\n", h->VerDef);
+                    break;
+                }
             }
             if(h->rel) {
                 if(h->relent != sizeof(Elf64_Rel)) {
-                    printf_log(LOG_NONE, "Rel Table Entry size invalid (0x%x should be 0x%lx)\n", h->relent, sizeof(Elf64_Rel));
+                    printf_log(LOG_NONE, "Rel Table Entry size invalid (0x%x should be 0x%zx)\n", h->relent, sizeof(Elf64_Rel));
                     FreeElfHeader(&h);
                     return NULL;
                 }
-                printf_log(LOG_DEBUG, "Rel Table @%p (0x%x/0x%x)\n", (void*)h->rel, h->relsz, h->relent);
+                printf_log(LOG_DEBUG, "Rel Table @%p (0x%zx/0x%x)\n", (void*)h->rel, h->relsz, h->relent);
             }
             if(h->rela) {
                 if(h->relaent != sizeof(Elf64_Rela)) {
-                    printf_log(LOG_NONE, "RelA Table Entry size invalid (0x%x should be 0x%lx)\n", h->relaent, sizeof(Elf64_Rela));
+                    printf_log(LOG_NONE, "RelA Table Entry size invalid (0x%x should be 0x%zx)\n", h->relaent, sizeof(Elf64_Rela));
                     FreeElfHeader(&h);
                     return NULL;
                 }
-                printf_log(LOG_DEBUG, "RelA Table @%p (0x%x/0x%x)\n", (void*)h->rela, h->relasz, h->relaent);
+                printf_log(LOG_DEBUG, "RelA Table @%p (0x%zx/0x%x)\n", (void*)h->rela, h->relasz, h->relaent);
             }
             if(h->jmprel) {
                 if(h->pltrel == DT_REL) {
@@ -236,16 +298,16 @@ elfheader_t* ParseElfHeader(FILE* f, const char* name, int exec)
                 } else if(h->pltrel == DT_RELA) {
                     h->pltent = sizeof(Elf64_Rela);
                 } else {
-                    printf_log(LOG_NONE, "PLT Table type is unknown (size = 0x%x, type=%ld)\n", h->pltsz, h->pltrel);
+                    printf_log(LOG_NONE, "PLT Table type is unknown (size = 0x%zx, type=%ld)\n", h->pltsz, h->pltrel);
                     FreeElfHeader(&h);
                     return NULL;
                 }
                 if((h->pltsz / h->pltent)*h->pltent != h->pltsz) {
-                    printf_log(LOG_NONE, "PLT Table Entry size invalid (0x%x, ent=0x%x, type=%ld)\n", h->pltsz, h->pltent, h->pltrel);
+                    printf_log(LOG_NONE, "PLT Table Entry size invalid (0x%zx, ent=0x%x, type=%ld)\n", h->pltsz, h->pltent, h->pltrel);
                     FreeElfHeader(&h);
                     return NULL;
                 }
-                printf_log(LOG_DEBUG, "PLT Table @%p (type=%ld 0x%x/0x%0x)\n", (void*)h->jmprel, h->pltrel, h->pltsz, h->pltent);
+                printf_log(LOG_DEBUG, "PLT Table @%p (type=%ld 0x%zx/0x%0x)\n", (void*)h->jmprel, h->pltrel, h->pltsz, h->pltent);
             }
             if(h->DynStrTab && h->szDynStrTab) {
                 //DumpDynamicNeeded(h); cannot dump now, it's not loaded yet
@@ -270,44 +332,61 @@ elfheader_t* ParseElfHeader(FILE* f, const char* name, int exec)
             h->plt_end = h->plt + h->SHEntries[ii].sh_size;
             printf_log(LOG_DEBUG, "The PLT Table is at address %p..%p\n", (void*)h->plt, (void*)h->plt_end);
         }
-        // look for .init entry point
-        ii = FindSection(h->SHEntries, h->numSHEntries, h->SHStrTab, ".init");
+        // grab version of symbols
+        ii = FindSection(h->SHEntries, h->numSHEntries, h->SHStrTab, ".gnu.version");
         if(ii) {
-            h->initentry = h->SHEntries[ii].sh_addr;
-            printf_log(LOG_DEBUG, "The .init is at address %p\n", (void*)h->initentry);
-        }
-        // and .init_array
-        ii = FindSection(h->SHEntries, h->numSHEntries, h->SHStrTab, ".init_array");
-        if(ii) {
-            h->initarray_sz = h->SHEntries[ii].sh_size / sizeof(Elf64_Addr);
-            h->initarray = (uintptr_t)(h->SHEntries[ii].sh_addr);
-            printf_log(LOG_DEBUG, "The .init_array is at address %p, and have %d elements\n", (void*)h->initarray, h->initarray_sz);
-        }
-        // look for .fini entry point
-        ii = FindSection(h->SHEntries, h->numSHEntries, h->SHStrTab, ".fini");
-        if(ii) {
-            h->finientry = h->SHEntries[ii].sh_addr;
-            printf_log(LOG_DEBUG, "The .fini is at address %p\n", (void*)h->finientry);
-        }
-        // and .fini_array
-        ii = FindSection(h->SHEntries, h->numSHEntries, h->SHStrTab, ".fini_array");
-        if(ii) {
-            h->finiarray_sz = h->SHEntries[ii].sh_size / sizeof(Elf64_Addr);
-            h->finiarray = (uintptr_t)(h->SHEntries[ii].sh_addr);
-            printf_log(LOG_DEBUG, "The .fini_array is at address %p, and have %d elements\n", (void*)h->finiarray, h->finiarray_sz);
+            h->VerSym = (Elf64_Half*)(h->SHEntries[ii].sh_addr);
+            printf_log(LOG_DEBUG, "The .gnu.version is at address %p\n", h->VerSym);
         }
         // grab .text for main code
         ii = FindSection(h->SHEntries, h->numSHEntries, h->SHStrTab, ".text");
         if(ii) {
             h->text = (uintptr_t)(h->SHEntries[ii].sh_addr);
             h->textsz = h->SHEntries[ii].sh_size;
-            printf_log(LOG_DEBUG, "The .text is at address %p, and is %d big\n", (void*)h->text, h->textsz);
+            printf_log(LOG_DEBUG, "The .text is at address %p, and is %zu big\n", (void*)h->text, h->textsz);
         }
 
         LoadNamedSection(f, h->SHEntries, h->numSHEntries, h->SHStrTab, ".dynstr", "DynSym Strings", SHT_STRTAB, (void**)&h->DynStr, NULL);
         LoadNamedSection(f, h->SHEntries, h->numSHEntries, h->SHStrTab, ".dynsym", "DynSym", SHT_DYNSYM, (void**)&h->DynSym, &h->numDynSym);
-        if(box64_log>=LOG_DUMP && h->DynSym) DumpDynSym(h);
     }
     
     return h;
 }
+
+const char* GetSymbolVersion(elfheader_t* h, int version)
+{
+    if(!h->VerNeed || (version<2))
+        return NULL;
+    /*if(version==1)
+        return "*";*/
+    Elf64_Verneed *ver = (Elf64_Verneed*)((uintptr_t)h->VerNeed + h->delta);
+    while(ver) {
+        Elf64_Vernaux *aux = (Elf64_Vernaux*)((uintptr_t)ver + ver->vn_aux);
+        for(int j=0; j<ver->vn_cnt; ++j) {
+            if(aux->vna_other==version)
+                return h->DynStr+aux->vna_name;
+            aux = (Elf64_Vernaux*)((uintptr_t)aux + aux->vna_next);
+        }
+        ver = ver->vn_next?((Elf64_Verneed*)((uintptr_t)ver + ver->vn_next)):NULL;
+    }
+    return GetParentSymbolVersion(h, version);  // if symbol is "internal", use Def table instead
+}
+
+const char* GetParentSymbolVersion(elfheader_t* h, int index)
+{
+    if(!h->VerDef || (index<1))
+        return NULL;
+    Elf64_Verdef *def = (Elf64_Verdef*)((uintptr_t)h->VerDef + h->delta);
+    while(def) {
+        if(def->vd_ndx==index) {
+            if(def->vd_cnt<1)
+                return NULL;
+            /*if(def->vd_flags&VER_FLG_BASE)
+                return NULL;*/
+            Elf64_Verdaux *aux = (Elf64_Verdaux*)((uintptr_t)def + def->vd_aux);
+            return h->DynStr+aux->vda_name; // return Parent, so 1st aux
+        }
+        def = def->vd_next?((Elf64_Verdef*)((uintptr_t)def + def->vd_next)):NULL;
+    }
+    return NULL;
+}

src/emu/modrm.h

@@ -1,6 +1,7 @@
 #define F8      *(uint8_t*)(R_RIP++)
 #define F8S     *(int8_t*)(R_RIP++)
 #define F16     *(uint16_t*)(R_RIP+=2, R_RIP-2)
+#define F16S    *(int16_t*)(R_RIP+=2, R_RIP-2)
 #define F32     *(uint32_t*)(R_RIP+=4, R_RIP-4)
 #define F32S    *(int32_t*)(R_RIP+=4, R_RIP-4)
 #define F32S64  (uint64_t)(int64_t)F32S
@@ -18,14 +19,19 @@
 #define GETED_OFFS(D, O)    oped=GetEdO(emu, rex, nextop, D, O)
 #define GETGD               opgd=GetGd(emu, rex, nextop)
 #define GETEB(D)            oped=GetEb(emu, rex, nextop, D)
+#define GETEB32(D)          oped=GetEb32O(emu, rex, nextop, D, 0)
 #define GETEB_OFFS(D, O)    oped=GetEbO(emu, rex, nextop, D, O)
 #define GETGB               opgd=GetGb(emu, rex, nextop)
 #define GETEW(D)            oped=GetEw(emu, rex, nextop, D)
+#define GETEW32(D)          oped=GetEw32O(emu, rex, nextop, D, 0)
 #define GETEW_OFFS(D, O)    oped=GetEdO(emu, rex, nextop, D, O)
 #define GETGW               opgd=GetGw(emu, rex, nextop)
 #define GETEX(D)            opex=GetEx(emu, rex, nextop, D)
+#define GETEX32(D)          opex=GetEx32O(emu, rex, nextop, D, 0)
+#define GETEX_OFFS(D, O)    opex=GetExO(emu, rex, nextop, D, O)
 #define GETGX               opgx=GetGx(emu, rex, nextop)
 #define GETEM(D)            opem=GetEm(emu, rex, nextop, D)
+#define GETEM32(D)          opem=GetEm32O(emu, rex, nextop, D, 0)
 #define GETGM               opgm=GetGm(emu, rex, nextop)
 #define ED  oped
 #define GD  opgd

src/emu/x64emu.c

@@ -5,6 +5,7 @@
 #include <unistd.h>
 #include <sys/syscall.h>
 #include <sys/time.h>
+#include <sys/mman.h>
 
 #include "debug.h"
 #include "box64stack.h"
@@ -16,6 +17,9 @@
 #include "x64run_private.h"
 #include "callback.h"
 #include "bridge.h"
+#ifdef HAVE_TRACE
+#include "x64trace.h"
+#endif
 #ifdef DYNAREC
 #include "custommem.h"
 #endif
@@ -105,8 +109,10 @@ EXPORTDYN
 void SetupX64Emu(x64emu_t *emu)
 {
     printf_log(LOG_DEBUG, "Setup X86_64 Emu\n");
+    (void)emu;  // Not doing much here...
 }
 
+#ifdef HAVE_TRACE
 void SetTraceEmu(uintptr_t start, uintptr_t end)
 {
     if(my_context->zydis) {
@@ -121,9 +127,12 @@ void SetTraceEmu(uintptr_t start, uintptr_t end)
     trace_start = start;
     trace_end = end;
 }
+#endif
 
 void AddCleanup(x64emu_t *emu, void *p)
 {
+    (void)emu;
+    
     if(my_context->clean_sz == my_context->clean_cap) {
         my_context->clean_cap += 4;
         my_context->cleanups = (cleanup_t*)realloc(my_context->cleanups, sizeof(cleanup_t)*my_context->clean_cap);
@@ -135,6 +144,8 @@ void AddCleanup(x64emu_t *emu, void *p)
 
 void AddCleanup1Arg(x64emu_t *emu, void *p, void* a)
 {
+    (void)emu;
+    
     if(my_context->clean_sz == my_context->clean_cap) {
         my_context->clean_cap += 4;
         my_context->cleanups = (cleanup_t*)realloc(my_context->cleanups, sizeof(cleanup_t)*my_context->clean_cap);
@@ -173,7 +184,8 @@ void CallAllCleanup(x64emu_t *emu)
 
 static void internalFreeX64(x64emu_t* emu)
 {
-    free(emu->stack2free);
+    if(emu && emu->stack2free)
+        munmap(emu->stack2free, emu->size_stack);
 }
 
 EXPORTDYN
@@ -206,12 +218,12 @@ void CloneEmu(x64emu_t *newemu, const x64emu_t* emu)
     newemu->old_ip = emu->old_ip;
     memcpy(newemu->segs, emu->segs, sizeof(emu->segs));
     memset(newemu->segs_serial, 0, sizeof(newemu->segs_serial));
-	memcpy(newemu->mmx87, emu->mmx87, sizeof(emu->mmx87));
+	memcpy(newemu->x87, emu->x87, sizeof(emu->x87));
+	memcpy(newemu->mmx, emu->mmx, sizeof(emu->mmx));
     memcpy(newemu->fpu_ld, emu->fpu_ld, sizeof(emu->fpu_ld));
     memcpy(newemu->fpu_ll, emu->fpu_ll, sizeof(emu->fpu_ll));
 	memcpy(newemu->p_regs, emu->p_regs, sizeof(emu->p_regs));
 	newemu->cw = emu->cw;
-    newemu->cw_mask_all = emu->cw_mask_all;
 	memcpy(&newemu->sw, &emu->sw, sizeof(emu->sw));
 	newemu->top = emu->top;
     newemu->fpu_stack = emu->fpu_stack;
@@ -311,14 +323,19 @@ uint64_t GetRSP(x64emu_t *emu)
 {
     return R_RSP;
 }
-void SetFS(x64emu_t *emu, uint16_t v)
+uint64_t GetRBP(x64emu_t *emu)
+{
+    return R_RBP;
+}
+/*void SetFS(x64emu_t *emu, uint16_t v)
 {
     emu->segs[_FS] = v;
+    emu->segs_serial[_FS] = 0;
 }
 uint16_t GetFS(x64emu_t *emu)
 {
     return emu->segs[_FS];
-}
+}*/
 
 
 void ResetFlags(x64emu_t *emu)
@@ -329,30 +346,32 @@ void ResetFlags(x64emu_t *emu)
 const char* DumpCPURegs(x64emu_t* emu, uintptr_t ip)
 {
     static char buff[1000];
-    char* regname[] = {"RAX", "RCX", "RDX", "RBX", "RSP", "RBP", "RSI", "RDI", 
+    char* regname[] = {"RAX", "RCX", "RDX", "RBX", "RSP", "RBP", "RSI", "RDI",
                        " R8", " R9", "R10", "R11", "R12", "R13", "R14", "R15"};
     char tmp[160];
     buff[0] = '\0';
+#ifdef HAVE_TRACE
     if(trace_emm) {
-        // do emm reg is needed
+        // do emm reg if needed
         for(int i=0; i<8; ++i) {
-            sprintf(tmp, "mm%d:%016lx", i, emu->mmx87[i].q);
+            sprintf(tmp, "mm%d:%016lx", i, emu->mmx[i].q);
             strcat(buff, tmp);
             if ((i&3)==3) strcat(buff, "\n"); else strcat(buff, " ");
         }
     }
     if(trace_xmm) {
-        // do xmm reg is needed
+        // do xmm reg if needed
         for(int i=0; i<8; ++i) {
             sprintf(tmp, "%d:%016lx%016lx", i, emu->xmm[i].q[1], emu->xmm[i].q[0]);
             strcat(buff, tmp);
             if ((i&3)==3) strcat(buff, "\n"); else strcat(buff, " ");
         }
     }
+#endif
     // start with FPU regs...
     if(emu->fpu_stack) {
         for (int i=0; i<emu->fpu_stack; i++) {
-            sprintf(tmp, "ST%d=%f", i, emu->mmx87[(emu->top+i)&7].d);
+            sprintf(tmp, "ST%d=%f", i, ST(i).d);
             strcat(buff, tmp);
             int c = 10-strlen(tmp);
             if(c<1) c=1;
@@ -362,19 +381,28 @@ const char* DumpCPURegs(x64emu_t* emu, uintptr_t ip)
         strcat(buff, "\n");
     }
     for (int i=_AX; i<=_R15; ++i) {
+#ifdef HAVE_TRACE
+        if (trace_regsdiff && (emu->regs[i].q[0] != emu->oldregs[i].q[0])) {
+            sprintf(tmp, "\e[1;35m%s=%016lx\e[m ", regname[i], emu->regs[i].q[0]);
+            emu->oldregs[i].q[0] = emu->regs[i].q[0];
+        } else {
+            sprintf(tmp, "%s=%016lx ", regname[i], emu->regs[i].q[0]);
+        }
+#else
         sprintf(tmp, "%s=%016lx ", regname[i], emu->regs[i].q[0]);
+#endif
         strcat(buff, tmp);
 
         if (i%5==4) {
             if(i==4) {
                 if(emu->df) {
 #define FLAG_CHAR(f) (ACCESS_FLAG(F_##f##F)) ? #f : "?"
-                    sprintf(tmp, "flags=%s%s%s%s%s%s\n", FLAG_CHAR(O), FLAG_CHAR(C), FLAG_CHAR(P), FLAG_CHAR(A), FLAG_CHAR(Z), FLAG_CHAR(S));
+                    sprintf(tmp, "flags=%s%s%s%s%s%s%s\n", FLAG_CHAR(O), FLAG_CHAR(D), FLAG_CHAR(S), FLAG_CHAR(Z), FLAG_CHAR(A), FLAG_CHAR(P), FLAG_CHAR(C));
                     strcat(buff, tmp);
 #undef FLAG_CHAR
                 } else {
 #define FLAG_CHAR(f) (ACCESS_FLAG(F_##f##F)) ? #f : "-"
-                    sprintf(tmp, "FLAGS=%s%s%s%s%s%s\n", FLAG_CHAR(O), FLAG_CHAR(C), FLAG_CHAR(P), FLAG_CHAR(A), FLAG_CHAR(Z), FLAG_CHAR(S));
+                    sprintf(tmp, "FLAGS=%s%s%s%s%s%s%s\n", FLAG_CHAR(O), FLAG_CHAR(D), FLAG_CHAR(S), FLAG_CHAR(Z), FLAG_CHAR(A), FLAG_CHAR(P), FLAG_CHAR(C));
                     strcat(buff, tmp);
 #undef FLAG_CHAR
                 }
@@ -393,8 +421,19 @@ void StopEmu(x64emu_t* emu, const char* reason)
     emu->quit = 1;
     printf_log(LOG_NONE, "%s", reason);
     // dump stuff...
-    printf_log(LOG_NONE, "CPU Regs=%s\n", DumpCPURegs(emu, R_RIP));
-    // TODO: stack, memory/instruction around EIP, etc..
+    printf_log(LOG_NONE, "==== CPU Registers ====\n%s\n", DumpCPURegs(emu, R_RIP));
+    printf_log(LOG_NONE, "======== Stack ========\nStack is from %lX to %lX\n", R_RBP, R_RSP);
+    if (R_RBP == R_RSP) {
+        printf_log(LOG_NONE, "RBP = RSP: leaf function detected; next 128 bytes should be either data or random.\n");
+    } else {
+        // TODO: display stack if operation should be allowed (to avoid crashes)
+        /* for (uint64_t *sp = R_RBP; sp >= R_RSP; --sp) {
+        } */
+    }
+    printf_log(LOG_NONE, "Old IP: %tX\n", emu->old_ip);
+#ifdef HAVE_TRACE
+    printf_log(LOG_NONE, "%s\n", DecodeX64Trace(my_context->dec, emu->old_ip));
+#endif
 }
 
 void UnimpOpcode(x64emu_t* emu)
@@ -427,7 +466,8 @@ void EmuCall(x64emu_t* emu, uintptr_t addr)
     emu->quit = 0;  // reset Quit flags...
     emu->df = d_none;
     if(emu->quitonlongjmp && emu->longjmp) {
-        emu->longjmp = 0;   // don't change anything because of the longjmp
+        if(emu->quitonlongjmp==1)
+            emu->longjmp = 0;   // don't change anything because of the longjmp
     } else {
         R_RBX = old_rbx;
         R_RDI = old_rdi;
@@ -440,18 +480,20 @@ void EmuCall(x64emu_t* emu, uintptr_t addr)
 
 uint64_t ReadTSC(x64emu_t* emu)
 {
-    //TODO: implement hardware counter read?
+    (void)emu;
+    
+    //TODO: implement hardware counter read? (only available in kernel space?)
     // Read the TimeStamp Counter as 64bits.
-    // this is supposed to be the number of instrunctions executed since last reset
-// fall back to gettime...
+    // this is supposed to be the number of instructions executed since last reset
+    // fall back to gettime...
 #ifndef NOGETCLOCK
-  struct timespec ts;
-  clock_gettime(CLOCK_MONOTONIC_COARSE, &ts);
-  return (uint64_t)(ts.tv_sec) * 1000000000LL + ts.tv_nsec;
+    struct timespec ts;
+    clock_gettime(CLOCK_MONOTONIC_COARSE, &ts);
+    return (uint64_t)(ts.tv_sec) * 1000000000LL + ts.tv_nsec;
 #else
-  struct timeval tv;
-  gettimeofday(&tv, NULL);
-  return (uint64_t)(tv.tv_sec) * 1000000 + tv.tv_usec;
+    struct timeval tv;
+    gettimeofday(&tv, NULL);
+    return (uint64_t)(tv.tv_sec) * 1000000 + tv.tv_usec;
 #endif
 }
 
@@ -460,4 +502,4 @@ void ResetSegmentsCache(x64emu_t *emu)
     if(!emu)
         return;
     memset(emu->segs_serial, 0, sizeof(emu->segs_serial));
-}
+}

src/emu/x64emu_private.h

@@ -30,10 +30,12 @@ typedef struct x64emu_s {
 	reg64_t     regs[16];
 	x64flags_t  eflags;
     reg64_t     ip;
-    uintptr_t   old_ip;
+    // sse
+    sse_regs_t  xmm[16];
     // fpu / mmx
-	mmx87_regs_t mmx87[8];
-	uint16_t    cw,cw_mask_all;
+	mmx87_regs_t x87[8];
+	mmx87_regs_t mmx[8];
+	uint16_t    cw;
 	x87flags_t  sw;
 	uint32_t    top;        // top is part of sw, but it's faster to have it separatly
     int         fpu_stack;
@@ -42,8 +44,8 @@ typedef struct x64emu_s {
     fpu_ld_t    fpu_ld[8]; // for long double emulation / 80bits fld fst
     fpu_ll_t    fpu_ll[8]; // for 64bits fild / fist sequence
 	fpu_p_reg_t p_regs[8];
-    // sse
-    sse_regs_t  xmm[16];
+    // old ip
+    uintptr_t   old_ip;
     // defered flags
     int         dummy1;     // to align on 64bits with df
     defered_flags_t df;
@@ -52,6 +54,7 @@ typedef struct x64emu_s {
     multiuint_t res;
     uint32_t    *x64emu_parity_tab; // helper
     #ifdef HAVE_TRACE
+    reg64_t     oldregs[16];
     uintptr_t   prev2_ip;
     #endif
     // segments
@@ -91,4 +94,4 @@ typedef struct x64emu_s {
 //#define INTR_RAISE_DIV0(emu) {emu->error |= ERR_DIVBY0; emu->quit=1;}
 #define INTR_RAISE_DIV0(emu) {emu->error |= ERR_DIVBY0;} // should rise a SIGFPE and not quit
 
-#endif //__X86EMU_PRIVATE_H_
+#endif //__X86EMU_PRIVATE_H_

src/emu/x64int3.c

@@ -10,6 +10,7 @@
 #include <sys/types.h>
 #include <pthread.h>
 #include <signal.h>
+#include <poll.h>
 
 #include "debug.h"
 #include "box64stack.h"
@@ -91,21 +92,116 @@ void x64Int3(x64emu_t* emu)
                 char *tmp;
                 int post = 0;
                 int perr = 0;
-                uint32_t *pu32 = NULL;
+                uint64_t *pu64 = NULL;
                 const char *s = NULL;
                 s = GetNativeName((void*)addr);
                 if(addr==(uintptr_t)PltResolver) {
                     snprintf(buff, 256, "%s", " ... ");
-                } else  if(strstr(s, "__open")==s || !strcmp(s, "open") || !strcmp(s, "open ")) {
+                } else if (!strcmp(s, "__open") || !strcmp(s, "open") || !strcmp(s, "open ")) {
                     tmp = (char*)(R_RDI);
                     snprintf(buff, 255, "%04d|%p: Calling %s(\"%s\", %d (,%d))", tid, *(void**)(R_RSP), s, (tmp)?tmp:"(nil)", (int)(R_ESI), (int)(R_EDX));
                     perr = 1;
-                } else  if(strstr(s, "my___printf_chk")) {
+                } else if (!strcmp(s, "fopen") || !strcmp(s, "fopen64")) {
+                    tmp = (char*)(R_RDI);
+                    snprintf(buff, 255, "%04d|%p: Calling %s(\"%s\", %d)", tid, *(void**)(R_RSP), s, (tmp)?tmp:"(nil)", (int)(R_ESI));
+                    perr = 2;
+                } else if (!strcmp(s, "__openat64") || !strcmp(s, "openat64") || !strcmp(s, "__openat64_2")) {
+                    tmp = (char*)(R_RSI);
+                    snprintf(buff, 255, "%04d|%p: Calling %s(%d, \"%s\", %d (,%d))", tid, *(void**)(R_RSP), s, (int)R_EDI, (tmp)?tmp:"(nil)", (int)(R_EDX), (int)(R_ECX));
+                    perr = 1;
+                } else if (strstr(s, "mkdir")==s) {
+                    tmp = (char*)(R_RDI);
+                    snprintf(buff, 255, "%04d|%p: Calling %s(\"%s\", %d)", tid, *(void**)(R_RSP), s, (tmp)?tmp:"(nil)", (int)(R_ESI));
+                    perr = 1;
+                } else if (strstr(s, "opendir")==s) {
+                    tmp = (char*)(R_RDI);
+                    snprintf(buff, 255, "%04d|%p: Calling %s(\"%s\")", tid, *(void**)(R_RSP), s, (tmp)?tmp:"(nil)");
+                    perr = 2;
+                } else if (!strcmp(s, "read")) {
+                    snprintf(buff, 255, "%04d|%p: Calling %s(%d, %p, %zu)", tid, *(void**)(R_RSP), s, R_EDI, (void*)R_RSI, R_RDX);
+                    perr = 1;
+                } else if (!strcmp(s, "write")) {
+                    snprintf(buff, 255, "%04d|%p: Calling %s(%d, %p, %zu)", tid, *(void**)(R_RSP), s, R_EDI, (void*)R_RSI, R_RDX);
+                    perr = 1;
+                } else if (strstr(s, "access")==s) {
+                    tmp = (char*)(R_RDI);
+                    snprintf(buff, 255, "%04d|%p: Calling %s(\"%s\", 0x%x)", tid, *(void**)(R_RSP), s, (tmp)?tmp:"(nil)", R_ESI);
+                    perr = 1;
+                } else if (!strcmp(s, "lseek64") || !strcmp(s, "my_lseek64")) {
+                    snprintf(buff, 255, "%04d|%p: Calling %s(%d, %ld, %d)", tid, *(void**)(R_RSP), s, (int)R_EDI, (int64_t)R_RSI, (int)R_EDX);
+                    perr = 1;
+                } else if (!strcmp(s, "lseek") || !strcmp(s, "my_lseek")) {
+                    snprintf(buff, 255, "%04d|%p: Calling %s(%d, %ld, %d)", tid, *(void**)(R_RSP), s, (int)R_EDI, (int64_t)R_RSI, (int)R_EDX);
+                    perr = 1;
+                } else if (strstr(s, "puts")==s) {
+                    tmp = (char*)(R_RDI);
+                    snprintf(buff, 255, "%04d|%p: Calling %s(\"%s\")", tid, *(void**)(R_RSP), s, (tmp)?tmp:"(nil)");
+                } else if (strstr(s, "strlen")==s) {
+                    tmp = (char*)(R_RDI);
+                    snprintf(buff, 255, "%04d|%p: Calling %s(\"%s\")", tid, *(void**)(R_RSP), s, (tmp)?tmp:"(nil)");
+                } else if (strstr(s, "strcmp")==s) {
+                    tmp = (char*)(R_RDI);
+                    snprintf(buff, 255, "%04d|%p: Calling %s(\"%s\", \"%s\")", tid, *(void**)(R_RSP), s, (tmp)?tmp:"(nil)", (char*)R_RSI);
+                } else if (strstr(s, "getenv")==s) {
+                    tmp = (char*)(R_RDI);
+                    snprintf(buff, 255, "%04d|%p: Calling %s(\"%s\")", tid, *(void**)(R_RSP), s, (tmp)?tmp:"(nil)");
+                } else if (!strcmp(s, "poll")) {
+                    struct pollfd* pfd = (struct pollfd*)(R_RDI);
+                    snprintf(buff, 255, "%04d|%p: Calling %s(%p[%d/%d/%d, ...], %d, %d)", tid, *(void**)(R_RSP), s, pfd, pfd->fd, pfd->events, pfd->revents, R_ESI, R_EDX);
+                } else if (strstr(s, "my___printf_chk") || !strcmp(s, "__printf_chk")) {
                     tmp = (char*)(R_RSI);
                     snprintf(buff, 255, "%04d|%p: Calling %s(%d, \"%s\" (,%p))", tid, *(void**)(R_RSP), s, R_EDI, (tmp)?tmp:"(nil)", (void*)(R_RDX));
-                } else  if(!strcmp(s, "sscanf")) {
+                } else if (strstr(s, "my___snprintf_chk") || !strcmp(s, "__snprintf_chk")) {
+                    tmp = (char*)(R_R8);
+                    pu64 = (uint64_t*)R_RDI;
+                    post = 3;
+                    snprintf(buff, 255, "%04d|%p: Calling %s(%p, %zu, %d, %zu, \"%s\" (,%p))", tid, *(void**)(R_RSP), s, (void*)R_RDI, R_RSI, R_EDX, R_RCX, (tmp)?tmp:"(nil)", (void*)(R_R9));
+                } else if (strstr(s, "my_snprintf") || !strcmp(s, "snprintf")) {
+                    tmp = (char*)(R_RDX);
+                    pu64 = (uint64_t*)R_RDI;
+                    post = 3;
+                    snprintf(buff, 255, "%04d|%p: Calling %s(%p, %zu, \"%s\" (,%p))", tid, *(void**)(R_RSP), s, (void*)R_RDI, R_RSI, (tmp)?tmp:"(nil)", (void*)(R_RCX));
+                } else if (!strcmp(s, "getcwd")) {
+                    post = 2;
+                    snprintf(buff, 255, "%04d|%p: Calling %s(%p, %zu)", tid, *(void**)(R_RSP), s, (void*)R_RDI, R_RSI);
+                } else if (!strcmp(s, "ftok")) {
+                    tmp = (char*)(R_RDI);
+                    perr = 1;
+                    snprintf(buff, 255, "%04d|%p: Calling %s(\"%s\", %d)", tid, *(void**)(R_RSP), s, tmp?tmp:"nil", R_ESI);
+                } else if (!strcmp(s, "glXGetProcAddress") || !strcmp(s, "SDL_GL_GetProcAddress") || !strcmp(s, "glXGetProcAddressARB")) {
+                    tmp = (char*)(R_RDI);
+                    snprintf(buff, 255, "%04d|%p: Calling %s(\"%s\")", tid, *(void**)(R_RSP), s, (tmp)?tmp:"(nil)");
+                } else if (!strcmp(s, "glLabelObjectEXT")) {
+                    tmp = (char*)(R_RCX);
+                    snprintf(buff, 255, "%04d|%p: Calling %s(0x%x, %d, %d, \"%s\")", tid, *(void**)(R_RSP), s, R_EDI, R_ESI, R_ECX, (tmp)?tmp:"(nil)");
+                } else if (!strcmp(s, "glGetStringi")) {
+                    post = 2;
+                    snprintf(buff, 255, "%04d|%p: Calling %s(0x%x, %d)", tid, *(void**)(R_RSP), s, R_EDI, R_ESI);
+                } else if (!strcmp(s, "glFramebufferTexture2D")) {
+                    snprintf(buff, 255, "%04d|%p: Calling %s(0x%x, 0x%x, 0x%x, %u, %d)", tid, *(void**)(R_RSP), s, R_EDI, R_ESI, R_EDX, R_ECX, R_R8d);
+                } else if (!strcmp(s, "glTexSubImage2D")) {
+                    snprintf(buff, 255, "%04d|%p: Calling %s(0x%x, %d, %d, %d, %d, %d, 0x%x, 0x%x, %p)", tid, *(void**)(R_RSP), s, R_EDI, R_ESI, R_EDX, R_ECX, R_R8d, R_R9d, *(uint32_t*)(R_RSP+8), *(uint32_t*)(R_RSP+16), *(void**)(R_RSP+24));
+                } else if (!strcmp(s, "glCompressedTexSubImage2D")) {
+                    snprintf(buff, 255, "%04d|%p: Calling %s(0x%x, %d, %d, %d, %d, %d, 0x%x, %d, %p)", tid, *(void**)(R_RSP), s, R_EDI, R_ESI, R_EDX, R_ECX, R_R8d, R_R9d, *(uint32_t*)(R_RSP+8), *(uint32_t*)(R_RSP+16), *(void**)(R_RSP+24));
+                } else if (!strcmp(s, "glVertexAttribPointer")) {
+                    snprintf(buff, 255, "%04d|%p: Calling %s(%u, %d, 0x%x, %d, %d, %p)", tid, *(void**)(R_RSP), s, R_EDI, R_ESI, R_EDX, R_ECX, R_R8d, (void*)R_R9);
+                } else if (!strcmp(s, "glDrawElements")) {
+                    snprintf(buff, 255, "%04d|%p: Calling %s(0x%x, %d, 0x%x, %p)", tid, *(void**)(R_RSP), s, R_EDI, R_ESI, R_EDX, (void*)R_RCX);
+                } else if (!strcmp(s, "glUniform4fv")) {
+                    snprintf(buff, 255, "%04d|%p: Calling %s(%d, %d, %p[%g/%g/%g/%g...])", tid, *(void**)(R_RSP), s, R_EDI, R_ESI, (void*)R_RDX, ((float*)(R_RDX))[0], ((float*)(R_RDX))[1], ((float*)(R_RDX))[2], ((float*)(R_RDX))[3]);
+                } else if (!strcmp(s, "mmap64") || !strcmp(s, "mmap")) {
+                    snprintf(buff, 255, "%04d|%p: Calling %s(%p, %lu, 0x%x, 0x%x, %d, %ld)", tid, *(void**)(R_RSP), s, 
+                        (void*)R_RDI, R_RSI, (int)(R_RDX), (int)R_RCX, (int)R_R8, R_R9);
+                } else if (!strcmp(s, "sscanf")) {
                     tmp = (char*)(R_RSI);
                     snprintf(buff, 255, "%04d|%p: Calling %s(%p, \"%s\" (,%p))", tid, *(void**)(R_RSP), s, (void*)R_RDI, (tmp)?tmp:"(nil)", (void*)(R_RDX));
+                } else if (!strcmp(s, "XCreateWindow")) {
+                    tmp = (char*)(R_RSI);
+                    snprintf(buff, 255, "%04d|%p: Calling %s(%p, %p, %d, %d, %u, %u, %u, %d, %u, %p, 0x%lx, %p)", tid, *(void**)(R_RSP), s, 
+                        (void*)R_RDI, (void*)R_RSI, (int)R_EDX, (int)R_ECX, R_R8d, R_R9d, 
+                        (uint32_t)*(uint64_t*)(R_RSP+8), (int)*(uint64_t*)(R_RSP+16), 
+                        (uint32_t)*(uint64_t*)(R_RSP+24), (void*)*(uint64_t*)(R_RSP+32), 
+                        (unsigned long)*(uint64_t*)(R_RSP+40), (void*)*(uint64_t*)(R_RSP+48));
                 } else {
                     snprintf(buff, 255, "%04d|%p: Calling %s(0x%lX, 0x%lX, 0x%lX, ...)", tid, *(void**)(R_RSP), s, R_RDI, R_RSI, R_RDX);
                 }
@@ -114,23 +210,23 @@ void x64Int3(x64emu_t* emu)
                 w(emu, addr);   // some function never come back, so unlock the mutex first!
                 pthread_mutex_lock(&emu->context->mutex_trace);
                 if(post)
-                    switch(post) {
-                    case 1: snprintf(buff2, 63, " [%d sec %d nsec]", pu32?pu32[0]:-1, pu32?pu32[1]:-1);
+                    switch(post) { // Only ever 2 for now...
+                    case 1: snprintf(buff2, 63, " [%llu sec %llu nsec]", pu64?pu64[0]:~0ull, pu64?pu64[1]:~0ull);
                             break;
                     case 2: snprintf(buff2, 63, "(%s)", R_RAX?((char*)R_RAX):"nil");
                             break;
-                    case 3: snprintf(buff2, 63, "(%s)", pu32?((char*)pu32):"nil");
+                    case 3: snprintf(buff2, 63, "(%s)", pu64?((char*)pu64):"nil");
                             break;
                     case 4: snprintf(buff2, 63, " (%f)", ST0.d);
                             break;
                     case 5: {
-                            uint32_t* p = (uint32_t*)R_RAX;
+                            uint32_t* p = (uint32_t*)R_RAX; // uint64_t? (case never used)
                             if(p)
-                                snprintf(buff2, 63, " size=%dx%d, pitch=%d, pixels=%p", p[2], p[3], p[4], p+5);
+                                snprintf(buff2, 63, " size=%ux%u, pitch=%u, pixels=%p", p[2], p[3], p[4], p+5);
                             else
                                 snprintf(buff2, 63, "NULL Surface");
-                            }
-                            break;
+                        }
+                        break;
                 }
                 if(perr==1 && ((int)R_EAX)<0)
                     snprintf(buff3, 63, " (errno=%d:\"%s\")", errno, strerror(errno));
@@ -143,7 +239,7 @@ void x64Int3(x64emu_t* emu)
         }
         return;
     }
-    if(my_context->signals[SIGTRAP])
+    if(0 && my_context->signals[SIGTRAP])
         raise(SIGTRAP);
     else
         printf_log(LOG_INFO, "%04d|Warning, ignoring unsupported Int 3 call @%p\n", GetTID(), (void*)R_RIP);
@@ -153,4 +249,4 @@ void x64Int3(x64emu_t* emu)
 int GetTID()
 {
     return syscall(SYS_gettid);
-}
+}

src/emu/x64primop.c

@@ -96,7 +96,7 @@
 *
 ****************************************************************************/
 
-// This has been heavily modified to fit box86 purpose...
+// This has been heavily modified to fit box64 purpose...
 #include <stdint.h>
 #include <stdlib.h>
 #include <string.h>
@@ -785,7 +785,7 @@ uint8_t rol8(x64emu_t *emu, uint8_t d, uint8_t s)
 	if((cnt = s % 8) != 0) {
 	d = (d << cnt) + ((d >> (8 - cnt)) & ((1 << cnt) - 1));
 	}
-	RESET_FLAGS(emu);
+	CHECK_FLAGS(emu);
 
 	/* OF flag is set if s == 1; OF = CF _XOR_ MSB of result */
 	if(s == 1) {
@@ -808,7 +808,7 @@ uint16_t rol16(x64emu_t *emu, uint16_t d, uint8_t s)
 	if((cnt = s % 16) != 0) {
 	d = (d << cnt) + ((d >> (16 - cnt)) & ((1 << cnt) - 1));
 	}
-	RESET_FLAGS(emu);
+	CHECK_FLAGS(emu);
 
 	/* OF flag is set if s == 1; OF = CF _XOR_ MSB of result */
 	if(s == 1) {
@@ -831,7 +831,7 @@ uint32_t rol32(x64emu_t *emu, uint32_t d, uint8_t s)
 	if((cnt = s % 32) != 0) {
 	d = (d << cnt) + ((d >> (32 - cnt)) & ((1 << cnt) - 1));
 	}
-	RESET_FLAGS(emu);
+	CHECK_FLAGS(emu);
 
 	/* OF flag is set if s == 1; OF = CF _XOR_ MSB of result */
 	if(s == 1) {
@@ -854,7 +854,7 @@ uint64_t rol64(x64emu_t *emu, uint64_t d, uint8_t s)
 	if((cnt = s % 64) != 0) {
 	d = (d << cnt) + ((d >> (64 - cnt)) & ((1L << cnt) - 1));
 	}
-	RESET_FLAGS(emu);
+	CHECK_FLAGS(emu);
 
 	/* OF flag is set if s == 1; OF = CF _XOR_ MSB of result */
 	if(s == 1) {
@@ -881,7 +881,7 @@ uint8_t ror8(x64emu_t *emu, uint8_t d, uint8_t s)
 	if((cnt = s % 8) != 0) {
 	d = (d << (8 - cnt)) + ((d >> (cnt)) & ((1 << (8 - cnt)) - 1));
 	}
-	RESET_FLAGS(emu);
+	CHECK_FLAGS(emu);
 
 	/* OF flag is set if s == 1; OF = MSB _XOR_ (M-1)SB of result */
 	if(s == 1) {
@@ -904,7 +904,7 @@ uint16_t ror16(x64emu_t *emu, uint16_t d, uint8_t s)
 	if((cnt = s % 16) != 0) {
 	d = (d << (16 - cnt)) + ((d >> (cnt)) & ((1 << (16 - cnt)) - 1));
 	}
-	RESET_FLAGS(emu);
+	CHECK_FLAGS(emu);
 
 	/* OF flag is set if s == 1; OF = MSB _XOR_ (M-1)SB of result */
 	if(s == 1) {
@@ -927,7 +927,7 @@ uint32_t ror32(x64emu_t *emu, uint32_t d, uint8_t s)
 	if((cnt = s % 32) != 0) {
 	d = (d << (32 - cnt)) + ((d >> (cnt)) & ((1 << (32 - cnt)) - 1));
 	}
-	RESET_FLAGS(emu);
+	CHECK_FLAGS(emu);
 
 	/* OF flag is set if s == 1; OF = MSB _XOR_ (M-1)SB of result */
 	if(s == 1) {
@@ -950,7 +950,7 @@ uint64_t ror64(x64emu_t *emu, uint64_t d, uint8_t s)
 	if((cnt = s % 64) != 0) {
 	d = (d << (64 - cnt)) + ((d >> (cnt)) & ((1L << (64 - cnt)) - 1L));
 	}
-	RESET_FLAGS(emu);
+	CHECK_FLAGS(emu);
 
 	/* OF flag is set if s == 1; OF = MSB _XOR_ (M-1)SB of result */
 	if(s == 1) {
@@ -1400,7 +1400,7 @@ void idiv64(x64emu_t *emu, uint64_t s)
 	}
 	quot = dvd/(int64_t)s;
 	mod = dvd%(int64_t)s;
-	if (llabs(quot) > 0x7fffffffffffffffL) {
+	if ((quot > 0x7fffffffffffffffLL) || (quot < -0x7fffffffffffffffLL)) {
 		INTR_RAISE_DIV0(emu);
 		return;
 	}

src/emu/x64primop.h

@@ -235,21 +235,25 @@ static inline uint64_t neg64(x64emu_t *emu, uint64_t s)
 
 static inline uint8_t not8(x64emu_t *emu, uint8_t s)
 {
+	(void)emu; // No flags affected
 	return ~s;
 }
 
 static inline uint16_t not16(x64emu_t *emu, uint16_t s)
 {
+	(void)emu; // No flags affected
 	return ~s;
 }
 
 static inline uint32_t not32(x64emu_t *emu, uint32_t s)
 {
+	(void)emu; // No flags affected
 	return ~s;
 }
 
 static inline uint64_t not64(x64emu_t *emu, uint64_t s)
 {
+	(void)emu; // No flags affected
 	return ~s;
 }
 
@@ -353,8 +357,6 @@ static inline uint16_t shr16(x64emu_t *emu, uint16_t d, uint8_t s)
 
 static inline uint32_t shr32(x64emu_t *emu, uint32_t d, uint8_t s)
 {
-	RESET_FLAGS(emu);	// TODO: Defered this one?
-
 	emu->df = d_shr32;
 	emu->op1.u32 = d;
 
@@ -367,8 +369,6 @@ static inline uint32_t shr32(x64emu_t *emu, uint32_t d, uint8_t s)
 
 static inline uint64_t shr64(x64emu_t *emu, uint64_t d, uint8_t s)
 {
-	RESET_FLAGS(emu);	// TODO: Defered this one?
-
 	emu->df = d_shr64;
 	emu->op1.u64 = d;
 
@@ -592,7 +592,7 @@ static inline void mul32_eax(x64emu_t *emu, uint32_t s)
 static inline void mul64_rax(x64emu_t *emu, uint64_t s)
 {
 	emu->df = d_mul64;
-	__int128 res = (__int128)R_RAX * s;
+	unsigned __int128 res = (unsigned __int128)R_RAX * s;
 	emu->res.u64 = R_RAX = (uint64_t)res;
 	emu->op1.u64 = R_RDX = (uint64_t)(res >> 64);
 }

src/emu/x64run.c

@@ -46,9 +46,14 @@ int Run(x64emu_t *emu, int step)
 
     if(emu->quit)
         return 0;
+    if(R_RIP==0) {
+        emu->quit = 1;
+        printf_log(LOG_INFO, "Ask to run at NULL, quit silently\n");
+        return 0;
+    }
 
     //ref opcode: http://ref.x64asm.net/geek32.html#xA1
-    printf_log(LOG_DEBUG, "Run X86 (%p), RIP=%p, Stack=%p\n", emu, (void*)R_RIP, emu->context->stack);
+    printf_log(LOG_DEBUG, "Run X86 (%p), RIP=%p, Stack=%p\n", emu, (void*)R_RIP, (void*)R_RSP);
 
 x64emurun:
 
@@ -70,6 +75,8 @@ x64emurun:
             rep = opcode-0xF1;
             opcode = F8;
         }
+        while((opcode==0x3E))   //Branch Taken Hint ignored
+            opcode = F8;
         rex.rex = 0;
         while(opcode>=0x40 && opcode<=0x4f) {
             rex.rex = opcode;
@@ -156,6 +163,9 @@ x64emurun:
         GO(0x30, xor)                   /* XOR 0x30 -> 0x35 */
         #undef GO
 
+        case 0x36:          /* SS: (ignored) */
+            break;
+
         case 0x38:
             nextop = F8;
             GETEB(0);
@@ -234,19 +244,26 @@ x64emurun:
                 GD->sq[0] = ED->sdword[0];
             else
                 if(MODREG)
-                    GD->q[0] = ED->sdword[0];
+                    GD->q[0] = ED->dword[0];    // not really a sign extension
                 else
                     GD->sdword[0] = ED->sdword[0];  // meh?
             break;
         case 0x64:                      /* FS: prefix */
-            if(Run64(emu, rex)) {
+            if(Run64(emu, rex, _FS)) {
+                unimp = 1;
+                goto fini;
+            }
+            if(emu->quit)
+                goto fini;
+            break;
+        case 0x65:                      /* GS: prefix */
+            if(Run64(emu, rex, _GS)) {
                 unimp = 1;
                 goto fini;
             }
             if(emu->quit)
                 goto fini;
             break;
-
         case 0x66:                      /* 16bits prefix */
             if(Run66(emu, rex, rep)) {
                 unimp = 1;
@@ -256,7 +273,7 @@ x64emurun:
                 goto fini;
             break;
         case 0x67:                      /* reduce EASize prefix */
-            if(Run67(emu, rex)) {
+            if(Run67(emu, rex, rep)) {
                 unimp = 1;
                 goto fini;
             }
@@ -274,10 +291,7 @@ x64emurun:
             if(rex.w)
                 GD->q[0] = imul64(emu, ED->q[0], tmp64u);
             else
-                if((nextop&0xC0)==0xC0)
-                    GD->q[0] = imul32(emu, ED->dword[0], tmp64u);
-                else
-                    GD->dword[0] = imul32(emu, ED->dword[0], tmp64u);
+                GD->q[0] = imul32(emu, ED->dword[0], tmp64u);
             break;
         case 0x6A:                      /* Push Ib */
             tmp64s = F8S;
@@ -293,6 +307,15 @@ x64emurun:
             else
                 GD->q[0] = imul32(emu, ED->dword[0], (uint32_t)tmp64s);
             break;
+        case 0x6C:                      /* INSB DX */
+        case 0x6D:                      /* INSL DX */
+        case 0x6E:                      /* OUTSB DX */
+        case 0x6F:                      /* OUTSL DX */
+            // this is a privilege opcode...
+            --R_RIP;
+            emit_signal(emu, SIGSEGV, (void*)R_RIP, 0);
+            STEP;
+            break;
 
         GOCOND(0x70
             ,   tmp8s = F8S; CHECK_FLAGS(emu);
@@ -325,7 +348,7 @@ x64emurun:
                 tmp32s = F8S;
             }
             if(rex.w) {
-                tmp64u = (uint64_t)tmp32s;
+                tmp64u = (uint64_t)(int64_t)tmp32s;
                 switch((nextop>>3)&7) {
                     case 0: ED->q[0] = add64(emu, ED->q[0], tmp64u); break;
                     case 1: ED->q[0] =  or64(emu, ED->q[0], tmp64u); break;
@@ -383,7 +406,7 @@ x64emurun:
 #ifdef DYNAREC
             GETEB(0);
             GETGB;
-            if((nextop&0xC0)==0xC0) { // reg / reg: no lock
+            if(MODREG) { // reg / reg: no lock
                 tmp8u = GB;
                 GB = EB->byte[0];
                 EB->byte[0] = tmp8u;
@@ -397,12 +420,12 @@ x64emurun:
 #else
             GETEB(0);
             GETGB;
-            if((nextop&0xC0)!=0xC0)
+            if(!MODREG)
                 pthread_mutex_lock(&emu->context->mutex_lock); // XCHG always LOCK (but when accessing memory only)
             tmp8u = GB;
             GB = EB->byte[0];
             EB->byte[0] = tmp8u;
-            if((nextop&0xC0)!=0xC0)
+            if(!MODREG)
                 pthread_mutex_unlock(&emu->context->mutex_lock);
 #endif                
             break;
@@ -411,7 +434,7 @@ x64emurun:
 #ifdef DYNAREC
             GETED(0);
             GETGD;
-            if((nextop&0xC0)==0xC0) {
+            if(MODREG) {
                 if(rex.w) {
                     tmp64u = GD->q[0];
                     GD->q[0] = ED->q[0];
@@ -487,7 +510,14 @@ x64emurun:
             else
                 GD->q[0] = ED->dword[0];
             break;
-
+        case 0x8C:                      /* MOV Ed, Seg */
+            nextop = F8;
+            GETED(0);
+            if(MODREG)
+                ED->q[0] = emu->segs[((nextop&0x38)>>3)];
+            else
+                ED->word[0] = emu->segs[((nextop&0x38)>>3)];
+            break;
         case 0x8D:                      /* LEA Gd,M */
             nextop = F8;
             GETED(0);
@@ -495,7 +525,7 @@ x64emurun:
             if(rex.w)
                 GD->q[0] = (uint64_t)ED;
             else
-                GD->q[0] = (uint32_t)(uintptr_t)ED;
+                GD->q[0] = ((uintptr_t)ED)&0xffffffff;
             break;
 
         case 0x8F:                      /* POP Ed */
@@ -510,7 +540,26 @@ x64emurun:
                 R_ESP += sizeof(void*);
             }
             break;
-        case 0x90:                      /* NOP */
+        case 0x90:                      /* NOP or XCHG R8, RAX*/
+        case 0x91:
+        case 0x92:
+        case 0x93:
+        case 0x94:
+        case 0x95:
+        case 0x96:
+        case 0x97:                      /* XCHG reg,EAX */
+            tmp8u = _AX+(opcode&7)+(rex.b<<3);
+            if(tmp8u!=_AX) {
+                if(rex.w) {
+                    tmp64u = R_RAX;
+                    R_RAX = emu->regs[tmp8u].q[0];
+                    emu->regs[tmp8u].q[0] = tmp64u;
+                } else {
+                    tmp64u = R_EAX;
+                    R_RAX = emu->regs[tmp8u].dword[0];
+                    emu->regs[tmp8u].q[0] = tmp64u;
+                }
+            }
             break;
 
         case 0x98:                      /* CWDE */
@@ -538,7 +587,38 @@ x64emurun:
             emu->eflags.x64 = ((Pop(emu) & 0x3F7FD7)/* & (0xffff-40)*/ ) | 0x2; // mask off res2 and res3 and on res1
             RESET_FLAGS(emu);
             break;
-
+        case 0x9E:                      /* SAHF */
+            CHECK_FLAGS(emu);
+            tmp8u = emu->regs[_AX].byte[1];
+            CONDITIONAL_SET_FLAG(tmp8u&0x01, F_CF);
+            CONDITIONAL_SET_FLAG(tmp8u&0x04, F_PF);
+            CONDITIONAL_SET_FLAG(tmp8u&0x10, F_AF);
+            CONDITIONAL_SET_FLAG(tmp8u&0x40, F_ZF);
+            CONDITIONAL_SET_FLAG(tmp8u&0x80, F_SF);
+            RESET_FLAGS(emu);
+            break;
+        case 0x9F:                      /* LAHF */
+            CHECK_FLAGS(emu);
+            R_AH = (uint8_t)emu->eflags.x64;
+            break;
+        case 0xA0:                      /* MOV AL,Ob */
+            R_AL = *(uint8_t*)F64;
+            break;
+        case 0xA1:                      /* MOV EAX,Od */
+            if(rex.w)
+                R_RAX = *(uint64_t*)F64;
+            else
+                R_RAX = *(uint32_t*)F64;
+            break;
+        case 0xA2:                      /* MOV Ob,AL */
+            *(uint8_t*)F64 = R_AL;
+            break;
+        case 0xA3:                      /* MOV Od,EAX */
+            if(rex.w)
+                *(uint64_t*)F64 = R_RAX;
+            else
+                *(uint32_t*)F64 = R_EAX;
+            break;
         case 0xA4:                      /* MOVSB */
             tmp8s = ACCESS_FLAG(F_DF)?-1:+1;
             tmp64u = (rep)?R_RCX:1L;
@@ -889,7 +969,6 @@ x64emurun:
             else
                 emu->regs[(opcode&7)+(rex.b<<3)].q[0] = F32;
             break;
-
         case 0xC0:                      /* GRP2 Eb,Ib */
             nextop = F8;
             GETEB(1);
@@ -945,7 +1024,12 @@ x64emurun:
                     }
             }
             break;
-
+        case 0xC2:                      /* RETN Iw */
+            tmp16u = F16;
+            R_RIP = Pop(emu);
+            R_RSP += tmp16u;
+            STEP
+            break;
         case 0xC3:                      /* RET */
             R_RIP = Pop(emu);
             STEP
@@ -991,7 +1075,26 @@ x64emurun:
             x64Int3(emu);
             if(emu->quit) goto fini;
             break;
+        case 0xCD:                      /* INT n */
+            // this is a privilege opcode...
+            --R_RIP;
+            emit_signal(emu, SIGSEGV, (void*)R_RIP, 0);
+            STEP;
+            break;
 
+
+        case 0xCF:                      /* IRET */
+            R_RIP = Pop(emu);
+            emu->segs[_CS] = Pop(emu)&0xffff;
+            emu->segs_serial[_CS] = 0;
+            emu->eflags.x64 = ((Pop(emu) & 0x3F7FD7)/* & (0xffff-40)*/ ) | 0x2; // mask off res2 and res3 and on res1
+            tmp64u = Pop(emu);  //RSP
+            emu->segs[_SS] = Pop(emu)&0xffff;
+            emu->segs_serial[_SS] = 0;
+            R_RSP= tmp64u;
+            RESET_FLAGS(emu);
+            goto fini;      // exit, to recompute CS if needed
+            break;
         case 0xD0:                      /* GRP2 Eb,1 */
         case 0xD2:                      /* GRP2 Eb,CL */
             nextop = F8;
@@ -1085,7 +1188,14 @@ x64emurun:
             if(emu->quit)
                 goto fini;
             break;
-
+        case 0xDC:                      /* x87 opcodes */
+            if(RunDC(emu, rex)) {
+                unimp = 1;
+                goto fini;
+            }
+            if(emu->quit)
+                goto fini;
+            break;
         case 0xDD:                      /* x87 opcodes */
             if(RunDD(emu, rex)) {
                 unimp = 1;
@@ -1094,7 +1204,14 @@ x64emurun:
             if(emu->quit)
                 goto fini;
             break;
-
+        case 0xDE:                      /* x87 opcodes */
+            if(RunDE(emu, rex)) {
+                unimp = 1;
+                goto fini;
+            }
+            if(emu->quit)
+                goto fini;
+            break;
         case 0xDF:                      /* x87 opcodes */
             if(RunDF(emu, rex)) {
                 unimp = 1;
@@ -1103,7 +1220,44 @@ x64emurun:
             if(emu->quit)
                 goto fini;
             break;
-
+        case 0xE0:                      /* LOOPNZ */
+            CHECK_FLAGS(emu);
+            tmp8s = F8S;
+            --R_RCX; // don't update flags
+            if(R_RCX && !ACCESS_FLAG(F_ZF))
+                R_RIP += tmp8s;
+            STEP
+            break;
+        case 0xE1:                      /* LOOPZ */
+            CHECK_FLAGS(emu);
+            tmp8s = F8S;
+            --R_RCX; // don't update flags
+            if(R_RCX && ACCESS_FLAG(F_ZF))
+                R_RIP += tmp8s;
+            STEP
+            break;
+        case 0xE2:                      /* LOOP */
+            tmp8s = F8S;
+            --R_RCX; // don't update flags
+            if(R_RCX)
+                R_RIP += tmp8s;
+            STEP
+            break;
+        case 0xE3:                      /* JECXZ */
+            tmp8s = F8S;
+            if(!R_RCX)
+                R_RIP += tmp8s;
+            STEP
+            break;
+        case 0xE4:                      /* IN AL, XX */
+        case 0xE5:                      /* IN EAX, XX */
+        case 0xE6:                      /* OUT XX, AL */
+        case 0xE7:                      /* OUT XX, EAX */
+            // this is a privilege opcode...
+            --R_RIP;
+            emit_signal(emu, SIGSEGV, (void*)R_RIP, 0);
+            STEP;
+            break;
         case 0xE8:                      /* CALL Id */
             tmp32s = F32S; // call is relative
             Push(emu, R_RIP);
@@ -1121,7 +1275,15 @@ x64emurun:
             R_RIP += tmp32s;
             STEP
             break;
-
+        case 0xEC:                      /* IN AL, DX */
+        case 0xED:                      /* IN EAX, DX */
+        case 0xEE:                      /* OUT DX, AL */
+        case 0xEF:                      /* OUT DX, EAX */
+            // this is a privilege opcode...
+            --R_RIP;
+            emit_signal(emu, SIGSEGV, (void*)R_RIP, 0);
+            STEP;
+            break;
         case 0xF0:                      /* LOCK prefix */
             if(RunF0(emu, rex)) {
                 unimp = 1;
@@ -1131,6 +1293,16 @@ x64emurun:
                 goto fini;
             break;
 
+        case 0xF4:                      /* HLT */
+            // this is a privilege opcode...
+            --R_RIP;
+            emit_signal(emu, SIGSEGV, (void*)R_RIP, 0);
+            STEP;
+            break;
+        case 0xF5:                      /* CMC */
+            CHECK_FLAGS(emu);
+            CONDITIONAL_SET_FLAG(!ACCESS_FLAG(F_CF), F_CF);
+            break;
         case 0xF6:                      /* GRP3 Eb(,Ib) */
             nextop = F8;
             tmp8u = (nextop>>3)&7;
@@ -1220,18 +1392,17 @@ x64emurun:
                         break;
                     case 6:                 /* DIV Ed */
                         div32(emu, ED->dword[0]);
-                        emu->regs[_AX].dword[1] = 0;
-                        emu->regs[_DX].dword[1] = 0;
+                        //emu->regs[_AX].dword[1] = 0;  // already put high regs to 0
+                        //emu->regs[_DX].dword[1] = 0;
                         break;
                     case 7:                 /* IDIV Ed */
                         idiv32(emu, ED->dword[0]);
-                        emu->regs[_AX].dword[1] = 0;
-                        emu->regs[_DX].dword[1] = 0;
+                        //emu->regs[_AX].dword[1] = 0;
+                        //emu->regs[_DX].dword[1] = 0;
                         break;
                 }
             }
             break;
-
         case 0xF8:                      /* CLC */
             CHECK_FLAGS(emu);
             CLEAR_FLAG(F_CF);
@@ -1241,10 +1412,16 @@ x64emurun:
             SET_FLAG(F_CF);
             break;
         case 0xFA:                      /* CLI */
-            CLEAR_FLAG(F_IF);   //not really handled...
+            // this is a privilege opcode...
+            --R_RIP;
+            emit_signal(emu, SIGSEGV, (void*)R_RIP, 0);
+            STEP;
             break;
         case 0xFB:                      /* STI */
-            SET_FLAG(F_IF);
+            // this is a privilege opcode...
+            --R_RIP;
+            emit_signal(emu, SIGSEGV, (void*)R_RIP, 0);
+            STEP;
             break;
         case 0xFC:                      /* CLD */
             CLEAR_FLAG(F_DF);
@@ -1274,14 +1451,22 @@ x64emurun:
                 case 0:                 /* INC Ed */
                     if(rex.w)
                         ED->q[0] = inc64(emu, ED->q[0]);
-                    else
-                        ED->q[0] = inc32(emu, ED->dword[0]);
+                    else {
+                        if(MODREG)
+                            ED->q[0] = inc32(emu, ED->dword[0]);
+                        else
+                            ED->dword[0] = inc32(emu, ED->dword[0]);
+                    }
                     break;
                 case 1:                 /* DEC Ed */
                     if(rex.w)
                         ED->q[0] = dec64(emu, ED->q[0]);
-                    else
-                        ED->q[0] = dec32(emu, ED->dword[0]);
+                    else {
+                        if(MODREG)
+                            ED->q[0] = dec32(emu, ED->dword[0]);
+                        else
+                            ED->dword[0] = dec32(emu, ED->dword[0]);
+                    }
                     break;
                 case 2:                 /* CALL NEAR Ed */
                     tmp64u = (uintptr_t)getAlternate((void*)ED->q[0]);
@@ -1290,16 +1475,16 @@ x64emurun:
                     STEP
                     break;
                 case 3:                 /* CALL FAR Ed */
-                    if(nextop>0xC0) {
+                    if(MODREG) {
                         R_RIP = emu->old_ip;
                         printf_log(LOG_NONE, "Illegal Opcode %p: %02X %02X %02X %02X\n", (void*)R_RIP, opcode, nextop, PK(2), PK(3));
                         emu->quit=1;
                         emu->error |= ERR_ILLEGAL;
                         goto fini;
                     } else {
-                        Push16(emu, R_CS);
+                        Push(emu, R_CS);
                         Push(emu, R_RIP);
-                        R_RIP = ED->dword[0];
+                        R_RIP = (uintptr_t)getAlternate((void*)ED->q[0]);   // check CS?
                         R_CS = (ED+1)->word[0];
                         goto fini;  // exit loop to recompute new CS...
                     }
@@ -1309,16 +1494,15 @@ x64emurun:
                     STEP
                     break;
                 case 5:                 /* JMP FAR Ed */
-                    if(nextop>0xc0) {
+                    if(MODREG) {
                         R_RIP = emu->old_ip;
                         printf_log(LOG_NONE, "Illegal Opcode %p: 0x%02X 0x%02X %02X %02X\n", (void*)R_RIP, opcode, nextop, PK(2), PK(3));
                         emu->quit=1;
                         emu->error |= ERR_ILLEGAL;
                         goto fini;
                     } else {
-                        R_RIP = ED->q[0];
+                        R_RIP = (uintptr_t)getAlternate((void*)ED->q[0]);   //check CS?
                         R_CS = (ED+1)->word[0];
-                        STEP
                         goto fini;  // exit loop to recompute CS...
                     }
                     break;
@@ -1342,6 +1526,7 @@ x64emurun:
 
 
 fini:
+    printf_log(LOG_DEBUG, "End of X86 run (%p), RIP=%p, Stack=%p, unimp=%d, emu->fork=%d, emu->uc_link=%p, emu->quit=%d\n", emu, (void*)R_RIP, (void*)R_RSP, unimp, emu->fork, emu->uc_link, emu->quit);
     if(unimp) {
         R_RIP = emu->old_ip;
         emu->quit = 1;

src/emu/x64run0f.c

@@ -22,6 +22,7 @@
 #include "bridge.h"
 #include "signals.h"
 #ifdef DYNAREC
+#include "custommem.h"
 #include "../dynarec/arm64_lock.h"
 #endif
 
@@ -38,7 +39,7 @@ int Run0F(x64emu_t *emu, rex_t rex)
     uint64_t tmp64u, tmp64u2;
     reg64_t *oped, *opgd;
     sse_regs_t *opex, *opgx, eax1;
-    mmx87_regs_t *opem, *opgm;
+    mmx87_regs_t *opem, *opgm, eam1;
 
     opcode = F8;
 
@@ -47,18 +48,46 @@ int Run0F(x64emu_t *emu, rex_t rex)
         case 0x05:                      /* SYSCALL */
             x64Syscall(emu);
             break;
+        case 0x06:                      /* CLTS */
+            // this is a privilege opcode...
+            R_RIP-=2;
+            emit_signal(emu, SIGSEGV, (void*)R_RIP, 0);
+            break;
+
+        case 0x08:                      /* INVD */
+        case 0x09:                      /* WBINVD */
+            // this is a privilege opcode...
+            R_RIP-=2;
+            emit_signal(emu, SIGSEGV, (void*)R_RIP, 0);
+            break;
+
+        case 0x0B:                      /* UD2 */
+            emit_signal(emu, SIGILL, (void*)R_RIP, 0);
+            break;
+
+        case 0x0D:
+            nextop = F8;
+            GETED(0);
+            switch((nextop>>3)&7) {
+                case 1: //PREFETCHW
+                    __builtin_prefetch((void*)ED, 1, 0);
+                    break;
+                default:    //???
+                    return 1;
+            }
+            break;
 
         case 0x10:                      /* MOVUPS Gx,Ex */
             nextop = F8;
             GETEX(0);
             GETGX;
-            memcpy(GX, EX, 16); // unaligned, so carreful
+            GX->u128 = EX->u128;
             break;
         case 0x11:                      /* MOVUPS Ex,Gx */
             nextop = F8;
             GETEX(0);
             GETGX;
-            memcpy(EX, GX, 16); // unaligned, so carreful
+            EX->u128 = GX->u128;
             break;
         case 0x12:                      
             nextop = F8;
@@ -104,11 +133,35 @@ int Run0F(x64emu_t *emu, rex_t rex)
             GETGX;
             EX->q[0] = GX->q[1];
             break;
+        case 0x18:                       /* PREFETCHh Ed */
+            nextop = F8;
+            GETED(0);
+            if(MODREG) {
+            } else
+            switch((nextop>>3)&7) {
+                case 0: //PREFETCHnta
+                case 1: //PREFETCH1
+                case 2: //PREFETCH2
+                case 3: //PREFETCH3
+                    __builtin_prefetch((void*)ED, 0, 0); // ignoring wich level of cache
+                    break;
+                default:    //NOP
+                    break;
+            }
+            break;
 
         case 0x1F:                      /* NOP (multi-byte) */
             nextop = F8;
             GETED(0);
             break;
+        case 0x20:                      /* MOV REG, crX */
+        case 0x21:                      /* MOV REG, drX */
+        case 0x22:                      /* MOV cxR, REG */
+        case 0x23:                      /* MOV drX, REG */
+            // this is a privilege opcode...
+            R_RIP-=2;
+            emit_signal(emu, SIGSEGV, (void*)R_RIP, 0);
+            break;
 
         case 0x28:                      /* MOVAPS Gx,Ex */
             nextop = F8;
@@ -188,6 +241,75 @@ int Run0F(x64emu_t *emu, rex_t rex)
             CLEAR_FLAG(F_OF); CLEAR_FLAG(F_AF); CLEAR_FLAG(F_SF);
             break;
 
+        case 0x31:                   /* RDTSC */
+            tmp64u = ReadTSC(emu);
+            R_RDX = tmp64u>>32;
+            R_RAX = tmp64u&0xFFFFFFFF;
+            break;
+
+        case 0x38:  // these are some SSE3 opcodes
+            opcode = F8;
+            switch(opcode) {
+                case 0x00:  /* PSHUFB */
+                    nextop = F8;
+                    GETEM(0);
+                    GETGM;
+                    eam1 = *GM;
+                    for (int i=0; i<8; ++i) {
+                        if(EM->ub[i]&128)
+                            GM->ub[i] = 0;
+                        else
+                            GM->ub[i] = eam1.ub[EM->ub[i]&7];
+                    }
+                    break;
+                case 0x04:  /* PMADDUBSW Gm,Em */
+                    nextop = F8;
+                    GETEM(0);
+                    GETGM;
+                    for (int i=0; i<4; ++i) {
+                        tmp32s = (int32_t)(GM->ub[i*2+0])*EM->sb[i*2+0] + (int32_t)(GM->ub[i*2+1])*EM->sb[i*2+1];
+                        GM->sw[i] = (tmp32s>32767)?32767:((tmp32s<-32768)?-32768:tmp32s);
+                    }
+                    break;
+                case 0x0B:  /* PMULHRSW Gm, Em */
+                    nextop = F8;
+                    GETEM(0);
+                    GETGM;
+                    for (int i=0; i<4; ++i) {
+                        tmp32s = ((((int32_t)(GM->sw[i])*(int32_t)(EM->sw[i]))>>14) + 1)>>1;
+                        GM->uw[i] = tmp32s&0xffff;
+                    }
+                    break;
+
+                case 0x1C:  /* PABSB Gm, Em */
+                    nextop = F8;
+                    GETEM(0);
+                    GETGM;
+                    for (int i=0; i<8; ++i) {
+                        GM->sb[i] = abs(EM->sb[i]);
+                    }
+                    break;
+                case 0x1D:  /* PABSW Gm, Em */
+                    nextop = F8;
+                    GETEM(0);
+                    GETGM;
+                    for (int i=0; i<4; ++i) {
+                        GM->sw[i] = abs(EM->sw[i]);
+                    }
+                    break;
+                case 0x1E:  /* PABSD Gm, Em */
+                    nextop = F8;
+                    GETEM(0);
+                    GETGM;
+                    for (int i=0; i<2; ++i) {
+                        GM->sd[i] = abs(EM->sd[i]);
+                    }
+                    break;
+
+                default:
+                    return 1;
+            }
+            break;
 
         GOCOND(0x40
             , nextop = F8;
@@ -202,7 +324,7 @@ int Run0F(x64emu_t *emu, rex_t rex)
             nextop = F8;
             GETEX(0);
             GETGD;
-            GD->dword[0] = 0;
+            GD->q[0] = 0;
             for(int i=0; i<4; ++i)
                 GD->dword[0] |= ((EX->ud[i]>>31)&1)<<i;
             break;
@@ -443,13 +565,103 @@ int Run0F(x64emu_t *emu, rex_t rex)
                     GM->sw[2+i] = (EM->sd[i]<-32768)?-32768:((EM->sd[i]>32767)?32767:EM->sd[i]);
             break;
 
+        case 0x6E:                      /* MOVD Gm, Ed */
+            nextop = F8;
+            GETED(0);
+            GETGM;
+            if(rex.w)
+                GM->q = ED->q[0];
+            else
+                GM->q = ED->dword[0];    // zero extended
+            break;
         case 0x6F:                      /* MOVQ Gm, Em */
             nextop = F8;
             GETEM(0);
             GETGM;
             GM->q = EM->q;
             break;
-
+        case 0x70:                       /* PSHUFW Gm, Em, Ib */
+            nextop = F8;
+            GETEM(1);
+            GETGM;
+            tmp8u = F8;
+            if(EM==GM) {eam1 = *GM; EM = &eam1;}   // copy is needed
+            for(int i=0; i<4; ++i)
+                GM->uw[i] = EM->uw[(tmp8u>>(i*2))&3];
+            break;
+        case 0x71:  /* GRP */
+            nextop = F8;
+            GETEM(1);
+            tmp8u = F8;
+            switch((nextop>>3)&7) {
+                case 2:                 /* PSRLW Em, Ib */
+                    if(tmp8u>15)
+                        {EM->q = 0;}
+                    else
+                        for (int i=0; i<4; ++i) EM->uw[i] >>= tmp8u;
+                    break;
+                case 4:                 /* PSRAW Em, Ib */
+                    if(tmp8u>15) tmp8u = 15;
+                    for (int i=0; i<4; ++i) EM->sw[i] >>= tmp8u;
+                    break;
+                case 6:                 /* PSLLW Em, Ib */
+                    if(tmp8u>15)
+                        {EM->q = 0;}
+                    else
+                        for (int i=0; i<4; ++i) EM->uw[i] <<= tmp8u;
+                    break;
+                default:
+                    return 1;
+            }
+            break;
+        case 0x72:  /* GRP */
+            nextop = F8;
+            GETEM(1);
+            switch((nextop>>3)&7) {
+                case 2:                 /* PSRLD Em, Ib */
+                    tmp8u = F8;
+                    if(tmp8u>31)
+                        {EM->q = 0;}
+                    else
+                        for (int i=0; i<2; ++i) EM->ud[i] >>= tmp8u;
+                    break;
+                case 4:                 /* PSRAD Em, Ib */
+                    tmp8u = F8;
+                    for (int i=0; i<2; ++i) EM->sd[i] >>= tmp8u;
+                    break;
+                case 6:                 /* PSLLD Em, Ib */
+                    tmp8u = F8;
+                    if(tmp8u>31)
+                        {EM->q = 0;}
+                    else
+                        for (int i=0; i<2; ++i) EM->ud[i] <<= tmp8u;
+                    break;
+                default:
+                    return 1;
+            }
+            break;
+        case 0x73:  /* GRP */
+            nextop = F8;
+            GETEM(1);
+            switch((nextop>>3)&7) {
+                case 2:                 /* PSRLQ Em, Ib */
+                    tmp8u = F8;
+                    if(tmp8u>63)
+                        {EM->q = 0;}
+                    else
+                        {EM->q >>= tmp8u;}
+                    break;
+                case 6:                 /* PSLLQ Em, Ib */
+                    tmp8u = F8;
+                    if(tmp8u>63)
+                        {EM->q = 0;}
+                    else
+                        {EM->q <<= tmp8u;}
+                    break;
+                default:
+                    return 1;
+            }
+            break;
         case 0x74:                       /* PCMPEQB Gm,Em */
             nextop = F8;
             GETEM(0);
@@ -486,8 +698,12 @@ int Run0F(x64emu_t *emu, rex_t rex)
             GETGM;
             if(rex.w)
                 ED->q[0] = GM->q;
-            else
-                ED->q[0] = GM->ud[0];
+            else {
+                if(MODREG)
+                    ED->q[0] = GM->ud[0];
+                else
+                    ED->dword[0] = GM->ud[0];
+            }
             break;
         case 0x7F:                      /* MOVQ Em, Gm */
             nextop = F8;
@@ -516,19 +732,19 @@ int Run0F(x64emu_t *emu, rex_t rex)
             nextop = F8;
             GETED(0);
             GETGD;
-            tmp8u = GD->byte[0];
+            tmp32s = GD->sdword[0];
+            tmp8u=tmp32s&(rex.w?63:31);
+            tmp32s >>= (rex.w?6:5);
             if(!MODREG)
             {
-                ED=(reg64_t*)(((uint32_t*)(ED))+(tmp8u>>5));
+                ED=(reg64_t*)(((uintptr_t)(ED))+(tmp32s<<(rex.w?3:2)));
             }
             if(rex.w) {
-                tmp8u&=63;
                 if(ED->q[0] & (1LL<<tmp8u))
                     SET_FLAG(F_CF);
                 else
                     CLEAR_FLAG(F_CF);
             } else {
-                tmp8u&=31;
                 if(ED->dword[0] & (1<<tmp8u))
                     SET_FLAG(F_CF);
                 else
@@ -546,8 +762,12 @@ int Run0F(x64emu_t *emu, rex_t rex)
                 tmp8u = R_CL;
             if(rex.w)
                 ED->q[0] = shld64(emu, ED->q[0], GD->q[0], tmp8u);
-            else
-                ED->q[0] = shld32(emu, ED->dword[0], GD->dword[0], tmp8u);
+            else {
+                if(MODREG)
+                    ED->q[0] = shld32(emu, ED->dword[0], GD->dword[0], tmp8u);
+                else
+                    ED->dword[0] = shld32(emu, ED->dword[0], GD->dword[0], tmp8u);
+            }
             break;
 
         case 0xAB:                      /* BTS Ed,Gd */
@@ -555,13 +775,14 @@ int Run0F(x64emu_t *emu, rex_t rex)
             nextop = F8;
             GETED(0);
             GETGD;
-            tmp8u = GD->byte[0];
+            tmp32s = GD->sdword[0];
+            tmp8u=tmp32s&(rex.w?63:31);
+            tmp32s >>= (rex.w?6:5);
             if(!MODREG)
             {
-                ED=(reg64_t*)(((uint32_t*)(ED))+(tmp8u>>5));
+                ED=(reg64_t*)(((uintptr_t)(ED))+(tmp32s<<(rex.w?3:2)));
             }
             if(rex.w) {
-                tmp8u&=63;
                 if(ED->q[0] & (1LL<<tmp8u))
                     SET_FLAG(F_CF);
                 else {
@@ -569,7 +790,6 @@ int Run0F(x64emu_t *emu, rex_t rex)
                     CLEAR_FLAG(F_CF);
                 }
             } else {
-                tmp8u&=31;
                 if(ED->dword[0] & (1<<tmp8u))
                     SET_FLAG(F_CF);
                 else {
@@ -588,8 +808,12 @@ int Run0F(x64emu_t *emu, rex_t rex)
             tmp8u = (opcode==0xAC)?(F8):R_CL;
             if(rex.w)
                 ED->q[0] = shrd64(emu, ED->q[0], GD->q[0], tmp8u);
-            else
-                ED->q[0] = shrd32(emu, ED->dword[0], GD->dword[0], tmp8u);
+            else {
+                if(MODREG)
+                    ED->q[0] = shrd32(emu, ED->dword[0], GD->dword[0], tmp8u);
+                else
+                    ED->dword[0] = shrd32(emu, ED->dword[0], GD->dword[0], tmp8u);
+            }
             break;
         case 0xAE:                      /* Grp Ed (SSE) */
             nextop = F8;
@@ -622,6 +846,11 @@ int Run0F(x64emu_t *emu, rex_t rex)
                 case 3:                 /* STMXCSR Md */
                     ED->dword[0] = emu->mxcsr;
                     break;
+                case 7:                 /* CLFLUSH Ed */
+                    #ifdef DYNAREC
+                    cleanDBFromAddressRange((uintptr_t)ED, 8, 0);
+                    #endif
+                    break;
                 default:
                     return 1;
             }
@@ -633,7 +862,7 @@ int Run0F(x64emu_t *emu, rex_t rex)
             if(rex.w)
                 GD->q[0] = imul64(emu, GD->q[0], ED->q[0]);
             else
-                GD->dword[0] = imul32(emu, GD->dword[0], ED->dword[0]);
+                GD->q[0] = imul32(emu, GD->dword[0], ED->dword[0]);
             break;
         case 0xB0:                      /* CMPXCHG Eb,Gb */
             nextop = F8;
@@ -659,13 +888,12 @@ int Run0F(x64emu_t *emu, rex_t rex)
                 }
             } else {
                 cmp32(emu, R_EAX, ED->dword[0]);
+                R_RAX = ED->dword[0];   // to erase upper part of RAX
                 if(ACCESS_FLAG(F_ZF)) {
                     if(MODREG)
                         ED->q[0] = GD->dword[0];
                     else
                         ED->dword[0] = GD->dword[0];
-                } else {
-                    R_RAX = ED->dword[0];
                 }
             }
             break;
@@ -674,20 +902,20 @@ int Run0F(x64emu_t *emu, rex_t rex)
             nextop = F8;
             GETED(0);
             GETGD;
-            tmp8u = GD->byte[0];
+            tmp32s = GD->sdword[0];
+            tmp8u=tmp32s&(rex.w?63:31);
+            tmp32s >>= (rex.w?6:5);
             if(!MODREG)
             {
-                ED=(reg64_t*)(((uint32_t*)(ED))+(tmp8u>>5));
+                ED=(reg64_t*)(((uintptr_t)(ED))+(tmp32s<<(rex.w?3:2)));
             }
             if(rex.w) {
-                tmp8u&=63;
                 if(ED->q[0] & (1LL<<tmp8u)) {
                     SET_FLAG(F_CF);
                     ED->q[0] ^= (1LL<<tmp8u);
                 } else
                     CLEAR_FLAG(F_CF);
             } else {
-                tmp8u&=31;
                 if(ED->dword[0] & (1<<tmp8u)) {
                     SET_FLAG(F_CF);
                     ED->dword[0] ^= (1<<tmp8u);
@@ -718,8 +946,6 @@ int Run0F(x64emu_t *emu, rex_t rex)
                     CHECK_FLAGS(emu);
                     GETED(1);
                     tmp8u = F8;
-                    if(!MODREG)
-                        ED=(reg64_t*)(((uintptr_t*)(ED))+(tmp8u>>5));
                     if(rex.w) {
                         tmp8u&=63;
                         if(ED->q[0] & (1LL<<tmp8u))
@@ -738,8 +964,6 @@ int Run0F(x64emu_t *emu, rex_t rex)
                     CHECK_FLAGS(emu);
                     GETED(1);
                     tmp8u = F8;
-                    if(!MODREG)
-                        ED=(reg64_t*)(((uintptr_t*)(ED))+(tmp8u>>5));
                     if(rex.w) {
                         tmp8u&=63;
                         if(ED->q[0] & (1LL<<tmp8u)) {
@@ -762,8 +986,6 @@ int Run0F(x64emu_t *emu, rex_t rex)
                     CHECK_FLAGS(emu);
                     GETED(1);
                     tmp8u = F8;
-                    if(!MODREG)
-                        ED=(reg64_t*)(((uintptr_t*)(ED))+(tmp8u>>5));
                     if(rex.w) {
                         tmp8u&=63;
                         if(ED->q[0] & (1LL<<tmp8u)) {
@@ -784,8 +1006,6 @@ int Run0F(x64emu_t *emu, rex_t rex)
                     CHECK_FLAGS(emu);
                     GETED(1);
                     tmp8u = F8;
-                    if(!MODREG)
-                        ED=(reg64_t*)(((uintptr_t*)(ED))+(tmp8u>>5));
                     if(rex.w) {
                         tmp8u&=63;
                         if(ED->q[0] & (1LL<<tmp8u))
@@ -812,23 +1032,20 @@ int Run0F(x64emu_t *emu, rex_t rex)
             nextop = F8;
             GETED(0);
             GETGD;
-            tmp8u = GD->byte[0];
+            tmp32s = GD->sdword[0];
+            tmp8u=tmp32s&(rex.w?63:31);
+            tmp32s >>= (rex.w?6:5);
             if(!MODREG)
             {
-                if(rex.w)
-                    ED=(reg64_t*)(((uint64_t*)(ED))+(tmp8u>>6));
-                else
-                    ED=(reg64_t*)(((uint32_t*)(ED))+(tmp8u>>5));
+                ED=(reg64_t*)(((uintptr_t)(ED))+(tmp32s<<(rex.w?3:2)));
             }
             if(rex.w) {
-                tmp8u&=63;
                 if(ED->q[0] & (1LL<<tmp8u))
                     SET_FLAG(F_CF);
                 else
                     CLEAR_FLAG(F_CF);
                 ED->q[0] ^= (1LL<<tmp8u);
             } else {
-                tmp8u&=31;
                 if(ED->dword[0] & (1<<tmp8u))
                     SET_FLAG(F_CF);
                 else
@@ -959,7 +1176,33 @@ int Run0F(x64emu_t *emu, rex_t rex)
                 GX->ud[i]=(tmp8s)?0xffffffff:0;
             }
             break;
-
+        case 0xC3:                      /* MOVNTI Ed, Gd */
+            nextop = F8;
+            GETED(0);
+            GETGD;
+            if(rex.w)
+                ED->q[0] = GD->q[0];
+            else {
+                if(MODREG)
+                    ED->q[0] = GD->dword[0];
+                else
+                    ED->dword[0] = GD->dword[0];
+            }
+            break;
+        case 0xC4:                      /* PINSRW Gm,Ew,Ib */
+            nextop = F8;
+            GETED(0);
+            GETGM;
+            tmp8u = F8;
+            GM->uw[tmp8u&3] = ED->word[0];   // only low 16bits
+            break;
+        case 0xC5:                       /* PEXTRW Gw,Em,Ib */
+            nextop = F8;
+            GETEM(0);
+            GETGD;
+            tmp8u = F8;
+            GD->q[0] = EM->uw[tmp8u&3];  // 16bits extract, 0 extended
+            break;
         case 0xC6:                      /* SHUFPS Gx, Ex, Ib */
             nextop = F8;
             GETEX(1);
@@ -1060,6 +1303,15 @@ int Run0F(x64emu_t *emu, rex_t rex)
             }
             break;
 
+        case 0xD7:                   /* PMOVMSKB Gd,Em */
+            nextop = F8;
+            GETEM(0);
+            GETGD;
+            GD->dword[0] = 0;
+            for (int i=0; i<8; ++i)
+                if(EM->ub[i]&0x80)
+                    GD->dword[0] |= (1<<i);
+            break;
         case 0xD8:                   /* PSUBUSB Gm,Em */
             nextop = F8;
             GETEM(0);
@@ -1078,7 +1330,13 @@ int Run0F(x64emu_t *emu, rex_t rex)
                 GM->uw[i] = (tmp32s < 0) ? 0 : tmp32s;
             }
             break;
-
+        case 0xDA:                   /* PMINUB Gm,Em */
+            nextop = F8;
+            GETEM(0);
+            GETGM;
+            for (int i=0; i<8; ++i)
+                GM->ub[i] = (GM->ub[i]<EM->ub[i])?GM->ub[i]:EM->ub[i];
+            break;
         case 0xDB:                   /* PAND Gm,Em */
             nextop = F8;
             GETEM(0);
@@ -1103,14 +1361,26 @@ int Run0F(x64emu_t *emu, rex_t rex)
                 GM->uw[i] = (tmp32u>65535) ? 65535 : tmp32u;
             }
             break;
-
+        case 0xDE:                   /* PMAXUB Gm,Em */
+            nextop = F8;
+            GETEM(0);
+            GETGM;
+            for (int i=0; i<8; ++i)
+                GM->ub[i] = (GM->ub[i]>EM->ub[i])?GM->ub[i]:EM->ub[i];
+            break;
         case 0xDF:                   /* PANDN Gm,Em */
             nextop = F8;
             GETEM(0);
             GETGM;
             GM->q = (~GM->q) & EM->q;
             break;
-
+        case 0xE0:                   /* PAVGB Gm, Em */
+            nextop = F8;
+            GETEM(0);
+            GETGM;
+            for(int i=0; i<8; ++i)
+                    GM->ub[i] = ((uint32_t)GM->ub[i]+EM->ub[i]+1)>>1;
+            break;
         case 0xE1:                   /* PSRAW Gm, Em */
             nextop = F8;
             GETEM(0);
@@ -1135,22 +1405,19 @@ int Run0F(x64emu_t *emu, rex_t rex)
                     GM->sd[i] >>= tmp8u;
             }
             break;
-        case 0xE3:                   /* PSRAQ Gm, Em */
+        case 0xE3:                   /* PAVGW Gm, Em */
             nextop = F8;
             GETEM(0);
             GETGM;
-            if(EM->q>63)
-                tmp8u = 64;
-            else
-                tmp8u = EM->ub[0];
-            GM->sq >>= tmp8u;
+            for(int i=0; i<4; ++i)
+                GM->uw[i] = ((uint32_t)GM->uw[i]+EM->uw[i]+1)>>1;
             break;
         case 0xE4:                   /* PMULHUW Gm, Em */
             nextop = F8;
             GETEM(0);
             GETGM;
             for(int i=0; i<4; ++i) {
-                tmp32u = (int32_t)GM->uw[i] * EM->uw[i];
+                tmp32u = (uint32_t)GM->uw[i] * (uint32_t)EM->uw[i];
                 GM->uw[i] = (tmp32u>>16)&0xffff;
             }
             break;
@@ -1159,17 +1426,24 @@ int Run0F(x64emu_t *emu, rex_t rex)
             GETEM(0);
             GETGM;
             for(int i=0; i<4; ++i) {
-                tmp32s = (int32_t)GM->sw[i] * EM->sw[i];
-                GM->uw[i] = (tmp32s>>16)&0xffff;
+                tmp32s = (int32_t)GM->sw[i] * (int32_t)EM->sw[i];
+                GM->sw[i] = (tmp32s>>16)&0xffff;
             }
             break;
-
+        case 0xE7:                   /* MOVNTQ Em,Gm */
+            nextop = F8;
+            if((nextop&0xC0)==0xC0)
+                return 1;
+            GETEM(0);
+            GETGM;
+            EM->q = GM->q;
+            break;
         case 0xE8:                   /* PSUBSB Gm,Em */
             nextop = F8;
             GETEM(0);
             GETGM;
             for(int i=0; i<8; ++i) {
-                tmp32s = (int32_t)GM->sb[i] - EM->sb[i];
+                tmp32s = (int32_t)GM->sb[i] - (int32_t)EM->sb[i];
                 GM->sb[i] = (tmp32s>127)?127:((tmp32s<-128)?-128:tmp32s);
             }
             break;
@@ -1257,27 +1531,36 @@ int Run0F(x64emu_t *emu, rex_t rex)
                 GM->sd[i] = tmp32s + tmp32s2;
             }
             break;
+        case 0xF6:                   /* PSADBW Gm, Em */
+            nextop = F8;
+            GETEM(0);
+            GETGM;
+            tmp32u = 0;
+            for (int i=0; i<8; ++i)
+                tmp32u += (GM->ub[i]>EM->ub[i])?(GM->ub[i] - EM->ub[i]):(EM->ub[i] - GM->ub[i]);
+            GM->q = tmp32u;
+            break;
 
         case 0xF8:                   /* PSUBB Gm,Em */
             nextop = F8;
             GETEM(0);
             GETGM;
             for(int i=0; i<8; ++i)
-                GM->sb[i] -= EM->sb[i];
+                GM->ub[i] -= EM->ub[i];
             break;
         case 0xF9:                   /* PSUBW Gm,Em */
             nextop = F8;
             GETEM(0);
             GETGM;
             for(int i=0; i<4; ++i)
-                GM->sw[i] -= EM->sw[i];
+                GM->uw[i] -= EM->uw[i];
             break;
         case 0xFA:                   /* PSUBD Gm,Em */
             nextop = F8;
             GETEM(0);
             GETGM;
             for(int i=0; i<2; ++i)
-                GM->sd[i] -= EM->sd[i];
+                GM->ud[i] -= EM->ud[i];
             break;
 
         case 0xFC:                   /* PADDB Gm, Em */
@@ -1285,21 +1568,21 @@ int Run0F(x64emu_t *emu, rex_t rex)
             GETEM(0);
             GETGM;
             for(int i=0; i<8; ++i)
-                GM->sb[i] += EM->sb[i];
+                GM->ub[i] += EM->ub[i];
             break;
         case 0xFD:                   /* PADDW Gm,Em */
             nextop = F8;
             GETEM(0);
             GETGM;
             for(int i=0; i<4; ++i)
-                GM->sw[i] += EM->sw[i];
+                GM->uw[i] += EM->uw[i];
             break;
         case 0xFE:                   /* PADDD Gm,Em */
             nextop = F8;
             GETEM(0);
             GETGM;
             for(int i=0; i<2; ++i)
-                GM->sd[i] += EM->sd[i];
+                GM->ud[i] += EM->ud[i];
             break;
 
         default:

src/emu/x64run64.c

@@ -22,18 +22,20 @@
 
 #include "modrm.h"
 
-int Run64(x64emu_t *emu, rex_t rex)
+int Run64(x64emu_t *emu, rex_t rex, int seg)
 {
     uint8_t opcode;
     uint8_t nextop;
-    uint8_t tmp8u;
-    int16_t tmp16s;
-    uint16_t tmp16u;
+    uint8_t tmp8u;   (void)tmp8u;
+    int16_t tmp16s;  (void)tmp16s;
+    uint16_t tmp16u; (void)tmp16u;
     int32_t tmp32s;
     uint32_t tmp32u;
     uint64_t tmp64u;
     reg64_t *oped, *opgd;
-    uintptr_t tlsdata = GetFSBaseEmu(emu);
+    sse_regs_t *opex, *opgx;
+    int rep;
+    uintptr_t tlsdata = GetSegmentBaseEmu(emu, seg);
 
     opcode = F8;
     // REX prefix before the F0 are ignored
@@ -42,19 +44,210 @@ int Run64(x64emu_t *emu, rex_t rex)
         rex.rex = opcode;
         opcode = F8;
     }
+    rep = 0;
+    while((opcode==0xF2) || (opcode==0xF3)) {
+        rep = opcode-0xF1;
+        opcode = F8;
+    }
 
     switch(opcode) {
+        #define GO(B, OP)                                   \
+        case B+0:                                           \
+            nextop = F8;                                    \
+            GETEB_OFFS(0, tlsdata);                         \
+            GETGB;                                          \
+            EB->byte[0] = OP##8(emu, EB->byte[0], GB);      \
+            break;                                          \
+        case B+1:                                           \
+            nextop = F8;                                    \
+            GETED_OFFS(0, tlsdata);                         \
+            GETGD;                                          \
+            if(rex.w)                                       \
+                ED->q[0] = OP##64(emu, ED->q[0], GD->q[0]); \
+            else {                                          \
+                if(MODREG)                                  \
+                    ED->q[0] = OP##32(emu, ED->dword[0], GD->dword[0]);     \
+                else                                                        \
+                    ED->dword[0] = OP##32(emu, ED->dword[0], GD->dword[0]); \
+            }                                               \
+            break;                                          \
+        case B+2:                                           \
+            nextop = F8;                                    \
+            GETEB_OFFS(0, tlsdata);                         \
+            GETGB;                                          \
+            GB = OP##8(emu, GB, EB->byte[0]);               \
+            break;                                          \
+        case B+3:                                           \
+            nextop = F8;                                    \
+            GETED_OFFS(0, tlsdata);                         \
+            GETGD;                                          \
+            if(rex.w)                                       \
+                GD->q[0] = OP##64(emu, GD->q[0], ED->q[0]); \
+            else                                            \
+                GD->q[0] = OP##32(emu, GD->dword[0], ED->dword[0]); \
+            break;                                          \
+        case B+4:                                           \
+            R_AL = OP##8(emu, R_AL, F8);                    \
+            break;                                          \
+        case B+5:                                           \
+            if(rex.w)                                       \
+                R_RAX = OP##64(emu, R_RAX, F32S64);         \
+            else                                            \
+                R_RAX = OP##32(emu, R_EAX, F32);            \
+            break;
 
-        case 0x33:              /* XOR Gd,Ed */
+        GO(0x00, add)                   /* ADD 0x00 -> 0x05 */
+        GO(0x08, or)                    /*  OR 0x08 -> 0x0D */
+        GO(0x10, adc)                   /* ADC 0x10 -> 0x15 */
+        GO(0x18, sbb)                   /* SBB 0x18 -> 0x1D */
+        GO(0x20, and)                   /* AND 0x20 -> 0x25 */
+        GO(0x28, sub)                   /* SUB 0x28 -> 0x2D */
+        GO(0x30, xor)                   /* XOR 0x30 -> 0x35 */
+        #undef GO
+        case 0x0F:
+            opcode = F8;
+            switch(opcode) {
+
+                case 0x10:
+                    switch(rep) {
+                        case 1: /* MOVSD Gx, FS:Ex */
+                            nextop = F8;
+                            GETEX_OFFS(0, tlsdata);
+                            GETGX;
+                            GX->q[0] = EX->q[0];
+                            if((nextop&0xC0)!=0xC0) {
+                                // EX is not a register
+                                GX->q[1] = 0;
+                            }
+                            break;
+                        case 2: /* MOVSS Gx, FS:Ex */
+                            nextop = F8;
+                            GETEX_OFFS(0, tlsdata);
+                            GETGX;
+                            GX->ud[0] = EX->ud[0];
+                            if((nextop&0xC0)!=0xC0) {
+                                // EX is not a register (reg to reg only move 31:0)
+                                GX->ud[1] = GX->ud[2] = GX->ud[3] = 0;
+                            }
+                            break;
+                        default:
+                            return 1;
+                    }
+                    break;
+                case 0x11:
+                    switch(rep) {
+                        case 1: /* MOVSD Ex, Gx */
+                            nextop = F8;
+                            GETEX_OFFS(0, tlsdata);
+                            GETGX;
+                            EX->q[0] = GX->q[0];
+                            break;
+                        case 2: /* MOVSS FS:Ex, Gx */
+                            nextop = F8;
+                            GETEX_OFFS(0, tlsdata);
+                            GETGX;
+                            EX->ud[0] = GX->ud[0];
+                            break;
+                        default:
+                            return 1;
+                    }
+                    break;
+
+                case 0x29:                      /* MOVAPS Ex,Gx */
+                    switch(rep) {
+                        case 0:
+                            nextop = F8;
+                            GETEX_OFFS(0, tlsdata);
+                            GETGX;
+                            EX->q[0] = GX->q[0];
+                            EX->q[1] = GX->q[1];
+                            break;
+                        default:
+                            return 1;
+                    }
+                    break;
+                
+                case 0x59:
+                    switch(rep) {
+                        case 2: /* MULSS Gx, Ex */
+                            nextop = F8;
+                            GETEX_OFFS(0, tlsdata);
+                            GETGX;
+                            GX->f[0] *= EX->f[0];
+                            break;
+
+                        default:
+                            return 1;
+                    }
+                    break;
+
+                case 0xAF:                      /* IMUL Gd,Ed */
+                    nextop = F8;
+                    GETED_OFFS(0, tlsdata);
+                    GETGD;
+                    if(rex.w)
+                        GD->q[0] = imul64(emu, GD->q[0], ED->q[0]);
+                    else
+                        GD->q[0] = imul32(emu, GD->dword[0], ED->dword[0]);
+                    break;
+
+                case 0xB6:                      /* MOVZX Gd,Eb */
+                    nextop = F8;
+                    GETEB_OFFS(0, tlsdata);
+                    GETGD;
+                    GD->q[0] = EB->byte[0];
+                    break;
+
+                default:
+                    return 1;
+            }
+            break;
+
+        case 0x38:
+            nextop = F8;
+            GETEB_OFFS(0, tlsdata);
+            GETGB;
+            cmp8(emu, EB->byte[0], GB);
+            break;
+        case 0x39:
             nextop = F8;
             GETED_OFFS(0, tlsdata);
             GETGD;
             if(rex.w)
-                GD->q[0] = xor64(emu, GD->q[0], ED->q[0]);
+                cmp64(emu, ED->q[0], GD->q[0]);
             else
-                GD->q[0] = xor32(emu, GD->dword[0], ED->dword[0]);
+                cmp32(emu, ED->dword[0], GD->dword[0]);
             break;
 
+        case 0x3B:
+            nextop = F8;
+            GETED_OFFS(0, tlsdata);
+            GETGD;
+            if(rex.w)
+                cmp64(emu, GD->q[0], ED->q[0]);
+            else
+                cmp32(emu, GD->dword[0], ED->dword[0]);
+            break;
+
+
+        case 0x66:
+            return Run6664(emu, rex);
+
+        case 0x80:                      /* GRP Eb,Ib */
+            nextop = F8;
+            GETEB_OFFS(1, tlsdata);
+            tmp8u = F8;
+            switch((nextop>>3)&7) {
+                case 0: EB->byte[0] = add8(emu, EB->byte[0], tmp8u); break;
+                case 1: EB->byte[0] =  or8(emu, EB->byte[0], tmp8u); break;
+                case 2: EB->byte[0] = adc8(emu, EB->byte[0], tmp8u); break;
+                case 3: EB->byte[0] = sbb8(emu, EB->byte[0], tmp8u); break;
+                case 4: EB->byte[0] = and8(emu, EB->byte[0], tmp8u); break;
+                case 5: EB->byte[0] = sub8(emu, EB->byte[0], tmp8u); break;
+                case 6: EB->byte[0] = xor8(emu, EB->byte[0], tmp8u); break;
+                case 7:               cmp8(emu, EB->byte[0], tmp8u); break;
+            }
+            break;
         case 0x81:                      /* GRP Ed,Id */
         case 0x83:                      /* GRP Ed,Ib */
             nextop = F8;
@@ -134,6 +327,11 @@ int Run64(x64emu_t *emu, rex_t rex)
                 GD->q[0] = ED->dword[0];
             break;
 
+        case 0xC6:                      /* MOV Eb,Ib */
+            nextop = F8;
+            GETEB_OFFS(1, tlsdata);
+            EB->byte[0] = F8;
+            break;
         case 0xC7:                      /* MOV Ed,Id */
             nextop = F8;
             GETED_OFFS(4, tlsdata);
@@ -146,8 +344,193 @@ int Run64(x64emu_t *emu, rex_t rex)
                     ED->dword[0] = F32;
             break;
 
-       default:
+        case 0xD1:                      /* GRP2 Ed,1 */
+        case 0xD3:                      /* GRP2 Ed,CL */
+            nextop = F8;
+            GETED_OFFS(0, tlsdata);
+            tmp8u = (opcode==0xD1)?1:R_CL;
+            if(rex.w) {
+                switch((nextop>>3)&7) {
+                    case 0: ED->q[0] = rol64(emu, ED->q[0], tmp8u); break;
+                    case 1: ED->q[0] = ror64(emu, ED->q[0], tmp8u); break;
+                    case 2: ED->q[0] = rcl64(emu, ED->q[0], tmp8u); break;
+                    case 3: ED->q[0] = rcr64(emu, ED->q[0], tmp8u); break;
+                    case 4: 
+                    case 6: ED->q[0] = shl64(emu, ED->q[0], tmp8u); break;
+                    case 5: ED->q[0] = shr64(emu, ED->q[0], tmp8u); break;
+                    case 7: ED->q[0] = sar64(emu, ED->q[0], tmp8u); break;
+                }
+            } else {
+                if(MODREG)
+                    switch((nextop>>3)&7) {
+                        case 0: ED->q[0] = rol32(emu, ED->dword[0], tmp8u); break;
+                        case 1: ED->q[0] = ror32(emu, ED->dword[0], tmp8u); break;
+                        case 2: ED->q[0] = rcl32(emu, ED->dword[0], tmp8u); break;
+                        case 3: ED->q[0] = rcr32(emu, ED->dword[0], tmp8u); break;
+                        case 4: 
+                        case 6: ED->q[0] = shl32(emu, ED->dword[0], tmp8u); break;
+                        case 5: ED->q[0] = shr32(emu, ED->dword[0], tmp8u); break;
+                        case 7: ED->q[0] = sar32(emu, ED->dword[0], tmp8u); break;
+                    }
+                else
+                    switch((nextop>>3)&7) {
+                        case 0: ED->dword[0] = rol32(emu, ED->dword[0], tmp8u); break;
+                        case 1: ED->dword[0] = ror32(emu, ED->dword[0], tmp8u); break;
+                        case 2: ED->dword[0] = rcl32(emu, ED->dword[0], tmp8u); break;
+                        case 3: ED->dword[0] = rcr32(emu, ED->dword[0], tmp8u); break;
+                        case 4: 
+                        case 6: ED->dword[0] = shl32(emu, ED->dword[0], tmp8u); break;
+                        case 5: ED->dword[0] = shr32(emu, ED->dword[0], tmp8u); break;
+                        case 7: ED->dword[0] = sar32(emu, ED->dword[0], tmp8u); break;
+                    }
+            }
+            break;
+
+        case 0xF7:                      /* GRP3 Ed(,Id) */
+            nextop = F8;
+            tmp8u = (nextop>>3)&7;
+            GETED_OFFS((tmp8u<2)?4:0, tlsdata);
+            if(rex.w) {
+                switch(tmp8u) {
+                    case 0: 
+                    case 1:                 /* TEST Ed,Id */
+                        tmp64u = F32S64;
+                        test64(emu, ED->q[0], tmp64u);
+                        break;
+                    case 2:                 /* NOT Ed */
+                        ED->q[0] = not64(emu, ED->q[0]);
+                        break;
+                    case 3:                 /* NEG Ed */
+                        ED->q[0] = neg64(emu, ED->q[0]);
+                        break;
+                    case 4:                 /* MUL RAX,Ed */
+                        mul64_rax(emu, ED->q[0]);
+                        break;
+                    case 5:                 /* IMUL RAX,Ed */
+                        imul64_rax(emu, ED->q[0]);
+                        break;
+                    case 6:                 /* DIV Ed */
+                        div64(emu, ED->q[0]);
+                        break;
+                    case 7:                 /* IDIV Ed */
+                        idiv64(emu, ED->q[0]);
+                        break;
+                }
+            } else {
+                switch(tmp8u) {
+                    case 0: 
+                    case 1:                 /* TEST Ed,Id */
+                        tmp32u = F32;
+                        test32(emu, ED->dword[0], tmp32u);
+                        break;
+                    case 2:                 /* NOT Ed */
+                        if(MODREG)
+                            ED->q[0] = not32(emu, ED->dword[0]);
+                        else
+                            ED->dword[0] = not32(emu, ED->dword[0]);
+                        break;
+                    case 3:                 /* NEG Ed */
+                        if(MODREG)
+                            ED->q[0] = neg32(emu, ED->dword[0]);
+                        else
+                            ED->dword[0] = neg32(emu, ED->dword[0]);
+                        break;
+                    case 4:                 /* MUL EAX,Ed */
+                        mul32_eax(emu, ED->dword[0]);
+                        emu->regs[_AX].dword[1] = 0;
+                        break;
+                    case 5:                 /* IMUL EAX,Ed */
+                        imul32_eax(emu, ED->dword[0]);
+                        emu->regs[_AX].dword[1] = 0;
+                        break;
+                    case 6:                 /* DIV Ed */
+                        div32(emu, ED->dword[0]);
+                        //emu->regs[_AX].dword[1] = 0;  // already put high regs to 0
+                        //emu->regs[_DX].dword[1] = 0;
+                        break;
+                    case 7:                 /* IDIV Ed */
+                        idiv32(emu, ED->dword[0]);
+                        //emu->regs[_AX].dword[1] = 0;
+                        //emu->regs[_DX].dword[1] = 0;
+                        break;
+                }
+            }
+            break;
+            
+        case 0xFF:                      /* GRP 5 Ed */
+            nextop = F8;
+            GETED_OFFS(0, tlsdata);
+            switch((nextop>>3)&7) {
+                case 0:                 /* INC Ed */
+                    if(rex.w)
+                        ED->q[0] = inc64(emu, ED->q[0]);
+                    else {
+                        if(MODREG)
+                            ED->q[0] = inc32(emu, ED->dword[0]);
+                        else
+                            ED->dword[0] = inc32(emu, ED->dword[0]);
+                    }
+                    break;
+                case 1:                 /* DEC Ed */
+                    if(rex.w)
+                        ED->q[0] = dec64(emu, ED->q[0]);
+                    else {
+                        if(MODREG)
+                            ED->q[0] = dec32(emu, ED->dword[0]);
+                        else
+                            ED->dword[0] = dec32(emu, ED->dword[0]);
+                    }
+                    break;
+                case 2:                 /* CALL NEAR Ed */
+                    tmp64u = (uintptr_t)getAlternate((void*)ED->q[0]);
+                    Push(emu, R_RIP);
+                    R_RIP = tmp64u;
+                    break;
+                case 3:                 /* CALL FAR Ed */
+                    if(nextop>0xC0) {
+                        R_RIP = emu->old_ip;
+                        printf_log(LOG_NONE, "Illegal Opcode %p: %02X %02X %02X %02X\n", (void*)R_RIP, opcode, nextop, PK(2), PK(3));
+                        emu->quit=1;
+                        emu->error |= ERR_ILLEGAL;
+                        return 0;
+                    } else {
+                        Push16(emu, R_CS);
+                        Push(emu, R_RIP);
+                        R_RIP = ED->dword[0];
+                        R_CS = (ED+1)->word[0];
+                        return 0;  // exit loop to recompute new CS...
+                    }
+                    break;
+                case 4:                 /* JMP NEAR Ed */
+                    R_RIP = (uintptr_t)getAlternate((void*)ED->q[0]);
+                    break;
+                case 5:                 /* JMP FAR Ed */
+                    if(nextop>0xc0) {
+                        R_RIP = emu->old_ip;
+                        printf_log(LOG_NONE, "Illegal Opcode %p: 0x%02X 0x%02X %02X %02X\n", (void*)R_RIP, opcode, nextop, PK(2), PK(3));
+                        emu->quit=1;
+                        emu->error |= ERR_ILLEGAL;
+                        return 0;
+                    } else {
+                        R_RIP = ED->q[0];
+                        R_CS = (ED+1)->word[0];
+                        return 0;  // exit loop to recompute CS...
+                    }
+                    break;
+                case 6:                 /* Push Ed */
+                    tmp64u = ED->q[0];  // rex.w ignored
+                    Push(emu, tmp64u);  // avoid potential issue with push [esp+...]
+                    break;
+                default:
+                    R_RIP = emu->old_ip;
+                    printf_log(LOG_NONE, "Illegal Opcode %p: %02X %02X %02X %02X %02X %02X\n",(void*)R_RIP, opcode, nextop, PK(2), PK(3), PK(4), PK(5));
+                    emu->quit=1;
+                    emu->error |= ERR_ILLEGAL;
+                    return 0;
+            }
+            break;
+        default:
             return 1;
     }
     return 0;
-}
+}

src/emu/x64run66.c

@@ -33,6 +33,7 @@ int Run66(x64emu_t *emu, rex_t rex, int rep)
     uint8_t tmp8u, tmp8u2;
     int16_t tmp16s;
     uint16_t tmp16u, tmp16u2;
+    int32_t tmp32s;
     int64_t tmp64s;
     uint64_t tmp64u, tmp64u2, tmp64u3;
     reg64_t *oped, *opgd;
@@ -46,7 +47,7 @@ int Run66(x64emu_t *emu, rex_t rex, int rep)
         rep = opcode-0xF1;
         opcode = F8;
     }
-    // REX prefix before the F0 are ignored
+
     rex.rex = 0;
     while(opcode>=0x40 && opcode<=0x4f) {
         rex.rex = opcode;
@@ -209,10 +210,60 @@ int Run66(x64emu_t *emu, rex_t rex, int rep)
         nextop = F8;
         GETEW(0);
         GETGW;
-        EW->word[0] = GW->word[0];
+        if(rex.w)
+            EW->q[0] = GW->q[0];
+        else
+            EW->word[0] = GW->word[0];
         break;
 
-    case 0x90:                              /* NOP */
+    case 0x8B:                              /* MOV Gw,Ew */
+        nextop = F8;
+        GETEW(0);
+        GETGW;
+        if(rex.w)
+            GW->q[0] = EW->q[0];
+        else
+            GW->word[0] = EW->word[0];
+        break;
+    case 0x8C:                      /* MOV Ed, Seg */
+        nextop = F8;
+        GETEW(0);
+        if(rex.w)
+            EW->q[0] = emu->segs[((nextop&0x38)>>3)];
+        else
+            EW->word[0] = emu->segs[((nextop&0x38)>>3)];
+        break;
+    case 0x8D:                              /* LEA Gw,M */
+        nextop = F8;
+        GETED(0);
+        GETGD;
+        if(rex.w)
+            GD->q[0] = (uint64_t)ED;
+        else
+            GD->word[0] = (uint16_t)(uintptr_t)ED;
+        break;
+
+        case 0x90:                      /* NOP or XCHG R8d, AX*/
+        case 0x91:
+        case 0x92:
+        case 0x93:
+        case 0x94:
+        case 0x95:
+        case 0x96:
+        case 0x97:                      /* XCHG reg,AX */
+            tmp8u = _AX+(opcode&7)+(rex.b<<3);
+            if(tmp8u!=_AX) {
+                if(rex.w) {
+                    tmp64u = R_RAX;
+                    R_RAX = emu->regs[tmp8u].q[0];
+                    emu->regs[tmp8u].q[0] = tmp64u;
+                } else {
+                    tmp16u = R_AX;
+                    R_AX = emu->regs[tmp8u].word[0];
+                    emu->regs[tmp8u].word[0] = tmp16u;
+                }
+            }
+            break;
         break;
 
     case 0x98:                               /* CBW */
@@ -222,6 +273,20 @@ int Run66(x64emu_t *emu, rex_t rex, int rep)
         R_DX=((R_AX & 0x8000)?0xFFFF:0x0000);
         break;
 
+    case 0xA1:                      /* MOV EAX,Od */
+        if(rex.w)
+            R_RAX = *(uint64_t*)F64;
+        else
+            R_AX = *(uint16_t*)F64;
+        break;
+
+    case 0xA3:                      /* MOV Od,EAX */
+        if(rex.w)
+            *(uint64_t*)F64 = R_RAX;
+        else
+            *(uint16_t*)F64 = R_AX;
+        break;
+
     case 0xA5:              /* (REP) MOVSW */
         tmp8s = ACCESS_FLAG(F_DF)?-1:+1;
         tmp64u = (rep)?R_RCX:1L;
@@ -527,6 +592,15 @@ int Run66(x64emu_t *emu, rex_t rex, int rep)
     case 0xDD:                              /* x87 opcdes */
         return Run66DD(emu, rex);
 
+    case 0xE8:                              /* CALL Id */
+        tmp32s = F32S; // call is relative
+        Push(emu, R_RIP);
+        R_RIP += tmp32s;
+        break;
+
+    case 0xF0:                              /* LOCK: */
+        return Run66F0(emu, rex);
+
     case 0xF7:                      /* GRP3 Ew(,Iw) */
         nextop = F8;
         tmp8u = (nextop>>3)&7;

src/emu/x64run660f.c

@@ -22,6 +22,27 @@
 
 #include "modrm.h"
 
+static uint8_t ff_mult(uint8_t a, uint8_t b)
+{
+	int retval = 0;
+
+	for(int i = 0; i < 8; i++) {
+		if((b & 1) == 1) 
+			retval ^= a;
+		
+		if((a & 0x80)) {
+			a <<= 1;
+			a  ^= 0x1b;
+		} else {
+			a <<= 1;
+		}
+		
+		b >>= 1;
+	}
+	
+	return retval;
+}
+
 int Run660F(x64emu_t *emu, rex_t rex)
 {
     uint8_t opcode;
@@ -33,9 +54,53 @@ int Run660F(x64emu_t *emu, rex_t rex)
     int32_t tmp32s;
     uint32_t tmp32u;
     uint64_t tmp64u;
+    float tmpf;
     reg64_t *oped, *opgd;
     sse_regs_t *opex, *opgx, eax1, *opex2;
     mmx87_regs_t *opem, *opgm;
+    // AES opcodes constants
+                            //   A0 B1 C2 D3 E4 F5 G6 H7 I8 J9 Ka Lb Mc Nd Oe Pf
+                            //   A  F  K  P  E  J  O  D  I  N  C  H  M  B  G  L
+    const uint8_t shiftrows[] = {0, 5,10,15, 4, 9,14, 3, 8,13, 2, 7,12, 1, 6,11};
+    const uint8_t subbytes[256] = {
+        0x63, 0x7c, 0x77, 0x7b, 0xf2, 0x6b, 0x6f, 0xc5, 0x30, 0x01, 0x67, 0x2b, 0xfe, 0xd7, 0xab, 0x76,
+        0xca, 0x82, 0xc9, 0x7d, 0xfa, 0x59, 0x47, 0xf0, 0xad, 0xd4, 0xa2, 0xaf, 0x9c, 0xa4, 0x72, 0xc0,
+        0xb7, 0xfd, 0x93, 0x26, 0x36, 0x3f, 0xf7, 0xcc, 0x34, 0xa5, 0xe5, 0xf1, 0x71, 0xd8, 0x31, 0x15,
+        0x04, 0xc7, 0x23, 0xc3, 0x18, 0x96, 0x05, 0x9a, 0x07, 0x12, 0x80, 0xe2, 0xeb, 0x27, 0xb2, 0x75,
+        0x09, 0x83, 0x2c, 0x1a, 0x1b, 0x6e, 0x5a, 0xa0, 0x52, 0x3b, 0xd6, 0xb3, 0x29, 0xe3, 0x2f, 0x84,
+        0x53, 0xd1, 0x00, 0xed, 0x20, 0xfc, 0xb1, 0x5b, 0x6a, 0xcb, 0xbe, 0x39, 0x4a, 0x4c, 0x58, 0xcf,
+        0xd0, 0xef, 0xaa, 0xfb, 0x43, 0x4d, 0x33, 0x85, 0x45, 0xf9, 0x02, 0x7f, 0x50, 0x3c, 0x9f, 0xa8,
+        0x51, 0xa3, 0x40, 0x8f, 0x92, 0x9d, 0x38, 0xf5, 0xbc, 0xb6, 0xda, 0x21, 0x10, 0xff, 0xf3, 0xd2,
+        0xcd, 0x0c, 0x13, 0xec, 0x5f, 0x97, 0x44, 0x17, 0xc4, 0xa7, 0x7e, 0x3d, 0x64, 0x5d, 0x19, 0x73,
+        0x60, 0x81, 0x4f, 0xdc, 0x22, 0x2a, 0x90, 0x88, 0x46, 0xee, 0xb8, 0x14, 0xde, 0x5e, 0x0b, 0xdb,
+        0xe0, 0x32, 0x3a, 0x0a, 0x49, 0x06, 0x24, 0x5c, 0xc2, 0xd3, 0xac, 0x62, 0x91, 0x95, 0xe4, 0x79,
+        0xe7, 0xc8, 0x37, 0x6d, 0x8d, 0xd5, 0x4e, 0xa9, 0x6c, 0x56, 0xf4, 0xea, 0x65, 0x7a, 0xae, 0x08,
+        0xba, 0x78, 0x25, 0x2e, 0x1c, 0xa6, 0xb4, 0xc6, 0xe8, 0xdd, 0x74, 0x1f, 0x4b, 0xbd, 0x8b, 0x8a,
+        0x70, 0x3e, 0xb5, 0x66, 0x48, 0x03, 0xf6, 0x0e, 0x61, 0x35, 0x57, 0xb9, 0x86, 0xc1, 0x1d, 0x9e,
+        0xe1, 0xf8, 0x98, 0x11, 0x69, 0xd9, 0x8e, 0x94, 0x9b, 0x1e, 0x87, 0xe9, 0xce, 0x55, 0x28, 0xdf,
+        0x8c, 0xa1, 0x89, 0x0d, 0xbf, 0xe6, 0x42, 0x68, 0x41, 0x99, 0x2d, 0x0f, 0xb0, 0x54, 0xbb, 0x16,
+    };
+                            //   A0 B1 C2 D3 E4 F5 G6 H7 I8 J9 Ka Lb Mc Nd Oe Pf
+                            //   A  N  K  H  E  B  O  L  I  F  C  P  M  J  G  D
+    const uint8_t invshiftrows[] = {0,13,10, 7, 4, 1,14,11, 8, 5, 2,15,12, 9, 6, 3};
+    const uint8_t invsubbytes[256] = {
+        0x52, 0x09, 0x6a, 0xd5, 0x30, 0x36, 0xa5, 0x38, 0xbf, 0x40, 0xa3, 0x9e, 0x81, 0xf3, 0xd7, 0xfb,
+        0x7c, 0xe3, 0x39, 0x82, 0x9b, 0x2f, 0xff, 0x87, 0x34, 0x8e, 0x43, 0x44, 0xc4, 0xde, 0xe9, 0xcb,
+        0x54, 0x7b, 0x94, 0x32, 0xa6, 0xc2, 0x23, 0x3d, 0xee, 0x4c, 0x95, 0x0b, 0x42, 0xfa, 0xc3, 0x4e,
+        0x08, 0x2e, 0xa1, 0x66, 0x28, 0xd9, 0x24, 0xb2, 0x76, 0x5b, 0xa2, 0x49, 0x6d, 0x8b, 0xd1, 0x25,
+        0x72, 0xf8, 0xf6, 0x64, 0x86, 0x68, 0x98, 0x16, 0xd4, 0xa4, 0x5c, 0xcc, 0x5d, 0x65, 0xb6, 0x92,
+        0x6c, 0x70, 0x48, 0x50, 0xfd, 0xed, 0xb9, 0xda, 0x5e, 0x15, 0x46, 0x57, 0xa7, 0x8d, 0x9d, 0x84,
+        0x90, 0xd8, 0xab, 0x00, 0x8c, 0xbc, 0xd3, 0x0a, 0xf7, 0xe4, 0x58, 0x05, 0xb8, 0xb3, 0x45, 0x06,
+        0xd0, 0x2c, 0x1e, 0x8f, 0xca, 0x3f, 0x0f, 0x02, 0xc1, 0xaf, 0xbd, 0x03, 0x01, 0x13, 0x8a, 0x6b,
+        0x3a, 0x91, 0x11, 0x41, 0x4f, 0x67, 0xdc, 0xea, 0x97, 0xf2, 0xcf, 0xce, 0xf0, 0xb4, 0xe6, 0x73,
+        0x96, 0xac, 0x74, 0x22, 0xe7, 0xad, 0x35, 0x85, 0xe2, 0xf9, 0x37, 0xe8, 0x1c, 0x75, 0xdf, 0x6e,
+        0x47, 0xf1, 0x1a, 0x71, 0x1d, 0x29, 0xc5, 0x89, 0x6f, 0xb7, 0x62, 0x0e, 0xaa, 0x18, 0xbe, 0x1b,
+        0xfc, 0x56, 0x3e, 0x4b, 0xc6, 0xd2, 0x79, 0x20, 0x9a, 0xdb, 0xc0, 0xfe, 0x78, 0xcd, 0x5a, 0xf4,
+        0x1f, 0xdd, 0xa8, 0x33, 0x88, 0x07, 0xc7, 0x31, 0xb1, 0x12, 0x10, 0x59, 0x27, 0x80, 0xec, 0x5f,
+        0x60, 0x51, 0x7f, 0xa9, 0x19, 0xb5, 0x4a, 0x0d, 0x2d, 0xe5, 0x7a, 0x9f, 0x93, 0xc9, 0x9c, 0xef,
+        0xa0, 0xe0, 0x3b, 0x4d, 0xae, 0x2a, 0xf5, 0xb0, 0xc8, 0xeb, 0xbb, 0x3c, 0x83, 0x53, 0x99, 0x61,
+        0x17, 0x2b, 0x04, 0x7e, 0xba, 0x77, 0xd6, 0x26, 0xe1, 0x69, 0x14, 0x63, 0x55, 0x21, 0x0c, 0x7d,
+    };
 
     opcode = F8;
 
@@ -78,6 +143,18 @@ int Run660F(x64emu_t *emu, rex_t rex)
         GX->q[0] = GX->q[1];
         GX->q[1] = EX->q[1];
         break;
+    case 0x16:                      /* MOVHPD Gx, Ed */
+        nextop = F8;
+        GETED(0);
+        GETGX;
+        GX->q[1] = ED->q[0];
+        break;
+    case 0x17:                      /* MOVHPD Ed, Gx */
+        nextop = F8;
+        GETED(0);
+        GETGX;
+        ED->q[0] = GX->q[1];
+        break;
 
     case 0x1F:                      /* NOP (multi-byte) */
         nextop = F8;
@@ -155,6 +232,484 @@ int Run660F(x64emu_t *emu, rex_t rex)
         CLEAR_FLAG(F_OF); CLEAR_FLAG(F_AF); CLEAR_FLAG(F_SF);
         break;
 
+    case 0x38:  // SSSE3 opcodes
+        opcode = F8;
+        switch(opcode) {
+            case 0x00:  /* PSHUFB */
+                nextop = F8;
+                GETEX(0);
+                GETGX;
+                eax1 = *GX;
+                for (int i=0; i<16; ++i) {
+                    if(EX->ub[i]&128)
+                        GX->ub[i] = 0;
+                    else
+                        GX->ub[i] = eax1.ub[EX->ub[i]&15];
+                }
+                break;
+            case 0x01:  /* PHADDW Gx, Ex */
+                nextop = F8;
+                GETEX(0);
+                GETGX;
+                for (int i=0; i<4; ++i)
+                    GX->sw[i] = GX->sw[i*2+0]+GX->sw[i*2+1];
+                if(GX == EX) {
+                    GX->q[1] = GX->q[0];
+                } else {
+                    for (int i=0; i<4; ++i)
+                        GX->sw[4+i] = EX->sw[i*2+0] + EX->sw[i*2+1];
+                }
+                break;
+            case 0x02:  /* PHADDD Gx, Ex */
+                nextop = F8;
+                GETEX(0);
+                GETGX;
+                GX->sd[0] += GX->sd[1];
+                GX->sd[1] = GX->sd[2] + GX->sd[3];
+                if(GX == EX) {
+                    GX->q[1] = GX->q[0];
+                } else {
+                    GX->sd[2] = EX->sd[0] + EX->sd[1];
+                    GX->sd[3] = EX->sd[2] + EX->sd[3];
+                }
+                break;
+            case 0x03:  /* PHADDSW Gx, Ex */
+                nextop = F8;
+                GETEX(0);
+                GETGX;
+                for (int i=0; i<4; ++i) {
+                    tmp32s = GX->sw[i*2+0]+GX->sw[i*2+1];
+                    GX->sw[i] = (tmp32s<-32768)?-32768:((tmp32s>32767)?32767:tmp32s);
+                }
+                if(GX == EX) {
+                    GX->q[1] = GX->q[0];
+                } else {
+                    for (int i=0; i<4; ++i) {
+                        tmp32s = EX->sw[i*2+0] + EX->sw[i*2+1];
+                        GX->sw[4+i] = (tmp32s<-32768)?-32768:((tmp32s>32767)?32767:tmp32s);
+                    }
+                }
+                break;
+            case 0x04:  /* PMADDUBSW Gx,Ex */
+                nextop = F8;
+                GETEX(0);
+                GETGX;
+                for (int i=0; i<8; ++i) {
+                    tmp32s = (int32_t)(GX->ub[i*2+0])*EX->sb[i*2+0] + (int32_t)(GX->ub[i*2+1])*EX->sb[i*2+1];
+                    GX->sw[i] = (tmp32s>32767)?32767:((tmp32s<-32768)?-32768:tmp32s);
+                }
+                break;
+            case 0x05:  /* PHSUBW Gx, Ex */
+                nextop = F8;
+                GETEX(0);
+                GETGX;
+                for (int i=0; i<4; ++i)
+                    GX->sw[i] = GX->sw[i*2+0] - GX->sw[i*2+1];
+                if(GX == EX) {
+                    GX->q[1] = GX->q[0];
+                } else {
+                    for (int i=0; i<4; ++i)
+                        GX->sw[4+i] = EX->sw[i*2+0] - EX->sw[i*2+1];
+                }
+                break;
+
+            case 0x08:  /* PSIGNB Gx, Ex */
+                nextop = F8;
+                GETEX(0);
+                GETGX;
+                for (int i=0; i<16; ++i)
+                    GX->sb[i] *= (EX->sb[i]<0)?-1:((EX->sb[i]>0)?1:0);
+                break;
+            case 0x09:  /* PSIGNW Gx, Ex */
+                nextop = F8;
+                GETEX(0);
+                GETGX;
+                for (int i=0; i<8; ++i)
+                    GX->sw[i] *= (EX->sw[i]<0)?-1:((EX->sw[i]>0)?1:0);
+                break;
+            case 0x0A:  /* PSIGND Gx, Ex */
+                nextop = F8;
+                GETEX(0);
+                GETGX;
+                for (int i=0; i<4; ++i)
+                    GX->sd[i] *= (EX->sd[i]<0)?-1:((EX->sd[i]>0)?1:0);
+                break;
+            case 0x0B:  /* PMULHRSW Gx, Ex */
+                nextop = F8;
+                GETEX(0);
+                GETGX;
+                for (int i=0; i<8; ++i) {
+                    tmp32s = ((((int32_t)(GX->sw[i])*(int32_t)(EX->sw[i]))>>14) + 1)>>1;
+                    GX->uw[i] = tmp32s&0xffff;
+                }
+                break;
+
+            case 0x14:  /* BLENDVPS Gx, Ex */
+                nextop = F8;
+                GETEX(0);
+                GETGX;
+                for (int i=0; i<4; ++i) {
+                    if(emu->xmm[0].ud[i]&0x80000000)
+                        GX->ud[i] = EX->ud[i];
+                }
+                break;
+
+            case 0x17:      // PTEST GX, EX
+                nextop = F8;
+                GETEX(0);
+                GETGX;
+                CONDITIONAL_SET_FLAG(!(GX->u128&EX->u128), F_ZF);
+                CONDITIONAL_SET_FLAG(!((~GX->u128)&EX->u128), F_CF);
+                break;
+
+            case 0x1C:  /* PABSB Gx, Ex */
+                nextop = F8;
+                GETEX(0);
+                GETGX;
+                for (int i=0; i<16; ++i) {
+                    GX->sb[i] = abs(EX->sb[i]);
+                }
+                break;
+            case 0x1D:  /* PABSW Gx, Ex */
+                nextop = F8;
+                GETEX(0);
+                GETGX;
+                for (int i=0; i<8; ++i) {
+                    GX->sw[i] = abs(EX->sw[i]);
+                }
+                break;
+            case 0x1E:  /* PABSD Gx, Ex */
+                nextop = F8;
+                GETEX(0);
+                GETGX;
+                for (int i=0; i<4; ++i) {
+                    GX->sd[i] = abs(EX->sd[i]);
+                }
+                break;
+
+            case 0x20:  /* PMOVSXBW Gx, Ex */
+                nextop = F8;
+                GETEX(0);
+                GETGX;
+                for(int i=7; i>=0; --i)
+                    GX->sw[i] = EX->sb[i];
+                break;
+            case 0x21:  /* PMOVSXBD Gx, Ex */
+                nextop = F8;
+                GETEX(0);
+                GETGX;
+                for(int i=3; i>=0; --i)
+                    GX->sd[i] = EX->sb[i];
+                break;
+            case 0x22:  /* PMOVSXBQ Gx, Ex */
+                nextop = F8;
+                GETEX(0);
+                GETGX;
+                for(int i=1; i>=0; --i)
+                    GX->sq[i] = EX->sb[i];
+                break;
+            case 0x23:  /* PMOVSXWD Gx, Ex */
+                nextop = F8;
+                GETEX(0);
+                GETGX;
+                for(int i=3; i>=0; --i)
+                    GX->sd[i] = EX->sw[i];
+                break;
+            case 0x24:  /* PMOVSXWQ Gx, Ex */
+                nextop = F8;
+                GETEX(0);
+                GETGX;
+                for(int i=1; i>=0; --i)
+                    GX->sq[i] = EX->sw[i];
+                break;
+            case 0x25:  /* PMOVSXDQ Gx, Ex */
+                nextop = F8;
+                GETEX(0);
+                GETGX;
+                for(int i=1; i>=0; --i)
+                    GX->sq[i] = EX->sd[i];
+                break;
+
+            case 0x39:  /* PMINSD Gx, Ex */
+                nextop = F8;
+                GETEX(0);
+                GETGX;
+                for(int i=0; i<4; ++i)
+                    if(GX->sd[i]>EX->sd[i])
+                        GX->sd[i] = EX->sd[i];
+                break;
+
+            case 0x3A:  /* PMAXSD Gx, Ex */
+                nextop = F8;
+                GETEX(0);
+                GETGX;
+                for(int i=0; i<4; ++i)
+                    if(GX->sd[i]<EX->sd[i])
+                        GX->sd[i] = EX->sd[i];
+                break;
+
+            case 0xDB:  /* AESIMC Gx, Ex */
+                nextop = F8;
+                GETEX(0);
+                GETGX;
+                //STATE ← InvMixColumns( STATE );
+                if (EX == GX) {
+                    for(int i=0; i<16; ++i)
+                        eax1.ub[i] = EX->ub[i];
+                    for(int j=0; j<4; ++j) {
+                        GX->ub[0+j*4] = ff_mult(0x0E, eax1.ub[0+j*4]) ^ ff_mult(0x0B, eax1.ub[1+j*4]) ^ ff_mult(0x0D, eax1.ub[2+j*4]) ^ ff_mult(0x09, eax1.ub[3+j*4]);
+                        GX->ub[1+j*4] = ff_mult(0x09, eax1.ub[0+j*4]) ^ ff_mult(0x0E, eax1.ub[1+j*4]) ^ ff_mult(0x0B, eax1.ub[2+j*4]) ^ ff_mult(0x0D, eax1.ub[3+j*4]);
+                        GX->ub[2+j*4] = ff_mult(0x0D, eax1.ub[0+j*4]) ^ ff_mult(0x09, eax1.ub[1+j*4]) ^ ff_mult(0x0E, eax1.ub[2+j*4]) ^ ff_mult(0x0B, eax1.ub[3+j*4]);
+                        GX->ub[3+j*4] = ff_mult(0x0B, eax1.ub[0+j*4]) ^ ff_mult(0x0D, eax1.ub[1+j*4]) ^ ff_mult(0x09, eax1.ub[2+j*4]) ^ ff_mult(0x0E, eax1.ub[3+j*4]);
+                    }
+                } else {
+                    for(int j=0; j<4; ++j) {
+                        GX->ub[0+j*4] = ff_mult(0x0E, EX->ub[0+j*4]) ^ ff_mult(0x0B, EX->ub[1+j*4]) ^ ff_mult(0x0D, EX->ub[2+j*4]) ^ ff_mult(0x09, EX->ub[3+j*4]);
+                        GX->ub[1+j*4] = ff_mult(0x09, EX->ub[0+j*4]) ^ ff_mult(0x0E, EX->ub[1+j*4]) ^ ff_mult(0x0B, EX->ub[2+j*4]) ^ ff_mult(0x0D, EX->ub[3+j*4]);
+                        GX->ub[2+j*4] = ff_mult(0x0D, EX->ub[0+j*4]) ^ ff_mult(0x09, EX->ub[1+j*4]) ^ ff_mult(0x0E, EX->ub[2+j*4]) ^ ff_mult(0x0B, EX->ub[3+j*4]);
+                        GX->ub[3+j*4] = ff_mult(0x0B, EX->ub[0+j*4]) ^ ff_mult(0x0D, EX->ub[1+j*4]) ^ ff_mult(0x09, EX->ub[2+j*4]) ^ ff_mult(0x0E, EX->ub[3+j*4]);
+                    }
+                }
+                break;
+            case 0xDC:  /* AESENC Gx, Ex */
+                nextop = F8;
+                GETEX(0);
+                GETGX;
+                //STATE ← SRC1;
+                //RoundKey ← SRC2;
+                //STATE ← ShiftRows( STATE );
+                for(int i=0; i<16; ++i)
+                    eax1.ub[i] = GX->ub[shiftrows[i]];
+                //STATE ← SubBytes( STATE );
+                for(int i=0; i<16; ++i)
+                    eax1.ub[i] = subbytes[eax1.ub[i]];
+                //STATE ← MixColumns( STATE );
+                for(int j=0; j<4; ++j) {
+                    GX->ub[0+j*4] = ff_mult(0x02, eax1.ub[0+j*4]) ^ ff_mult(0x03, eax1.ub[1+j*4]) ^               eax1.ub[2+j*4]  ^               eax1.ub[3+j*4] ;
+                    GX->ub[1+j*4] =               eax1.ub[0+j*4]  ^ ff_mult(0x02, eax1.ub[1+j*4]) ^ ff_mult(0x03, eax1.ub[2+j*4]) ^               eax1.ub[3+j*4] ;
+                    GX->ub[2+j*4] =               eax1.ub[0+j*4]  ^               eax1.ub[1+j*4]  ^ ff_mult(0x02, eax1.ub[2+j*4]) ^ ff_mult(0x03, eax1.ub[3+j*4]);
+                    GX->ub[3+j*4] = ff_mult(0x03, eax1.ub[0+j*4]) ^               eax1.ub[1+j*4]  ^               eax1.ub[2+j*4]  ^ ff_mult(0x02, eax1.ub[3+j*4]);
+                }
+                //DEST[127:0] ← STATE XOR RoundKey;
+                GX->q[0] ^= EX->q[0];
+                GX->q[1] ^= EX->q[1];
+                break;
+            case 0xDD:  /* AESENCLAST Gx, Ex */
+                nextop = F8;
+                GETEX(0);
+                GETGX;
+                //STATE ← SRC1;
+                //RoundKey ← SRC2;
+                //STATE ← ShiftRows( STATE );
+                for(int i=0; i<16; ++i)
+                    eax1.ub[i] = GX->ub[shiftrows[i]];
+                //STATE ← SubBytes( STATE );
+                for(int i=0; i<16; ++i)
+                    GX->ub[i] = subbytes[eax1.ub[i]];
+                //DEST[127:0] ← STATE XOR RoundKey;
+                GX->q[0] ^= EX->q[0];
+                GX->q[1] ^= EX->q[1];
+                break;
+            case 0xDE:  /* AESDEC Gx, Ex */
+                nextop = F8;
+                GETEX(0);
+                GETGX;
+                //STATE ← SRC1;
+                //RoundKey ← SRC2;
+                //STATE ← InvShiftRows( STATE );
+                for(int i=0; i<16; ++i)
+                    eax1.ub[i] = GX->ub[invshiftrows[i]];
+                //STATE ← InvSubBytes( STATE );
+                for(int i=0; i<16; ++i)
+                    eax1.ub[i] = invsubbytes[eax1.ub[i]];
+                //STATE ← InvMixColumns( STATE );
+                for(int j=0; j<4; ++j) {
+                    GX->ub[0+j*4] = ff_mult(0x0E, eax1.ub[0+j*4]) ^ ff_mult(0x0B, eax1.ub[1+j*4]) ^ ff_mult(0x0D, eax1.ub[2+j*4]) ^ ff_mult(0x09, eax1.ub[3+j*4]);
+                    GX->ub[1+j*4] = ff_mult(0x09, eax1.ub[0+j*4]) ^ ff_mult(0x0E, eax1.ub[1+j*4]) ^ ff_mult(0x0B, eax1.ub[2+j*4]) ^ ff_mult(0x0D, eax1.ub[3+j*4]);
+                    GX->ub[2+j*4] = ff_mult(0x0D, eax1.ub[0+j*4]) ^ ff_mult(0x09, eax1.ub[1+j*4]) ^ ff_mult(0x0E, eax1.ub[2+j*4]) ^ ff_mult(0x0B, eax1.ub[3+j*4]);
+                    GX->ub[3+j*4] = ff_mult(0x0B, eax1.ub[0+j*4]) ^ ff_mult(0x0D, eax1.ub[1+j*4]) ^ ff_mult(0x09, eax1.ub[2+j*4]) ^ ff_mult(0x0E, eax1.ub[3+j*4]);
+                }
+                //DEST[127:0] ← STATE XOR RoundKey;
+                GX->q[0] ^= EX->q[0];
+                GX->q[1] ^= EX->q[1];
+                break;
+            case 0xDF:  /* AESDECLAST Gx, Ex */
+                nextop = F8;
+                GETEX(0);
+                GETGX;
+                //STATE ← SRC1;
+                //RoundKey ← SRC2;
+                //STATE ← InvShiftRows( STATE );
+                for(int i=0; i<16; ++i)
+                    eax1.ub[i] = GX->ub[invshiftrows[i]];
+                //STATE ← InvSubBytes( STATE );
+                for(int i=0; i<16; ++i)
+                    GX->ub[i] = invsubbytes[eax1.ub[i]];
+                //DEST[127:0] ← STATE XOR RoundKey;
+                GX->q[0] ^= EX->q[0];
+                GX->q[1] ^= EX->q[1];
+                break;
+
+            default:
+                return 1;
+        }
+        break;
+
+    case 0x3A:  // these are some SSE3 & SSE4.x opcodes
+        opcode = F8;
+        switch(opcode) {
+            case 0x0A:          // ROUNDSS Gx, Ex, u8
+                nextop = F8;
+                GETEX(1);
+                GETGX;
+                tmp8u = F8; // ignoring bit 3 interupt thingy
+                if(tmp8u&4)
+                    tmp8u = (emu->mxcsr>>13)&3;
+                else
+                    tmp8u &= 3;
+                switch(tmp8u) {
+                    case ROUND_Nearest:
+                        GX->f[0] = floor(EX->f[0]+0.5);
+                        break;
+                    case ROUND_Down:
+                        GX->f[0] = floor(EX->f[0]);
+                        break;
+                    case ROUND_Up:
+                        GX->f[0] = ceil(EX->f[0]);
+                        break;
+                    case ROUND_Chop:
+                        GX->f[0] = EX->f[0];
+                        break;
+                }
+                break;
+            case 0x0B:          // ROUNDSD Gx, Ex, u8
+                nextop = F8;
+                GETEX(1);
+                GETGX;
+                tmp8u = F8; // ignoring bit 3 interupt thingy
+                if(tmp8u&4)
+                    tmp8u = (emu->mxcsr>>13)&3;
+                else
+                    tmp8u &= 3;
+                switch(tmp8u) {
+                    case ROUND_Nearest:
+                        GX->d[0] = floor(EX->d[0]+0.5);
+                        break;
+                    case ROUND_Down:
+                        GX->d[0] = floor(EX->d[0]);
+                        break;
+                    case ROUND_Up:
+                        GX->d[0] = ceil(EX->d[0]);
+                        break;
+                    case ROUND_Chop:
+                        GX->d[0] = EX->d[0];
+                        break;
+                }
+                break;
+
+            case 0x0E:  /* PBLENDW Gx, Ex, Ib */
+                nextop = F8;
+                GETEX(1);
+                GETGX;
+                tmp8u = F8;
+                for (int i=0; i<8; ++i) {
+                    if(tmp8u&(1<<i))
+                        GX->uw[i] = EX->uw[i];
+                }
+                break;
+            case 0x0F:          // PALIGNR GX, EX, u8
+                nextop = F8;
+                GETEX(1);
+                GETGX;
+                tmp8u = F8;
+                if(tmp8u>31)
+                    {GX->q[0] = GX->q[1] = 0;}
+                else
+                {
+                    for (int i=0; i<16; ++i, ++tmp8u)
+                        eax1.ub[i] = (tmp8u>15)?((tmp8u>31)?0:GX->ub[tmp8u-16]):EX->ub[tmp8u];
+                    GX->q[0] = eax1.q[0];
+                    GX->q[1] = eax1.q[1];
+                }
+                break;
+
+            case 0x17:      // EXTRACTPS ED, GX, u8
+                nextop = F8;
+                GETED(1);
+                GETGX;
+                tmp8u = F8;
+                ED->dword[0] = GX->ud[tmp8u&3];
+                if(MODREG && rex.w) ED->dword[1] = 0;
+                break;
+
+            case 0x20:      // PINSRB GX, ED, u8
+                nextop = F8;
+                GETED(1);
+                GETGX;
+                tmp8u = F8;
+                GX->ub[tmp8u&0xf] = ED->byte[0];
+                break;
+            case 0x21:      // INSERTPS GX, EX, u8
+                nextop = F8;
+                GETEX(1);
+                GETGX;
+                tmp8u = F8;
+                if(MODREG) tmp8s = (tmp8u>>6)&3; else tmp8s = 0;
+                GX->ud[(tmp8u>>4)&3] = EX->ud[tmp8s];
+                for(int i=0; i<4; ++i)
+                    if(tmp8u&(1<<i))
+                        GX->ud[i] = 0;
+                break;
+            case 0x22:      // PINSRD GX, ED, u8
+                nextop = F8;
+                GETED(1);
+                GETGX;
+                tmp8u = F8;
+                if(rex.w)
+                    GX->q[tmp8u&0x1] = ED->q[0];
+                else
+                    GX->ud[tmp8u&0x3] = ED->dword[0];
+                break;
+
+            case 0x40:  /* DPPS Gx, Ex, Ib */
+                nextop = F8;
+                GETEX(1);
+                GETGX;
+                tmp8u = F8;
+                tmpf = 0.0f;
+                for(int i=0; i<4; ++i)
+                    if(tmp8u&(1<<(i+4)))
+                        tmpf += GX->f[i]*EX->f[i];
+                for(int i=0; i<4; ++i)
+                    GX->f[i] = (tmp8u&(1<<i))?tmpf:0.0f;
+                break;
+
+            case 0xDF:      // AESKEYGENASSIST Gx, Ex, u8
+                nextop = F8;
+                GETEX(1);
+                GETGX;
+                tmp32u = F8;
+                for (int i = 4; i < 8; ++i)
+                    GX->ub[i] = subbytes[EX->ub[i]];
+                for (int i = 12; i < 16; ++i)
+                    GX->ub[i] = subbytes[EX->ub[i]];
+                GX->ud[0] = GX->ud[1];
+                tmp8u = GX->ub[4];
+                GX->ud[1] = GX->ud[1] >> 8;
+                GX->ub[7] = tmp8u;
+                GX->ud[1] ^= tmp32u;
+                GX->ud[2] = GX->ud[3];
+                tmp8u = GX->ub[12];
+                GX->ud[3] = GX->ud[3] >> 8;
+                GX->ub[15] = tmp8u;
+                GX->ud[3] ^= tmp32u;
+                break;
+
+            default:
+                return 1;
+        }
+        break;
+        
     GOCOND(0x40
         , nextop = F8;
         CHECK_FLAGS(emu);
@@ -598,6 +1153,18 @@ int Run660F(x64emu_t *emu, rex_t rex)
             GX->ud[i] = (GX->ud[i]==EX->ud[i])?0xffffffff:0;
         break;
 
+    case 0x7C:  /* HADDPD Gx, Ex */
+        nextop = F8;
+        GETEX(0);
+        GETGX;
+        GX->d[0] += GX->d[1];
+        if(EX==GX) {
+            GX->d[1] = GX->d[0];
+        } else {
+            GX->d[1] = EX->d[0] + EX->d[1];
+        }
+        break;
+
     case 0x7E:                      /* MOVD Ed, Gx */
         nextop = F8;
         GETED(0);
@@ -624,13 +1191,20 @@ int Run660F(x64emu_t *emu, rex_t rex)
         nextop = F8;
         GETEW(0);
         GETGW;
+        tmp32s = rex.w?GW->sdword[0]:GW->sword[0];
+        tmp8u=tmp32s&(rex.w?63:15);
+        tmp32s >>= (rex.w?6:4);
+        if(!MODREG)
+        {
+            EW=(reg64_t*)(((uintptr_t)(EW))+(tmp32s<<(rex.w?3:1)));
+        }
         if(rex.w) {
-            if(EW->q[0] & (1LL<<(GW->q[0]&63)))
+            if(EW->q[0] & (1LL<<tmp8u))
                 SET_FLAG(F_CF);
             else
                 CLEAR_FLAG(F_CF);
         } else {
-            if(EW->word[0] & (1<<(GW->word[0]&15)))
+            if(EW->word[0] & (1<<tmp8u))
                 SET_FLAG(F_CF);
             else
                 CLEAR_FLAG(F_CF);
@@ -656,18 +1230,25 @@ int Run660F(x64emu_t *emu, rex_t rex)
         nextop = F8;
         GETEW(0);
         GETGW;
+        tmp32s = rex.w?GW->sdword[0]:GW->sword[0];
+        tmp8u=tmp32s&(rex.w?63:15);
+        tmp32s >>= (rex.w?6:4);
+        if(!MODREG)
+        {
+            EW=(reg64_t*)(((uintptr_t)(EW))+(tmp32s<<(rex.w?3:1)));
+        }
         if(rex.w) {
-            if(EW->q[0] & (1LL<<(GW->q[0]&63)))
+            if(EW->q[0] & (1LL<<tmp8u))
                 SET_FLAG(F_CF);
             else {
-                EW->q[0] |= (1LL<<(GW->q[0]&63));
+                EW->q[0] |= (1LL<<tmp8u);
                 CLEAR_FLAG(F_CF);
             }
         } else {
-            if(EW->word[0] & (1<<(GW->word[0]&15)))
+            if(EW->word[0] & (1<<tmp8u))
                 SET_FLAG(F_CF);
             else {
-                EW->word[0] |= (1<<(GW->word[0]&15));
+                EW->word[0] |= (1<<tmp8u);
                 CLEAR_FLAG(F_CF);
             }
         }
@@ -723,31 +1304,157 @@ int Run660F(x64emu_t *emu, rex_t rex)
         nextop = F8;
         GETEW(0);
         GETGW;
+        tmp32s = rex.w?GW->sdword[0]:GW->sword[0];
+        tmp8u=tmp32s&(rex.w?63:15);
+        tmp32s >>= (rex.w?6:4);
+        if(!MODREG)
+        {
+            EW=(reg64_t*)(((uintptr_t)(EW))+(tmp32s<<(rex.w?3:1)));
+        }
         if(rex.w) {
-            if(EW->q[0] & (1LL<<(GW->q[0]&63))) {
+            if(EW->q[0] & (1LL<<tmp8u)) {
                 SET_FLAG(F_CF);
-                EW->q[0] ^= (1LL<<(GW->q[0]&63));
+                EW->q[0] ^= (1LL<<tmp8u);
             } else
                 CLEAR_FLAG(F_CF);
         } else {
-            if(EW->word[0] & (1<<(GW->word[0]&15))) {
+            if(EW->word[0] & (1<<tmp8u)) {
                 SET_FLAG(F_CF);
-                EW->word[0] ^= (1<<(GW->word[0]&15));
+                EW->word[0] ^= (1<<tmp8u);
             } else
                 CLEAR_FLAG(F_CF);
         }
         break;
 
+    case 0xB6:                      /* MOVZX Gw,Eb */
+        nextop = F8;
+        GETEB(0);
+        GETGW;
+        GW->word[0] = EB->byte[0];
+        break;
+    case 0xB7:                      /* MOVZX Gw,Ew */
+        nextop = F8;
+        GETEW(0);
+        GETGW;
+        GW->word[0] = EW->word[0];
+        break;
+
+    case 0xBA:                      
+        nextop = F8;
+        switch((nextop>>3)&7) {
+            case 4:                 /* BT Ew,Ib */
+                CHECK_FLAGS(emu);
+                GETEW(0);
+                GETGW;
+                tmp8u = F8;
+                if(rex.w) {
+                    tmp8u&=63;
+                    if(ED->q[0] & (1LL<<tmp8u))
+                        SET_FLAG(F_CF);
+                    else
+                        CLEAR_FLAG(F_CF);
+                } else {
+                    tmp8u&=15;
+                    if(EW->word[0] & (1<<tmp8u))
+                        SET_FLAG(F_CF);
+                    else
+                        CLEAR_FLAG(F_CF);
+                }
+                break;
+            case 5:             /* BTS Ew, Ib */
+                CHECK_FLAGS(emu);
+                GETEW(0);
+                GETGW;
+                tmp8u = F8;
+                if(rex.w) {
+                    tmp8u&=63;
+                    if(ED->q[0] & (1LL<<tmp8u)) {
+                        SET_FLAG(F_CF);
+                    } else {
+                        ED->q[0] ^= (1LL<<tmp8u);
+                        CLEAR_FLAG(F_CF);
+                    }
+                } else {
+                    tmp8u&=15;
+                    if(EW->word[0] & (1<<tmp8u)) {
+                        SET_FLAG(F_CF);
+                    } else {
+                        EW->word[0] ^= (1<<tmp8u);
+                        CLEAR_FLAG(F_CF);
+                    }
+                }
+                break;
+            case 6:             /* BTR Ew, Ib */
+                CHECK_FLAGS(emu);
+                GETEW(0);
+                GETGW;
+                tmp8u = F8;
+                if(rex.w) {
+                    tmp8u&=63;
+                    if(ED->q[0] & (1LL<<tmp8u)) {
+                        SET_FLAG(F_CF);
+                        ED->q[0] ^= (1LL<<tmp8u);
+                    } else
+                        CLEAR_FLAG(F_CF);
+                } else {
+                    tmp8u&=15;
+                    if(EW->word[0] & (1<<tmp8u)) {
+                        SET_FLAG(F_CF);
+                        EW->word[0] ^= (1<<tmp8u);
+                    } else
+                        CLEAR_FLAG(F_CF);
+                }
+                break;
+            case 7:             /* BTC Ew, Ib */
+                CHECK_FLAGS(emu);
+                GETEW(0);
+                GETGW;
+                tmp8u = F8;
+                if(rex.w) {
+                    tmp8u&=63;
+                    if(ED->q[0] & (1LL<<tmp8u))
+                        SET_FLAG(F_CF);
+                    else
+                        CLEAR_FLAG(F_CF);
+                    ED->q[0] ^= (1LL<<tmp8u);
+                } else {
+                    tmp8u&=15;
+                    if(EW->word[0] & (1<<tmp8u))
+                        SET_FLAG(F_CF);
+                    else
+                        CLEAR_FLAG(F_CF);
+                    EW->word[0] ^= (1<<tmp8u);
+                }
+                break;
+            default:
+                return 1;
+        }
+        break;
     case 0xBB:                      /* BTC Ew,Gw */
         CHECK_FLAGS(emu);
         nextop = F8;
         GETEW(0);
         GETGW;
-        if(EW->word[0] & (1<<(GW->word[0]&15)))
-            SET_FLAG(F_CF);
-        else
-            CLEAR_FLAG(F_CF);
-        EW->word[0] ^= (1<<(GW->word[0]&15));
+        tmp32s = rex.w?GW->sdword[0]:GW->sword[0];
+        tmp8u=tmp32s&(rex.w?63:15);
+        tmp32s >>= (rex.w?6:4);
+        if(!MODREG)
+        {
+            EW=(reg64_t*)(((uintptr_t)(EW))+(tmp32s<<(rex.w?3:1)));
+        }
+        if(rex.w) {
+            if(EW->q[0] & (1LL<<tmp8u))
+                SET_FLAG(F_CF);
+            else
+                CLEAR_FLAG(F_CF);
+            EW->q[0] ^= (1LL<<tmp8u);
+        } else {
+            if(EW->word[0] & (1<<tmp8u))
+                SET_FLAG(F_CF);
+            else
+                CLEAR_FLAG(F_CF);
+            EW->word[0] ^= (1<<tmp8u);
+        }
         break;
     case 0xBC:                      /* BSF Ew,Gw */
         CHECK_FLAGS(emu);
@@ -848,6 +1555,20 @@ int Run660F(x64emu_t *emu, rex_t rex)
         }
         break;
 
+    case 0xC4:  /* PINSRW Gx,Ew,Ib */
+        nextop = F8;
+        GETED(1);
+        GETGX;
+        tmp8u = F8;
+        GX->uw[tmp8u&7] = ED->word[0];   // only low 16bits
+        break;
+    case 0xC5:  /* PEXTRW Gw,Ex,Ib */
+        nextop = F8;
+        GETEX(1);
+        GETGD;
+        tmp8u = F8;
+        GD->dword[0] = EX->uw[tmp8u&7];  // 16bits extract, 0 extended
+        break;
     case 0xC6:  /* SHUFPD Gx, Ex, Ib */
         nextop = F8;
         GETEX(1);
@@ -859,6 +1580,22 @@ int Run660F(x64emu_t *emu, rex_t rex)
         GX->q[1] = eax1.q[1];
         break;
 
+    case 0xC8:
+    case 0xC9:
+    case 0xCA:
+    case 0xCB:
+    case 0xCC:
+    case 0xCD:
+    case 0xCE:
+    case 0xCF:                  /* BSWAP reg16 */
+        tmp8u = (opcode&7)+(rex.b<<3);
+        if(rex.w) {
+            emu->regs[tmp8u].q[0] = __builtin_bswap64(emu->regs[tmp8u].q[0]);
+        } else {
+            emu->regs[tmp8u].word[0] = __builtin_bswap16(emu->regs[tmp8u].word[0]);
+        }
+        break;
+
     case 0xD1:  /* PSRLW Gx, Ex */
         nextop = F8;
         GETEX(0);
@@ -1020,7 +1757,24 @@ int Run660F(x64emu_t *emu, rex_t rex)
         for (int i=0; i<8; ++i)
             GX->uw[i] = ((uint32_t)GX->uw[i] + EX->uw[i] + 1)>>1;
         break;
-
+    case 0xE4:  /* PMULHUW Gx, Ex */
+        nextop = F8;
+        GETEX(0);
+        GETGX;
+        for(int i=0; i<8; ++i) {
+            tmp32u = (uint32_t)GX->uw[i] * EX->uw[i];
+            GX->uw[i] = (tmp32u>>16)&0xffff;
+        }
+        break;
+    case 0xE5:  /* PMULHW Gx, Ex */
+        nextop = F8;
+        GETEX(0);
+        GETGX;
+        for(int i=0; i<8; ++i) {
+            tmp32s = (int32_t)GX->sw[i] * EX->sw[i];
+            GX->uw[i] = (tmp32s>>16)&0xffff;
+        }
+        break;
     case 0xE6:  /* CVTTPD2DQ Gx, Ex */
         nextop = F8;
         GETEX(0);

src/emu/x64run6664.c

@@ -27,6 +27,7 @@ int Run6664(x64emu_t *emu, rex_t rex)
     uint8_t opcode;
     uint8_t nextop;
     reg64_t *oped, *opgd;
+    sse_regs_t *opex, *opgx;
     uintptr_t tlsdata = GetFSBaseEmu(emu);
 
     opcode = F8;
@@ -39,6 +40,33 @@ int Run6664(x64emu_t *emu, rex_t rex)
 
     switch(opcode) {
 
+        case 0x0F:
+            opcode = F8;
+            switch(opcode) {
+                case 0xD6:                      /* MOVQ Ex,Gx */
+                    nextop = F8;
+                    GETEX_OFFS(0, tlsdata);
+                    GETGX;
+                    EX->q[0] = GX->q[0];
+                    if(MODREG)
+                        EX->q[1] = 0;
+                    break;
+
+                default:
+                    return 1;
+            }
+            break;
+
+        case 0x89:                              /* MOV Ew,Gw */
+            nextop = F8;
+            GETEW_OFFS(0, tlsdata);
+            GETGW;
+            if(rex.w)
+                EW->q[0] = GW->q[0];
+            else
+                EW->word[0] = GW->word[0];
+            break;
+
         case 0x8B:                      /* MOV Gd,Ed */
             nextop = F8;
             GETEW_OFFS(0, tlsdata);

src/emu/x64run66f0.c

@@ -0,0 +1,133 @@
+#define _GNU_SOURCE
+#include <stdint.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <math.h>
+#include <string.h>
+#include <signal.h>
+#include <sys/types.h>
+#include <unistd.h>
+
+#include "debug.h"
+#include "box64stack.h"
+#include "x64emu.h"
+#include "x64run.h"
+#include "x64emu_private.h"
+#include "x64run_private.h"
+#include "x64primop.h"
+#include "x64trace.h"
+#include "x87emu_private.h"
+#include "box64context.h"
+#include "bridge.h"
+#include "dynarec/arm64_lock.h"
+
+#include "modrm.h"
+
+int Run66F0(x64emu_t *emu, rex_t rex)
+{
+    uint8_t opcode;
+    uint8_t nextop;
+    uint16_t tmp16u, tmp16u2;
+    int32_t tmp32s;
+    int64_t tmp64s;
+    uint64_t tmp64u, tmp64u2;
+    reg64_t *oped, *opgd;
+
+    opcode = F8;
+    // REX prefix before the F0 are ignored
+    rex.rex = 0;
+    while(opcode>=0x40 && opcode<=0x4f) {
+        rex.rex = opcode;
+        opcode = F8;
+    }
+
+    if(rex.w) return RunF0(emu, rex);
+
+    switch(opcode) {
+        
+        case 0x0F:
+            nextop = F8;
+            switch(nextop) {
+
+                case 0xB1:                      /* CMPXCHG Ew,Gw */
+                    nextop = F8;
+                    GETEW(0);
+                    GETGW;
+#ifdef DYNAREC
+                    do {
+                        tmp16u = arm64_lock_read_h(EW);
+                        cmp16(emu, R_AX, tmp16u);
+                        if(ACCESS_FLAG(F_ZF)) {
+                            tmp32s = arm64_lock_write_h(EW, GW->word[0]);
+                        } else {
+                            R_AX = tmp16u;
+                            tmp32s = 0;
+                        }
+                    } while(tmp32s);
+#else
+                    pthread_mutex_lock(&emu->context->mutex_lock);
+                    cmp16(emu, R_AX, EW->word[0]);
+                    if(ACCESS_FLAG(F_ZF)) {
+                        EW->word[0] = GW->word[0];
+                    } else {
+                        R_AX = EW->word[0];
+                    }
+                    pthread_mutex_unlock(&emu->context->mutex_lock);
+#endif
+                    break;
+
+                default:
+                    return 1;
+            }
+            break;
+
+        case 0x81:              /* GRP Ew,Iw */
+        case 0x83:              /* GRP Ew,Ib */
+            nextop = F8;
+            GETED((opcode==0x83)?1:2);
+            tmp64s = (opcode==0x83)?(F8S):(F16S);
+            tmp64u = (uint64_t)tmp64s;
+#ifdef DYNAREC
+            if(MODREG)
+                switch((nextop>>3)&7) {
+                    case 0: ED->word[0] = add16(emu, ED->word[0], tmp64u); break;
+                    case 1: ED->word[0] =  or16(emu, ED->word[0], tmp64u); break;
+                    case 2: ED->word[0] = adc16(emu, ED->word[0], tmp64u); break;
+                    case 3: ED->word[0] = sbb16(emu, ED->word[0], tmp64u); break;
+                    case 4: ED->word[0] = and16(emu, ED->word[0], tmp64u); break;
+                    case 5: ED->word[0] = sub16(emu, ED->word[0], tmp64u); break;
+                    case 6: ED->word[0] = xor16(emu, ED->word[0], tmp64u); break;
+                    case 7:            cmp16(emu, ED->word[0], tmp64u); break;
+                }
+            else
+                switch((nextop>>3)&7) {
+                    case 0: do { tmp16u2 = arm64_lock_read_h(ED); tmp16u2 = add16(emu, tmp16u2, tmp64u);} while(arm64_lock_write_h(ED, tmp16u2)); break;
+                    case 1: do { tmp16u2 = arm64_lock_read_h(ED); tmp16u2 =  or16(emu, tmp16u2, tmp64u);} while(arm64_lock_write_h(ED, tmp16u2)); break;
+                    case 2: do { tmp16u2 = arm64_lock_read_h(ED); tmp16u2 = adc16(emu, tmp16u2, tmp64u);} while(arm64_lock_write_h(ED, tmp16u2)); break;
+                    case 3: do { tmp16u2 = arm64_lock_read_h(ED); tmp16u2 = sbb16(emu, tmp16u2, tmp64u);} while(arm64_lock_write_h(ED, tmp16u2)); break;
+                    case 4: do { tmp16u2 = arm64_lock_read_h(ED); tmp16u2 = and16(emu, tmp16u2, tmp64u);} while(arm64_lock_write_h(ED, tmp16u2)); break;
+                    case 5: do { tmp16u2 = arm64_lock_read_h(ED); tmp16u2 = sub16(emu, tmp16u2, tmp64u);} while(arm64_lock_write_h(ED, tmp16u2)); break;
+                    case 6: do { tmp16u2 = arm64_lock_read_h(ED); tmp16u2 = xor16(emu, tmp16u2, tmp64u);} while(arm64_lock_write_h(ED, tmp16u2)); break;
+                    case 7:                                                 cmp16(emu, ED->word[0], tmp64u); break;
+                }
+#else
+            pthread_mutex_lock(&emu->context->mutex_lock);
+            switch((nextop>>3)&7) {
+                case 0: ED->word[0] = add16(emu, ED->word[0], tmp64u); break;
+                case 1: ED->word[0] =  or16(emu, ED->word[0], tmp64u); break;
+                case 2: ED->word[0] = adc16(emu, ED->word[0], tmp64u); break;
+                case 3: ED->word[0] = sbb16(emu, ED->word[0], tmp64u); break;
+                case 4: ED->word[0] = and16(emu, ED->word[0], tmp64u); break;
+                case 5: ED->word[0] = sub16(emu, ED->word[0], tmp64u); break;
+                case 6: ED->word[0] = xor16(emu, ED->word[0], tmp64u); break;
+                case 7:               cmp16(emu, ED->word[0], tmp64u); break;
+            }
+            pthread_mutex_unlock(&emu->context->mutex_lock);
+#endif
+            break;
+
+       default:
+            return 1;
+    }
+    return 0;
+}

src/emu/x64run67.c

@@ -22,23 +22,144 @@
 
 #include "modrm.h"
 
-int Run67(x64emu_t *emu, rex_t rex)
+int Run67(x64emu_t *emu, rex_t rex, int rep)
 {
     uint8_t opcode;
     uint8_t nextop;
     int8_t tmp8s;
+    uint8_t tmp8u;
+    uint32_t tmp32u;
+    int32_t tmp32s;
+    uint64_t tmp64u;
     reg64_t *oped, *opgd;
 
     opcode = F8;
 
-    // REX prefix before the F0 are ignored
+    while(opcode==0x67)
+        opcode = F8;
+
+    // REX prefix before the 67 are ignored
     rex.rex = 0;
     while(opcode>=0x40 && opcode<=0x4f) {
         rex.rex = opcode;
         opcode = F8;
     }
+    while((opcode==0xF2) || (opcode==0xF3)) {
+        rep = opcode-0xF1;
+        opcode = F8;
+    }
 
     switch(opcode) {
+    #define GO(B, OP)                                   \
+    case B+0:                                           \
+        nextop = F8;                                    \
+        GETEB32(0);                                     \
+        GETGB;                                          \
+        EB->byte[0] = OP##8(emu, EB->byte[0], GB);      \
+        break;                                          \
+    case B+1:                                           \
+        nextop = F8;                                    \
+        GETED32(0);                                     \
+        GETGD;                                          \
+        if(rex.w)                                       \
+            ED->q[0] = OP##64(emu, ED->q[0], GD->q[0]); \
+        else {                                          \
+            if(MODREG)                                  \
+                ED->q[0] = OP##32(emu, ED->dword[0], GD->dword[0]);     \
+            else                                                        \
+                ED->dword[0] = OP##32(emu, ED->dword[0], GD->dword[0]); \
+        }                                               \
+        break;                                          \
+    case B+2:                                           \
+        nextop = F8;                                    \
+        GETEB32(0);                                     \
+        GETGB;                                          \
+        GB = OP##8(emu, GB, EB->byte[0]);               \
+        break;                                          \
+    case B+3:                                           \
+        nextop = F8;                                    \
+        GETED32(0);                                     \
+        GETGD;                                          \
+        if(rex.w)                                       \
+            GD->q[0] = OP##64(emu, GD->q[0], ED->q[0]); \
+        else                                            \
+            GD->q[0] = OP##32(emu, GD->dword[0], ED->dword[0]); \
+        break;                                          \
+    case B+4:                                           \
+        R_AL = OP##8(emu, R_AL, F8);                    \
+        break;                                          \
+    case B+5:                                           \
+        if(rex.w)                                       \
+            R_RAX = OP##64(emu, R_RAX, F32S64);         \
+        else                                            \
+            R_RAX = OP##32(emu, R_EAX, F32);            \
+        break;
+
+    GO(0x00, add)                   /* ADD 0x00 -> 0x05 */
+    GO(0x08, or)                    /*  OR 0x08 -> 0x0D */
+    case 0x0F:
+        return Run670F(emu, rex, rep);
+    GO(0x10, adc)                   /* ADC 0x10 -> 0x15 */
+    GO(0x18, sbb)                   /* SBB 0x18 -> 0x1D */
+    GO(0x20, and)                   /* AND 0x20 -> 0x25 */
+    GO(0x28, sub)                   /* SUB 0x28 -> 0x2D */
+    GO(0x30, xor)                   /* XOR 0x30 -> 0x35 */
+    #undef GO
+
+    case 0x66:
+        return Run6766(emu, rex, rep);
+
+    case 0x80:                      /* GRP Eb,Ib */
+        nextop = F8;
+        GETEB32(1);
+        tmp8u = F8;
+        switch((nextop>>3)&7) {
+            case 0: EB->byte[0] = add8(emu, EB->byte[0], tmp8u); break;
+            case 1: EB->byte[0] =  or8(emu, EB->byte[0], tmp8u); break;
+            case 2: EB->byte[0] = adc8(emu, EB->byte[0], tmp8u); break;
+            case 3: EB->byte[0] = sbb8(emu, EB->byte[0], tmp8u); break;
+            case 4: EB->byte[0] = and8(emu, EB->byte[0], tmp8u); break;
+            case 5: EB->byte[0] = sub8(emu, EB->byte[0], tmp8u); break;
+            case 6: EB->byte[0] = xor8(emu, EB->byte[0], tmp8u); break;
+            case 7:               cmp8(emu, EB->byte[0], tmp8u); break;
+        }
+        break;
+
+    case 0x88:                      /* MOV Eb,Gb */
+        nextop = F8;
+        GETEB32(0);
+        GETGB;
+        EB->byte[0] = GB;
+        break;
+    case 0x89:                    /* MOV Ed,Gd */
+        nextop = F8;
+        GETED32(0);
+        GETGD;
+        if(rex.w) {
+            ED->q[0] = GD->q[0];
+        } else {
+            //if ED is a reg, than the opcode works like movzx
+            if(MODREG)
+                ED->q[0] = GD->dword[0];
+            else
+                ED->dword[0] = GD->dword[0];
+        }
+        break;
+    case 0x8A:                      /* MOV Gb,Eb */
+        nextop = F8;
+        GETEB32(0);
+        GETGB;
+        GB = EB->byte[0];
+        break;
+    case 0x8B:                      /* MOV Gd,Ed */
+        nextop = F8;
+        GETED32(0);
+        GETGD;
+        if(rex.w)
+            GD->q[0] = ED->q[0];
+        else
+            GD->q[0] = ED->dword[0];
+        break;
 
     case 0x8D:                      /* LEA Gd,M */
         nextop = F8;
@@ -47,7 +168,48 @@ int Run67(x64emu_t *emu, rex_t rex)
         if(rex.w)
             GD->q[0] = (uint64_t)ED;
         else
-            GD->q[0] = (uint32_t)(uintptr_t)ED;
+            GD->q[0] = ((uintptr_t)ED)&0xffffffff;
+        break;
+
+    case 0xC1:                      /* GRP2 Ed,Ib */
+        nextop = F8;
+        GETED32(1);
+        tmp8u = F8/* & 0x1f*/; // masking done in each functions
+        if(rex.w) {
+            switch((nextop>>3)&7) {
+                case 0: ED->q[0] = rol64(emu, ED->q[0], tmp8u); break;
+                case 1: ED->q[0] = ror64(emu, ED->q[0], tmp8u); break;
+                case 2: ED->q[0] = rcl64(emu, ED->q[0], tmp8u); break;
+                case 3: ED->q[0] = rcr64(emu, ED->q[0], tmp8u); break;
+                case 4:
+                case 6: ED->q[0] = shl64(emu, ED->q[0], tmp8u); break;
+                case 5: ED->q[0] = shr64(emu, ED->q[0], tmp8u); break;
+                case 7: ED->q[0] = sar64(emu, ED->q[0], tmp8u); break;
+            }
+        } else {
+            if(MODREG)
+                switch((nextop>>3)&7) {
+                    case 0: ED->q[0] = rol32(emu, ED->dword[0], tmp8u); break;
+                    case 1: ED->q[0] = ror32(emu, ED->dword[0], tmp8u); break;
+                    case 2: ED->q[0] = rcl32(emu, ED->dword[0], tmp8u); break;
+                    case 3: ED->q[0] = rcr32(emu, ED->dword[0], tmp8u); break;
+                    case 4:
+                    case 6: ED->q[0] = shl32(emu, ED->dword[0], tmp8u); break;
+                    case 5: ED->q[0] = shr32(emu, ED->dword[0], tmp8u); break;
+                    case 7: ED->q[0] = sar32(emu, ED->dword[0], tmp8u); break;
+                }
+            else
+                switch((nextop>>3)&7) {
+                    case 0: ED->dword[0] = rol32(emu, ED->dword[0], tmp8u); break;
+                    case 1: ED->dword[0] = ror32(emu, ED->dword[0], tmp8u); break;
+                    case 2: ED->dword[0] = rcl32(emu, ED->dword[0], tmp8u); break;
+                    case 3: ED->dword[0] = rcr32(emu, ED->dword[0], tmp8u); break;
+                    case 4:
+                    case 6: ED->dword[0] = shl32(emu, ED->dword[0], tmp8u); break;
+                    case 5: ED->dword[0] = shr32(emu, ED->dword[0], tmp8u); break;
+                    case 7: ED->dword[0] = sar32(emu, ED->dword[0], tmp8u); break;
+                }
+        }
         break;
 
     case 0xE0:                      /* LOOPNZ */
@@ -76,6 +238,83 @@ int Run67(x64emu_t *emu, rex_t rex)
             R_RIP += tmp8s;
         break;
 
+    case 0xE8:                      /* CALL Id */
+        tmp32s = F32S; // call is relative
+        Push(emu, R_RIP);
+        R_RIP += tmp32s;
+        break;
+
+    case 0xF7:                      /* GRP3 Ed(,Id) */
+        nextop = F8;
+        tmp8u = (nextop>>3)&7;
+        GETED32((tmp8u<2)?4:0);
+        if(rex.w) {
+            switch(tmp8u) {
+                case 0: 
+                case 1:                 /* TEST Ed,Id */
+                    tmp64u = F32S64;
+                    test64(emu, ED->q[0], tmp64u);
+                    break;
+                case 2:                 /* NOT Ed */
+                    ED->q[0] = not64(emu, ED->q[0]);
+                    break;
+                case 3:                 /* NEG Ed */
+                    ED->q[0] = neg64(emu, ED->q[0]);
+                    break;
+                case 4:                 /* MUL RAX,Ed */
+                    mul64_rax(emu, ED->q[0]);
+                    break;
+                case 5:                 /* IMUL RAX,Ed */
+                    imul64_rax(emu, ED->q[0]);
+                    break;
+                case 6:                 /* DIV Ed */
+                    div64(emu, ED->q[0]);
+                    break;
+                case 7:                 /* IDIV Ed */
+                    idiv64(emu, ED->q[0]);
+                    break;
+            }
+        } else {
+            switch(tmp8u) {
+                case 0: 
+                case 1:                 /* TEST Ed,Id */
+                    tmp32u = F32;
+                    test32(emu, ED->dword[0], tmp32u);
+                    break;
+                case 2:                 /* NOT Ed */
+                    if(MODREG)
+                        ED->q[0] = not32(emu, ED->dword[0]);
+                    else
+                        ED->dword[0] = not32(emu, ED->dword[0]);
+                    break;
+                case 3:                 /* NEG Ed */
+                    if(MODREG)
+                        ED->q[0] = neg32(emu, ED->dword[0]);
+                    else
+                        ED->dword[0] = neg32(emu, ED->dword[0]);
+                    break;
+                case 4:                 /* MUL EAX,Ed */
+                    mul32_eax(emu, ED->dword[0]);
+                    emu->regs[_AX].dword[1] = 0;
+                    break;
+                case 5:                 /* IMUL EAX,Ed */
+                    imul32_eax(emu, ED->dword[0]);
+                    emu->regs[_AX].dword[1] = 0;
+                    break;
+                case 6:                 /* DIV Ed */
+                    div32(emu, ED->dword[0]);
+                    emu->regs[_AX].dword[1] = 0;
+                    emu->regs[_DX].dword[1] = 0;
+                    break;
+                case 7:                 /* IDIV Ed */
+                    idiv32(emu, ED->dword[0]);
+                    emu->regs[_AX].dword[1] = 0;
+                    emu->regs[_DX].dword[1] = 0;
+                    break;
+            }
+        }
+        break;
+            
     default:
         return 1;
     }

src/emu/x64run670f.c

@@ -0,0 +1,86 @@
+#define _GNU_SOURCE
+#include <stdint.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <math.h>
+#include <string.h>
+#include <signal.h>
+#include <sys/types.h>
+#include <unistd.h>
+
+#include "debug.h"
+#include "box64stack.h"
+#include "x64emu.h"
+#include "x64run.h"
+#include "x64emu_private.h"
+#include "x64run_private.h"
+#include "x64primop.h"
+#include "x64trace.h"
+#include "x87emu_private.h"
+#include "box64context.h"
+#include "bridge.h"
+#ifdef DYNAREC
+#include "../dynarec/arm64_lock.h"
+#endif
+
+#include "modrm.h"
+
+int Run670F(x64emu_t *emu, rex_t rex, int rep)
+{
+    (void)rep;
+    uint8_t opcode;
+    uint8_t nextop;
+    uint8_t tmp8u;                      (void)tmp8u;
+    int8_t tmp8s;                       (void)tmp8s;
+    int32_t tmp32s, tmp32s2;            (void)tmp32s; (void)tmp32s2;
+    uint32_t tmp32u, tmp32u2;           (void)tmp32u; (void)tmp32u2;
+    uint64_t tmp64u, tmp64u2;           (void)tmp64u; (void)tmp64u2;
+    reg64_t *oped, *opgd;               (void)oped;   (void)opgd;
+    sse_regs_t *opex, *opgx, eax1;      (void)eax1;
+    mmx87_regs_t *opem, *opgm, eam1;    (void)opem;   (void)opgm;    (void)eam1;
+
+    opcode = F8;
+
+    switch(opcode) {
+
+        case 0x2E:                      /* UCOMISS Gx, Ex */
+            // same for now
+        case 0x2F:                      /* COMISS Gx, Ex */
+            if(rep) {
+                return 1;
+            }
+            RESET_FLAGS(emu);
+            nextop = F8;
+            GETEX32(0);
+            GETGX;
+            if(isnan(GX->f[0]) || isnan(EX->f[0])) {
+                SET_FLAG(F_ZF); SET_FLAG(F_PF); SET_FLAG(F_CF);
+            } else if(isgreater(GX->f[0], EX->f[0])) {
+                CLEAR_FLAG(F_ZF); CLEAR_FLAG(F_PF); CLEAR_FLAG(F_CF);
+            } else if(isless(GX->f[0], EX->f[0])) {
+                CLEAR_FLAG(F_ZF); CLEAR_FLAG(F_PF); SET_FLAG(F_CF);
+            } else {
+                SET_FLAG(F_ZF); CLEAR_FLAG(F_PF); CLEAR_FLAG(F_CF);
+            }
+            CLEAR_FLAG(F_OF); CLEAR_FLAG(F_AF); CLEAR_FLAG(F_SF);
+            break;
+
+        case 0x6F:                      /* MOVQ Gm, Em */
+            nextop = F8;
+            GETEM32(0);
+            GETGM;
+            GM->q = EM->q;
+            break;
+
+        case 0x7F:                      /* MOVQ Em, Gm */
+            nextop = F8;
+            GETEM32(0);
+            GETGM;
+            EM->q = GM->q;
+            break;
+
+    default:
+        return 1;
+    }
+    return 0;
+}

src/emu/x64run6766.c

@@ -0,0 +1,68 @@
+#define _GNU_SOURCE
+#include <stdint.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <math.h>
+#include <string.h>
+#include <signal.h>
+#include <sys/types.h>
+#include <unistd.h>
+
+#include "debug.h"
+#include "box64stack.h"
+#include "x64emu.h"
+#include "x64run.h"
+#include "x64emu_private.h"
+#include "x64run_private.h"
+#include "x64primop.h"
+#include "x64trace.h"
+#include "x87emu_private.h"
+#include "box64context.h"
+#include "bridge.h"
+#ifdef DYNAREC
+#include "../dynarec/arm64_lock.h"
+#endif
+
+#include "modrm.h"
+
+int Run6766(x64emu_t *emu, rex_t rex, int rep)
+{
+    // Hmmmm....
+    (void)rep;
+    uint8_t opcode;
+    uint8_t nextop;                     (void)nextop;
+    int8_t tmp8s;                       (void)tmp8s;
+    uint8_t tmp8u, tmp8u2;              (void)tmp8u;  (void)tmp8u2;
+    int16_t tmp16s;                     (void)tmp16s;
+    uint16_t tmp16u, tmp16u2;           (void)tmp16u; (void)tmp16u2;
+    int32_t tmp32s;                     (void)tmp32s;
+    int64_t tmp64s;                     (void)tmp64s;
+    uint64_t tmp64u, tmp64u2, tmp64u3;  (void)tmp64u; (void)tmp64u2; (void)tmp64u3;
+    reg64_t *oped, *opgd;               (void)oped;   (void)opgd;
+
+    opcode = F8;
+
+    while((opcode==0x2E) || (opcode==0x66))   // ignoring CS: or multiple 0x66
+        opcode = F8;
+
+    while((opcode==0xF2) || (opcode==0xF3)) {
+        rep = opcode-0xF1;
+        opcode = F8;
+    }
+    // REX prefix before the 66 are ignored
+    rex.rex = 0;
+    while(opcode>=0x40 && opcode<=0x4f) {
+        rex.rex = opcode;
+        opcode = F8;
+    }
+
+    switch(opcode) {
+
+    case 0x0F:                              /* more opcodes */
+        return Run67660F(emu, rex);
+
+    default:
+        return 1;
+    }
+    return 0;
+}

src/emu/x64run67660f.c

@@ -0,0 +1,64 @@
+#define _GNU_SOURCE
+#include <stdint.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <math.h>
+#include <string.h>
+#include <signal.h>
+#include <sys/types.h>
+#include <unistd.h>
+
+#include "debug.h"
+#include "box64stack.h"
+#include "x64emu.h"
+#include "x64run.h"
+#include "x64emu_private.h"
+#include "x64run_private.h"
+#include "x64primop.h"
+#include "x64trace.h"
+#include "x87emu_private.h"
+#include "box64context.h"
+#include "bridge.h"
+
+#include "modrm.h"
+
+int Run67660F(x64emu_t *emu, rex_t rex)
+{
+    uint8_t opcode;
+    uint8_t nextop;
+    int8_t tmp8s;               (void)tmp8s;
+    uint8_t tmp8u;              (void)tmp8u;
+    int16_t tmp16s;             (void)tmp16s;
+    uint16_t tmp16u;            (void)tmp16u;
+    int32_t tmp32s;             (void)tmp32s;
+    uint32_t tmp32u;            (void)tmp32u;
+    int64_t tmp64s;             (void)tmp64s;
+    uint64_t tmp64u;            (void)tmp64u;
+    reg64_t *oped, *opgd;       (void)oped;   (void)opgd;
+    sse_regs_t *opex, *opgx;
+
+    opcode = F8;
+
+    switch(opcode) {
+
+    case 0x6F:                      /* MOVDQA Gx,Ex */
+        nextop = F8;
+        GETEX32(0);
+        GETGX;
+        GX->q[0] = EX->q[0];
+        GX->q[1] = EX->q[1];
+        break;
+   
+    case 0x76:                      /* PCMPEQD Gx,Ex */
+        nextop = F8;
+        GETEX32(0);
+        GETGX;
+        for (int i=0; i<4; ++i)
+            GX->ud[i] = (GX->ud[i]==EX->ud[i])?0xffffffff:0;
+        break;
+
+    default:
+        return 1;
+    }
+    return 0;
+}

src/emu/x64run_private.c

@@ -30,28 +30,43 @@
 
 int32_t EXPORT my___libc_start_main(x64emu_t* emu, int *(main) (int, char * *, char * *), int argc, char * * ubp_av, void (*init) (void), void (*fini) (void), void (*rtld_fini) (void), void (* stack_end))
 {
-    //TODO: register rtld_fini
-    //TODO: register fini
-    // let's cheat and set all args...
+    (void)argc; (void)ubp_av; (void)fini; (void)rtld_fini; (void)stack_end;
+
     if(init) {
+        Push64(emu, GetRBP(emu));   // set frame pointer
+        SetRBP(emu, GetRSP(emu));   // save RSP
+        SetRSP(emu, GetRSP(emu)&~0xFLL);    // Align RSP
         PushExit(emu);
+        SetRDX(emu, (uint64_t)my_context->envv);
+        SetRSI(emu, (uint64_t)my_context->argv);
+        SetRDI(emu, (uint64_t)my_context->argc);
         R_RIP=(uint64_t)*init;
         printf_log(LOG_DEBUG, "Calling init(%p) from __libc_start_main\n", *init);
         DynaRun(emu);
         if(emu->error)  // any error, don't bother with more
             return 0;
+        SetRSP(emu, GetRBP(emu));   // restore RSP
+        SetRBP(emu, Pop64(emu));    // restore RBP
         emu->quit = 0;
     }
     printf_log(LOG_DEBUG, "Transfert to main(%d, %p, %p)=>%p from __libc_start_main\n", my_context->argc, my_context->argv, my_context->envv, main);
     // call main and finish
+    Push64(emu, GetRBP(emu));   // set frame pointer
+    SetRBP(emu, GetRSP(emu));   // save RSP
+    SetRSP(emu, GetRSP(emu)&~0xFLL);    // Align RSP
     PushExit(emu);
     SetRDX(emu, (uint64_t)my_context->envv);
     SetRSI(emu, (uint64_t)my_context->argv);
     SetRDI(emu, (uint64_t)my_context->argc);
     R_RIP=(uint64_t)main;
-#ifdef DYNAREC
+
     DynaRun(emu);
-#endif
+
+    if(!emu->quit) {
+        SetRSP(emu, GetRBP(emu));   // restore RSP
+        SetRBP(emu, Pop64(emu));         // restore RBP
+        emu->quit = 1;  // finished!
+    }
     return 0;
 }
 
@@ -921,7 +936,7 @@ void UpdateFlags(x64emu_t *emu)
         case d_rcr32:
         case d_rcr64:
         case d_unknown:
-            printf_log(LOG_NONE, "Box86: %p trying to evaluate Unknown defered Flags\n", (void*)R_RIP);
+            printf_log(LOG_NONE, "Box64: %p trying to evaluate Unknown defered Flags\n", (void*)R_RIP);
             break;
     }
     RESET_FLAGS(emu);
@@ -940,7 +955,7 @@ uintptr_t GetSegmentBaseEmu(x64emu_t* emu, int seg)
 const char* getAddrFunctionName(uintptr_t addr)
 {
     static char ret[1000];
-    uint32_t sz = 0;
+    uint64_t sz = 0;
     uintptr_t start = 0;
     const char* symbname = FindNearestSymbolName(FindElfAddress(my_context, addr), (void*)addr, &start, &sz);
     if(symbname && addr>=start && (addr<(start+sz) || !sz)) {
@@ -955,7 +970,7 @@ const char* getAddrFunctionName(uintptr_t addr)
 
 void printFunctionAddr(uintptr_t nextaddr, const char* text)
 {
-    uint32_t sz = 0;
+    uint64_t sz = 0;
     uintptr_t start = 0;
     const char* symbname = FindNearestSymbolName(FindElfAddress(my_context, nextaddr), (void*)nextaddr, &start, &sz);
     if(symbname && nextaddr>=start && (nextaddr<(start+sz) || !sz)) {
@@ -987,12 +1002,18 @@ void PrintTrace(x64emu_t* emu, uintptr_t ip, int dynarec)
             my_context->trace_dynarec = dynarec;
         }
 #else
+        (void)dynarec;
         if(my_context->trace_tid != tid) {
             printf_log(LOG_NONE, "Thread %04d|\n", tid);
             my_context->trace_tid = tid;
         }
 #endif
         printf_log(LOG_NONE, "%s", DumpCPURegs(emu, ip));
+        if(R_RIP==0) {
+            printf_log(LOG_NONE, "Running at NULL address\n");
+            pthread_mutex_unlock(&my_context->mutex_trace);
+            return;
+        }
         if(PK(0)==0xcc && PK(1)=='S' && PK(2)=='C') {
             uint64_t a = *(uint64_t*)(ip+3);
             if(a==0) {
@@ -1003,10 +1024,10 @@ void PrintTrace(x64emu_t* emu, uintptr_t ip, int dynarec)
         } else {
             printf_log(LOG_NONE, "%s", DecodeX64Trace(my_context->dec, ip));
             uint8_t peek = PK(0);
-            if(peek==0xC3 || peek==0xC2) {
+            if(peek==0xC3 || peek==0xC2 || (peek==0xF3 && PK(1)==0xC3)) {
                 printf_log(LOG_NONE, " => %p", *(void**)(R_RSP));
                 printFunctionAddr(*(uintptr_t*)(R_RSP), "=> ");
-            } else if(peek==0x55) {
+            } else if(peek==0x55 || peek==0x53) {
                 printf_log(LOG_NONE, " => STACK_TOP: %p", *(void**)(R_RSP));
                 printFunctionAddr(ip, "here: ");
             } else if(peek==0xE8) { // Call
@@ -1065,7 +1086,7 @@ reg64_t* GetECommonO(x64emu_t* emu, rex_t rex, uint8_t m, uint8_t delta, uintptr
             base += Fetch32s(emu);
             return (reg64_t*)(base+R_RIP+delta);
         }
-        return (reg64_t*)(emu->regs[m+(rex.b<<3)].q[0]);
+        return (reg64_t*)(base + emu->regs[m+(rex.b<<3)].q[0]);
     } else {
         if((m&7)==4) {
             uint8_t sib = Fetch8(emu);
@@ -1091,7 +1112,7 @@ reg64_t* GetECommon32O(x64emu_t* emu, rex_t rex, uint8_t m, uint8_t delta, uintp
             base += Fetch32s(emu);
             return (reg64_t*)(base+R_RIP+delta);
         }
-        return (reg64_t*)(uintptr_t)(emu->regs[m+(rex.b<<3)].dword[0]);
+        return (reg64_t*)(uintptr_t)(base + emu->regs[m+(rex.b<<3)].dword[0]);
     } else {
         if((m&7)==4) {
             uint8_t sib = Fetch8(emu);
@@ -1157,10 +1178,25 @@ reg64_t* GetEd32O(x64emu_t *emu, rex_t rex, uint8_t v, uint8_t delta, uintptr_t
     } else return GetECommon32O(emu, rex, m, delta, offset);
 }
 
+reg64_t* GetEb32O(x64emu_t *emu, rex_t rex, uint8_t v, uint8_t delta, uintptr_t offset)
+{
+    uint8_t m = v&0xC7;    // filter Eb
+    if(m>=0xC0) {
+        if(rex.rex) {
+            return &emu->regs[(m&0x07)+(rex.b<<3)];
+        } else {
+            int lowhigh = (m&4)>>2;
+            return (reg64_t *)(((char*)(&emu->regs[(m&0x03)]))+lowhigh);  //?
+        }
+    } else return GetECommon32O(emu, rex, m, delta, offset);
+}
+
 #define GetEw GetEd
 
 reg64_t* GetEw16(x64emu_t *emu, rex_t rex, uint8_t v)
 {
+    (void)rex;
+
     uint8_t m = v&0xC7;    // filter Ed
     if(m>=0xC0) {
          return &emu->regs[(m&0x07)];
@@ -1188,6 +1224,8 @@ reg64_t* GetEw16(x64emu_t *emu, rex_t rex, uint8_t v)
 
 reg64_t* GetEw16off(x64emu_t *emu, rex_t rex, uint8_t v, uintptr_t offset)
 {
+    (void)rex;
+
     uint32_t m = v&0xC7;    // filter Ed
     if(m>=0xC0) {
          return &emu->regs[(m&0x07)];
@@ -1217,7 +1255,7 @@ mmx87_regs_t* GetEm(x64emu_t *emu, rex_t rex, uint8_t v, uint8_t delta)
 {
     uint8_t m = v&0xC7;    // filter Ed
     if(m>=0xC0) {
-         return &emu->mmx87[m&0x07];
+         return &emu->mmx[m&0x07];
     } else return (mmx87_regs_t*)GetECommon(emu, rex, m, delta);
 }
 
@@ -1229,6 +1267,30 @@ sse_regs_t* GetEx(x64emu_t *emu, rex_t rex, uint8_t v, uint8_t delta)
     } else return (sse_regs_t*)GetECommon(emu, rex, m, delta);
 }
 
+sse_regs_t* GetExO(x64emu_t *emu, rex_t rex, uint8_t v, uint8_t delta, uintptr_t offset)
+{
+    uint8_t m = v&0xC7;    // filter Ed
+    if(m>=0xC0) {
+         return &emu->xmm[(m&0x07)+(rex.b<<3)];
+    } else return (sse_regs_t*)GetECommonO(emu, rex, m, delta, offset);
+}
+
+sse_regs_t* GetEx32O(x64emu_t *emu, rex_t rex, uint8_t v, uint8_t delta, uintptr_t offset)
+{
+    uint8_t m = v&0xC7;    // filter Ed
+    if(m>=0xC0) {
+         return &emu->xmm[(m&0x07)+(rex.b<<3)];
+    } else return (sse_regs_t*)GetECommon32O(emu, rex, m, delta, offset);
+}
+
+mmx87_regs_t* GetEm32O(x64emu_t *emu, rex_t rex, uint8_t v, uint8_t delta, uintptr_t offset)
+{
+    uint8_t m = v&0xC7;    // filter Ed
+    if(m>=0xC0) {
+         return &emu->mmx[(m&0x07)];
+    } else return (mmx87_regs_t*)GetECommon32O(emu, rex, m, delta, offset);
+}
+
 
 reg64_t* GetGd(x64emu_t *emu, rex_t rex, uint8_t v)
 {
@@ -1238,16 +1300,18 @@ reg64_t* GetGd(x64emu_t *emu, rex_t rex, uint8_t v)
 reg64_t* GetGb(x64emu_t *emu, rex_t rex, uint8_t v)
 {
     uint8_t m = (v&0x38)>>3;
-    if(rex.rex) {
+    if(rex.rex)
         return &emu->regs[(m&7)+(rex.r<<3)];
-    } else
+    else
         return (reg64_t*)&emu->regs[m&3].byte[m>>2];
 }
 
 mmx87_regs_t* GetGm(x64emu_t *emu, rex_t rex, uint8_t v)
 {
+    (void)rex;
+
     uint8_t m = (v&0x38)>>3;
-    return &emu->mmx87[m&7];
+    return &emu->mmx[m&7];
 }
 
 sse_regs_t* GetGx(x64emu_t *emu, rex_t rex, uint8_t v)

src/emu/x64run_private.h

@@ -81,15 +81,20 @@ reg64_t* GetEbO(x64emu_t *emu, rex_t rex, uint8_t v, uint8_t delta, uintptr_t of
 reg64_t* GetEd(x64emu_t *emu, rex_t rex, uint8_t v, uint8_t delta);
 reg64_t* GetEdO(x64emu_t *emu, rex_t rex, uint8_t v, uint8_t delta, uintptr_t offset);
 reg64_t* GetEd32O(x64emu_t *emu, rex_t rex, uint8_t v, uint8_t delta, uintptr_t offset);
+reg64_t* GetEb32O(x64emu_t *emu, rex_t rex, uint8_t v, uint8_t delta, uintptr_t offset);
 #define GetEw GetEd
+#define GetEw32O GetEd32O
 reg64_t* GetEw16(x64emu_t *emu, rex_t rex, uint8_t v);
 reg64_t* GetEw16off(x64emu_t *emu, rex_t rex, uint8_t v, uintptr_t offset);
 mmx87_regs_t* GetEm(x64emu_t *emu, rex_t rex, uint8_t v, uint8_t delta);
 sse_regs_t* GetEx(x64emu_t *emu, rex_t rex, uint8_t v, uint8_t delta);
+sse_regs_t* GetExO(x64emu_t *emu, rex_t rex, uint8_t v, uint8_t delta, uintptr_t offset);
+sse_regs_t* GetEx32O(x64emu_t *emu, rex_t rex, uint8_t v, uint8_t delta, uintptr_t offset);
 reg64_t* GetGd(x64emu_t *emu, rex_t rex, uint8_t v);
 #define GetGw GetGd
 reg64_t* GetGb(x64emu_t *emu, rex_t rex, uint8_t v);
 mmx87_regs_t* GetGm(x64emu_t *emu, rex_t rex, uint8_t v);
+mmx87_regs_t* GetEm32O(x64emu_t *emu, rex_t rex, uint8_t v, uint8_t delta, uintptr_t offset);
 sse_regs_t* GetGx(x64emu_t *emu, rex_t rex, uint8_t v);
 
 void UpdateFlags(x64emu_t *emu);
@@ -98,28 +103,28 @@ void UpdateFlags(x64emu_t *emu);
 #define RESET_FLAGS(emu) emu->df = d_none
 
 int Run0F(x64emu_t *emu, rex_t rex);
-int Run64(x64emu_t *emu, rex_t rex);
+int Run64(x64emu_t *emu, rex_t rex, int seg);
 int Run66(x64emu_t *emu, rex_t rex, int rep);
 int Run660F(x64emu_t *emu, rex_t rex);
 int Run6664(x64emu_t *emu, rex_t rex);
 int Run66D9(x64emu_t *emu, rex_t rex);
 int Run66DD(x64emu_t *emu, rex_t rex);
-int Run67(x64emu_t *emu, rex_t rex);
+int Run66F0(x64emu_t *emu, rex_t rex);
+int Run67(x64emu_t *emu, rex_t rex, int rep);
+int Run670F(x64emu_t *emu, rex_t rex, int rep);
+int Run6766(x64emu_t *emu, rex_t rex, int rep);
+int Run67660F(x64emu_t *emu, rex_t rex);
 int RunD8(x64emu_t *emu, rex_t rex);
 int RunD9(x64emu_t *emu, rex_t rex);
 int RunDA(x64emu_t *emu, rex_t rex);
 int RunDB(x64emu_t *emu, rex_t rex);
+int RunDC(x64emu_t *emu, rex_t rex);
 int RunDD(x64emu_t *emu, rex_t rex);
+int RunDE(x64emu_t *emu, rex_t rex);
 int RunDF(x64emu_t *emu, rex_t rex);
 int RunF0(x64emu_t *emu, rex_t rex);
 int RunF20F(x64emu_t *emu, rex_t rex);
 int RunF30F(x64emu_t *emu, rex_t rex);
-//void Run66D9(x64emu_t *emu);    // x87
-//void Run6766(x64emu_t *emu);
-//void RunGS(x64emu_t *emu);
-//void RunFS(x64emu_t *emu);
-//void RunFS66(x64emu_t *emu, uintptr_t tlsdata);
-//void RunLock66(x64emu_t *emu);
 
 void x64Syscall(x64emu_t *emu);
 void x64Int3(x64emu_t* emu);
@@ -137,4 +142,4 @@ const char* GetNativeName(void* p);
 void PrintTrace(x64emu_t* emu, uintptr_t ip, int dynarec);
 #endif
 
-#endif //__X86RUN_PRIVATE_H_
+#endif //__X86RUN_PRIVATE_H_

src/emu/x64rund9.c

@@ -185,19 +185,23 @@ int RunD9(x64emu_t *emu, rex_t rex)
         case 0xFB:  /* FSINCOS */
             fpu_do_push(emu);
             sincos(ST1.d, &ST1.d, &ST0.d);
+            emu->sw.f.F87_C2 = 0;
             break;
         case 0xFC:  /* FRNDINT */
             ST0.d = fpu_round(emu, ST0.d);
             break;
         case 0xFD:  /* FSCALE */
             // this could probably be done by just altering the exponant part of the float...
-            ST0.d *= exp2(trunc(ST1.d));
+            if(ST0.d!=0.0)
+                ST0.d *= exp2(trunc(ST1.d));
             break;
         case 0xFE:  /* FSIN */
             ST0.d = sin(ST0.d);
+            emu->sw.f.F87_C2 = 0;
             break;
         case 0xFF:  /* FCOS */
             ST0.d = cos(ST0.d);
+            emu->sw.f.F87_C2 = 0;
             break;
 
 

src/emu/x64rundb.c

@@ -163,11 +163,11 @@ int RunDB(x64emu_t *emu, rex_t rex)
                 fpu_do_push(emu);
                 memcpy(&STld(0).ld, ED, 10);
                 LD2D(&STld(0), &ST(0).d);
-                STld(0).ref = ST0.q;
+                STld(0).uref = ST0.q;
                 break;
             case 7: /* FSTP tbyte */
                 GETED(0);
-                if(ST0.q!=STld(0).ref)
+                if(ST0.q!=STld(0).uref)
                     D2LD(&ST0.d, ED);
                 else
                     memcpy(ED, &STld(0).ld, 10);

src/emu/x64rundc.c

@@ -0,0 +1,146 @@
+#define _GNU_SOURCE
+#include <stdint.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <math.h>
+#include <string.h>
+#include <signal.h>
+#include <sys/types.h>
+#include <unistd.h>
+
+#include "debug.h"
+#include "box64stack.h"
+#include "x64emu.h"
+#include "x64run.h"
+#include "x64emu_private.h"
+#include "x64run_private.h"
+#include "x64primop.h"
+#include "x64trace.h"
+#include "x87emu_private.h"
+#include "box64context.h"
+#include "bridge.h"
+
+#include "modrm.h"
+
+int RunDC(x64emu_t *emu, rex_t rex)
+{
+    uint8_t nextop;
+    reg64_t *oped;
+
+    nextop = F8;
+    switch(nextop) {
+        case 0xC0:
+        case 0xC1:
+        case 0xC2:
+        case 0xC3:
+        case 0xC4:
+        case 0xC5:
+        case 0xC6:
+        case 0xC7:  /* FADD */
+            ST(nextop&7).d += ST0.d;
+            break;
+        case 0xC8:
+        case 0xC9:
+        case 0xCA:
+        case 0xCB:
+        case 0xCC:
+        case 0xCD:
+        case 0xCE:
+        case 0xCF:  /* FMUL */
+            ST(nextop&7).d *= ST0.d;
+            break;
+        case 0xD0:
+        case 0xD1:
+        case 0xD2:
+        case 0xD3:
+        case 0xD4:
+        case 0xD5:
+        case 0xD6:
+        case 0xD7:  /* FCOM */
+            fpu_fcom(emu, ST(nextop&7).d);
+            break;
+        case 0xD8:
+        case 0xD9:
+        case 0xDA:
+        case 0xDB:
+        case 0xDC:
+        case 0xDD:
+        case 0xDE:
+        case 0xDF:  /* FCOMP */
+            fpu_fcom(emu, ST(nextop&7).d);
+            fpu_do_pop(emu);
+            break;
+        case 0xE0:
+        case 0xE1:
+        case 0xE2:
+        case 0xE3:
+        case 0xE4:
+        case 0xE5:
+        case 0xE6:
+        case 0xE7:  /* FSUBR */
+            ST(nextop&7).d = ST0.d -ST(nextop&7).d;
+            break;
+        case 0xE8:
+        case 0xE9:
+        case 0xEA:
+        case 0xEB:
+        case 0xEC:
+        case 0xED:
+        case 0xEE:
+        case 0xEF:  /* FSUB */
+            ST(nextop&7).d -= ST0.d;
+            break;
+        case 0xF0:
+        case 0xF1:
+        case 0xF2:
+        case 0xF3:
+        case 0xF4:
+        case 0xF5:
+        case 0xF6:
+        case 0xF7:  /* FDIVR */
+            ST(nextop&7).d = ST0.d / ST(nextop&7).d;
+            break;
+        case 0xF8:
+        case 0xF9:
+        case 0xFA:
+        case 0xFB:
+        case 0xFC:
+        case 0xFD:
+        case 0xFE:
+        case 0xFF:  /* FDIV */
+            ST(nextop&7).d /=  ST0.d;
+            break;
+        default:
+            GETED(0);
+            switch((nextop>>3)&7) {
+            case 0:         /* FADD ST0, double */
+                ST0.d += *(double*)ED;
+                break;
+            case 1:         /* FMUL ST0, double */
+                ST0.d *= *(double*)ED;
+                break;
+            case 2:      /* FCOM ST0, double */
+                fpu_fcom(emu, *(double*)ED);
+                break;
+            case 3:     /* FCOMP ST0, double */
+                fpu_fcom(emu, *(double*)ED);
+                fpu_do_pop(emu);
+                break;
+            case 4:         /* FSUB ST0, double */
+                ST0.d -= *(double*)ED;
+                break;
+            case 5:         /* FSUBR ST0, double */
+                ST0.d = *(double*)ED - ST0.d;
+                break;
+            case 6:         /* FDIV ST0, double */
+                ST0.d /= *(double*)ED;
+                break;
+            case 7:         /* FDIVR ST0, double */
+                ST0.d = *(double*)ED / ST0.d;
+                break;
+           default:
+                return 1;
+        }
+    }
+  return 0;
+}

src/emu/x64runde.c

@@ -0,0 +1,160 @@
+#define _GNU_SOURCE
+#include <stdint.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <math.h>
+#include <string.h>
+#include <signal.h>
+#include <sys/types.h>
+#include <unistd.h>
+
+#include "debug.h"
+#include "box64stack.h"
+#include "x64emu.h"
+#include "x64run.h"
+#include "x64emu_private.h"
+#include "x64run_private.h"
+#include "x64primop.h"
+#include "x64trace.h"
+#include "x87emu_private.h"
+#include "box64context.h"
+#include "bridge.h"
+
+#include "modrm.h"
+
+int RunDE(x64emu_t *emu, rex_t rex)
+{
+    uint8_t nextop;
+    reg64_t *oped;
+
+    nextop = F8;
+    switch(nextop) {
+    case 0xC0:  /* FADDP STx, ST0 */
+    case 0xC1:  /* FADDP ST1, ST0 */
+    case 0xC2:
+    case 0xC3:
+    case 0xC4:
+    case 0xC5:
+    case 0xC6:
+    case 0xC7:
+        ST(nextop&7).d += ST0.d;
+        fpu_do_pop(emu);
+        break;
+    case 0xC8:  /* FMULP STx, ST0 */
+    case 0xC9:  /* FMULP ST1, ST0 */
+    case 0xCA:
+    case 0xCB:
+    case 0xCC:
+    case 0xCD:
+    case 0xCE:
+    case 0xCF:
+        ST(nextop&7).d *= ST0.d;
+        fpu_do_pop(emu);
+        break;
+    case 0xD0:
+    case 0xD1:
+    case 0xD2:
+    case 0xD3:
+    case 0xD4:
+    case 0xD5:
+    case 0xD6:
+    case 0xD7:  /* FCOMP */
+        fpu_fcom(emu, ST(nextop&7).d);
+        fpu_do_pop(emu);
+        break;
+
+    case 0xD9:  /* FCOMPP */
+        fpu_fcom(emu, ST1.d);
+        fpu_do_pop(emu);
+        fpu_do_pop(emu);
+        break;
+
+        /*ST(1).d = ST0.d - ST(1).d;
+        fpu_do_pop(emu);
+        break;*/
+    case 0xE0:  /* FSUBRP STx, ST0 */
+    case 0xE1:  /* FSUBRP ST1, ST0 */
+    case 0xE2:
+    case 0xE3:
+    case 0xE4:
+    case 0xE5:
+    case 0xE6:
+    case 0xE7:
+        ST(nextop&7).d = ST0.d - ST(nextop&7).d;
+        fpu_do_pop(emu);
+        break;
+    case 0xE8:  /* FSUBP STx, ST0 */
+    case 0xE9:  /* FSUBP ST1, ST0 */
+    case 0xEA:
+    case 0xEB:
+    case 0xEC:
+    case 0xED:
+    case 0xEE:
+    case 0xEF:
+        ST(nextop&7).d -= ST0.d;
+        fpu_do_pop(emu);
+        break;
+    case 0xF0:  /* FDIVRP STx, ST0 */
+    case 0xF1:  /* FDIVRP ST1, ST0 */
+    case 0xF2:
+    case 0xF3:
+    case 0xF4:
+    case 0xF5:
+    case 0xF6:
+    case 0xF7:
+        ST(nextop&7).d = ST0.d / ST(nextop&7).d;
+        fpu_do_pop(emu);
+        break;
+    case 0xF8:  /* FDIVP STx, ST0 */
+    case 0xF9:  /* FDIVP ST1, ST0 */
+    case 0xFA:
+    case 0xFB:
+    case 0xFC:
+    case 0xFD:
+    case 0xFE:
+    case 0xFF:
+        ST(nextop&7).d /= ST0.d;
+        fpu_do_pop(emu);
+        break;
+
+    case 0xD8:  
+    case 0xDA:
+    case 0xDB:
+    case 0xDC:
+    case 0xDD:
+    case 0xDE:
+    case 0xDF:
+        return 1;
+    
+    default:
+        switch((nextop>>3)&7) {
+            case 0:     /* FIADD ST0, Ew int */
+                GETEW(0);
+                ST0.d += EW->sword[0];
+                break;
+            case 1:     /* FIMUL ST0, Ew int */
+                GETEW(0);
+                ST0.d *= EW->sword[0];
+                break;
+            case 4:     /* FISUB ST0, Ew int */
+                GETEW(0);
+                ST0.d -= EW->sword[0];
+                break;
+            case 5:     /* FISUBR ST0, Ew int */
+                GETEW(0);
+                ST0.d = (double)EW->sword[0] - ST0.d;
+                break;
+            case 6:     /* FIDIV ST0, Ew int */
+                GETEW(0);
+                ST0.d /= EW->sword[0];
+                break;
+            case 7:     /* FIDIVR ST0, Ew int */
+                GETEW(0);
+                ST0.d = (double)EW->sword[0] / ST0.d;
+                break;
+           default:
+                return 1;
+        }
+    }
+  return 0;
+}

src/emu/x64rundf.c

@@ -152,8 +152,8 @@ int RunDF(x64emu_t *emu, rex_t rex)
             tmp64s = ED->sq[0];
             fpu_do_push(emu);
             ST0.d = tmp64s;
-            STll(0).ll = tmp64s;
-            STll(0).ref = ST0.q;
+            STll(0).sq = tmp64s;
+            STll(0).sref = ST0.sq;
             break;
         case 6: /* FBSTP tbytes, ST0 */
             GETED(0);
@@ -162,8 +162,8 @@ int RunDF(x64emu_t *emu, rex_t rex)
             break;
         case 7: /* FISTP i64 */
             GETED(0);
-            if(STll(0).ref==ST(0).q)
-                ED->sq[0] = STll(0).ll;
+            if(STll(0).sref==ST(0).sq)
+                ED->sq[0] = STll(0).sq;
             else {
                 if(isgreater(ST0.d, (double)(int64_t)0x7fffffffffffffffLL) || isless(ST0.d, -(double)(int64_t)0x7fffffffffffffffLL) || !isfinite(ST0.d))
                     ED->sq[0] = 0x8000000000000000LL;
@@ -177,4 +177,4 @@ int RunDF(x64emu_t *emu, rex_t rex)
         }
     }
     return 0;
-}
+}

src/emu/x64runf0.c

@@ -30,8 +30,8 @@ int RunF0(x64emu_t *emu, rex_t rex)
 {
     uint8_t opcode;
     uint8_t nextop;
-    uint8_t tmp8u;
-    int32_t tmp32s;
+    uint8_t tmp8u, tmp8u2;      (void)tmp8u2;
+    int32_t tmp32s;             (void)tmp32s;
     uint32_t tmp32u, tmp32u2;
     int64_t tmp64s;
     uint64_t tmp64u, tmp64u2;
@@ -168,33 +168,159 @@ int RunF0(x64emu_t *emu, rex_t rex)
             opcode = F8;
             switch (opcode) { 
 
+            case 0xAB:                      /* BTS Ed,Gd */
+                CHECK_FLAGS(emu);
+                nextop = F8;
+                GETED(0);
+                GETGD;
+                tmp8u = GD->byte[0];
+                if(!MODREG)
+                {
+                    ED=(reg64_t*)(((uint32_t*)(ED))+(tmp8u>>5));
+                }
+#ifdef DYNAREC
+                if(rex.w) {
+                    tmp8u&=63;
+                    if(MODREG) {
+                        if(ED->q[0] & (1LL<<tmp8u))
+                            SET_FLAG(F_CF);
+                        else {
+                            ED->q[0] |= (1LL<<tmp8u);
+                            CLEAR_FLAG(F_CF);
+                        }
+                    } else
+                        do {
+                            tmp64u = arm64_lock_read_dd(ED);
+                            if(tmp64u & (1LL<<tmp8u)) {
+                                SET_FLAG(F_CF);
+                                tmp32s = 0;
+                            } else {
+                                tmp64u |= (1LL<<tmp8u);
+                                CLEAR_FLAG(F_CF);
+                                tmp32s = arm64_lock_write_dd(ED, tmp64u);
+                            }
+                        } while(tmp32s);
+                } else {
+                    tmp8u&=31;
+                    if(MODREG) {
+                        if(ED->dword[0] & (1<<tmp8u))
+                            SET_FLAG(F_CF);
+                        else {
+                            ED->dword[0] |= (1<<tmp8u);
+                            CLEAR_FLAG(F_CF);
+                        }
+                        ED->dword[1] = 0;
+                    } else
+                        do {
+                            tmp32u = arm64_lock_read_d(ED);
+                            if(tmp32u & (1<<tmp8u)) {
+                                SET_FLAG(F_CF);
+                                tmp32s = 0;
+                            } else {
+                                tmp32u |= (1<<tmp8u);
+                                CLEAR_FLAG(F_CF);
+                                tmp32s = arm64_lock_write_d(ED, tmp32u);
+                            }
+                        } while(tmp32s);
+                }
+#else
+                pthread_mutex_lock(&emu->context->mutex_lock);
+                if(rex.w) {
+                    tmp8u&=63;
+                    if(ED->q[0] & (1LL<<tmp8u))
+                        SET_FLAG(F_CF);
+                    else {
+                        ED->q[0] |= (1LL<<tmp8u);
+                        CLEAR_FLAG(F_CF);
+                    }
+                } else {
+                    tmp8u&=31;
+                    if(ED->dword[0] & (1<<tmp8u))
+                        SET_FLAG(F_CF);
+                    else {
+                        ED->dword[0] |= (1<<tmp8u);
+                        CLEAR_FLAG(F_CF);
+                    }
+                    if(MODREG)
+                        ED->dword[1] = 0;
+                }
+                pthread_mutex_unlock(&emu->context->mutex_lock);
+#endif
+                break;
+
+                case 0xB0:                      /* CMPXCHG Eb,Gb */
+                    CHECK_FLAGS(emu);
+                    nextop = F8;
+                    GETGB;
+                    GETEB(0);
+#ifdef DYNAREC
+                    do {
+                        tmp8u = arm64_lock_read_b(EB);
+                        cmp8(emu, R_AL, tmp8u);
+                        if(ACCESS_FLAG(F_ZF)) {
+                            tmp32s = arm64_lock_write_b(EB, GB);
+                        } else {
+                            R_AL = tmp8u;
+                            tmp32s = 0;
+                        }
+                    } while(tmp32s);
+#else
+                    pthread_mutex_lock(&emu->context->mutex_lock);
+                    cmp8(emu, R_AL, EB->byte[0]);
+                    if(ACCESS_FLAG(F_ZF)) {
+                        EB->byte[0] = GB;
+                    } else {
+                        R_AL = EB->byte[0];
+                    }
+                    pthread_mutex_unlock(&emu->context->mutex_lock);
+#endif
+                    break;
                 case 0xB1:                      /* CMPXCHG Ed,Gd */
                     nextop = F8;
                     GETED(0);
                     GETGD;
 #ifdef DYNAREC
                     if(rex.w)
-                        do {
-                            tmp64u = arm64_lock_read_dd(ED);
-                            cmp64(emu, R_RAX, tmp64u);
-                            if(ACCESS_FLAG(F_ZF)) {
-                                tmp32s = arm64_lock_write_dd(ED, GD->q[0]);
-                            } else {
-                                R_RAX = tmp64u;
-                                tmp32s = 0;
-                            }
-                        } while(tmp32s);
-                    else
+                        if(((uintptr_t)ED)&7) {
+                            do {
+                                tmp64u = ED->q[0] & ~0xffLL;
+                                tmp64u |= arm64_lock_read_b(ED);
+                                cmp64(emu, R_RAX, tmp64u);
+                                if(ACCESS_FLAG(F_ZF)) {
+                                    tmp32s = arm64_lock_write_b(ED, GD->q[0]&0xff);
+                                    if(!tmp32s)
+                                        ED->q[0] = GD->q[0];
+                                } else {
+                                    R_RAX = tmp64u;
+                                    tmp32s = 0;
+                                }
+                            } while(tmp32s);
+                        } else
+                            do {
+                                tmp64u = arm64_lock_read_dd(ED);
+                                cmp64(emu, R_RAX, tmp64u);
+                                if(ACCESS_FLAG(F_ZF)) {
+                                    tmp32s = arm64_lock_write_dd(ED, GD->q[0]);
+                                } else {
+                                    R_RAX = tmp64u;
+                                    tmp32s = 0;
+                                }
+                            } while(tmp32s);
+                    else {
                         do {
                             tmp32u = arm64_lock_read_d(ED);
                             cmp32(emu, R_EAX, tmp32u);
                             if(ACCESS_FLAG(F_ZF)) {
                                 tmp32s = arm64_lock_write_d(ED, GD->dword[0]);
                             } else {
-                                R_RAX = tmp32u;
+                                R_EAX = tmp32u;
                                 tmp32s = 0;
                             }
                         } while(tmp32s);
+                        emu->regs[_AX].dword[1] = 0;
+                        if(MODREG)
+                            ED->dword[1] = 0;
+                    }
 #else
                     pthread_mutex_lock(&emu->context->mutex_lock);
                     if(rex.w) {
@@ -211,11 +337,255 @@ int RunF0(x64emu_t *emu, rex_t rex)
                         } else {
                             R_EAX = ED->dword[0];
                         }
+                        emu->regs[_AX].dword[1] = 0;
+                        if(MODREG)
+                            ED->dword[1] = 0;
                     }
                     pthread_mutex_unlock(&emu->context->mutex_lock);
 #endif
                     break;
 
+                case 0xB3:                      /* BTR Ed,Gd */
+                    CHECK_FLAGS(emu);
+                    nextop = F8;
+                    GETED(0);
+                    GETGD;
+                    tmp8u = GD->byte[0];
+                    if(!MODREG)
+                    {
+                        ED=(reg64_t*)(((uint32_t*)(ED))+(tmp8u>>5));
+                    }
+                    tmp8u&=rex.w?63:31;
+#ifdef DYNAREC
+                    if(rex.w)
+                        do {
+                            tmp64u = arm64_lock_read_dd(ED);
+                            if(tmp64u & (1LL<<tmp8u)) {
+                                SET_FLAG(F_CF);
+                                tmp64u ^= (1LL<<tmp8u);
+                                tmp32s = arm64_lock_write_dd(ED, tmp64u);
+                            } else {
+                                CLEAR_FLAG(F_CF);
+                                tmp32s = 0;
+                            }
+                        } while(tmp32s);
+                    else {
+                        do {
+                            tmp32u = arm64_lock_read_d(ED);
+                            if(tmp32u & (1<<tmp8u)) {
+                                SET_FLAG(F_CF);
+                                tmp32u ^= (1<<tmp8u);
+                                tmp32s = arm64_lock_write_d(ED, tmp32u);
+                            } else {
+                                CLEAR_FLAG(F_CF);
+                                tmp32s = 0;
+                            }
+                        } while(tmp32s);
+                        if(MODREG)
+                            ED->dword[1] = 0;
+                    }
+#else
+                    pthread_mutex_lock(&emu->context->mutex_lock);
+                    if(rex.w) {
+                        if(ED->q[0] & (1<<tmp8u)) {
+                            SET_FLAG(F_CF);
+                            ED->q[0] ^= (1<<tmp8u);
+                        } else
+                            CLEAR_FLAG(F_CF);
+                    } else {
+                        if(ED->dword[0] & (1<<tmp8u)) {
+                            SET_FLAG(F_CF);
+                            ED->dword[0] ^= (1<<tmp8u);
+                        } else
+                            CLEAR_FLAG(F_CF);
+                        if(MODREG)
+                            ED->dword[1] = 0;
+                    }
+                    pthread_mutex_unlock(&emu->context->mutex_lock);
+#endif
+                    break;
+
+                    case 0xBA:                      
+                        nextop = F8;
+                        switch((nextop>>3)&7) {
+                            case 4:                 /* BT Ed,Ib */
+                                CHECK_FLAGS(emu);
+                                GETED(1);
+                                tmp8u = F8;
+                                if(rex.w) {
+                                    tmp8u&=63;
+                                    if(ED->q[0] & (1LL<<tmp8u))
+                                        SET_FLAG(F_CF);
+                                    else
+                                        CLEAR_FLAG(F_CF);
+                                } else {
+                                    tmp8u&=31;
+                                    if(ED->dword[0] & (1<<tmp8u))
+                                        SET_FLAG(F_CF);
+                                    else
+                                        CLEAR_FLAG(F_CF);
+                                }
+                                break;
+                            case 5:             /* BTS Ed, Ib */
+                                CHECK_FLAGS(emu);
+                                GETED(1);
+                                tmp8u = F8;
+#ifdef DYNAREC
+                                if(rex.w) {
+                                    tmp8u&=63;
+                                    do {
+                                        tmp64u = arm64_lock_read_dd(ED);
+                                        if(tmp64u & (1LL<<tmp8u)) {
+                                            SET_FLAG(F_CF);
+                                            tmp32s = 0;
+                                        } else {
+                                            tmp64u ^= (1LL<<tmp8u);
+                                            tmp32s = arm64_lock_write_dd(ED, tmp64u);
+                                            CLEAR_FLAG(F_CF);
+                                        }
+                                    } while(tmp32s);
+                                } else {
+                                    tmp8u&=31;
+                                    do {
+                                        tmp32u = arm64_lock_read_d(ED);
+                                        if(tmp32u & (1<<tmp8u)) {
+                                            SET_FLAG(F_CF);
+                                            tmp32s = 0;
+                                        } else {
+                                            tmp32u ^= (1<<tmp8u);
+                                            tmp32s = arm64_lock_write_d(ED, tmp32u);
+                                            CLEAR_FLAG(F_CF);
+                                        }
+                                    } while(tmp32s);
+                                }
+#else
+                                pthread_mutex_lock(&emu->context->mutex_lock);
+                                if(rex.w) {
+                                    tmp8u&=63;
+                                    if(ED->q[0] & (1LL<<tmp8u)) {
+                                        SET_FLAG(F_CF);
+                                    } else {
+                                        ED->q[0] ^= (1LL<<tmp8u);
+                                        CLEAR_FLAG(F_CF);
+                                    }
+                                } else {
+                                    tmp8u&=31;
+                                    if(ED->dword[0] & (1<<tmp8u)) {
+                                        SET_FLAG(F_CF);
+                                    } else {
+                                        ED->dword[0] ^= (1<<tmp8u);
+                                        CLEAR_FLAG(F_CF);
+                                    }
+                                }
+                                pthread_mutex_unlock(&emu->context->mutex_lock);
+#endif
+                                break;
+                            case 6:             /* BTR Ed, Ib */
+                                CHECK_FLAGS(emu);
+                                GETED(1);
+                                tmp8u = F8;
+#ifdef DYNAREC
+                                if(rex.w) {
+                                    do {
+                                        tmp8u&=63;
+                                        tmp64u = arm64_lock_read_dd(ED);
+                                        if(tmp64u & (1LL<<tmp8u)) {
+                                            SET_FLAG(F_CF);
+                                            tmp64u ^= (1LL<<tmp8u);
+                                            tmp32s = arm64_lock_write_dd(ED, tmp64u);
+                                        } else {
+                                            tmp32s = 0;
+                                            CLEAR_FLAG(F_CF);
+                                        }
+                                    } while(tmp32s);
+                                } else {
+                                    tmp8u&=31;
+                                    do {
+                                        tmp32u = arm64_lock_read_d(ED);
+                                        if(tmp32u & (1<<tmp8u)) {
+                                            SET_FLAG(F_CF);
+                                            tmp32u ^= (1<<tmp8u);
+                                            tmp32s = arm64_lock_write_d(ED, tmp32u);
+                                        } else {
+                                            CLEAR_FLAG(F_CF);
+                                            tmp32s = 0;
+                                        }
+                                    } while(tmp32s);
+                                }
+#else
+                                pthread_mutex_lock(&emu->context->mutex_lock);
+                                if(rex.w) {
+                                    tmp8u&=63;
+                                    if(ED->q[0] & (1LL<<tmp8u)) {
+                                        SET_FLAG(F_CF);
+                                        ED->q[0] ^= (1LL<<tmp8u);
+                                    } else
+                                        CLEAR_FLAG(F_CF);
+                                } else {
+                                    tmp8u&=31;
+                                    if(ED->dword[0] & (1<<tmp8u)) {
+                                        SET_FLAG(F_CF);
+                                        ED->dword[0] ^= (1<<tmp8u);
+                                    } else
+                                        CLEAR_FLAG(F_CF);
+                                }
+                                pthread_mutex_unlock(&emu->context->mutex_lock);
+#endif
+                                break;
+                            case 7:             /* BTC Ed, Ib */
+                                CHECK_FLAGS(emu);
+                                GETED(1);
+                                tmp8u = F8;
+#ifdef DYNAREC
+                                if(rex.w) {
+                                    tmp8u&=63;
+                                    do {
+                                        tmp64u = arm64_lock_read_dd(ED);
+                                        if(tmp64u & (1LL<<tmp8u))
+                                            SET_FLAG(F_CF);
+                                        else
+                                            CLEAR_FLAG(F_CF);
+                                        tmp64u ^= (1LL<<tmp8u);
+                                        tmp32s = arm64_lock_write_dd(ED, tmp64u);
+                                    } while(tmp32s);
+                                } else {
+                                    tmp8u&=31;
+                                    do {
+                                        tmp32u = arm64_lock_read_d(ED);
+                                        if(tmp32u & (1<<tmp8u))
+                                            SET_FLAG(F_CF);
+                                        else
+                                            CLEAR_FLAG(F_CF);
+                                        tmp32u ^= (1<<tmp8u);
+                                        tmp32s = arm64_lock_write_d(ED, tmp32u);
+                                    } while(tmp32s);
+                                }
+#else
+                                pthread_mutex_lock(&emu->context->mutex_lock);
+                                if(rex.w) {
+                                    tmp8u&=63;
+                                    if(ED->q[0] & (1LL<<tmp8u))
+                                        SET_FLAG(F_CF);
+                                    else
+                                        CLEAR_FLAG(F_CF);
+                                    ED->q[0] ^= (1LL<<tmp8u);
+                                } else {
+                                    tmp8u&=31;
+                                    if(ED->dword[0] & (1<<tmp8u))
+                                        SET_FLAG(F_CF);
+                                    else
+                                        CLEAR_FLAG(F_CF);
+                                    ED->dword[0] ^= (1<<tmp8u);
+                                }
+                                pthread_mutex_unlock(&emu->context->mutex_lock);
+#endif
+                                break;
+
+                            default:
+                                return 1;
+                        }
+                        break;
+
                 case 0xC1:                      /* XADD Gd,Ed */
                     nextop = F8;
                     GETED(0);
@@ -224,14 +594,23 @@ int RunF0(x64emu_t *emu, rex_t rex)
                     if(rex.w) {
                         do {
                             tmp64u = arm64_lock_read_dd(ED);
-                            tmp64u2 = add64(emu, tmp64u, GD->dword[0]);
+                            tmp64u2 = add64(emu, tmp64u, GD->q[0]);
                         } while(arm64_lock_write_dd(ED, tmp64u2));
                         GD->q[0] = tmp64u;
                     } else {
-                        do {
-                            tmp32u = arm64_lock_read_d(ED);
-                            tmp32u2 = add32(emu, tmp32u, GD->dword[0]);
-                        } while(arm64_lock_write_d(ED, tmp32u2));
+                        if(((uintptr_t)ED)&3) {
+                            do {
+                                tmp32u = ED->dword[0] & ~0xff;
+                                tmp32u |= arm64_lock_read_b(ED);
+                                tmp32u2 = add32(emu, tmp32u, GD->dword[0]);
+                            } while(arm64_lock_write_b(ED, tmp32u2&0xff));
+                            ED->dword[0] = tmp32u2;
+                        } else {
+                            do {
+                                tmp32u = arm64_lock_read_d(ED);
+                                tmp32u2 = add32(emu, tmp32u, GD->dword[0]);
+                            } while(arm64_lock_write_d(ED, tmp32u2));
+                        }
                         GD->q[0] = tmp32u;
                         if(MODREG)
                             ED->dword[1] = 0;
@@ -254,11 +633,107 @@ int RunF0(x64emu_t *emu, rex_t rex)
 #endif
                     break;
 
+                case 0xC7:                      /* CMPXCHG8B Gq */
+                    CHECK_FLAGS(emu);
+                    nextop = F8;
+                    GETED(0);
+                    GETGD;
+#ifdef DYNAREC
+                    if(rex.w)
+                        do {
+                            arm64_lock_read_dq(&tmp64u, &tmp64u2, ED);
+                            if(R_RAX == tmp64u && R_RDX == tmp64u2) {
+                                SET_FLAG(F_ZF);
+                                tmp32s = arm64_lock_write_dq(R_RBX, R_RCX, ED);
+                            } else {
+                                CLEAR_FLAG(F_ZF);
+                                R_RAX = tmp64u;
+                                R_RDX = tmp64u2;
+                                tmp32s = 0;
+                            }
+                        } while(tmp32s);
+                    else
+                        do {
+                            tmp64u = arm64_lock_read_dd(ED);
+                            if((R_EAX == (tmp64u&0xffffffff)) && (R_EDX == ((tmp64u>>32)&0xffffffff))) {
+                                SET_FLAG(F_ZF);
+                                tmp32s = arm64_lock_write_dd(ED, R_EBX|(((uint64_t)R_ECX)<<32));
+                            } else {
+                                CLEAR_FLAG(F_ZF);
+                                R_RAX = tmp64u&0xffffffff;
+                                R_RDX = (tmp64u>>32)&0xffffffff;
+                                tmp32s = 0;
+                            }
+                        } while(tmp32s);
+#else
+                    pthread_mutex_lock(&emu->context->mutex_lock);
+                    if(rex.w) {
+                        tmp64u = ED->q[0];
+                        tmp64u2= ED->q[1];
+                        if(R_RAX == tmp64u && R_RDX == tmp64u2) {
+                            SET_FLAG(F_ZF);
+                            ED->q[0] = R_RBX;
+                            ED->q[1] = R_RCX;
+                        } else {
+                            CLEAR_FLAG(F_ZF);
+                            R_RAX = tmp64u;
+                            R_RDX = tmp64u2;
+                        }
+                    } else {
+                        tmp32u = ED->dword[0];
+                        tmp32u2= ED->dword[1];
+                        if(R_EAX == tmp32u && R_EDX == tmp32u2) {
+                            SET_FLAG(F_ZF);
+                            ED->dword[0] = R_EBX;
+                            ED->dword[1] = R_ECX;
+                        } else {
+                            CLEAR_FLAG(F_ZF);
+                            R_RAX = tmp32u;
+                            R_RDX = tmp32u2;
+                        }
+                    }
+                    pthread_mutex_unlock(&emu->context->mutex_lock);
+#endif
+                    break;
+
             default:
                 return 1;
             }
             break;
 
+        case 0x66:
+            return Run66F0(emu, rex);   // more opcode F0 66 and 66 F0 is the same
+
+        case 0x80:                      /* GRP Eb,Ib */
+            nextop = F8;
+            GETEB(1);
+            tmp8u = F8;
+#ifdef DYNAREC
+            switch((nextop>>3)&7) {
+                case 0: do { tmp8u2 = arm64_lock_read_b(EB); tmp8u2 = add8(emu, tmp8u2, tmp8u);} while(arm64_lock_write_b(EB, tmp8u2)); break;
+                case 1: do { tmp8u2 = arm64_lock_read_b(EB); tmp8u2 =  or8(emu, tmp8u2, tmp8u);} while(arm64_lock_write_b(EB, tmp8u2)); break;
+                case 2: do { tmp8u2 = arm64_lock_read_b(EB); tmp8u2 = adc8(emu, tmp8u2, tmp8u);} while(arm64_lock_write_b(EB, tmp8u2)); break;
+                case 3: do { tmp8u2 = arm64_lock_read_b(EB); tmp8u2 = sbb8(emu, tmp8u2, tmp8u);} while(arm64_lock_write_b(EB, tmp8u2)); break;
+                case 4: do { tmp8u2 = arm64_lock_read_b(EB); tmp8u2 = and8(emu, tmp8u2, tmp8u);} while(arm64_lock_write_b(EB, tmp8u2)); break;
+                case 5: do { tmp8u2 = arm64_lock_read_b(EB); tmp8u2 = sub8(emu, tmp8u2, tmp8u);} while(arm64_lock_write_b(EB, tmp8u2)); break;
+                case 6: do { tmp8u2 = arm64_lock_read_b(EB); tmp8u2 = xor8(emu, tmp8u2, tmp8u);} while(arm64_lock_write_b(EB, tmp8u2)); break;
+                case 7:               cmp8(emu, EB->byte[0], tmp8u); break;
+            }
+#else
+            pthread_mutex_lock(&emu->context->mutex_lock);
+            switch((nextop>>3)&7) {
+                case 0: EB->byte[0] = add8(emu, EB->byte[0], tmp8u); break;
+                case 1: EB->byte[0] =  or8(emu, EB->byte[0], tmp8u); break;
+                case 2: EB->byte[0] = adc8(emu, EB->byte[0], tmp8u); break;
+                case 3: EB->byte[0] = sbb8(emu, EB->byte[0], tmp8u); break;
+                case 4: EB->byte[0] = and8(emu, EB->byte[0], tmp8u); break;
+                case 5: EB->byte[0] = sub8(emu, EB->byte[0], tmp8u); break;
+                case 6: EB->byte[0] = xor8(emu, EB->byte[0], tmp8u); break;
+                case 7:               cmp8(emu, EB->byte[0], tmp8u); break;
+            }
+            pthread_mutex_unlock(&emu->context->mutex_lock);
+#endif
+            break;
         case 0x81:              /* GRP Ed,Id */
         case 0x83:              /* GRP Ed,Ib */
             nextop = F8;
@@ -344,9 +819,144 @@ int RunF0(x64emu_t *emu, rex_t rex)
             pthread_mutex_unlock(&emu->context->mutex_lock);
 #endif
             break;
-            
+        case 0x87:                      /* XCHG Ed,Gd */
+            nextop = F8;
+#ifdef DYNAREC
+            GETED(0);
+            GETGD;
+            if(MODREG) {
+                if(rex.w) {
+                    tmp64u = GD->q[0];
+                    GD->q[0] = ED->q[0];
+                    ED->q[0] = tmp64u;
+                } else {
+                    tmp32u = GD->dword[0];
+                    GD->q[0] = ED->dword[0];
+                    ED->q[0] = tmp32u;
+                }
+            } else {
+                if(rex.w) {
+                    GD->q[0] = arm64_lock_xchg(ED, GD->q[0]);
+                } else {
+                    do {
+                        tmp32u = arm64_lock_read_d(ED);
+                    } while(arm64_lock_write_d(ED, GD->dword[0]));
+                    GD->q[0] = tmp32u;
+                }
+            }
+#else
+            GETED(0);
+            GETGD;
+            pthread_mutex_lock(&emu->context->mutex_lock);
+            if(rex.w) {
+                tmp64u = GD->q[0];
+                GD->q[0] = ED->q[0];
+                ED->q[0] = tmp64u;
+            } else {
+                tmp32u = GD->dword[0];
+                GD->q[0] = ED->dword[0];
+                if(MODREG)
+                    ED->q[0] = tmp32u;
+                else
+                    ED->dword[0] = tmp32u;
+            }
+            pthread_mutex_unlock(&emu->context->mutex_lock);
+#endif
+            break;            
+        case 0xFF:              /* GRP 5 Ed */
+            nextop = F8;
+            GETED(0);
+            switch((nextop>>3)&7) {
+                case 0:                 /* INC Ed */
+#ifdef DYNAREC
+                    if(rex.w)
+                        if(((uintptr_t)ED)&7) {
+                            // unaligned
+                            do {
+                                tmp64u = ED->q[0] & 0xffffffffffffff00LL;
+                                tmp64u |= arm64_lock_read_b(ED);
+                                tmp64u = inc64(emu, tmp64u);
+                            } while(arm64_lock_write_b(ED, tmp64u&0xff));
+                            ED->q[0] = tmp64u;
+                        }
+                        else
+                            do {
+                                tmp64u = arm64_lock_read_dd(ED);
+                            } while(arm64_lock_write_dd(ED, inc64(emu, tmp64u)));
+                    else {
+                        if((uintptr_t)ED&3) { 
+                            //meh.
+                            do {
+                                tmp32u = ED->dword[0];
+                                tmp32u &=~0xff;
+                                tmp32u |= arm64_lock_read_b(ED);
+                                tmp32u = inc32(emu, tmp32u);
+                        } while(arm64_lock_write_b(ED, tmp32u&0xff));
+                            ED->dword[0] = tmp32u;
+                        } else {
+                            do {
+                                tmp32u = arm64_lock_read_d(ED);
+                            } while(arm64_lock_write_d(ED, inc32(emu, tmp32u)));
+                        }
+                        if(MODREG) ED->dword[1] = 0;
+                    }
+#else
+                    pthread_mutex_lock(&emu->context->mutex_lock);
+                    if(rex.w) {
+                        ED->q[0] = inc64(emu, ED->q[0]);
+                    } else {
+                        if(MODREG)
+                            ED->q[0] = inc32(emu, ED->dword[0]);
+                        else
+                            ED->dword[0] = inc32(emu, ED->dword[0]);
+                    }
+                    pthread_mutex_unlock(&emu->context->mutex_lock);
+#endif
+                    break;
+                case 1:                 /* DEC Ed */
+#ifdef DYNAREC
+                    if(rex.w)
+                        if(((uintptr_t)ED)&7) {
+                            // unaligned
+                            do {
+                                tmp64u = ED->q[0] & 0xffffffffffffff00LL;
+                                tmp64u |= arm64_lock_read_b(ED);
+                                tmp64u = dec64(emu, tmp64u);
+                            } while(arm64_lock_write_b(ED, tmp64u&0xff));
+                            ED->q[0] = tmp64u;
+                        }
+                        else
+                            do {
+                                tmp64u = arm64_lock_read_dd(ED);
+                            } while(arm64_lock_write_dd(ED, dec64(emu, tmp64u)));
+                    else {
+                        do {
+                            tmp32u = arm64_lock_read_d(ED);
+                        } while(arm64_lock_write_d(ED, dec32(emu, tmp32u)));
+                        if(MODREG) ED->dword[1] = 0;
+                    }
+#else
+                    pthread_mutex_lock(&emu->context->mutex_lock);
+                    if(rex.w) {
+                        ED->q[0] = dec64(emu, ED->q[0]);
+                    } else {
+                        if(MODREG)
+                            ED->q[0] = dec32(emu, ED->dword[0]);
+                        else
+                            ED->dword[0] = dec32(emu, ED->dword[0]);
+                    }
+                    pthread_mutex_unlock(&emu->context->mutex_lock);
+#endif
+                    break;
+                default:
+                    printf_log(LOG_NONE, "Illegal Opcode 0xF0 0xFF 0x%02X 0x%02X\n", nextop, PK(0));
+                    emu->quit=1;
+                    emu->error |= ERR_ILLEGAL;
+                    break;
+            }
+            break;
         default:
             return 1;
     }
     return 0;
-}
+}

src/emu/x64runf20f.c

@@ -53,6 +53,12 @@ int RunF20F(x64emu_t *emu, rex_t rex)
         GETGX;
         EX->q[0] = GX->q[0];
         break;
+    case 0x12:  /* MOVDDUP Gx, Ex */
+        nextop = F8;
+        GETEX(0);
+        GETGX;
+        GX->q[1] = GX->q[0] = EX->q[0];
+        break;
 
     case 0x2A:  /* CVTSI2SD Gx, Ed */
         nextop = F8;
@@ -110,6 +116,7 @@ int RunF20F(x64emu_t *emu, rex_t rex)
                     GD->sdword[0] = EX->d[0];
                     break;
             }
+            GD->dword[1] = 0;
         }
         break;
         
@@ -205,7 +212,7 @@ int RunF20F(x64emu_t *emu, rex_t rex)
         
     case 0xC2:  /* CMPSD Gx, Ex, Ib */
         nextop = F8;
-        GETEX(0);
+        GETEX(1);
         GETGX;
         tmp8u = F8;
         tmp8s = 0;
@@ -222,6 +229,16 @@ int RunF20F(x64emu_t *emu, rex_t rex)
         GX->q[0]=(tmp8s)?0xffffffffffffffffLL:0LL;
         break;
 
+    case 0xD0:  /* ADDSUBPS Gx, Ex */
+        nextop = F8;
+        GETEX(0);
+        GETGX;
+        GX->f[0] -= EX->f[0];
+        GX->f[1] += EX->f[1];
+        GX->f[2] -= EX->f[2];
+        GX->f[3] += EX->f[3];
+        break;
+
     case 0xD6:  /* MOVDQ2Q Gm, Ex */
         nextop = F8;
         GETEX(0);
@@ -254,7 +271,14 @@ int RunF20F(x64emu_t *emu, rex_t rex)
         GX->q[1] = 0;
         break;
 
-    default:
+    case 0xF0:  /* LDDQU Gx, Ex */
+        nextop = F8;
+        GETEX(0);
+        GETGX;
+        memcpy(GX, EX, 16);
+        break;
+
+   default:
         return 1;
     }
     return 0;