Bumped version to v0.2.6

* Update CMakeLists.txt

* Update COMPILE.md

* Update COMPILE.md

.clang-format

@@ -0,0 +1,14 @@
+---
+BasedOnStyle: WebKit
+AlignTrailingComments: true
+AllowShortBlocksOnASingleLine: true
+AllowShortCaseLabelsOnASingleLine: true
+AllowShortFunctionsOnASingleLine: true
+AllowShortIfStatementsOnASingleLine: true
+ColumnLimit: 0
+IndentWidth: 4
+SortIncludes: false
+MaxEmptyLinesToKeep: 2
+IndentCaseLabels: true
+AlignConsecutiveMacros: true
+---

.github/workflows/manual.yml

@@ -17,8 +17,12 @@ on:
         - RK3399
         - RK3588
         - RPI4ARM64
+        - RPI5ARM64
         - SD845
+        - SD888
+        - ADLINK
         - TEGRAX1
+        - ARM64
       build_type:
         description: 'Build type'
         required: true

.github/workflows/release.yml

@@ -27,7 +27,7 @@ jobs:
     strategy:
       fail-fast: false
       matrix:
-        platform: [X64, OTHER_ARM, RISCV, RPI4ARM64, RK3326, RK3399, RK3588, PHYTIUM, SD845]
+        platform: [X64, OTHER_ARM, RISCV, RPI4ARM64, RPI5ARM64, RK3326, RK3399, RK3588, PHYTIUM, SD845, SD888, ADLINK, ARM64, ANDROID]
         type: [Release, Trace]
         os: [ubuntu-latest]
         include:
@@ -47,9 +47,17 @@ jobs:
         run: |
           sudo apt-get update
           if [[ ${{ matrix.platform }} != 'X64' && ${{ matrix.platform }} != 'OTHER_ARM' && ${{ matrix.platform }} != 'RISCV' ]]; then
-            echo "BOX64_PLATFORM_MARCRO=-D${{ matrix.platform }}=1" >> $GITHUB_ENV
-            echo "BOX64_COMPILER=aarch64-linux-gnu-gcc" >> $GITHUB_ENV
-            sudo apt-get -y install git gcc-aarch64-linux-gnu cmake make python3
+            sudo apt-get -y install git cmake make python3
+            if [[ ${{ matrix.platform }} == 'ANDROID' ]]; then
+              wget https://dl.google.com/android/repository/android-ndk-r23b-linux.zip
+              unzip android-ndk-r23b-linux.zip
+              echo "BOX64_COMPILER=$PWD/android-ndk-r23b/toolchains/llvm/prebuilt/linux-x86_64/bin/aarch64-linux-android31-clang" >> $GITHUB_ENV
+              echo "BOX64_PLATFORM_MARCRO=-DANDROID=1 -DARM_DYNAREC=1 -DNOLOADADDR=1" >> $GITHUB_ENV
+            else
+              sudo apt-get -y install git gcc-aarch64-linux-gnu
+              echo "BOX64_PLATFORM_MARCRO=-D${{ matrix.platform }}=1" >> $GITHUB_ENV
+              echo "BOX64_COMPILER=aarch64-linux-gnu-gcc" >> $GITHUB_ENV
+            fi
           else
             if [[ ${{ matrix.platform }} == 'X64' ]]; then
               echo "BOX64_PLATFORM_MARCRO=-DLD80BITS=1 -DNOALIGN=1" >> $GITHUB_ENV
@@ -88,14 +96,34 @@ jobs:
                    ${{ env.BOX64_PLATFORM_MARCRO }}\
                    -DCMAKE_BUILD_TYPE=${{ env.BOX64_BUILD_TYPE }}\
                    -DHAVE_TRACE=${{ env.BOX64_HAVE_TRACE }}\
-                   -DCMAKE_VERBOSE_MAKEFILE:BOOL=ON
+                   -DCMAKE_VERBOSE_MAKEFILE:BOOL=ON\
+                   -DCI=${{ matrix.platform != 'ANDROID' }}
           make -j$(nproc) VERBOSE=1
 
       - name: "Test Box64"
-        if: ${{ matrix.platform == 'X64' }}
+        if: ${{ matrix.platform != 'TEGRAX1' }}
         run: |
+          if [[ ${{ matrix.platform }} != 'X64' && ${{ matrix.platform }} != 'ANDROID' ]]; then
+            mkdir qemu8.1.0
+            wget -O- -q https://archive.archlinux.org/packages/q/qemu-user-static/qemu-user-static-8.1.0-2-x86_64.pkg.tar.zst | tar -I zstd -C qemu8.1.0 -xf -
+            sudo cp qemu8.1.0/usr/bin/* /usr/bin/
+          fi
+
           cd build
-          ctest -j$(nproc)
+          if [[ ${{ matrix.platform }} == 'RISCV' ]]; then
+            INTERPRETER=qemu-riscv64-static QEMU_LD_PREFIX=/usr/riscv64-linux-gnu/ ctest -j$(nproc) --rerun-failed --output-on-failure
+            INTERPRETER=qemu-riscv64-static QEMU_LD_PREFIX=/usr/riscv64-linux-gnu/ BOX64_DYNAREC=0 ctest -j$(nproc) --rerun-failed --output-on-failure
+            INTERPRETER=qemu-riscv64-static QEMU_LD_PREFIX=/usr/riscv64-linux-gnu/ QEMU_CPU=rv64,zba=true,zbb=true,zbc=true,zbs=true ctest -j$(nproc) --rerun-failed --output-on-failure
+            INTERPRETER=qemu-riscv64-static QEMU_LD_PREFIX=/usr/riscv64-linux-gnu/ QEMU_CPU=rv64,xtheadba=true,xtheadba=true,xtheadbb=true,xtheadbs=true,xtheadcondmov=true,xtheadmemidx=true,xtheadmempair=true,xtheadfmemidx=true,xtheadmac=true,xtheadfmv=true ctest -j$(nproc) --rerun-failed --output-on-failure
+          elif [[ ${{ matrix.platform }} != 'X64' && ${{ matrix.platform }} != 'ANDROID' ]]; then # AArch64
+            INTERPRETER=qemu-aarch64-static QEMU_LD_PREFIX=/usr/aarch64-linux-gnu/ BOX64_DYNAREC=0 ctest -j$(nproc) --rerun-failed --output-on-failure
+            INTERPRETER=qemu-aarch64-static QEMU_LD_PREFIX=/usr/aarch64-linux-gnu/ ctest -j$(nproc) --rerun-failed --output-on-failure
+          elif [[ ${{ matrix.platform }} == 'ANDROID' ]]; then
+            true
+          else
+            BOX64_DYNAREC=0 ctest -j$(nproc) --rerun-failed --output-on-failure
+            ctest -j$(nproc) --rerun-failed --output-on-failure
+          fi
 
       - name: "Upload Artifact"
         uses: actions/upload-artifact@v3

.gitignore

@@ -65,3 +65,6 @@ backup/
 !/LLVMprivateGenerator/Makefile
 !/LLVMprivateGenerator/main.cpp
 !/LLVMprivateGenerator/registered_structs.cpp
+
+# macOS
+.DS_Store

CMakeLists.txt

@@ -7,6 +7,8 @@ SET(CMAKE_CXX_FLAGS_DEBUG  "-O0 -g")
 
 option(RPI3ARM64 "Set to ON if targeting an RaspberryPI3 device with multiarch arm64 and armhf" ${RPI3ARM64})
 option(RPI4ARM64 "Set to ON if targeting an RaspberryPI4 device with multiarch arm64 and armhf" ${RPI4ARM64})
+option(RPI5ARM64 "Set to ON if targeting an RaspberryPi5 device with multiarch arm64 and armhf" ${RPI5ARM64})
+option(RPI5ARM64PS16K "Set to ON if targeting an RaspberryPi5 device with multiarch arm64, armhf, and 16k pages" ${RPI5ARM64PS16K})
 option(RK3326 "Set to ON if targeting an Rockchip RK3326 based device" ${RK3326})
 option(RK3399 "Set to ON if targeting an Rockchip RK3399 based device" ${RK3399})
 option(RK3588 "Set to ON if targeting an Rockchip RK3588(S) based device" ${RK3588})
@@ -14,47 +16,70 @@ option(ODROIDN2 "Set to ON if targeting an Odroid-N2 device" ${ODROIDN2})
 option(TEGRAX1 "Set to ON if targeting an Tegra X1 based device" ${TEGRAX1})
 option(PHYTIUM "Set to ON if targeting an Phytium (D2000 or FT2000/4) based device" ${PHYTIUM})
 option(SD845 "Set to ON if targeting a Snapragon 845 based device" ${SD845})
+option(SD888 "Set to ON if targeting a Snapragon 888 based device" ${SD888})
+option(SD8G2 "Set to ON if targeting a Snapragon 8 Gen 2 based device" ${SD8G2})
+option(ADLINK "Set to ON if targeting an ADLink AmpereAltra based device" ${ADLINK})
 option(M1 "Set to ON if targeting a AppleM1 running on Asahi computer" ${M1})
 option(LARCH64 "Set to ON if targeting an Loongarch64 based device" ${LARCH64})
 option(RV64 "Set to ON if targeting an RISC-V RV64GC based device" ${RV64})
 option(PPC64LE "Set to ON if targeting an PowerPC 64 LE based device" ${PPC64LE})
 option(LX2160A "Set to ON if targeting an LX2160A based device" ${LX2160A})
+option(ARM64 "Set to ON if targeting a generic ARM64 based device" ${ARM64})
+option(ANDROID "Set to ON if targeting an Android device" ${ANDROID})
+option(TERMUX "Set to ON if targeting an Android device with Termux" ${TERMUX})
 option(USE_CCACHE "Set to ON to use ccache if present in the system" ${USE_CCACHE})
 option(HAVE_TRACE "Set to ON to have Trace ability (needs ZydisInfo library)" ${HAVE_TRACE})
+option(SAVE_MEM "Set to ON to build dynarec with some slower memory saving optimisations" ${SAVE_MEM})
 option(NOLOADADDR "Set to ON to avoid fixing the load address of Box64" OFF)
 option(NOGIT "Set to ON if not building from a git clone repo (like when building from a zip download from github)" ${NOGIT})
 option(BAD_SIGNAL "Set to ON to activate the workaround for incoherent si_info on SIGSEGV" ${BAD_SIGNAL})
 option(SW64 "Set ON if targeting an SW64 based device" ${SW64})
+option(CI "Set to ON if running in CI" ${CI})
+option(WITH_MOLD "Set to ON to use with mold" ${WITH_MOLD})
 
+if(TERMUX)
+    set(TERMUX_PATH "/data/data/com.termux/files")
+    set(ANDROID ON CACHE BOOL "")
+endif()
 if(LARCH64)
     set(LD80BITS OFF CACHE BOOL "")
     set(NOALIGN OFF CACHE BOOL "")
     set(ARM_DYNAREC OFF CACHE BOOL "")
+    set(RV64_DYNAREC OFF CACHE BOOL "")
 endif()
 if(RV64)
     set(LD80BITS OFF CACHE BOOL "")
     set(NOALIGN OFF CACHE BOOL "")
-    set(ARM_DYNAREC OFF CACHE BOOL "")  
+    set(ARM_DYNAREC OFF CACHE BOOL "")
+    set(RV64_DYNAREC ON CACHE BOOL "")
     set(PAGE16K OFF CACHE BOOL "")
 endif()
 if(PPC64LE)
     set(LD80BITS OFF CACHE BOOL "")
     set(NOALIGN OFF CACHE BOOL "")
     set(ARM_DYNAREC OFF CACHE BOOL "")
+    set(RV64_DYNAREC OFF CACHE BOOL "")
     set(PAGE16K OFF CACHE BOOL "")
 endif()
-if(RK3399 OR RK3588 OR ODROIDN2 OR RPI3ARM64 OR RPI4ARM64 OR RK3326 OR TEGRAX1 OR PHYTIUM OR SD845 OR LX2160A OR M1)
+if(RPI5ARM64PS16K)
+    set(RPI5ARM64 ON CACHE BOOL "")
+endif()
+if(RK3399 OR RK3588 OR ODROIDN2 OR RPI3ARM64 OR RPI4ARM64 OR RPI5ARM64 OR RK3326 OR TEGRAX1 OR PHYTIUM OR SD845 OR SD888 OR SD8G2 OR LX2160A OR M1 OR ARM64 OR ADLINK)
     set(LD80BITS OFF CACHE BOOL "")
     set(NOALIGN OFF CACHE BOOL "")
     set(ARM_DYNAREC ON CACHE BOOL "")
+    set(RV64_DYNAREC OFF CACHE BOOL "")
 endif()
-if(RK3399 OR RK3588 OR ODROIDN2 OR RPI3ARM64 OR RPI4ARM64 OR RK3326 OR TEGRAX1 OR PHYTIUM OR SD845 OR LX2160A)
+if(RK3399 OR RK3588 OR ODROIDN2 OR RPI3ARM64 OR RPI4ARM64 OR RK3326 OR TEGRAX1 OR PHYTIUM OR SD845 OR SD888 OR SD8G2 OR LX2160A OR ADLINK)
     set(PAGE16K OFF CACHE BOOL "")
 endif()
+if(RK3399 OR ODROIDN2 OR RPI3ARM64 OR RPI4ARM64 OR RPI5ARM64)
+    set(SAVE_MEM ON CACHE BOOL "")
+endif()
 if(RK3588)
     set(BAD_SIGNAL ON CACHE BOOL "")
 endif()
-if(M1 OR LARCH64)
+if(M1 OR LARCH64 OR RPI5ARM64PS16K)
     set(PAGE16K ON CACHE BOOL "")
 endif()
 if(SW64)
@@ -62,27 +87,34 @@ if(SW64)
     set(NOALIGN OFF CACHE BOOL "")
     set(PAGE8K ON CACHE BOOL "")
 endif()
+if(ANDROID)
+    set(NOLOADADDR ON CACHE BOOL "")
+    set(BAD_SIGNAL ON CACHE BOOL "")
+endif()
 
 option(LD80BITS "Set to ON if host device have 80bits long double (i.e. i386)" ${LD80BITS})
 option(NOALIGN "Set to ON if host device doesn't need re-align (i.e. i386)" ${NOALIGN})
 option(ARM_DYNAREC "Set to ON to use ARM Dynamic Recompilation" ${ARM_DYNAREC})
+option(RV64_DYNAREC "Set to ON to use RISC-V Dynamic Recompilation" ${RV64_DYNAREC})
 option(PAGE8K "Set to ON if host device have PageSize of 8K (instead of 4K)" ${PAGE8K})
 option(PAGE16K "Set to ON if host device have PageSize of 16K (instead of 4K)" ${PAGE16K})
 option(PAGE64K "Set to ON if host device have PageSize of 64K (instead of 4K)" ${PAGE64K})
 option(STATICBUILD "Set to ON to have a static build (Warning, not working)" ${STATICBUILD})
+option(NO_LIB_INSTALL "Set ON to not install a few x86_64 libs that are used by many program" ${NO_LIB_INSTALL})
+option(NO_CONF_INSTALL "Set ON to not install config files" ${NO_CONF_INSTALL})
 
 if(${CMAKE_VERSION} VERSION_LESS "3.12.2")
     find_package(PythonInterp 3)
     if(NOT PYTHONINTERP_FOUND)
-        message( FATAL_ERROR "You need a Python interpretor, CMake will exit." )
+        message( FATAL_ERROR "You need a Python interpreter, CMake will exit." )
     endif()
     if(${PYTHON_VERSION_MAJOR} LESS 3)
-        message( FATAL_ERROR "You need a Python 3 interpretor, CMake will exit." )
+        message( FATAL_ERROR "You need a Python 3 interpreter, CMake will exit." )
     endif()
 else()
     find_package(Python3)
     if(NOT Python3_Interpreter_FOUND)
-        message( FATAL_ERROR "You need a Python interpretor, CMake will exit." )
+        message( FATAL_ERROR "You need a Python interpreter, CMake will exit." )
     endif()
     set(PYTHON_EXECUTABLE ${Python3_EXECUTABLE} CACHE INTERNAL "The Python3 executable" FORCE)
 endif()
@@ -108,6 +140,11 @@ elseif(RPI4ARM64)
     add_definitions(-DRPI4ARM64)
     add_definitions(-pipe -march=armv8-a+crc -mtune=cortex-a72)
     set(CMAKE_ASM_FLAGS  "-pipe -march=armv8-a+crc -mtune=cortex-a72")
+elseif(RPI5ARM64)
+    add_definitions(-DRPI)
+    add_definitions(-DRPI5ARM64)
+    add_definitions(-pipe -march=armv8.2-a+crc+crypto+fp16+rcpc+dotprod -mtune=cortex-a76)
+    set(CMAKE_ASM_FLAGS  "-pipe -march=armv8.2-a+crc+crypto+fp16+rcpc+dotprod -mtune=cortex-a76")
 elseif(RK3326)
     add_definitions(-DRK3326)
     add_definitions(-pipe -march=armv8-a+crc+simd+crypto -mcpu=cortex-a35+crypto)
@@ -130,13 +167,25 @@ elseif(TEGRAX1)
     add_definitions(-pipe -march=armv8-a+crc+simd+crypto -mcpu=cortex-a57+crypto)
     set(CMAKE_ASM_FLAGS  "-pipe -march=armv8-a+crc+simd+crypto -mcpu=cortex-a57+crypto")
 elseif(PHYTIUM)
-    add_definitions(-DPHYSIUM)
+    add_definitions(-DPHYTIUM)
     add_definitions(-pipe -march=armv8.1-a+crc+simd+crypto)
     set(CMAKE_ASM_FLAGS  "-pipe -march=armv8.1-a+crc+simd+crypto+aes")
 elseif(SD845)
     add_definitions(-DSD845)
     add_definitions(-pipe -march=armv8.2-a+simd+crypto -mtune=cortex-a75.cortex-a55)
     set(CMAKE_ASM_FLAGS  "-pipe -march=armv8.2-a+simd+crypto -mtune=cortex-a75.cortex-a55")
+elseif(SD888)
+    add_definitions(-DSD888)
+    add_definitions(-pipe -march=armv8.4-a+simd+crypto)
+    set(CMAKE_ASM_FLAGS  "-pipe -march=armv8.4-a+simd+crypto")
+elseif(SD8G2)
+    add_definitions(-DSD8G2)
+    add_definitions(-pipe -march=armv9-a+i8mm+sm4+sha3+rcpc+crypto+nosve+nosve2)
+    set(CMAKE_ASM_FLAGS  "-pipe -march=armv9-a+i8mm+sm4+sha3+rcpc+crypto+nosve+nosve2")
+elseif(ADLINK)
+    add_definitions(-DADLINK)
+    add_definitions(-pipe -mcpu=neoverse-n1 -fuse-ld=gold -fuse-linker-plugin)
+    set(CMAKE_ASM_FLAGS  "-pipe -mcpu=neoverse-n1")
 elseif(M1)
     add_definitions(-DM1)
     add_definitions(-pipe -march=armv8.5-a+simd+crypto)
@@ -157,14 +206,26 @@ elseif(LX2160A)
     set(CMAKE_ASM_FLAGS  "-pipe -march=armv8-a+crypto+crc -mcpu=cortex-a72+crypto")
 elseif(SW64)
     add_definitions(-DSW64)
+elseif(ARM64)
+    #add_definitions(-pipe -march=native)
+    set(CMAKE_ASM_FLAGS  "-pipe -march=armv8-a+simd")
 elseif(ARM_DYNAREC)
-    set(CMAKE_ASM_FLAGS  "-pipe -march=armv8-a+crc+simd+crypto")
+    if(NOT ANDROID)
+        set(CMAKE_ASM_FLAGS  "-pipe -march=armv8-a+crc+simd+crypto")
+    endif()
+endif()
+if(ANDROID)
+    add_definitions(-DANDROID)
+endif()
+if(TERMUX)
+    add_definitions(-DTERMUX)
 endif()
-
 if(BAD_SIGNAL)
     add_definitions(-DBAD_SIGNAL)
 endif()
-
+if(SAVE_MEM)
+    add_definitions(-DSAVE_MEM)
+endif()
 if(PAGE8K)
     add_definitions(-DPAGE8K)
 endif()
@@ -208,6 +269,12 @@ if(ARM_DYNAREC)
     enable_language(ASM)
     include_directories("${BOX64_ROOT}/src/dynarec/arm64")
     set(DYNAREC ON)
+elseif(RV64_DYNAREC)
+    add_definitions(-DDYNAREC)
+    add_definitions(-DRV64)
+    enable_language(ASM)
+    include_directories("${BOX64_ROOT}/src/dynarec/rv64")
+    set(DYNAREC ON)
 else()
     set(DYNAREC OFF)
 endif()
@@ -246,24 +313,65 @@ set(ELFLOADER_SRC
     "${BOX64_ROOT}/src/mallochook.c"
     "${BOX64_ROOT}/src/steam.c"
     "${BOX64_ROOT}/src/dynarec/dynarec.c"
-    "${BOX64_ROOT}/src/elfs/elfdwarf_private.c"
     "${BOX64_ROOT}/src/elfs/elfloader.c"
     "${BOX64_ROOT}/src/elfs/elfparser.c"
     "${BOX64_ROOT}/src/elfs/elfload_dump.c"
+    "${BOX64_ROOT}/src/emu/x64compstrings.c"
     "${BOX64_ROOT}/src/emu/x64emu.c"
     "${BOX64_ROOT}/src/emu/x64int3.c"
     "${BOX64_ROOT}/src/emu/x87emu_private.c"
     "${BOX64_ROOT}/src/emu/x64primop.c"
+    "${BOX64_ROOT}/src/emu/x64run_private.c"
+    "${BOX64_ROOT}/src/emu/x64shaext.c"
+    "${BOX64_ROOT}/src/emu/x64syscall.c"
+    "${BOX64_ROOT}/src/emu/x86syscall.c"
+    "${BOX64_ROOT}/src/emu/x64tls.c"
+    "${BOX64_ROOT}/src/emu/x64trace.c"
+    "${BOX64_ROOT}/src/librarian/librarian.c"
+    "${BOX64_ROOT}/src/librarian/library.c"
+    "${BOX64_ROOT}/src/librarian/dictionnary.c"
+    "${BOX64_ROOT}/src/librarian/globalsymbols.c"
+    "${BOX64_ROOT}/src/librarian/symbols.c"
+    "${BOX64_ROOT}/src/libtools/auxval.c"
+    "${BOX64_ROOT}/src/libtools/myalign.c"
+    "${BOX64_ROOT}/src/libtools/sdl1rwops.c"
+    "${BOX64_ROOT}/src/libtools/sdl2rwops.c"
+    "${BOX64_ROOT}/src/libtools/signals.c"
+    "${BOX64_ROOT}/src/libtools/threads.c"
+    "${BOX64_ROOT}/src/tools/bitutils.c"
+    "${BOX64_ROOT}/src/tools/box64stack.c"
+    "${BOX64_ROOT}/src/tools/bridge.c"
+    "${BOX64_ROOT}/src/tools/callback.c"
+    "${BOX64_ROOT}/src/tools/my_cpuid.c"
+    "${BOX64_ROOT}/src/tools/gtkclass.c"
+    "${BOX64_ROOT}/src/tools/pathcoll.c"
+    "${BOX64_ROOT}/src/tools/fileutils.c"
+    "${BOX64_ROOT}/src/tools/rcfile.c"
+    "${BOX64_ROOT}/src/tools/wine_tools.c"
+    "${BOX64_ROOT}/src/wrapped/generated/wrapper.c"
+)
+if(NOT ANDROID)
+    list(APPEND ELFLOADER_SRC
+        "${BOX64_ROOT}/src/libtools/obstack.c"
+        "${BOX64_ROOT}/src/elfs/elfdwarf_private.c"
+    )
+endif()
+
+set(INTERPRETER
     "${BOX64_ROOT}/src/emu/x64run.c"
     "${BOX64_ROOT}/src/emu/x64run0f.c"
     "${BOX64_ROOT}/src/emu/x64run64.c"
     "${BOX64_ROOT}/src/emu/x64run66.c"
     "${BOX64_ROOT}/src/emu/x64run660f.c"
+    "${BOX64_ROOT}/src/emu/x64run66f20f.c"
+    "${BOX64_ROOT}/src/emu/x64run66f30f.c"
     "${BOX64_ROOT}/src/emu/x64run6664.c"
     "${BOX64_ROOT}/src/emu/x64run66d9.c"
     "${BOX64_ROOT}/src/emu/x64run66dd.c"
     "${BOX64_ROOT}/src/emu/x64run66f0.c"
     "${BOX64_ROOT}/src/emu/x64run67.c"
+    "${BOX64_ROOT}/src/emu/x64run67_32.c"
+    "${BOX64_ROOT}/src/emu/x64run6764_32.c"
     "${BOX64_ROOT}/src/emu/x64run670f.c"
     "${BOX64_ROOT}/src/emu/x64run6766.c"
     "${BOX64_ROOT}/src/emu/x64run67660f.c"
@@ -278,32 +386,6 @@ set(ELFLOADER_SRC
     "${BOX64_ROOT}/src/emu/x64runf0.c"
     "${BOX64_ROOT}/src/emu/x64runf20f.c"
     "${BOX64_ROOT}/src/emu/x64runf30f.c"
-    "${BOX64_ROOT}/src/emu/x64run_private.c"
-    "${BOX64_ROOT}/src/emu/x64syscall.c"
-    "${BOX64_ROOT}/src/emu/x64tls.c"
-    "${BOX64_ROOT}/src/emu/x64trace.c"
-    "${BOX64_ROOT}/src/librarian/librarian.c"
-    "${BOX64_ROOT}/src/librarian/library.c"
-    "${BOX64_ROOT}/src/librarian/dictionnary.c"
-    "${BOX64_ROOT}/src/librarian/globalsymbols.c"
-    "${BOX64_ROOT}/src/librarian/symbols.c"
-    "${BOX64_ROOT}/src/libtools/auxval.c"
-    "${BOX64_ROOT}/src/libtools/obstack.c"
-    "${BOX64_ROOT}/src/libtools/myalign.c"
-    "${BOX64_ROOT}/src/libtools/sdl1rwops.c"
-    "${BOX64_ROOT}/src/libtools/sdl2rwops.c"
-    "${BOX64_ROOT}/src/libtools/signals.c"
-    "${BOX64_ROOT}/src/libtools/threads.c"
-    "${BOX64_ROOT}/src/tools/box64stack.c"
-    "${BOX64_ROOT}/src/tools/bridge.c"
-    "${BOX64_ROOT}/src/tools/callback.c"
-    "${BOX64_ROOT}/src/tools/my_cpuid.c"
-    "${BOX64_ROOT}/src/tools/gtkclass.c"
-    "${BOX64_ROOT}/src/tools/pathcoll.c"
-    "${BOX64_ROOT}/src/tools/fileutils.c"
-    "${BOX64_ROOT}/src/tools/rcfile.c"
-    "${BOX64_ROOT}/src/tools/wine_tools.c"
-    "${BOX64_ROOT}/src/wrapped/generated/wrapper.c"
 )
 
 set(WRAPPEDS
@@ -313,14 +395,19 @@ set(WRAPPEDS
     "${BOX64_ROOT}/src/wrapped/wrappedatkbridge.c"
     "${BOX64_ROOT}/src/wrapped/wrappedatomic.c"
     "${BOX64_ROOT}/src/wrapped/wrappedatspi.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedayatanaappindicator3.c"
     "${BOX64_ROOT}/src/wrapped/wrappedbz2.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedcap.c"
     "${BOX64_ROOT}/src/wrapped/wrappedcairo.c"
     "${BOX64_ROOT}/src/wrapped/wrappedcairogobject.c"
     "${BOX64_ROOT}/src/wrapped/wrappedcrashhandler.c"
     "${BOX64_ROOT}/src/wrapped/wrappedcrypto.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedcrypto3.c"
     "${BOX64_ROOT}/src/wrapped/wrappedcurl.c"
     "${BOX64_ROOT}/src/wrapped/wrappeddbus.c"
     "${BOX64_ROOT}/src/wrapped/wrappeddbusglib1.c"
+    "${BOX64_ROOT}/src/wrapped/wrappeddbusmenuglib.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedevent21.c"
     "${BOX64_ROOT}/src/wrapped/wrappedexpat.c"
     "${BOX64_ROOT}/src/wrapped/wrappedfaudio.c"
     "${BOX64_ROOT}/src/wrapped/wrappedflac.c"
@@ -339,22 +426,36 @@ set(WRAPPEDS
     "${BOX64_ROOT}/src/wrapped/wrappedgmp.c"
     "${BOX64_ROOT}/src/wrapped/wrappedgnutls.c"
     "${BOX64_ROOT}/src/wrapped/wrappedgobject2.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedgomp.c"
     "${BOX64_ROOT}/src/wrapped/wrappedgssapi.c"
     "${BOX64_ROOT}/src/wrapped/wrappedgssapikrb5.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedgstallocators.c"
     "${BOX64_ROOT}/src/wrapped/wrappedgstapp.c"
     "${BOX64_ROOT}/src/wrapped/wrappedgstaudio.c"
     "${BOX64_ROOT}/src/wrapped/wrappedgstbase.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedgstcheck.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedgstcontroller.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedgstfft.c"
     "${BOX64_ROOT}/src/wrapped/wrappedgstgl.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedgstnet.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedgstpbutils.c"
     "${BOX64_ROOT}/src/wrapped/wrappedgstreamer.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedgstriff.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedgstrtp.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedgstrtsp.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedgstsdp.c"
     "${BOX64_ROOT}/src/wrapped/wrappedgsttag.c"
     "${BOX64_ROOT}/src/wrapped/wrappedgstvideo.c"
     "${BOX64_ROOT}/src/wrapped/wrappedgthread2.c"
     "${BOX64_ROOT}/src/wrapped/wrappedgtk3.c"
     "${BOX64_ROOT}/src/wrapped/wrappedgtkx112.c"
     "${BOX64_ROOT}/src/wrapped/wrappedkrb5.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedlcms2.c"
     "${BOX64_ROOT}/src/wrapped/wrappedldlinux.c"
     "${BOX64_ROOT}/src/wrapped/wrappedlibasound.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedlibbsd.c"
     "${BOX64_ROOT}/src/wrapped/wrappedlibc.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedlibcmusl.c"
     "${BOX64_ROOT}/src/wrapped/wrappedlibcrypt.c"
     "${BOX64_ROOT}/src/wrapped/wrappedlibcups.c"
     "${BOX64_ROOT}/src/wrapped/wrappedlibdl.c"
@@ -362,10 +463,12 @@ set(WRAPPEDS
     "${BOX64_ROOT}/src/wrapped/wrappedlibegl.c"
     "${BOX64_ROOT}/src/wrapped/wrappedlibform.c"
     "${BOX64_ROOT}/src/wrapped/wrappedlibformw.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedlibformw6.c"
     "${BOX64_ROOT}/src/wrapped/wrappedlibfuse.c"
     "${BOX64_ROOT}/src/wrapped/wrappedlibgl.c"
     "${BOX64_ROOT}/src/wrapped/wrappedlibglu.c"
     "${BOX64_ROOT}/src/wrapped/wrappedlibglx.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedlibharfbuzz.c"
     "${BOX64_ROOT}/src/wrapped/wrappedlibibus.c"
     "${BOX64_ROOT}/src/wrapped/wrappedlibice.c"
     "${BOX64_ROOT}/src/wrapped/wrappedlibm.c"
@@ -373,6 +476,7 @@ set(WRAPPEDS
     "${BOX64_ROOT}/src/wrapped/wrappedlibncurses6.c"
     "${BOX64_ROOT}/src/wrapped/wrappedlibncursesw.c"
     "${BOX64_ROOT}/src/wrapped/wrappedlibncursesw6.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedlibnuma.c"
     "${BOX64_ROOT}/src/wrapped/wrappedlibogg.c"
     "${BOX64_ROOT}/src/wrapped/wrappedlibpanel.c"
     "${BOX64_ROOT}/src/wrapped/wrappedlibpci.c"
@@ -383,6 +487,7 @@ set(WRAPPEDS
     "${BOX64_ROOT}/src/wrapped/wrappedlibsm.c"
     "${BOX64_ROOT}/src/wrapped/wrappedlibsndfile.c"
     "${BOX64_ROOT}/src/wrapped/wrappedlibssl.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedlibssl3.c"
     "${BOX64_ROOT}/src/wrapped/wrappedlibtinfo.c"
     "${BOX64_ROOT}/src/wrapped/wrappedlibtinfo6.c"
     "${BOX64_ROOT}/src/wrapped/wrappedlibusb1.c"
@@ -441,6 +546,7 @@ set(WRAPPEDS
     "${BOX64_ROOT}/src/wrapped/wrappednss3.c"
     "${BOX64_ROOT}/src/wrapped/wrappednssutil3.c"
     "${BOX64_ROOT}/src/wrapped/wrappedopenal.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedopencl.c"
     "${BOX64_ROOT}/src/wrapped/wrappedpango.c"
     "${BOX64_ROOT}/src/wrapped/wrappedpangocairo.c"
     "${BOX64_ROOT}/src/wrapped/wrappedpangoft2.c"
@@ -467,6 +573,7 @@ set(WRAPPEDS
     "${BOX64_ROOT}/src/wrapped/wrappedsmime3.c"
     "${BOX64_ROOT}/src/wrapped/wrappedsmpeg2.c"
     "${BOX64_ROOT}/src/wrapped/wrappedssl3.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedtbbbind.c"
     "${BOX64_ROOT}/src/wrapped/wrappedtbbmalloc.c"
     "${BOX64_ROOT}/src/wrapped/wrappedtbbmallocproxy.c"
     "${BOX64_ROOT}/src/wrapped/wrappedtcmallocminimal.c"
@@ -488,7 +595,25 @@ set(WRAPPEDS
     "${BOX64_ROOT}/src/wrapped/wrappedvulkan.c"
     "${BOX64_ROOT}/src/wrapped/wrappedxshmfence.c"
     "${BOX64_ROOT}/src/wrapped/wrappedd3dadapter9.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedicuuc66.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedicui18n66.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedicuuc67.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedicui18n67.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedicuuc72.c"
+    "${BOX64_ROOT}/src/wrapped/wrappedicui18n72.c"
 )
+if(ANDROID)
+    list(APPEND WRAPPEDS
+        "${BOX64_ROOT}/src/wrapped/wrappedandroidshmem.c"
+    )
+endif()
+if(TERMUX)
+    list(APPEND WRAPPEDS
+        "${BOX64_ROOT}/src/wrapped/wrappediconv.c"
+        "${BOX64_ROOT}/src/wrapped/wrappedtermuxexec.c"
+        "${BOX64_ROOT}/src/wrapped/wrappedandroidsupport.c"
+    )
+endif()
 
 # If BOX64_ROOT contains a ".c", the build breaks...
 string(REPLACE ".c" "_private.h" MODROOT ${BOX64_ROOT})
@@ -503,16 +628,18 @@ endforeach()
 
 set(WRAPPER "${BOX64_ROOT}/src/wrapped/generated/wrapper.c" "${BOX64_ROOT}/src/wrapped/generated/wrapper.h")
 
-add_custom_command(
-    OUTPUT "${BOX64_ROOT}/src/wrapped/generated/functions_list.txt"
-    COMMAND "${PYTHON_EXECUTABLE}" "${BOX64_ROOT}/rebuild_wrappers.py"
-    "${BOX64_ROOT}"
-    "PANDORA" "HAVE_LD80BITS" "NOALIGN" "HAVE_TRACE" "--"
-    ${WRAPPEDS_HEAD}
-    MAIN_DEPENDENCY "${BOX64_ROOT}/rebuild_wrappers.py"
-    DEPENDS ${WRAPPEDS} ${WRAPPEDS_HEAD}
-    BYPRODUCTS ${WRAPPER}
-)
+if(NOT CI)
+    add_custom_command(
+        OUTPUT "${BOX64_ROOT}/src/wrapped/generated/functions_list.txt"
+        COMMAND "${PYTHON_EXECUTABLE}" "${BOX64_ROOT}/rebuild_wrappers.py"
+        "${BOX64_ROOT}"
+        "PANDORA" "HAVE_LD80BITS" "NOALIGN" "HAVE_TRACE" "ANDROID" "TERMUX" "--"
+        ${WRAPPEDS_HEAD}
+        MAIN_DEPENDENCY "${BOX64_ROOT}/rebuild_wrappers.py"
+        DEPENDS ${WRAPPEDS} ${WRAPPEDS_HEAD}
+        BYPRODUCTS ${WRAPPER}
+    )
+endif ()
 
 #add_custom_command(
 #    OUTPUT "${BOX64_ROOT}/src/dynarec/last_run.txt"
@@ -529,6 +656,8 @@ if(DYNAREC)
     set(DYNAREC_SRC
         "${BOX64_ROOT}/src/dynarec/dynablock.c"
         "${BOX64_ROOT}/src/dynarec/dynarec_native.c"
+        "${BOX64_ROOT}/src/dynarec/dynarec_native_functions.c"
+        "${BOX64_ROOT}/src/emu/x64test.c"
     )
 endif()
 
@@ -558,9 +687,11 @@ if(ARM_DYNAREC)
     #"${BOX64_ROOT}/src/dynarec/arm64/dynarec_arm64_65.c"
     "${BOX64_ROOT}/src/dynarec/arm64/dynarec_arm64_66.c"
     "${BOX64_ROOT}/src/dynarec/arm64/dynarec_arm64_67.c"
+    "${BOX64_ROOT}/src/dynarec/arm64/dynarec_arm64_67_32.c"
+    "${BOX64_ROOT}/src/dynarec/arm64/dynarec_arm64_6764_32.c"
     "${BOX64_ROOT}/src/dynarec/arm64/dynarec_arm64_d8.c"
     "${BOX64_ROOT}/src/dynarec/arm64/dynarec_arm64_d9.c"
-    #"${BOX64_ROOT}/src/dynarec/arm64/dynarec_arm64_da.c"
+    "${BOX64_ROOT}/src/dynarec/arm64/dynarec_arm64_da.c"
     "${BOX64_ROOT}/src/dynarec/arm64/dynarec_arm64_db.c"
     "${BOX64_ROOT}/src/dynarec/arm64/dynarec_arm64_dc.c"
     "${BOX64_ROOT}/src/dynarec/arm64/dynarec_arm64_dd.c"
@@ -568,6 +699,8 @@ if(ARM_DYNAREC)
     "${BOX64_ROOT}/src/dynarec/arm64/dynarec_arm64_df.c"
     "${BOX64_ROOT}/src/dynarec/arm64/dynarec_arm64_f0.c"
     "${BOX64_ROOT}/src/dynarec/arm64/dynarec_arm64_660f.c"
+    "${BOX64_ROOT}/src/dynarec/arm64/dynarec_arm64_66f20f.c"
+    "${BOX64_ROOT}/src/dynarec/arm64/dynarec_arm64_66f30f.c"
     "${BOX64_ROOT}/src/dynarec/arm64/dynarec_arm64_6664.c"
     "${BOX64_ROOT}/src/dynarec/arm64/dynarec_arm64_66f0.c"
     "${BOX64_ROOT}/src/dynarec/arm64/dynarec_arm64_f20f.c"
@@ -575,9 +708,60 @@ if(ARM_DYNAREC)
     )
 endif()
 
+if(RV64_DYNAREC)
+    set(DYNAREC_SRC
+        ${DYNAREC_SRC}
+
+        "${BOX64_ROOT}/src/dynarec/rv64/dynarec_rv64_functions.c"
+        "${BOX64_ROOT}/src/dynarec/rv64/rv64_printer.c"
+        "${BOX64_ROOT}/src/dynarec/rv64/dynarec_rv64_jmpnext.c"
+        "${BOX64_ROOT}/src/rv64detect.c"
+
+        "${BOX64_ROOT}/src/dynarec/rv64/rv64_prolog.S"
+        "${BOX64_ROOT}/src/dynarec/rv64/rv64_epilog.S"
+        "${BOX64_ROOT}/src/dynarec/rv64/rv64_next.S"
+        "${BOX64_ROOT}/src/dynarec/rv64/rv64_lock.S"
+    )
+
+    set(DYNAREC_PASS
+    "${BOX64_ROOT}/src/dynarec/rv64/dynarec_rv64_helper.c"
+    "${BOX64_ROOT}/src/dynarec/rv64/dynarec_rv64_emit_tests.c"
+    "${BOX64_ROOT}/src/dynarec/rv64/dynarec_rv64_emit_math.c"
+    "${BOX64_ROOT}/src/dynarec/rv64/dynarec_rv64_emit_logic.c"
+    "${BOX64_ROOT}/src/dynarec/rv64/dynarec_rv64_emit_shift.c"
+    "${BOX64_ROOT}/src/dynarec/rv64/dynarec_rv64_00.c"
+    "${BOX64_ROOT}/src/dynarec/rv64/dynarec_rv64_00_0.c"
+    "${BOX64_ROOT}/src/dynarec/rv64/dynarec_rv64_00_1.c"
+    "${BOX64_ROOT}/src/dynarec/rv64/dynarec_rv64_00_2.c"
+    "${BOX64_ROOT}/src/dynarec/rv64/dynarec_rv64_00_3.c"
+    "${BOX64_ROOT}/src/dynarec/rv64/dynarec_rv64_0f.c"
+    "${BOX64_ROOT}/src/dynarec/rv64/dynarec_rv64_64.c"
+    #"${BOX64_ROOT}/src/dynarec/rv64/dynarec_rv64_65.c"
+    "${BOX64_ROOT}/src/dynarec/rv64/dynarec_rv64_66.c"
+    "${BOX64_ROOT}/src/dynarec/rv64/dynarec_rv64_67.c"
+    "${BOX64_ROOT}/src/dynarec/rv64/dynarec_rv64_67_32.c"
+    "${BOX64_ROOT}/src/dynarec/rv64/dynarec_rv64_d8.c"
+    "${BOX64_ROOT}/src/dynarec/rv64/dynarec_rv64_d9.c"
+    "${BOX64_ROOT}/src/dynarec/rv64/dynarec_rv64_da.c"
+    "${BOX64_ROOT}/src/dynarec/rv64/dynarec_rv64_db.c"
+    "${BOX64_ROOT}/src/dynarec/rv64/dynarec_rv64_dc.c"
+    "${BOX64_ROOT}/src/dynarec/rv64/dynarec_rv64_dd.c"
+    "${BOX64_ROOT}/src/dynarec/rv64/dynarec_rv64_de.c"
+    "${BOX64_ROOT}/src/dynarec/rv64/dynarec_rv64_df.c"
+    "${BOX64_ROOT}/src/dynarec/rv64/dynarec_rv64_f0.c"
+    "${BOX64_ROOT}/src/dynarec/rv64/dynarec_rv64_660f.c"
+    "${BOX64_ROOT}/src/dynarec/rv64/dynarec_rv64_66f20f.c"
+    "${BOX64_ROOT}/src/dynarec/rv64/dynarec_rv64_66f30f.c"
+    "${BOX64_ROOT}/src/dynarec/rv64/dynarec_rv64_6664.c"
+    "${BOX64_ROOT}/src/dynarec/rv64/dynarec_rv64_66f0.c"
+    "${BOX64_ROOT}/src/dynarec/rv64/dynarec_rv64_f20f.c"
+    "${BOX64_ROOT}/src/dynarec/rv64/dynarec_rv64_f30f.c"
+    )
+endif()
+
 if(DYNAREC)
-    set(DYNAREC_PASS 
-        "${BOX64_ROOT}/src/wrapped/generated/wrapper.h" 
+    set(DYNAREC_PASS
+        "${BOX64_ROOT}/src/wrapped/generated/wrapper.h"
         ${DYNAREC_PASS}
         "${BOX64_ROOT}/src/dynarec/dynarec_native_pass.c"
     )
@@ -592,6 +776,8 @@ if(DYNAREC)
     set_target_properties(native_pass2 PROPERTIES COMPILE_FLAGS "-DSTEP=2")
     add_library(native_pass3 OBJECT ${DYNAREC_PASS})
     set_target_properties(native_pass3 PROPERTIES COMPILE_FLAGS "-DSTEP=3")
+    add_library(test_interpreter OBJECT ${INTERPRETER})
+    set_target_properties(test_interpreter PROPERTIES COMPILE_FLAGS "-DTEST_INTERPRETER")
     add_dependencies(native_pass0 WRAPPERS)
     add_dependencies(native_pass1 WRAPPERS)
     add_dependencies(native_pass2 WRAPPERS)
@@ -603,6 +789,7 @@ if(DYNAREC)
         $<TARGET_OBJECTS:native_pass1>
         $<TARGET_OBJECTS:native_pass2>
         $<TARGET_OBJECTS:native_pass3>
+        $<TARGET_OBJECTS:test_interpreter>
     )
 endif()
 
@@ -611,16 +798,18 @@ if(DYNAREC)
     add_custom_command(
         OUTPUT "${BOX64_ROOT}/src/git_head.h"
         COMMAND sh -c "echo \\\#define GITREV \\\"$(git rev-parse --short HEAD)\\\">\"${BOX64_ROOT}/src/git_head.h\""
-        DEPENDS dynarec ${ELFLOADER_SRC} ${WRAPPEDS}
+        DEPENDS dynarec ${ELFLOADER_SRC} ${INTERPRETER} ${WRAPPEDS}
         VERBATIM)
 else()
     add_custom_command(
         OUTPUT "${BOX64_ROOT}/src/git_head.h"
         COMMAND sh -c "echo \\\#define GITREV \\\"$(git rev-parse --short HEAD)\\\">\"${BOX64_ROOT}/src/git_head.h\""
-        DEPENDS ${ELFLOADER_SRC} ${WRAPPEDS}
+        DEPENDS ${ELFLOADER_SRC} ${INTERPRETER} ${WRAPPEDS}
         VERBATIM)
 endif()
 
+add_library(interpreter OBJECT ${INTERPRETER})
+
 add_executable(${BOX64} ${ELFLOADER_SRC} ${WRAPPEDS} "${BOX64_ROOT}/src/git_head.h")
 set_target_properties(${BOX64} PROPERTIES ENABLE_EXPORTS ON)
 add_dependencies(${BOX64} WRAPPERS)
@@ -629,15 +818,24 @@ add_dependencies(${BOX64} WRAPPERS)
 if(STATICBUILD)
     set_target_properties(${BOX64} PROPERTIES LINK_FLAGS "-static -Wl,--no-as-needed -Wl,--whole-archive -Wl,--allow-multiple-definition -lm -ldl -lrt -lpthread -lresolv -lc -Wl,-defsym,_DYNAMIC=0 -pthread")
 else()
-    set_target_properties(${BOX64} PROPERTIES LINK_FLAGS "-Wl,--no-as-needed -lc -lm -ldl -lrt -lpthread -lresolv -Wl,--as-needed -pthread")
+    if(ANDROID)
+        if(TERMUX)
+        target_link_libraries(${BOX64} c m dl android-sysv-semaphore)
+        else()
+        target_link_libraries(${BOX64} c m dl)
+        endif()
+    else()
+	    set_target_properties(${BOX64} PROPERTIES LINK_FLAGS "-Wl,--no-as-needed -lc -lm -ldl -lrt -lpthread -lresolv -Wl,--as-needed -pthread")
+    endif()
 endif()
 if(DYNAREC)
     target_link_libraries(${BOX64} dynarec)
 endif()
+target_link_libraries(${BOX64} interpreter)
 
 if(${CMAKE_VERSION} VERSION_LESS "3.13")
     if(NOT NOLOADADDR)
-        if(CMAKE_C_COMPILER_ID STREQUAL "Clang")
+        if(CMAKE_C_COMPILER_ID STREQUAL "Clang" OR WITH_MOLD)
             set_target_properties(${BOX64} PROPERTIES LINK_FLAGS "-Wl,--image-base=${BOX64_ELF_ADDRESS}")
         else()
             set_target_properties(${BOX64} PROPERTIES LINK_FLAGS "-Wl,-Ttext-segment,${BOX64_ELF_ADDRESS}")
@@ -646,7 +844,7 @@ if(${CMAKE_VERSION} VERSION_LESS "3.13")
 else()
     # If symbols are missing, try this: target_link_options(${BOX64} PUBLIC -rdynamic)
     if(NOT NOLOADADDR)
-        if(CMAKE_C_COMPILER_ID STREQUAL "Clang")
+        if(CMAKE_C_COMPILER_ID STREQUAL "Clang" OR WITH_MOLD)
             target_link_options(${BOX64} PUBLIC LINKER:--image-base=${BOX64_ELF_ADDRESS})
         else()
             target_link_options(${BOX64} PUBLIC LINKER:-Ttext-segment,${BOX64_ELF_ADDRESS})
@@ -654,24 +852,53 @@ else()
     endif()
 endif()
 
-string(COMPARE EQUAL "${CMAKE_HOST_SYSTEM_PROCESSOR}" "i686"  _x86)
-string(COMPARE EQUAL "${CMAKE_HOST_SYSTEM_PROCESSOR}" "x86_64"  _x86_64)
-string(COMPARE EQUAL "${CMAKE_HOST_SYSTEM_PROCESSOR}" "aarch64"  _aarch64)
+string(COMPARE EQUAL "${CMAKE_SYSTEM_PROCESSOR}" "i686"  _x86)
+string(COMPARE EQUAL "${CMAKE_SYSTEM_PROCESSOR}" "x86_64"  _x86_64)
+string(COMPARE EQUAL "${CMAKE_SYSTEM_PROCESSOR}" "aarch64"  _aarch64)
+string(COMPARE EQUAL "${CMAKE_SYSTEM_PROCESSOR}" "riscv64"  _riscv64)
 
 if(_x86_64 OR _aarch64)
   add_definitions(-DCONFIG_64BIT)
 endif()
 
 if(NOT _x86 AND NOT _x86_64)
-  install(TARGETS ${BOX64}
+  if(NOT TERMUX)
+   install(TARGETS ${BOX64}
     RUNTIME DESTINATION bin)
-  configure_file(system/box64.conf.cmake system/box64.conf)
-  install(FILES ${CMAKE_BINARY_DIR}/system/box64.conf DESTINATION /etc/binfmt.d/)
-  install(FILES ${CMAKE_SOURCE_DIR}/x64lib/libstdc++.so.5 DESTINATION /usr/lib/x86_64-linux-gnu/)
-  install(FILES ${CMAKE_SOURCE_DIR}/x64lib/libstdc++.so.6 DESTINATION /usr/lib/x86_64-linux-gnu/)
-  install(FILES ${CMAKE_SOURCE_DIR}/x64lib/libgcc_s.so.1 DESTINATION /usr/lib/x86_64-linux-gnu/)
-  install(FILES ${CMAKE_SOURCE_DIR}/x64lib/libpng12.so.0 DESTINATION /usr/lib/x86_64-linux-gnu/)
-  install(FILES ${CMAKE_SOURCE_DIR}/system/box64.box64rc DESTINATION /etc/)
+  else()
+   install(TARGETS ${BOX64}
+    RUNTIME DESTINATION ${TERMUX_PATH}/usr/bin)
+  endif()
+  if(NOT NO_CONF_INSTALL)
+    configure_file(system/box64.conf.cmake system/box64.conf)
+	  if(NOT TERMUX)
+    		install(FILES ${CMAKE_BINARY_DIR}/system/box64.conf DESTINATION /etc/binfmt.d/)
+    		install(FILES ${CMAKE_SOURCE_DIR}/system/box64.box64rc DESTINATION /etc/)
+	  else()
+		#install(FILES ${CMAKE_BINARY_DIR}/system/box64.conf DESTINATION ${TERMUX_PATH}/usr/etc/binfmt.d/)
+		install(FILES ${CMAKE_SOURCE_DIR}/system/box64.box64rc DESTINATION ${TERMUX_PATH}/usr/etc/)
+	  endif()
+
+  endif()
+  if(NOT NO_LIB_INSTALL)
+	if(NOT TERMUX)
+    		install(FILES ${CMAKE_SOURCE_DIR}/x64lib/libstdc++.so.5 DESTINATION /usr/lib/x86_64-linux-gnu/)
+    		install(FILES ${CMAKE_SOURCE_DIR}/x64lib/libstdc++.so.6 DESTINATION /usr/lib/x86_64-linux-gnu/)
+    		install(FILES ${CMAKE_SOURCE_DIR}/x64lib/libgcc_s.so.1 DESTINATION /usr/lib/x86_64-linux-gnu/)
+    		install(FILES ${CMAKE_SOURCE_DIR}/x64lib/libpng12.so.0 DESTINATION /usr/lib/x86_64-linux-gnu/)
+    		install(FILES ${CMAKE_SOURCE_DIR}/x64lib/libcrypto.so.1.1 DESTINATION /usr/lib/x86_64-linux-gnu/)
+    		install(FILES ${CMAKE_SOURCE_DIR}/x64lib/libssl.so.1.1 DESTINATION /usr/lib/x86_64-linux-gnu/)
+    		install(FILES ${CMAKE_SOURCE_DIR}/x64lib/libunwind.so.8 DESTINATION /usr/lib/x86_64-linux-gnu/)
+	else()
+		install(FILES ${CMAKE_SOURCE_DIR}/x64lib/libstdc++.so.5 DESTINATION ${TERMUX_PATH}/usr/lib/x86_64-linux-gnu/)
+		install(FILES ${CMAKE_SOURCE_DIR}/x64lib/libstdc++.so.6 DESTINATION ${TERMUX_PATH}/usr/lib/x86_64-linux-gnu/)
+		install(FILES ${CMAKE_SOURCE_DIR}/x64lib/libgcc_s.so.1 DESTINATION ${TERMUX_PATH}/usr/lib/x86_64-linux-gnu/)
+		install(FILES ${CMAKE_SOURCE_DIR}/x64lib/libpng12.so.0 DESTINATION ${TERMUX_PATH}/usr/lib/x86_64-linux-gnu/)
+		install(FILES ${CMAKE_SOURCE_DIR}/x64lib/libcrypto.so.1.1 DESTINATION ${TERMUX_PATH}/usr/lib/x86_64-linux-gnu/)
+		install(FILES ${CMAKE_SOURCE_DIR}/x64lib/libssl.so.1.1 DESTINATION ${TERMUX_PATH}/usr/lib/x86_64-linux-gnu/)
+		install(FILES ${CMAKE_SOURCE_DIR}/x64lib/libunwind.so.8 DESTINATION ${TERMUX_PATH}/usr/lib/x86_64-linux-gnu/)
+	endif()
+   endif()
 endif()
 
 if(NOT TARGET uninstall)
@@ -688,7 +915,11 @@ set(CPACK_GENERATOR "DEB")
 set(CPACK_DEBIAN_PACKAGE_MAINTAINER "ptitSeb")
 set(CPACK_PACKAGE_CONTACT "[email protected]")
 set(CPACK_PACKAGE_DESCRIPTION "Box64 - Linux Userspace x86_64 Emulator with a twist")
-set(CPACK_DEBIAN_PACKAGE_DEPENDS "libc6")
+if(NOT TERMUX)
+	set(CPACK_DEBIAN_PACKAGE_DEPENDS "libc6")
+else()
+	set(CPACK_DEBIAN_PACKAGE_DEPENDS "libandroid-sysv-semaphore")
+endif()
 set(CPACK_PACKAGE_HOMEPAGE_URL, "https://box86.org")
 file(STRINGS "${BOX64_ROOT}/src/box64version.h" TEMP_STRING REGEX "BOX64_MAJOR\\s*")
 string(REGEX REPLACE "BOX64_MAJOR" "" TEMP_STRING ${TEMP_STRING})
@@ -702,16 +933,31 @@ string(REGEX MATCH "[0-9]" BOX64_REVISION ${TEMP_STRING})
 set(CPACK_PACKAGE_VERSION_MAJOR ${BOX64_MAJOR})
 set(CPACK_PACKAGE_VERSION_MINOR ${BOX64_MINOR})
 set(CPACK_PACKAGE_VERSION_PATCH ${BOX64_REVISION})
+if(NOT TERMUX)
 set(CPACK_DEBIAN_PACKAGE_CONTROL_EXTRA "${CMAKE_CURRENT_SOURCE_DIR}/postinst")
+endif()
 if(_aarch64)
-    set(CPACK_DEBIAN_PACKAGE_ARCHITECTURE "arm64")
+	if(TERMUX)
+		set(CPACK_DEBIAN_PACKAGE_ARCHITECTURE "aarch64")
+	else()
+    		set(CPACK_DEBIAN_PACKAGE_ARCHITECTURE "arm64")
+	endif()
+elseif(__riscv64)
+    set(CPACK_DEBIAN_PACKAGE_ARCHITECTURE "riscv64")
 elseif(_x86_64)
     set(CPACK_DEBIAN_PACKAGE_ARCHITECTURE "x86_64")
 else()
     #probably wrong...
     execute_process(COMMAND "dpkg --print-architecture" OUTPUT_VARIABLE CPACK_DEBIAN_PACKAGE_ARCHITECTURE)
 endif()
-set(CPACK_DEBIAN_FILE_NAME "${BOX64}-${BOX64_MAJOR}.${BOX64_MINOR}.${BOX64_REVISION}_Linux-${CPACK_DEBIAN_PACKAGE_ARCHITECTURE}.deb")
+if(TERMUX)
+set(CPACK_PACKAGING_INSTALL_PREFIX "${TERMUX_PATH}/usr")
+endif()
+if(NOT TERMUX)
+set(CPACK_DEBIAN_FILE_NAME "${BOX64}-${BOX64_MAJOR}.${BOX64_MINOR}.${BOX64_REVISION}_${CMAKE_SYSTEM_NAME}-${CPACK_DEBIAN_PACKAGE_ARCHITECTURE}.deb")
+else()
+set(CPACK_DEBIAN_FILE_NAME "${BOX64}-${BOX64_MAJOR}.${BOX64_MINOR}.${BOX64_REVISION}_Termux-${CPACK_DEBIAN_PACKAGE_ARCHITECTURE}.deb")
+endif()
 INCLUDE(CPack)
 
 add_test(bootSyscall ${CMAKE_COMMAND} -D TEST_PROGRAM=${CMAKE_BINARY_DIR}/${BOX64}
@@ -795,14 +1041,14 @@ add_test(sse_asm ${CMAKE_COMMAND} -D TEST_PROGRAM=${CMAKE_BINARY_DIR}/${BOX64}
     -P ${CMAKE_SOURCE_DIR}/runTest.cmake )
 
 set_tests_properties(sse_asm PROPERTIES ENVIRONMENT "BOX64_DYNAREC_FASTROUND=0")
-    
+
 add_test(sse_intrinsics ${CMAKE_COMMAND} -D TEST_PROGRAM=${CMAKE_BINARY_DIR}/${BOX64}
     -D TEST_ARGS=${CMAKE_SOURCE_DIR}/tests/test17 -D TEST_OUTPUT=tmpfile17.txt
     -D TEST_REFERENCE=${CMAKE_SOURCE_DIR}/tests/ref17.txt
     -P ${CMAKE_SOURCE_DIR}/runTest.cmake )
 
 set_tests_properties(sse_intrinsics PROPERTIES ENVIRONMENT "BOX64_DYNAREC_FASTNAN=0;BOX64_DYNAREC_FASTROUND=0")
-    
+
 add_test(aes ${CMAKE_COMMAND} -D TEST_PROGRAM=${CMAKE_BINARY_DIR}/${BOX64}
     -D TEST_ARGS=${CMAKE_SOURCE_DIR}/tests/test18 -D TEST_OUTPUT=tmpfile18.txt
     -D TEST_REFERENCE=${CMAKE_SOURCE_DIR}/tests/ref18.txt
@@ -818,17 +1064,56 @@ add_test(irelative_reloc ${CMAKE_COMMAND} -D TEST_PROGRAM=${CMAKE_BINARY_DIR}/${
     -D TEST_REFERENCE=${CMAKE_SOURCE_DIR}/tests/ref20.txt
     -P ${CMAKE_SOURCE_DIR}/runTest.cmake )
 
-    add_test(longjumpInSignals ${CMAKE_COMMAND} -D TEST_PROGRAM=${CMAKE_BINARY_DIR}/${BOX64}
+add_test(longjumpInSignals ${CMAKE_COMMAND} -D TEST_PROGRAM=${CMAKE_BINARY_DIR}/${BOX64}
     -D TEST_ARGS=${CMAKE_SOURCE_DIR}/tests/test21 -D TEST_OUTPUT=tmpfile21.txt
     -D TEST_REFERENCE=${CMAKE_SOURCE_DIR}/tests/ref21.txt
     -P ${CMAKE_SOURCE_DIR}/runTest.cmake )
 
-    add_test(x87 ${CMAKE_COMMAND} -D TEST_PROGRAM=${CMAKE_BINARY_DIR}/${BOX64}
+add_test(x87 ${CMAKE_COMMAND} -D TEST_PROGRAM=${CMAKE_BINARY_DIR}/${BOX64}
     -D TEST_ARGS=${CMAKE_SOURCE_DIR}/tests/test22 -D TEST_OUTPUT=tmpfile22.txt
     -D TEST_REFERENCE=${CMAKE_SOURCE_DIR}/tests/ref22.txt
     -P ${CMAKE_SOURCE_DIR}/runTest.cmake )
 
-    file(GLOB extension_tests "${CMAKE_SOURCE_DIR}/tests/extensions/*.c")
+set_tests_properties(x87 PROPERTIES ENVIRONMENT "BOX64_DYNAREC_FASTROUND=0")
+
+add_test(pshufb ${CMAKE_COMMAND} -D TEST_PROGRAM=${CMAKE_BINARY_DIR}/${BOX64}
+    -D TEST_ARGS=${CMAKE_SOURCE_DIR}/tests/test23 -D TEST_OUTPUT=tmpfile23.txt
+    -D TEST_REFERENCE=${CMAKE_SOURCE_DIR}/tests/ref23.txt
+    -P ${CMAKE_SOURCE_DIR}/runTest.cmake )
+
+add_test(bswap ${CMAKE_COMMAND} -D TEST_PROGRAM=${CMAKE_BINARY_DIR}/${BOX64}
+    -D TEST_ARGS=${CMAKE_SOURCE_DIR}/tests/test24 -D TEST_OUTPUT=tmpfile24.txt
+    -D TEST_REFERENCE=${CMAKE_SOURCE_DIR}/tests/ref24.txt
+    -P ${CMAKE_SOURCE_DIR}/runTest.cmake )
+
+add_test(x87cache ${CMAKE_COMMAND} -D TEST_PROGRAM=${CMAKE_BINARY_DIR}/${BOX64}
+    -D TEST_ARGS=${CMAKE_SOURCE_DIR}/tests/test25 -D TEST_OUTPUT=tmpfile25.txt
+    -D TEST_REFERENCE=${CMAKE_SOURCE_DIR}/tests/ref25.txt
+    -P ${CMAKE_SOURCE_DIR}/runTest.cmake )
+
+add_test(feround ${CMAKE_COMMAND} -D TEST_PROGRAM=${CMAKE_BINARY_DIR}/${BOX64}
+    -D TEST_ARGS=${CMAKE_SOURCE_DIR}/tests/test26 -D TEST_OUTPUT=tmpfile26.txt
+    -D TEST_REFERENCE=${CMAKE_SOURCE_DIR}/tests/ref26.txt
+    -P ${CMAKE_SOURCE_DIR}/runTest.cmake )
+set_tests_properties(feround PROPERTIES ENVIRONMENT "BOX64_SYNC_ROUNDING=1")
+
+add_test(sse4_2 ${CMAKE_COMMAND} -D TEST_PROGRAM=${CMAKE_BINARY_DIR}/${BOX64}
+    -D TEST_ARGS=${CMAKE_SOURCE_DIR}/tests/test27 -D TEST_OUTPUT=tmpfile27.txt
+    -D TEST_REFERENCE=${CMAKE_SOURCE_DIR}/tests/ref27.txt
+    -P ${CMAKE_SOURCE_DIR}/runTest.cmake )
+
+add_test(shaext ${CMAKE_COMMAND} -D TEST_PROGRAM=${CMAKE_BINARY_DIR}/${BOX64}
+    -D TEST_ARGS=${CMAKE_SOURCE_DIR}/tests/test28 -D TEST_OUTPUT=tmpfile28.txt
+    -D TEST_REFERENCE=${CMAKE_SOURCE_DIR}/tests/ref28.txt
+    -P ${CMAKE_SOURCE_DIR}/runTest.cmake )
+
+add_test(lock ${CMAKE_COMMAND} -D TEST_PROGRAM=${CMAKE_BINARY_DIR}/${BOX64}
+    -D TEST_ARGS=${CMAKE_SOURCE_DIR}/tests/test29 -D TEST_OUTPUT=tmpfile29.txt
+    -D TEST_REFERENCE=${CMAKE_SOURCE_DIR}/tests/ref29.txt
+    -P ${CMAKE_SOURCE_DIR}/runTest.cmake )
+
+
+file(GLOB extension_tests "${CMAKE_SOURCE_DIR}/tests/extensions/*.c")
 foreach(file ${extension_tests})
     get_filename_component(testname "${file}" NAME_WE)
     add_test(NAME "${testname}" COMMAND ${CMAKE_COMMAND} -D TEST_PROGRAM=${CMAKE_BINARY_DIR}/${BOX64}

README.md

@@ -1,8 +1,8 @@
-![Official logo](img/Box64Logo.png "Official Logo")
+![Official logo](docs/img/Box64Logo.png "Official Logo")
 
 Linux Userspace x86_64 Emulator with a twist
 
-[View changelog](https://github.com/ptitSeb/box64/blob/main/docs/CHANGELOG.md) | [中文](https://github.com/ptitSeb/box64/blob/main/docs/README_CN.md) | [Report an error](https://github.com/ptitSeb/box64/issues/new)
+[View changelog](https://github.com/ptitSeb/box64/blob/main/docs/CHANGELOG.md) | [中文](https://github.com/ptitSeb/box64/blob/main/README_CN.md) | [Українська](https://github.com/ptitSeb/box64/blob/main/README_UK.md) | [Report an error](https://github.com/ptitSeb/box64/issues/new)
 
 ![build](https://app.travis-ci.com/ptitSeb/box64.svg?branch=main) ![stars](https://img.shields.io/github/stars/ptitSeb/box64) ![forks](https://img.shields.io/github/forks/ptitSeb/box64) ![contributors](https://img.shields.io/github/contributors/ptitSeb/box64) ![prs](https://img.shields.io/github/issues-pr/ptitSeb/box64) ![issues](https://img.shields.io/github/issues/ptitSeb/box64)
 
@@ -14,11 +14,11 @@ You can find many Box64 videos on the [MicroLinux](https://www.youtube.com/chann
 
 Since Box64 uses the native versions of some "system" libraries, like libc, libm, SDL, and OpenGL, it's easy to integrate and use with most applications, and performance can be surprisingly high in many cases. Take a look at thoses bench analysis for an example [here](https://box86.org/index.php/2021/06/game-performances/).
 
-Box64 integrates with DynaRec (dynamic recompiler) for the ARM64 platform, providing a speed boost between 5 to 10 times faster than using only the interpreter. Some high level information on how DynaRec works can be found [here](https://box86.org/2021/07/inner-workings-a-high%e2%80%91level-view-of-box86-and-a-low%e2%80%91level-view-of-the-dynarec/).
+Box64 integrates with DynaRec (dynamic recompiler) for the ARM64 and RV64 platform, providing a speed boost between 5 to 10 times faster than using only the interpreter. Some high level information on how DynaRec works can be found [here](https://box86.org/2021/07/inner-workings-a-high%e2%80%91level-view-of-box86-and-a-low%e2%80%91level-view-of-the-dynarec/).
 
-Some x64 internal opcodes use parts of "Realmode X86 Emulator Library", see [x64primop.c](../src/emu/x64primop.c) for copyright details
+Some x64 internal opcodes use parts of "Realmode X86 Emulator Library", see [x64primop.c](src/emu/x64primop.c) for copyright details
 
-<img src="img/Box64Icon.png" width="96" height="96">
+<img src="docs/img/Box64Icon.png" width="96" height="96">
 
 Logo and Icon made by @grayduck, thanks!
 
@@ -29,7 +29,7 @@ Usage
 
 There are a few environment variables to control the behaviour of Box64.
 
-See [here](USAGE.md) for all the environment variables and what they do.
+See [here](docs/USAGE.md) for all the environment variables and what they do.
 
 Note: Box64's Dynarec uses a mechanism with Memory Protection and a SegFault signal handler to handle JIT code. In simpler terms, if you want to use GDB to debug a running program that use JIT'd code (like mono/Unity3D), you will still have many "normal" segfaults triggering. It is suggested to use something like `handle SIGSEGV nostop` in GDB to not stop at each segfault, and maybe put a breakpoint inside `my_memprotectionhandler` in `signals.c` if you want to trap SegFaults.
 
@@ -37,14 +37,15 @@ Note: Box64's Dynarec uses a mechanism with Memory Protection and a SegFault sig
 
 Compiling/Installation
 ----
-> Compilation instructions can be found [here](COMPILE.md).
+> Compilation instructions can be found [here](https://github.com/ptitSeb/box64/blob/main/docs/COMPILE.md) \
+> Instructions for installing Wine for Box64 can be found [here](https://github.com/ptitSeb/box64/blob/main/docs/X64WINE.md)
 
 ----
 
 Version history/Change log
 ----
 
-The change log is available [here](CHANGELOG.md).
+The change log is available [here](docs/CHANGELOG.md).
 
 ----
 
@@ -53,7 +54,7 @@ Notes about 32-bit platforms
 
 Because Box64 works by directly translating function calls from x86_64 to host system, the host system (the one Box64 is running on) needs to have 64-bit libraries. Box64 doesn't include any 64-bit <-> 32-bit translation. 
 
-So understand that box64 will only runs 64-bit linux binaries. For 32-bit binaries, you need box86 (with all the multiarch or proot trickery it imply on 64-bit OS).
+So understand that box64 will only run 64-bit linux binaries. For 32-bit binaries, you need box86 (with all the multiarch or proot trickery it implies on a 64-bit OS).
 Note that many installer (mojo setup based) will fall back to "x86" when detecting ARM64 OS, and so will try to use box86 for the setup, even if an x86_64 version exist. You can hack your way around with a fake "uname" that return "x86_64" when the argument is "-m"
 
 ----
@@ -61,16 +62,16 @@ Note that many installer (mojo setup based) will fall back to "x86" when detecti
 Notes about Box64 configuration
 ----
 
-Box64 now have configurations files. There are 2 files loaded. `/etc/box4.box64rc` and `~/.box64rc`. Both files have the same syntax, and is basicaly an ini files. Section in square brakets define the process name, and the rest is the env. var. to set. Looke at [Usage](USAGE.md) for detail on what parameters can be put. Box64 comes with a default file that should be installed for better stability. The file in in `system/box64.box64rc` and should be installed to `/etc/box64.box64rc` If, for some reasons, you don't want to install that file here, at least copy it to `~/.box64rc` or some game may not function correctly.
-Note that the priority is: `~/.bashrc` > `/etc/box64.box64rc` > command line
-So, your settings in `~/.bashrc` may override the setting from your command line...
+Box64 now have configurations files. There are 2 files loaded. `/etc/box4.box64rc` and `~/.box64rc`. Both files have the same syntax, and is basicaly an ini files. Section in square brakets define the process name, and the rest is the env. var. to set. Looke at [Usage](USAGE.md) for detail on what parameters can be put. Box64 comes with a default file that should be installed for better stability. The file in in `system/box64.box64rc` and should be installed to `/etc/box64.box64rc` If, for some reason, you don't want to install that file here, at least copy it to `~/.box64rc` or some game may not function correctly.
+Note that the priority is: `~/.box64rc` > `/etc/box64.box64rc` > command line
+So, your settings in `~/.box64rc` may override the setting from your command line...
 
 ----
 
 Notes about Unity game emulation
 ----
 
-Running Unity games should just works, but you should also note that many Unity3D games require OpenGL 3+ which can be tricky to provide on ARM SBC (single-board computers). Also many newer Unity3D (like KSP) games use the BC7 compressed textures, wich is not supported on many ARM integrated GPU.
+Running Unity games should just work, but you should also note that many Unity3D games require OpenGL 3+ which can be tricky to provide on ARM SBC (single-board computers). Also many newer Unity3D (like KSP) games use the BC7 compressed textures, which is not supported on many ARM integrated GPU.
 Hint: on Pi4, use `MESA_GL_VERSION_OVERRIDE=3.2` and with Panfrost use `PAN_MESA_DEBUG=gl3` to use higher profile if the game starts then quits before showing anything.
 
 ----
@@ -85,23 +86,22 @@ GTK libraries are now wrapped on box64, both gtk2 and gtk3.
 Notes about Steam
 ----
 
-Note that Steam is a hybrid 32-bit / 64-bit. You NEED box86 to run Steam, as the client app is a 32-bit binary. It also uses a 64-bit local server binaries, but like most stuff using libcef/chromium, it's not working correctly on box64 for now.
-So, no Steam for now on box64.
+Note that Steam is a hybrid 32-bit / 64-bit. You NEED box86 to run Steam, as the client app is a 32-bit binary. It also uses a 64-bit local server binaries, and that steamwebhelper process is now mandatory, even on the "small mode". And that process will eat lots of memory. So machine with less the 6Gb of RAM will need a swapfile to use Steam.
 
 ----
 
 Notes about Wine
 ----
 
-Wine64 is supported on box64. Proton should also work. Be aware that 64-bit Wine also includes 32-bit components, to be able to run 32-bit Windows programs. The 32-bit apps will need box86 and will not run without it. On a system where both box64 and box86 are present and working, a wine 64-bit setup can run both 32-bit and 64-bit Windows programs (just use `wine` and `wine64` respectively).
-Note that the new 32bits PE in 64bits process that the Wine time in currently implementing in Wine 7.+ is not yet supported. I tested Wine 7.5 64bits and it worked, but more recent version will probably just not work yet.
+Wine64 is supported on box64. Proton too. Be aware that 64-bit Wine also includes 32-bit components, to be able to run 32-bit Windows programs. The 32-bit apps will need box86 and will not run without it. On a system where both box64 and box86 are present and working, a wine 64-bit setup can run both 32-bit and 64-bit Windows programs (just use `wine` and `wine64` respectively).
+Note that the new 32-bit PE in 64-bit processes that the Wine team is currently implementing in Wine 7.+ is now supported, but the support is quite young so there might be some residual issues.
 
 ----
 
 Notes about Vulkan
 ----
 
-Box64 wraps Vulkan libraries, but note that it as only been tested with a RX550 card, so some extensions may be missing depending on your graphics card.
+Box64 wraps Vulkan libraries, but note that it as mostly been tested with an AMD RX550 card and on the Freedreno driver, so some extensions may be missing depending on your graphics card.
 
 ----
 
@@ -112,10 +112,11 @@ I want to thank everyone who has contributed to box64 development.
 There are many ways to contribute: code contribution, financial, hardware and advertisement!
 So, in no particular order, I want to thank:
  * For their major code contribution: rajdakin, mogery
- * For their major financial contribution: FlyingFathead, stormchaser3000, dennis1248, sll00, [libre-computer-project](https://libre.computer/)
+ * For their major financial contribution: FlyingFathead, stormchaser3000, dennis1248, sll00, [libre-computer-project](https://libre.computer/), [CubeCoders Limited](http://cubecoders.com/)
  * For hardware contribution and LoongArch migration: [xiaoji](https://www.linuxgame.cn/), Deepin Beijing Develop Team
- * For their hardware contribution: [Radxa](https://rockpi.org/), [Pine64](https://www.pine64.org/), [StarFive](https://rvspace.org/)
- * For their continous advertisement of box64 project: salva ([microLinux](https://www.youtube.com/channel/UCwFQAEj1lp3out4n7BeBatQ)), [PILab](https://www.youtube.com/channel/UCgfQjdc5RceRlTGfuthBs7g)/[TwisterOS](https://twisteros.com/) team, [The Byteman](https://www.youtube.com/channel/UCEr8lpIJ3B5Ctc5BvcOHSnA), [NicoD](https://www.youtube.com/channel/UCpv7NFr0-9AB5xoklh3Snhg), ekianjo ([Boilingsteam](https://boilingsteam.com/))
+ * For their major code contribution on the RV64 Dynarec: ksco, xctan
+ * For their hardware contribution: [ADLINK](https://www.adlinktech.com/Products/Computer_on_Modules/COM-HPC-Server-Carrier-and-Starter-Kit/Ampere_Altra_Developer_Platform?lang=en) with [Ampere](https://amperecomputing.com/home/edge), [Radxa](https://rockpi.org/), [StarFive](https://rvspace.org/), [Pine64](https://www.pine64.org/), [AYN](https://www.ayntec.com/)
+ * For their continuous advertisements for the box64 project: salva ([microLinux](https://www.youtube.com/channel/UCwFQAEj1lp3out4n7BeBatQ)), [PILab](https://www.youtube.com/channel/UCgfQjdc5RceRlTGfuthBs7g)/[TwisterOS](https://twisteros.com/) team, [The Byteman](https://www.youtube.com/channel/UCEr8lpIJ3B5Ctc5BvcOHSnA), [NicoD](https://www.youtube.com/channel/UCpv7NFr0-9AB5xoklh3Snhg), ekianjo ([Boilingsteam](https://boilingsteam.com/))
 
 And I also thank the many other people who participated even once in this project.
 

README_CN.md

@@ -0,0 +1,113 @@
+# box64
+
+![Official logo](docs/img/Box64Logo.png "Official Logo")
+Linux 上用户空间的 x86_64 应用模拟器（支持运行原生库）
+
+----
+![box64 build status](https://app.travis-ci.com/ptitSeb/box64.svg?branch=main)
+
+[English](docs/README.md) | [Українська](https://github.com/ptitSeb/box64/blob/main/README_UK.md) 
+
+Box64 可以在非 x86_64 Linux 系统（比如 ARM64）上运行 x86_64 Linux 程序（比如游戏），注意主机系统需要是 64 位小端。
+
+您可以在 [MicroLinux](https://www.youtube.com/channel/UCwFQAEj1lp3out4n7BeBatQ)、[Pi Labs](https://www.youtube.com/channel/UCgfQjdc5RceRlTGfuthBs7g) 和 [The Byteman](https://www.youtube.com/channel/UCEr8lpIJ3B5Ctc5BvcOHSnA) YouTube 频道上找到许多 Box64 视频。
+
+由于 Box64 使用一些“系统”库的原生版本，如 libc、libm、SDL 和 OpenGL 等，因此很容易与大多数应用程序集成和使用，并且在许多情况下性能会相当不错。可以在[这里](https://box86.org/index.php/2021/06/game-performances/)查看一些性能测试的样例。
+
+Box64 集成了适用于 ARM64 和 RV64 平台的 DynaRec（动态重编译器），速度可以比纯解释模式快 5 到 10 倍。可以在[这里](https://box86.org/2021/07/inner-workings-a-high%E2%80%91level-view-of-box86-and-a-low%E2%80%91level-view-of-the-dynarec/)找到有关 DynaRec 工作原理的一些信息。
+
+一些 x64 内部操作码使用 “Realmode X86 Emulator Library” 的部分内容，有关版权详细信息，请参见 [x64primop.c](../src/emu/x64primop.c)。
+
+<img src="docs/img/Box64Icon.png" width="96" height="96">
+
+LOGO 由 @grayduck 制作，感谢！
+
+----
+
+使用方法
+----
+
+有若干环境变量可以控制 Box64 的行为。
+
+可在[这里](docs/USAGE.md)查看所有环境变量及其作用。
+
+注意：Box64 的 Dynarec 使用具有内存保护和段错误信号处理的机制来执行 JIT 代码。所以，如果想使用 GDB 调试使用 JIT 代码的程序（如 Mono/Unity3D），这会触发许多“正常”的段错误。建议在 GDB 中使用类似 `handle SIGSEGV nostop` 来防止它每个段错误处停止。如果你想捕获段错误，可以在 `signals.c` 的 `my_memprotectionhandler` 中设置断点。
+
+----
+
+编译/安装
+----
+
+编译说明可以在[这里](docs/COMPILE.md)查看。
+
+----
+
+版本历史
+----
+
+版本日志在[这里](docs/CHANGELOG.md)。
+
+----
+
+32位平台的注意事项
+----
+
+因为 Box64 的工作原理是直接将函数调用从 x86_64 转换为主机系统，所以主机系统（运行 Box64 的系统）需要有 64 位库。Box64 不包含任何 64 位 <-> 32 位的转换。
+
+所以 box64 只能运行 64 位的 Linux 二进制。对于 32 位二进制则需要使用 box86 来运行（它在 64 位操作系统上使用了 multiarch 和 proot 等技巧来实现运行）。请注意，许多（基于 mojo 的）安装程序在检测到 ARM64 操作系统时将回退到 “x86”，因此即使存在 x86_64 版本，也会尝试使用 box86。这时你可以使用一个假的 `uname` ，并使它在运行参数为 `-m` 时返回 `x86_64`。
+
+----
+
+关于 Unity 游戏模拟的注意事项
+----
+
+运行 Unity 游戏应该没什么问题，但还应该注意，许多 Unity3D 游戏需要 OpenGL 3+，这在 ARM SBC 上可能会比较棘手。同时许多较新的 Unity3D游戏（如 KSP）也使用 BC7 压缩纹理，很多 ARM 的集成显卡并不支持。
+
+> 提示：如果游戏开始后没有显示任何东西就退出了，在 Pi4 上可以使用 `MESA_GL_VERSION_OVERRIDE=3.2`，在 Panfrost 上则可以使用 `PAN_MESA_DEBUG=gl3` 来使用更高的配置。
+
+----
+
+关于GTK程序的注意事项
+----
+
+box64 封装了 GTK，包括 gtk2 和 gtk3。
+
+----
+
+关于 Steam 的注意事项
+----
+
+请注意，Steam 是 32/64 位混合的应用，所以你需要 box86 才能运行，因为客户端应用程序是 32 位的。它还使用 64 位本地服务器，它的 steamwebhelper 无法被关闭（即使是在最小模式）而且会吃掉大量的内存。对于内存小于 6 GB 的机型，你将会需要创建 swapfile 来运行 Steam。
+
+----
+
+关于 Wine 的注意事项
+----
+
+box64 支持 Wine64，Proton 应该也能运行。请注意，64 位 Wine 包含有 32 位组件，以便能够运行 32 位 Windows 程序。32 位应用程序需要 box86，否则无法运行。在 box64 和 box86 都存在并工作的系统上，64 位的 Wine 可以同时运行 32 位和 64 位 Windows 程序（分别使用 `wine` 和 `wine64`）。请注意，目前在 Wine 7.+ 中实现的 Wine 时间在 64 位进程中的新 32bit PE 尚不支持。我测试了 Wine 7.5 64 位可以正常工作，但是更新的版本可能还不行。
+
+----
+
+关于 Vulkan 注意事项
+----
+
+Box64 封装了 Vulkan 库，但请注意，它仅在 RX550 显卡上进行过测试，因此根据您的显卡，某些扩展可能会丢失。
+
+----
+
+结语
+----
+
+我要感谢所有为 box64 开发做出贡献的人。
+贡献方式有很多种：代码贡献、财务帮助、捐赠捐赠和广告合作！
+以下感谢不分先后： 
+
+ * 代码贡献：rajdakin, mogery
+ * 财务帮助：FlyingFathead, stormchaser3000, dennis1248, sll00, [libre-computer-project](https://libre.computer/)
+ * 硬件捐赠和 LoongArch 迁移：[xiaoji](https://www.linuxgame.cn/), Deepin Beijing Develop Team
+ * 硬件捐赠：[ADLink](https://www.adlinktech.com/Products/Computer_on_Modules/COM-HPC-Server-Carrier-and-Starter-Kit/Ampere_Altra_Developer_Platform?lang=en), [Radxa](https://rockpi.org/), [Pine64](https://www.pine64.org/), [StarFive](https://rvspace.org/)
+ * 为本项目持续的宣传：salva ([microLinux](https://www.youtube.com/channel/UCwFQAEj1lp3out4n7BeBatQ)), [PILab](https://www.youtube.com/channel/UCgfQjdc5RceRlTGfuthBs7g)/[TwisterOS](https://twisteros.com/) team, [The Byteman](https://www.youtube.com/channel/UCEr8lpIJ3B5Ctc5BvcOHSnA), [NicoD](https://www.youtube.com/channel/UCpv7NFr0-9AB5xoklh3Snhg), ekianjo ([Boilingsteam](https://boilingsteam.com/))
+
+我还要感谢很多人，即使他们只参与了一次本项目。
+
+(如果你的项目中使用了Box64，请不要忘记提及！)

README_UK.md

@@ -0,0 +1,119 @@
+![Official logo](docs/img/Box64Logo.png "Official Logo")
+
+Емулятор простіра користувача x86_64 із родзинкою
+
+[Дивитись журнал змін](https://github.com/ptitSeb/box64/blob/main/docs/CHANGELOG.md) | [中文](https://github.com/ptitSeb/box64/blob/main/README_CN.md) | [Українська](https://github.com/ptitSeb/box64/blob/main/README_UK.md) | [Повідомити про помилку](https://github.com/ptitSeb/box64/issues/new)
+
+![build](https://app.travis-ci.com/ptitSeb/box64.svg?branch=main) ![stars](https://img.shields.io/github/stars/ptitSeb/box64) ![forks](https://img.shields.io/github/forks/ptitSeb/box64) ![contributors](https://img.shields.io/github/contributors/ptitSeb/box64) ![prs](https://img.shields.io/github/issues-pr/ptitSeb/box64) ![issues](https://img.shields.io/github/issues/ptitSeb/box64)
+
+----
+
+Box64 дозволяє запускати x86_64 Linux програми (наприклад, ігри) на системах Linux відмінних від x86_64, наприклад ARM (хост-система має мати 64-розрядний порядок редагування).
+
+Ви можете знайти багато відео про Box64 в YouTube каналах [MicroLinux](https://www.youtube.com/channel/UCwFQAEj1lp3out4n7BeBatQ), [Pi Labs](https://www.youtube.com/channel/UCgfQjdc5RceRlTGfuthBs7g) або [The Byteman](https://www.youtube.com/channel/UCEr8lpIJ3B5Ctc5BvcOHSnA)
+
+Оскільки Box64 використовує рідні версії деяких «системних» бібліотек, таких як libc, libm, SDL і OpenGL, його легко інтегрувати та використовувати з більшістю програм, а продуктивність у багатьох випадках може бути напрочуд високою. Подивіться на цей стендовий аналіз для прикладу [тут](https://box86.org/index.php/2021/06/game-performances/).
+
+Box64 інтегрується з DynaRec (динамічний рекомпілятор) для платформ ARM64 і RV64 забезпечуючи підвищення швидкості в 5-10 разів, ніж використання лише інтерпретатора. Деякі високорівневі відомості про те, як працює DynaRec, можна знайти [тут](https://box86.org/2021/07/inner-workings-a-high%e2%80%91level-view-of-box86-and-a-low%e2%80%91level-view-of-the-dynarec/).
+
+Деякі внутрішні коди операцій x64 використовують частини «Бібліотеки емулятора Realmode X86», дивіться [x64primop.c](src/emu/x64primop.c) для детальної інформації про авторські права.
+
+<img src="docs/img/Box64Icon.png" width="96" height="96">
+
+Логотип і піктограма зроблені @grayduck, дякую!
+
+----
+
+Використання
+----
+
+Є кілька змінних середовища для керування поведінкою Box64.
+
+Дивіться [тут](docs/USAGE.md) для перегляду всіх змінних середовища та того, що вони роблять.
+
+Примітка: Dynarec від Box64 використовує механізм із захистом пам’яті та обробником сигналу помилки сегментів для обробки JIT коду. Простіше кажучи, якщо ви хочете використовувати GDB для налагодження запущеної програми, яка використовує JIT-код (наприклад, mono/Unity3D), ви все одно матимете багато «звичайних» помилок сегментів. Пропонується використовувати щось на зразок `handle SIGSEGV nostop` в GDB, щоб не зупинятися на кожній помилці сегмента, і, можливо, поставити точку зупину всередині `my_memprotectionhandler` в `signals.c`, якщо ви хочете перехопити помилки сегментів.
+
+----
+Компіляція/Встановлення
+----
+> Інструкцію зі складання Box64 можна знайти [тут](docs/COMPILE.md).\
+> Інструкцію з встановлення Wine для Box64 можна знайти [тут](docs/X64WINE.md).
+
+----
+
+Історія версій/Журнал змін
+----
+
+Історія версій доступна [тут](docs/CHANGELOG.md).
+
+----
+
+Примітки щодо 32 бітних платформ
+----
+Оскільки Box64 працює шляхом прямого перекладу викликів функцій з x86_64 на хост-систему, хост-система (та, на якій працює Box64) повинна мати 64-розрядні бібліотеки. Box64 не містить 64-біт <-> 32-біт перекладу.
+
+Також розумійте що Box64 запускатиме лише 64-розрядні двійкові Linux файли. Для 32-розрядних двійкових файлів вам потрібен Box86 (з усіма хитрощами з мультиархітектурною системою або корінними правами). Зауважте, що багато інсталяторів (на основі mojo) повертаються до "x86" при виявленні ОС ARM64, і тому намагатимуться використовувати Box86 для налаштування, навіть якщо існує версія x86_64. Ви можете зламати свій шлях за допомогою фальшивого "uname", який повертає "x86_64", коли аргумент "-m"
+
+----
+
+Примітки щодо конфігурації Box64
+----
+
+Обидва файли мають однаковий синтаксис і в основному є файлами ini. Розділ у квадратних дужках визначає назву процесу, а решта — встановлють змінну середовища. Подивіться [використання](USAGE.md), щоб дізнатися, які параметри можна завдати. Box64 поставляється з файлом за замовчуванням, який слід встановити для кращої стабільності. Файл знаходиться в `system/box64.box64rc` і має бути встановлен в `/etc/box64.box64rc`. Якщо з певних причин ви не хочете встановлювати цей файл у `/etc`, принаймні скопіюйте його в `~/.box64rc` або гра може не працювати належним чином. Зауважте, що пріоритетом є: `~/.bashrc` > `/etc/box64.box64rc` > командний рядок
+Таким чином, ваші налаштування в `~/.bashrc` можуть замінити налаштування з вашого командного рядка...
+
+----
+
+Примітки щодо емуляції ігор Unity
+----
+
+Запуск ігор Unity має працювати, але ви також повинні зауважити, що для багатьох ігор Unity3D потрібен OpenGL 3+, який може бути складно забезпечити на ARM SBC (одноплатних комп’ютерах). Крім того, багато нових ігор Unity3D (наприклад, KSP) використовують стиснуті текстури BC7, які не підтримуються багатьма інтегрованими GPU ARM.
+Підказка: в Pi4 використовуйте `MESA_GL_VERSION_OVERRIDE=3.2`, а в Panfrost — `PAN_MESA_DEBUG=gl3`, щоб використовувати вищий профіль, якщо гра запускається, а потім завершується, перш ніж щось показує.
+
+----
+
+Примітки щодо програм GTK
+----
+
+Бібліотеки GTK2 і GTK3 тепер використовуються в Box64.
+
+----
+
+Примітки щодо Steam
+----
+
+Зауважте, що Steam є гібридом 32-біт / 64-біт. Вам ПОТРІБЕН box86, щоб запустити Steam, оскільки клієнта є 32-розрядною двійковою програмою. Він також використовує 64-розрядні двійкові файли локального сервера, і цей процес steamwebhelper тепер є обов’язковим навіть у «малому режимі». І цей процес з’їсть багато оперативної пам’яті, таким чином машині з 6 Гб оперативної пам’яті знадобиться файл підкачки для використання Steam.
+
+----
+
+Примітки щодо Wine
+----
+
+Wine64 підтримується Box64, Proton теж. Майте на увазі, що 64-розрядний Wine також містить 32-розрядні компоненти щоб мати можливість запускати 32-розрядні програми Windows. Для 32-розрядних програм потрібен Box86, і вони не працюватимуть без нього. У системі, де присутні і працюють Box64, і Box86, 64-розрядне встановлення Wine може запускати як 32-розрядні, так і 64-розрядні програми Windows (просто використовуйте `wine` і `wine64` відповідно).
+Зауважте, що новий 32-бітний PE в 64-бітному процесі, який Wine зараз реалізує у Wine 7+ тепер підтримується, але підтримка є досить молодою тому можуть виникнути деякі проблеми.
+
+----
+
+Примітки щодо Vulkan
+----
+
+Box64 використовує бібліотеки Vulkan, але зауважте що він тестувався з картою AMD Radeon RX550 і драйвером Freedreno, тому деякі розширення можуть бути відсутні залежно від вашої відеокарти.
+
+----
+
+Останнє слово
+----
+
+Я хочу подякувати всім, хто зробив внесок у розвиток box64.
+Є багато способів зробити внесок: внесок коду, фінансовий внесок, апаратне забезпечення та реклама!
+Отже, без особливого порядку, я хочу подякувати:
+* За основний внесок у код: rajdakin, mogery
+* За великий фінансовий внесок: FlyingFathead, stormchaser3000, dennis1248, sll00, [libre-computer-project](https://libre.computer/)
+* За апаратне забезпечення та міграцію LoongArch: [xiaoji](https://www.linuxgame.cn/), команда розробників Deepin Beijing
+* За основний внесок у код RV64 Dynarec: ksco, xctan
+* За внесок у апаратне забезпечення: [ADLink](https://www.adlinktech.com/Products/Computer_on_Modules/COM-HPC-Server-Carrier-and-Starter-Kit/Ampere_Altra_Developer_Platform?lang=en), [Radxa](https://rockpi.org/), [Pine64](https://www.pine64.org/), [StarFive](https://rvspace.org/)
+* За безперервну рекламу Box64: salva ([microLinux](https://www.youtube.com/channel/UCwFQAEj1lp3out4n7BeBatQ)), [PILab](https://www.youtube.com/channel/UCgfQjdc5RceRlTGfuthBs7g)/Команда [TwisterOS](https://twisteros.com/), [The Byteman](https://www.youtube.com/channel/UCEr8lpIJ3B5Ctc5BvcOHSnA), [NicoD](https://www.youtube.com/channel/UCpv7NFr0-9AB5xoklh3Snhg), ekianjo ([Boilingsteam](https://boilingsteam.com/))
+
+І я також дякую багатьом іншим людям, які хоч раз брали участь у цьому проекті.
+
+(Якщо ви використовуєте Box64 у своєму проекті, будь ласка, не забудьте згадати про це!)

debian/changelog

@@ -1,6 +1,63 @@
+box64 (0.2.6) unstable; urgency=low
+
+ * X64Libs: Updated libstdc++ & libgcc_s
+ * X64Libs: Use x86_64 vrsion of libunwind (it's needed by wine)
+ * Dynarec: More opcodes on ARM64 & RV64
+ * Dynarec: Fixed some flags propagation issues inside blocks
+ * Dynarec: Improved Strong Memory Model emulation, introducing a 3rd level
+ * Dynarec: ARM64: reworked shift and bit opcodes flags handling
+ * Dynarec: RV64: Many fixes, making Wow64 apps running
+ * Dynarec: ARM64: Added support for SSE4.2 (with CRC32 if supported by CPU)
+ * Dynarec: ARM64: Added support for SHA (with hardware support if CPU allows it)
+ * Dynarec: ARM64: The CALLRET optimisation has been improved and is now default
+ * CPU: Remoworked how INT, priviliged opcodes and teh Trace flags works
+ * CPU: Added full support for SSE4.2
+ * CPU: Added full support for SHA extension
+ * ElfLoader: rework how elf memory is handled
+ * Emulation: Added some more syscalls
+ * Emulation: Better handling of Signal (also handling SIGMAX correctly)
+ * Emulation: Better support for POKEUSER/PEEKUSER (helps Windows Unity games)
+ * Wrapping: More libs and some fixes in function wrapping (gtk3, vulkan...)
+ * Wrapping: Removed faked libunwind wrapping
+ * Hardware: Added more profile, with support ADLink Ampere Altra, Qualcomm 8Gen3, and Pi5 machines
+ * OS: Added profile to build for Android and Termux.
+ * OS: New option to use mold for a high speed link
+ * => More hadware support, more functions wrapped for an improve compatibity
+ * => More CPU extension, with ARM64 hardware support when possible, and improved CALLRET optimisation for an improved speed of emulation
+ * => Some work also to reduce the memory footprint
+
+-- Sebastien Chevalier <[email protected]>  Thu, 15 Dec 2023 17:30:33 -0100
+
+box64 (0.2.4) unstable; urgency=low
+
+  * Added Dynarec for RISC-V
+  * Added partial 32 bits support (WoW64 works)
+  * Changed cpuid to display box64
+  * Fixed steam, again
+  * Improved hacked version for overridden malloc/free functions
+  * More wrapped libs
+  * More wrapped functions and syscalls
+  * Reduced memory footprint
+  * Added support for the BIND_NOW flags in ELF files
+  * Added RTLD_NOLOAD support
+  * Fixed some typos and general cleanup, again
+  * Added a cosimulation mode (to compare the behaviour of the dynarec with the interpreter)
+  * Added FASTNAN/FASTROUND handling for more opcodes
+  * Better float/double/long double handling
+  * Better dlopen/dlclose handling
+  * More games in the rc file
+  * Added BOX64_DYNAREC_MISSING to show only missing opcode, independantly of the log level
+  * Added BOX64_RESERVE_HIGH to reserve addresses above 47bits
+  * Improved multitreading support
+  * Ukrainian translation of the README
+  * => Dynarec now support RISC-V, large speedup on RISC-V 64, were games are now playable (like Stardew Valley on a Vision Five 2)
+  * => Improved compatibility with more fixes in elf handling, more wrapped libs and functiond, more fixed opcodes and refined profile
+
+-- Sebastien Chevalier <[email protected]>  Thu, 10 Mar 2023 10:20:33 -0500
+
 box64 (0.2.2) unstable; urgency=low
 
- * Added a hacked version for overriden malloc/free functions, enabling libcef (and derivative) to work.
+ * Added a hacked version for overridden malloc/free functions, enabling libcef (and derivative) to work.
  * Added rcfile handling: box64 now read "/etc/box64.box64rc" and "~/.box64rc" and apply per process parameters
  * Added BOX64_DYNAREC_CALLRET to optimized CALL/RET opcode using semi-direct native CALL/RET (get more than 10% speedup)
  * Added BOX64_DYNAREC_FORWARD to allow bigger Dynarec block to be build (can get more then 30% of Speedup!)
@@ -17,7 +74,7 @@ box64 (0.2.2) unstable; urgency=low
  * Some special cases fixes for dlopen (fixes deadcells, maybe others too)
  * Improved mmap mapping, espcially with MAP_32BITS flag
  * More wrapped functions and syscalls
- * Lots of improvment in the Rounding of float & double (Dynarec and Interpretor), and proper handling of denormals when converting to/from 80 bits long double
+ * Lots of improvment in the Rounding of float & double (Dynarec and Interpreter), and proper handling of denormals when converting to/from 80 bits long double
  * Added specific suppport for RK3588 board (needed some hack in signal handling, probably due to the use of a non mainlined kernel)
  * More support on the RV64 port
  * More support to build under musl environment
@@ -27,7 +84,7 @@ box64 (0.2.2) unstable; urgency=low
 box64 (0.2.0) unstable; urgency=low
 
  * Wrapped more vulkan function, dxvk 2.0 now works
- * Added support for overriden malloc/free functions
+ * Added support for overridden malloc/free functions
  * Refactor Dynarec memory management, reducing memory footprint (from 20% to 40% of Dynarec size)
  * Improved elf loader
  * Improved dlsym handling with RTLD_NEXT
@@ -92,7 +149,7 @@ box64 (0.1.8) unstable; urgency=low
   * Don't quit on unsupported syscall, return -1 / ENOSYS error
   * Added some more Syscall
   * Wrapped Vulkan library. Vulkan and dxvk now supported!
-  * Support building on PPC64LE (interpretor only)
-  * Added support for Risc-V (interpretor only)
+  * Support building on PPC64LE (interpreter only)
+  * Added support for Risc-V (interpreter only)
 
  -- Sebastien Chevalier <[email protected]>  Tue, 18 Jan 2022 11:20:33 -0500

debian/rules

@@ -6,7 +6,8 @@
 override_dh_auto_configure:
 	dh_auto_configure -- \
 	      -DCMAKE_BUILD_TYPE=RelWithDebInfo \
-	      -DARM_DYNAREC=1
+	      -DARM_DYNAREC=1 \
+		  -DNOGIT=1
 
 override_dh_shlibdeps:
-	dh_shlibdeps --exclude=libgcc_s.so.1 --exclude=libpng12.so.0 --exclude=libstdc++.so.6 
+	dh_shlibdeps --exclude=libgcc_s.so.1 --exclude=libpng12.so.0 --exclude=libstdc++.so.5 --exclude=libstdc++.so.6

docs/CHANGELOG.md

@@ -1,6 +1,59 @@
+v0.2.6
+======
+* X64Libs: Updated libstdc++ & libgcc_s
+* X64Libs: Use x86_64 vrsion of libunwind (it's needed by wine)
+* Dynarec: More opcodes on ARM64 & RV64
+* Dynarec: Fixed some flags propagation issues inside blocks
+* Dynarec: Improved Strong Memory Model emulation, introducing a 3rd level
+* Dynarec: ARM64: reworked shift and bit opcodes flags handling
+* Dynarec: RV64: Many fixes, making Wow64 apps running
+* Dynarec: ARM64: Added support for SSE4.2 (with CRC32 if supported by CPU)
+* Dynarec: ARM64: Added support for SHA (with hardware support if CPU allows it)
+* Dynarec: ARM64: The CALLRET optimisation has been improved and is now default
+* CPU: Remoworked how INT, priviliged opcodes and teh Trace flags works
+* CPU: Added full support for SSE4.2
+* CPU: Added full support for SHA extension
+* ElfLoader: rework how elf memory is handled
+* Emulation: Added some more syscalls
+* Emulation: Better handling of Signal (also handling SIGMAX correctly)
+* Emulation: Better support for POKEUSER/PEEKUSER (helps Windows Unity games)
+* Wrapping: More libs and some fixes in function wrapping (gtk3, vulkan...)
+* Wrapping: Removed faked libunwind wrapping
+* Hardware: Added more profile, with support ADLink Ampere Altra, Qualcomm 8Gen3, and Pi5 machines
+* OS: Added profile to build for Android and Termux.
+* OS: New option to use mold for a high speed link
+=> More hadware support, more functions wrapped for an improve compatibity
+=> More CPU extension, with ARM64 hardware support when possible, and improved CALLRET optimisation for an improved speed of emulation
+=> Some work also to reduce the memory footprint
+
+v0.2.4
+======
+* Added Dynarec for RISC-V
+* Added partial 32 bits support (WoW64 works)
+* Changed cpuid to display box64
+* Fixed steam, again
+* Improved hacked version for overridden malloc/free functions
+* More wrapped libs
+* More wrapped functions and syscalls
+* Reduced memory footprint
+* Added support for the BIND_NOW flags in ELF files
+* Added RTLD_NOLOAD support
+* Fixed some typos and general cleanup, again
+* Added a cosimulation mode (to compare the behaviour of the dynarec with the interpreter)
+* Added FASTNAN/FASTROUND handling for more opcodes
+* Better float/double/long double handling
+* Better dlopen/dlclose handling
+* More games in the rc file
+* Added BOX64_DYNAREC_MISSING to show only missing opcode, independantly of the log level
+* Added BOX64_RESERVE_HIGH to reserve addresses above 47bits
+* Improved multitreading support
+* Ukrainian translation of the README
+=> Dynarec now support RISC-V, large speedup on RISC-V 64, were games are now playable (like Stardew Valley on a Vision Five 2)
+=> Improved compatibility with more fixes in elf handling, more wrapped libs and functiond, more fixed opcodes and refined profile
+
 v0.2.2
 ======
-* Added a hacked version for overriden malloc/free functions, enabling libcef (and derivative) to work.
+* Added a hacked version for overridden malloc/free functions, enabling libcef (and derivative) to work.
     => Steam Large mode and new BigPicture are working
     => Heroic Launcher is working
 * Added rcfile handling: box64 now read `/etc/box64.box64rc` and `~/.box64rc` and apply per process parameters
@@ -22,7 +75,7 @@ v0.2.2
 * Some special cases fixes for dlopen (fixes deadcells, maybe others too)
 * Improved mmap mapping, espcially with MAP_32BITS flag
 * More wrapped functions and syscalls
-* Lots of improvment in the Rounding of float & double (Dynarec and Interpretor), and proper handling of denormals when converting to/from 80 bits long double
+* Lots of improvment in the Rounding of float & double (Dynarec and Interpreter), and proper handling of denormals when converting to/from 80 bits long double
 * Added specific suppport for RK3588 board (needed some hack in signal handling, probably due to the use of a non mainlined kernel)
 * More support on the RV64 port
 * More support to build under musl environment
@@ -30,7 +83,7 @@ v0.2.2
 v0.2.0
 ======
 * Wrapped more vulkan function, dxvk 2.0 now works
-* Added support for overriden malloc/free functions
+* Added support for overridden malloc/free functions
 * Refactor Dynarec memory management, reducing memory footprint (from 20% to 40% of Dynarec size)
 * Improved elf loader
 * Improved dlsym handling with RTLD_NEXT
@@ -80,8 +133,8 @@ v0.1.8
 * Don't quit on unsupported syscall, return -1 / ENOSYS error
 * Added some more Syscall
 * Wrapped Vulkan library. Vulkan and dxvk now supported!
-* Support building on PPC64LE (interpretor only)
-* Added support for Risc-V (interpretor only)
+* Support building on PPC64LE (interpreter only)
+* Added support for Risc-V (interpreter only)
 
 v0.1.6
 ======
@@ -97,7 +150,7 @@ v0.1.6
 * Some residual fixes on thread attribute handling
 * Better handling of app that want 32bits jumps, like unity3d/mono (thanks mogery)
 * More ARM hardware option in CMake (Phytium, NX...)
-* Added loongarch64 support (interpretor only)
+* Added loongarch64 support (interpreter only)
 * Some fixes to elfloader
 * Added a mecanism to cancel a Dynarec block construction if it triggers a segfault (instead of a crash)
 
@@ -120,7 +173,7 @@ v0.1.4
 v0.1.2
 ======
 * OpenSource!
-* A few more opcode added to the Interpretor and the Dynarec
+* A few more opcode added to the Interpreter and the Dynarec
 * Improved Native Function calling
 * Added some function to limit allocated memory to 47bits space (for Wine)
 * Improved and Fixed the functions to limit allocated memory to 32bits space
@@ -134,7 +187,7 @@ v0.1.0
 * Some fixes to a few function signature
 * Improvement to Signal handling, and internal mutex handling
 * A few fixes to some dynarec opcodes
-* A few fixes to some interpretor opcodes
+* A few fixes to some interpreter opcodes
 
 v0.0.8
 ======

docs/COMPILE.md

@@ -1,45 +1,57 @@
 Compiling/Installing
 ----
 
-#### Debian-based Linux 
+### Debian-based Linux 
 You can use [@ryanfortner](https://github.com/ryanfortner)'s apt repository to install precompiled box64 debs, updated every 24 hours. 
 
 ```
 sudo wget https://ryanfortner.github.io/box64-debs/box64.list -O /etc/apt/sources.list.d/box64.list
-wget -O- https://ryanfortner.github.io/box64-debs/KEY.gpg | sudo gpg --dearmor -o /usr/share/keyrings/box64-debs-archive-keyring.gpg 
-sudo apt update && sudo apt install box64 -y
+wget -qO- https://ryanfortner.github.io/box64-debs/KEY.gpg | sudo gpg --dearmor -o /etc/apt/trusted.gpg.d/box64-debs-archive-keyring.gpg
+sudo apt update && sudo apt install box64-arm64 -y
 ```
 
 Alternatively, you can generate your own package using the [instructions below](https://github.com/ptitSeb/box64/blob/main/docs/COMPILE.md#debian-packaging). 
 
-#### for RK3399
+----
 
-Using a 64bit OS:
+### The general approach is:
 ```
 git clone https://github.com/ptitSeb/box64
 cd box64
-mkdir build; cd build; cmake .. -DRK3399=1 -DCMAKE_BUILD_TYPE=RelWithDebInfo
-make -j4
+mkdir build; cd build; cmake .. ${OPTIONS}
+make -j4  
 sudo make install
 ```
 If it's the first install, you also need:
 ```
 sudo systemctl restart systemd-binfmt
 ```
+- You can use `make -j1`, `make -j2` to prevent running out of memory
+- You can also add `-DBAD_SIGNAL=ON` to the cmake command if you are on Linux Kernel mixed with Android, like on RK3588.
+
+#### For Instance, if you want to build box64 for Generic ARM64 Linux platforms, it would look like this:
+```
+git clone https://github.com/ptitSeb/box64
+cd box64
+mkdir build; cd build; cmake .. -D ARM_DYNAREC=ON -D CMAKE_BUILD_TYPE=RelWithDebInfo
+make -j4
+sudo make install
+sudo systemctl restart systemd-binfmt
+```
+----
+
+#### for RK3399
+
+Using a 64bit OS:
+```
+-D RK3399=1 -D CMAKE_BUILD_TYPE=RelWithDebInfo
+```
 
 #### for RK3588 / RK3588S
 
 Using a 64bit OS:
 ```
-git clone https://github.com/ptitSeb/box64
-cd box64
-mkdir build; cd build; cmake .. -DRK3588=1 -DCMAKE_BUILD_TYPE=RelWithDebInfo
-make -j4
-sudo make install
-```
-If it's the first install, you also need:
-```
-sudo systemctl restart systemd-binfmt
+-D RK3588=1 -D CMAKE_BUILD_TYPE=RelWithDebInfo
 ```
 
 #### for Raspberry Pi 3
@@ -55,16 +67,7 @@ run out of memory at some point and need to run the build again.
 Still, this can be faster if your build is attended.
 
 ```
-git clone https://github.com/ptitSeb/box64
-cd box64
-mkdir build; cd build; cmake .. -DRPI3ARM64=1 -DCMAKE_BUILD_TYPE=RelWithDebInfo
-make 
-# or e.g. make -j4
-sudo make install
-```
-If it's the first install, you also need:
-```
-sudo systemctl restart systemd-binfmt
+-D RPI3ARM64=1 -D CMAKE_BUILD_TYPE=RelWithDebInfo
 ```
 
 #### for Raspberry Pi 4
@@ -72,15 +75,14 @@ sudo systemctl restart systemd-binfmt
 Warning, you need a 64bit OS:
 
 ```
-git clone https://github.com/ptitSeb/box64
-cd box64
-mkdir build; cd build; cmake .. -DRPI4ARM64=1 -DCMAKE_BUILD_TYPE=RelWithDebInfo
-make -j4
-sudo make install
+-D RPI4ARM64=1 -D CMAKE_BUILD_TYPE=RelWithDebInfo
 ```
-If it's the first install, you also need:
+
+#### for Raspberry Pi 5
+
+If your Raspberry Pi OS use 16K pages use `RPI5ARM64PS16K` instead of `RPI5ARM64`:
 ```
-sudo systemctl restart systemd-binfmt
+-D RPI5ARM64=1 -D CMAKE_BUILD_TYPE=RelWithDebInfo
 ```
 
 #### for TEGRA X1
@@ -88,64 +90,46 @@ sudo systemctl restart systemd-binfmt
 Using a 64bit OS:
 
 ```
-git clone https://github.com/ptitSeb/box64
-cd box64
-mkdir build; cd build; cmake .. -DTEGRAX1=1 -DCMAKE_BUILD_TYPE=RelWithDebInfo
-make -j4
-sudo make install
-```
-If it's the first install, you also need:
-```
-sudo systemctl restart systemd-binfmt
+-D TEGRAX1=1 -D CMAKE_BUILD_TYPE=RelWithDebInfo
 ```
 
+
 #### for ODROID N2/N2+
 
 Using a 64bit OS:
 
 ```
-git clone https://github.com/ptitSeb/box64
-cd box64
-mkdir build; cd build; cmake .. -DODROIDN2=1 -DCMAKE_BUILD_TYPE=RelWithDebInfo
-make -j4
-sudo make install
-```
-If it's the first install, you also need:
-```
-sudo systemctl restart systemd-binfmt
+-D ODROIDN2=1 -D CMAKE_BUILD_TYPE=RelWithDebInfo
 ```
 
-#### for Snapdragon 845
+#### for Snapdragon
 
 Using a 64bit OS:
 
 ```
-git clone https://github.com/ptitSeb/box64
-cd box64
-mkdir build; cd build; cmake .. -DSD845=1 -DCMAKE_BUILD_TYPE=RelWithDebInfo
-make -j4
-sudo make install
-```
-If it's the first install, you also need:
-```
-sudo systemctl restart systemd-binfmt
+-D SD845=1 -D CMAKE_BUILD_TYPE=RelWithDebInfo
 ```
 
+or
+
+```
+-D SD888=1 -D CMAKE_BUILD_TYPE=RelWithDebInfo
+```
+
+Depending how recent your Snapdragon is
 
-----
 #### for Phytium
 
 Using a 64bit OS:
 ```
-git clone https://github.com/ptitSeb/box64
-cd box64
-mkdir build; cd build; cmake .. -DPHYTIUM=1 -DCMAKE_BUILD_TYPE=RelWithDebInfo
-make -j4
-sudo make install
+-D PHYTIUM=1 -D CMAKE_BUILD_TYPE=RelWithDebInfo
 ```
-If it's the first install, you also need:
+
+#### for ADLink machines
+
+Using a 64bit OS:
 ```
-sudo systemctl restart systemd-binfmt
+-D ADLINK=1 -D CMAKE_BUILD_TYPE=RelWithDebInfo
 ```
 
 #### for M1
@@ -153,38 +137,15 @@ sudo systemctl restart systemd-binfmt
 Only test on Asahi for now, using the default "16K page" kernel
 
 ```
-git clone https://github.com/ptitSeb/box64
-cd box64
-mkdir build; cd build; cmake .. -DM1=1 -DCMAKE_BUILD_TYPE=RelWithDebInfo
-make -j4
-sudo make install
+-D M1=1 -D CMAKE_BUILD_TYPE=RelWithDebInfo
 ```
-If it's the first install, you also need:
-```
-sudo systemctl restart systemd-binfmt
-```
-
-
-#### for Other ARM64 Linux platforms
-
- `mkdir build; cd build; cmake .. -DARM_DYNAREC=ON -DCMAKE_BUILD_TYPE=RelWithDebInfo; make -j$(nproc)`
-
-You can also add `-DBAD_SIGNAL=ON` to the cmake command if you are on Linux Kernel mixed with Android, like on RK3588 or maybe Termux
 
 #### for LoongArch
 
 Using a 64bit OS:
 
 ```
-git clone https://github.com/ptitSeb/box64
-cd box64
-mkdir build; cd build; cmake .. -DLARCH64=1 -DCMAKE_BUILD_TYPE=RelWithDebInfo
-make -j4
-sudo make install
-```
-If it's the first install, you also need:
-```
-sudo systemctl restart systemd-binfmt
+-D LARCH64=1 -D CMAKE_BUILD_TYPE=RelWithDebInfo
 ```
 
 #### for RISC-V
@@ -192,15 +153,7 @@ sudo systemctl restart systemd-binfmt
 Using a 64bit OS:
 
 ```
-git clone https://github.com/ptitSeb/box64
-cd box64
-mkdir build; cd build; cmake .. -DRV64=1 -DCMAKE_BUILD_TYPE=RelWithDebInfo
-make -j`nproc`
-sudo make install
-```
-If it's the first install, you also need:
-```
-sudo systemctl restart systemd-binfmt
+-D RV64=1 -D CMAKE_BUILD_TYPE=RelWithDebInfo
 ```
 
 #### for PowerPC 64 LE
@@ -208,15 +161,7 @@ sudo systemctl restart systemd-binfmt
 Using a 64bit OS:
 
 ```
-git clone https://github.com/ptitSeb/box64
-cd box64
-mkdir build; cd build; cmake .. -DPPC64LE=1 -DCMAKE_BUILD_TYPE=RelWithDebInfo
-make -j4
-sudo make install
-```
-If it's the first install, you also need:
-```
-sudo systemctl restart systemd-binfmt
+-D PPC64LE=1 -D CMAKE_BUILD_TYPE=RelWithDebInfo
 ```
 
 #### for LX2160A
@@ -224,24 +169,38 @@ sudo systemctl restart systemd-binfmt
 Using a 64bit OS:
 
 ```
-git clone https://github.com/ptitSeb/box64
-cd box64
-mkdir build; cd build; cmake .. -DLX2160A=1 -DCMAKE_BUILD_TYPE=RelWithDebInfo
-make -j$(nproc)
-sudo make install
+-D LX2160A=1 -D CMAKE_BUILD_TYPE=RelWithDebInfo
 ```
-If it's the first install, you also need:
+
+#### for Termux
+
+You must have ARM64 Device for build box64.
+
+##### in CHRoot/PRoot
+
 ```
-sudo systemctl restart systemd-binfmt
+-D ARM64=1 -DCMAKE_C_COMPILER=gcc -DBAD_SIGNAL=ON -DCMAKE_BUILD_TYPE=RelWithDebInfo
+```
+
+##### in Termux (Native)
+
+NOTE: BUILDING BOX64 IN TERMUX NATIVE IS EXPERIMENTAL AND DOESN'T GONNA RUN LINUX BINARIES IN NATIVE TERMUX BOX64!!!
+
+You also needed have `libandroid-sysv-semaphore` and `libandroid-spawn` libraries:
+
+```
+-D TERMUX=1 -D -DCMAKE_C_COMPILER=clang CMAKE_BUILD_TYPE=RelWithDebInfo
 ```
 
 #### for x86_64 Linux
+```
+-D LD80BITS=1 -D NOALIGN=1 -D CMAKE_BUILD_TYPE=RelWithDebInfo
+```
+If you encounter some linking errors, try using `NOLOADADDR=ON` (`cmake -D NOLOADADDR=ON; make -j$(nproc)`).
 
- `mkdir build; cd build; cmake .. -DLD80BITS=1 -DNOALIGN=1 -DCMAKE_BUILD_TYPE=RelWithDebInfo; make -j$(nproc)`
+----
 
-If you encounter some linking errors, try using `NOLOADADDR=ON` (`cmake -DNOLOADADDR=ON; make -j$(nproc)`).
-
-### use ccmake
+### Use ccmake
 
 Alternatively, you can **use the curses-bases ccmake (or any other gui frontend for cmake)** to select wich platform to use interactively.
 
@@ -257,17 +216,24 @@ The `-DCMAKE_BUILD_TYPE=RelWithDebInfo` argument makes a build that is both opti
 
 #### To have a Trace Enabled build 
 
-To have a trace enabled build (***the interpreter will be slightly slower***), add `-DHAVE_TRACE=1`. But you will need to have the [Zydis library](https://github.com/zyantific/zydis) in your `LD_LIBRARY_PATH` or in the system library folders at runtime.
+To have a trace enabled build (***the interpreter will be slightly slower***), add `-DHAVE_TRACE=1`. But you will need to have the [Zydis library](https://github.com/zyantific/zydis) in your `LD_LIBRARY_PATH` or in the system library folders at runtime. Use version v3.2.1, as later version changed the API and will no longer work with box64
 
 #### To have ARM Dynarec
 
 Dynarec is only available on ARM (for the meantime), Activate it by using `-DARM_DYNAREC=1`.
-###### *Note: VFPv3 and NEON are required for Dynarec.*
+
+#### To have a build using less memory
+
+You can use `-DSAVE_MEM` to have a build that will try to save some memory. It's, for now, only increasing the jumptable from 4 level to 5 levels. The added granularity avoid wasting space, but the 1 level more to the jumptable means there is on read from memory more when jumping between blocks.
 
 #### Not building from a git clone
 
 If you are not building from a git clone (for example, downloading a release source code zip from github), you need to use `-DNOGIT=1` from cmake to be able to build (box64 uses git SHA1 to show last commit in version number).
 
+#### Use faster linker
+
+You need to add `-DWITH_MOLD=1` if GNU ld is extremely slow. Then run `mold -run make -j4` to build (make sure [Mold](https://github.com/rui314/mold) is installed).
+
 ----
 
 Testing
@@ -282,4 +248,4 @@ The tests are very basic and only tests some functionality for now.
 
 Debian Packaging
 ----
-Box64 can also be packaged into a .deb file with `DEB_BUILD_OPTIONS=nostrip dpkg-buildpackage -us -uc -nc`.
+Box64 can also be packaged into a .deb file ***using the source code zip from the releases page*** with `DEB_BUILD_OPTIONS=nostrip dpkg-buildpackage -us -uc -nc`. Configure any additional cmake options you might want in `debian/rules`.

docs/README_CN.md

@@ -1,119 +0,0 @@
-# box64
-
-![Official logo](img/Box64Logo.png "Official Logo")
-Linux上用户空间的x86_64应用模拟器 
-
-----
-![box64 build status](https://app.travis-ci.com/ptitSeb/box64.svg?branch=main)
-
-[English](README.md)
-
-在ARM或其他非X86_64架构的Linux操作系统上，使用Box64可以运行x86_64 Linux程序（例如游戏），请注意，主机系统需要**64位小端**。
-
-您可以在Youtube的[MicroLinux](https://www.youtube.com/channel/UCwFQAEj1lp3out4n7BeBatQ)、[Pi Labs](https://www.youtube.com/channel/UCgfQjdc5RceRlTGfuthBs7g)或[The Byteman](https://www.youtube.com/channel/UCEr8lpIJ3B5Ctc5BvcOHSnA)频道找到更多Box64视频。
-
-Box64使用了一些“系统”库的原生版本，例如libc、libm、SDL和OpenGL，所以它很容易与大多数应用程序集成和使用，并且在很多情况下性能会出奇的高。点击[此处](https://box86.org/index.php/2021/06/game-performances/)查看示例的基准测试分析。
-
-Box64为ARM64平台集成了DynaRec（动态重编译器），比仅使用解释器提升5到10倍性能。关于Dynarec如何工作的更多信息，可以在[这里](https://box86.org/2021/07/inner-workings-a-high%e2%80%91level-view-of-box86-and-a-low%e2%80%91level-view-of-the-dynarec/)找到。
-
-注：DynaRec需要针对不同平台编写一部分汇编代码，目前仅支持ARM64。
-
-一些x64内部操作码使用“Realmode X86 Emulator Library”的部分内容，请参阅[x64primop.c](../src/emu/x64primop.c)了解版权详情 
-
-<img src="img/Box64Icon.png" width="96" height="96">
-
-Logo和图标由grayduck制作，感谢!
-
-----
-
-使用方法
-----
-
-若干环境变量可以设置Box64的行为。
-
-点击[这里](USAGE.md)了解所有的环境变量和它们的作用。
-
-请注意：Box64的Dynarec提供了一种机制来处理JIT代码，包含内存保护和段错误信号处理程序。简单地说，如果您想用GDB来调试一个使用JIT代码的运行程序（比如mono/Unity3D），您仍然会触发很多“正常”的段错误。建议在GDB中使用类似于`handle SIGSEGV nostop`的东西，不要在每个段错误时都停止，如果您想捕获段错误，可以在`signals.c`中的`my_memprotectionhandler`中放置一个断点。
-
-----
-
-编译/安装
-----
-> 编译说明可以在[这里](COMPILE.md)查看。  
-
-----
-
-版本历史
-----
-
-版本日志在[这里](CHANGELOG.md)。
-
-----
-
-32位平台的注意事项
-----
-
-Box64的工作原理是直接将函数调用从x86_64转换到主机系统，主机系统（Box64运行的系统）需要有64位的库。Box64并不包括任何64位<->32位的转换。
-
-所以请理解，Box64只能运行64位的Linux二进制文件。对于32位的二进制文件，需要Box86（在64位的操作系统上需要所有的multiarch库或一些proot技巧）。
-
-请注意，许多(基于mojo的)安装程序，即使存在x86_64版本，但在检测到架构为ARM64时会退回到"x86"，这时会尝试使用（如果有）box86进行安装。这时你可以使用一个假的"uname"，当它的参数为"-m"时返回"x86_64"。
-
-----
-
-关于Unity游戏模拟的注意事项
-----
-
-当前Unity游戏模拟是一件碰运气的事情。Unity使用Mono（它的信号表示，并不总能100%成功模拟）。
-
-您还应该注意，一些Unity3D游戏需要OpenGL 3+，目前在ARM SBC（单板计算机）上提供OpenGL 3+是很棘手的。
-
-所以，并不是所有的Unity游戏都能工作，而且可能需要很高的OpenGL配置，但现在很多游戏都能工作。
-
-提示：如果游戏开始后在显示任何东西之前退出，在Pi4上使用`MESA_GL_VERSION_OVERRIDE=3.2`，在Panfrost上使用`PAN_MESA_DEBUG=gl3`来使用更高的配置文件。
-
-----
-
-关于GTK程序的注意事项
-----
-
-GTK 庫現在包裝在 box64 上，但只有 gtk2，而不是 gtk3（與 box86 相反）。
-
-----
-
-关于Steam的注意事项
-----
-
-Steam并不是32位/64位混合的，而是32位的，因此您需要Box86才能运行Steam。Steam也使用64位的本地服务器程序，但像大多数使用libcef/chromium的程序一样，在box64上暂时无法正常工作。
-所以：目前在box64上无法运行Steam。
-----
-
-关于Wine的注意事项
-----
-
-box64支持64位Wine，但请注意，64位的Wine还包含32位的组件，以便能够运行32位的Windws程序。32位程序需要Box86，没有它就不能运行。在Box64和Box86共存的系统上，设置64位Wine可以同时运行32位和64位windows程序（只需分别使用 `wine` 和 `wine64`）。
-
-----
-
-关于Vulkan注意事项
-----
-
-Box64 包裝 Vulkan 庫。但請注意，它僅使用 RX550 卡進行了測試，根據您的圖形卡，可能會缺少某些擴展。
-
-----
-
-结语
-----
-
-我要感谢所有为 box64 开发做出贡献的人。
-贡献方式有很多种：代码贡献、财务帮助、捐赠捐赠和广告合作！
-以下感谢不分先后： 
- * 代码贡献：rajdakin, mogery
- * 财务帮助：FlyingFathead, stormchaser3000, dennis1248, sll00, [libre-computer-project](https://libre.computer/)
- * 硬件捐赠：[Radxa](https://rockpi.org/), [Pine64](https://www.pine64.org/), [StarFive](https://rvspace.org/)
- * 硬件捐赠和LoongArch迁移：[xiaoji](https://www.linuxgame.cn)
- * 为本项目持续的宣传：salva ([microLinux](https://www.youtube.com/channel/UCwFQAEj1lp3out4n7BeBatQ)), [PILab](https://www.youtube.com/channel/UCgfQjdc5RceRlTGfuthBs7g)/[TwisterOS](https://twisteros.com/) team, [The Byteman](https://www.youtube.com/channel/UCEr8lpIJ3B5Ctc5BvcOHSnA), [NicoD](https://www.youtube.com/channel/UCpv7NFr0-9AB5xoklh3Snhg), ekianjo ([Boilingsteam](https://boilingsteam.com/))
-
-我还要感谢很多人，即使他们只参与了一次本项目。
-
-(如果你的项目中使用了Box64，请不要忘记提及！)

docs/USAGE.md

@@ -3,7 +3,10 @@ Usage
 ----
 
 There are many environment variables to control Box64 behaviour. 
-Env. var with * can also be put inside box64rc files
+Env. var with * can also be put inside box64rc files. 
+Box64 look for 2 places for rcfile: `/etc/box64.box64rc` and `~/.box64rc`
+The second takes precedence to the first, on an APP level 
+(that means if an [MYAPP] my appears in both file, only the settings in `~/.box64rc` will be applied)
 
 #### BOX64_LOG *
 Controls the Verbosity level of the logs
@@ -38,7 +41,7 @@ Enables/Disables the logging of `dlsym` errors.
 #### BOX64_TRACE_FILE *
 Send all log and trace to a file instead of `stdout`
 Also, if name contains `%pid` then this is replaced by the actual PID of box64 instance
-End the filename with `+` to have thetrace appended instead of overwriten
+End the filename with `+` to have thetrace appended instead of overwritten
 Use `stderr` to use this instead of default `stdout` 
 
 #### BOX64_TRACE *
@@ -49,7 +52,7 @@ Only on build with trace enabled. Trace allow the logging of all instruction exe
  * 0xXXXXXXX-0xYYYYYYY : Trace only between the 2 addresses.
 
 #### BOX64_TRACE_INIT *
-Use BOX64_TRACE_INIT instead of BOX_TRACE to start trace before the initialisation of libraries and the running program
+Use BOX64_TRACE_INIT instead of BOX64_TRACE to start trace before the initialisation of libraries and the running program
  * 0 : No trace. (Default.)
  * 1 : Trace enabled. The trace start with the initialisation of all depending libraries is done.
 
@@ -130,9 +133,14 @@ Enables/Disables trace for generated code.
  * 1 : Enable trace for generated code (like regular Trace, this will slow down the program a lot and generate huge logs).
 
 #### BOX64_NODYNAREC  *
-Forbid dynablock creation in the interval specified (helpfull for debugging behaviour difference between Dynarec and Interpretor)
+Forbid dynablock creation in the interval specified (helpfull for debugging behaviour difference between Dynarec and Interpreter)
  * 0xXXXXXXXX-0xYYYYYYYY : define the interval where dynablock cannot start (inclusive-exclusive)
 
+#### BOX64_DYNAREC_TEST *
+Dynarec will compare it's execution with the interpreter (super slow, only for testing)
+ * 0 : No comparison
+ * 1 : Each opcode runs on interepter and on Dynarec, and regs and memory are compared and print if different
+
 #### BOX64_DYNAREC_BIGBLOCK *
 Enables/Disables Box64's Dynarec building BigBlock.
  * 0 : Don't try to build block as big as possible (can help program using lots of thread and a JIT, like C#/Unity) (Default when libmonobdwgc-2.0.so is loaded)
@@ -148,8 +156,9 @@ Define Box64's Dynarec max allowed forward value when building Block.
 #### BOX64_DYNAREC_STRONGMEM *
 Enable/Disable simulation of Strong Memory model
 * 0 : Don't try anything special (Default.)
-* 1 : Enable some Memory Barrier when reading from memory (on some MOV opcode) to simulate Strong Memory Model while trying to limit performance impact (Default when libmonobdwgc-2.0.so is loaded)
-* 2 : Enable some Memory Barrier when reading from memory (on some MOV opcode) to simulate Strong Memory Model
+* 1 : Enable some Memory Barrier when writting to memory (on some MOV opcode) to simulate Strong Memory Model while trying to limit performance impact (Default when libmonobdwgc-2.0.so is loaded)
+* 2 : All 1. plus a memory barrier on every write to memory using MOV
+* 3 : All 2. plus Memory Barrier when reading from memory and on some SSE/SSE2 opcodes too
 
 #### BOX64_DYNAREC_X87DOUBLE *
 Force the use of Double for x87 emulation
@@ -174,29 +183,44 @@ Handling of flags on CALL/RET opcodes
 
 #### BOX64_DYNAREC_CALLRET *
 Optimisation of CALL/RET opcodes (not compatible with jit/dynarec/smc)
-* 0 : Don't optimize CALL/RET, use Jump Table for boths (Default)
-* 1 : Try to optimized CALL/RET, skipping the use of the JumpTable when possible (will crash if blacks are invalidate, so probably incompatible with JIT/Dynarec)
+* 0 : Don't optimize CALL/RET, use Jump Table for boths
+* 1 : Try to optimized CALL/RET, skipping the use of the JumpTable when possible (Default)
 
 #### BOX64_DYNAREC_HOTPAGE *
-Handling of HotPage (Page beeing both executed and writen)
-* 0 : Don't track hotpage
-* 1-255 : Track HotPage, and disable execution of a page beeing writen for N attempts (default is 4)
+Handling of HotPage (Page being both executed and written)
+* 0 : Don't track hotpage (Default)
+* 1-255 : Track HotPage, and disable execution of a page being written for N attempts
 
 #### BOX64_DYNAREC_FASTPAGE *
-Will use a faster handling of HotPage (Page beeing both executed and writen)
+Will use a faster handling of HotPage (Page being both executed and written)
 * 0 : use regular hotpage (Default)
 * 1 : Use faster hotpage, taking the risk of running obsolete JIT code (might be faster, but more prone to crash)
 
+#### BOX64_DYNAREC_ALIGNED_ATOMICS *
+Generated code for aligned atomics only
+* 0 : The code generated can handle unaligned atomics (Default)
+* 1 : Generated code only for aligned atomics (faster and less code generated, but will SEGBUS if LOCK prefix is unsed on unaligned data)
+
 #### BOX64_DYNAREC_BLEEDING_EDGE *
 Detect MonoBleedingEdge and apply conservative settings
 * 0 : Don't detect MonoBleedingEdge
 * 1 : Detect MonoBleedingEdge, and apply BIGBLOCK=0 STRONGMEM=1 if detected (Default)
 
+#### BOX64_DYNAREC_JVM *
+Detect libjvm and apply conservative settings
+* 0 : Don't detect libjvm
+* 1 : Detect libjvm, and apply BIGBLOCK=0 STRONGMEM=1 if detected (Default)
+
 #### BOX64_DYNAREC_WAIT *
 Behavior with FillBlock is not availble (FillBlock build Dynarec blocks and is not multithreaded)
 * 0 : Dynarec will not wait for FillBlock to ready and use Interpreter instead (might speedup a bit massive multithread or JIT programs)
 * 1 : Dynarec will wait for FillBlock to be ready (Default)
 
+#### BOX64_DYNAREC_MISSING *
+Dynarec print the missing opcodes
+* 0 : not print the missing opcode (Default, unless DYNAREC_LOG>=1 or DYNAREC_DUMP>=1 is used)
+* 1 : Will print the missing opcodes
+
 #### BOX64_SSE_FLUSHTO0 *
 Handling of SSE Flush to 0 flags
 * 0 : Just track the flag (Default)
@@ -207,11 +231,21 @@ Handling of x87 80bits long double
 * 0 : Try to handle 80bits long double as precise as possible (Default)
 * 1 : Handle them as double
 
+#### BOX64_SYNC_ROUNDING *
+Box64 will sync rounding mode with fesetround/fegetround.
+* 0 : Disable rounding mode syncing. (Default.)
+* 1 : Enable rounding mode syncing.
+
 #### BOX64_LIBCEF *
 Detect libcef and apply malloc_hack settings
 * 0 : Don't detect libcef
 * 1 : Detect libcef, and apply MALLOC_HACK=2 if detected (Default)
 
+#### BOX64_SDL2_JGUID *
+Need a workaround for SDL_GetJoystickGUIDInfo function for wrapped SDL2
+* 0 : Don't use any workaround
+* 1 : Use a workaround for program that use the private SDL_GetJoystickGUIDInfo function with 1 missing argument
+
 #### BOX64_LIBGL *
  * libXXXX set the name for libGL (defaults to libGL.so.1).
  * /PATH/TO/libGLXXX : Sets the name and path for libGL
@@ -267,12 +301,17 @@ Disables the load of vulkan libraries.
  * 0 : Load vulkan libraries if found.
  * 1 : Disables the load of vulkan libraries, both the native and the i386 version (can be useful on Pi4, where the vulkan driver is not quite there yet.)
 
+#### BOX64_FUTEX_WAITV *
+Use of the new fuext_waitc syscall
+ * 0 : Do not try to use it, return unsupported (Default for BAD_SIGNAL build)
+ * 1 : let program use the syscall if the host system support it (Default for other build)
+
 #### BOX64_BASH *
 Define x86_64 bash to launch script
  * yyyy
  Will use yyyy as x86_64 bash to launch script. yyyy needs to be a full path to a valid x86_64 version of bash
 
-#### BOX64_ENV
+#### BOX64_ENV *
  * XXX=yyyy
  will add XXX=yyyy env. var.
 
@@ -280,6 +319,10 @@ Define x86_64 bash to launch script
  * XXX=yyyy
  will add XXX=yyyy env. var. and continue with BOX86_ENV2 ... until var doesn't exist
 
+#### BOX64_RESERVE_HIGH
+* 0 : Don't try to pe-reserve high memory (beyond 47bits) (Default)
+* 1 : Try to reserve (without allocating it) memory beyond 47bits (seems unstable)
+
 #### BOX64_JITGDB *
  * 0 : Just print the Segfault message on segfault (default)
  * 1 : Launch `gdb` when a segfault, bus error or illegal instruction signal is trapped, attached to the offending process and go in an endless loop, waiting.
@@ -290,6 +333,7 @@ Define x86_64 bash to launch script
  * 2 : Launch `gdbserver` when a segfault, bus error or illegal instruction signal is trapped, attached to the offending process, and go in an endless loop, waiting.
  Use `gdb /PATH/TO/box64` and then `target remote 127.0.0.1:1234` to connect to the gdbserver (or use actual IP if not on the machine). After that, the procedure is the same as with ` BOX64_JITGDB=1`.
  This mode can be usefullwhen programs redirect all console output to a file (like Unity3D Games)
+ * 3 : Launch `lldb` when a segfault, bus error or illegal instruction signal is trapped, attached to the offending process and go in an endless loop, waiting.
 
 #### BOX64_NORCFILES
 If the env var exist, no rc files (like /etc/box64.box64rc and ~/.box64rc) will be loaded
@@ -303,6 +347,10 @@ Those variables are only valid inside a rcfile:
  * 0 : Nothing special
  * 1 : Added "--no-sandbox" to command line arguments (usefull for chrome based programs)
 
+#### BOX64_INPROCESSGPU
+ * 0 : Nothing special
+ * 1 : Added "--in-process-gpu" to command line arguments (usefull for chrome based programs)
+
 #### BOX64_EXIT
  * 0 : Nothing special
  * 1 : Just exit, don't try to run the program

docs/box64.pod

@@ -0,0 +1,484 @@
+=head1 NAME
+
+box64 - Linux Userspace x86_64 Emulator with a twist
+
+=head1 SYNOPSIS
+
+B<box64> [B<--help>] [B<--version>] I<executable>
+
+=head1 DESCRIPTION
+
+B<Box64> lets you run x86_64 Linux programs (such as games) on non-x86_64 Linux
+systems, like ARM (host system needs to be 64-bit little-endian). Since B<Box64>
+uses the native versions of some "system" libraries, like libc, libm, SDL, and
+OpenGL, it's easy to integrate and use with most applications, and performance
+can be surprisingly high in many cases. B<Box64> integrates with DynaRec (dynamic
+recompiler) for the ARM64 platform, providing a speed boost between 5 to 10
+times faster than using only the interpreter.
+
+=head1 OPTIONS
+
+=over 8
+
+=item B<-h,--help>
+
+Print box64 help and quit.
+
+=item B<-v,--version>
+
+Print box64 version and quit.
+
+=back
+
+=head1 CONFIGURATION FILE
+
+B<Box64> now have configurations files. There are 2 files loaded.
+F</etc/box4.box64rc> and F<~/.box64rc>. Both files have the same syntax, and is
+basically an ini files. Section in square brackets define the process name, and
+the rest is the environment variable. B<Box64> comes with a default file that
+should be installed for better stability. Note that the priority is:
+F<~/.bashrc> > F</etc/box64.box64rc> > command line So, your settings in
+F<~/.bashrc> may override the setting from your command line. Example:
+
+    [factorio]
+    BOX64_DYNAREC_SAFEFLAGS=0
+    BOX64_DYNAREC_BIGBLOCK=2
+    BOX64_DYNAREC_FORWARD=1024
+    BOX64_DYNAREC_CALLRET=1
+
+=head1 VARIABLES FOR RCFILE ONLY
+
+=over 8
+
+=item B<BOX64_NOSANDBOX=0|1>
+
+When set to 1, add C<--no-sandbox> to command line arguments (useful for chrome
+based programs).
+
+=item B<BOX64_INPROCESSGPU=0|1>
+
+When set to 1, add C<--in-process-gpu> to command line arguments (useful for chrome
+based programs).
+
+=item B<BOX64_EXIT>=I<0|1>
+
+When set to 1, just exit, don't try to run the program.
+
+=back
+
+=head1 VARIABLES ONLY FOR ENVIRONMENT AND NOT RCFILE
+
+=over 8
+
+=item B<BOX64_NOBANNER>=I<0|1>
+
+When set to 1, don't prints the banner including version and build.
+
+=item B<BOX64_LD_PRELOAD>=I<lib1>[:I<lib2>:...]
+
+Force loading libraries with the  binary. PreLoaded libs can be emulated or
+native, and are treated the same way as if they were comming from the binary.
+
+=item B<BOX64_ENV>=I<env=val>
+
+Add an variable with value to the environment.
+
+=item B<BOX64_ENV1>=I<env=val> B<BOX64_ENV2>=I<env=val> ...
+
+Add arbitrary many variables using B<BOX64_ENV1>, B<BOX64_ENV2>, ...
+
+=item B<BOX64_NORCFILES>
+
+No rc files (like F</etc/box64.box64rc> and F<~/.box64rc>) will be loaded.
+
+=back
+
+=head1 VARIABLES FOR BOTH ENVIRONMENT AND RCFILE
+
+=over 8
+
+=item B<BOX64_LOG>=I<0|NONE|1|INFO|2|DEBUG|3|DUMP>
+
+Controls the Verbosity level of the logs
+
+    * 0 or NONE : No message (except some fatal error). (Default.)
+    * 1 or INFO : Show some minimum log (Example: libraries not found)
+    * 2 or DEBUG : Details a lot of stuff (Example: relocations or functions called).
+    * 3 or DUMP : All DEBUG plus DUMP of all ELF Info.
+
+=item B<BOX64_ROLLING_LOG>=I<0|1|N>
+
+Show last few wrapped function call when a Signal is caught. Incompatible with
+B<BOX64_LOG> > 1 (may need B<BOX64_SHOWSEGV=1> also)
+
+    * 0: No last function call printed (Default.)
+    * 1: Last 16 wrapped functions calls printed when a signal is printed.
+    * N: Last N wrapped functions calls printed when a signal is printed.
+
+=item B<BOX64_LD_LIBRARY_PATH>=I</path/to/libs>
+
+Path to look for x86_64 libraries. Default is current folder and C<lib> in
+current folder.  Also, F</usr/lib/x86_64-linux-gnu> and
+F</lib/x86_64-linux-gnu> are added if they exist.
+
+=item B<BOX64_PATH>=I</path/to/bins>
+
+Path to look for x86_64 executable. Default is current folder and C<bin> in
+current folder.
+
+=item B<BOX64_DLSYM_ERROR>=I<0|1>
+
+Enables/Disables the logging of `dlsym` errors.
+
+    * 0 : Don't log `dlsym` errors. (Default.)
+    * 1 : Log dlsym errors.
+
+=item B<BOX64_TRACE_FILE>=I</path/to/file>
+
+Send all log and trace to a file instead of C<stdout>.  Also, if name contains
+C<%pid> then this is replaced by the actual C<PID> of B<box64> instance.  End
+the filename with `+` to have thetrace appended instead of overwritten Use
+C<stderr> to use this instead of default C<stdout>.
+
+=item B<BOX64_TRACE>=I<0|1|symbolname|0xXXXXXXX-0xYYYYYYY>
+
+Only on build with trace enabled. Trace allow the logging of all instruction executed, along with register dump
+
+    * 0 : No trace. (Default.)
+    * 1 : Trace enabled. Trace start after the initialisation of all depending libraries is done.
+    * symbolname : Trace only `symbolname` (trace is disable if the symbol is not found).
+    * 0xXXXXXXX-0xYYYYYYY : Trace only between the 2 addresses.
+
+=item B<BOX64_TRACE_INIT>=I<0|1>
+
+Use B<BOX64_TRACE_INIT> instead of B<BOX64_TRACE> to start trace before the
+initialization of libraries and the running program
+
+    * 0 : No trace. (Default.)
+    * 1 : Trace enabled. The trace start with the initialisation of all depending libraries is done.
+
+=item B<BOX64_TRACE_START>=I<NNNNNNN>
+
+Only on builds with trace enabled. Start trace only after I<NNNNNNNN> opcode
+execute (number is an `uint64_t`).
+
+=item B<BOX64_TRACE_XMM>=I<0|1>
+
+Only on builds with trace enabled.
+
+    * 0 : The XMM (i.e. SSE/SSE2) register will not be logged with the general and x86 registers. (Default.)
+    * 1 : Dump the XMM registers.
+
+=item B<BOX64_TRACE_EMM>=I<0|1>
+
+Only on builds with trace enabled.
+
+    * 0 : The EMM (i.e. MMX) register will not be logged with the general and x86 registers. (Default.)
+    * 1 : Dump the EMM registers.
+
+=item B<BOX64_TRACE_COLOR>=I<0|1>
+
+Only on builds with trace enabled.
+
+    * 0 : The general registers will always be the default white color. (Default.)
+    * 1 : The general registers will change color in the dumps when they changed value.
+
+=item B<BOX64_LOAD_ADDR>=I<0xXXXXXXXX>
+
+Try to load at C<0xXXXXXX> main binary (if binary is a PIE). 
+
+=item B<BOX64_NOSIGSEGV>=I<0|1>
+
+Disable handling of SigSEGV. (Very useful for debugging.)
+
+    * 0 : Let the x86 program set sighandler for SEGV (Default.)
+    * 1 : Disable the handling of SigSEGV.
+
+=item B<BOX64_NOSIGILL>=I<0|1>
+
+Disable handling of SigILL (to ease debugging mainly).
+
+    * 0 : Let x86 program set sighandler for Illegal Instruction
+    * 1 : Disables the handling of SigILL
+
+=item B<BOX64_SHOWSEGV>=I<0|1>
+
+Show Segfault signal even if a signal handler is present
+
+    * 0 : Don"t force show the SIGSEGV analysis (Default.)
+    * 1 : Show SIGSEGV detail, even if a signal handler is present
+
+=item B<BOX64_SHOWBT>=I<0|1>
+
+Show some Backtrace (Nativ e and Emulated) whgen a signal (SEGV, ILL or BUS) is caught
+
+    * 0 : Don"t show backtraces (Default.)
+    * 1 : Show Backtrace detail (for native, box64 is rename as the x86_64 binary run)
+
+=item B<BOX64_X11THREADS>=I<0|1>
+
+Call XInitThreads when loading X11. (This is mostly for old Loki games with the Loki_Compat library.)
+
+    * 0 : Don't force call XInitThreads. (Default.)
+    * 1 : Call XInitThreads as soon as libX11 is loaded.
+
+=item B<BOX64_X11GLX>=I<0|1>
+
+Force libX11's GLX extension to be present.
+
+    * 0 : Do not force libX11's GLX extension to be present. 
+    * 1 : GLX will always be present when using XQueryExtension. (Default.)
+
+=item B<BOX64_DYNAREC_DUMP>=I<0|1|2>
+
+Enables/disables Box64's Dynarec's dump.
+
+    * 0 : Disable Dynarec's blocks dump. (Default.)
+    * 1 : Enable Dynarec's blocks dump.
+    * 2 : Enable Dynarec's blocks dump with some colors.
+
+=item B<BOX64_DYNAREC_LOG>=I<0|1|2|3>
+
+Set the level of DynaRec's logs.
+
+    * 0 : NONE : No Logs for DynaRec. (Default.)
+    * 1 :INFO : Minimum Dynarec Logs (only unimplemented OpCode).
+    * 2 : DEBUG : Debug Logs for Dynarec (with details on block created / executed).
+    * 3 : VERBOSE : All of the above plus more.
+
+=item B<BOX64_DYNAREC>=I<0|1>
+
+Enables/Disables Box64's Dynarec.
+
+    * 0 : Disables Dynarec.
+    * 1 : Enable Dynarec. (Default.)
+
+=item B<BOX64_DYNAREC_TRACE>=I<0|1>
+
+Enables/Disables trace for generated code. Like regular Trace, this will slow
+down the program a lot and generate huge logs.
+
+    * 0 : Disable trace for generated code. (Default.)
+    * 1 : Enable trace for generated code
+
+=item B<BOX64_NODYNAREC>=I<0xXXXXXXXX-0xYYYYYYYY>
+
+Forbid dynablock creation in the interval specified (helpfull for debugging
+behaviour difference between Dynarec and Interpretor)
+
+=item B<BOX64_DYNAREC_TEST>=I<0|1>
+
+Enables/Disables test for generated code. This will run interpreter along the Dynacrec, so this will slow
+down the program a lot.
+
+    * 0 : No test for generated code. (Default.)
+    * 1 : Enable Tests for generated code
+
+=item B<BOX64_DYNAREC_BIGBLOCK>=I<0|1|2|3>
+
+Enables/Disables Box64's Dynarec building BigBlock.
+
+ * 0 : Don't try to build block as big as possible (can help program using lots of thread and a JIT, like C#/Unity) (Default when libmonobdwgc-2.0.so is loaded)
+ * 1 : Build Dynarec block as big as possible (Default.)
+ * 2 : Build Dynarec block bigger (don't stop when block overlaps, but only for blocks in elf memory)
+ * 3 : Build Dynarec block bigger (don't stop when block overlaps, for all type of memory)
+
+=item B<BOX64_DYNAREC_FORWARD>=I<0|XXX>
+
+Define Box64's Dynarec max allowed forward value when building Block.
+
+    * 0 : No forward value. When current block end, don't try to go further even if there are previous forward jumps
+    * XXX : Allow up to XXXX bytes of gap when building a Block after the block end to next forward jump (Default: 128)
+ 
+=item B<BOX64_DYNAREC_STRONGMEM>=I<0|1|2>
+
+Enable/Disable simulation of Strong Memory model
+
+    * 0 : Don't try anything special (Default.)
+    * 1 : Enable some Memory Barrier when reading from memory (on some MOV opcode) to simulate Strong Memory Model while trying to limit performance impact (Default when libmonobdwgc-2.0.so is loaded)
+    * 2 : Enable some Memory Barrier when reading from memory (on some MOV opcode) to simulate Strong Memory Model
+
+=item B<BOX64_DYNAREC_X87DOUBLE>=I<0|1>
+
+Force the use of Double for x87 emulation
+
+    * 0 : Try to use float when possible for x87 emulation (default, faster)
+    * 1 : Only use Double for x87 emulation (slower, may be needed for some specific games, like Crysis)
+
+=item B<BOX64_DYNAREC_FASTNAN>=I<0|1>
+
+Enable/Disable generation of -NAN
+
+    * 0 : Generate -NAN like on x86
+    * 1 : Don't do anything special with NAN, to go as fast as possible (default, faster)
+
+=item B<BOX64_DYNAREC_FASTROUND>=I<0|1>
+
+Enable/Disable generation of precise x86 rounding
+
+    * 0 : Generate float/double -> int rounding like on x86
+    * 1 : Don't do anything special with edge case Rounding, to go as fast as possible (no INF/NAN/Overflow -> MIN_INT conversion) (default, faster)
+
+=item B<BOX64_DYNAREC_SAFEFLAGS>=I<0|1|2>
+
+Handling of flags on CALL/RET opcodes
+
+    * 0 : Treat CALL/RET as if it never needs any flags (faster but not advised)
+    * 1 : most of RET will need flags, most of CALLS will not (Default)
+    * 2 : All CALL/RET will need flags (slower, but might be needed. Automatically enabled for Vara.exe)
+
+=item B<BOX64_DYNAREC_CALLRET>=I<0|1>
+
+Optimisation of CALL/RET opcodes (not compatible with jit/dynarec/smc)
+
+    * 0 : Don't optimize CALL/RET, use Jump Table for boths (Default)
+    * 1 : Try to optimized CALL/RET, skipping the use of the JumpTable when possible (will crash if blacks are invalidate, so probably incompatible with JIT/Dynarec)
+
+=item B<BOX64_DYNAREC_HOTPAGE>=I<0|1-255>
+
+Handling of HotPage (Page beeing both executed and writen)
+
+    * 0 : Don't track hotpage
+    * 1-255 : Track HotPage, and disable execution of a page beeing writen for N attempts (default is 4)
+
+=item B<BOX64_DYNAREC_FASTPAGE>=I<0|1>
+
+Will use a faster handling of HotPage (Page beeing both executed and writen)
+
+    * 0 : use regular hotpage (Default)
+    * 1 : Use faster hotpage, taking the risk of running obsolete JIT code (might be faster, but more prone to crash)
+
+=item B<BOX64_DYNAREC_BLEEDING_EDGE>=I<0|1>
+
+Detect MonoBleedingEdge and apply conservative settings
+
+    * 0 : Don't detect MonoBleedingEdge
+    * 1 : Detect MonoBleedingEdge, and apply BIGBLOCK=0 STRONGMEM=1 if detected (Default)
+
+=item B<BOX64_DYNAREC_WAIT>=I<0|1>
+
+Behavior with FillBlock is not availble (FillBlock build Dynarec blocks and is not multithreaded)
+
+    * 0 : Dynarec will not wait for FillBlock to ready and use Interpreter instead (might speedup a bit massive multithread or JIT programs)
+    * 1 : Dynarec will wait for FillBlock to be ready (Default)
+
+=item B<BOX64_SSE_FLUSHTO0>=I<0|1>
+
+Handling of SSE Flush to 0 flags
+
+    * 0 : Just track the flag (Default)
+    * 1 : Direct apply of SSE Flush to 0 flag
+
+=item B<BOX64_X87_NO80BITS>=I<0|1>
+
+Handling of x87 80bits long double
+
+    * 0 : Try to handle 80bits long double as precise as possible (Default)
+    * 1 : Handle them as double
+
+=item B<BOX64_SYNC_ROUNDING>=I<0|1>
+
+Box64 will sync rounding mode with fesetround/fegetround.
+
+    * 0 : Disable rounding mode syncing. (Default.)
+    * 1 : Enable rounding mode syncing.
+
+=item B<BOX64_LIBCEF>=I<0|1>
+
+Detect libcef and apply malloc_hack settings
+
+    * 0 : Don't detect libcef
+    * 1 : Detect libcef, and apply MALLOC_HACK=2 if detected (Default)
+
+=item B<BOX64_LIBGL>=I<libXXXX|/PATH/TO/libGLXXX>
+
+You can also use B<SDL_VIDEO_GL_DRIVER>
+
+     * libXXXX set the name for libGL (defaults to libGL.so.1).
+     * /PATH/TO/libGLXXX : Sets the name and path for libGL
+
+=item B<BOX64_EMULATED_LIBS>=I<XXXX[:YYYY:...]>
+
+Force lib XXXX (and YYYY...) to be emulated (and not wrapped) Some games uses
+an old version of some libraries, with an ABI incompatible with native version.
+Note that LittleInferno for example is auto detected, and libvorbis.so.0 is
+automatical added to emulated libs, and same for Don't Starve (and Together /
+Server variant) that use an old SDL2 too
+
+=item B<BOX64_ALLOWMISSINGLIBS>=I<0|1>
+
+Allow Box64 to continue even if a library is missing.
+
+    * 0 : Box64 will stop if a library cannot be loaded. (Default.)
+    * 1 : Continue even if a needed library cannot be loaded. Unadvised, this will, in most cases, crash later on.
+
+=item B<BOX64_PREFER_WRAPPED>=I<0|1>
+
+Box64 will use wrapped libs even if the lib is specified with absolute path
+
+    * 0 : Try to use emulated libs when they are defined with absolute path  (Default.)
+    * 1 : Use Wrapped native libs even if path is absolute
+
+=item B<BOX64_PREFER_EMULATED>=I<0|1>
+
+Box64 will prefer emulated libs first (execpt for glibc, alsa, pulse, GL,
+vulkan and X11
+
+   * 0 : Native libs are prefered (Default.)
+   * 1 : Emulated libs are prefered (Default for program running inside pressure-vessel)
+
+=item B<BOX64_CRASHHANDLER>=I<0|1>
+
+Box64 will use a dummy crashhandler.so library
+
+    * 0 : Use Emulated crashhandler.so library if needed
+    * 1 : Use an internal dummy (completly empty) crashhandler.so library (defaut)
+
+=item B<BOX64_MALLOC_HACK>=I<0|1|2>
+
+How Box64 will handle hooking of malloc operators
+
+    * 0 : Don't allow malloc operator to be redirected, rewriting code to use regular function (Default)
+    * 1 : Allow malloc operator to be redirected (not advised)
+    * 2 : Like 0, but track special mmap / free (some redirected functions were inlined and cannot be redirected)
+
+=item B<BOX64_NOPULSE>=I<0|1>
+
+Disables the load of pulseaudio libraries.
+
+    * 0 : Load pulseaudio libraries if found. (Default.)
+    * 1 : Disables the load of pulse audio libraries (libpulse and libpulse-simple), both the native library and the x86 library
+
+=item B<BOX64_NOGTK>=I<0|1>
+
+Disables the loading of wrapped GTK libraries.
+
+    * 0 : Load wrapped GTK libraries if found. (Default.)
+    * 1 : Disables loading wrapped GTK libraries.
+
+=item B<BOX64_NOVULKAN>=I<0|1>
+
+Disables the load of vulkan libraries.
+
+    * 0 : Load vulkan libraries if found.
+    * 1 : Disables the load of vulkan libraries, both the native and the i386 version (can be useful on Pi4, where the vulkan driver is not quite there yet.)
+
+=item B<BOX64_FUTEX_WAITV>=I<0|1>
+
+Use of the new fuext_waitc syscall
+
+     * 0 : Do not try to use it, return unsupported (default for BAD_SIGNAL build)
+    * 1 : let program use the syscall if the host system support it (Default for other build)
+
+=item B<BOX64_BASH>=I<yyyy>
+
+Define x86_64 bash to launch script. Will use yyyy as x86_64 bash to launch
+script. yyyy needs to be a full path to a valid x86_64 version of bash
+
+=item B<BOX64_JITGDB>=I<0|1|2>
+
+    * 0 : Just print the Segfault message on segfault (default)
+    * 1 : Launch `gdb` when a segfault, bus error or illegal instruction signal is trapped, attached to the offending process and go in an endless loop, waiting. When in gdb, you need to find the correct thread yourself (the one with `my_box64signalhandler` in is stack) then probably need to `finish` 1 or 2 functions (inside `usleep(..)`) and then you'll be in `my_box64signalhandler`, just before the printf of the Segfault message. Then simply  `set waiting=0` to exit the infinite loop.
+    * 2 : Launch `gdbserver` when a segfault, bus error or illegal instruction signal is trapped, attached to the offending process, and go in an endless loop, waiting. Use `gdb /PATH/TO/box64` and then `target remote 127.0.0.1:1234` to connect to the gdbserver (or use actual IP if not on the machine). After that, the procedure is the same as with ` BOX64_JITGDB=1`. This mode can be usefullwhen programs redirect all console output to a file (like Unity3D Games)
+
+=cut

pkgbuilds/PKGBUILD-arm64

@@ -1,7 +1,7 @@
 # Maintainer: Jai-JAP <[email protected]>
 # Author: Sebastien Chevalier <[email protected]>
 pkgname=box64-arm64-git
-pkgver=r1495.e6e9fae
+pkgver=r2431.60c6858
 pkgrel=1
 pkgdesc="Linux Userspace x86_64 Emulator with a twist, targeted at ARM64 Linux devices."
 arch=('aarch64')
@@ -15,24 +15,22 @@ source=('git+https://github.com/ptitSeb/box64')
 md5sums=('SKIP')
 
 pkgver() {
-	cd "$srcdir/${pkgname%-arm64-git}"
+	cd "${srcdir}/${pkgname%-arm64-git}"
 	printf "r%s.%s" "$(git rev-list --count HEAD)" "$(git rev-parse --short HEAD)"
 }
 
 prepare() {
 	cd "${srcdir}/${pkgname%-arm64-git}"
-	if [[ ! -d ./build ]]; then
-		mkdir build && cd build
-		cmake .. -DARM_DYNAREC=ON -DCMAKE_BUILD_TYPE=RelWithDebInfo -DCMAKE_INSTALL_PREFIX=/usr
-	fi
+	[[ ! -d ./build ]] && mkdir build
+	cmake -B build -DARM_DYNAREC=ON -DCMAKE_BUILD_TYPE=RelWithDebInfo -DCMAKE_INSTALL_PREFIX=/usr
 }
 
 build() {
-	cd "$srcdir/${pkgname%-arm64-git}/build"
+	cd "${srcdir}/${pkgname%-arm64-git}/build"
 	make -j$(nproc)
 }
 
 package() {
-	cd "$srcdir/${pkgname%-arm64-git}/build"
+	cd "${srcdir}/${pkgname%-arm64-git}/build"
 	make DESTDIR="${pkgdir}/" install
 }

pkgbuilds/PKGBUILD-asahi

@@ -1,7 +1,7 @@
 # Maintainer: Jai-JAP <[email protected]>
 # Author: Sebastien Chevalier <[email protected]>
-pkgname=box64-rpi-git
-pkgver=r1495.e6e9fae
+pkgname=box64-asahi-git
+pkgver=r2431.60c6858
 pkgrel=1
 pkgdesc="Linux Userspace x86_64 Emulator with a twist, targeted at ARM64 Linux devices."
 arch=('aarch64')
@@ -9,30 +9,28 @@ url="https://github.com/ptitSeb/box64"
 license=('MIT')
 optdepends=('gl4es: OpenGL 2 for GLES 2 devices')
 makedepends=('git' 'cmake' 'make')
-provides=("${pkgname%-git}" "${pkgname%-rpi-git}-git" "${pkgname%-rpi-git}")
-conflicts=("${pkgname%-git}" "${pkgname%-rpi-git}-git" "${pkgname%-rpi-git}")
+provides=("${pkgname%-git}" "${pkgname%-asahi-git}-git" "${pkgname%-asahi-git}")
+conflicts=("${pkgname%-git}" "${pkgname%-asahi-git}-git" "${pkgname%-asahi-git}")
 source=('git+https://github.com/ptitSeb/box64')
 md5sums=('SKIP')
 
 pkgver() {
-	cd "$srcdir/${pkgname%-rpi-git}"
+	cd "${srcdir}/${pkgname%-asahi-git}"
 	printf "r%s.%s" "$(git rev-list --count HEAD)" "$(git rev-parse --short HEAD)"
 }
 
 prepare() {
-	cd "${srcdir}/${pkgname%-rpi-git}"
-	if [[ ! -d ./build ]]; then
-		mkdir build && cd build
-		cmake .. -DRPI4ARM64=1 -DCMAKE_BUILD_TYPE=Debug -DCMAKE_INSTALL_PREFIX=/usr
-	fi
+	cd "${srcdir}/${pkgname%-asahi-git}"
+	[[ ! -d ./build ]] && mkdir build
+	cmake -B build -DM1=ON -DCMAKE_BUILD_TYPE=RelWithDebInfo -DCMAKE_INSTALL_PREFIX=/usr
 }
 
 build() {
-	cd "$srcdir/${pkgname%-rpi-git}/build"
+	cd "${srcdir}/${pkgname%-asahi-git}/build"
 	make -j$(nproc)
 }
 
 package() {
-	cd "$srcdir/${pkgname%-rpi-git}/build"
+	cd "${srcdir}/${pkgname%-asahi-git}/build"
 	make DESTDIR="${pkgdir}/" install
 }

pkgbuilds/PKGBUILD-lx2160a

@@ -1,7 +1,7 @@
 # Maintainer: Jai-JAP <[email protected]>
 # Author: Sebastien Chevalier <[email protected]>
 pkgname=box64-lx2160a-git
-pkgver=r1495.e6e9fae
+pkgver=r2431.60c6858
 pkgrel=1
 pkgdesc="Linux Userspace x86_64 Emulator with a twist, targeted at ARM64 Linux devices."
 arch=('aarch64')
@@ -15,24 +15,22 @@ source=('git+https://github.com/ptitSeb/box64')
 md5sums=('SKIP')
 
 pkgver() {
-	cd "$srcdir/${pkgname%-lx2160a-git}"
+	cd "${srcdir}/${pkgname%-lx2160a-git}"
 	printf "r%s.%s" "$(git rev-list --count HEAD)" "$(git rev-parse --short HEAD)"
 }
 
 prepare() {
 	cd "${srcdir}/${pkgname%-lx2160a-git}"
-	if [[ ! -d ./build ]]; then
-		mkdir build && cd build
-		cmake .. -DLX2160A=1 -DCMAKE_BUILD_TYPE=RelWithDebInfo -DCMAKE_INSTALL_PREFIX=/usr
-	fi
+	[[ ! -d ./build ]] && mkdir build
+	cmake -B build -DLX2160A=1 -DCMAKE_BUILD_TYPE=RelWithDebInfo -DCMAKE_INSTALL_PREFIX=/usr
 }
 
 build() {
-	cd "$srcdir/${pkgname%-lx2160a-git}/build"
+	cd "${srcdir}/${pkgname%-lx2160a-git}/build"
 	make -j$(nproc)
 }
 
 package() {
-	cd "$srcdir/${pkgname%-lx2160a-git}/build"
+	cd "${srcdir}/${pkgname%-lx2160a-git}/build"
 	make DESTDIR="${pkgdir}/" install
 }

pkgbuilds/PKGBUILD-lx2160a-DEBUG

@@ -1,38 +0,0 @@
-# Maintainer: Jai-JAP <[email protected]>
-# Author: Sebastien Chevalier <[email protected]>
-pkgname=box64-lx2160a-git
-pkgver=r1495.e6e9fae
-pkgrel=1
-pkgdesc="Linux Userspace x86_64 Emulator with a twist, targeted at ARM64 Linux devices."
-arch=('aarch64')
-url="https://github.com/ptitSeb/box64"
-license=('MIT')
-optdepends=('gl4es: OpenGL 2 for GLES 2 devices')
-makedepends=('git' 'cmake' 'make')
-provides=("${pkgname%-git}" "${pkgname%-lx2160a-git}-git" "${pkgname%-lx2160a-git}")
-conflicts=("${pkgname%-git}" "${pkgname%-lx2160a-git}-git" "${pkgname%-lx2160a-git}")
-source=('git+https://github.com/ptitSeb/box64')
-md5sums=('SKIP')
-
-pkgver() {
-	cd "$srcdir/${pkgname%-lx2160a-git}"
-	printf "r%s.%s" "$(git rev-list --count HEAD)" "$(git rev-parse --short HEAD)"
-}
-
-prepare() {
-	cd "${srcdir}/${pkgname%-lx2160a-git}"
-	if [[ ! -d ./build ]]; then
-		mkdir build && cd build
-		cmake .. -DLX2160A=1 -DCMAKE_BUILD_TYPE=Debug -DCMAKE_INSTALL_PREFIX=/usr
-	fi
-}
-
-build() {
-	cd "$srcdir/${pkgname%-lx2160a-git}/build"
-	make -j$(nproc)
-}
-
-package() {
-	cd "$srcdir/${pkgname%-lx2160a-git}/build"
-	make DESTDIR="${pkgdir}/" install
-}

pkgbuilds/PKGBUILD-odroid

@@ -1,7 +1,7 @@
 # Maintainer: Jai-JAP <[email protected]>
 # Author: Sebastien Chevalier <[email protected]>
-pkgname=box64-rpi-git
-pkgver=r1495.e6e9fae
+pkgname=box64-odroid-git
+pkgver=r2431.60c6858
 pkgrel=1
 pkgdesc="Linux Userspace x86_64 Emulator with a twist, targeted at ARM64 Linux devices."
 arch=('aarch64')
@@ -9,30 +9,28 @@ url="https://github.com/ptitSeb/box64"
 license=('MIT')
 optdepends=('gl4es: OpenGL 2 for GLES 2 devices')
 makedepends=('git' 'cmake' 'make')
-provides=("${pkgname%-git}" "${pkgname%-rpi-git}-git" "${pkgname%-rpi-git}")
-conflicts=("${pkgname%-git}" "${pkgname%-rpi-git}-git" "${pkgname%-rpi-git}")
+provides=("${pkgname%-git}" "${pkgname%-odroid-git}-git" "${pkgname%-odroid-git}")
+conflicts=("${pkgname%-git}" "${pkgname%-odroid-git}-git" "${pkgname%-odroid-git}")
 source=('git+https://github.com/ptitSeb/box64')
 md5sums=('SKIP')
 
 pkgver() {
-	cd "$srcdir/${pkgname%-rpi-git}"
+	cd "${srcdir}/${pkgname%-odroid-git}"
 	printf "r%s.%s" "$(git rev-list --count HEAD)" "$(git rev-parse --short HEAD)"
 }
 
 prepare() {
-	cd "${srcdir}/${pkgname%-rpi-git}"
-	if [[ ! -d ./build ]]; then
-		mkdir build && cd build
-		cmake .. -DRPI4ARM64=1 -DCMAKE_BUILD_TYPE=RelWithDebInfo -DCMAKE_INSTALL_PREFIX=/usr
-	fi
+	cd "${srcdir}/${pkgname%-odroid-git}"
+	[[ ! -d ./build ]] && mkdir build
+	cmake -B build -DODROIDN2=ON -DCMAKE_BUILD_TYPE=RelWithDebInfo -DCMAKE_INSTALL_PREFIX=/usr
 }
 
 build() {
-	cd "$srcdir/${pkgname%-rpi-git}/build"
+	cd "${srcdir}/${pkgname%-odroid-git}/build"
 	make -j$(nproc)
 }
 
 package() {
-	cd "$srcdir/${pkgname%-rpi-git}/build"
+	cd "${srcdir}/${pkgname%-odroid-git}/build"
 	make DESTDIR="${pkgdir}/" install
 }

pkgbuilds/PKGBUILD-phytium

@@ -1,7 +1,7 @@
 # Maintainer: Jai-JAP <[email protected]>
 # Author: Sebastien Chevalier <[email protected]>
-pkgname=box64-arm64-git
-pkgver=r1495.e6e9fae
+pkgname=box64-phytium-git
+pkgver=r2431.60c6858
 pkgrel=1
 pkgdesc="Linux Userspace x86_64 Emulator with a twist, targeted at ARM64 Linux devices."
 arch=('aarch64')
@@ -9,30 +9,28 @@ url="https://github.com/ptitSeb/box64"
 license=('MIT')
 optdepends=('gl4es: OpenGL 2 for GLES 2 devices')
 makedepends=('git' 'cmake' 'make')
-provides=("${pkgname%-git}" "${pkgname%-arm64-git}-git" "${pkgname%-arm64-git}")
-conflicts=("${pkgname%-git}" "${pkgname%-arm64-git}-git" "${pkgname%-arm64-git}")
+provides=("${pkgname%-git}" "${pkgname%-phytium-git}-git" "${pkgname%-phytium-git}")
+conflicts=("${pkgname%-git}" "${pkgname%-phytium-git}-git" "${pkgname%-phytium-git}")
 source=('git+https://github.com/ptitSeb/box64')
 md5sums=('SKIP')
 
 pkgver() {
-	cd "$srcdir/${pkgname%-arm64-git}"
+	cd "${srcdir}/${pkgname%-phytium-git}"
 	printf "r%s.%s" "$(git rev-list --count HEAD)" "$(git rev-parse --short HEAD)"
 }
 
 prepare() {
-	cd "${srcdir}/${pkgname%-arm64-git}"
-	if [[ ! -d ./build ]]; then
-		mkdir build && cd build
-		cmake .. -DARM_DYNAREC=ON -DCMAKE_BUILD_TYPE=Debug -DCMAKE_INSTALL_PREFIX=/usr
-	fi
+	cd "${srcdir}/${pkgname%-phytium-git}"
+	[[ ! -d ./build ]] && mkdir build
+	cmake -B build -DPHYTIUM=ON -DCMAKE_BUILD_TYPE=RelWithDebInfo -DCMAKE_INSTALL_PREFIX=/usr
 }
 
 build() {
-	cd "$srcdir/${pkgname%-arm64-git}/build"
+	cd "${srcdir}/${pkgname%-phytium-git}/build"
 	make -j$(nproc)
 }
 
 package() {
-	cd "$srcdir/${pkgname%-arm64-git}/build"
+	cd "${srcdir}/${pkgname%-phytium-git}/build"
 	make DESTDIR="${pkgdir}/" install
 }

pkgbuilds/PKGBUILD-raspberrypi

@@ -0,0 +1,49 @@
+# Maintainer: Jai-JAP <[email protected]>
+# Author: Sebastien Chevalier <[email protected]>
+pkgname=box64-rpi-git
+pkgver=r2431.60c6858
+pkgrel=1
+pkgdesc="Linux Userspace x86_64 Emulator with a twist, targeted at ARM64 Linux devices."
+arch=('aarch64')
+url="https://github.com/ptitSeb/box64"
+license=('MIT')
+optdepends=('gl4es: OpenGL 2 for GLES 2 devices')
+makedepends=('git' 'cmake' 'make')
+provides=("${pkgname%-git}" "${pkgname%-rpi-git}-git" "${pkgname%-rpi-git}")
+conflicts=("${pkgname%-git}" "${pkgname%-rpi-git}-git" "${pkgname%-rpi-git}")
+source=('git+https://github.com/ptitSeb/box64')
+md5sums=('SKIP')
+_pimodel=`tr -d '\0' < /sys/firmware/devicetree/base/model`
+
+pkgver() {
+	cd "${srcdir}/${pkgname%-rpi-git}"
+	printf "r%s.%s" "$(git rev-list --count HEAD)" "$(git rev-parse --short HEAD)"
+}
+
+prepare() {
+	cd "${srcdir}/${pkgname%-rpi-git}"
+	# Check for Pi version number
+	if [[ ${_pimodel} =~ "Raspberry Pi 4" ]]; then
+		_piversion=4
+	elif [[ ${_pimodel} =~ "Raspberry Pi 3" ]]; then
+		_piversion=3	
+	else
+		# This RPI is not supported or this device is not a pi.
+		# We should cancel then the build.
+		echo -e "\033[01m\033[01;31m==> ERROR:\033[00;01m Your device is not supported! This script is for RPi model 4/3 (2/1/0 isn't supported).\033[00m"
+		exit 1
+	fi
+	echo -e "\033[01m\033[01;34m==> INFO:\033[00;01m Your detected Pi verion number is: \033[01;31m${_piversion}\033[01m.\033[00m"
+	[[ ! -d ./build ]] && mkdir build
+	cmake -B build -DRPI${_piversion}ARM64=1 -DCMAKE_BUILD_TYPE=RelWithDebInfo -DCMAKE_INSTALL_PREFIX=/usr
+}
+
+build() {
+	cd "${srcdir}/${pkgname%-rpi-git}/build"
+	make -j$(nproc)
+}
+
+package() {
+	cd "${srcdir}/${pkgname%-rpi-git}/build"
+	make DESTDIR="${pkgdir}/" install
+}

pkgbuilds/PKGBUILD-rk3399

@@ -1,38 +0,0 @@
-# Maintainer: Jai-JAP <[email protected]>
-# Author: Sebastien Chevalier <[email protected]>
-pkgname=box86-rk3399-git
-pkgver=r1495.e6e9fae
-pkgrel=1
-pkgdesc="Linux Userspace x86_64 Emulator with a twist, targeted at ARM64 Linux devices."
-arch=('aarch64')
-url="https://github.com/ptitSeb/box64"
-license=('MIT')
-optdepends=('gl4es: OpenGL 2 for GLES 2 devices')
-makedepends=('git' 'cmake' 'make')
-provides=("${pkgname%-git}" "${pkgname%-rk3399-git}-git" "${pkgname%-rk3399-git}")
-conflicts=("${pkgname%-git}" "${pkgname%-rk3399-git}-git" "${pkgname%-rk3399-git}")
-source=('git+https://github.com/ptitSeb/box64')
-md5sums=('SKIP')
-
-pkgver() {
-	cd "$srcdir/${pkgname%-rk3399-git}"
-	printf "r%s.%s" "$(git rev-list --count HEAD)" "$(git rev-parse --short HEAD)"
-}
-
-prepare() {
-	cd "${srcdir}/${pkgname%-rk3399-git}"
-	if [[ ! -d ./build ]]; then
-		mkdir build && cd build
-                cmake .. -DRK3399=1 -DCMAKE_BUILD_TYPE=RelWithDebInfo -DCMAKE_INSTALL_PREFIX=/usr
-	fi
-}
-
-build() {
-	cd "$srcdir/${pkgname%-rk3399-git}/build"
-	make -j$(nproc)
-}
-
-package() {
-	cd "$srcdir/${pkgname%-rk3399-git}/build"
-	make DESTDIR="${pkgdir}/" install
-}

pkgbuilds/PKGBUILD-rk3xxx

@@ -0,0 +1,51 @@
+# Maintainer: Jai-JAP <[email protected]>
+# Author: Sebastien Chevalier <[email protected]>
+pkgname=box86-rk3xxx-git
+pkgver=r2431.60c6858
+pkgrel=1
+pkgdesc="Linux Userspace x86_64 Emulator with a twist, targeted at ARM64 Linux devices."
+arch=('aarch64')
+url="https://github.com/ptitSeb/box64"
+license=('MIT')
+optdepends=('gl4es: OpenGL 2 for GLES 2 devices')
+makedepends=('git' 'cmake' 'make')
+provides=("${pkgname%-git}" "${pkgname%-rk3xxx-git}-git" "${pkgname%-rk3xxx-git}")
+conflicts=("${pkgname%-git}" "${pkgname%-rk3xxx-git}-git" "${pkgname%-rk3xxx-git}")
+source=('git+https://github.com/ptitSeb/box64')
+md5sums=('SKIP')
+_rkmodel=`tr -d '\0' < /proc/device-tree/compatible`
+
+pkgver() {
+	cd "${srcdir}/${pkgname%-rk3xxx-git}"
+	printf "r%s.%s" "$(git rev-list --count HEAD)" "$(git rev-parse --short HEAD)"
+}
+
+prepare() {
+	cd "${srcdir}/${pkgname%-rk3xxx-git}"
+	# Check for RockChip version number
+	if [[ ${_rkmodel} =~ "rk3326" ]]; then
+		_rksuffix=3326
+	elif [[ ${_rkmodel} =~ "rk3399" ]]; then
+		_rksuffix=3399	
+	elif [[ ${_rkmodel} =~ "rk3588" ]]; then
+		_rksuffix=3588	
+	else
+		# This RKxxxx is not supported or this device is not RockChip based.
+		# We should cancel then the build.
+		echo -e "\033[01m\033[01;31m==> ERROR:\033[00;01m Your device is not supported! This script is for RockChip model 3326/3399/3588.\033[00m"
+		exit 1
+	fi
+	echo -e "\033[01m\033[01;34m==> INFO:\033[00;01m Your detected RockChip verion number is: \033[01;31m${_rksuffix}\033[01m.\033[00m"
+	[[ ! -d ./build ]] && mkdir build
+    cmake -B build -DRK${_rksuffix}=1 -DCMAKE_BUILD_TYPE=RelWithDebInfo -DCMAKE_INSTALL_PREFIX=/usr
+}
+
+build() {
+	cd "${srcdir}/${pkgname%-rk3xxx-git}/build"
+	make -j$(nproc)
+}
+
+package() {
+	cd "${srcdir}/${pkgname%-rk3xxx-git}/build"
+	make DESTDIR="${pkgdir}/" install
+}

pkgbuilds/PKGBUILD-rv64

@@ -1,38 +1,36 @@
 # Maintainer: Jai-JAP <[email protected]>
 # Author: Sebastien Chevalier <[email protected]>
-pkgname=box64-tegra-git
-pkgver=r1495.e6e9fae
+pkgname=box64-rv64-git
+pkgver=r2431.60c6858
 pkgrel=1
 pkgdesc="Linux Userspace x86_64 Emulator with a twist, targeted at ARM64 Linux devices."
-arch=('aarch64')
+arch=('riscv64')
 url="https://github.com/ptitSeb/box64"
 license=('MIT')
 optdepends=('gl4es: OpenGL 2 for GLES 2 devices')
 makedepends=('git' 'cmake' 'make')
-provides=("${pkgname%-git}" "${pkgname%-tegra-git}-git" "${pkgname%-tegra-git}")
-conflicts=("${pkgname%-git}" "${pkgname%-tegra-git}-git" "${pkgname%-tegra-git}")
+provides=("${pkgname%-git}" "${pkgname%-rv64-git}-git" "${pkgname%-rv64-git}")
+conflicts=("${pkgname%-git}" "${pkgname%-rv64-git}-git" "${pkgname%-rv64-git}")
 source=('git+https://github.com/ptitSeb/box64')
 md5sums=('SKIP')
 
 pkgver() {
-	cd "$srcdir/${pkgname%-tegra-git}"
+	cd "${srcdir}/${pkgname%-rv64-git}"
 	printf "r%s.%s" "$(git rev-list --count HEAD)" "$(git rev-parse --short HEAD)"
 }
 
 prepare() {
-	cd "${srcdir}/${pkgname%-tegra-git}"
-	if [[ ! -d ./build ]]; then
-		mkdir build && cd build
-		cmake .. -DTEGRAX1=1 -DCMAKE_BUILD_TYPE=Debug -DCMAKE_INSTALL_PREFIX=/usr
-	fi
+	cd "${srcdir}/${pkgname%-rv64-git}"
+	[[ ! -d ./build ]] && mkdir build
+	cmake -B build -DRV64=ON -DCMAKE_BUILD_TYPE=RelWithDebInfo -DCMAKE_INSTALL_PREFIX=/usr
 }
 
 build() {
-	cd "$srcdir/${pkgname%-tegra-git}/build"
+	cd "${srcdir}/${pkgname%-rv64-git}/build"
 	make -j$(nproc)
 }
 
 package() {
-	cd "$srcdir/${pkgname%-tegra-git}/build"
+	cd "${srcdir}/${pkgname%-rv64-git}/build"
 	make DESTDIR="${pkgdir}/" install
 }

pkgbuilds/PKGBUILD-sd845

@@ -1,7 +1,7 @@
 # Maintainer: Jai-JAP <[email protected]>
 # Author: Sebastien Chevalier <[email protected]>
-pkgname=box86-rk3399-git
-pkgver=r1495.e6e9fae
+pkgname=box64-sd845-git
+pkgver=r2431.60c6858
 pkgrel=1
 pkgdesc="Linux Userspace x86_64 Emulator with a twist, targeted at ARM64 Linux devices."
 arch=('aarch64')
@@ -9,30 +9,28 @@ url="https://github.com/ptitSeb/box64"
 license=('MIT')
 optdepends=('gl4es: OpenGL 2 for GLES 2 devices')
 makedepends=('git' 'cmake' 'make')
-provides=("${pkgname%-git}" "${pkgname%-rk3399-git}-git" "${pkgname%-rk3399-git}")
-conflicts=("${pkgname%-git}" "${pkgname%-rk3399-git}-git" "${pkgname%-rk3399-git}")
+provides=("${pkgname%-git}" "${pkgname%-sd845-git}-git" "${pkgname%-sd845-git}")
+conflicts=("${pkgname%-git}" "${pkgname%-sd845-git}-git" "${pkgname%-sd845-git}")
 source=('git+https://github.com/ptitSeb/box64')
 md5sums=('SKIP')
 
 pkgver() {
-	cd "$srcdir/${pkgname%-rk3399-git}"
+	cd "${srcdir}/${pkgname%-sd845-git}"
 	printf "r%s.%s" "$(git rev-list --count HEAD)" "$(git rev-parse --short HEAD)"
 }
 
 prepare() {
-	cd "${srcdir}/${pkgname%-rk3399-git}"
-	if [[ ! -d ./build ]]; then
-		mkdir build && cd build
-                cmake .. -DRK3399=1 -DCMAKE_BUILD_TYPE=Debug -DCMAKE_INSTALL_PREFIX=/usr
-	fi
+	cd "${srcdir}/${pkgname%-sd845-git}"
+	[[ ! -d ./build ]] && mkdir build
+	cmake -B build -DSD845=ON -DCMAKE_BUILD_TYPE=RelWithDebInfo -DCMAKE_INSTALL_PREFIX=/usr
 }
 
 build() {
-	cd "$srcdir/${pkgname%-rk3399-git}/build"
+	cd "${srcdir}/${pkgname%-sd845-git}/build"
 	make -j$(nproc)
 }
 
 package() {
-	cd "$srcdir/${pkgname%-rk3399-git}/build"
+	cd "${srcdir}/${pkgname%-sd845-git}/build"
 	make DESTDIR="${pkgdir}/" install
 }

pkgbuilds/PKGBUILD-tegra

@@ -1,7 +1,7 @@
 # Maintainer: Jai-JAP <[email protected]>
 # Author: Sebastien Chevalier <[email protected]>
 pkgname=box64-tegra-git
-pkgver=r1495.e6e9fae
+pkgver=r2431.60c6858
 pkgrel=1
 pkgdesc="Linux Userspace x86_64 Emulator with a twist, targeted at ARM64 Linux devices."
 arch=('aarch64')
@@ -15,24 +15,22 @@ source=('git+https://github.com/ptitSeb/box64')
 md5sums=('SKIP')
 
 pkgver() {
-	cd "$srcdir/${pkgname%-tegra-git}"
+	cd "${srcdir}/${pkgname%-tegra-git}"
 	printf "r%s.%s" "$(git rev-list --count HEAD)" "$(git rev-parse --short HEAD)"
 }
 
 prepare() {
 	cd "${srcdir}/${pkgname%-tegra-git}"
-	if [[ ! -d ./build ]]; then
-		mkdir build && cd build
-		cmake .. -DTEGRAX1=1 -DCMAKE_BUILD_TYPE=RelWithDebInfo -DCMAKE_INSTALL_PREFIX=/usr
-	fi
+	[[ ! -d ./build ]] && mkdir build
+	cmake -B build -DTEGRAX1=1 -DCMAKE_BUILD_TYPE=RelWithDebInfo -DCMAKE_INSTALL_PREFIX=/usr
 }
 
 build() {
-	cd "$srcdir/${pkgname%-tegra-git}/build"
+	cd "${srcdir}/${pkgname%-tegra-git}/build"
 	make -j$(nproc)
 }
 
 package() {
-	cd "$srcdir/${pkgname%-tegra-git}/build"
+	cd "${srcdir}/${pkgname%-tegra-git}/build"
 	make DESTDIR="${pkgdir}/" install
 }

pkgbuilds/PKGBUILD-x86_64

@@ -1,10 +1,10 @@
 # Maintainer: Jai-JAP <[email protected]>
 # Author: Sebastien Chevalier <[email protected]>
 pkgname=box64-x64-git
-pkgver=r1495.e6e9fae
+pkgver=r2431.60c6858
 pkgrel=1
 pkgdesc="Linux Userspace x86_64 Emulator with a twist, targeted at ARM64 Linux devices."
-arch=('aarch64')
+arch=('x86_64')
 url="https://github.com/ptitSeb/box64"
 license=('MIT')
 makedepends=('git' 'cmake' 'make')
@@ -14,24 +14,22 @@ source=('git+https://github.com/ptitSeb/box64')
 md5sums=('SKIP')
 
 pkgver() {
-	cd "$srcdir/${pkgname%-x64-git}"
+	cd "${srcdir}/${pkgname%-x64-git}"
 	printf "r%s.%s" "$(git rev-list --count HEAD)" "$(git rev-parse --short HEAD)"
 }
 
 prepare() {
 	cd "${srcdir}/${pkgname%-x64-git}"
-	if [[ ! -d ./build ]]; then
-		mkdir build && cd build
-		cmake .. -DLD80BITS=1 -DNOALIGN=1 -DCMAKE_BUILD_TYPE=RelWithDebInfo -DCMAKE_INSTALL_PREFIX=/usr
-	fi
+	[[ ! -d ./build ]] && mkdir build
+	cmake -B build -DLD80BITS=1 -DNOALIGN=1 -DCMAKE_BUILD_TYPE=RelWithDebInfo -DCMAKE_INSTALL_PREFIX=/usr
 }
 
 build() {
-	cd "$srcdir/${pkgname%-x64-git}/build"
+	cd "${srcdir}/${pkgname%-x64-git}/build"
 	make -j$(nproc)
 }
 
 package() {
-	cd "$srcdir/${pkgname%-x64-git}/build"
+	cd "${srcdir}/${pkgname%-x64-git}/build"
 	make DESTDIR="${pkgdir}/" install
 }

pkgbuilds/PKGBUILD-x86_64-DEBUG

@@ -1,37 +0,0 @@
-# Maintainer: Jai-JAP <[email protected]>
-# Author: Sebastien Chevalier <[email protected]>
-pkgname=box64-x64-git
-pkgver=r1495.e6e9fae
-pkgrel=1
-pkgdesc="Linux Userspace x86_64 Emulator with a twist, targeted at ARM64 Linux devices."
-arch=('aarch64')
-url="https://github.com/ptitSeb/box64"
-license=('MIT')
-makedepends=('git' 'cmake' 'make')
-provides=("${pkgname%-git}" "${pkgname%-x64-git}-git" "${pkgname%-x64-git}")
-conflicts=("${pkgname%-git}" "${pkgname%-x64-git}-git" "${pkgname%-x64-git}")
-source=('git+https://github.com/ptitSeb/box64')
-md5sums=('SKIP')
-
-pkgver() {
-	cd "$srcdir/${pkgname%-x64-git}"
-	printf "r%s.%s" "$(git rev-list --count HEAD)" "$(git rev-parse --short HEAD)"
-}
-
-prepare() {
-	cd "${srcdir}/${pkgname%-x64-git}"
-	if [[ ! -d ./build ]]; then
-		mkdir build && cd build
-		cmake .. -DLD80BITS=1 -DNOALIGN=1 -DCMAKE_BUILD_TYPE=Debug -DCMAKE_INSTALL_PREFIX=/usr
-	fi
-}
-
-build() {
-	cd "$srcdir/${pkgname%-x64-git}/build"
-	make -j$(nproc)
-}
-
-package() {
-	cd "$srcdir/${pkgname%-x64-git}/build"
-	make DESTDIR="${pkgdir}/" install
-}

pkgbuilds/README.md

@@ -4,6 +4,8 @@
 Just download the `PKGBUILD-<your-platform>` (no need to download the whole repository), go to directory where you downloaded and type:
 ```sh
 mv ./PKGBUILD-<your-platform> ./PKGBUILD
+# use the below line if you need a DEBUG build
+# sed -i 's/RelWithDebInfo/Debug/g' ./PKGBUILD
 cd ..
 makepkg -si
 ```
@@ -12,7 +14,7 @@ This will copy the PKGBUILD for your platform (where you type your platform name
 In the future, I might try to do an unified PKGBUILD for all platforms that will recognize your platform automatically.
 
 ### 2. What platforms are currently supported.
-All specified in [COMPILE.md](../docs/COMPILE.md).
+All specified in [COMPILE.md](../docs/COMPILE.md) except for LARCH64, PPC64LE and SW64.
 
 ### 3. Any advantages with this solution?
 This might give you some advantages like:

rebuild_wrappers.py

@@ -152,10 +152,10 @@ class FunctionConvention(object):
 		self.values = valid_chars
 # Free letters:  B   FG  J      QR T   XYZab  e gh jk mno qrst   xyz
 conventions = {
-	'F': FunctionConvention('F', "System V", ['E', 'v', 'c', 'w', 'i', 'I', 'C', 'W', 'u', 'U', 'f', 'd', 'D', 'K', 'l', 'L', 'p', 'V', 'O', 'S', 'N', 'M', 'H', 'P', 'A']),
+	'F': FunctionConvention('F', "System V", ['E', 'v', 'c', 'w', 'i', 'I', 'C', 'W', 'u', 'U', 'f', 'd', 'D', 'K', 'l', 'L', 'p', 'V', 'O', 'S', 'N', 'M', 'H', 'P', 'A', 'x', 'X']),
 	'W': FunctionConvention('W', "Windows",  ['E', 'v', 'c', 'w', 'i', 'I', 'C', 'W', 'u', 'U', 'f', 'd',      'K', 'l', 'L', 'p', 'V', 'O', 'S', 'N', 'M',      'P', 'A'])
 }
-sortedvalues = ['E', 'v', 'c', 'w', 'i', 'I', 'C', 'W', 'u', 'U', 'f', 'd', 'D', 'K', 'l', 'L', 'p', 'V', 'O', 'S', 'N', 'M', 'H', 'P', 'A', '0', '1']
+sortedvalues = ['E', 'v', 'c', 'w', 'i', 'I', 'C', 'W', 'u', 'U', 'f', 'd', 'D', 'K', 'l', 'L', 'p', 'V', 'O', 'S', 'N', 'M', 'H', 'P', 'A', 'x', 'X', '0', '1']
 assert(all(all(c not in conv.values[:i] and c in sortedvalues for i, c in enumerate(conv.values)) for conv in conventions.values()))
 
 class FunctionType(str):
@@ -384,7 +384,7 @@ def readFiles(files: Iterable[Filename]) -> Tuple[JumbledGlobals, JumbledRedirec
 						# If you find no problem, comment the error below, add a "pass" line (so python is happy)
 						# and open a ticket so I can fix this.
 						raise NotImplementedError("Some functions are only implemented under one condition (probably) ({0}:{1})"
-							.format(k, filename) + " [extra note in the script]")
+							.format(k, filename) + " [extra note in the script]\nProblematic function{}: {}".format(("" if len(funsname[k]) == 1 else "s"), funsname[k]))
 					for f in funsname[k]:
 						if f in ['_fini', '_init', '__bss_start', '__data_start', '_edata', '_end']:
 							continue # Always allow those symbols [TODO: check if OK]
@@ -402,6 +402,7 @@ def readFiles(files: Iterable[Filename]) -> Tuple[JumbledGlobals, JumbledRedirec
 							 or match("libGL", "libEGL") \
 							 or match("libc", "tcmallocminimal") \
 							 or match("libc", "tbbmallocproxy") \
+							 or match("libc", "androidshmem") \
 							 or match("tcmallocminimal", "tbbmallocproxy"):
 								continue
 							
@@ -824,13 +825,18 @@ def main(root: str, files: Iterable[Filename], ver: str):
 	allowed_regs  : str = "cCwWiuIUlLp"
 	allowed_fpr   : str = "fd"
 	
+	# Detect functions which return in an x87 register
+	retx87_wraps: Dict[ClausesStr, List[FunctionType]] = {}
+	return_x87: str = "DK"
+	
 	# Sanity checks
-	forbidden_simple: str = "EDKVOSNMHPA"
+	forbidden_simple: str = "EDKVOSNMHPAxX"
 	assert(len(allowed_simply) + len(allowed_regs) + len(allowed_fpr) + len(forbidden_simple) == len(allowed_conv.values))
 	assert(all(c not in allowed_regs for c in allowed_simply))
 	assert(all(c not in allowed_simply + allowed_regs for c in allowed_fpr))
 	assert(all(c not in allowed_simply + allowed_regs + allowed_fpr for c in forbidden_simple))
 	assert(all(c in allowed_simply + allowed_regs + allowed_fpr + forbidden_simple for c in allowed_conv.values))
+	assert(all(c in allowed_conv.values for c in return_x87))
 	
 	def check_simple(v: FunctionType) -> Optional[int]:
 		regs_count: int = 0
@@ -867,6 +873,15 @@ def main(root: str, files: Iterable[Filename], ver: str):
 			simple_wraps[k] = tmp
 	simple_idxs = sorted(simple_wraps.keys(), key=lambda x: Clauses(x).splitdef())
 	
+	def check_return_x87(v: FunctionType) -> bool:
+		return v[0] in return_x87
+    
+	for k in gbls:
+		tmp = [v for v in gbls[k] if check_return_x87(v)]
+		if tmp:
+			retx87_wraps[k] = tmp
+	retx87_idxs = sorted(retx87_wraps.keys(), key=lambda x: Clauses(x).splitdef())
+	
 	# Now the files rebuilding part
 	# File headers and guards
 	files_header = {
@@ -880,6 +895,8 @@ def main(root: str, files: Iterable[Filename], ver: str):
 		#include "emu/x87emu_private.h"
 		#include "regs.h"
 		#include "x64emu.h"
+		#define COMPLEX_IMPL
+		#include "complext.h"
 		
 		extern void* my__IO_2_1_stdin_ ;
 		extern void* my__IO_2_1_stdout_;
@@ -908,12 +925,14 @@ def main(root: str, files: Iterable[Filename], ver: str):
 		#define __WRAPPER_H_
 		#include <stdint.h>
 		#include <string.h>
+		#include "complext.h"
 		
 		typedef struct x64emu_s x64emu_t;
 		
 		// the generic wrapper pointer functions
 		typedef void (*wrapper_t)(x64emu_t* emu, uintptr_t fnc);
-		
+
+	
 		// list of defined wrapper
 		// E = current x86emu struct
 		// v = void
@@ -933,6 +952,8 @@ def main(root: str, files: Iterable[Filename], ver: str):
 		// M = ... automatically sending 2 args
 		// A = va_list
 		// 0 = constant 0, 1 = constant 1
+		// x = float complex
+		// X = double complex
 		
 		""",
 		"fntypes.h": """
@@ -994,10 +1015,10 @@ def main(root: str, files: Iterable[Filename], ver: str):
 	# Rewrite the wrapper.c file:
 	# i and u should only be 32 bits
 	td_types = {
-		#      E            v       c         w          i          I          C          W           u           U           f        d         D              K         l           L            p        V        O          S        N      M      H                    P        A
-		'F': ["x64emu_t*", "void", "int8_t", "int16_t", "int64_t", "int64_t", "uint8_t", "uint16_t", "uint64_t", "uint64_t", "float", "double", "long double", "double", "intptr_t", "uintptr_t", "void*", "void*", "int32_t", "void*", "...", "...", "unsigned __int128", "void*", "void*"],
+		#      E            v       c         w          i          I          C          W           u           U           f        d         D              K         l           L            p        V        O          S        N      M      H                    P        A			x				X
+		'F': ["x64emu_t*", "void", "int8_t", "int16_t", "int32_t", "int64_t", "uint8_t", "uint16_t", "uint32_t", "uint64_t", "float", "double", "long double", "double", "intptr_t", "uintptr_t", "void*", "void*", "int32_t", "void*", "...", "...", "unsigned __int128", "void*", "void*", "complexf_t", "complex_t"],
 		#      E            v       c         w          i          I          C          W           u           U           f        d         K         l           L            p        V        O          S        N      M      P        A
-		'W': ["x64emu_t*", "void", "int8_t", "int16_t", "int64_t", "int64_t", "uint8_t", "uint16_t", "uint64_t", "uint64_t", "float", "double", "double", "intptr_t", "uintptr_t", "void*", "void*", "int32_t", "void*", "...", "...", "void*", "void*"]
+		'W': ["x64emu_t*", "void", "int8_t", "int16_t", "int32_t", "int64_t", "uint8_t", "uint16_t", "uint32_t", "uint64_t", "float", "double", "double", "intptr_t", "uintptr_t", "void*", "void*", "int32_t", "void*", "...", "...", "void*", "void*"]
 	}
 	assert(all(k in conventions for k in td_types))
 	for k in conventions:
@@ -1032,11 +1053,11 @@ def main(root: str, files: Iterable[Filename], ver: str):
 				"fn({0});",                                                # v
 				"R_RAX=fn({0});",                                          # c
 				"R_RAX=fn({0});",                                          # w
-				"R_RAX=(int64_t)fn({0});",                                 # i  should be int32_t
+				"R_RAX=(int32_t)fn({0});",                                 # i
 				"R_RAX=(int64_t)fn({0});",                                 # I
 				"R_RAX=(unsigned char)fn({0});",                           # C
 				"R_RAX=(unsigned short)fn({0});",                          # W
-				"R_RAX=(uint64_t)fn({0});",                                # u  should be uint32_t
+				"R_RAX=(uint32_t)fn({0});",                                # u
 				"R_RAX=fn({0});",                                          # U
 				"emu->xmm[0].f[0]=fn({0});",                               # f
 				"emu->xmm[0].d[0]=fn({0});",                               # d
@@ -1053,17 +1074,19 @@ def main(root: str, files: Iterable[Filename], ver: str):
 				"unsigned __int128 u128 = fn({0}); R_RAX=(u128&0xFFFFFFFFFFFFFFFFL); R_RDX=(u128>>64)&0xFFFFFFFFFFFFFFFFL;", # H
 				"\n#error Invalid return type: pointer in the stack\n",    # P
 				"\n#error Invalid return type: va_list\n",                 # A
+				'from_complexf(emu, fn({0})));', 	                          # x
+				'from_complex(emu, fn({0})));'                             # X
 			],
 			conventions['W']: [
 				"\n#error Invalid return type: emulator\n",                # E
 				"fn({0});",                                                # v
 				"R_RAX=fn({0});",                                          # c
 				"R_RAX=fn({0});",                                          # w
-				"R_RAX=(int64_t)fn({0});",                                 # i  should be int32_t
+				"R_RAX=(int32_t)fn({0});",                                 # i
 				"R_RAX=(int64_t)fn({0});",                                 # I
 				"R_RAX=(unsigned char)fn({0});",                           # C
 				"R_RAX=(unsigned short)fn({0});",                          # W
-				"R_RAX=(uint64_t)fn({0});",                                # u  should be uint32_t
+				"R_RAX=(uint32_t)fn({0});",                                # u
 				"R_RAX=fn({0});",                                          # U
 				"emu->xmm[0].f[0]=fn({0});",                               # f
 				"emu->xmm[0].d[0]=fn({0});",                               # d
@@ -1082,27 +1105,27 @@ def main(root: str, files: Iterable[Filename], ver: str):
 		}
 		
 		# vreg: value is in a general register
-		#         E  v  c  w  i  I  C  W  u  U  f  d  D  K  l  L  p  V  O  S  N  M  H  P  A
-		vreg   = [0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 0, 1, 1, 1, 2, 2, 0, 1]
+		#         E  v  c  w  i  I  C  W  u  U  f  d  D  K  l  L  p  V  O  S  N  M  H  P  A  x  X
+		vreg   = [0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 0, 1, 1, 1, 2, 2, 0, 1, 0, 0]
 		# vxmm: value is in a XMM register
-		#         E  v  c  w  i  I  C  W  u  U  f  d  D  K  l  L  p  V  O  S  N  M  H  P  A
-		vxmm   = [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0]
+		#         E  v  c  w  i  I  C  W  u  U  f  d  D  K  l  L  p  V  O  S  N  M  H  P  A  x  X
+		vxmm   = [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 2]
 		# vother: value is elsewere
-		#         E  v  c  w  i  I  C  W  u  U  f  d  D  K  l  L  p  V  O  S  N  M  H  P  A
-		vother = [1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0]
+		#         E  v  c  w  i  I  C  W  u  U  f  d  D  K  l  L  p  V  O  S  N  M  H  P  A  x  X
+		vother = [1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0]
 		# vstack: value is on the stack (or out of register)
-		#         E  v  c  w  i  I  C  W  u  U  f  d  D  K  l  L  p  V  O  S  N  M  H  P  A
-		vstack = [0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 1, 1, 1, 0, 1, 1, 1, 2, 2, 1, 1]
+		#         E  v  c  w  i  I  C  W  u  U  f  d  D  K  l  L  p  V  O  S  N  M  H  P  A  x  X
+		vstack = [0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 1, 1, 1, 0, 1, 1, 1, 2, 2, 1, 1, 1, 2]
 		arg_r = [
 			"",                            # E
 			"",                            # v
 			"(int8_t){p}, ",               # c
 			"(int16_t){p}, ",              # w
-			"(int64_t){p}, ",              # i  should int32_t
+			"(int32_t){p}, ",              # i
 			"(int64_t){p}, ",              # I
 			"(uint8_t){p}, ",              # C
 			"(uint16_t){p}, ",             # W
-			"(uint64_t){p}, ",             # u  should uint32_t
+			"(uint32_t){p}, ",             # u
 			"(uint64_t){p}, ",             # U
 			"",                            # f
 			"",                            # d
@@ -1119,6 +1142,8 @@ def main(root: str, files: Iterable[Filename], ver: str):
 			"\n#error Use pp instead\n",   # H
 			"",                            # P
 			"(void*){p}, ",                # A
+			"",	                           # x
+			"",                            # X
 		]
 		arg_x = [
 			"",                      # E
@@ -1146,6 +1171,8 @@ def main(root: str, files: Iterable[Filename], ver: str):
 			"",                      # H
 			"",                      # P
 			"",                      # A
+			"to_complexf(emu, {p}),",# x
+			"to_complex(emu, {p}),"  # X
 		]
 		arg_o = [
 			"emu, ",                   # E
@@ -1173,17 +1200,19 @@ def main(root: str, files: Iterable[Filename], ver: str):
 			"",                        # H
 			"",                        # P
 			"",                        # A
+			"",                        # x
+			"",                        # X
 		]
 		arg_s = [
 			"",                                         # E
 			"",                                         # v
 			"*(int8_t*)(R_RSP + {p}), ",                # c
 			"*(int16_t*)(R_RSP + {p}), ",               # w
-			"*(int64_t*)(R_RSP + {p}), ",               # i  should be int32_t
+			"*(int32_t*)(R_RSP + {p}), ",               # i
 			"*(int64_t*)(R_RSP + {p}), ",               # I
 			"*(uint8_t*)(R_RSP + {p}), ",               # C
 			"*(uint16_t*)(R_RSP + {p}), ",              # W
-			"*(uint64_t*)(R_RSP + {p}), ",              # u  should be uint32_t
+			"*(uint32_t*)(R_RSP + {p}), ",              # u
 			"*(uint64_t*)(R_RSP + {p}), ",              # U
 			"*(float*)(R_RSP + {p}), ",                 # f
 			"*(double*)(R_RSP + {p}), ",                # d
@@ -1200,6 +1229,8 @@ def main(root: str, files: Iterable[Filename], ver: str):
 			"*(unsigned __int128)(R_RSP + {p}), ",      # H
 			"*(void**)(R_RSP + {p}), ",                 # P
 			"*(void**)(R_RSP + {p}), ",                 # A
+			"*(complexf_t*)(R_RSP + {p}), ",            # x
+			"*(complex_t*)(R_RSP + {p}), ",             # X
 		]
 		
 		# Asserts
@@ -1365,6 +1396,17 @@ def main(root: str, files: Iterable[Filename], ver: str):
 				file.write("#endif\n")
 		file.write("\treturn 0;\n}\n")
 		
+		# Write the isRetX87Wrapper function
+		file.write("\nint isRetX87Wrapper(wrapper_t fun) {\n")
+		for k in retx87_idxs:
+			if k != str(Clauses()):
+				file.write("#if " + k + "\n")
+			for vf in retx87_wraps[k]:
+				file.write("\tif (fun == &" + vf + ") return 1;\n")
+			if k != str(Clauses()):
+				file.write("#endif\n")
+		file.write("\treturn 0;\n}\n")
+		
 		file.write(files_guard["wrapper.c"].format(lbr="{", rbr="}", version=ver))
 	
 	# Rewrite the wrapper.h file:
@@ -1438,6 +1480,6 @@ if __name__ == '__main__':
 		if v == "--":
 			limit.append(i)
 	Define.defines = list(map(DefineType, sys.argv[2:limit[0]]))
-	if main(sys.argv[1], sys.argv[limit[0]+1:], "2.2.0.16") != 0:
+	if main(sys.argv[1], sys.argv[limit[0]+1:], "2.2.0.18") != 0:
 		exit(2)
 	exit(0)

runTest.cmake

@@ -11,6 +11,9 @@ endif( NOT TEST_OUTPUT )
 if( NOT TEST_REFERENCE )
   message( FATAL_ERROR "Require TEST_REFERENCE to be defined" )
 endif( NOT TEST_REFERENCE )
+if(NOT DEFINED ENV{INTERPRETER})
+    set(ENV{INTERPRETER} "")
+endif()
 
 set(ENV{BOX64_LOG} 0)
 set(ENV{BOX64_NOBANNER} 1)
@@ -24,7 +27,7 @@ endif( EXISTS ${CMAKE_SOURCE_DIR}/x64lib )
 
 # run the test program, capture the stdout/stderr and the result var
 execute_process(
-  COMMAND ${TEST_PROGRAM} ${TEST_ARGS} ${TEST_ARGS2}
+  COMMAND $ENV{INTERPRETER} ${TEST_PROGRAM} ${TEST_ARGS} ${TEST_ARGS2}
   OUTPUT_FILE ${TEST_OUTPUT}
   ERROR_VARIABLE TEST_ERROR
   RESULT_VARIABLE TEST_RESULT

src/box64context.c

@@ -68,6 +68,8 @@ void free_tlsdatasize(void* p)
     tlsdatasize_t *data = (tlsdatasize_t*)p;
     box_free(data->ptr);
     box_free(p);
+    if(my_context)
+        pthread_setspecific(my_context->tlskey, NULL);
 }
 
 void x64Syscall(x64emu_t *emu);
@@ -76,7 +78,7 @@ int unlockMutex()
 {
     int ret = unlockCustommemMutex();
     int i;
-    #ifdef DYNAREC
+    #ifdef USE_CUSTOM_MUTEX
     uint32_t tid = (uint32_t)GetTID();
     #define GO(A, B)                    \
         i = (native_lock_storeifref2_d(&A, 0, tid)==tid); \
@@ -138,11 +140,24 @@ static void init_mutexes(box64context_t* context)
 
     pthread_mutexattr_destroy(&attr);
 #else
+    #ifdef USE_CUSTOM_MUTEX
     native_lock_store(&context->mutex_trace, 0);
     native_lock_store(&context->mutex_tls, 0);
     native_lock_store(&context->mutex_thread, 0);
     native_lock_store(&context->mutex_bridge, 0);
     native_lock_store(&context->mutex_dyndump, 0);
+    #else
+    pthread_mutexattr_t attr;
+    pthread_mutexattr_init(&attr);
+    pthread_mutexattr_settype(&attr, PTHREAD_MUTEX_ERRORCHECK);
+    pthread_mutex_init(&context->mutex_trace, &attr);
+    pthread_mutex_init(&context->mutex_tls, &attr);
+    pthread_mutex_init(&context->mutex_thread, &attr);
+    pthread_mutex_init(&context->mutex_bridge, &attr);
+    pthread_mutex_init(&context->mutex_dyndump, &attr);
+    pthread_mutexattr_destroy(&attr);
+    #endif
+    pthread_mutex_init(&context->mutex_lock, NULL);
 #endif
 }
 
@@ -191,7 +206,7 @@ box64context_t *NewBox64Context(int argc)
 
     initCycleLog(context);
 
-    context->deferedInit = 1;
+    context->deferredInit = 1;
     context->sel_serial = 1;
 
     init_custommem_helper(context);
@@ -200,8 +215,7 @@ box64context_t *NewBox64Context(int argc)
     context->local_maplib = NewLibrarian(context, 1);
     context->versym = NewDictionnary();
     context->system = NewBridge();
-    context->globaldefver = NewDefaultVersion();
-    context->weakdefver = NewDefaultVersion();
+    // Cannot use Bridge name as the map is not initialized yet
     // create vsyscall
     context->vsyscall = AddBridge(context->system, vFEv, x64Syscall, 0, NULL);
     // create the vsyscalls
@@ -212,6 +226,8 @@ box64context_t *NewBox64Context(int argc)
     addAlternate((void*)0xffffffffff600000, (void*)context->vsyscalls[0]);
     addAlternate((void*)0xffffffffff600400, (void*)context->vsyscalls[1]);
     addAlternate((void*)0xffffffffff600800, (void*)context->vsyscalls[2]);
+    // create exit bridge
+    context->exit_bridge = AddBridge(context->system, NULL, NULL, 0, NULL);
     // get handle to box64 itself
     context->box64lib = dlopen(NULL, RTLD_NOW|RTLD_GLOBAL);
     context->dlprivate = NewDLPrivate();
@@ -229,6 +245,24 @@ box64context_t *NewBox64Context(int argc)
     context->canary[getrand(4)] = 0;
     printf_log(LOG_DEBUG, "Setting up canary (for Stack protector) at FS:0x28, value:%08X\n", *(uint32_t*)context->canary);
 
+    // init segments
+    for(int i=0; i<16; i++) {
+        context->segtls[i].limit = (uintptr_t)-1LL;
+    }
+    context->segtls[10].key_init = 0;    // 0x53 selector
+    context->segtls[10].present = 1;
+    context->segtls[8].key_init = 0;    // 0x43 selector
+    context->segtls[8].present = 1;
+    context->segtls[6].key_init = 0;    // 0x33 selector
+    context->segtls[6].present = 1;
+    context->segtls[5].key_init = 0;    // 0x2b selector
+    context->segtls[5].present = 1;
+    context->segtls[4].key_init = 0;    // 0x23 selector
+    context->segtls[4].present = 1;
+    context->segtls[4].is32bits = 1;
+
+    context->globdata = NewMapSymbols();
+
     initAllHelpers(context);
 
     return context;
@@ -246,13 +280,12 @@ void FreeBox64Context(box64context_t** context)
 
     box64context_t* ctx = *context;   // local copy to do the cleanning
 
+    //clean_current_emuthread();    // cleaning main thread seems a bad idea
     if(ctx->local_maplib)
         FreeLibrarian(&ctx->local_maplib, NULL);
     if(ctx->maplib)
         FreeLibrarian(&ctx->maplib, NULL);
     FreeDictionnary(&ctx->versym);
-    FreeDefaultVersion(&ctx->globaldefver);
-    FreeDefaultVersion(&ctx->weakdefver);
 
     for(int i=0; i<ctx->elfsize; ++i) {
         FreeElfHeader(&ctx->elfs[i]);
@@ -265,11 +298,13 @@ void FreeBox64Context(box64context_t** context)
     // stop trace now
     if(ctx->dec)
         DeleteX64TraceDecoder(&ctx->dec);
+    if(ctx->dec32)
+        DeleteX86TraceDecoder(&ctx->dec32);
     if(ctx->zydis)
         DeleteX64Trace(ctx);
 
-    if(ctx->deferedInitList)
-        box_free(ctx->deferedInitList);
+    if(ctx->deferredInitList)
+        box_free(ctx->deferredInitList);
 
     /*box_free(ctx->argv);*/
     
@@ -310,7 +345,6 @@ void FreeBox64Context(box64context_t** context)
     void* ptr;
     if ((ptr = pthread_getspecific(ctx->tlskey)) != NULL) {
         free_tlsdatasize(ptr);
-        pthread_setspecific(ctx->tlskey, NULL);
     }
     pthread_key_delete(ctx->tlskey);
 
@@ -323,9 +357,13 @@ void FreeBox64Context(box64context_t** context)
     if(ctx->emu_sig)
         FreeX64Emu(&ctx->emu_sig);
 
+    FreeMapSymbols(&ctx->globdata);
+
     finiAllHelpers(ctx);
 
-#ifndef DYNAREC
+#ifdef DYNAREC
+    pthread_mutex_destroy(&ctx->mutex_lock);
+#else
     pthread_mutex_destroy(&ctx->mutex_trace);
     pthread_mutex_destroy(&ctx->mutex_lock);
     pthread_mutex_destroy(&ctx->mutex_tls);
@@ -339,20 +377,44 @@ void FreeBox64Context(box64context_t** context)
 }
 
 int AddElfHeader(box64context_t* ctx, elfheader_t* head) {
-    int idx = ctx->elfsize;
-    if(idx==ctx->elfcap) {
-        // resize...
-        ctx->elfcap += 16;
-        ctx->elfs = (elfheader_t**)box_realloc(ctx->elfs, sizeof(elfheader_t*) * ctx->elfcap);
+    int idx = 0;
+    while(idx<ctx->elfsize && ctx->elfs[idx]) idx++;
+    if(idx == ctx->elfsize) {
+        if(idx==ctx->elfcap) {
+            // resize...
+            ctx->elfcap += 16;
+            ctx->elfs = (elfheader_t**)box_realloc(ctx->elfs, sizeof(elfheader_t*) * ctx->elfcap);
+        }
+        ctx->elfs[idx] = head;
+        ctx->elfsize++;
+    } else {
+        ctx->elfs[idx] = head;
     }
-    ctx->elfs[idx] = head;
-    ctx->elfsize++;
     printf_log(LOG_DEBUG, "Adding \"%s\" as #%d in elf collection\n", ElfName(head), idx);
     return idx;
 }
 
+void RemoveElfHeader(box64context_t* ctx, elfheader_t* head) {
+    if(GetTLSBase(head)) {
+        // should remove the tls info
+        int tlsbase = GetTLSBase(head);
+        /*if(tlsbase == -ctx->tlssize) {
+            // not really correct, but will do for now
+            ctx->tlssize -= GetTLSSize(head);
+            if(!(++ctx->sel_serial))
+                ++ctx->sel_serial;
+        }*/
+    }
+    for(int i=0; i<ctx->elfsize; ++i)
+        if(ctx->elfs[i] == head) {
+            ctx->elfs[i] = NULL;
+            return;
+        }
+}
+
 int AddTLSPartition(box64context_t* context, int tlssize) {
     int oldsize = context->tlssize;
+    // should in fact first try to map a hole, but rewinding all elfs and checking filled space, like with the mapmem utilities
     context->tlssize += tlssize;
     context->tlsdata = box_realloc(context->tlsdata, context->tlssize);
     memmove(context->tlsdata+tlssize, context->tlsdata, oldsize);   // move to the top, using memmove as regions will probably overlap

src/box64version.h

@@ -3,6 +3,6 @@
 
 #define BOX64_MAJOR 0
 #define BOX64_MINOR 2
-#define BOX64_REVISION 2
+#define BOX64_REVISION 6
 
 #endif //__BOX64_VERSION_H_

src/build_info.h

@@ -1,6 +1,6 @@
 #ifndef __BUILD_INFO_H__
 #define __BUILD_INFO_H__
 
-void PrintBox64Version();
+void PrintBox64Version(void);
 
 #endif //__BUILD_INFO_H__

src/dynarec/arm64/arm64_emitter.h

@@ -92,24 +92,24 @@
 
 // MOVZ
 #define MOVZ_gen(sf, hw, imm16, Rd)         ((sf)<<31 | 0b10<<29 | 0b100101<<23 | (hw)<<21 | (imm16)<<5 | (Rd))
-#define MOVZx(Rd, imm16)                    EMIT(MOVZ_gen(1, 0, ((uint16_t)imm16)&0xffff, Rd))
-#define MOVZx_LSL(Rd, imm16, shift)         EMIT(MOVZ_gen(1, (shift)/16, ((uint16_t)imm16)&0xffff, Rd))
-#define MOVZw(Rd, imm16)                    EMIT(MOVZ_gen(0, 0, ((uint16_t)imm16)&0xffff, Rd))
-#define MOVZw_LSL(Rd, imm16, shift)         EMIT(MOVZ_gen(0, (shift)/16, ((uint16_t)imm16)&0xffff, Rd))
+#define MOVZx(Rd, imm16)                    EMIT(MOVZ_gen(1, 0, ((uint16_t)(imm16))&0xffff, Rd))
+#define MOVZx_LSL(Rd, imm16, shift)         EMIT(MOVZ_gen(1, (shift)/16, ((uint16_t)(imm16))&0xffff, Rd))
+#define MOVZw(Rd, imm16)                    EMIT(MOVZ_gen(0, 0, ((uint16_t)(imm16))&0xffff, Rd))
+#define MOVZw_LSL(Rd, imm16, shift)         EMIT(MOVZ_gen(0, (shift)/16, ((uint16_t)(imm16))&0xffff, Rd))
 
 // MOVN
 #define MOVN_gen(sf, hw, imm16, Rd)         ((sf)<<31 | 0b00<<29 | 0b100101<<23 | (hw)<<21 | (imm16)<<5 | (Rd))
-#define MOVNx(Rd, imm16)                    EMIT(MOVN_gen(1, 0, ((uint16_t)imm16)&0xffff, Rd))
-#define MOVNx_LSL(Rd, imm16, shift)         EMIT(MOVN_gen(1, (shift)/16, ((uint16_t)imm16)&0xffff, Rd))
-#define MOVNw(Rd, imm16)                    EMIT(MOVN_gen(0, 0, ((uint16_t)imm16)&0xffff, Rd))
-#define MOVNw_LSL(Rd, imm16, shift)         EMIT(MOVN_gen(0, (shift)/16, ((uint16_t)imm16)&0xffff, Rd))
+#define MOVNx(Rd, imm16)                    EMIT(MOVN_gen(1, 0, ((uint16_t)(imm16))&0xffff, Rd))
+#define MOVNx_LSL(Rd, imm16, shift)         EMIT(MOVN_gen(1, (shift)/16, ((uint16_t)(imm16))&0xffff, Rd))
+#define MOVNw(Rd, imm16)                    EMIT(MOVN_gen(0, 0, ((uint16_t)(imm16))&0xffff, Rd))
+#define MOVNw_LSL(Rd, imm16, shift)         EMIT(MOVN_gen(0, (shift)/16, ((uint16_t)(imm16))&0xffff, Rd))
 
 // MOVK
 #define MOVK_gen(sf, hw, imm16, Rd)         ((sf)<<31 | 0b11<<29 | 0b100101<<23 | (hw)<<21 | (imm16)<<5 | (Rd))
-#define MOVKx(Rd, imm16)                    EMIT(MOVK_gen(1, 0, ((uint16_t)imm16)&0xffff, Rd))
-#define MOVKx_LSL(Rd, imm16, shift)         EMIT(MOVK_gen(1, (shift)/16, ((uint16_t)imm16)&0xffff, Rd))
-#define MOVKw(Rd, imm16)                    EMIT(MOVK_gen(0, 0, ((uint16_t)imm16)&0xffff, Rd))
-#define MOVKw_LSL(Rd, imm16, shift)         EMIT(MOVK_gen(0, (shift)/16, ((uint16_t)imm16)&0xffff, Rd))
+#define MOVKx(Rd, imm16)                    EMIT(MOVK_gen(1, 0, ((uint16_t)(imm16))&0xffff, Rd))
+#define MOVKx_LSL(Rd, imm16, shift)         EMIT(MOVK_gen(1, (shift)/16, ((uint16_t)(imm16))&0xffff, Rd))
+#define MOVKw(Rd, imm16)                    EMIT(MOVK_gen(0, 0, ((uint16_t)(imm16))&0xffff, Rd))
+#define MOVKw_LSL(Rd, imm16, shift)         EMIT(MOVK_gen(0, (shift)/16, ((uint16_t)(imm16))&0xffff, Rd))
 
 // This macro will give a -Wsign-compare warning, probably bug #38341
 #define MOV32w(Rd, imm32) \
@@ -130,6 +130,7 @@
     }
 
 #define MOV64xw(Rd, imm64)   if(rex.w) {MOV64x(Rd, imm64);} else {MOV32w(Rd, imm64);}
+#define MOV64z(Rd, imm64)    if(rex.is32bits) {MOV32w(Rd, imm64);} else {MOV64x(Rd, imm64);}
 
 
 // ADD / SUB
@@ -141,6 +142,7 @@
 #define ADDSw_REG(Rd, Rn, Rm)               EMIT(ADDSUB_REG_gen(0, 0, 1, 0b00, Rm, 0, Rn, Rd))
 #define ADDw_REG_LSL(Rd, Rn, Rm, lsl)       EMIT(ADDSUB_REG_gen(0, 0, 0, 0b00, Rm, lsl, Rn, Rd))
 #define ADDxw_REG(Rd, Rn, Rm)               EMIT(ADDSUB_REG_gen(rex.w, 0, 0, 0b00, Rm, 0, Rn, Rd))
+#define ADDz_REG(Rd, Rn, Rm)                EMIT(ADDSUB_REG_gen(rex.is32bits?0:1, 0, 0, 0b00, Rm, 0, Rn, Rd))
 #define ADDSxw_REG(Rd, Rn, Rm)              EMIT(ADDSUB_REG_gen(rex.w, 0, 1, 0b00, Rm, 0, Rn, Rd))
 #define ADDxw_REG_LSR(Rd, Rn, Rm, lsr)      EMIT(ADDSUB_REG_gen(rex.w, 0, 0, 0b01, Rm, lsr, Rn, Rd))
 
@@ -151,6 +153,7 @@
 #define ADDSw_U12(Rd, Rn, imm12)    EMIT(ADDSUB_IMM_gen(0, 0, 1, 0b00, (imm12)&0xfff, Rn, Rd))
 #define ADDxw_U12(Rd, Rn, imm12)    EMIT(ADDSUB_IMM_gen(rex.w, 0, 0, 0b00, (imm12)&0xfff, Rn, Rd))
 #define ADDSxw_U12(Rd, Rn, imm12)   EMIT(ADDSUB_IMM_gen(rex.w, 0, 1, 0b00, (imm12)&0xfff, Rn, Rd))
+#define ADDz_U12(Rd, Rn, imm12)     EMIT(ADDSUB_IMM_gen(rex.is32bits?0:1, 0, 0, 0b00, (imm12)&0xfff, Rn, Rd))
 
 #define SUBx_REG(Rd, Rn, Rm)                EMIT(ADDSUB_REG_gen(1, 1, 0, 0b00, Rm, 0, Rn, Rd))
 #define SUBSx_REG(Rd, Rn, Rm)               EMIT(ADDSUB_REG_gen(1, 1, 1, 0b00, Rm, 0, Rn, Rd))
@@ -160,6 +163,7 @@
 #define SUBSw_REG(Rd, Rn, Rm)               EMIT(ADDSUB_REG_gen(0, 1, 1, 0b00, Rm, 0, Rn, Rd))
 #define SUBSw_REG_LSL(Rd, Rn, Rm, lsl)      EMIT(ADDSUB_REG_gen(0, 1, 1, 0b00, Rm, lsl, Rn, Rd))
 #define SUBxw_REG(Rd, Rn, Rm)               EMIT(ADDSUB_REG_gen(rex.w, 1, 0, 0b00, Rm, 0, Rn, Rd))
+#define SUBz_REG(Rd, Rn, Rm)                EMIT(ADDSUB_REG_gen(rex.is32bits?0:1, 1, 0, 0b00, Rm, 0, Rn, Rd))
 #define SUBSxw_REG(Rd, Rn, Rm)              EMIT(ADDSUB_REG_gen(rex.w, 1, 1, 0b00, Rm, 0, Rn, Rd))
 #define CMPSx_REG(Rn, Rm)                   SUBSx_REG(xZR, Rn, Rm)
 #define CMPSw_REG(Rn, Rm)                   SUBSw_REG(wZR, Rn, Rm)
@@ -176,6 +180,7 @@
 #define SUBw_U12(Rd, Rn, imm12)     EMIT(ADDSUB_IMM_gen(0, 1, 0, 0b00, (imm12)&0xfff, Rn, Rd))
 #define SUBSw_U12(Rd, Rn, imm12)    EMIT(ADDSUB_IMM_gen(0, 1, 1, 0b00, (imm12)&0xfff, Rn, Rd))
 #define SUBxw_U12(Rd, Rn, imm12)    EMIT(ADDSUB_IMM_gen(rex.w, 1, 0, 0b00, (imm12)&0xfff, Rn, Rd))
+#define SUBz_U12(Rd, Rn, imm12)     EMIT(ADDSUB_IMM_gen(rex.is32bits?0:1, 1, 0, 0b00, (imm12)&0xfff, Rn, Rd))
 #define SUBSxw_U12(Rd, Rn, imm12)   EMIT(ADDSUB_IMM_gen(rex.w, 1, 1, 0b00, (imm12)&0xfff, Rn, Rd))
 #define CMPSx_U12(Rn, imm12)        SUBSx_U12(xZR, Rn, imm12)
 #define CMPSw_U12(Rn, imm12)        SUBSw_U12(wZR, Rn, imm12)
@@ -195,6 +200,12 @@
 #define SBCSw_REG(Rd, Rn, Rm)       EMIT(ADDSUBC_gen(0, 1, 1, Rm, Rn, Rd))
 #define SBCSxw_REG(Rd, Rn, Rm)      EMIT(ADDSUBC_gen(rex.w, 1, 1, Rm, Rn, Rd))
 
+// CCMP compare if cond is true, set nzcv if false
+#define CCMP_reg(sf, Rm, cond, Rn, nzcv)    ((sf)<<31 | 1<<30 | 1<<29 | 0b11010010<<21 | (Rm)<<16 | (cond)<<12 | (Rn)<<5 | (nzcv))
+#define CCMPw(Wn, Wm, nzcv, cond)   EMIT(CCMP_reg(0, Wm, cond, Wn, nzcv))
+#define CCMPx(Xn, Xm, nzcv, cond)   EMIT(CCMP_reg(1, Xm, cond, Xn, nzcv))
+#define CCMPxw(Xn, Xm, nzcv, cond)  EMIT(CCMP_reg(rex.w, Xm, cond, Xn, nzcv))
+
 // ADR
 #define ADR_gen(immlo, immhi, Rd)   ((immlo)<<29 | 0b10000<<24 | (immhi)<<5 | (Rd))
 #define ADR_S20(Rd, imm)            EMIT(ADR_gen((imm)&3, ((imm)>>2)&0x7ffff, (Rd)))
@@ -221,6 +232,7 @@
 #define LDRB_U12(Rt, Rn, imm12)           EMIT(LD_gen(0b00, 0b01, ((uint32_t)((imm12)))&0xfff, Rn, Rt))
 #define LDRH_U12(Rt, Rn, imm12)           EMIT(LD_gen(0b01, 0b01, ((uint32_t)((imm12)>>1))&0xfff, Rn, Rt))
 #define LDRxw_U12(Rt, Rn, imm12)          EMIT(LD_gen((rex.w)?0b11:0b10, 0b01, ((uint32_t)((imm12)>>(2+rex.w)))&0xfff, Rn, Rt))
+#define LDRz_U12(Rt, Rn, imm12)           EMIT(LD_gen((rex.is32bits)?0b10:0b11, 0b01, ((uint32_t)((imm12)>>(rex.is32bits?2:3)))&0xfff, Rn, Rt))
 
 #define LDS_gen(size, op1, imm12, Rn, Rt)       ((size)<<30 | 0b111<<27 | (op1)<<24 | 0b10<<22 | (imm12)<<10 | (Rn)<<5 | (Rt))
 #define LDRSW_U12(Rt, Rn, imm12)          EMIT(LDS_gen(0b10, 0b01, ((uint32_t)((imm12)>>2))&0xfff, Rn, Rt))
@@ -232,7 +244,9 @@
 #define LDRw_REG(Rt, Rn, Rm)            EMIT(LDR_REG_gen(0b10, Rm, 0b011, 0, Rn, Rt))
 #define LDRw_REG_LSL2(Rt, Rn, Rm)       EMIT(LDR_REG_gen(0b10, Rm, 0b011, 1, Rn, Rt))
 #define LDRxw_REG(Rt, Rn, Rm)           EMIT(LDR_REG_gen(0b10+rex.w, Rm, 0b011, 0, Rn, Rt))
+#define LDRz_REG(Rt, Rn, Rm)            EMIT(LDR_REG_gen(rex.is32bits?0b10:0b11, Rm, 0b011, 0, Rn, Rt))
 #define LDRB_REG(Rt, Rn, Rm)            EMIT(LDR_REG_gen(0b00, Rm, 0b011, 0, Rn, Rt))
+#define LDRB_REG_UXTW(Rt, Rn, Rm)       EMIT(LDR_REG_gen(0b00, Rm, 0b010, 0, Rn, Rt))
 #define LDRH_REG(Rt, Rn, Rm)            EMIT(LDR_REG_gen(0b01, Rm, 0b011, 0, Rn, Rt))
 
 #define LDRS_U12_gen(size, op1, opc, imm12, Rn, Rt)    ((size)<<30 | 0b111<<27 | (op1)<<24 | (opc)<<22 | (imm12)<<10 | (Rn)<<5 | (Rt))
@@ -249,6 +263,41 @@
 #define LDR_PC_gen(opc, imm19, Rt)      ((opc)<<30 | 0b011<<27 | (imm19)<<5 | (Rt))
 #define LDRx_literal(Rt, imm19)         EMIT(LDR_PC_gen(0b01, ((imm19)>>2)&0x7FFFF, Rt))
 
+#define LDU_gen(size, opc, imm9, Rn, Rt)  ((size)<<30 | 0b111<<27 | (opc)<<22 | ((imm9)&0x1ff)<<12 | (Rn)<<5 | (Rt))
+#define LDURx_I9(Rt, Rn, imm9)            EMIT(LDU_gen(0b11, 0b01, imm9, Rn, Rt))
+#define LDURw_I9(Rt, Rn, imm9)            EMIT(LDU_gen(0b10, 0b01, imm9, Rn, Rt))
+#define LDURxw_I9(Rt, Rn, imm9)           EMIT(LDU_gen((rex.w)?0b11:0b10, 0b01, imm9, Rn, Rt))
+#define LDURz_I9(Rt, Rn, imm9)            EMIT(LDU_gen((rex.is32bits)?0b10:0b11, 0b01, imm9, Rn, Rt))
+#define LDURH_I9(Rt, Rn, imm9)            EMIT(LDU_gen(0b01, 0b01, imm9, Rn, Rt))
+#define LDURB_I9(Rt, Rn, imm9)            EMIT(LDU_gen(0b00, 0b01, imm9, Rn, Rt))
+#define LDURSW_I9(Rt, Rn, imm9)           EMIT(LDU_gen(0b10, 0b10, imm9, Rn, Rt))
+#define LDURSHw_I9(Rt, Rn, imm9)          EMIT(LDU_gen(0b01, 0b11, imm9, Rn, Rt))
+#define LDURSHx_I9(Rt, Rn, imm9)          EMIT(LDU_gen(0b01, 0b10, imm9, Rn, Rt))
+#define LDURSHxw_I9(Rt, Rn, imm9)         EMIT(LDU_gen(0b01, (rex.w)?0b10:0b11, imm9, Rn, Rt))
+#define LDURSBw_I9(Rt, Rn, imm9)          EMIT(LDU_gen(0b00, 0b11, imm9, Rn, Rt))
+#define LDURSBx_I9(Rt, Rn, imm9)          EMIT(LDU_gen(0b00, 0b10, imm9, Rn, Rt))
+#define LDURSBxw_I9(Rt, Rn, imm9)         EMIT(LDU_gen(0b00, (rex.w)?0b10:0b11, imm9, Rn, Rt))
+
+#define LDxw(A, B, C)   if(unscaled) {LDURxw_I9(A, B, C);} else {LDRxw_U12(A, B, C);}
+#define LDz(A, B, C)    if(unscaled) {LDURz_I9(A, B, C);} else {LDRz_U12(A, B, C);}
+#define LDx(A, B, C)    if(unscaled) {LDURx_I9(A, B, C);} else {LDRx_U12(A, B, C);}
+#define LDW(A, B, C)    if(unscaled) {LDURw_I9(A, B, C);} else {LDRw_U12(A, B, C);}
+#define LDH(A, B, C)    if(unscaled) {LDURH_I9(A, B, C);} else {LDRH_U12(A, B, C);}
+#define LDB(A, B, C)    if(unscaled) {LDURB_I9(A, B, C);} else {LDRB_U12(A, B, C);}
+#define LDSW(A, B, C)   if(unscaled) {LDURSW_I9(A, B, C);} else {LDRSW_U12(A, B, C);}
+#define LDSHxw(A, B, C) if(unscaled) {LDURSHxw_I9(A, B, C);} else {LDRSHxw_U12(A, B, C);}
+#define LDSHx(A, B, C)  if(unscaled) {LDURSHx_I9(A, B, C);} else {LDRSHx_U12(A, B, C);}
+#define LDSHw(A, B, C)  if(unscaled) {LDURSHw_I9(A, B, C);} else {LDRSHw_U12(A, B, C);}
+#define LDSBxw(A, B, C) if(unscaled) {LDURSBxw_I9(A, B, C);} else {LDRSBxw_U12(A, B, C);}
+#define LDSBx(A, B, C)  if(unscaled) {LDURSBx_I9(A, B, C);} else {LDRSBx_U12(A, B, C);}
+#define LDSBw(A, B, C)  if(unscaled) {LDURSBw_I9(A, B, C);} else {LDRSBw_U12(A, B, C);}
+#define STxw(A, B, C)   if(unscaled) {STURxw_I9(A, B, C);} else {STRxw_U12(A, B, C);}
+#define STz(A, B, C)    if(unscaled) {STURz_I9(A, B, C);} else {STRz_U12(A, B, C);}
+#define STx(A, B, C)    if(unscaled) {STURx_I9(A, B, C);} else {STRx_U12(A, B, C);}
+#define STW(A, B, C)    if(unscaled) {STURw_I9(A, B, C);} else {STRw_U12(A, B, C);}
+#define STH(A, B, C)    if(unscaled) {STURH_I9(A, B, C);} else {STRH_U12(A, B, C);}
+#define STB(A, B, C)    if(unscaled) {STURB_I9(A, B, C);} else {STRB_U12(A, B, C);}
+
 // STR
 #define STR_gen(size, op1, imm9, op2, Rn, Rt)    ((size)<<30 | 0b111<<27 | (op1)<<24 | 0b00<<22 | (imm9)<<12 | (op2)<<10 | (Rn)<<5 | (Rt))
 #define STRx_S9_postindex(Rt, Rn, imm9)   EMIT(STR_gen(0b11, 0b00, (imm9)&0x1ff, 0b01, Rn, Rt))
@@ -257,6 +306,7 @@
 #define STRw_S9_preindex(Rt, Rn, imm9)    EMIT(STR_gen(0b10, 0b00, (imm9)&0x1ff, 0b11, Rn, Rt))
 #define STRxw_S9_postindex(Rt, Rn, imm9)  EMIT(STR_gen(rex.w?0b11:0b10, 0b00, (imm9)&0x1ff, 0b01, Rn, Rt))
 #define STRB_S9_postindex(Rt, Rn, imm9)   EMIT(STR_gen(0b00, 0b00, (imm9)&0x1ff, 0b01, Rn, Rt))
+#define STRH_S9_preindex(Rt, Rn, imm9)    EMIT(STR_gen(0b01, 0b00, (imm9)&0x1ff, 0b11, Rn, Rt))
 #define STRH_S9_postindex(Rt, Rn, imm9)   EMIT(STR_gen(0b01, 0b00, (imm9)&0x1ff, 0b01, Rn, Rt))
 
 #define ST_gen(size, op1, imm12, Rn, Rt)        ((size)<<30 | 0b111<<27 | (op1)<<24 | 0b00<<22 | (imm12)<<10 | (Rn)<<5 | (Rt))
@@ -265,11 +315,13 @@
 #define STRB_U12(Rt, Rn, imm12)           EMIT(ST_gen(0b00, 0b01, ((uint32_t)((imm12)))&0xfff, Rn, Rt))
 #define STRH_U12(Rt, Rn, imm12)           EMIT(ST_gen(0b01, 0b01, ((uint32_t)((imm12)>>1))&0xfff, Rn, Rt))
 #define STRxw_U12(Rt, Rn, imm12)          EMIT(ST_gen((rex.w)?0b11:0b10, 0b01, ((uint32_t)((imm12)>>(2+rex.w)))&0xfff, Rn, Rt))
+#define STRz_U12(Rt, Rn, imm12)           EMIT(ST_gen((rex.is32bits)?0b10:0b11, 0b01, ((uint32_t)((imm12)>>(rex.is32bits?2:3)))&0xfff, Rn, Rt))
 
 #define STU_gen(size, opc, imm9, Rn, Rt)  ((size)<<30 | 0b111<<27 | (opc)<<22 | ((imm9)&0x1ff)<<12 | (Rn)<<5 | (Rt))
 #define STURx_I9(Rt, Rn, imm9)            EMIT(STU_gen(0b11, 0b00, imm9, Rn, Rt))
 #define STURw_I9(Rt, Rn, imm9)            EMIT(STU_gen(0b10, 0b00, imm9, Rn, Rt))
 #define STURxw_I9(Rt, Rn, imm9)           EMIT(STU_gen((rex.w)?0b11:0b10, 0b00, imm9, Rn, Rt))
+#define STURz_I9(Rt, Rn, imm9)            EMIT(STU_gen((rex.is32bits)?0b10:0b11, 0b00, imm9, Rn, Rt))
 #define STURH_I9(Rt, Rn, imm9)            EMIT(STU_gen(0b01, 0b00, imm9, Rn, Rt))
 #define STURB_I9(Rt, Rn, imm9)            EMIT(STU_gen(0b00, 0b00, imm9, Rn, Rt))
 
@@ -282,6 +334,7 @@
 #define STRB_REG(Rt, Rn, Rm)            EMIT(STR_REG_gen(0b00, Rm, 0b011, 0, Rn, Rt))
 #define STRH_REG(Rt, Rn, Rm)            EMIT(STR_REG_gen(0b01, Rm, 0b011, 0, Rn, Rt))
 #define STRxw_REG(Rt, Rn, Rm)           EMIT(STR_REG_gen(rex.w?0b11:0b10, Rm, 0b011, 0, Rn, Rt))
+#define STRz_REG(Rt, Rn, Rm)            EMIT(STR_REG_gen(rex.is32bits?0b10:0b11, Rm, 0b011, 0, Rn, Rt))
 
 // LOAD/STORE PAIR
 #define MEMPAIR_gen(size, L, op2, imm7, Rt2, Rn, Rt)    ((size)<<31 | 0b101<<27 | (op2)<<23 | (L)<<22 | (imm7)<<15 | (Rt2)<<10 | (Rn)<<5 | (Rt))
@@ -309,6 +362,21 @@
 // PUSH / POP helper
 #define POP1(reg)       LDRx_S9_postindex(reg, xRSP, 8)
 #define PUSH1(reg)      STRx_S9_preindex(reg, xRSP, -8)
+#define POP2(reg1, reg2)       LDPx_S7_postindex(reg1, reg2, xRSP, 16)
+#define PUSH2(reg1, reg2)      STPx_S7_preindex(reg2, reg1, xRSP, -16)
+
+#define POP1_32(reg)            LDRw_S9_postindex(reg, xRSP, 4)
+#define PUSH1_32(reg)           STRw_S9_preindex(reg, xRSP, -4)
+#define POP2_32(reg1, reg2)     LDPw_S7_postindex(reg1, reg2, xRSP, 8)
+#define PUSH2_32(reg1, reg2)    STPw_S7_preindex(reg2, reg1, xRSP, -8)
+
+#define POP1_16(reg)            LDRH_S9_postindex(reg, xRSP, 2)
+#define PUSH1_16(reg)           STRH_S9_preindex(reg, xRSP, -2)
+
+#define POP1z(reg)              if(rex.is32bits) {POP1_32(reg);} else {POP1(reg);}
+#define PUSH1z(reg)             if(rex.is32bits) {PUSH1_32(reg);} else {PUSH1(reg);}
+#define POP2z(reg1, reg2)       if(rex.is32bits) {POP2_32(reg1, reg2);} else {POP2(reg1, reg2);}
+#define PUSH2z(reg1, reg2)      if(rex.is32bits) {PUSH2_32(reg1, reg2);} else {PUSH2(reg1, reg2);}
 
 // LOAD/STORE Acquire Exclusive
 #define MEMAX_gen(size, L, Rs, Rn, Rt)      ((size)<<30 | 0b001000<<24 | (L)<<22 | (Rs)<<16 | 1<<15 | 0b11111<<10 | (Rn)<<5 | (Rt))
@@ -366,6 +434,13 @@
 // Data Memory Barrier
 #define DMB_gen(CRm)                    (0b1101010100<<22 | 0b011<<16 | 0b0011<<12 | (CRm)<<8 | 1<<7 | 0b01<<5 | 0b11111)
 #define DMB_ISH()                       EMIT(DMB_gen(0b1011))
+#define DMB_SY()                        EMIT(DMB_gen(0b1111))
+
+// Data Synchronization Barrier
+#define DSB_gen(CRm)                    (0b1101010100<<22 | 0b011<<16 | 0b0011<<12 | (CRm)<<8 | 1<<7 | 0b00<<5 | 0b11111)
+#define DSB_ISH()                       EMIT(DSB_gen(0b1011))
+#define DSB_ISHST()                     EMIT(DSB_gen(0b1010))
+#define DSB_SY()                        EMIT(DSB_gen(0b1111))
 
 // Break
 #define BRK_gen(imm16)                  (0b11010100<<24 | 0b001<<21 | (((imm16)&0xffff)<<5))
@@ -380,9 +455,11 @@
 #define CBNZx(Rt, imm19)                EMIT(CB_gen(1, 1, ((imm19)>>2)&0x7FFFF, Rt))
 #define CBNZw(Rt, imm19)                EMIT(CB_gen(0, 1, ((imm19)>>2)&0x7FFFF, Rt))
 #define CBNZxw(Rt, imm19)               EMIT(CB_gen(rex.w, 1, ((imm19)>>2)&0x7FFFF, Rt))
+#define CBNZz(Rt, imm19)                EMIT(CB_gen(rex.is32bits?0:1, 1, ((imm19)>>2)&0x7FFFF, Rt))
 #define CBZx(Rt, imm19)                 EMIT(CB_gen(1, 0, ((imm19)>>2)&0x7FFFF, Rt))
 #define CBZw(Rt, imm19)                 EMIT(CB_gen(0, 0, ((imm19)>>2)&0x7FFFF, Rt))
 #define CBZxw(Rt, imm19)                EMIT(CB_gen(rex.w, 0, ((imm19)>>2)&0x7FFFF, Rt))
+#define CBZz(Rt, imm19)                 EMIT(CB_gen(rex.is32bits?0:1, 0, ((imm19)>>2)&0x7FFFF, Rt))
 
 #define TB_gen(b5, op, b40, imm14, Rt)  ((b5)<<31 | 0b011011<<25 | (op)<<24  | (b40)<<19 | (imm14)<<5 | (Rt))
 #define TBZ(Rt, bit, imm16)             EMIT(TB_gen(((bit)>>5)&1, 0, (bit)&0x1f, ((imm16)>>2)&0x3FFF, Rt))
@@ -427,9 +504,9 @@
 #define CSNEGx(Rd, Rn, Rm, cond)            EMIT(CSNEG_gen(1, Rm, cond, Rn, Rd))
 #define CSNEGw(Rd, Rn, Rm, cond)            EMIT(CSNEG_gen(0, Rm, cond, Rn, Rd))
 #define CSNEGxw(Rd, Rn, Rm, cond)           EMIT(CSNEG_gen(rex.w, Rm, cond, Rn, Rd))
-#define CNEGx(Rd, Rn, cond)                 CSNEGx(Rn, Rn, Rn, invCond(cond))
-#define CNEGw(Rd, Rn, cond)                 CSNEGw(Rn, Rn, Rn, invCond(cond))
-#define CNEGxw(Rd, Rn, cond)                CSNEGxw(Rn, Rn, Rn, invCond(cond))
+#define CNEGx(Rd, Rn, cond)                 CSNEGx(Rn, Rn, Rd, invCond(cond))
+#define CNEGw(Rd, Rn, cond)                 CSNEGw(Rn, Rn, Rd, invCond(cond))
+#define CNEGxw(Rd, Rn, cond)                CSNEGxw(Rn, Rn, Rd, invCond(cond))
 
 // AND / ORR
 #define LOGIC_gen(sf, opc, N, immr, imms, Rn, Rd)  ((sf)<<31 | (opc)<<29 | 0b100100<<23 | (N)<<22 | (immr)<<16 | (imms)<<10 | (Rn)<<5 | Rd)
@@ -474,9 +551,19 @@
 #define EORx_REG_LSR(Rd, Rn, Rm, lsr)   EMIT(LOGIC_REG_gen(1, 0b10, 0b01, 0, Rm, lsr, Rn, Rd))
 #define EORw_REG_LSR(Rd, Rn, Rm, lsr)   EMIT(LOGIC_REG_gen(0, 0b10, 0b01, 0, Rm, lsr, Rn, Rd))
 #define EORxw_REG_LSR(Rd, Rn, Rm, lsr)  EMIT(LOGIC_REG_gen(rex.w, 0b10, 0b01, 0, Rm, lsr, Rn, Rd))
+#define EONx_REG(Rd, Rn, Rm)            EMIT(LOGIC_REG_gen(1, 0b10, 0b00, 1, Rm, 0, Rn, Rd))
+#define EONw_REG(Rd, Rn, Rm)            EMIT(LOGIC_REG_gen(0, 0b10, 0b00, 1, Rm, 0, Rn, Rd))
+#define EONxw_REG(Rd, Rn, Rm)           EMIT(LOGIC_REG_gen(rex.w, 0b10, 0b00, 1, Rm, 0, Rn, Rd))
+#define EONx_REG_LSL(Rd, Rn, Rm, lsl)   EMIT(LOGIC_REG_gen(1, 0b10, 0b00, 1, Rm, lsl, Rn, Rd))
+#define EONw_REG_LSL(Rd, Rn, Rm, lsl)   EMIT(LOGIC_REG_gen(0, 0b10, 0b00, 1, Rm, lsl, Rn, Rd))
+#define EONxw_REG_LSL(Rd, Rn, Rm, lsl)  EMIT(LOGIC_REG_gen(rex.w, 0b10, 0b00, 1, Rm, lsl, Rn, Rd))
+#define EONx_REG_LSR(Rd, Rn, Rm, lsr)   EMIT(LOGIC_REG_gen(1, 0b10, 0b01, 1, Rm, lsr, Rn, Rd))
+#define EONw_REG_LSR(Rd, Rn, Rm, lsr)   EMIT(LOGIC_REG_gen(0, 0b10, 0b01, 1, Rm, lsr, Rn, Rd))
+#define EONxw_REG_LSR(Rd, Rn, Rm, lsr)  EMIT(LOGIC_REG_gen(rex.w, 0b10, 0b01, 1, Rm, lsr, Rn, Rd))
 #define MOVx_REG(Rd, Rm)                ORRx_REG(Rd, xZR, Rm)
 #define MOVw_REG(Rd, Rm)                ORRw_REG(Rd, xZR, Rm)
 #define MOVxw_REG(Rd, Rm)               ORRxw_REG(Rd, xZR, Rm)
+#define MOVz_REG(Rd, Rm)                if(rex.is32bits) {MOVw_REG(Rd, Rm);} else {MOVx_REG(Rd, Rm);}
 #define LSLw_IMM(Rd, Rm, lsl)           ORRw_REG_LSL(Rd, xZR, Rm, lsl)
 #define LSLx_IMM(Rd, Rm, lsl)           ORRx_REG_LSL(Rd, xZR, Rm, lsl)
 #define LSLxw_IMM(Rd, Rm, lsl)          ORRxw_REG_LSL(Rd, xZR, Rm, lsl)
@@ -499,6 +586,12 @@
 #define BICx_REG    BICx
 #define BICw_REG    BICw
 #define BICxw_REG   BICxw
+#define BICx_REG_LSL(Rd, Rn, Rm, lsl)   EMIT(LOGIC_REG_gen(1, 0b00, 0b00, 1, Rm, lsl, Rn, Rd))
+#define BICw_REG_LSL(Rd, Rn, Rm, lsl)   EMIT(LOGIC_REG_gen(0, 0b00, 0b00, 1, Rm, lsl, Rn, Rd))
+#define BICxw_REG_LSL(Rd, Rn, Rm, lsl)  EMIT(LOGIC_REG_gen(rex.w, 0b00, 0b00, 1, Rm, lsl, Rn, Rd))
+#define BICx_REG_LSR(Rd, Rn, Rm, lsl)   EMIT(LOGIC_REG_gen(1, 0b00, 0b01, 1, Rm, lsl, Rn, Rd))
+#define BICw_REG_LSR(Rd, Rn, Rm, lsl)   EMIT(LOGIC_REG_gen(0, 0b00, 0b01, 1, Rm, lsl, Rn, Rd))
+#define BICxw_REG_LSR(Rd, Rn, Rm, lsl)  EMIT(LOGIC_REG_gen(rex.w, 0b00, 0b01, 1, Rm, lsl, Rn, Rd))
 #define TSTx_REG(Rn, Rm)                ANDSx_REG(xZR, Rn, Rm)
 #define TSTw_REG(Rn, Rm)                ANDSw_REG(wZR, Rn, Rm)
 #define TSTxw_REG(Rn, Rm)               ANDSxw_REG(xZR, Rn, Rm)
@@ -514,12 +607,12 @@
 #define BFMx(Rd, Rn, immr, imms)        EMIT(BFM_gen(1, 0b01, 1, immr, imms, Rn, Rd))
 #define BFMw(Rd, Rn, immr, imms)        EMIT(BFM_gen(0, 0b01, 0, immr, imms, Rn, Rd))
 #define BFMxw(Rd, Rn, immr, imms)       EMIT(BFM_gen(rex.w, 0b01, rex.w, immr, imms, Rn, Rd))
-#define BFIx(Rd, Rn, lsb, width)        BFMx(Rd, Rn, ((-lsb)%64)&0x3f, (width)-1)
-#define BFIw(Rd, Rn, lsb, width)        BFMw(Rd, Rn, ((-lsb)%32)&0x1f, (width)-1)
+#define BFIx(Rd, Rn, lsb, width)        BFMx(Rd, Rn, ((-(lsb))%64)&0x3f, (width)-1)
+#define BFIw(Rd, Rn, lsb, width)        BFMw(Rd, Rn, ((-(lsb))%32)&0x1f, (width)-1)
 #define BFIxw(Rd, Rn, lsb, width)       if(rex.w) {BFIx(Rd, Rn, lsb, width);} else {BFIw(Rd, Rn, lsb, width);}
-#define BFCx(Rd, lsb, width)            BFMx(Rd, xZR, ((-lsb)%64)&0x3f, (width)-1)
-#define BFCw(Rd, lsb, width)            BFMw(Rd, xZR, ((-lsb)%32)&0x1f, (width)-1)
-#define BFCxw(Rd, lsb, width)           BFMxw(Rd, xZR, rex.w?(((-lsb)%64)&0x3f):(((-lsb)%32)&0x1f), (width)-1)
+#define BFCx(Rd, lsb, width)            BFMx(Rd, xZR, ((-(lsb))%64)&0x3f, (width)-1)
+#define BFCw(Rd, lsb, width)            BFMw(Rd, xZR, ((-(lsb))%32)&0x1f, (width)-1)
+#define BFCxw(Rd, lsb, width)           BFMxw(Rd, xZR, rex.w?(((-(lsb))%64)&0x3f):(((-(lsb))%32)&0x1f), (width)-1)
 // Insert lsb:width part of Rn into low part of Rd (leaving rest of Rd untouched)
 #define BFXILx(Rd, Rn, lsb, width)      EMIT(BFM_gen(1, 0b01, 1, (lsb), (lsb)+(width)-1, Rn, Rd))
 // Insert lsb:width part of Rn into low part of Rd (leaving rest of Rd untouched)
@@ -558,9 +651,9 @@
 #define SBFMx(Rd, Rn, immr, imms)       EMIT(SBFM_gen(1, 1, immr, imms, Rn, Rd))
 #define SBFMw(Rd, Rn, immr, imms)       EMIT(SBFM_gen(0, 0, immr, imms, Rn, Rd))
 #define SBFMxw(Rd, Rn, immr, imms)      EMIT(SBFM_gen(rex.w, rex.w, immr, imms, Rn, Rd))
-#define SBFXx(Rd, Rn, lsb, width)       SBFMx(Rd, Rn, lsb, lsb+width-1)
-#define SBFXw(Rd, Rn, lsb, width)       SBFMw(Rd, Rn, lsb, lsb+width-1)
-#define SBFXxw(Rd, Rn, lsb, width)      SBFMxw(Rd, Rn, lsb, lsb+width-1)
+#define SBFXx(Rd, Rn, lsb, width)       SBFMx(Rd, Rn, lsb, (lsb)+(width)-1)
+#define SBFXw(Rd, Rn, lsb, width)       SBFMw(Rd, Rn, lsb, (lsb)+(width)-1)
+#define SBFXxw(Rd, Rn, lsb, width)      SBFMxw(Rd, Rn, lsb, (lsb)+(width)-1)
 #define SXTBx(Rd, Rn)                   SBFMx(Rd, Rn, 0, 7)
 #define SXTBw(Rd, Rn)                   SBFMw(Rd, Rn, 0, 7)
 #define SXTHx(Rd, Rn)                   SBFMx(Rd, Rn, 0, 15)
@@ -704,13 +797,13 @@
 // imm16 must be 4-aligned
 #define VLDR128_U12(Qt, Rn, imm16)          EMIT(VMEM_gen(0b00, 0b11, ((uint32_t)((imm16)>>4))&0xfff, Rn, Qt))
 // (imm14) must be 3-aligned
-#define VSTR32_U12(Dt, Rn, imm14)           EMIT(VMEM_gen(0b10, 0b00, ((uint32_t)(imm14>>2))&0xfff, Rn, Dt))
+#define VSTR32_U12(Dt, Rn, imm14)           EMIT(VMEM_gen(0b10, 0b00, ((uint32_t)((imm14)>>2))&0xfff, Rn, Dt))
 // (imm15) must be 3-aligned
-#define VSTR64_U12(Dt, Rn, imm15)           EMIT(VMEM_gen(0b11, 0b00, ((uint32_t)(imm15>>3))&0xfff, Rn, Dt))
+#define VSTR64_U12(Dt, Rn, imm15)           EMIT(VMEM_gen(0b11, 0b00, ((uint32_t)((imm15)>>3))&0xfff, Rn, Dt))
 // imm16 must be 4-aligned
 #define VSTR128_U12(Qt, Rn, imm16)          EMIT(VMEM_gen(0b00, 0b10, ((uint32_t)((imm16)>>4))&0xfff, Rn, Qt))
 // (imm13) must be 1-aligned
-#define VSTR16_U12(Ht, Rn, imm13)           EMIT(VMEM_gen(0b01, 0b00, ((uint32_t)(imm13>>1))&0xfff, Rn, Ht))
+#define VSTR16_U12(Ht, Rn, imm13)           EMIT(VMEM_gen(0b01, 0b00, ((uint32_t)((imm13)>>1))&0xfff, Rn, Ht))
 
 #define VMEMUR_vector(size, opc, imm9, Rn, Rt)  ((size)<<30 | 0b111<<27 | 1<<26 | (opc)<<22 | (imm9)<<12 | (Rn)<<5 | (Rt))
 // signed offset, no alignement!
@@ -726,6 +819,15 @@
 #define VSTR64_I9(Vt, Rn, imm9)             EMIT(VMEMUR_vector(0b11, 0b00, (imm9)&0b111111111, Rn, Vt))
 #define VSTR128_I9(Vt, Rn, imm9)            EMIT(VMEMUR_vector(0b00, 0b10, (imm9)&0b111111111, Rn, Vt))
 
+#define VLD128(A, B, C)     if(unscaled) {VLDR128_I9(A, B, C);} else {VLDR128_U12(A, B, C);}
+#define VLD64(A, B, C)      if(unscaled) {VLDR64_I9(A, B, C);} else {VLDR64_U12(A, B, C);}
+#define VLD32(A, B, C)      if(unscaled) {VLDR32_I9(A, B, C);} else {VLDR32_U12(A, B, C);}
+#define VLD16(A, B, C)      if(unscaled) {VLDR16_I9(A, B, C);} else {VLDR16_U12(A, B, C);}
+#define VST128(A, B, C)     if(unscaled) {VSTR128_I9(A, B, C);} else {VSTR128_U12(A, B, C);}
+#define VST64(A, B, C)      if(unscaled) {VSTR64_I9(A, B, C);} else {VSTR64_U12(A, B, C);}
+#define VST32(A, B, C)      if(unscaled) {VSTR32_I9(A, B, C);} else {VSTR32_U12(A, B, C);}
+#define VST16(A, B, C)      if(unscaled) {VSTR16_I9(A, B, C);} else {VSTR16_U12(A, B, C);}
+
 #define VMEMW_gen(size, opc, imm9, op2, Rn, Rt)  ((size)<<30 | 0b111<<27 | 1<<26 | (opc)<<22 | (imm9)<<12 | (op2)<<10 | 0b01<<10 | (Rn)<<5 | (Rt))
 #define VLDR64_S9_postindex(Rt, Rn, imm9)   EMIT(VMEMW_gen(0b11, 0b01, (imm9)&0x1ff, 0b01, Rn, Rt))
 #define VLDR64_S9_preindex(Rt, Rn, imm9)    EMIT(VMEMW_gen(0b11, 0b01, (imm9)&0x1ff, 0b11, Rn, Rt))
@@ -863,6 +965,15 @@
 #define VSRI_16(Vd, Vn, shift)              EMIT(VSRI_vector(0, 0b0010 | ((shift)>>3)&1, (shift)&7, Vn, Vd))
 #define VSRI_32(Vd, Vn, shift)              EMIT(VSRI_vector(0, 0b0100 | (((shift)>>3)&3), (shift)&7, Vn, Vd))
 
+// Reverse elements in 64-bit doublewords (vector). This instruction reverses the order of 8-bit, 16-bit, or 32-bit elements in each doubleword
+#define VREVx_vector(Q, U, size, o0, Rn, Rd)    ((Q)<<30 | (U)<<29 | 0b01110<<24 | (size)<<22 | 0b10000<<17 | (o0)<<12 | 0b10<<10 | (Rn)<<5 | (Rd))
+#define VREV64_32(Vd, Vn)                   EMIT(VREVx_vector(0, 0, 0b10, 0, Vn, Vd))
+#define VREV64_16(Vd, Vn)                   EMIT(VREVx_vector(0, 0, 0b01, 0, Vn, Vd))
+#define VREV64_8(Vd, Vn)                    EMIT(VREVx_vector(0, 0, 0b00, 0, Vn, Vd))
+#define VREV64Q_32(Vd, Vn)                  EMIT(VREVx_vector(1, 0, 0b10, 0, Vn, Vd))
+#define VREV64Q_16(Vd, Vn)                  EMIT(VREVx_vector(1, 0, 0b01, 0, Vn, Vd))
+#define VREV64Q_8(Vd, Vn)                   EMIT(VREVx_vector(1, 0, 0b00, 0, Vn, Vd))
+
 // Integer MATH
 #define ADDSUB_vector(Q, U, size, Rm, Rn, Rd)   ((Q)<<30 | (U)<<29 | 0b01110<<24 | (size)<<22 | 1<<21 | (Rm)<<16 | 0b10000<<11 | 1<<10 | (Rn)<<5 | (Rd))
 #define VADDQ_8(Vd, Vn, Vm)                 EMIT(ADDSUB_vector(1, 0, 0b00, Vm, Vn, Vd))
@@ -880,6 +991,10 @@
 #define VSUB_16(Vd, Vn, Vm)                 EMIT(ADDSUB_vector(0, 1, 0b01, Vm, Vn, Vd))
 #define VSUB_32(Vd, Vn, Vm)                 EMIT(ADDSUB_vector(0, 1, 0b10, Vm, Vn, Vd))
 
+#define ADDSUB_scalar(U, size, Rm, Rn, Rd)  (01<<30 | (U)<<29 | 0b11110<<24 | (size)<<22 | 1<<21 | (Rm)<<16 | 0b10000<<11 | 1<<10 | (Rn)<<5 | (Rd))
+#define ADD_64(Vd, Vn, Vm)                  EMIT(ADDSUB_scalar(0, 0b11, Vm, Vn, Vd))
+#define SUB_64(Vd, Vn, Vm)                  EMIT(ADDSUB_scalar(1, 0b11, Vm, Vn, Vd))
+
 #define NEGABS_vector(Q, U, size, Rn, Rd)   ((Q)<<30 | (U)<<29 | 0b01110<<24 | (size)<<22 | 0b10000<<17 | 0b01011<<12 | 0b10<<10 | (Rn)<<5 | (Rd))
 #define NEG_8(Vd, Vn)                       EMIT(NEGABS_vector(0, 1, 0b00, Vn, Vd))
 #define NEG_16(Vd, Vn)                      EMIT(NEGABS_vector(0, 1, 0b01, Vn, Vd))
@@ -1002,6 +1117,12 @@
 #define FADDP_vector(Q, sz, Rm, Rn, Rd) ((Q)<<30 | 1<<29 | 0b01110<<24 | (sz)<<22 | 1<<21 | (Rm)<<16 | 0b11010<<11 | 1<<10 | (Rn)<<5 | (Rd))
 #define VFADDPQS(Vd, Vn, Vm)        EMIT(FADDP_vector(1, 0, Vm, Vn, Vd))
 #define VFADDPQD(Vd, Vn, Vm)        EMIT(FADDP_vector(1, 1, Vm, Vn, Vd))
+#define VFADDPS(Vd, Vn, Vm)         EMIT(FADDP_vector(0, 0, Vm, Vn, Vd))
+#define VFADDPD(Vd, Vn, Vm)         EMIT(FADDP_vector(0, 1, Vm, Vn, Vd))
+
+#define FADDP_scalar(sz, Rn, Rd)        (0b01<<30 | 1<<29 | 0b11110<<24 | (sz)<<22 | 0b11000<<17 | 0b01101<<12 | 0b10<<10 | (Rn)<<5 | (Rd))
+#define FADDPS(Sd, Sn)              EMIT(FADDP_scalar(0, Sn, Sd))
+#define FADDPD(Dd, Dn)              EMIT(FADDP_scalar(1, Dn, Dd))
 
 // NEG / ABS
 #define FNEGABS_scalar(type, opc, Rn, Rd)  (0b11110<<24 | (type)<<22 | 1<<21 | (opc)<<15 | 0b10000<<10 | (Rn)<<5 | (Rd))
@@ -1025,7 +1146,7 @@
 #define FMLA_vector(Q, op, sz, Rm, Rn, Rd)	((Q)<<30 | 0b01110<<24 | (op)<<23 | (sz)<<22 | 1<<21 | (Rm)<<16 | 0b11001<<11 | 1<<10 | (Rn)<<5 | (Rd))
 #define VFMLAS(Sd, Sn, Sm)	        EMIT(FMLA_vector(0, 0, 0, Sm, Sn, Sd))
 #define VFMLAQS(Sd, Sn, Sm)	        EMIT(FMLA_vector(1, 0, 0, Sm, Sn, Sd))
-#define CFMLAQD(Dd, Dn, Dm)	        EMIT(FMLA_vector(1, 0, 1, Dm, Dn, Dd))
+#define VFMLAQD(Dd, Dn, Dm)	        EMIT(FMLA_vector(1, 0, 1, Dm, Dn, Dd))
 
 // DIV
 #define FDIV_vector(Q, sz, Rm, Rn, Rd)  ((Q)<<30 | 1<<29 | 0b01110<<24 | (sz)<<22 | 1<<21 | (Rm)<<16 | 0b11111<<11 | 1<<10 | (Rn)<<5 | (Rd))
@@ -1223,6 +1344,12 @@
 #define FCVT_D_S(Dd, Sn)            EMIT(FCVT_precision(0b00, 0b01, Sn, Dd))
 #define FCVT_S_D(Sd, Dn)            EMIT(FCVT_precision(0b01, 0b00, Dn, Sd))
 
+#define FCVTN_vector(Q, sz, Rn, Rd)   ((Q)<<30 | 0<<29 | 0b01110<<24 | (sz)<<22 | 0b10000<<17 | 0b10110<<12 | 0b10<<10 | (Rn)<<5 | (Rd))
+// Convert Vn from 2*Double to lower Vd as 2*float and clears the upper half, use FPCR rounding
+#define FCVTN(Vd, Vn)               EMIT(FCVTN_vector(0, 1, Vn, Vd))
+// Convert Vn from 2*Double to higher Vd as 2*float, use FPCR rounding
+#define FCVTN2(Vd, Vn)              EMIT(FCVTN_vector(1, 1, Vn, Vd))
+
 #define FCVTXN_vector(Q, sz, Rn, Rd)   ((Q)<<30 | 1<<29 | 0b01110<<24 | (sz)<<22 | 0b10000<<17 | 0b10110<<12 | 0b10<<10 | (Rn)<<5 | (Rd))
 // Convert Vn from 2*Double to lower Vd as 2*float and clears the upper half
 #define FCVTXN(Vd, Vn)              EMIT(FCVTXN_vector(0, 1, Vn, Vd))
@@ -1258,22 +1385,16 @@
 #define VFRINTIS(Vd,Vn)             EMIT(FRINT_vector(0, 1, 1, 0, 1, Vn, Vd))
 #define VFRINTISQ(Vd,Vn)            EMIT(FRINT_vector(1, 1, 1, 0, 1, Vn, Vd))
 #define VFRINTIDQ(Vd,Vn)            EMIT(FRINT_vector(1, 1, 1, 1, 1, Vn, Vd))
+// round with mode, mode is 0 = TieEven, 1=+inf, 2=-inf, 3=zero
+#define VFRINTRDQ(Vd,Vn, mode)      EMIT(FRINT_vector(1, 0, (mode)&1, 1, ((mode)>>1)&1, Vn, Vd))
+// round with mode, mode is 0 = TieEven, 1=+inf, 2=-inf, 3=zero
+#define VFRINTRSQ(Vd,Vn, mode)      EMIT(FRINT_vector(1, 0, (mode)&1, 0, ((mode)>>1)&1, Vn, Vd))
+#define VFRINTRS(Vd, Vn, mode)      EMIT(FRINT_vector(0, 0, (mode)&1, 0, ((mode)>>1)&1, Vn, Vd))
 
 #define FRINTI_scalar(type, Rn, Rd)  (0b11110<<24 | (type)<<22 | 1<<21 | 0b001<<18 | 0b111<<15 | 0b10000<<10 | (Rn)<<5 | (Rd))
 #define FRINTIS(Sd, Sn)             EMIT(FRINTI_scalar(0b00, Sn, Sd))
 #define FRINTID(Dd, Dn)             EMIT(FRINTI_scalar(0b01, Dn, Dd))
 
-
-#define FRINTxx_scalar(type, op, Rn, Rd)  (0b11110<<24 | (type)<<22 | 1<<21 | 0b0100<<17 | (op)<<15 | 0b10000<<10 | (Rn)<<5 | (Rd))
-#define FRINT32ZS(Sd, Sn)           EMIT(FRINTxx_scalar(0b00, 0b00, Sn, Sd))
-#define FRINT32ZD(Dd, Dn)           EMIT(FRINTxx_scalar(0b01, 0b00, Dn, Dd))
-#define FRINT32XS(Sd, Sn)           EMIT(FRINTxx_scalar(0b00, 0b01, Sn, Sd))
-#define FRINT32XD(Dd, Dn)           EMIT(FRINTxx_scalar(0b01, 0b01, Dn, Dd))
-#define FRINT64ZS(Sd, Sn)           EMIT(FRINTxx_scalar(0b00, 0b10, Sn, Sd))
-#define FRINT64ZD(Dd, Dn)           EMIT(FRINTxx_scalar(0b01, 0b10, Dn, Dd))
-#define FRINT64XS(Sd, Sn)           EMIT(FRINTxx_scalar(0b00, 0b11, Sn, Sd))
-#define FRINT64XD(Dd, Dn)           EMIT(FRINTxx_scalar(0b01, 0b11, Dn, Dd))
-
 #define FRINT_scalar(type, rmode, Rn, Rd)   (0b11110<<24 | (type)<<22 | 1<<21 | 0b001<<18 | (rmode)<<15 | 0b10000<<10 | (Rn)<<5 | (Rd))
 // round toward 0 (truncate)
 #define FRINTZS(Sd, Sn)             EMIT(FRINT_scalar(0b00, 0b011, Sn, Sd))
@@ -1344,14 +1465,23 @@
 #define VUZP1Q_64(Rt, Rn, Rm)       EMIT(UZP_gen(1, 0b11, Rm, 0, Rn, Rt))
 #define VUZP2Q_64(Rt, Rn, Rm)       EMIT(UZP_gen(1, 0b11, Rm, 1, Rn, Rt))
 
-#define DUP_gen(Q, imm5, Rn, Rd)    ((Q)<<30 | 0b01110000<<21 | (imm5)<<16 | 1<<10 | (Rn)<<5 | (Rd))
-#define VDUP_8(Vd, Vn, idx)         EMIT(DUP_gen(0, ((idx)<<1|1), Vn, Vd))
-#define VDUPQ_8(Vd, Vn, idx)        EMIT(DUP_gen(1, ((idx)<<1|1), Vn, Vd))
-#define VDUP_16(Vd, Vn, idx)        EMIT(DUP_gen(0, ((idx)<<2|0b10), Vn, Vd))
-#define VDUPQ_16(Vd, Vn, idx)       EMIT(DUP_gen(1, ((idx)<<2|0b10), Vn, Vd))
-#define VDUP_32(Vd, Vn, idx)        EMIT(DUP_gen(0, ((idx)<<3|0b100), Vn, Vd))
-#define VDUPQ_32(Vd, Vn, idx)       EMIT(DUP_gen(1, ((idx)<<3|0b100), Vn, Vd))
-#define VDUPQ_64(Vd, Vn, idx)       EMIT(DUP_gen(1, ((idx)<<4|0b1000), Vn, Vd))
+#define DUP_element(Q, imm5, Rn, Rd)    ((Q)<<30 | 0b01110000<<21 | (imm5)<<16 | 1<<10 | (Rn)<<5 | (Rd))
+#define VDUP_8(Vd, Vn, idx)         EMIT(DUP_element(0, ((idx)<<1|1), Vn, Vd))
+#define VDUPQ_8(Vd, Vn, idx)        EMIT(DUP_element(1, ((idx)<<1|1), Vn, Vd))
+#define VDUP_16(Vd, Vn, idx)        EMIT(DUP_element(0, ((idx)<<2|0b10), Vn, Vd))
+#define VDUPQ_16(Vd, Vn, idx)       EMIT(DUP_element(1, ((idx)<<2|0b10), Vn, Vd))
+#define VDUP_32(Vd, Vn, idx)        EMIT(DUP_element(0, ((idx)<<3|0b100), Vn, Vd))
+#define VDUPQ_32(Vd, Vn, idx)       EMIT(DUP_element(1, ((idx)<<3|0b100), Vn, Vd))
+#define VDUPQ_64(Vd, Vn, idx)       EMIT(DUP_element(1, ((idx)<<4|0b1000), Vn, Vd))
+
+#define DUP_general(Q, imm5, Rn, Rd)    ((Q)<<30 | 0b01110000<<21 | (imm5)<<16 | 0b11<<10 | (Rn)<<5 | (Rd))
+#define VDUPB(Vd, Wn)         EMIT(DUP_general(0, 0b1, Wn, Vd))
+#define VDUPQB(Vd, Wn)        EMIT(DUP_general(1, 0b1, Wn, Vd))
+#define VDUPH(Vd, Wn)        EMIT(DUP_general(0, 0b10, Wn, Vd))
+#define VDUPQH(Vd, Wn)       EMIT(DUP_general(1, 0b10, Wn, Vd))
+#define VDUPS(Vd, Wn)        EMIT(DUP_general(0, 0b100, Wn, Vd))
+#define VDUPQS(Vd, Wn)       EMIT(DUP_general(1, 0b100, Wn, Vd))
+#define VDUPQD(Vd, Xn)       EMIT(DUP_general(1, 0b1000, Xn, Vd))
 
 // TBL
 #define TBL_gen(Q, Rm, len, op, Rn, Rd) ((Q)<<30 | 0b001110<<24 | (Rm)<<16 | (len)<<13 | (op)<<12 | (Rn)<<5 | (Rd))
@@ -1379,7 +1509,6 @@
 #define VTRNQ1_32(Vd, Vn, Vm)       EMIT(TRN_gen(1, 0b10, Vm, 0, Vn, Vd))
 #define VTRNQ1_16(Vd, Vn, Vm)       EMIT(TRN_gen(1, 0b01, Vm, 0, Vn, Vd))
 #define VTRNQ1_8(Vd, Vn, Vm)        EMIT(TRN_gen(1, 0b00, Vm, 0, Vn, Vd))
-#define VSWP(Vd, Vn)                VTRNQ1_64(Vd, Vn, Vn)
 #define VTRNQ2_64(Vd, Vn, Vm)       EMIT(TRN_gen(1, 0b11, Vm, 1, Vn, Vd))
 #define VTRNQ2_32(Vd, Vn, Vm)       EMIT(TRN_gen(1, 0b10, Vm, 1, Vn, Vd))
 #define VTRNQ2_16(Vd, Vn, Vm)       EMIT(TRN_gen(1, 0b01, Vm, 1, Vn, Vd))
@@ -1488,6 +1617,15 @@
 #define CMEQQ_0_16(Rd, Rn)          EMIT(CMEQ_0_vector(1, 0b01, Rn, Rd))
 #define CMEQQ_0_32(Rd, Rn)          EMIT(CMEQ_0_vector(1, 0b10, Rn, Rd))
 #define CMEQQ_0_64(Rd, Rn)          EMIT(CMEQ_0_vector(1, 0b11, Rn, Rd))
+// Greater Than 0
+#define CMCond_0_vector(Q, U, size, op, Rn, Rd) ((Q)<<30 | (U)<<29 | 0b01110<<24 | (size)<<22 | 0b10000<<17 | 0b0100<<13 | (op)<<12 | 0b10<<10 | (Rn)<<5 | (Rd))
+#define CMGT_0_8(Rd, Rn)            EMIT(CMCond_0_vector(0, 0, 0b00, 0, Rn, Rd))
+#define CMGT_0_16(Rd, Rn)           EMIT(CMCond_0_vector(0, 0, 0b01, 0, Rn, Rd))
+#define CMGT_0_32(Rd, Rn)           EMIT(CMCond_0_vector(0, 0, 0b10, 0, Rn, Rd))
+#define CMGTQ_0_8(Rd, Rn)           EMIT(CMCond_0_vector(1, 0, 0b00, 0, Rn, Rd))
+#define CMGTQ_0_16(Rd, Rn)          EMIT(CMCond_0_vector(1, 0, 0b01, 0, Rn, Rd))
+#define CMGTQ_0_32(Rd, Rn)          EMIT(CMCond_0_vector(1, 0, 0b10, 0, Rn, Rd))
+#define CMGTQ_0_64(Rd, Rn)          EMIT(CMCond_0_vector(1, 0, 0b11, 0, Rn, Rd))
 
 // Vector Float CMP
 // EQual
@@ -1638,10 +1776,19 @@
 #define UADDLV_16(Rd, Rn)           EMIT(ADDLV_vector(0, 1, 0b01, Rn, Rd))
 #define UADDLV_32(Rd, Rn)           EMIT(ADDLV_vector(0, 1, 0b10, Rn, Rd))
 
+// Population Count per byte
+#define CNT_vector(Q, size, Rn, Rd)     ((Q)<<30 | 0b01110<<24 | (size)<<22 | 0b10000<<17 | 0b00101<<12 | 0b10<<10 | (Rn)<<5 | (Rd))
+#define CNT_8(Rd, Rn)               EMIT(CNT_vector(0, 0b00, Rn, Rd))
+#define CNTQ_8(Rd, Rn)              EMIT(CNT_vector(1, 0b00, Rn, Rd))
+
 // MOV Immediate
 #define MOVI_vector(Q, op, abc, cmode, defgh, Rd)   ((Q)<<30 | (op)<<29 | 0b0111100000<<19 | (abc)<<16 | (cmode)<<12 | 1<<10 | (defgh)<<5 | (Rd))
 #define MOVIQ_8(Rd, imm8)           EMIT(MOVI_vector(1, 0, (((imm8)>>5)&0b111), 0b1110, ((imm8)&0b11111), Rd))
+#define MOVIQ_16(Rd, imm8, lsl8)    EMIT(MOVI_vector(1, 0, (((imm8)>>5)&0b111), 0b1000|((lsl8)?0b10:0), ((imm8)&0b11111), Rd))
 #define MOVI_8(Rd, imm8)            EMIT(MOVI_vector(0, 0, (((imm8)>>5)&0b111), 0b1110, ((imm8)&0b11111), Rd))
+#define MOVI_16(Rd, imm8, lsl8)     EMIT(MOVI_vector(0, 0, (((imm8)>>5)&0b111), 0b1000|((lsl8)?0b10:0), ((imm8)&0b11111), Rd))
+#define MOVI_32(Rd, imm8)           EMIT(MOVI_vector(0, 0, (((imm8)>>5)&0b111), 0b0000, ((imm8)&0b11111), Rd))
+#define MOVI_64(Rd, imm8)           EMIT(MOVI_vector(0, 1, (((imm8)>>5)&0b111), 0b1110, ((imm8)&0b11111), Rd))
 
 // SHLL and eXtend Long
 #define SHLL_vector(Q, U, immh, immb, Rn, Rd)  ((Q)<<30 | (U)<<29 | 0b011110<<23 | (immh)<<19 | (immb)<<16 | 0b10100<<11 | 1<<10 | (Rn)<<5 | (Rd))
@@ -1711,35 +1858,35 @@
 #define SMAX_8(Vd, Vn, Vm)          EMIT(MINMAX_vector(0, 0, 0b00, Vm, 0, Vn, Vd))
 #define SMAX_16(Vd, Vn, Vm)         EMIT(MINMAX_vector(0, 0, 0b01, Vm, 0, Vn, Vd))
 #define SMAX_32(Vd, Vn, Vm)         EMIT(MINMAX_vector(0, 0, 0b10, Vm, 0, Vn, Vd))
-#define SMAX_64(Vd, Vn, Vm)         EMIT(MINMAX_vector(0, 0, 0b11, Vm, 0, Vn, Vd))
+//#define SMAX_64(Vd, Vn, Vm)         EMIT(MINMAX_vector(0, 0, 0b11, Vm, 0, Vn, Vd))
 #define UMAX_8(Vd, Vn, Vm)          EMIT(MINMAX_vector(0, 1, 0b00, Vm, 0, Vn, Vd))
 #define UMAX_16(Vd, Vn, Vm)         EMIT(MINMAX_vector(0, 1, 0b01, Vm, 0, Vn, Vd))
 #define UMAX_32(Vd, Vn, Vm)         EMIT(MINMAX_vector(0, 1, 0b10, Vm, 0, Vn, Vd))
-#define UMAX_64(Vd, Vn, Vm)         EMIT(MINMAX_vector(0, 1, 0b11, Vm, 0, Vn, Vd))
+//#define UMAX_64(Vd, Vn, Vm)         EMIT(MINMAX_vector(0, 1, 0b11, Vm, 0, Vn, Vd))
 #define SMIN_8(Vd, Vn, Vm)          EMIT(MINMAX_vector(0, 0, 0b00, Vm, 1, Vn, Vd))
 #define SMIN_16(Vd, Vn, Vm)         EMIT(MINMAX_vector(0, 0, 0b01, Vm, 1, Vn, Vd))
 #define SMIN_32(Vd, Vn, Vm)         EMIT(MINMAX_vector(0, 0, 0b10, Vm, 1, Vn, Vd))
-#define SMIN_64(Vd, Vn, Vm)         EMIT(MINMAX_vector(0, 0, 0b11, Vm, 1, Vn, Vd))
+//#define SMIN_64(Vd, Vn, Vm)         EMIT(MINMAX_vector(0, 0, 0b11, Vm, 1, Vn, Vd))
 #define UMIN_8(Vd, Vn, Vm)          EMIT(MINMAX_vector(0, 1, 0b00, Vm, 1, Vn, Vd))
 #define UMIN_16(Vd, Vn, Vm)         EMIT(MINMAX_vector(0, 1, 0b01, Vm, 1, Vn, Vd))
 #define UMIN_32(Vd, Vn, Vm)         EMIT(MINMAX_vector(0, 1, 0b10, Vm, 1, Vn, Vd))
-#define UMIN_64(Vd, Vn, Vm)         EMIT(MINMAX_vector(0, 1, 0b11, Vm, 1, Vn, Vd))
+//#define UMIN_64(Vd, Vn, Vm)         EMIT(MINMAX_vector(0, 1, 0b11, Vm, 1, Vn, Vd))
 #define SMAXQ_8(Vd, Vn, Vm)         EMIT(MINMAX_vector(1, 0, 0b00, Vm, 0, Vn, Vd))
 #define SMAXQ_16(Vd, Vn, Vm)        EMIT(MINMAX_vector(1, 0, 0b01, Vm, 0, Vn, Vd))
 #define SMAXQ_32(Vd, Vn, Vm)        EMIT(MINMAX_vector(1, 0, 0b10, Vm, 0, Vn, Vd))
-#define SMAXQ_64(Vd, Vn, Vm)        EMIT(MINMAX_vector(1, 0, 0b11, Vm, 0, Vn, Vd))
+//#define SMAXQ_64(Vd, Vn, Vm)        EMIT(MINMAX_vector(1, 0, 0b11, Vm, 0, Vn, Vd))
 #define UMAXQ_8(Vd, Vn, Vm)         EMIT(MINMAX_vector(1, 1, 0b00, Vm, 0, Vn, Vd))
 #define UMAXQ_16(Vd, Vn, Vm)        EMIT(MINMAX_vector(1, 1, 0b01, Vm, 0, Vn, Vd))
 #define UMAXQ_32(Vd, Vn, Vm)        EMIT(MINMAX_vector(1, 1, 0b10, Vm, 0, Vn, Vd))
-#define UMAXQ_64(Vd, Vn, Vm)        EMIT(MINMAX_vector(1, 1, 0b11, Vm, 0, Vn, Vd))
+//#define UMAXQ_64(Vd, Vn, Vm)        EMIT(MINMAX_vector(1, 1, 0b11, Vm, 0, Vn, Vd))
 #define SMINQ_8(Vd, Vn, Vm)         EMIT(MINMAX_vector(1, 0, 0b00, Vm, 1, Vn, Vd))
 #define SMINQ_16(Vd, Vn, Vm)        EMIT(MINMAX_vector(1, 0, 0b01, Vm, 1, Vn, Vd))
 #define SMINQ_32(Vd, Vn, Vm)        EMIT(MINMAX_vector(1, 0, 0b10, Vm, 1, Vn, Vd))
-#define SMINQ_64(Vd, Vn, Vm)        EMIT(MINMAX_vector(1, 0, 0b11, Vm, 1, Vn, Vd))
+//#define SMINQ_64(Vd, Vn, Vm)        EMIT(MINMAX_vector(1, 0, 0b11, Vm, 1, Vn, Vd))
 #define UMINQ_8(Vd, Vn, Vm)         EMIT(MINMAX_vector(1, 1, 0b00, Vm, 1, Vn, Vd))
 #define UMINQ_16(Vd, Vn, Vm)        EMIT(MINMAX_vector(1, 1, 0b01, Vm, 1, Vn, Vd))
 #define UMINQ_32(Vd, Vn, Vm)        EMIT(MINMAX_vector(1, 1, 0b10, Vm, 1, Vn, Vd))
-#define UMINQ_64(Vd, Vn, Vm)        EMIT(MINMAX_vector(1, 1, 0b11, Vm, 1, Vn, Vd))
+//#define UMINQ_64(Vd, Vn, Vm)        EMIT(MINMAX_vector(1, 1, 0b11, Vm, 1, Vn, Vd))
 
 // HADD vector
 #define HADD_vector(Q, U, size, Rm, Rn, Rd)     ((Q)<<30 | (U)<<29 | 0b01110<<24 | (size)<<22 | 1<<21 | (Rm)<<16 | 1<<10 | (Rn)<<5 | (Rd))
@@ -1801,4 +1948,272 @@
 #define PMULL_128(Rd, Rn, Rm)   EMIT(PMULL_gen(0, 0b11, Rm, Rn, Rd))
 #define PMULL2_128(Rd, Rn, Rm)  EMIT(PMULL_gen(1, 0b11, Rm, Rn, Rd))
 
+// ATOMIC extension
+#define ATOMIC_gen(size, A, R, Rs, opc, Rn, Rt) ((size)<<30 | 0b111<<27 | (A)<<23 | (R)<<22 | 1<<21 | (Rs)<<16 | (opc)<<12 | (Rn)<<5 | (Rt))
+// Atomic ADD
+#define LDADDxw(Rs, Rt, Rn)             EMIT(ATOMIC_gen(0b10+rex.w, 0, 0, Rs, 0b000, Rn, Rt))
+#define LDADDAxw(Rs, Rt, Rn)            EMIT(ATOMIC_gen(0b10+rex.w, 1, 0, Rs, 0b000, Rn, Rt))
+#define LDADDALxw(Rs, Rt, Rn)           EMIT(ATOMIC_gen(0b10+rex.w, 1, 1, Rs, 0b000, Rn, Rt))
+#define LDADDLxw(Rs, Rt, Rn)            EMIT(ATOMIC_gen(0b10+rex.w, 0, 1, Rs, 0b000, Rn, Rt))
+#define STADDxw(Rs, Rn)                 EMIT(ATOMIC_gen(0b10+rex.w, 0, 0, Rs, 0b000, Rn, 0b11111))
+#define STADDLxw(Rs, Rn)                EMIT(ATOMIC_gen(0b10+rex.w, 0, 1, Rs, 0b000, Rn, 0b11111))
+#define LDADDB(Rs, Rt, Rn)              EMIT(ATOMIC_gen(0b00, 0, 0, Rs, 0b000, Rn, Rt))
+#define LDADDAB(Rs, Rt, Rn)             EMIT(ATOMIC_gen(0b00, 1, 0, Rs, 0b000, Rn, Rt))
+#define LDADDALB(Rs, Rt, Rn)            EMIT(ATOMIC_gen(0b00, 1, 1, Rs, 0b000, Rn, Rt))
+#define LDADDLB(Rs, Rt, Rn)             EMIT(ATOMIC_gen(0b00, 0, 1, Rs, 0b000, Rn, Rt))
+#define STADDB(Rs, Rn)                  EMIT(ATOMIC_gen(0b00, 0, 0, Rs, 0b000, Rn, 0b11111))
+#define STADDLB(Rs, Rn)                 EMIT(ATOMIC_gen(0b00, 0, 1, Rs, 0b000, Rn, 0b11111))
+#define LDADDH(Rs, Rt, Rn)              EMIT(ATOMIC_gen(0b01, 0, 0, Rs, 0b000, Rn, Rt))
+#define LDADDAH(Rs, Rt, Rn)             EMIT(ATOMIC_gen(0b01, 1, 0, Rs, 0b000, Rn, Rt))
+#define LDADDALH(Rs, Rt, Rn)            EMIT(ATOMIC_gen(0b01, 1, 1, Rs, 0b000, Rn, Rt))
+#define LDADDLH(Rs, Rt, Rn)             EMIT(ATOMIC_gen(0b01, 0, 1, Rs, 0b000, Rn, Rt))
+#define STADDH(Rs, Rn)                  EMIT(ATOMIC_gen(0b01, 0, 0, Rs, 0b000, Rn, 0b11111))
+#define STADDLH(Rs, Rn)                 EMIT(ATOMIC_gen(0b01, 0, 1, Rs, 0b000, Rn, 0b11111))
+// Atomic AND with complement (i.e. BIC)
+#define LDCLRxw(Rs, Rt, Rn)             EMIT(ATOMIC_gen(0b10+rex.w, 0, 0, Rs, 0b001, Rn, Rt))
+#define LDCLRAxw(Rs, Rt, Rn)            EMIT(ATOMIC_gen(0b10+rex.w, 1, 0, Rs, 0b001, Rn, Rt))
+#define LDCLRALxw(Rs, Rt, Rn)           EMIT(ATOMIC_gen(0b10+rex.w, 1, 1, Rs, 0b001, Rn, Rt))
+#define LDCLRLxw(Rs, Rt, Rn)            EMIT(ATOMIC_gen(0b10+rex.w, 0, 1, Rs, 0b001, Rn, Rt))
+#define STCLRxw(Rs, Rn)                 EMIT(ATOMIC_gen(0b10+rex.w, 0, 0, Rs, 0b001, Rn, 0b11111))
+#define STCLRLxw(Rs, Rn)                EMIT(ATOMIC_gen(0b10+rex.w, 0, 1, Rs, 0b001, Rn, 0b11111))
+#define LDCLRB(Rs, Rt, Rn)              EMIT(ATOMIC_gen(0b00, 0, 0, Rs, 0b001, Rn, Rt))
+#define LDCLRAB(Rs, Rt, Rn)             EMIT(ATOMIC_gen(0b00, 1, 0, Rs, 0b001, Rn, Rt))
+#define LDCLRALB(Rs, Rt, Rn)            EMIT(ATOMIC_gen(0b00, 1, 1, Rs, 0b001, Rn, Rt))
+#define LDCLRLB(Rs, Rt, Rn)             EMIT(ATOMIC_gen(0b00, 0, 1, Rs, 0b001, Rn, Rt))
+#define STCLRB(Rs, Rn)                  EMIT(ATOMIC_gen(0b00, 0, 0, Rs, 0b001, Rn, 0b11111))
+#define STCLRLB(Rs, Rn)                 EMIT(ATOMIC_gen(0b00, 0, 1, Rs, 0b001, Rn, 0b11111))
+#define LDCLRH(Rs, Rt, Rn)              EMIT(ATOMIC_gen(0b01, 0, 0, Rs, 0b001, Rn, Rt))
+#define LDCLRAH(Rs, Rt, Rn)             EMIT(ATOMIC_gen(0b01, 1, 0, Rs, 0b001, Rn, Rt))
+#define LDCLRALH(Rs, Rt, Rn)            EMIT(ATOMIC_gen(0b01, 1, 1, Rs, 0b001, Rn, Rt))
+#define LDCLRLH(Rs, Rt, Rn)             EMIT(ATOMIC_gen(0b01, 0, 1, Rs, 0b001, Rn, Rt))
+#define STCLRH(Rs, Rn)                  EMIT(ATOMIC_gen(0b01, 0, 0, Rs, 0b001, Rn, 0b11111))
+#define STCLRLH(Rs, Rn)                 EMIT(ATOMIC_gen(0b01, 0, 1, Rs, 0b001, Rn, 0b11111))
+// Atomic EOR
+#define LDEORxw(Rs, Rt, Rn)             EMIT(ATOMIC_gen(0b10+rex.w, 0, 0, Rs, 0b010, Rn, Rt))
+#define LDEORAxw(Rs, Rt, Rn)            EMIT(ATOMIC_gen(0b10+rex.w, 1, 0, Rs, 0b010, Rn, Rt))
+#define LDEORALxw(Rs, Rt, Rn)           EMIT(ATOMIC_gen(0b10+rex.w, 1, 1, Rs, 0b010, Rn, Rt))
+#define LDEORLxw(Rs, Rt, Rn)            EMIT(ATOMIC_gen(0b10+rex.w, 0, 1, Rs, 0b010, Rn, Rt))
+#define STEORxw(Rs, Rn)                 EMIT(ATOMIC_gen(0b10+rex.w, 0, 0, Rs, 0b010, Rn, 0b11111))
+#define STEORLxw(Rs, Rn)                EMIT(ATOMIC_gen(0b10+rex.w, 0, 1, Rs, 0b010, Rn, 0b11111))
+#define LDEORB(Rs, Rt, Rn)              EMIT(ATOMIC_gen(0b00, 0, 0, Rs, 0b010, Rn, Rt))
+#define LDEORAB(Rs, Rt, Rn)             EMIT(ATOMIC_gen(0b00, 1, 0, Rs, 0b010, Rn, Rt))
+#define LDEORALB(Rs, Rt, Rn)            EMIT(ATOMIC_gen(0b00, 1, 1, Rs, 0b010, Rn, Rt))
+#define LDEORLB(Rs, Rt, Rn)             EMIT(ATOMIC_gen(0b00, 0, 1, Rs, 0b010, Rn, Rt))
+#define STEORB(Rs, Rn)                  EMIT(ATOMIC_gen(0b00, 0, 0, Rs, 0b010, Rn, 0b11111))
+#define STEORLB(Rs, Rn)                 EMIT(ATOMIC_gen(0b00, 0, 1, Rs, 0b010, Rn, 0b11111))
+#define LDEORH(Rs, Rt, Rn)              EMIT(ATOMIC_gen(0b01, 0, 0, Rs, 0b010, Rn, Rt))
+#define LDEORAH(Rs, Rt, Rn)             EMIT(ATOMIC_gen(0b01, 1, 0, Rs, 0b010, Rn, Rt))
+#define LDEORALH(Rs, Rt, Rn)            EMIT(ATOMIC_gen(0b01, 1, 1, Rs, 0b010, Rn, Rt))
+#define LDEORLH(Rs, Rt, Rn)             EMIT(ATOMIC_gen(0b01, 0, 1, Rs, 0b010, Rn, Rt))
+#define STEORH(Rs, Rn)                  EMIT(ATOMIC_gen(0b01, 0, 0, Rs, 0b010, Rn, 0b11111))
+#define STEORLH(Rs, Rn)                 EMIT(ATOMIC_gen(0b01, 0, 1, Rs, 0b010, Rn, 0b11111))
+// Atomic OR
+#define LDSETxw(Rs, Rt, Rn)             EMIT(ATOMIC_gen(0b10+rex.w, 0, 0, Rs, 0b011, Rn, Rt))
+#define LDSETAxw(Rs, Rt, Rn)            EMIT(ATOMIC_gen(0b10+rex.w, 1, 0, Rs, 0b011, Rn, Rt))
+#define LDSETALxw(Rs, Rt, Rn)           EMIT(ATOMIC_gen(0b10+rex.w, 1, 1, Rs, 0b011, Rn, Rt))
+#define LDSETLxw(Rs, Rt, Rn)            EMIT(ATOMIC_gen(0b10+rex.w, 0, 1, Rs, 0b011, Rn, Rt))
+#define STSETxw(Rs, Rn)                 EMIT(ATOMIC_gen(0b10+rex.w, 0, 0, Rs, 0b011, Rn, 0b11111))
+#define STSETLxw(Rs, Rn)                EMIT(ATOMIC_gen(0b10+rex.w, 0, 1, Rs, 0b011, Rn, 0b11111))
+#define LDSETB(Rs, Rt, Rn)              EMIT(ATOMIC_gen(0b00, 0, 0, Rs, 0b011, Rn, Rt))
+#define LDSETAB(Rs, Rt, Rn)             EMIT(ATOMIC_gen(0b00, 1, 0, Rs, 0b011, Rn, Rt))
+#define LDSETALB(Rs, Rt, Rn)            EMIT(ATOMIC_gen(0b00, 1, 1, Rs, 0b011, Rn, Rt))
+#define LDSETLB(Rs, Rt, Rn)             EMIT(ATOMIC_gen(0b00, 0, 1, Rs, 0b011, Rn, Rt))
+#define STSETB(Rs, Rn)                  EMIT(ATOMIC_gen(0b00, 0, 0, Rs, 0b011, Rn, 0b11111))
+#define STSETLB(Rs, Rn)                 EMIT(ATOMIC_gen(0b00, 0, 1, Rs, 0b011, Rn, 0b11111))
+#define LDSETH(Rs, Rt, Rn)              EMIT(ATOMIC_gen(0b01, 0, 0, Rs, 0b011, Rn, Rt))
+#define LDSETAH(Rs, Rt, Rn)             EMIT(ATOMIC_gen(0b01, 1, 0, Rs, 0b011, Rn, Rt))
+#define LDSETALH(Rs, Rt, Rn)            EMIT(ATOMIC_gen(0b01, 1, 1, Rs, 0b011, Rn, Rt))
+#define LDSETLH(Rs, Rt, Rn)             EMIT(ATOMIC_gen(0b01, 0, 1, Rs, 0b011, Rn, Rt))
+#define STSETH(Rs, Rn)                  EMIT(ATOMIC_gen(0b01, 0, 0, Rs, 0b011, Rn, 0b11111))
+#define STSETLH(Rs, Rn)                 EMIT(ATOMIC_gen(0b01, 0, 1, Rs, 0b011, Rn, 0b11111))
+// Atomic Signel Max
+#define LDSMAXxw(Rs, Rt, Rn)             EMIT(ATOMIC_gen(0b10+rex.w, 0, 0, Rs, 0b100, Rn, Rt))
+#define LDSMAXAxw(Rs, Rt, Rn)            EMIT(ATOMIC_gen(0b10+rex.w, 1, 0, Rs, 0b100, Rn, Rt))
+#define LDSMAXALxw(Rs, Rt, Rn)           EMIT(ATOMIC_gen(0b10+rex.w, 1, 1, Rs, 0b100, Rn, Rt))
+#define LDSMAXLxw(Rs, Rt, Rn)            EMIT(ATOMIC_gen(0b10+rex.w, 0, 1, Rs, 0b100, Rn, Rt))
+#define STSMAXxw(Rs, Rn)                 EMIT(ATOMIC_gen(0b10+rex.w, 0, 0, Rs, 0b100, Rn, 0b11111))
+#define STSMAXLxw(Rs, Rn)                EMIT(ATOMIC_gen(0b10+rex.w, 0, 1, Rs, 0b100, Rn, 0b11111))
+#define LDSMAXB(Rs, Rt, Rn)              EMIT(ATOMIC_gen(0b00, 0, 0, Rs, 0b100, Rn, Rt))
+#define LDSMAXAB(Rs, Rt, Rn)             EMIT(ATOMIC_gen(0b00, 1, 0, Rs, 0b100, Rn, Rt))
+#define LDSMAXALB(Rs, Rt, Rn)            EMIT(ATOMIC_gen(0b00, 1, 1, Rs, 0b100, Rn, Rt))
+#define LDSMAXLB(Rs, Rt, Rn)             EMIT(ATOMIC_gen(0b00, 0, 1, Rs, 0b100, Rn, Rt))
+#define STSMAXB(Rs, Rn)                  EMIT(ATOMIC_gen(0b00, 0, 0, Rs, 0b100, Rn, 0b11111))
+#define STSMAXLB(Rs, Rn)                 EMIT(ATOMIC_gen(0b00, 0, 1, Rs, 0b100, Rn, 0b11111))
+#define LDSMAXH(Rs, Rt, Rn)              EMIT(ATOMIC_gen(0b01, 0, 0, Rs, 0b100, Rn, Rt))
+#define LDSMAXAH(Rs, Rt, Rn)             EMIT(ATOMIC_gen(0b01, 1, 0, Rs, 0b100, Rn, Rt))
+#define LDSMAXALH(Rs, Rt, Rn)            EMIT(ATOMIC_gen(0b01, 1, 1, Rs, 0b100, Rn, Rt))
+#define LDSMAXLH(Rs, Rt, Rn)             EMIT(ATOMIC_gen(0b01, 0, 1, Rs, 0b100, Rn, Rt))
+#define STSMAXH(Rs, Rn)                  EMIT(ATOMIC_gen(0b01, 0, 0, Rs, 0b100, Rn, 0b11111))
+#define STSMAXLH(Rs, Rn)                 EMIT(ATOMIC_gen(0b01, 0, 1, Rs, 0b100, Rn, 0b11111))
+// Atomic Signed Min
+#define LDSMINxw(Rs, Rt, Rn)             EMIT(ATOMIC_gen(0b10+rex.w, 0, 0, Rs, 0b101, Rn, Rt))
+#define LDSMINAxw(Rs, Rt, Rn)            EMIT(ATOMIC_gen(0b10+rex.w, 1, 0, Rs, 0b101, Rn, Rt))
+#define LDSMINALxw(Rs, Rt, Rn)           EMIT(ATOMIC_gen(0b10+rex.w, 1, 1, Rs, 0b101, Rn, Rt))
+#define LDSMINLxw(Rs, Rt, Rn)            EMIT(ATOMIC_gen(0b10+rex.w, 0, 1, Rs, 0b101, Rn, Rt))
+#define STSMINxw(Rs, Rn)                 EMIT(ATOMIC_gen(0b10+rex.w, 0, 0, Rs, 0b101, Rn, 0b11111))
+#define STSMINLxw(Rs, Rn)                EMIT(ATOMIC_gen(0b10+rex.w, 0, 1, Rs, 0b101, Rn, 0b11111))
+#define LDSMINB(Rs, Rt, Rn)              EMIT(ATOMIC_gen(0b00, 0, 0, Rs, 0b101, Rn, Rt))
+#define LDSMINAB(Rs, Rt, Rn)             EMIT(ATOMIC_gen(0b00, 1, 0, Rs, 0b101, Rn, Rt))
+#define LDSMINALB(Rs, Rt, Rn)            EMIT(ATOMIC_gen(0b00, 1, 1, Rs, 0b101, Rn, Rt))
+#define LDSMINLB(Rs, Rt, Rn)             EMIT(ATOMIC_gen(0b00, 0, 1, Rs, 0b101, Rn, Rt))
+#define STSMINB(Rs, Rn)                  EMIT(ATOMIC_gen(0b00, 0, 0, Rs, 0b101, Rn, 0b11111))
+#define STSMINLB(Rs, Rn)                 EMIT(ATOMIC_gen(0b00, 0, 1, Rs, 0b101, Rn, 0b11111))
+#define LDSMINH(Rs, Rt, Rn)              EMIT(ATOMIC_gen(0b01, 0, 0, Rs, 0b101, Rn, Rt))
+#define LDSMINAH(Rs, Rt, Rn)             EMIT(ATOMIC_gen(0b01, 1, 0, Rs, 0b101, Rn, Rt))
+#define LDSMINALH(Rs, Rt, Rn)            EMIT(ATOMIC_gen(0b01, 1, 1, Rs, 0b101, Rn, Rt))
+#define LDSMINLH(Rs, Rt, Rn)             EMIT(ATOMIC_gen(0b01, 0, 1, Rs, 0b101, Rn, Rt))
+#define STSMINH(Rs, Rn)                  EMIT(ATOMIC_gen(0b01, 0, 0, Rs, 0b101, Rn, 0b11111))
+#define STSMINLH(Rs, Rn)                 EMIT(ATOMIC_gen(0b01, 0, 1, Rs, 0b101, Rn, 0b11111))
+// Atomic Unsigned Max
+#define LDUMAXxw(Rs, Rt, Rn)             EMIT(ATOMIC_gen(0b10+rex.w, 0, 0, Rs, 0b110, Rn, Rt))
+#define LDUMAXAxw(Rs, Rt, Rn)            EMIT(ATOMIC_gen(0b10+rex.w, 1, 0, Rs, 0b110, Rn, Rt))
+#define LDUMAXALxw(Rs, Rt, Rn)           EMIT(ATOMIC_gen(0b10+rex.w, 1, 1, Rs, 0b110, Rn, Rt))
+#define LDUMAXLxw(Rs, Rt, Rn)            EMIT(ATOMIC_gen(0b10+rex.w, 0, 1, Rs, 0b110, Rn, Rt))
+#define STUMAXxw(Rs, Rn)                 EMIT(ATOMIC_gen(0b10+rex.w, 0, 0, Rs, 0b110, Rn, 0b11111))
+#define STUMAXLxw(Rs, Rn)                EMIT(ATOMIC_gen(0b10+rex.w, 0, 1, Rs, 0b110, Rn, 0b11111))
+#define LDUMAXB(Rs, Rt, Rn)              EMIT(ATOMIC_gen(0b00, 0, 0, Rs, 0b110, Rn, Rt))
+#define LDUMAXAB(Rs, Rt, Rn)             EMIT(ATOMIC_gen(0b00, 1, 0, Rs, 0b110, Rn, Rt))
+#define LDUMAXALB(Rs, Rt, Rn)            EMIT(ATOMIC_gen(0b00, 1, 1, Rs, 0b110, Rn, Rt))
+#define LDUMAXLB(Rs, Rt, Rn)             EMIT(ATOMIC_gen(0b00, 0, 1, Rs, 0b110, Rn, Rt))
+#define STUMAXB(Rs, Rn)                  EMIT(ATOMIC_gen(0b00, 0, 0, Rs, 0b110, Rn, 0b11111))
+#define STUMAXLB(Rs, Rn)                 EMIT(ATOMIC_gen(0b00, 0, 1, Rs, 0b110, Rn, 0b11111))
+#define LDUMAXH(Rs, Rt, Rn)              EMIT(ATOMIC_gen(0b01, 0, 0, Rs, 0b110, Rn, Rt))
+#define LDUMAXAH(Rs, Rt, Rn)             EMIT(ATOMIC_gen(0b01, 1, 0, Rs, 0b110, Rn, Rt))
+#define LDUMAXALH(Rs, Rt, Rn)            EMIT(ATOMIC_gen(0b01, 1, 1, Rs, 0b110, Rn, Rt))
+#define LDUMAXLH(Rs, Rt, Rn)             EMIT(ATOMIC_gen(0b01, 0, 1, Rs, 0b110, Rn, Rt))
+#define STUMAXH(Rs, Rn)                  EMIT(ATOMIC_gen(0b01, 0, 0, Rs, 0b110, Rn, 0b11111))
+#define STUMAXLH(Rs, Rn)                 EMIT(ATOMIC_gen(0b01, 0, 1, Rs, 0b110, Rn, 0b11111))
+// Atomic Unsigned Min
+#define LDUMINxw(Rs, Rt, Rn)             EMIT(ATOMIC_gen(0b10+rex.w, 0, 0, Rs, 0b111, Rn, Rt))
+#define LDUMINAxw(Rs, Rt, Rn)            EMIT(ATOMIC_gen(0b10+rex.w, 1, 0, Rs, 0b111, Rn, Rt))
+#define LDUMINALxw(Rs, Rt, Rn)           EMIT(ATOMIC_gen(0b10+rex.w, 1, 1, Rs, 0b111, Rn, Rt))
+#define LDUMINLxw(Rs, Rt, Rn)            EMIT(ATOMIC_gen(0b10+rex.w, 0, 1, Rs, 0b111, Rn, Rt))
+#define STUMINxw(Rs, Rn)                 EMIT(ATOMIC_gen(0b10+rex.w, 0, 0, Rs, 0b111, Rn, 0b11111))
+#define STUMINLxw(Rs, Rn)                EMIT(ATOMIC_gen(0b10+rex.w, 0, 1, Rs, 0b111, Rn, 0b11111))
+#define LDUMINB(Rs, Rt, Rn)              EMIT(ATOMIC_gen(0b00, 0, 0, Rs, 0b111, Rn, Rt))
+#define LDUMINAB(Rs, Rt, Rn)             EMIT(ATOMIC_gen(0b00, 1, 0, Rs, 0b111, Rn, Rt))
+#define LDUMINALB(Rs, Rt, Rn)            EMIT(ATOMIC_gen(0b00, 1, 1, Rs, 0b111, Rn, Rt))
+#define LDUMINLB(Rs, Rt, Rn)             EMIT(ATOMIC_gen(0b00, 0, 1, Rs, 0b111, Rn, Rt))
+#define STUMINB(Rs, Rn)                  EMIT(ATOMIC_gen(0b00, 0, 0, Rs, 0b111, Rn, 0b11111))
+#define STUMINLB(Rs, Rn)                 EMIT(ATOMIC_gen(0b00, 0, 1, Rs, 0b111, Rn, 0b11111))
+#define LDUMINH(Rs, Rt, Rn)              EMIT(ATOMIC_gen(0b01, 0, 0, Rs, 0b111, Rn, Rt))
+#define LDUMINAH(Rs, Rt, Rn)             EMIT(ATOMIC_gen(0b01, 1, 0, Rs, 0b111, Rn, Rt))
+#define LDUMINALH(Rs, Rt, Rn)            EMIT(ATOMIC_gen(0b01, 1, 1, Rs, 0b111, Rn, Rt))
+#define LDUMINLH(Rs, Rt, Rn)             EMIT(ATOMIC_gen(0b01, 0, 1, Rs, 0b111, Rn, Rt))
+#define STUMINH(Rs, Rn)                  EMIT(ATOMIC_gen(0b01, 0, 0, Rs, 0b111, Rn, 0b11111))
+#define STUMINLH(Rs, Rn)                 EMIT(ATOMIC_gen(0b01, 0, 1, Rs, 0b111, Rn, 0b11111))
+
+// SWAPxx(Xs, Xt, Xn) : [Xn] => Xt, Xs => [Xn]
+#define SWAP_gen(size, A, R, Rs, Rn, Rt)    ((size)<<30 | 0b111<<27 | (A)<<23 | (R)<<22 | 1<<21 | (Rs)<<16 | 1<<15 | (Rn)<<5 | (Rt))
+#define SWPxw(Rs, Rt, Rn)               EMIT(SWAP_gen(0b10+rex.w, 0, 0, Rs, Rn, Rt))
+#define SWPAxw(Rs, Rt, Rn)              EMIT(SWAP_gen(0b10+rex.w, 1, 0, Rs, Rn, Rt))
+#define SWPALxw(Rs, Rt, Rn)             EMIT(SWAP_gen(0b10+rex.w, 1, 1, Rs, Rn, Rt))
+#define SWPLxw(Rs, Rt, Rn)              EMIT(SWAP_gen(0b10+rex.w, 0, 1, Rs, Rn, Rt))
+#define SWPB(Rs, Rt, Rn)                EMIT(SWAP_gen(0b00, 0, 0, Rs, Rn, Rt))
+#define SWPAB(Rs, Rt, Rn)               EMIT(SWAP_gen(0b00, 1, 0, Rs, Rn, Rt))
+#define SWPALB(Rs, Rt, Rn)              EMIT(SWAP_gen(0b00, 1, 1, Rs, Rn, Rt))
+#define SWPLB(Rs, Rt, Rn)               EMIT(SWAP_gen(0b00, 0, 1, Rs, Rn, Rt))
+#define SWPH(Rs, Rt, Rn)                EMIT(SWAP_gen(0b01, 0, 0, Rs, Rn, Rt))
+#define SWPAH(Rs, Rt, Rn)               EMIT(SWAP_gen(0b01, 1, 0, Rs, Rn, Rt))
+#define SWPALH(Rs, Rt, Rn)              EMIT(SWAP_gen(0b01, 1, 1, Rs, Rn, Rt))
+#define SWPLH(Rs, Rt, Rn)               EMIT(SWAP_gen(0b01, 0, 1, Rs, Rn, Rt))
+
+#define CAS_gen(size, L, Rs, O0, Rn, Rt)    ((size)<<30 | 0b001000<<24 | 1<<23 | (L)<<22 | 1<<21 | (Rs)<<16 | (O0)<<15 | 0b11111<<10 | (Rn)<<5 | (Rt))
+// Compare and Swap compare Rs with [Rn], write Rt is same, return old [Rn] in Rs
+#define CASxw(Rs, Rt, Rn)               EMIT(CAS_gen(0b10+rex.w, 0, Rs, 0, Rn, Rt))
+#define CASAxw(Rs, Rt, Rn)              EMIT(CAS_gen(0b10+rex.w, 1, Rs, 0, Rn, Rt))
+#define CASALxw(Rs, Rt, Rn)             EMIT(CAS_gen(0b10+rex.w, 1, Rs, 1, Rn, Rt))
+#define CASLxw(Rs, Rt, Rn)              EMIT(CAS_gen(0b10+rex.w, 0, Rs, 1, Rn, Rt))
+#define CASB(Rs, Rt, Rn)                EMIT(CAS_gen(0b00, 0, Rs, 0, Rn, Rt))
+#define CASAB(Rs, Rt, Rn)               EMIT(CAS_gen(0b00, 1, Rs, 0, Rn, Rt))
+#define CASALB(Rs, Rt, Rn)              EMIT(CAS_gen(0b00, 1, Rs, 1, Rn, Rt))
+#define CASLB(Rs, Rt, Rn)               EMIT(CAS_gen(0b00, 0, Rs, 1, Rn, Rt))
+#define CASH(Rs, Rt, Rn)                EMIT(CAS_gen(0b01, 0, Rs, 0, Rn, Rt))
+#define CASAH(Rs, Rt, Rn)               EMIT(CAS_gen(0b01, 1, Rs, 0, Rn, Rt))
+#define CASALH(Rs, Rt, Rn)              EMIT(CAS_gen(0b01, 1, Rs, 1, Rn, Rt))
+#define CASLH(Rs, Rt, Rn)               EMIT(CAS_gen(0b01, 0, Rs, 1, Rn, Rt))
+
+#define CASP_gen(size, L, Rs, O0, Rn, Rt)   ((size)<<30 | 0b001000<<24 | 0<<23 | (L)<<22 | 1<<21 | (Rs)<<16 | (O0)<<15 | 0b11111<<10 | (Rn)<<5 | (Rt))
+// Compare and Swap with pair, Rs, Rs+1 and Rt,Rt+1 with [Rt]
+#define CASPxw(Rs, Rt, Rn)              EMIT(CASP_gen(0b00+rex.w, 0, Rs, 0, Rn, Rt))
+#define CASPAxw(Rs, Rt, Rn)             EMIT(CASP_gen(0b00+rex.w, 1, Rs, 0, Rn, Rt))
+#define CASPALxw(Rs, Rt, Rn)            EMIT(CASP_gen(0b00+rex.w, 1, Rs, 1, Rn, Rt))
+#define CASPLxw(Rs, Rt, Rn)             EMIT(CASP_gen(0b00+rex.w, 0, Rs, 1, Rn, Rt))
+
+// FLAGM extension
+// Invert Carry Flag
+#define CFINV()             EMIT(0b1101010100<<22 | 0b0100<<12 | 0b000<<5 | 0b11111)
+
+#define RMIF_gen(imm6, Rn, mask)        (0b10111010000<<21 | (imm6)<<15 | 0b00001<<10 | (Rn)<<5 | (mask))
+// Rotate right reg and use as NZCV
+#define RMIF(Xn, shift, mask)           EMIT(RMIF_gen(shift, Xn, mask))
+
+#define SETF_gen(sz, Rn)                (0b00111010000<<21 | (sz)<<14 | 0b0010<<10 | (Rn)<<5 | 0b1101)
+// Set NZVc with 8bit value of reg: N=bit7, Z=[0..7]==0, V=bit8 eor bit7, C unchanged
+#define SETF8(Wn)                       EMIT(SETF_gen(0, Wn))
+// Set NZVc with 16bit value of reg: N=bit15, Z=[0..15]==0, V=bit16 eor bit15, C unchanged
+#define SETF16(Wn)                      EMIT(SETF_gen(1, Wn))
+
+// FLAGM2 extension
+// NZCV -> N=0 Z=C|V C=C&!V V=0
+#define AXFLAG()            EMIT(0b1101010100<<22 | 0b0100<<12 | 0b010<<5 | 0b11111)
+// NZCV -> N=!C&!Z Z=Z&C C=C|Z V=!C&Z
+#define XAFLAG()            EMIT(0b1101010100<<22 | 0b0100<<12 | 0b001<<5 | 0b11111)
+
+// FRINTTS extension
+#define FRINTxx_scalar(type, op, Rn, Rd)  (0b11110<<24 | (type)<<22 | 1<<21 | 0b0100<<17 | (op)<<15 | 0b10000<<10 | (Rn)<<5 | (Rd))
+#define FRINT32ZS(Sd, Sn)           EMIT(FRINTxx_scalar(0b00, 0b00, Sn, Sd))
+#define FRINT32ZD(Dd, Dn)           EMIT(FRINTxx_scalar(0b01, 0b00, Dn, Dd))
+#define FRINT32XS(Sd, Sn)           EMIT(FRINTxx_scalar(0b00, 0b01, Sn, Sd))
+#define FRINT32XD(Dd, Dn)           EMIT(FRINTxx_scalar(0b01, 0b01, Dn, Dd))
+#define FRINT64ZS(Sd, Sn)           EMIT(FRINTxx_scalar(0b00, 0b10, Sn, Sd))
+#define FRINT64ZD(Dd, Dn)           EMIT(FRINTxx_scalar(0b01, 0b10, Dn, Dd))
+#define FRINT64XS(Sd, Sn)           EMIT(FRINTxx_scalar(0b00, 0b11, Sn, Sd))
+#define FRINT64XD(Dd, Dn)           EMIT(FRINTxx_scalar(0b01, 0b11, Dn, Dd))
+
+// CRC32 extension
+#define CRC32C_gen(sf, Rm, sz, Rn, Rd)  ((sf)<<31 | 0b11010110<<21 | (Rm)<<16 | 0b010<<13 | 1<<12 | (sz)<<10 | (Rn)<<5 | (Rd))
+#define CRC32CB(Wd, Wn, Wm)         EMIT(CRC32C_gen(0, Wm, 0b00, Wn, Wd))
+#define CRC32CH(Wd, Wn, Wm)         EMIT(CRC32C_gen(0, Wm, 0b01, Wn, Wd))
+#define CRC32CW(Wd, Wn, Wm)         EMIT(CRC32C_gen(0, Wm, 0b10, Wn, Wd))
+#define CRC32CX(Wd, Wn, Xm)         EMIT(CRC32C_gen(1, Xm, 0b11, Wn, Wd))
+#define CRC32Cxw(Wd, Wn, Rm)        EMIT(CRC32C_gen(rex.w, Rm, 0b10|rex.w, Wn, Wd))
+
+// SHA1 extension
+#define SHA1H_gen(Rn, Rd)       (0b01011110<<24 | 0b10100<<17 | 0b10<<10 | (Rn)<<5 | (Rd))
+// SHA1 fixed rotate (ROL 30 of 32bits value)
+#define SHA1H(Sd, Sn)           EMIT(SHA1H_gen(Sn, Sd))
+
+#define SHA1SU1_gen(Rn, Rd)     (0b01011110<<24 | 0b10100<<17 | 0b00001<<12 | 0b10<<10 | (Rn)<<5 | (Rd))
+// SHA1 schedule update 1
+#define SHA1SU1(Vd, Vn)         EMIT(SHA1SU1_gen(Vn, Vd))
+
+#define SHA1C_gen(Rm, Rn, Rd)   (0b01011110<<24 | (Rm)<<16 | (Rn)<<5 | (Rd))
+// SHA1 hash update (choose)
+#define SHA1C(Qd, Sn, Vm)       EMIT(SHA1C_gen(Vm, Sn, Qd))
+
+#define SHA1M_gen(Rm, Rn, Rd)   (0b01011110<<24 | (Rm)<<16 | 0b010<<12 | (Rn)<<5 | (Rd))
+// SHA1 hash update (majority)
+#define SHA1M(Qd, Sn, Vm)       EMIT(SHA1M_gen(Vm, Sn, Qd))
+
+#define SHA1P_gen(Rm, Rn, Rd)   (0b01011110<<24 | (Rm)<<16 | 0b001<<12 | (Rn)<<5 | (Rd))
+// SHA1 hash update (parity)
+#define SHA1P(Qd, Sn, Vm)       EMIT(SHA1P_gen(Vm, Sn, Qd))
+
+#define SHA256SU0_gen(Rn,Rd)    (0b01011110<<24 | 0b10100<<17 | 0b00010<<12 | 0b10<<10 | (Rn)<<5 | (Rd))
+//SHA256 schedule update 0
+#define SHA256SU0(Vd, Vn)       EMIT(SHA256SU0_gen(Vn, Vd))
+
+#define SHA256SU1_gen(Rm, Rn, Rd)   (0b01011110<<24 | (Rm)<<16 | 0b110<<12 | (Rn)<<5 | (Rd))
+//SHA256 schedule update 1
+#define SHA256SU1(Vd, Vn, Vm)       EMIT(SHA256SU1_gen(Vm, Vn, Vd))
+
+#define SHA256H_gen(Rm, Rn, Rd) (0b01011110<<24 | (Rm)<<16 | 0b100<<12 | (Rn)<<5 | (Rd))
+//SHA256 hash update (part 1)
+#define SHA256H(Vd, Vn, Vm)     EMIT(SHA256H_gen(Vm, Vn, Vd))
+
+#define SHA256H2_gen(Rm, Rn, Rd)    (0b01011110<<24 | (Rm)<<16 | 0b101<<12 | (Rn)<<5 | (Rd))
+//SHA256 hash update (part 2)
+#define SHA256H2(Vd, Vn, Vm)        EMIT(SHA256H2_gen(Vm, Vn, Vd))
+
 #endif  //__ARM64_EMITTER_H__

src/dynarec/arm64/arm64_lock.S

@@ -15,8 +15,10 @@
 .global arm64_lock_write_dd
 .global arm64_lock_read_dq
 .global arm64_lock_write_dq
-.global arm64_lock_xchg
+.global arm64_lock_xchg_dd
 .global arm64_lock_xchg_d
+.global arm64_lock_xchg_h
+.global arm64_lock_xchg_b
 .global arm64_lock_storeifnull
 .global arm64_lock_storeifnull_d
 .global arm64_lock_storeifref
@@ -27,6 +29,10 @@
 .global arm64_lock_incif0
 .global arm64_lock_decifnot0
 .global arm64_lock_store
+.global arm64_lock_store_dd
+.global arm64_lock_get_b
+.global arm64_lock_get_d
+.global arm64_lock_get_dd
 
 arm64_lock_read_b:
     dmb     ish
@@ -97,13 +103,13 @@ arm64_lock_write_dq:
     ret
 
 
-arm64_lock_xchg:
+arm64_lock_xchg_dd:
     dmb     ish
-arm64_lock_xchg_0:
+arm64_lock_xchg_dd_0:
     // address is x0, value is x1, return old value in x0
     ldaxr   x2, [x0]
     stlxr   w3, x1, [x0]
-    cbnz    w3, arm64_lock_xchg_0
+    cbnz    w3, arm64_lock_xchg_dd_0
     mov     x0, x2
     ret
 
@@ -117,6 +123,26 @@ arm64_lock_xchg_d_0:
     mov     w0, w2
     ret
 
+arm64_lock_xchg_h:
+    dmb     ish
+arm64_lock_xchg_h_0:
+    // address is x0, value is x1, return old value in x0
+    ldaxrh  w2, [x0]
+    stlxrh  w3, w1, [x0]
+    cbnz    w3, arm64_lock_xchg_h_0
+    mov     w0, w2
+    ret
+
+arm64_lock_xchg_b:
+    dmb     ish
+arm64_lock_xchg_b_0:
+    // address is x0, value is x1, return old value in x0
+    ldaxrb   w2, [x0]
+    stlxrb   w3, w1, [x0]
+    cbnz    w3, arm64_lock_xchg_b_0
+    mov     w0, w2
+    ret
+
 arm64_lock_storeifnull:
     dmb     ish
 1:
@@ -232,3 +258,20 @@ arm64_lock_store:
     str     w1, [x0]
     dmb     ish
     ret
+
+arm64_lock_store_dd:
+    str     x1, [x0]
+    dmb     ish
+    ret
+
+arm64_lock_get_b:
+    ldaxrb  w0, [x0]
+    ret
+
+arm64_lock_get_d:
+    ldaxr   w0, [x0]
+    ret
+
+arm64_lock_get_dd:
+    ldaxr   x0, [x0]
+    ret

src/dynarec/arm64/arm64_lock.h

@@ -27,40 +27,58 @@ extern void arm64_lock_read_dq(uint64_t * a, uint64_t* b, void* addr);
 // STLXRD of ADDR, return 0 if ok, 1 if not
 extern int arm64_lock_write_dq(uint64_t a, uint64_t b, void* addr);
 
-// Atomicaly exchange value at [p] with val, return old p
-extern uintptr_t arm64_lock_xchg(void* p, uintptr_t val);
+// Atomically exchange value at [p] with val, return old p
+extern uintptr_t arm64_lock_xchg_dd(void* p, uintptr_t val);
 
-// Atomicaly exchange value at [p] with val, return old p
+// Atomically exchange value at [p] with val, return old p
 extern uint32_t arm64_lock_xchg_d(void* p, uint32_t val);
 
-// Atomicaly store value to [p] only if [p] is NULL. Return old [p] value
+// Atomically exchange value at [p] with val, return old p
+extern uint32_t arm64_lock_xchg_h(void* p, uint32_t val);
+
+// Atomically exchange value at [p] with val, return old p
+extern uint32_t arm64_lock_xchg_b(void* p, uint32_t val);
+
+// Atomically store value to [p] only if [p] is NULL. Return old [p] value
 extern uint32_t arm64_lock_storeifnull_d(void*p, uint32_t val);
 
-// Atomicaly store value to [p] only if [p] is NULL. Return old [p] value
+// Atomically store value to [p] only if [p] is NULL. Return old [p] value
 extern void* arm64_lock_storeifnull(void*p, void* val);
 
-// Atomicaly store value to [p] only if [p] is ref. Return new [p] value (so val or old)
+// Atomically store value to [p] only if [p] is ref. Return new [p] value (so val or old)
 extern void* arm64_lock_storeifref(void*p, void* val, void* ref);
 
-// Atomicaly store value to [p] only if [p] is ref. Return new [p] value (so val or old)
+// Atomically store value to [p] only if [p] is ref. Return new [p] value (so val or old)
 extern uint32_t arm64_lock_storeifref_d(void*p, uint32_t val, uint32_t ref);
 
-// Atomicaly store value to [p] only if [p] is ref. Return new [p] value (so val or old)
+// Atomically store value to [p] only if [p] is ref. Return new [p] value (so val or old)
 extern uint32_t arm64_lock_storeifref2_d(void*p, uint32_t val, uint32_t ref);
 
-// decrement atomicaly the byte at [p] (but only if p not 0)
+// decrement atomically the byte at [p] (but only if p not 0)
 extern void arm64_lock_decifnot0b(void*p);
 
 // atomic store (with memory barrier)
 extern void arm64_lock_storeb(void*p, uint8_t b);
 
-// increment atomicaly the int at [p] only if it was 0. Return the old value of [p]
+// increment atomically the int at [p] only if it was 0. Return the old value of [p]
 extern int arm64_lock_incif0(void*p);
 
-// decrement atomicaly the int at [p] (but only if p not 0)
+// decrement atomically the int at [p] (but only if p not 0)
 extern int arm64_lock_decifnot0(void*p);
 
 // atomic store (with memory barrier)
 extern void arm64_lock_store(void*p, uint32_t v);
 
-#endif  //__ARM64_LOCK__H__
+// atomic store (with memory barrier)
+extern void arm64_lock_store_dd(void*p, uint64_t v);
+
+// atomic get (with memory barrier)
+extern uint8_t arm64_lock_get_b(void*p);
+
+// atomic get (with memory barrier)
+extern uint32_t arm64_lock_get_d(void*p);
+
+// atomic get (with memory barrier)
+extern void* arm64_lock_get_dd(void*p);
+
+#endif  //__ARM64_LOCK__H__

src/dynarec/arm64/arm64_printer.c

@@ -16,7 +16,7 @@ static const char* conds[] = {"cEQ", "cNE", "cCS", "cCC", "cMI", "cPL", "cVS", "
 #define abs(A) (((A)<0)?(-(A)):(A))
 
 typedef struct arm64_print_s {
-    int N, S, U, L, Q;
+    int N, S, U, L, Q, A, R;
     int t, n, m, d, t2, a;
     int f, c, o, h, p;
     int i, r, s;
@@ -60,6 +60,8 @@ int isMask(uint32_t opcode, const char* mask, arm64_print_t *a)
             case 'N': a->N = (a->N<<1) | v; break;
             case 'S': a->S = (a->S<<1) | v; break;
             case 'U': a->U = (a->U<<1) | v; break;
+            case 'A': a->A = (a->A<<1) | v; break;
+            case 'R': a->R = (a->R<<1) | v; break;
             case 'L': a->L = (a->L<<1) | v; break;
             case 'Q': a->Q = (a->Q<<1) | v; break;
             case 't': a->t = (a->t<<1) | v; break;
@@ -160,13 +162,60 @@ const char* arm64_print(uint32_t opcode, uintptr_t addr)
     if(isMask(opcode, "1x111000010iiiiiiiii01nnnnnttttt", &a)) {
         int size = (opcode>>30)&3;
         int offset = signExtend(imm, 9);
-        snprintf(buff, sizeof(buff), "LDR %s, [%s], %s0x%x", (size==0b10)?Wt[Rt]:Xt[Rt], XtSp[Rn], (offset<0)?"-":"", abs(offset));
+        snprintf(buff, sizeof(buff), "LDUR %s, [%s], %s0x%x", (size==0b10)?Wt[Rt]:Xt[Rt], XtSp[Rn], (offset<0)?"-":"", abs(offset));
         return buff;
     }
     if(isMask(opcode, "1x111000010iiiiiiiii11nnnnnttttt", &a)) {
         int size = (opcode>>30)&3;
         int offset = signExtend(imm, 9);
-        snprintf(buff, sizeof(buff), "LDR %s, [%s, %s0x%x]!", (size==0b10)?Wt[Rt]:Xt[Rt], XtSp[Rn], (offset<0)?"-":"", abs(offset));
+        snprintf(buff, sizeof(buff), "LDUR %s, [%s, %s0x%x]!", (size==0b10)?Wt[Rt]:Xt[Rt], XtSp[Rn], (offset<0)?"-":"", abs(offset));
+        return buff;
+    }
+    if(isMask(opcode, "1x111000010iiiiiiiii00nnnnnttttt", &a)) {
+        int size = (opcode>>30)&3;
+        int offset = signExtend(imm, 9);
+        snprintf(buff, sizeof(buff), "LDUR %s, [%s, %s0x%x]", (size==0b10)?Wt[Rt]:Xt[Rt], XtSp[Rn], (offset<0)?"-":"", abs(offset));
+        return buff;
+    }
+    if(isMask(opcode, "00111000010iiiiiiiii00nnnnnttttt", &a)) {
+        int offset = signExtend(imm, 9);
+        snprintf(buff, sizeof(buff), "LDURB %s, [%s, %s0x%x]", Wt[Rt], XtSp[Rn], (offset<0)?"-":"", abs(offset));
+        return buff;
+    }
+    if(isMask(opcode, "01111000010iiiiiiiii00nnnnnttttt", &a)) {
+        int offset = signExtend(imm, 9);
+        snprintf(buff, sizeof(buff), "LDURH %s, [%s, %s0x%x]", Wt[Rt], XtSp[Rn], (offset<0)?"-":"", abs(offset));
+        return buff;
+    }
+    if(isMask(opcode, "001110001x0iiiiiiiii00nnnnnttttt", &a)) {
+        int offset = signExtend(imm, 9);
+        snprintf(buff, sizeof(buff), "LDURSB %s, [%s, %s0x%x]", a.x?Xt[Rt]:Wt[Rt], XtSp[Rn], (offset<0)?"-":"", abs(offset));
+        return buff;
+    }
+    if(isMask(opcode, "011110001x0iiiiiiiii00nnnnnttttt", &a)) {
+        int offset = signExtend(imm, 9);
+        snprintf(buff, sizeof(buff), "LDURSH %s, [%s, %s0x%x]", a.x?Xt[Rt]:Wt[Rt], XtSp[Rn], (offset<0)?"-":"", abs(offset));
+        return buff;
+    }
+    if(isMask(opcode, "10111000100iiiiiiiii00nnnnnttttt", &a)) {
+        int offset = signExtend(imm, 9);
+        snprintf(buff, sizeof(buff), "LDURSW %s, [%s, %s0x%x]", Xt[Rt], XtSp[Rn], (offset<0)?"-":"", abs(offset));
+        return buff;
+    }
+    if(isMask(opcode, "1x111000000iiiiiiiii00nnnnnttttt", &a)) {
+        int size = (opcode>>30)&3;
+        int offset = signExtend(imm, 9);
+        snprintf(buff, sizeof(buff), "STUR %s, [%s, %s0x%x]", (size==0b10)?Wt[Rt]:Xt[Rt], XtSp[Rn], (offset<0)?"-":"", abs(offset));
+        return buff;
+    }
+    if(isMask(opcode, "00111000000iiiiiiiii00nnnnnttttt", &a)) {
+        int offset = signExtend(imm, 9);
+        snprintf(buff, sizeof(buff), "STURB %s, [%s, %s0x%x]", Wt[Rt], XtSp[Rn], (offset<0)?"-":"", abs(offset));
+        return buff;
+    }
+    if(isMask(opcode, "01111000000iiiiiiiii00nnnnnttttt", &a)) {
+        int offset = signExtend(imm, 9);
+        snprintf(buff, sizeof(buff), "STURH %s, [%s, %s0x%x]", Wt[Rt], XtSp[Rn], (offset<0)?"-":"", abs(offset));
         return buff;
     }
     if(isMask(opcode, "1x11100101iiiiiiiiiiiinnnnnttttt", &a)) {
@@ -748,6 +797,11 @@ const char* arm64_print(uint32_t opcode, uintptr_t addr)
         snprintf(buff, sizeof(buff), "CSEL %s, %s, %s, %s", sf?Xt[Rd]:Wt[Rd], sf?Xt[Rn]:Wt[Rn], sf?Xt[Rm]:Wt[Rm], conds[cond]);    
         return buff;
     }
+    if(isMask(opcode, "f1111010010mmmmmcccc00nnnnn0iiii", &a)) {
+        snprintf(buff, sizeof(buff), "CCMP %s, %s, %s 0x%x", sf?Xt[Rn]:Wt[Rn], sf?Xt[Rm]:Wt[Rm], conds[cond], imm);
+        return buff;
+    }
+
     // MISC Bits
     if(isMask(opcode, "f10110101100000000010onnnnnddddd", &a)) {
         snprintf(buff, sizeof(buff), "CL%c %s, %s", option?'S':'Z', sf?Xt[Rd]:Wt[Rd], sf?Xt[Rn]:Wt[Rn]);
@@ -903,6 +957,54 @@ const char* arm64_print(uint32_t opcode, uintptr_t addr)
         snprintf(buff, sizeof(buff), "VCMEQ V%d.%s, V%d.%s, V%d.%s", Rd, Vd, Rn, Vd, Rm, Vd);
         return buff;
     }
+    // CMP zero
+    if(isMask(opcode, "0QU01110ff100000100o10nnnnnddddd", &a)) {
+        const char* Y[] = {"8B", "16B", "4H", "8H", "2S", "4S", "??", "2D"};
+        const char* Z[] = {"GT", "GE", "EQ", "LE"};
+        const char* Vd = Y[((sf)<<1) | a.Q];
+        const char* Cond = Z[(a.o << 1 | a.U)];
+        snprintf(buff, sizeof(buff), "VCM%s V%d.%s, V%d.%s, #0", Cond, Rd, Vd, Rn, Vd);
+        return buff;
+    }
+    // CMPLT zero
+    if(isMask(opcode, "0Q001110ff100000101010nnnnnddddd", &a)) {
+        const char* Y[] = {"8B", "16B", "4H", "8H", "2S", "4S", "??", "2D"};
+        const char* Vd = Y[((sf)<<1) | a.Q];
+        snprintf(buff, sizeof(buff), "VCMLT V%d.%s, V%d.%s, #0", Rd, Vd, Rn, Vd);
+        return buff;
+    }
+    // MIN/MAX
+    if(isMask(opcode, "0QU01110ff1mmmmm0110o1nnnnnddddd", &a)) {
+        const char* Y[] = {"8B", "16B", "4H", "8H", "2S", "4S", "??", "2D"};
+        const char* Vd = Y[((sf)<<1) | a.Q];
+        snprintf(buff, sizeof(buff), "%c%s V%d.%s, V%d.%s, V%d.%s", a.U?'U':'S', a.o?"MIN":"MAX", Rd, Vd, Rn, Vd, Rm, Vd);
+        return buff;
+    }
+
+    // MOV immediate (not)shifted 8bits
+    if(isMask(opcode, "0Q00111100000iii111001iiiiiddddd", &a)) {
+        const char* Y[] = {"8B", "16B"};
+        const char* Vd = Y[a.Q];
+        snprintf(buff, sizeof(buff), "MOVI V%d.%s, #0x%x", Rd, Vd, imm);
+        return buff;
+    }
+    // MOV immediate notshifted 16bits & 32bits
+    if(isMask(opcode, "0Q00111100000iiif00001iiiiiddddd", &a)) {
+        const char* Y[] = {"2S", "4S", "4H", "8H"};
+        const char* Vd = Y[(sf<<1)| a.Q];
+        int sh = 0;
+
+        snprintf(buff, sizeof(buff), "MOVI V%d.%s, #0x%x", Rd, Vd, imm<<sh);
+        return buff;
+    }
+    // MOV immediate shifted 16bits
+    if(isMask(opcode, "0Q00111100000iii101001iiiiiddddd", &a)) {
+        const char* Y[] = {"4H", "8H"};
+        const char* Vd = Y[a.Q];
+
+        snprintf(buff, sizeof(buff), "MOVI V%d.%s, #0x%x", Rd, Vd, imm<<8);
+        return buff;
+    }
 
     // Shift
     if(isMask(opcode, "0QU011110hhhhrrr000001nnnnnddddd", &a)) {
@@ -965,7 +1067,30 @@ const char* arm64_print(uint32_t opcode, uintptr_t addr)
         if(!offset)
             snprintf(buff, sizeof(buff), "%s %c%d, [%s]", op?"STR":"LDR", s, Rt, XtSp[Rn]);
         else
-            snprintf(buff, sizeof(buff), "%s %c%d, [%s, %d]", op?"STR":"LDR", s, Rt, XtSp[Rn], offset);
+            snprintf(buff, sizeof(buff), "%s %c%d, [%s, 0x%x]", op?"STR":"LDR", s, Rt, XtSp[Rn], offset);
+        return buff;
+    }
+    if(isMask(opcode, "ss111100cc1mmmmmoooS10nnnnnttttt", &a)) {
+        char s = '?';
+        int size=imms;
+        int op=0;
+        if(size==0 && opc==1) {s='B';}
+        else if(size==1 && opc==1) {s='H';}
+        else if(size==2 && opc==1) {s='S';}
+        else if(size==3 && opc==1) {s='D';}
+        else if(size==0 && opc==3) {s='Q'; size = 4;}
+        else if(size==0 && opc==0) {s='B'; op=1;}
+        else if(size==1 && opc==0) {s='H'; op=1;}
+        else if(size==2 && opc==0) {s='S'; op=1;}
+        else if(size==3 && opc==0) {s='D'; op=1;}
+        else if(size==0 && opc==2) {s='Q'; op=1; size = 4;}
+
+        const char* extend[] = {"?0", "?1", "UXTW", "LSL", "?4", "?5", "SXTW", "SXTX"};
+        int amount = size*a.S;
+        if(option==3 && !amount)
+            snprintf(buff, sizeof(buff), "%s %c%d, [%s, %s]", op?"STR":"LDR", s, Rt, XtSp[Rn], ((option&1)==0)?Wt[Rm]:Xt[Rm]);
+        else
+            snprintf(buff, sizeof(buff), "%s %c%d, [%s, %s, %s %d]", op?"STR":"LDR", s, Rt, XtSp[Rn], ((option&1)==0)?Wt[Rm]:Xt[Rm], extend[option], amount);
         return buff;
     }
 
@@ -1025,6 +1150,20 @@ const char* arm64_print(uint32_t opcode, uintptr_t addr)
         return buff;
     }
 
+    // FADDP
+    if(isMask(opcode, "0Q1011100f1mmmmm110101nnnnnddddd", &a)) {
+        char s = a.Q?'V':'D';
+        char d = sf?'D':'S';
+        int n = (a.Q && !sf)?4:2;
+        snprintf(buff, sizeof(buff), "VFADDP %c%d.%d%c, %c%d.%d%c, %c%d.%d%c", s, Rd, n, d, s, Rn, n, d, s, Rm, n, d);
+        return buff;
+    }
+    if(isMask(opcode, "011111100f110000110110nnnnnddddd", &a)) {
+        char s = (sf==0)?'S':((sf==1)?'D':'?');
+        snprintf(buff, sizeof(buff), "FADDP %c%d, %c%d, %c%d", s, Rd, s, Rn, s, Rm);
+        return buff;
+    }
+
     // SQRT
     if(isMask(opcode, "0Q1011101f100001111110nnnnnddddd", &a)) {
         char s = a.Q?'V':'D';
@@ -1038,6 +1177,84 @@ const char* arm64_print(uint32_t opcode, uintptr_t addr)
         snprintf(buff, sizeof(buff), "FSQRT %c%d, %c%d", s, Rd, s, Rn);
         return buff;
     }
+    // FPRINTX
+    if(isMask(opcode, "0Q1011100f100001100110nnnnnddddd", &a)) {
+        char s = a.Q?'V':'D';
+        char d = sf?'D':'S';
+        int n = (a.Q && !sf)?4:2;
+        snprintf(buff, sizeof(buff), "VFRINTX %c%d.%d%c, %c%d.%d%c", s, Rd, n, d, s, Rn, n, d);
+        return buff;
+    }
+    if (isMask(opcode, "00011110ff100111010000nnnnnddddd", &a)) {
+        char s = (sf==0)?'S':((sf==1)?'D':'?');
+        snprintf(buff, sizeof(buff), "FRINTX %c%d, %c%d", s, Rd, s, Rn);
+        return buff;
+    }
+    // FRINTI
+    if(isMask(opcode, "0Q1011101f100001100110nnnnnddddd", &a)) {
+        char s = a.Q?'V':'D';
+        char d = sf?'D':'S';
+        int n = (a.Q && !sf)?4:2;
+        snprintf(buff, sizeof(buff), "VFRINTI %c%d.%d%c, %c%d.%d%c", s, Rd, n, d, s, Rn, n, d);
+        return buff;
+    }
+    if(isMask(opcode, "00011110ff100111110000nnnnnddddd", &a)) {
+        char s = (sf==0)?'S':((sf==1)?'D':'?');
+        snprintf(buff, sizeof(buff), "FRINTI %c%d, %c%d", s, Rd, s, Rn);
+        return buff;
+    }
+    // FRINTN
+    if(isMask(opcode, "0Q0011100f100001100010nnnnnddddd", &a)) {
+        char s = a.Q?'V':'D';
+        char d = sf?'D':'S';
+        int n = (a.Q && !sf)?4:2;
+        snprintf(buff, sizeof(buff), "VFRINTN %c%d.%d%c, %c%d.%d%c", s, Rd, n, d, s, Rn, n, d);
+        return buff;
+    }
+    if(isMask(opcode, "000111100f100100010000nnnnnddddd", &a)) {
+        char s = (sf==0)?'S':((sf==1)?'D':'?');
+        snprintf(buff, sizeof(buff), "FRINTN %c%d, %c%d", s, Rd, s, Rn);
+        return buff;
+    }
+    // FRINTM
+    if(isMask(opcode, "0Q0011100f100001100110nnnnnddddd", &a)) {
+        char s = a.Q?'V':'D';
+        char d = sf?'D':'S';
+        int n = (a.Q && !sf)?4:2;
+        snprintf(buff, sizeof(buff), "VFRINTM %c%d.%d%c, %c%d.%d%c", s, Rd, n, d, s, Rn, n, d);
+        return buff;
+    }
+    if(isMask(opcode, "000111100f100101010000nnnnnddddd", &a)) {
+        char s = (sf==0)?'S':((sf==1)?'D':'?');
+        snprintf(buff, sizeof(buff), "FRINTM %c%d, %c%d", s, Rd, s, Rn);
+        return buff;
+    }
+    // FRINTP
+    if(isMask(opcode, "0Q0011101f100001100010nnnnnddddd", &a)) {
+        char s = a.Q?'V':'D';
+        char d = sf?'D':'S';
+        int n = (a.Q && !sf)?4:2;
+        snprintf(buff, sizeof(buff), "VFRINTP %c%d.%d%c, %c%d.%d%c", s, Rd, n, d, s, Rn, n, d);
+        return buff;
+    }
+    if(isMask(opcode, "000111100f100100110000nnnnnddddd", &a)) {
+        char s = (sf==0)?'S':((sf==1)?'D':'?');
+        snprintf(buff, sizeof(buff), "FRINTP %c%d, %c%d", s, Rd, s, Rn);
+        return buff;
+    }
+    // FRINTZ
+    if(isMask(opcode, "0Q0011101f100001100110nnnnnddddd", &a)) {
+        char s = a.Q?'V':'D';
+        char d = sf?'D':'S';
+        int n = (a.Q && !sf)?4:2;
+        snprintf(buff, sizeof(buff), "VFRINTZ %c%d.%d%c, %c%d.%d%c", s, Rd, n, d, s, Rn, n, d);
+        return buff;
+    }
+    if(isMask(opcode, "000111100f100101110000nnnnnddddd", &a)) {
+        char s = (sf==0)?'S':((sf==1)?'D':'?');
+        snprintf(buff, sizeof(buff), "FRINTZ %c%d, %c%d", s, Rd, s, Rn);
+        return buff;
+    }
 
     //CMP
     if(isMask(opcode, "00011110ff1mmmmm001000nnnnn0c000", &a)) {
@@ -1048,6 +1265,16 @@ const char* arm64_print(uint32_t opcode, uintptr_t addr)
             snprintf(buff, sizeof(buff), "FCMP %c%d, %c%d", s, Rn, s, Rm);
         return buff;
     }
+    //FCMP vector
+    if(isMask(opcode, "0QU01110cf1mmmmm111001nnnnnddddd", &a)) {
+        char s = (sf==0)?'S':((sf==1)?'D':'?');
+        int n = (sf==0)?2:1;
+        n *= a.Q?2:1;
+        int op = (a.c<<1) | (a.U);
+        const char* OP[] = {"EQ", "GE", "??", "GT"};
+        snprintf(buff, sizeof(buff), "FCMP%s%s V%d.%d%c, V%d.%d%c, V%d.%d%c", OP[op], a.Q?"Q":"", Rd, n, s, Rn, n, s, Rm, n, s);
+        return buff;
+    }
     //FMIN/FMAX
     if(isMask(opcode, "00011110ff1mmmmm01oo10nnnnnddddd", &a)) {
         char s = (sf==0)?'S':((sf==1)?'D':'?');
@@ -1061,6 +1288,27 @@ const char* arm64_print(uint32_t opcode, uintptr_t addr)
         snprintf(buff, sizeof(buff), "F%sNM%s V%d.%d%c, V%d.%d%c, V%d.%d%c", option?"MIN":"MAX", a.Q?"Q":"", Rd, n, s, Rn, n, s, Rm, n, s);
         return buff;
     }
+    if(isMask(opcode, "0Q001110of1mmmmm111101nnnnnddddd", &a)) {
+        char s = (sf==0)?'S':((sf==1)?'D':'?');
+        int n = (sf==0)?2:1;
+        n *= a.Q?2:1;
+        snprintf(buff, sizeof(buff), "F%s%s V%d.%d%c, V%d.%d%c, V%d.%d%c", option?"MIN":"MAX", a.Q?"Q":"", Rd, n, s, Rn, n, s, Rm, n, s);
+        return buff;
+    }
+    // NEG
+    if(isMask(opcode, "0Q101110ff100000101110nnnnnddddd", &a)) {
+        const char* Y[] = {"8B", "16B", "4H", "8H", "2S", "4S", "??", "2D"};
+        const char* Vd = Y[(sf<<1) | a.Q];
+        snprintf(buff, sizeof(buff), "NEG%s V%d.%s, V%d.%s", a.Q?"Q":"", Rd, Vd, Rn, Vd);
+        return buff;
+    }
+    // SSHL vector
+    if(isMask(opcode, "0QU01110ff1mmmmm010rS1nnnnnddddd", &a)) {
+        const char* Y[] = {"8B", "16B", "4H", "8H", "2S", "4S", "??", "2D"};
+        const char* Vd = Y[(sf<<1) | a.Q];
+        snprintf(buff, sizeof(buff), "%c%s%sSHL%s V%d.%s, V%d.%s, V%d.%s", a.U?'U':'S', a.r?"R":"", a.S?"Q":"", a.Q?"Q":"", Rd, Vd, Rn, Vd, Rm, Vd);
+        return buff;
+    }
 
     // FCVT
     if(isMask(opcode, "f0011110pp10010U000000nnnnnddddd", &a)) {
@@ -1124,6 +1372,14 @@ const char* arm64_print(uint32_t opcode, uintptr_t addr)
         snprintf(buff, sizeof(buff), "FCVT%sS %s, %c%d", roundings[a.c], sf?Xt[Rd]:Wt[Rd], s, Rn);
         return buff;
     }
+    if(isMask(opcode, "0QU01110of100001101o10nnnnnddddd", &a)) {
+        const char* Y[] = {"2S", "4S", "??", "2D"};
+        const char* Z[] = {"S", "S", "??", "D"};
+        const char* Vd = Y[(sf<<1) | a.Q];
+        const char* roundings[] = {"N", "M", "P", "Z"};
+        snprintf(buff, sizeof(buff), "VFCVT%s%s%s%s V%d.%s, V%d.%s", roundings[option], a.U?"U":"S", a.Q?"Q":"", Z[(sf<<1)|a.Q], Rd, Vd, Rn, Vd);
+        return buff;
+    }
 
     // FMOV
     if(isMask(opcode, "00011110pp100000010000nnnnnddddd", &a)) {
@@ -1236,14 +1492,6 @@ const char* arm64_print(uint32_t opcode, uintptr_t addr)
         return buff;
     }
     
-    // MOV immediate
-    if(isMask(opcode, "0Q00111100000iii111001iiiiiddddd", &a)) {
-        const char* Y[] = {"8B", "16B"};
-        const char* Vd = Y[a.Q];
-        snprintf(buff, sizeof(buff), "MOVI V%d.%s, #0x%x", Rd, Vd, imm);
-        return buff;
-    }
-
     // LD1/ST1 single structure
     if(isMask(opcode, "0Q0011010L000000cc0Sffnnnnnttttt", &a)) {
         int scale = a.c;
@@ -1272,9 +1520,9 @@ const char* arm64_print(uint32_t opcode, uintptr_t addr)
             sz = 4;
         int offset = signExtend(imm, 9);
         if(!offset)
-            snprintf(buff, sizeof(buff), "%sUR %s%d, [%s]", a.L?"LD":"ST", Y[sz], Rd, XtSp[Rn]);
+            snprintf(buff, sizeof(buff), "%sUR %s%d, [%s]", a.L?"LD":"ST", Y[sz], Rt, XtSp[Rn]);
         else
-            snprintf(buff, sizeof(buff), "%sUR %s%d, [%s, %+d]", a.L?"LD":"ST", Y[sz], Rd, XtSp[Rn], imm);
+            snprintf(buff, sizeof(buff), "%sUR %s%d, [%s, %s0x%x]", a.L?"LD":"ST", Y[sz], Rt, XtSp[Rn], (offset<0)?"-":"", abs(offset));
         return buff;
     }
     // LDR/STR vector immediate
@@ -1285,9 +1533,9 @@ const char* arm64_print(uint32_t opcode, uintptr_t addr)
             sz = 4;
         int offset = imm<<sz;
         if(!offset)
-            snprintf(buff, sizeof(buff), "%sR %s%d, [%s]", a.L?"LD":"ST", Y[sz], Rd, XtSp[Rn]);
+            snprintf(buff, sizeof(buff), "%sR %s%d, [%s]", a.L?"LD":"ST", Y[sz], Rt, XtSp[Rn]);
         else
-            snprintf(buff, sizeof(buff), "%sR %s%d, [%s, %+d]", a.L?"LD":"ST", Y[sz], Rd, XtSp[Rn], imm);
+            snprintf(buff, sizeof(buff), "%sR %s%d, [%s, %+d]", a.L?"LD":"ST", Y[sz], Rt, XtSp[Rn], imm);
         return buff;
     }
 
@@ -1329,7 +1577,7 @@ const char* arm64_print(uint32_t opcode, uintptr_t addr)
 
     // DUP
     if(isMask(opcode, "0Q001110000iiiii000001nnnnnddddd", &a)) {
-        const char* Y[] = {"8B", "16B", "4H", "8H", "2S", "4S", "2D", "??"};
+        const char* Y[] = {"8B", "16B", "4H", "8H", "2S", "4S", "??", "2D"};
         const char* Z[] = {"B", "H", "S", "D"};
         int sz = 3;
         if((imm&0b0001)==0b0001) sz=0;
@@ -1341,7 +1589,18 @@ const char* arm64_print(uint32_t opcode, uintptr_t addr)
         snprintf(buff, sizeof(buff), "DUP V%d.%s, V%d.%s[%d]", Rd, Vd, Rn, Vn, sh);
         return buff;
     }
-    
+
+    if(isMask(opcode, "0Q001110000iiiii000011nnnnnddddd", &a)) {
+        const char* Y[] = {"8B", "16B", "4H", "8H", "2S", "4S", "??", "2D"};
+        int sz = 3;
+        if((imm&0b0001)==0b0001) sz=0;
+        else if((imm&0b0011)==0b0010) sz=1;
+        else if((imm&0b0111)==0b0100) sz=2;
+        const char* Vd = Y[(sz<<1)|a.Q];
+        snprintf(buff, sizeof(buff), "DUP V%d.%s, X%d", Rd, Vd, Rn);
+        return buff;
+    }
+
     // AES
     if(isMask(opcode, "0100111000101000010f10nnnnnddddd", &a)) {
         snprintf(buff, sizeof(buff), "AES%c V%d.16B, V%d.16B", sf?'D':'E', Rd, Rn);
@@ -1365,8 +1624,141 @@ const char* arm64_print(uint32_t opcode, uintptr_t addr)
     // DMB ISH
     if(isMask(opcode, "11010101000000110011nnnn10111111", &a)) {
         snprintf(buff, sizeof(buff), "DMB %s", (Rn==0b1011)?"ISH":"???");
+        return buff;
+    }
+    // DSB ISH/ISHST
+    if(isMask(opcode, "11010101000000110011nnnn10011111", &a)) {
+        snprintf(buff, sizeof(buff), "DSB %s", (Rn==0b1011)?"ISH":((Rn==0b1010)?"ISHST":"???"));
+        return buff;
     }
 
+    // CASxw
+    if(isMask(opcode, "1f0010001L1ssssso11111nnnnnttttt", &a)) {
+        snprintf(buff, sizeof(buff), "CAS%s%s %s, %s, [%s]", a.o?"A":"", a.L?"L":"", sf?Xt[Rs]:Wt[Rs], sf?Xt[Rt]:Wt[Rt], XtSp[Rn]);
+        return buff;
+    }
+    // CAS B/H
+    if(isMask(opcode, "0f0010001L1ssssso11111nnnnnttttt", &a)) {
+        snprintf(buff, sizeof(buff), "CAS%s%s%s %s, %s, [%s]", a.o?"A":"", a.L?"L":"", sf?"H":"B", Xt[Rs], Xt[Rt], XtSp[Rn]);
+        return buff;
+    }
+    // CASPxw
+    if(isMask(opcode, "0f0010000L1ssssso11111nnnnnttttt", &a)) {
+        snprintf(buff, sizeof(buff), "CASP%s%s %s,%s, %s,%s, [%s]", a.o?"A":"", a.L?"L":"", sf?Xt[Rs]:Wt[Rs], sf?Xt[Rs+1]:Wt[Rs+1], sf?Xt[Rt]:Wt[Rt], sf?Xt[Rt+1]:Wt[Rt+1], XtSp[Rn]);
+        return buff;
+    }
+    // SWPxw
+    if(isMask(opcode, "1f111000AR1sssss100000nnnnnttttt", &a)) {
+        snprintf(buff, sizeof(buff), "SWP%s%s %s, %s, [%s]", a.A?"A":"", a.R?"L":"", sf?Xt[Rs]:Wt[Rs], sf?Xt[Rt]:Wt[Rt], XtSp[Rn]);
+        return buff;
+    }
+    // SWPxw
+    if(isMask(opcode, "0f111000AR1sssss100000nnnnnttttt", &a)) {
+        snprintf(buff, sizeof(buff), "CAS%s%s%s %s, %s, [%s]", a.A?"A":"", a.R?"L":"", sf?"H":"B", Xt[Rs], Xt[Rt], XtSp[Rn]);
+        return buff;
+    }
+    // LDXXXxw
+    if(isMask(opcode, "1f111000AR1sssss0ooo00nnnnnttttt", &a)) {
+        const char* ops[] = { "ADD", "CLR", "EOR", "SET", "SMAX, SMIN", "UMAX", "UMIN" };
+        if((Rt == 0b11111) && !a.A) {
+            snprintf(buff, sizeof(buff), "ST%s%s %s, [%s]", ops[a.o], a.R?"L":"", sf?Xt[Rs]:Wt[Rs], XtSp[Rn]);
+        } else {
+            snprintf(buff, sizeof(buff), "LD%s%s%s %s, %s, [%s]", ops[a.o], a.A?"A":"", a.R?"L":"", sf?Xt[Rs]:Wt[Rs], sf?Xt[Rt]:Wt[Rt], XtSp[Rn]);
+        }
+        return buff;
+    }
+    // LDXXX B/H
+    if(isMask(opcode, "0f111000AR1sssss0ooo00nnnnnttttt", &a)) {
+        const char* ops[] = { "ADD", "CLR", "EOR", "SET", "SMAX, SMIN", "UMAX", "UMIN" };
+        if((Rt == 0b11111) && !a.A) {
+            snprintf(buff, sizeof(buff), "ST%s%s%s %s, [%s]", ops[a.o], a.R?"L":"", sf?"H":"B", Xt[Rs], XtSp[Rn]);
+        } else {
+            snprintf(buff, sizeof(buff), "LD%s%s%s%s %s, %s, [%s]", ops[a.o], a.A?"A":"", a.R?"L":"", sf?"H":"B", Xt[Rs], Xt[Rt], XtSp[Rn]);
+        }
+        return buff;
+    }
+    // AXFLAG
+    if(isMask(opcode, "11010101000000000100000001011111", &a)) {
+        snprintf(buff, sizeof(buff), "AXFLAG");
+        return buff;
+    }
+    // XAFLAG
+    if(isMask(opcode, "11010101000000000100000000111111", &a)) {
+        snprintf(buff, sizeof(buff), "XAFLAG");
+        return buff;
+    }
+    // CFINV
+    if(isMask(opcode, "11010101000000000100000000011111", &a)) {
+        snprintf(buff, sizeof(buff), "CFINV");
+        return buff;
+    }
+    // RMIF
+    if(isMask(opcode, "10111010000iiiiii00001nnnnn0oooo", &a)) {
+        snprintf(buff, sizeof(buff), "RMIF %s, #%d, #0x%x", Xt[Rn], imm, opc);
+        return buff;
+    }
+    // SETF
+    if(isMask(opcode, "00111010000000000f0010nnnnn01101", &a)) {
+        snprintf(buff, sizeof(buff), "SETF%d %s", 8<<sf, Xt[Rn]);
+        return buff;
+    }
+    // REV64
+    if(isMask(opcode, "0Q001110ff100000000010nnnnnddddd", &a)) {
+        const char* T[] = {"8B", "16B", "4H", "8H", "2S", "4S", "??", "??"};
+        int sz = sf;
+        const char* Vn = T[(sz<<1)|a.Q];
+        const char* Vd = T[(sz<<1)|a.Q];
+        snprintf(buff, sizeof(buff), "REV64 V%d.%s, V%d.%s",Rd, Vd, Rn, Vn);
+        return buff;
+    }
+    //TRNx
+    if(isMask(opcode, "0Q001110ff0mmmmm0o1010nnnnnddddd", &a)) {
+        const char* T[] = {"8B", "16B", "4H", "8H", "2S", "4S", "??", "2D"};
+        int sz = sf;
+        const char* Vn = T[(sz<<1)|a.Q];
+        const char* Vm = T[(sz<<1)|a.Q];
+        const char* Vd = T[(sz<<1)|a.Q];
+        snprintf(buff, sizeof(buff), "TRN%d V%d.%s, V%d.%s, V%d.%s", a.o+1, Rd, Vd, Rn, Vn, Rm, Vm);
+        return buff;
+    }
+    //SHA1 stuffs
+    if(isMask(opcode, "0101111000101000000010nnnnnddddd", &a)) {
+        snprintf(buff, sizeof(buff), "SHA1H S%d, S%d", Rd, Rn);
+        return buff;
+    }
+    if(isMask(opcode, "0101111000101000000110nnnnnddddd", &a)) {
+        snprintf(buff, sizeof(buff), "SHA1SU1 V%d.4S, V%d.4S", Rd, Rn);
+        return buff;
+    }
+    if(isMask(opcode, "01011110000mmmmm000000nnnnnddddd", &a)) {
+        snprintf(buff, sizeof(buff), "SHA1C Q%d, S%d, V%d.4S", Rd, Rn, Rm);
+        return buff;
+    }
+    if(isMask(opcode, "01011110000mmmmm001000nnnnnddddd", &a)) {
+        snprintf(buff, sizeof(buff), "SHA1M Q%d, S%d, V%d.4S", Rd, Rn, Rm);
+        return buff;
+    }
+    if(isMask(opcode, "01011110000mmmmm000100nnnnnddddd", &a)) {
+        snprintf(buff, sizeof(buff), "SHA1P Q%d, S%d, V%d.4S", Rd, Rn, Rm);
+        return buff;
+    }
+    //SHA256 stuffs
+    if(isMask(opcode, "0101111000101000001010nnnnnddddd", &a)) {
+        snprintf(buff, sizeof(buff), "SHA256SU0 V%d.4S, V%d.4S", Rd, Rn);
+        return buff;
+    }
+    if(isMask(opcode, "01011110000mmmmm011000nnnnnddddd", &a)) {
+        snprintf(buff, sizeof(buff), "SHA256SU1 V%d.4S, V%d.4S, V%d.4S", Rd, Rn, Rm);
+        return buff;
+    }
+    if(isMask(opcode, "01011110000mmmmm010000nnnnnddddd", &a)) {
+        snprintf(buff, sizeof(buff), "SHA256H Q%d, Q%d, V%d.4S", Rd, Rn, Rm);
+        return buff;
+    }
+    if(isMask(opcode, "01011110000mmmmm010100nnnnnddddd", &a)) {
+        snprintf(buff, sizeof(buff), "SHA256H2 Q%d, Q%d, V%d.4S", Rd, Rn, Rm);
+        return buff;
+    }
 
     snprintf(buff, sizeof(buff), "%08X ???", __builtin_bswap32(opcode));
     return buff;

src/dynarec/arm64/dynarec_arm64_64.c

@@ -1,7 +1,6 @@
 #include <stdio.h>
 #include <stdlib.h>
 #include <stddef.h>
-#include <pthread.h>
 #include <errno.h>
 
 #include "debug.h"
@@ -23,8 +22,6 @@
 #include "dynarec_arm64_helper.h"
 #include "dynarec_arm64_functions.h"
 
-#define GETG        gd = ((nextop&0x38)>>3)+(rex.r<<3)
-
 uintptr_t dynarec64_64(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int seg, int* ok, int* need_epilog)
 {
     (void)ip; (void)rep; (void)need_epilog;
@@ -35,10 +32,12 @@ uintptr_t dynarec64_64(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
     uint8_t gd, ed, eb1, eb2, gb1, gb2;
     uint8_t wback, wb1, wb2, wb;
     int64_t i64, j64;
+    uint64_t u64;
     int v0, v1;
     int q0;
     int d0;
     int64_t fixedaddress;
+    int unscaled;
     MAYUSE(eb1);
     MAYUSE(eb2);
     MAYUSE(wb1);
@@ -55,15 +54,20 @@ uintptr_t dynarec64_64(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
         rep = opcode-0xF1;
         opcode = F8;
     }
-    // REX prefix before the F0 are ignored
-    rex.rex = 0;
-    while(opcode>=0x40 && opcode<=0x4f) {
-        rex.rex = opcode;
-        opcode = F8;
-    }
+    GETREX();
 
     switch(opcode) {
 
+        case 0x01:
+            INST_NAME("ADD Seg:Ed, Gd");
+            SETFLAGS(X_ALL, SF_SET_PENDING);
+            grab_segdata(dyn, addr, ninst, x4, seg);
+            nextop = F8;
+            GETGD;
+            GETEDO(x4, 0);
+            emit_add32(dyn, ninst, rex, ed, gd, x3, x5);
+            WBACKO(x4);
+            break;
         case 0x03:
             INST_NAME("ADD Gd, Seg:Ed");
             SETFLAGS(X_ALL, SF_SET_PENDING);
@@ -93,9 +97,9 @@ uintptr_t dynarec64_64(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                                 grab_segdata(dyn, addr, ninst, x4, seg);
                                 v0 = sse_get_reg_empty(dyn, ninst, x1, gd);
                                 SMREAD();
-                                addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0xfff<<3, 7, rex, NULL, 0, 0);
+                                addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, &unscaled, 0xfff<<3, 7, rex, NULL, 0, 0);
                                 ADDx_REG(x4, x4, ed);
-                                VLDR64_U12(v0, x4, fixedaddress); // upper part reseted
+                                VLD64(v0, x4, fixedaddress); // upper part reseted
                             }
                             break;
                         case 2:
@@ -111,9 +115,9 @@ uintptr_t dynarec64_64(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                                 grab_segdata(dyn, addr, ninst, x4, seg);
                                 v0 = sse_get_reg_empty(dyn, ninst, x1, gd);
                                 SMREAD();
-                                addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0xfff<<2, 3, rex, NULL, 0, 0);
+                                addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, &unscaled, 0xfff<<2, 3, rex, NULL, 0, 0);
                                 ADDx_REG(x4, x4, ed);
-                                VLDR32_U12(v0, x4, fixedaddress);
+                                VLD32(v0, x4, fixedaddress);
                             }
                             break;
                         default:
@@ -133,9 +137,9 @@ uintptr_t dynarec64_64(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                                 VMOVQ(v1, v0);
                             } else {
                                 grab_segdata(dyn, addr, ninst, x4, seg);
-                                addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0xfff<<4, 15, rex, NULL, 0, 0);
+                                addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, &unscaled, 0xfff<<4, 15, rex, NULL, 0, 0);
                                 ADDx_REG(x4, x4, ed);
-                                VSTR128_U12(v0, x4, fixedaddress);
+                                VST128(v0, x4, fixedaddress);
                                 SMWRITE2();
                             }
                             break;
@@ -150,9 +154,9 @@ uintptr_t dynarec64_64(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                                 VMOVeD(d0, 0, v0, 0);
                             } else {
                                 grab_segdata(dyn, addr, ninst, x4, seg);
-                                addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0xfff<<3, 7, rex, NULL, 0, 0);
+                                addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, &unscaled, 0xfff<<3, 7, rex, NULL, 0, 0);
                                 ADDx_REG(x4, x4, ed);
-                                VSTR64_U12(v0, x4, fixedaddress);
+                                VST64(v0, x4, fixedaddress);
                                 SMWRITE2();
                             }
                             break;
@@ -167,9 +171,9 @@ uintptr_t dynarec64_64(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                                 VMOVeS(q0, 0, v0, 0);
                             } else {
                                 grab_segdata(dyn, addr, ninst, x4, seg);
-                                addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0xfff<<2, 3, rex, NULL, 0, 0);
+                                addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, &unscaled, 0xfff<<2, 3, rex, NULL, 0, 0);
                                 ADDx_REG(x4, x4, ed);
-                                VSTR32_U12(v0, x4, fixedaddress);
+                                VST32(v0, x4, fixedaddress);
                                 SMWRITE2();
                             }
                             break;
@@ -191,9 +195,9 @@ uintptr_t dynarec64_64(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                             } else {
                                 grab_segdata(dyn, addr, ninst, x4, seg);
                                 SMREAD();
-                                addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0xfff<<4, 15, rex, NULL, 0, 0);
+                                addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, &unscaled, 0xfff<<4, 15, rex, NULL, 0, 0);
                                 ADDx_REG(x4, x4, ed);
-                                VLDR128_U12(v0, ed, fixedaddress);
+                                VLD128(v0, ed, fixedaddress);
                             }
                             break;
                         default:
@@ -229,8 +233,8 @@ uintptr_t dynarec64_64(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                                     UFLAG_RES(gd);
                                     LSRx(x3, gd, 32);
                                     UFLAG_OP1(x3);
-                                    UFLAG_DF(x3, d_imul32);
                                     MOVw_REG(gd, gd);
+                                    UFLAG_DF(x3, d_imul32);
                                 } else {
                                     MULxw(gd, gd, ed);
                                 }
@@ -260,7 +264,7 @@ uintptr_t dynarec64_64(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                                 UBFXxw(gd, eb1, eb2*8, 8);
                             } else {
                                 SMREAD();
-                                addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, 0, 0, rex, NULL, 0, 0);
+                                addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, NULL, 0, 0, rex, NULL, 0, 0);
                                 LDRB_REG(gd, ed, x4);
                             }
                             break;
@@ -274,6 +278,28 @@ uintptr_t dynarec64_64(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             }
             break;
 
+        case 0x21:
+            INST_NAME("AND Seg:Ed, Gd");
+            SETFLAGS(X_ALL, SF_SET_PENDING);
+            grab_segdata(dyn, addr, ninst, x4, seg);
+            nextop = F8;
+            GETGD;
+            GETEDO(x4, 0);
+            emit_and32(dyn, ninst, rex, ed, gd, x3, x5);
+            WBACKO(x4);
+            break;
+
+        case 0x29:
+            INST_NAME("SUB Seg:Ed, Gd");
+            SETFLAGS(X_ALL, SF_SET_PENDING);
+            grab_segdata(dyn, addr, ninst, x4, seg);
+            nextop = F8;
+            GETGD;
+            GETEDO(x4, 0);
+            emit_sub32(dyn, ninst, rex, ed, gd, x3, x5);
+            WBACKO(x4);
+            break;
+
         case 0x2B:
             INST_NAME("SUB Gd, Seg:Ed");
             SETFLAGS(X_ALL, SF_SET_PENDING);
@@ -284,6 +310,17 @@ uintptr_t dynarec64_64(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             emit_sub32(dyn, ninst, rex, gd, ed, x3, x4);
             break;
 
+        case 0x31:
+            INST_NAME("XOR Seg:Ed, Gd");
+            SETFLAGS(X_ALL, SF_SET_PENDING);
+            grab_segdata(dyn, addr, ninst, x4, seg);
+            nextop = F8;
+            GETGD;
+            GETEDO(x4, 0);
+            emit_xor32(dyn, ninst, rex, ed, gd, x3, x5);
+            WBACKO(x4);
+            break;
+
         case 0x33:
             INST_NAME("XOR Gd, Seg:Ed");
             SETFLAGS(X_ALL, SF_SET_PENDING);
@@ -293,7 +330,7 @@ uintptr_t dynarec64_64(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             GETEDO(x4, 0);
             emit_xor32(dyn, ninst, rex, gd, ed, x3, x4);
             break;
-                    
+
         case 0x39:
             INST_NAME("CMP Seg:Ed, Gd");
             SETFLAGS(X_ALL, SF_SET_PENDING);
@@ -315,33 +352,50 @@ uintptr_t dynarec64_64(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             break;
 
         case 0x63:
-            INST_NAME("MOVSXD Gd, Ed");
-            nextop = F8;
-            GETGD;
-            if(rex.w) {
-                if(MODREG) {   // reg <= reg
-                    SXTWx(gd, xRAX+(nextop&7)+(rex.b<<3));
-                } else {                    // mem <= reg
-                    grab_segdata(dyn, addr, ninst, x4, seg);
-                    SMREAD();
-                    addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, 0, 0, rex, NULL, 0, 0);
-                    LDRSW_REG(gd, ed, x4);
-                }
+            if(rex.is32bits) {
+                // ARPL here
+                DEFAULT;
             } else {
-                if(MODREG) {   // reg <= reg
-                    MOVw_REG(gd, xRAX+(nextop&7)+(rex.b<<3));
-                } else {                    // mem <= reg
-                    grab_segdata(dyn, addr, ninst, x4, seg);
-                    SMREAD();
-                    addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, 0, 0, rex, NULL, 0, 0);
-                    LDRw_REG(gd, ed, x4);
+                INST_NAME("MOVSXD Gd, Ed");
+                nextop = F8;
+                GETGD;
+                if(rex.w) {
+                    if(MODREG) {   // reg <= reg
+                        SXTWx(gd, xRAX+(nextop&7)+(rex.b<<3));
+                    } else {                    // mem <= reg
+                        grab_segdata(dyn, addr, ninst, x4, seg);
+                        SMREAD();
+                        addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, NULL, 0, 0, rex, NULL, 0, 0);
+                        LDRSW_REG(gd, ed, x4);
+                    }
+                } else {
+                    if(MODREG) {   // reg <= reg
+                        MOVw_REG(gd, xRAX+(nextop&7)+(rex.b<<3));
+                    } else {                    // mem <= reg
+                        grab_segdata(dyn, addr, ninst, x4, seg);
+                        SMREAD();
+                        addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, NULL, 0, 0, rex, NULL, 0, 0);
+                        LDRw_REG(gd, ed, x4);
+                    }
                 }
             }
             break;
-
+        case 0x64:
+            addr = dynarec64_64(dyn, addr, ip, ninst, rex, rep, _FS, ok, need_epilog);
+            break;
+        case 0x65:
+            addr = dynarec64_64(dyn, addr, ip, ninst, rex, rep, _GS, ok, need_epilog);
+            break;
         case 0x66:
             addr = dynarec64_6664(dyn, addr, ip, ninst, rex, seg, ok, need_epilog);
             break;
+        case 0x67:
+            if(rex.is32bits)
+                addr = dynarec64_6764_32(dyn, addr, ip, ninst, rex, rep, seg, ok, need_epilog);
+            else {
+                DEFAULT;
+            }
+            break;
 
         case 0x80:
             nextop = F8;
@@ -515,7 +569,7 @@ uintptr_t dynarec64_64(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             } else {
                 gd = (nextop&0x38)>>3;
                 gb1 = xRAX+(gd&3);
-                gb2 = ((gd&4)>>2);
+                gb2 = ((gd&4)<<1);
             }
             if(MODREG) {
                 if(rex.rex) {
@@ -535,11 +589,11 @@ uintptr_t dynarec64_64(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             } else {
                 grab_segdata(dyn, addr, ninst, x4, seg);
                 SMREAD();
-                addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, 0, 0, rex, NULL, 0, 0);
+                addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, NULL, 0, 0, rex, NULL, 0, 0);
                 LDRB_REG(x4, wback, x4);
                 ed = x4;
             }
-            BFIx(gb1, ed, gb2*8, 8);
+            BFIx(gb1, ed, gb2, 8);
             break;
         case 0x89:
             INST_NAME("MOV Seg:Ed, Gd");
@@ -549,7 +603,7 @@ uintptr_t dynarec64_64(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             if(MODREG) {   // reg <= reg
                 MOVxw_REG(xRAX+(nextop&7)+(rex.b<<3), gd);
             } else {                    // mem <= reg
-                addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, 0, 0, rex, NULL, 0, 0);
+                addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, NULL, 0, 0, rex, NULL, 0, 0);
                 STRxw_REG(gd, ed, x4);
                 SMWRITE2();
             }
@@ -564,11 +618,89 @@ uintptr_t dynarec64_64(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                 MOVxw_REG(gd, xRAX+(nextop&7)+(rex.b<<3));
             } else {                    // mem <= reg
                 SMREAD();
-                addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, 0, 0, rex, NULL, 0, 0);
+                addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, NULL, 0, 0, rex, NULL, 0, 0);
                 LDRxw_REG(gd, ed, x4);
             }
             break;
 
+        case 0x8D:
+            INST_NAME("LEA Gd, Ed");
+            nextop=F8;
+            GETGD;
+            if(MODREG) {   // reg <= reg? that's an invalid operation
+                DEFAULT;
+            } else {                    // mem <= reg
+                addr = geted(dyn, addr, ninst, nextop, &ed, gd, &fixedaddress, NULL, 0, 0, rex, NULL, 0, 0);
+                if(gd!=ed) {    // it's sometimes used as a 3 bytes NOP
+                    MOVxw_REG(gd, ed);
+                }
+                else if(!rex.w && !rex.is32bits) {
+                    MOVw_REG(gd, gd);   //truncate the higher 32bits as asked
+                }
+            }
+            break;
+        case 0x8E:
+            INST_NAME("MOV Seg,Ew");
+            grab_segdata(dyn, addr, ninst, x4, seg);
+            nextop = F8;
+            u8 = (nextop&0x38)>>3;
+            if((nextop&0xC0)==0xC0) {
+                ed = xRAX+(nextop&7)+(rex.b<<3);
+            } else {
+                SMREAD();
+                addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, NULL, 0, 0, rex, NULL, 0, 0);
+                LDRH_REG(x1, wback, x4);
+                ed = x1;
+            }
+            STRH_U12(ed, xEmu, offsetof(x64emu_t, segs[u8]));
+            STRw_U12(wZR, xEmu, offsetof(x64emu_t, segs_serial[u8]));
+            break;
+        case 0x8F:
+            INST_NAME("POP FS:Ed");
+            grab_segdata(dyn, addr, ninst, x4, seg);
+            nextop = F8;
+            if(MODREG) {
+                POP1z(xRAX+(nextop&7)+(rex.b<<3));
+            } else {
+                POP1z(x2); // so this can handle POP [ESP] and maybe some variant too
+                addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, &unscaled, 0, 0, rex, NULL, 0, 0);
+                if(ed==xRSP) {
+                    STRz_REG(x2, ed, x4);
+                } else {
+                    // complicated to just allow a segfault that can be recovered correctly
+                    SUBz_U12(xRSP, xRSP, rex.is32bits?4:8);
+                    STRz_REG(x2, ed, x4);
+                    ADDz_U12(xRSP, xRSP, rex.is32bits?4:8);
+                }
+            }
+            break;
+        case 0x90:
+            INST_NAME("NOP");
+            break;
+
+        case 0xA1:
+            INST_NAME("MOV EAX,FS:Od");
+            grab_segdata(dyn, addr, ninst, x4, seg);
+            if(rex.is32bits)
+                u64 = F32;
+            else
+                u64 = F64;
+            MOV64z(x1, u64);
+            LDRxw_REG(xRAX, x1, x4);
+            break;
+
+        case 0xA3:
+            INST_NAME("MOV FS:Od,EAX");
+            grab_segdata(dyn, addr, ninst, x4, seg);
+            if(rex.is32bits)
+                u64 = F32;
+            else
+                u64 = F64;
+            MOV64z(x1, u64);
+            STRxw_REG(xRAX, x1, x4);
+            SMWRITE2();
+            break;
+
         case 0xC6:
             INST_NAME("MOV Seg:Eb, Ib");
             grab_segdata(dyn, addr, ninst, x4, seg);
@@ -581,12 +713,12 @@ uintptr_t dynarec64_64(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     eb2 = (ed&4)>>2;    // L or H
                 } else {
                     eb1 = xRAX+(nextop&7)+(rex.b<<3);
-                    eb2 = 0;            
+                    eb2 = 0;
                 }
                 MOV32w(x3, u8);
                 BFIx(eb1, x3, eb2*8, 8);
             } else {                    // mem <= u8
-                addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0, 0, rex, NULL, 0, 1);
+                addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, NULL, 0, 0, rex, NULL, 0, 1);
                 u8 = F8;
                 MOV32w(x3, u8);
                 STRB_REG(x3, ed, x4);
@@ -602,7 +734,7 @@ uintptr_t dynarec64_64(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                 ed = xRAX+(nextop&7)+(rex.b<<3);
                 MOV64xw(ed, i64);
             } else {                    // mem <= i32
-                addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, 0, 0, rex, NULL, 0, 4);
+                addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, NULL, 0, 0, rex, NULL, 0, 4);
                 i64 = F32S;
                 MOV64xw(x3, i64);
                 STRxw_REG(x3, ed, x4);
@@ -813,9 +945,10 @@ uintptr_t dynarec64_64(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     break;
             }
             break;
-            
+
         case 0xF7:
             nextop = F8;
+            grab_segdata(dyn, addr, ninst, x6, seg);
             switch((nextop>>3)&7) {
                 case 0:
                 case 1:
@@ -824,7 +957,7 @@ uintptr_t dynarec64_64(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     GETEDO(x6, 4);
                     i64 = F32S;
                     MOV64xw(x2, i64);
-                    emit_test32(dyn, ninst, rex, ed, x2, x3, x4);
+                    emit_test32(dyn, ninst, rex, ed, x2, x3, x4, x5);
                     break;
                 case 2:
                     INST_NAME("NOT Ed");
@@ -842,7 +975,6 @@ uintptr_t dynarec64_64(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                 case 4:
                     INST_NAME("MUL EAX, Ed");
                     SETFLAGS(X_ALL, SF_PENDING);
-                    UFLAG_DF(x2, rex.w?d_mul64:d_mul32);
                     GETEDO(x6, 0);
                     if(rex.w) {
                         if(ed==xRDX) gd=x3; else gd=xRDX;
@@ -856,11 +988,11 @@ uintptr_t dynarec64_64(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     }
                     UFLAG_RES(xRAX);
                     UFLAG_OP1(xRDX);
+                    UFLAG_DF(x2, rex.w?d_mul64:d_mul32);
                     break;
                 case 5:
                     INST_NAME("IMUL EAX, Ed");
                     SETFLAGS(X_ALL, SF_PENDING);
-                    UFLAG_DF(x2, rex.w?d_imul64:d_imul32);
                     GETEDO(x6, 0);
                     if(rex.w) {
                         if(ed==xRDX) gd=x3; else gd=xRDX;
@@ -874,6 +1006,7 @@ uintptr_t dynarec64_64(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     }
                     UFLAG_RES(xRAX);
                     UFLAG_OP1(xRDX);
+                    UFLAG_DF(x2, rex.w?d_imul64:d_imul32);
                     break;
                 case 6:
                     INST_NAME("DIV Ed");
@@ -893,8 +1026,8 @@ uintptr_t dynarec64_64(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                         MOVw_REG(xRDX, x4);
                     } else {
                         if(ninst
-                           && dyn->insts[ninst-1].x64.addr 
-                           && *(uint8_t*)(dyn->insts[ninst-1].x64.addr)==0x31 
+                           && dyn->insts[ninst-1].x64.addr
+                           && *(uint8_t*)(dyn->insts[ninst-1].x64.addr)==0x31
                            && *(uint8_t*)(dyn->insts[ninst-1].x64.addr+1)==0xD2) {
                             SET_DFNONE(x2);
                             GETEDO(x6, 0);
@@ -917,6 +1050,7 @@ uintptr_t dynarec64_64(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     break;
                 case 7:
                     INST_NAME("IDIV Ed");
+                    NOTEST(x1);
                     SETFLAGS(X_ALL, SF_SET);
                     if(!rex.w) {
                         SET_DFNONE(x2)
@@ -929,7 +1063,7 @@ uintptr_t dynarec64_64(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                         MOVw_REG(xRDX, x4);
                     } else {
                         if(ninst && dyn->insts
-                           &&  dyn->insts[ninst-1].x64.addr 
+                           &&  dyn->insts[ninst-1].x64.addr
                            && *(uint8_t*)(dyn->insts[ninst-1].x64.addr)==0x48
                            && *(uint8_t*)(dyn->insts[ninst-1].x64.addr+1)==0x99) {
                             SET_DFNONE(x2)
@@ -955,7 +1089,7 @@ uintptr_t dynarec64_64(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     break;
             }
             break;
-            
+
         case 0xFF:
             nextop = F8;
             grab_segdata(dyn, addr, ninst, x6, seg);
@@ -984,9 +1118,10 @@ uintptr_t dynarec64_64(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     } else {
                         SETFLAGS(X_ALL, SF_SET);    //Hack to put flag in "don't care" state
                     }
-                    GETEDOx(x6, 0);
+                    GETEDOz(x6, 0);
                     if(box64_dynarec_callret && box64_dynarec_bigblock>1) {
                         BARRIER(BARRIER_FULL);
+                        BARRIER_NEXT(BARRIER_FULL);
                     } else {
                         BARRIER(BARRIER_FLOAT);
                         *need_epilog = 0;
@@ -994,34 +1129,37 @@ uintptr_t dynarec64_64(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     }
                     GETIP_(addr);
                     if(box64_dynarec_callret) {
+                        SET_HASCALLRET();
                         // Push actual return address
                         if(addr < (dyn->start+dyn->isize)) {
                             // there is a next...
                             j64 = (dyn->insts)?(dyn->insts[ninst].epilog-(dyn->native_size)):0;
                             ADR_S20(x4, j64);
+                            MESSAGE(LOG_NONE, "\tCALLRET set return to +%di\n", j64>>2);
                         } else {
+                            MESSAGE(LOG_NONE, "\tCALLRET set return to Jmptable(%p)\n", (void*)addr);
                             j64 = getJumpTableAddress64(addr);
                             TABLE64(x4, j64);
                             LDRx_U12(x4, x4, 0);
                         }
                         STPx_S7_preindex(x4, xRIP, xSP, -16);
                     }
-                    PUSH1(xRIP);
+                    PUSH1z(xRIP);
                     jump_to_next(dyn, 0, ed, ninst);
                     break;
                 case 4: // JMP Ed
                     INST_NAME("JMP Ed");
                     READFLAGS(X_PEND);
                     BARRIER(BARRIER_FLOAT);
-                    GETEDOx(x6, 0);
+                    GETEDOz(x6, 0);
                     jump_to_next(dyn, 0, ed, ninst);
                     *need_epilog = 0;
                     *ok = 0;
                     break;
                 case 6: // Push Ed
                     INST_NAME("PUSH Ed");
-                    GETEDOx(x6, 0);
-                    PUSH1(ed);
+                    GETEDOz(x6, 0);
+                    PUSH1z(ed);
                     break;
 
                 default:

src/dynarec/arm64/dynarec_arm64_66.c

@@ -1,7 +1,6 @@
 #include <stdio.h>
 #include <stdlib.h>
 #include <stddef.h>
-#include <pthread.h>
 #include <errno.h>
 
 #include "debug.h"
@@ -16,6 +15,7 @@
 #include "emu/x64run_private.h"
 #include "x64trace.h"
 #include "dynarec_native.h"
+#include "custommem.h"
 
 #include "arm64_printer.h"
 #include "dynarec_arm64_private.h"
@@ -35,6 +35,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
     uint8_t gd, ed;
     uint8_t wback, wb1;
     int64_t fixedaddress;
+    int unscaled;
     int lock;
     MAYUSE(u8);
     MAYUSE(u16);
@@ -42,21 +43,16 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
     MAYUSE(j64);
     MAYUSE(lock);
 
-    while((opcode==0x2E) || (opcode==0x36) || (opcode==0x66))   // ignoring CS:, SS: or multiple 0x66
+    while((opcode==0x2E) || (opcode==0x36) || (opcode==0x26) || (opcode==0x66))   // ignoring CS:, SS:, ES: or multiple 0x66
         opcode = F8;
 
     while((opcode==0xF2) || (opcode==0xF3)) {
         rep = opcode-0xF1;
         opcode = F8;
     }
-    // REX prefix before the 66 are ignored
-    rex.rex = 0;
-    while(opcode>=0x40 && opcode<=0x4f) {
-        rex.rex = opcode;
-        opcode = F8;
-    }
+    GETREX();
 
-    if(rex.w && opcode!=0x0f)   // rex.w cancels "66", but not for 66 0f type of prefix
+    if(rex.w && !(opcode==0x0f || opcode==0xf0 || opcode==0x64 || opcode==0x65))   // rex.w cancels "66", but not for 66 0f type of prefix
         return dynarec64_00(dyn, addr-1, ip, ninst, rex, rep, ok, need_epilog); // addr-1, to "put back" opcode
 
     switch(opcode) {
@@ -87,7 +83,26 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             emit_add16(dyn, ninst, x1, x2, x3, x4);
             BFIx(xRAX, x1, 0, 16);
             break;
-                
+        case 0x06:
+            if(rex.is32bits) {
+                INST_NAME("PUSH ES");
+                LDRH_U12(x1, xEmu, offsetof(x64emu_t, segs[_ES]));
+                PUSH1_32(x1);
+            } else {
+                DEFAULT;
+            }
+            break;
+        case 0x07:
+            if(rex.is32bits) {
+                INST_NAME("POP ES");
+                POP1_32(x1);
+                STRH_U12(x1, xEmu, offsetof(x64emu_t, segs[_ES]));
+                STRw_U12(xZR, xEmu, offsetof(x64emu_t, segs_serial[_ES]));
+            } else {
+                DEFAULT;
+            }
+            break;
+
         case 0x09:
             INST_NAME("OR Ew, Gw");
             SETFLAGS(X_ALL, SF_SET_PENDING);
@@ -117,7 +132,11 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             break;
 
         case 0x0F:
-            addr = dynarec64_660F(dyn, addr, ip, ninst, rex, rep, ok, need_epilog);
+            switch(rep) {
+                case 0: addr = dynarec64_660F(dyn, addr, ip, ninst, rex, ok, need_epilog); break;
+                case 1: addr = dynarec64_66F20F(dyn, addr, ip, ninst, rex, ok, need_epilog); break;
+                case 2: addr = dynarec64_66F30F(dyn, addr, ip, ninst, rex, ok, need_epilog); break;
+            }
             break;
         case 0x11:
             INST_NAME("ADC Ew, Gw");
@@ -180,6 +199,25 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             emit_sbb16(dyn, ninst, x1, x2, x3, x4);
             BFIx(xRAX, x1, 0, 16);
             break;
+        case 0x1E:
+            if(rex.is32bits) {
+                INST_NAME("PUSH DS");
+                LDRH_U12(x1, xEmu, offsetof(x64emu_t, segs[_DS]));
+                PUSH1_32(x1);
+            } else {
+                DEFAULT;
+            }
+            break;
+        case 0x1F:
+            if(rex.is32bits) {
+                INST_NAME("POP DS");
+                POP1_32(x1);
+                STRH_U12(x1, xEmu, offsetof(x64emu_t, segs[_DS]));
+                STRw_U12(xZR, xEmu, offsetof(x64emu_t, segs_serial[_DS]));
+            } else {
+                DEFAULT;
+            }
+            break;
 
         case 0x21:
             INST_NAME("AND Ew, Gw");
@@ -294,6 +332,113 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             }
             break;
 
+        case 0x40:
+        case 0x41:
+        case 0x42:
+        case 0x43:
+        case 0x44:
+        case 0x45:
+        case 0x46:
+        case 0x47:
+            INST_NAME("INC Reg16 (32bits)");
+            SETFLAGS(X_ALL&~X_CF, SF_SUBSET_PENDING);
+            gd = xRAX + (opcode&7);
+            UXTHw(x1, gd);
+            emit_inc16(dyn, ninst, x1, x2, x3);
+            BFIw(gd, x1, 0, 16);
+            break;
+        case 0x48:
+        case 0x49:
+        case 0x4A:
+        case 0x4B:
+        case 0x4C:
+        case 0x4D:
+        case 0x4E:
+        case 0x4F:
+            INST_NAME("DEC Reg16 (32bits)");
+            SETFLAGS(X_ALL&~X_CF, SF_SUBSET_PENDING);
+            gd = xRAX + (opcode&7);
+            UXTHw(x1, gd);
+            emit_dec16(dyn, ninst, x1, x2, x3);
+            BFIw(gd, x1, 0, 16);
+            break;
+        case 0x50:
+        case 0x51:
+        case 0x52:
+        case 0x53:
+        case 0x54:
+        case 0x55:
+        case 0x56:
+        case 0x57:
+            if(rex.is32bits) {
+                INST_NAME("PUSH reg");
+                gd = xRAX+(opcode&0x07);
+                if (gd==xRSP) {
+                    MOVw_REG(x1, xRSP);
+                    PUSH1_16(x1);
+                } else {
+                    PUSH1_16(gd);
+                }
+            } else {
+                DEFAULT;
+            }
+            break;
+        case 0x58:
+        case 0x59:
+        case 0x5A:
+        case 0x5B:
+        case 0x5C:
+        case 0x5D:
+        case 0x5E:
+        case 0x5F:
+            if(rex.is32bits) {
+                INST_NAME("POP reg");
+                gd = xRAX+(opcode&0x07);
+                POP1_16(x1);
+                BFIw(gd, x1, 0, 16);
+            } else {
+                DEFAULT;
+            }
+            break;
+        case 0x60:
+            if(rex.is32bits) {
+                INST_NAME("PUSHA 16bits (32bits)");
+                MOVw_REG(x1, xRSP);
+                PUSH1_16(xRAX);
+                PUSH1_16(xRCX);
+                PUSH1_16(xRDX);
+                PUSH1_16(xRBX);
+                PUSH1_16(x1);
+                PUSH1_16(xRBP);
+                PUSH1_16(xRSI);
+                PUSH1_16(xRDI);
+            } else {
+                DEFAULT;
+            }
+            break;
+        case 0x61:
+            if(rex.is32bits) {
+                INST_NAME("POPA 16bits (32bits)");
+                POP1_16(x1);
+                BFIw(xRDI, x1, 0, 16);
+                POP1_16(x1);
+                BFIw(xRSI, x1, 0, 16);
+                POP1_16(x1);
+                BFIw(xRBP, x1, 0, 16);
+                POP1_16(x1); // RSP ignored
+                POP1_16(x1);
+                BFIw(xRBX, x1, 0, 16);
+                POP1_16(x1);
+                BFIw(xRDX, x1, 0, 16);
+                POP1_16(x1);
+                BFIw(xRCX, x1, 0, 16);
+                POP1_16(x1);
+                BFIw(xRAX, x1, 0, 16);
+            } else {
+                DEFAULT;
+            }
+            break;
+
         case 0x64:
             addr = dynarec64_6664(dyn, addr, ip, ninst, rex, _FS, ok, need_epilog);
             break;
@@ -313,7 +458,6 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             }
             SETFLAGS(X_ALL, SF_PENDING);
             nextop = F8;
-            UFLAG_DF(x1, d_imul16);
             GETSEW(x1, (opcode==0x69)?2:1);
             if(opcode==0x69) i32 = F16S; else i32 = F8S;
             MOV32w(x2, i32);
@@ -321,6 +465,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             UFLAG_RES(x2);
             gd=x2;
             GWBACK;
+            UFLAG_DF(x1, d_imul16);
             break;
 
         case 0x70:
@@ -424,7 +569,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     break;
             }
             break;
-            
+
         case 0x85:
             INST_NAME("TEST Ew, Gw");
             SETFLAGS(X_ALL, SF_SET_PENDING);
@@ -445,24 +590,41 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                 BFIx(ed, x1, 0, 16);
             } else {
                 GETGD;
-                addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, 0, 0, rex, LOCK_LOCK, 0, 0);
-                SMDMB();
-                TSTx_mask(ed, 1, 0, 0);    // mask=1
-                B_MARK(cNE);
-                MARKLOCK;
-                LDAXRH(x1, ed);
-                STLXRH(x3, gd, ed);
-                CBNZx_MARKLOCK(x3);
-                B_MARK2_nocond;
-                MARK;
-                LDRH_U12(x1, ed, 0);
-                STRH_U12(gd, ed, 0);
-                MARK2;
-                SMDMB();
+                addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, NULL, 0, 0, rex, LOCK_LOCK, 0, 0);
+                if(!ALIGNED_ATOMICH) {
+                    TSTx_mask(ed, 1, 0, 0);    // mask=1
+                    B_MARK(cNE);
+                }
+                if(arm64_atomics) {
+                    SWPALH(gd, x1, ed);
+                    SMDMB();
+                    if(!ALIGNED_ATOMICH) {
+                        B_MARK2_nocond;
+                    }
+                } else {
+                    MARKLOCK;
+                    LDAXRH(x1, ed);
+                    STLXRH(x3, gd, ed);
+                    CBNZx_MARKLOCK(x3);
+                    SMDMB();
+                    if(!ALIGNED_ATOMICH) {
+                        B_MARK2_nocond;
+                    }
+                }
+                if(!ALIGNED_ATOMICH) {
+                    MARK;
+                    LDRH_U12(x1, ed, 0);
+                    LDAXRB(x3, ed);
+                    STLXRB(x3, gd, ed);
+                    CBNZx_MARK(x3);
+                    STRH_U12(gd, ed, 0);
+                    SMDMB();
+                    MARK2;
+                }
                 BFIx(gd, x1, 0, 16);
             }
             break;
-            
+
         case 0x89:
             INST_NAME("MOV Ew, Gw");
             nextop = F8;
@@ -473,8 +635,8 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     BFIx(ed, gd, 0, 16);
                 }
             } else {
-                addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, 0xfff<<1, 1, rex, &lock, 0, 0);
-                STRH_U12(gd, ed, fixedaddress);
+                addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, &unscaled, 0xfff<<1, 1, rex, &lock, 0, 0);
+                STH(gd, ed, fixedaddress);
                 SMWRITELOCK(lock);
             }
             break;
@@ -488,12 +650,41 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     BFIx(gd, ed, 0, 16);
                 }
             } else {
-                addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, 0xfff<<1, 1, rex, &lock, 0, 0);
+                addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, &unscaled, 0xfff<<1, 1, rex, &lock, 0, 0);
                 SMREADLOCK(lock);
-                LDRH_U12(x1, ed, fixedaddress);
+                LDH(x1, ed, fixedaddress);
                 BFIx(gd, x1, 0, 16);
             }
             break;
+        case 0x8C:
+            INST_NAME("MOV EW, Seg");
+            nextop=F8;
+            u8 = (nextop&0x38)>>3;
+            LDRH_U12(x3, xEmu, offsetof(x64emu_t, segs[u8]));
+            if((nextop&0xC0)==0xC0) {   // reg <= seg
+                UXTHw(xRAX+(nextop&7)+(rex.b<<3), x3);
+            } else {                    // mem <= seg
+                addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, &unscaled, 0xfff<<1, 1, rex, NULL, 0, 0);
+                STH(x3, wback, fixedaddress);
+                SMWRITE2();
+            }
+            break;
+
+        case 0x8E:
+            INST_NAME("MOV Seg,Ew");
+            nextop = F8;
+            u8 = (nextop&0x38)>>3;
+            if((nextop&0xC0)==0xC0) {
+                ed = xRAX+(nextop&7)+(rex.b<<3);
+            } else {
+                SMREAD();
+                addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, &unscaled, 0xfff<<1, 1, rex, NULL, 0, 0);
+                LDH(x1, wback, fixedaddress);
+                ed = x1;
+            }
+            STRH_U12(ed, xEmu, offsetof(x64emu_t, segs[u8]));
+            STRw_U12(wZR, xEmu, offsetof(x64emu_t, segs_serial[u8]));
+            break;
 
             case 0x90:
             case 0x91:
@@ -517,23 +708,59 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
         case 0x98:
             INST_NAME("CBW");
             SXTBw(x1, xRAX);
-            BFIw(xRAX, x1, 0, 16);
+            BFIx(xRAX, x1, 0, 16);
+            break;
+        case 0x99:
+            INST_NAME("CWD");
+            SXTHw(x1, xRAX);
+            BFXILx(xRDX, x1, 16, 16);
+            break;
+        case 0x9C:
+            INST_NAME("PUSHF");
+            READFLAGS(X_ALL);
+            PUSH1_16(xFlags);
+            break;
+        case 0x9D:
+            INST_NAME("POPF");
+            SETFLAGS(X_ALL, SF_SET);
+            POP1_16(x1);    // probably not usefull...
+            BFIw(xFlags, x1, 0, 16);
+            MOV32w(x1, 0x3F7FD7);
+            ANDw_REG(xFlags, xFlags, x1);
+            ORRw_mask(xFlags, xFlags, 0b011111, 0);   //mask=0x00000002
+            SET_DFNONE(x1);
+            if(box64_wine) {    // should this be done all the time?
+                TBZ_NEXT(xFlags, F_TF);
+                MOV64x(x1, addr);
+                STORE_XEMU_CALL(x1);
+                CALL(native_singlestep, -1);
+                BFCw(xFlags, F_TF, 1);
+            }
             break;
 
         case 0xA1:
             INST_NAME("MOV EAX,Od");
-            u64 = F64;
-            MOV64x(x1, u64);
+            if(rex.is32bits)
+                u64 = F32;
+            else
+                u64 = F64;
+            MOV64z(x1, u64);
+            if(isLockAddress(u64)) lock=1; else lock = 0;
+            SMREADLOCK(lock);
             LDRH_U12(x2, x1, 0);
             BFIx(xRAX, x2, 0, 16);
             break;
 
         case 0xA3:
             INST_NAME("MOV Od,EAX");
-            u64 = F64;
-            MOV64x(x1, u64);
+            if(rex.is32bits)
+                u64 = F32;
+            else
+                u64 = F64;
+            MOV64z(x1, u64);
+            if(isLockAddress(u64)) lock=1; else lock = 0;
             STRH_U12(xRAX, x1, 0);
-            SMWRITE();
+            SMWRITELOCK(lock);
             break;
 
         case 0xA5:
@@ -563,6 +790,46 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             }
             break;
 
+        case 0xA7:
+            switch(rep) {
+            case 1:
+            case 2:
+                if(rep==1) {INST_NAME("REPNZ CMPSW");} else {INST_NAME("REPZ CMPSW");}
+                MAYSETFLAGS();
+                SETFLAGS(X_ALL, SF_SET_PENDING);
+                CBZx_NEXT(xRCX);
+                TBNZ_MARK2(xFlags, F_DF);
+                MARK;   // Part with DF==0
+                LDRH_S9_postindex(x1, xRSI, 2);
+                LDRH_S9_postindex(x2, xRDI, 2);
+                SUBx_U12(xRCX, xRCX, 1);
+                CMPSw_REG(x1, x2);
+                B_MARK3((rep==1)?cEQ:cNE);
+                CBNZx_MARK(xRCX);
+                B_MARK3_nocond;
+                MARK2;  // Part with DF==1
+                LDRH_S9_postindex(x1, xRSI, -2);
+                LDRH_S9_postindex(x2, xRDI, -2);
+                SUBx_U12(xRCX, xRCX, 1);
+                CMPSw_REG(x1, x2);
+                B_MARK3((rep==1)?cEQ:cNE);
+                CBNZx_MARK2(xRCX);
+                MARK3;  // end
+                emit_cmp16(dyn, ninst, x1, x2, x3, x4, x5);
+                break;
+            default:
+                INST_NAME("CMPSW");
+                SETFLAGS(X_ALL, SF_SET_PENDING);
+                GETDIR(x3, 2);
+                LDRH_U12(x1, xRSI, 0);
+                LDRH_U12(x2, xRDI, 0);
+                ADDx_REG(xRSI, xRSI, x3);
+                ADDx_REG(xRDI, xRDI, x3);
+                emit_cmp16(dyn, ninst, x1, x2, x3, x4, x5);
+                break;
+            }
+            break;
+
         case 0xA9:
             INST_NAME("TEST AX,Iw");
             SETFLAGS(X_ALL, SF_SET_PENDING);
@@ -595,6 +862,70 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             }
             break;
 
+        case 0xAD:
+            if(rep) {
+                INST_NAME("REP LODSW");
+                CBZx_NEXT(xRCX);
+                TBNZ_MARK2(xFlags, F_DF);
+                MARK;   // Part with DF==0
+                LDRH_S9_postindex(x2, xRSI, 2);
+                SUBx_U12(xRCX, xRCX, 1);
+                CBNZx_MARK(xRCX);
+                B_MARK3_nocond;
+                MARK2;  // Part with DF==1
+                LDRH_S9_postindex(x2, xRSI, -2);
+                SUBx_U12(xRCX, xRCX, 1);
+                CBNZx_MARK2(xRCX);
+                MARK3;
+                BFIx(xRAX, x2, 0, 16);
+                // done
+            } else {
+                INST_NAME("LODSW");
+                GETDIR(x3, 2);
+                LDRH_U12(x2, xRSI, 0);
+                ADDx_REG(xRSI, xRSI, x3);
+                BFIx(xRAX, x2, 0, 16);
+            }
+            break;
+
+        case 0xAF:
+            switch(rep) {
+            case 1:
+            case 2:
+                if(rep==1) {INST_NAME("REPNZ SCASW");} else {INST_NAME("REPZ SCASW");}
+                MAYSETFLAGS();
+                SETFLAGS(X_ALL, SF_SET_PENDING);
+                CBZx_NEXT(xRCX);
+                UXTHw(x1, xRAX);
+                TBNZ_MARK2(xFlags, F_DF);
+                MARK;   // Part with DF==0
+                LDRH_S9_postindex(x2, xRDI, 2);
+                SUBx_U12(xRCX, xRCX, 1);
+                CMPSw_REG(x1, x2);
+                B_MARK3((rep==1)?cEQ:cNE);
+                CBNZx_MARK(xRCX);
+                B_MARK3_nocond;
+                MARK2;  // Part with DF==1
+                LDRH_S9_postindex(x2, xRDI, -2);
+                SUBx_U12(xRCX, xRCX, 1);
+                CMPSw_REG(x1, x2);
+                B_MARK3((rep==1)?cEQ:cNE);
+                CBNZx_MARK2(xRCX);
+                MARK3;  // end
+                emit_cmp16(dyn, ninst, x1, x2, x3, x4, x5);
+                break;
+            default:
+                INST_NAME("SCASW");
+                SETFLAGS(X_ALL, SF_SET_PENDING);
+                GETDIR(x3, 2);
+                UXTHw(x1, xRAX);
+                LDRH_U12(x2, xRDI, 0);
+                ADDx_REG(xRDI, xRDI, x3);
+                emit_cmp16(dyn, ninst, x1, x2, x3, x4, x5);
+                break;
+            }
+            break;
+
         case 0xB8:
         case 0xB9:
         case 0xBA:
@@ -615,23 +946,29 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             switch((nextop>>3)&7) {
                 case 0:
                     INST_NAME("ROL Ew, Ib");
-                    MESSAGE(LOG_DUMP, "Need Optimization\n");
-                    SETFLAGS(X_OF|X_CF, SF_SET);
-                    GETEW(x1, 1);
-                    u8 = F8;
-                    MOV32w(x2, u8);
-                    CALL_(rol16, x1, x3);
-                    EWBACK;
+                    if(geted_ib(dyn, addr, ninst, nextop)&15) {
+                        SETFLAGS(X_OF|X_CF, SF_SUBSET_PENDING);
+                        GETEW(x1, 1);
+                        u8 = F8;
+                        emit_rol16c(dyn, ninst, x1, u8&15, x4, x5);
+                        EWBACK;
+                    } else {
+                        FAKEED;
+                        F8;
+                    }
                     break;
                 case 1:
                     INST_NAME("ROR Ew, Ib");
-                    MESSAGE(LOG_DUMP, "Need Optimization\n");
-                    SETFLAGS(X_OF|X_CF, SF_SET);
-                    GETEW(x1, 1);
-                    u8 = F8;
-                    MOV32w(x2, u8);
-                    CALL_(ror16, x1, x3);
-                    EWBACK;
+                    if(geted_ib(dyn, addr, ninst, nextop)&15) {
+                        SETFLAGS(X_OF|X_CF, SF_SUBSET_PENDING);
+                        GETEW(x1, 1);
+                        u8 = F8;
+                        emit_ror16c(dyn, ninst, x1, u8&15, x4, x5);
+                        EWBACK;
+                    } else {
+                        FAKEED;
+                        F8;
+                    }
                     break;
                 case 2:
                     INST_NAME("RCL Ew, Ib");
@@ -658,42 +995,42 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                 case 4:
                 case 6:
                     INST_NAME("SHL Ew, Ib");
-                    UFLAG_IF {MESSAGE(LOG_DUMP, "Need Optimization for flags\n");}
-                    SETFLAGS(X_ALL, SF_PENDING);
-                    GETEW(x1, 1);
-                    u8 = F8;
-                    UFLAG_IF {MOV32w(x2, (u8&0x1f));}
-                    UFLAG_OP12(ed, x2)
-                    LSLw_IMM(ed, ed, u8&0x1f);
-                    EWBACK;
-                    UFLAG_RES(ed);
-                    UFLAG_DF(x3, d_shl16);
+                    if(geted_ib(dyn, addr, ninst, nextop)&0x1f) {
+                        SETFLAGS(X_ALL, SF_SET_PENDING);    // some flags are left undefined
+                        GETEW(x1, 0);
+                        u8 = (F8)&0x1f;
+                        emit_shl16c(dyn, ninst, x1, u8, x5, x4);
+                        EWBACK;
+                    } else {
+                        FAKEED;
+                        F8;
+                    }
                     break;
                 case 5:
                     INST_NAME("SHR Ed, Ib");
-                    UFLAG_IF {MESSAGE(LOG_DUMP, "Need Optimization for flags\n");}
-                    SETFLAGS(X_ALL, SF_PENDING);
-                    GETEW(x1, 1);
-                    u8 = F8;
-                    UFLAG_IF {MOV32w(x2, (u8&0x1f));}
-                    UFLAG_OP12(ed, x2)
-                    LSRw_IMM(ed, ed, u8&0x1f);
-                    EWBACK;
-                    UFLAG_RES(ed);
-                    UFLAG_DF(x3, d_shr16);
+                    if(geted_ib(dyn, addr, ninst, nextop)&0x1f) {
+                        SETFLAGS(X_ALL, SF_SET_PENDING);    // some flags are left undefined
+                        GETEW(x1, 0);
+                        u8 = (F8)&0x1f;
+                        emit_shr16c(dyn, ninst, x1, u8, x5, x4);
+                        EWBACK;
+                    } else {
+                        FAKEED;
+                        F8;
+                    }
                     break;
                 case 7:
                     INST_NAME("SAR Ed, Ib");
-                    SETFLAGS(X_ALL, SF_PENDING);
-                    UFLAG_IF {MESSAGE(LOG_DUMP, "Need Optimization for flags\n");}
-                    GETSEW(x1, 1);
-                    u8 = F8;
-                    UFLAG_IF {MOV32w(x2, (u8&0x1f));}
-                    UFLAG_OP12(ed, x2)
-                    ASRw(ed, ed, (u8&0x1f));
-                    EWBACK;
-                    UFLAG_RES(ed);
-                    UFLAG_DF(x3, d_sar16);
+                    if(geted_ib(dyn, addr, ninst, nextop)&0x1f) {
+                        SETFLAGS(X_ALL, SF_SET_PENDING);    // some flags are left undefined
+                        GETSEW(x1, 0);
+                        u8 = (F8)&0x1f;
+                        emit_sar16c(dyn, ninst, x1, u8, x5, x4);
+                        EWBACK;
+                    } else {
+                        FAKEED;
+                        F8;
+                    }
                     break;
             }
             break;
@@ -707,121 +1044,199 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                 MOV32w(x1, u16);
                 BFIx(ed, x1, 0, 16);
             } else {
-                addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, 0xfff<<1, 1, rex, &lock, 0, 2);
+                addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, &unscaled, 0xfff<<1, 1, rex, &lock, 0, 2);
                 u16 = F16;
                 MOV32w(x1, u16);
-                STRH_U12(x1, ed, fixedaddress);
+                STH(x1, ed, fixedaddress);
                 SMWRITELOCK(lock);
             }
             break;
 
         case 0xD1:
-        case 0xD3:
             nextop = F8;
             switch((nextop>>3)&7) {
                 case 0:
-                    if(opcode==0xD1) {
-                        INST_NAME("ROL Ew, 1");
-                        MOV32w(x2, 1);
-                    } else {
-                        INST_NAME("ROL Ew, CL");
-                        ANDw_mask(x2, xRCX, 0, 0b00100);
-                    }
-                    MESSAGE(LOG_DUMP, "Need Optimization\n");
-                    SETFLAGS(X_OF|X_CF, SF_SET);
+                    INST_NAME("ROL Ew, 1");
+                    SETFLAGS(X_OF|X_CF, SF_SUBSET_PENDING);
                     GETEW(x1, 0);
-                    CALL_(rol16, x1, x3);
+                    emit_rol16c(dyn, ninst, x1, 1, x5, x4);
                     EWBACK;
                     break;
                 case 1:
-                    if(opcode==0xD1) {
-                        INST_NAME("ROR Ew, 1");
-                        MOV32w(x2, 1);
-                    } else {
-                        INST_NAME("ROR Ew, CL");
-                        ANDw_mask(x2, xRCX, 0, 0b00100);
-                    }
-                    MESSAGE(LOG_DUMP, "Need Optimization\n");
-                    SETFLAGS(X_OF|X_CF, SF_SET);
+                    INST_NAME("ROR Ew, 1");
+                    SETFLAGS(X_OF|X_CF, SF_SUBSET_PENDING);
                     GETEW(x1, 0);
-                    CALL_(ror16, x1, x3);
+                    emit_ror16c(dyn, ninst, x1, 1, x5, x4);
                     EWBACK;
                     break;
                 case 2:
-                    if(opcode==0xD1) {INST_NAME("RCL Ew, 1"); } else { INST_NAME("RCL Ew, CL");}
+                    INST_NAME("RCL Ew, 1");
                     MESSAGE(LOG_DUMP, "Need Optimization\n");
                     READFLAGS(X_CF);
                     SETFLAGS(X_OF|X_CF, SF_SET);
-                    if(opcode==0xD1) {MOV32w(x2, 1);} else {ANDw_mask(x2, xRCX, 0, 0b00100);}
+                    MOV32w(x2, 1);
                     GETEW(x1, 0);
                     CALL_(rcl16, x1, x3);
                     EWBACK;
                     break;
                 case 3:
-                    if(opcode==0xD1) {INST_NAME("RCR Ew, 1");} else {INST_NAME("RCR Ew, CL");}
+                    INST_NAME("RCR Ew, 1");
                     MESSAGE(LOG_DUMP, "Need Optimization\n");
                     READFLAGS(X_CF);
                     SETFLAGS(X_OF|X_CF, SF_SET);
-                    if(opcode==0xD1) {MOV32w(x2, 1);} else {ANDw_mask(x2, xRCX, 0, 0b00100);}
+                    MOV32w(x2, 1);
                     GETEW(x1, 0);
                     CALL_(rcr16, x1, x3);
                     EWBACK;
                     break;
                 case 4:
                 case 6:
-                    if(opcode==0xD1) {
-                        INST_NAME("SHL Ew, 1");
-                        MOV32w(x4, 1);
-                    } else {
-                        INST_NAME("SHL Ew, CL");
-                        ANDw_mask(x4, xRCX, 0, 0b00100);
-                    }
-                    UFLAG_IF {MESSAGE(LOG_DUMP, "Need Optimization for flags\n");}
-                    SETFLAGS(X_ALL, SF_PENDING);
+                    INST_NAME("SHL Ew, 1");
+                    SETFLAGS(X_ALL, SF_SET_PENDING);    // some flags are left undefined
                     GETEW(x1, 0);
-                    UFLAG_OP12(ed, x4)
-                    LSLw_REG(ed, ed, x4);
+                    emit_shl16c(dyn, ninst, x1, 1, x5, x4);
                     EWBACK;
-                    UFLAG_RES(ed);
-                    UFLAG_DF(x3, d_shl16);
                     break;
                 case 5:
-                    if(opcode==0xD1) {
-                        INST_NAME("SHR Ew, 1");
-                        MOV32w(x4, 1);
-                    } else {
-                        INST_NAME("SHR Ew, CL");
-                        ANDw_mask(x4, xRCX, 0, 0b00100);
-                    }
-                    UFLAG_IF {MESSAGE(LOG_DUMP, "Need Optimization for flags\n");}
-                    SETFLAGS(X_ALL, SF_PENDING);
+                    INST_NAME("SHR Ew, 1");
+                    SETFLAGS(X_ALL, SF_SET_PENDING);    // some flags are left undefined
                     GETEW(x1, 0);
-                    UFLAG_OP12(ed, x4)
-                    LSRw_REG(ed, ed, x4);
+                    emit_shr16c(dyn, ninst, x1, 1, x5, x4);
                     EWBACK;
-                    UFLAG_RES(ed);
-                    UFLAG_DF(x3, d_shr16);
                     break;
                 case 7:
-                    if(opcode==0xD1) {
-                        INST_NAME("SAR Ew, 1");
-                        MOV32w(x4, 1);
-                    } else {
-                        INST_NAME("SAR Ew, CL");
-                        ANDw_mask(x4, xRCX, 0, 0b00100);
-                    }
-                    UFLAG_IF {MESSAGE(LOG_DUMP, "Need Optimization for flags\n");}
-                    SETFLAGS(X_ALL, SF_PENDING);
+                    INST_NAME("SAR Ew, 1");
+                    SETFLAGS(X_ALL, SF_SET_PENDING);    // some flags are left undefined
                     GETSEW(x1, 0);
-                    UFLAG_OP12(ed, x4)
-                    ASRw_REG(ed, ed, x4);
+                    emit_sar16c(dyn, ninst, x1, 1, x5, x4);
                     EWBACK;
-                    UFLAG_RES(ed);
-                    UFLAG_DF(x3, d_sar16);
                     break;
             }
             break;
-            
+
+        case 0xD3:
+            nextop = F8;
+            switch((nextop>>3)&7) {
+                case 0:
+                    INST_NAME("ROL Ew, CL");
+                    SETFLAGS(X_OF|X_CF, SF_SUBSET);
+                    if(box64_dynarec_safeflags>1)
+                        MAYSETFLAGS();
+                    UFLAG_IF {
+                        TSTw_mask(xRCX, 0, 0b00100);  //mask=0x00000001f
+                        B_NEXT(cEQ);
+                    }
+                    ANDw_mask(x2, xRCX, 0, 0b00011);  //mask=0x00000000f
+                    MOV32w(x4, 16);
+                    SUBx_REG(x2, x4, x2);
+                    GETEW(x1, 0);
+                    ORRw_REG_LSL(ed, ed, ed, 16);
+                    LSRw_REG(ed, ed, x2);
+                    EWBACK;
+                    UFLAG_IF {  // calculate flags directly
+                        CMPSw_U12(x2, 15);
+                        B_MARK(cNE);
+                            ADDxw_REG_LSR(x3, ed, ed, 15);
+                            BFIw(xFlags, x3, F_OF, 1);
+                        MARK;
+                        BFIw(xFlags, ed, F_CF, 1);
+                        UFLAG_DF(x2, d_none);
+                    }
+                    break;
+                case 1:
+                    INST_NAME("ROR Ew, CL");
+                    SETFLAGS(X_OF|X_CF, SF_SUBSET);
+                    if(box64_dynarec_safeflags>1)
+                        MAYSETFLAGS();
+                    UFLAG_IF {
+                        TSTw_mask(xRCX, 0, 0b00100);  //mask=0x00000001f
+                        B_NEXT(cEQ);
+                    }
+                    ANDw_mask(x2, xRCX, 0, 0b00011);  //mask=0x00000000f
+                    GETEW(x1, 0);
+                    ORRw_REG_LSL(ed, ed, ed, 16);
+                    LSRw_REG(ed, ed, x2);
+                    EWBACK;
+                    UFLAG_IF {  // calculate flags directly
+                        CMPSw_U12(x2, 1);
+                        B_MARK(cNE);
+                            LSRxw(x2, ed, 14); // x2 = d>>14
+                            EORw_REG_LSR(x2, x2, x2, 1); // x2 = ((d>>14) ^ ((d>>14)>>1))
+                            BFIw(xFlags, x2, F_OF, 1);
+                        MARK;
+                        BFXILw(xFlags, ed, 15, 1);
+                        UFLAG_DF(x2, d_none);
+                    }
+                    break;
+                case 2:
+                    INST_NAME("RCL Ew, CL");
+                    MESSAGE(LOG_DUMP, "Need Optimization\n");
+                    READFLAGS(X_CF);
+                    SETFLAGS(X_OF|X_CF, SF_SET);
+                    ANDw_mask(x2, xRCX, 0, 0b00100);
+                    GETEW(x1, 0);
+                    CALL_(rcl16, x1, x3);
+                    EWBACK;
+                    break;
+                case 3:
+                    INST_NAME("RCR Ew, CL");
+                    MESSAGE(LOG_DUMP, "Need Optimization\n");
+                    READFLAGS(X_CF);
+                    SETFLAGS(X_OF|X_CF, SF_SET);
+                    ANDw_mask(x2, xRCX, 0, 0b00100);
+                    GETEW(x1, 0);
+                    CALL_(rcr16, x1, x3);
+                    EWBACK;
+                    break;
+                case 4:
+                case 6:
+                    INST_NAME("SHL Ew, CL");
+                    SETFLAGS(X_ALL, SF_SET_PENDING);    // some flags are left undefined
+                    if(box64_dynarec_safeflags>1)
+                        MAYSETFLAGS();
+                    UFLAG_IF {
+                        ANDSw_mask(x2, xRCX, 0, 0b00100);  //mask=0x00000001f
+                        B_NEXT(cEQ);
+                    } else {
+                        ANDw_mask(x2, xRCX, 0, 0b00100);  //mask=0x00000001f
+                    }
+                    GETEW(x1, 0);
+                    emit_shl16(dyn, ninst, x1, x2, x5, x4);
+                    EWBACK;
+                    break;
+                case 5:
+                    INST_NAME("SHR Ew, CL");
+                    SETFLAGS(X_ALL, SF_SET_PENDING);    // some flags are left undefined
+                    if(box64_dynarec_safeflags>1)
+                        MAYSETFLAGS();
+                    UFLAG_IF {
+                        ANDSw_mask(x2, xRCX, 0, 0b00100);  //mask=0x00000001f
+                        B_NEXT(cEQ);
+                    } else {
+                        ANDw_mask(x2, xRCX, 0, 0b00100);  //mask=0x00000001f
+                    }
+                    GETEW(x1, 0);
+                    emit_shr16(dyn, ninst, x1, x2, x5, x4);
+                    EWBACK;
+                    break;
+                case 7:
+                    INST_NAME("SAR Ew, CL");
+                    SETFLAGS(X_ALL, SF_SET_PENDING);    // some flags are left undefined
+                    if(box64_dynarec_safeflags>1)
+                        MAYSETFLAGS();
+                    UFLAG_IF {
+                        ANDSw_mask(x2, xRCX, 0, 0b00100);  //mask=0x00000001f
+                        B_NEXT(cEQ);
+                    } else {
+                        ANDw_mask(x2, xRCX, 0, 0b00100);  //mask=0x00000001f
+                    }
+                    GETSEW(x1, 0);
+                    emit_sar16(dyn, ninst, x1, x2, x5, x4);
+                    EWBACK;
+                    break;
+            }
+            break;
+
         case 0xF0:
             return dynarec64_66F0(dyn, addr, ip, ninst, rex, rep, ok, need_epilog);
 
@@ -853,24 +1268,24 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                 case 4:
                     INST_NAME("MUL AX, Ew");
                     SETFLAGS(X_ALL, SF_PENDING);
-                    UFLAG_DF(x1, d_mul16);
                     GETEW(x1, 0);
                     UXTHw(x2, xRAX);
                     MULw(x1, x2, x1);
                     UFLAG_RES(x1);
                     BFIx(xRAX, x1, 0, 16);
                     BFXILx(xRDX, x1, 16, 16);
+                    UFLAG_DF(x1, d_mul16);
                     break;
                 case 5:
                     INST_NAME("IMUL AX, Ew");
                     SETFLAGS(X_ALL, SF_PENDING);
-                    UFLAG_DF(x1, d_imul16);
                     GETSEW(x1, 0);
                     SXTHw(x2, xRAX);
                     MULw(x1, x2, x1);
                     UFLAG_RES(x1);
                     BFIx(xRAX, x1, 0, 16);
                     BFXILx(xRDX, x1, 16, 16);
+                    UFLAG_DF(x1, d_imul16);
                     break;
                 case 6:
                     INST_NAME("DIV Ew");
@@ -885,6 +1300,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     break;
                 case 7:
                     INST_NAME("IDIV Ew");
+                    SKIPTEST(x1);
                     SETFLAGS(X_ALL, SF_SET);
                     GETSEW(x1, 0);
                     UXTHw(x2, xRAX);
@@ -896,7 +1312,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     break;
             }
             break;
-            
+
         case 0xFF:
             nextop = F8;
             switch((nextop>>3)&7) {
@@ -914,10 +1330,21 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     emit_dec16(dyn, ninst, x1, x2, x4);
                     EWBACK;
                     break;
+                case 6: // Push Ew
+                    if(rex.is32bits) {
+                        INST_NAME("PUSH Ew");
+                        GETEW(x1, 0);
+                        PUSH1_16(ed);
+                    } else {
+                        DEFAULT;
+                    }
+                    break;
+
                 default:
                     DEFAULT;
             }
             break;
+
         default:
             DEFAULT;
     }

src/dynarec/arm64/dynarec_arm64_6664.c

@@ -1,7 +1,6 @@
 #include <stdio.h>
 #include <stdlib.h>
 #include <stddef.h>
-#include <pthread.h>
 #include <errno.h>
 
 #include "debug.h"
@@ -22,8 +21,6 @@
 #include "dynarec_arm64_helper.h"
 #include "dynarec_arm64_functions.h"
 
-#define GETG        gd = ((nextop&0x38)>>3)+(rex.r<<3)
-
 uintptr_t dynarec64_6664(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int seg, int* ok, int* need_epilog)
 {
     (void)ip; (void)need_epilog;
@@ -34,14 +31,10 @@ uintptr_t dynarec64_6664(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
     int64_t j64;
     int v0, v1;
     int64_t fixedaddress;
+    int unscaled;
     MAYUSE(j64);
 
-    // REX prefix before the 66 are ignored
-    rex.rex = 0;
-    while(opcode>=0x40 && opcode<=0x4f) {
-        rex.rex = opcode;
-        opcode = F8;
-    }
+    GETREX();
 
     /*if(rex.w && opcode!=0x0f) {   // rex.w cancels "66", but not for 66 0f type of prefix
         MESSAGE(LOG_DUMP, "Here!\n");
@@ -66,8 +59,8 @@ uintptr_t dynarec64_6664(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
                     } else {
                         grab_segdata(dyn, addr, ninst, x4, seg);
                         SMREAD();
-                        addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0, 0, rex, NULL, 0, 0);
-                        v1 = fpu_get_scratch(dyn);                                                                       \
+                        addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, NULL, 0, 0, rex, NULL, 0, 0);
+                        v1 = fpu_get_scratch(dyn);
                         VLDR64_REG(v1, ed, x4);
                     }
                     FCMPD(v0, v1);
@@ -83,7 +76,7 @@ uintptr_t dynarec64_6664(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
                     FMOVD(v1, v0);
                 } else {
                     grab_segdata(dyn, addr, ninst, x4, seg);
-                    addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0, 0, rex, NULL, 0, 0);
+                    addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, NULL, 0, 0, rex, NULL, 0, 0);
                     VSTR64_REG(v0, ed, x4);
                     SMWRITE();
                 }
@@ -109,7 +102,7 @@ uintptr_t dynarec64_6664(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
                 }
             } else {
                 grab_segdata(dyn, addr, ninst, x4, seg);
-                addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, 0, 0, rex, NULL, 0, 0);
+                addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, NULL, 0, 0, rex, NULL, 0, 0);
                 if(rex.w) {
                     STRx_REG(gd, ed, x4);
                 } else {
@@ -135,7 +128,7 @@ uintptr_t dynarec64_6664(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
             } else {                    // mem <= reg
                 grab_segdata(dyn, addr, ninst, x4, seg);
                 SMREAD();
-                addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, 0, 0, rex, NULL, 0, 0);
+                addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, NULL, 0, 0, rex, NULL, 0, 0);
                 if(rex.w) {
                     LDRx_REG(gd, ed, x4);
                 } else {

src/dynarec/arm64/dynarec_arm64_66f0.c

@@ -1,7 +1,6 @@
 #include <stdio.h>
 #include <stdlib.h>
 #include <stddef.h>
-#include <pthread.h>
 #include <errno.h>
 
 #include "debug.h"
@@ -34,6 +33,7 @@ uintptr_t dynarec64_66F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
     int32_t i32;
     int64_t i64, j64;
     int64_t fixedaddress;
+    int unscaled;
     MAYUSE(gb1);
     MAYUSE(gb2);
     MAYUSE(wb1);
@@ -44,12 +44,8 @@ uintptr_t dynarec64_66F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
         rep = opcode-0xF1;
         opcode = F8;
     }
-    // REX prefix before the F0/66 are ignored
-    rex.rex = 0;
-    while(opcode>=0x40 && opcode<=0x4f) {
-        rex.rex = opcode;
-        opcode = F8;
-    }
+
+    GETREX();
 
     switch(opcode) {
         case 0x09:
@@ -57,21 +53,29 @@ uintptr_t dynarec64_66F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
             SETFLAGS(X_ALL, SF_SET_PENDING);
             nextop = F8;
             GETGW(x5);
-            SMDMB();
             if(MODREG) {
                 ed = xRAX+(nextop&7)+(rex.b<<3);
                 UXTHw(x6, ed);
                 emit_or16(dyn, ninst, x6, x5, x3, x4);
                 BFIx(ed, x6, 0, 16);
             } else {
-                addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, 0, 0, rex, LOCK_LOCK, 0, 0);
-                MARKLOCK;
-                LDAXRH(x1, wback);
-                emit_or16(dyn, ninst, x1, x5, x3, x4);
-                STLXRH(x3, x1, wback);
-                CBNZx_MARKLOCK(x3);
+                addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, NULL, 0, 0, rex, LOCK_LOCK, 0, 0);
+                if(arm64_atomics) {
+                    UFLAG_IF {
+                        LDSETALH(x5, x1, wback);
+                        emit_or16(dyn, ninst, x1, x5, x3, x4);
+                    } else {
+                        STSETLH(x5, wback);
+                    }
+                } else {
+                    MARKLOCK;
+                    LDAXRH(x1, wback);
+                    emit_or16(dyn, ninst, x1, x5, x3, x4);
+                    STLXRH(x3, x1, wback);
+                    CBNZx_MARKLOCK(x3);
+                }
+                SMDMB();
             }
-            SMDMB();
             break;
 
         case 0x0F:
@@ -83,7 +87,6 @@ uintptr_t dynarec64_66F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
                     SETFLAGS(X_ALL, SF_SET_PENDING);
                     nextop = F8;
                     GETGD;
-                    SMDMB();
                     UXTHw(x6, xRAX);
                     if(MODREG) {
                         ed = xRAX+(nextop&7)+(rex.b<<3);
@@ -93,74 +96,105 @@ uintptr_t dynarec64_66F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
                         B_MARK(cNE);
                         BFIx(ed, gd, 0, 16);
                     } else {
-                        addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, 0, 0, rex, LOCK_LOCK, 0, 0);
-                        TSTx_mask(wback, 1, 0, 0);    // mask=1
-                        B_MARK3(cNE);
+                        addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, NULL, 0, 0, rex, LOCK_LOCK, 0, 0);
+                        if(!ALIGNED_ATOMICH) {
+                            TSTx_mask(wback, 1, 0, 0);    // mask=1
+                            B_MARK3(cNE);
+                        }
                         // Aligned version
-                        MARKLOCK;
-                        LDAXRH(x1, wback);
-                        CMPSw_REG(x6, x1);
-                        B_MARK(cNE);
-                        // EAX == Ed
-                        STLXRH(x4, gd, wback);
-                        CBNZx_MARKLOCK(x4);
-                        // done
-                        B_MARK_nocond;
-                        // Unaligned version
-                        MARK3;
-                        LDRH_U12(x1, wback, 0);
-                        LDAXRB(x3, wback); // dummy read, to arm the write...
-                        CMPSw_REG(x6, x1);
-                        B_MARK(cNE);
-                        // EAX == Ed
-                        STLXRB(x4, gd, wback);
-                        CBNZx_MARK3(x4);
-                        STRH_U12(gd, wback, 0);
+                        if(arm64_atomics) {
+                            MOVw_REG(x1, x6);
+                            CASALH(x1, gd, wback);
+                        } else {
+                            MARKLOCK;
+                            LDAXRH(x1, wback);
+                            CMPSw_REG(x6, x1);
+                            B_MARK(cNE);
+                            // EAX == Ed
+                            STLXRH(x4, gd, wback);
+                            CBNZx_MARKLOCK(x4);
+                            // done
+                        }
+                        if(!ALIGNED_ATOMICH) {
+                            B_MARK_nocond;
+                            // Unaligned version
+                            MARK3;
+                            LDRH_U12(x1, wback, 0);
+                            LDAXRB(x3, wback); // dummy read, to arm the write...
+                            CMPSw_REG(x6, x1);
+                            B_MARK(cNE);
+                            // EAX == Ed
+                            STLXRB(x4, gd, wback);
+                            CBNZx_MARK3(x4);
+                            STRH_U12(gd, wback, 0);
+                        }
                     }
+                    SMDMB();
                     MARK;
                     // Common part (and fallback for EAX != Ed)
                     UFLAG_IF {emit_cmp16(dyn, ninst, x6, x1, x3, x4, x5);}
                     BFIx(xRAX, x1, 0, 16);
-                    SMDMB();
                     break;
-                    
+
                 case 0xC1:
                     INST_NAME("LOCK XADD Gw, Ew");
                     SETFLAGS(X_ALL, SF_SET_PENDING);
                     nextop = F8;
                     gd = xRAX+((nextop&0x38)>>3)+(rex.r<<3);
                     UXTHx(x5, gd);
-                    SMDMB();
                     if(MODREG) {
                         ed = xRAX+(nextop&7)+(rex.b<<3);
                         BFIx(gd, ed, 0, 16);
                         emit_add16(dyn, ninst, x5, gd, x3, x4);
                         BFIx(ed, x5, 0, 16);
                     } else {
-                        addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, 0, 0, rex, LOCK_LOCK, 0, 0);
-                        MARKLOCK;
-                        LDAXRH(x1, wback);
-                        ADDxw_REG(x4, x1, x5);
-                        STLXRH(x3, x4, wback);
-                        CBNZx_MARKLOCK(x3);
+                        addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, NULL, 0, 0, rex, LOCK_LOCK, 0, 0);
+                        if(arm64_atomics) {
+                            LDADDALH(x5, x1, wback);
+                        } else {
+                            MARKLOCK;
+                            LDAXRH(x1, wback);
+                            ADDxw_REG(x4, x1, x5);
+                            STLXRH(x3, x4, wback);
+                            CBNZx_MARKLOCK(x3);
+                        }
+                        SMDMB();
                         IFX(X_ALL|X_PEND) {
                             MOVxw_REG(x2, x1);
                             emit_add16(dyn, ninst, x2, x5, x3, x4);
                         }
                         BFIx(gd, x1, 0, 16);
                     }
-                    SMDMB();
                     break;
 
                 default:
                     DEFAULT;
             }
             break;
-
+        case 0x11:
+            INST_NAME("LOCK ADC Ew, Gw");
+            READFLAGS(X_CF);
+            SETFLAGS(X_ALL, SF_SET_PENDING);
+            nextop = F8;
+            GETGW(x5);
+            if(MODREG) {
+                ed = xRAX+(nextop&7)+(rex.b<<3);
+                UXTHw(x6, ed);
+                emit_adc16(dyn, ninst, x6, x5, x3, x4);
+                BFIx(ed, x6, 0, 16);
+            } else {
+                addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, NULL, 0, 0, rex, LOCK_LOCK, 0, 0);
+                MARKLOCK;
+                LDAXRH(x1, wback);
+                emit_adc16(dyn, ninst, x1, x5, x3, x4);
+                STLXRH(x3, x1, wback);
+                CBNZx_MARKLOCK(x3);
+                SMDMB();
+            }
+            break;
         case 0x81:
         case 0x83:
             nextop = F8;
-            SMDMB();
             switch((nextop>>3)&7) {
                 case 0: //ADD
                     if(opcode==0x81) {
@@ -177,25 +211,38 @@ uintptr_t dynarec64_66F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
                         emit_add16(dyn, ninst, x6, x5, x3, x4);
                         BFIx(ed, x6, 0, 16);
                     } else {
-                        addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, 0, 0, rex, LOCK_LOCK, 0, (opcode==0x81)?2:1);
+                        addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, NULL, 0, 0, rex, LOCK_LOCK, 0, (opcode==0x81)?2:1);
                         if(opcode==0x81) i32 = F16S; else i32 = F8S;
                         MOV32w(x5, i32);
-                        TSTx_mask(wback, 1, 0, 0);    // mask=1
-                        B_MARK(cNE);
-                        MARKLOCK;
-                        LDAXRH(x1, wback);
-                        emit_add16(dyn, ninst, x1, x5, x3, x4);
-                        STLXRH(x3, x1, wback);
-                        CBNZx_MARKLOCK(x3);
-                        B_NEXT_nocond;
-                        MARK;   // unaligned! also, not enough 
-                        LDRH_U12(x1, wback, 0);
-                        LDAXRB(x4, wback);
-                        BFIw(x1, x4, 0, 8); // re-inject
-                        emit_add16(dyn, ninst, x1, x5, x3, x4);
-                        STLXRB(x3, x1, wback);
-                        CBNZx_MARK(x3);
-                        STRH_U12(x1, wback, 0);    // put the whole value
+                        if(!ALIGNED_ATOMICH) {
+                            TSTx_mask(wback, 1, 0, 0);    // mask=1
+                            B_MARK(cNE);
+                        }
+                        if(arm64_atomics) {
+                            LDADDALH(x5, x1, wback);
+                            UFLAG_IF {
+                                emit_add16(dyn, ninst, x1, x5, x3, x4);    
+                            }
+                        } else {
+                            MARKLOCK;
+                            LDAXRH(x1, wback);
+                            emit_add16(dyn, ninst, x1, x5, x3, x4);
+                            STLXRH(x3, x1, wback);
+                            CBNZx_MARKLOCK(x3);
+                        }
+                        SMDMB();
+                        if(!ALIGNED_ATOMICH) {
+                            B_NEXT_nocond;
+                            MARK;   // unaligned! also, not enough
+                            LDRH_U12(x1, wback, 0);
+                            LDAXRB(x4, wback);
+                            BFIw(x1, x4, 0, 8); // re-inject
+                            emit_add16(dyn, ninst, x1, x5, x3, x4);
+                            STLXRB(x3, x1, wback);
+                            CBNZx_MARK(x3);
+                            STRH_U12(x1, wback, 0);    // put the whole value
+                            SMDMB();
+                        }
                     }
                     break;
                 case 1: //OR
@@ -209,14 +256,24 @@ uintptr_t dynarec64_66F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
                         emit_or16(dyn, ninst, x6, x5, x3, x4);
                         BFIx(ed, x6, 0, 16);
                     } else {
-                        addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, 0, 0, rex, LOCK_LOCK, 0, (opcode==0x81)?2:1);
+                        addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, NULL, 0, 0, rex, LOCK_LOCK, 0, (opcode==0x81)?2:1);
                         if(opcode==0x81) i32 = F16S; else i32 = F8S;
                         MOV32w(x5, i32);
-                        MARKLOCK;
-                        LDAXRH(x1, wback);
-                        emit_or16(dyn, ninst, x1, x5, x3, x4);
-                        STLXRH(x3, x1, wback);
-                        CBNZx_MARKLOCK(x3);
+                        if(arm64_atomics) {
+                            UFLAG_IF {
+                                LDSETALH(x5, x1, wback);
+                                emit_or16(dyn, ninst, x1, x5, x3, x4);
+                            } else {
+                                STSETLH(x5, wback);
+                            }
+                        } else {
+                            MARKLOCK;
+                            LDAXRH(x1, wback);
+                            emit_or16(dyn, ninst, x1, x5, x3, x4);
+                            STLXRH(x3, x1, wback);
+                            CBNZx_MARKLOCK(x3);
+                        }
+                        SMDMB();
                     }
                     break;
                 case 2: //ADC
@@ -231,7 +288,7 @@ uintptr_t dynarec64_66F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
                         emit_adc16(dyn, ninst, x6, x5, x3, x4);
                         BFIx(ed, x6, 0, 16);
                     } else {
-                        addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, 0, 0, rex, LOCK_LOCK, 0, (opcode==0x81)?2:1);
+                        addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, NULL, 0, 0, rex, LOCK_LOCK, 0, (opcode==0x81)?2:1);
                         if(opcode==0x81) i32 = F16S; else i32 = F8S;
                         MOV32w(x5, i32);
                         MARKLOCK;
@@ -239,6 +296,7 @@ uintptr_t dynarec64_66F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
                         emit_adc16(dyn, ninst, x1, x5, x3, x4);
                         STLXRH(x3, x1, wback);
                         CBNZx_MARKLOCK(x3);
+                        SMDMB();
                     }
                     break;
                 case 3: //SBB
@@ -253,7 +311,7 @@ uintptr_t dynarec64_66F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
                         emit_sbb16(dyn, ninst, x6, x5, x3, x4);
                         BFIx(ed, x6, 0, 16);
                     } else {
-                        addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, 0, 0, rex, LOCK_LOCK, 0, (opcode==0x81)?2:1);
+                        addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, NULL, 0, 0, rex, LOCK_LOCK, 0, (opcode==0x81)?2:1);
                         if(opcode==0x81) i32 = F16S; else i32 = F8S;
                         MOV32w(x5, i32);
                         MARKLOCK;
@@ -261,6 +319,7 @@ uintptr_t dynarec64_66F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
                         emit_sbb16(dyn, ninst, x1, x5, x3, x4);
                         STLXRH(x3, x1, wback);
                         CBNZx_MARKLOCK(x3);
+                        SMDMB();
                     }
                     break;
                 case 4: //AND
@@ -274,14 +333,26 @@ uintptr_t dynarec64_66F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
                         emit_and16(dyn, ninst, x6, x5, x3, x4);
                         BFIx(ed, x6, 0, 16);
                     } else {
-                        addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, 0, 0, rex, LOCK_LOCK, 0, (opcode==0x81)?2:1);
+                        addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, NULL, 0, 0, rex, LOCK_LOCK, 0, (opcode==0x81)?2:1);
                         if(opcode==0x81) i32 = F16S; else i32 = F8S;
-                        MOV32w(x5, i32);
-                        MARKLOCK;
-                        LDAXRH(x1, wback);
-                        emit_and16(dyn, ninst, x1, x5, x3, x4);
-                        STLXRH(x3, x1, wback);
-                        CBNZx_MARKLOCK(x3);
+                        if(arm64_atomics) {
+                            MOV32w(x5, ~i32);
+                            UFLAG_IF {
+                                LDCLRALH(x5, x1, wback);
+                                MVNw_REG(x5, x5);
+                                emit_and16(dyn, ninst, x1, x5, x3, x4);
+                            } else {
+                                STCLRLH(x5, wback);
+                            }
+                        } else {
+                            MOV32w(x5, i32);
+                            MARKLOCK;
+                            LDAXRH(x1, wback);
+                            emit_and16(dyn, ninst, x1, x5, x3, x4);
+                            STLXRH(x3, x1, wback);
+                            CBNZx_MARKLOCK(x3);
+                            SMDMB();
+                        }
                     }
                     break;
                 case 5: //SUB
@@ -295,25 +366,41 @@ uintptr_t dynarec64_66F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
                         emit_sub16(dyn, ninst, x6, x5, x3, x4);
                         BFIx(ed, x6, 0, 16);
                     } else {
-                        addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, 0, 0, rex, LOCK_LOCK, 0, (opcode==0x81)?2:1);
+                        addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, NULL, 0, 0, rex, LOCK_LOCK, 0, (opcode==0x81)?2:1);
                         if(opcode==0x81) i32 = F16S; else i32 = F8S;
                         MOV32w(x5, i32);
-                        TSTx_mask(wback, 1, 0, 0);    // mask=1
-                        B_MARK(cNE);
-                        MARKLOCK;
-                        LDAXRH(x1, wback);
-                        emit_sub16(dyn, ninst, x1, x5, x3, x4);
-                        STLXRH(x3, x1, wback);
-                        CBNZx_MARKLOCK(x3);
-                        B_NEXT_nocond;
-                        MARK;   // unaligned! also, not enough 
-                        LDRH_U12(x1, wback, 0);
-                        LDAXRB(x4, wback);
-                        BFIw(x1, x4, 0, 8); // re-inject
-                        emit_sub16(dyn, ninst, x1, x5, x3, x4);
-                        STLXRB(x3, x1, wback);
-                        CBNZx_MARK(x3);
-                        STRH_U12(x1, wback, 0);    // put the whole value
+                        if(!ALIGNED_ATOMICH) {
+                            TSTx_mask(wback, 1, 0, 0);    // mask=1
+                            B_MARK(cNE);
+                        }
+                        if(arm64_atomics) {
+                            NEGw_REG(x4, x5);
+                            UFLAG_IF {
+                                LDADDALH(x4, x1, wback);
+                                emit_sub16(dyn, ninst, x1, x5, x3, x4);
+                            } else {
+                                STADDLH(x4, wback);
+                            }
+                        } else {
+                            MARKLOCK;
+                            LDAXRH(x1, wback);
+                            emit_sub16(dyn, ninst, x1, x5, x3, x4);
+                            STLXRH(x3, x1, wback);
+                            CBNZx_MARKLOCK(x3);
+                        }
+                        SMDMB();
+                        if(!ALIGNED_ATOMICH) {
+                            B_NEXT_nocond;
+                            MARK;   // unaligned! also, not enough
+                            LDRH_U12(x1, wback, 0);
+                            LDAXRB(x4, wback);
+                            BFIw(x1, x4, 0, 8); // re-inject
+                            emit_sub16(dyn, ninst, x1, x5, x3, x4);
+                            STLXRB(x3, x1, wback);
+                            CBNZx_MARK(x3);
+                            STRH_U12(x1, wback, 0);    // put the whole value
+                            SMDMB();
+                        }
                     }
                     break;
                 case 6: //XOR
@@ -327,14 +414,24 @@ uintptr_t dynarec64_66F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
                         emit_xor16(dyn, ninst, x6, x5, x3, x4);
                         BFIx(ed, x6, 0, 16);
                     } else {
-                        addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, 0, 0, rex, LOCK_LOCK, 0, (opcode==0x81)?2:1);
+                        addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, NULL, 0, 0, rex, LOCK_LOCK, 0, (opcode==0x81)?2:1);
                         if(opcode==0x81) i32 = F16S; else i32 = F8S;
                         MOV32w(x5, i32);
-                        MARKLOCK;
-                        LDAXRH(x1, wback);
-                        emit_xor16(dyn, ninst, x1, x5, x3, x4);
-                        STLXRH(x3, x1, wback);
-                        CBNZx_MARKLOCK(x3);
+                        if(arm64_atomics) {
+                            UFLAG_IF {
+                                LDEORALH(x5, x1, wback);
+                                emit_xor16(dyn, ninst, x1, x5, x3, x4);
+                            } else {
+                                STEORLH(x5, wback);
+                            }
+                        } else {
+                            MARKLOCK;
+                            LDAXRH(x1, wback);
+                            emit_xor16(dyn, ninst, x1, x5, x3, x4);
+                            STLXRH(x3, x1, wback);
+                            CBNZx_MARKLOCK(x3);
+                            SMDMB();
+                        }
                     }
                     break;
                 case 7: //CMP
@@ -352,7 +449,6 @@ uintptr_t dynarec64_66F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
                     }
                     break;
             }
-            SMDMB();
             break;
 
             case 0xFF:
@@ -362,40 +458,58 @@ uintptr_t dynarec64_66F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
                     case 0: // INC Ew
                         INST_NAME("LOCK INC Ew");
                         SETFLAGS(X_ALL&~X_CF, SF_SUBSET_PENDING);
-                        SMDMB();
                         if(MODREG) {
                             ed = xRAX+(nextop&7)+(rex.b<<3);
                             UXTHw(x6, ed);
                             emit_inc16(dyn, ninst, x6, x5, x3);
                             BFIx(ed, x6, 0, 16);
                         } else {
-                            addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, 0, 0, rex, LOCK_LOCK, 0, 0);
-                            MARKLOCK;
-                            LDAXRH(x1, wback);
-                            emit_inc16(dyn, ninst, x1, x3, x4);
-                            STLXRH(x3, x1, wback);
-                            CBNZx_MARKLOCK(x3);
+                            addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, NULL, 0, 0, rex, LOCK_LOCK, 0, 0);
+                            if(arm64_atomics) {
+                                MOV32w(x3, 1);
+                                UFLAG_IF {
+                                    LDADDALH(x3, x1, wback);
+                                    emit_inc16(dyn, ninst, x1, x3, x4);
+                                } else {
+                                    STADDLH(x3, wback);
+                                }
+                            } else {
+                                MARKLOCK;
+                                LDAXRH(x1, wback);
+                                emit_inc16(dyn, ninst, x1, x3, x4);
+                                STLXRH(x3, x1, wback);
+                                CBNZx_MARKLOCK(x3);
+                            }
+                            SMDMB();
                         }
-                        SMDMB();
                         break;
                     case 1: //DEC Ew
                         INST_NAME("LOCK DEC Ew");
                         SETFLAGS(X_ALL&~X_CF, SF_SUBSET_PENDING);
-                        SMDMB();
                         if(MODREG) {
                             ed = xRAX+(nextop&7)+(rex.b<<3);
                             UXTHw(x6, ed);
                             emit_dec16(dyn, ninst, x6, x5, x3);
                             BFIx(ed, x6, 0, 16);
                         } else {
-                            addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, 0, 0, rex, LOCK_LOCK, 0, 0);
-                            MARKLOCK;
-                            LDAXRH(x1, wback);
-                            emit_dec16(dyn, ninst, x1, x3, x4);
-                            STLXRH(x3, x1, wback);
-                            CBNZx_MARKLOCK(x3);
+                            addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, NULL, 0, 0, rex, LOCK_LOCK, 0, 0);
+                            if(arm64_atomics) {
+                                MOV32w(x3, -1);
+                                UFLAG_IF {
+                                    LDADDALH(x3, x1, wback);
+                                    emit_dec16(dyn, ninst, x1, x3, x4);
+                                } else {
+                                    STADDLH(x3, wback);
+                                }
+                            } else {
+                                MARKLOCK;
+                                LDAXRH(x1, wback);
+                                emit_dec16(dyn, ninst, x1, x3, x4);
+                                STLXRH(x3, x1, wback);
+                                CBNZx_MARKLOCK(x3);
+                            }
+                            SMDMB();
                         }
-                        SMDMB();
                         break;
                     default:
                         DEFAULT;

src/dynarec/arm64/dynarec_arm64_66f20f.c

@@ -0,0 +1,93 @@
+#include <stdio.h>
+#include <stdlib.h>
+#include <stddef.h>
+#include <errno.h>
+
+#include "debug.h"
+#include "box64context.h"
+#include "dynarec.h"
+#include "emu/x64emu_private.h"
+#include "emu/x64run_private.h"
+#include "x64run.h"
+#include "x64emu.h"
+#include "box64stack.h"
+#include "callback.h"
+#include "emu/x64run_private.h"
+#include "x64trace.h"
+#include "dynarec_native.h"
+
+#include "arm64_printer.h"
+#include "dynarec_arm64_private.h"
+#include "dynarec_arm64_functions.h"
+#include "dynarec_arm64_helper.h"
+#include "emu/x64compstrings.h"
+
+uintptr_t dynarec64_66F20F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int* ok, int* need_epilog)
+{
+    (void)ip; (void)need_epilog;
+
+    uint8_t opcode = F8;
+    uint8_t nextop, u8;
+    int32_t i32;
+    uint8_t gd, ed;
+    uint8_t wback, wb1, wb2;
+    uint8_t eb1, eb2;
+    int64_t j64;
+    uint64_t tmp64u, tmp64u2;
+    int v0, v1;
+    int q0, q1;
+    int d0, d1;
+    int64_t fixedaddress;
+    int unscaled;
+
+    MAYUSE(d0);
+    MAYUSE(d1);
+    MAYUSE(q0);
+    MAYUSE(q1);
+    MAYUSE(eb1);
+    MAYUSE(eb2);
+    MAYUSE(j64);
+    #if STEP > 1
+    static const int8_t mask_shift8[] = { -7, -6, -5, -4, -3, -2, -1, 0 };
+    static const int8_t mask_string8[] = { 7, 6, 5, 4, 3, 2, 1, 0 };
+    static const int8_t mask_string16[] = { 15, 14, 13, 12, 11, 10, 9, 8 };
+    static const int8_t round_round[] = { 0, 2, 1, 3};
+    #endif
+
+    switch(opcode) {
+
+        case 0x38:  // SSE 4.x
+            opcode = F8;
+            switch(opcode) {
+
+                case 0xF1:
+                    INST_NAME("CRC32 Gd, Ew");
+                    nextop = F8;
+                    GETEW(x1, 0);
+                    GETGD;
+                    if(arm64_crc32) {
+                        CRC32CH(gd, gd, ed);
+                    } else {
+                        MOV32w(x2, 0x82f63b78);
+                        for(int j=0; j<2; ++j) {
+                            UBFXxw(x3, ed, 8*j, 8);
+                            EORw_REG(gd, gd, x3);
+                            for(int i=0; i<8; ++i) {
+                                LSRw_IMM((i&1)?gd:x4, (i&1)?x4:gd, 1);
+                                TBZ((i&1)?x4:gd, 0, 4+4);
+                                EORw_REG((i&1)?gd:x4, (i&1)?gd:x4, x2);
+                            }
+                        }
+                    }
+                    break;
+
+                default:
+                    DEFAULT;
+            }
+            break;
+
+        default:
+            DEFAULT;
+    }
+    return addr;
+}

src/dynarec/arm64/dynarec_arm64_66f30f.c

@@ -0,0 +1,64 @@
+#include <stdio.h>
+#include <stdlib.h>
+#include <stddef.h>
+#include <errno.h>
+
+#include "debug.h"
+#include "box64context.h"
+#include "dynarec.h"
+#include "emu/x64emu_private.h"
+#include "emu/x64run_private.h"
+#include "x64run.h"
+#include "x64emu.h"
+#include "box64stack.h"
+#include "callback.h"
+#include "emu/x64run_private.h"
+#include "x64trace.h"
+#include "dynarec_native.h"
+
+#include "arm64_printer.h"
+#include "dynarec_arm64_private.h"
+#include "dynarec_arm64_functions.h"
+#include "dynarec_arm64_helper.h"
+#include "emu/x64compstrings.h"
+
+uintptr_t dynarec64_66F30F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int* ok, int* need_epilog)
+{
+    (void)ip; (void)need_epilog;
+
+    uint8_t opcode = F8;
+    uint8_t nextop, u8;
+    int32_t i32;
+    uint8_t gd, ed;
+    uint8_t wback, wb1, wb2;
+    uint8_t eb1, eb2;
+    int64_t j64;
+    uint64_t tmp64u, tmp64u2;
+    int v0, v1;
+    int q0, q1;
+    int d0, d1;
+    int64_t fixedaddress;
+    int unscaled;
+
+    MAYUSE(d0);
+    MAYUSE(d1);
+    MAYUSE(q0);
+    MAYUSE(q1);
+    MAYUSE(eb1);
+    MAYUSE(eb2);
+    MAYUSE(j64);
+    #if STEP > 1
+    static const int8_t mask_shift8[] = { -7, -6, -5, -4, -3, -2, -1, 0 };
+    static const int8_t mask_string8[] = { 7, 6, 5, 4, 3, 2, 1, 0 };
+    static const int8_t mask_string16[] = { 15, 14, 13, 12, 11, 10, 9, 8 };
+    static const int8_t round_round[] = { 0, 2, 1, 3};
+    #endif
+
+    switch(opcode) {
+
+
+        default:
+            DEFAULT;
+    }
+    return addr;
+}

src/dynarec/arm64/dynarec_arm64_67.c

@@ -1,7 +1,6 @@
 #include <stdio.h>
 #include <stdlib.h>
 #include <stddef.h>
-#include <pthread.h>
 #include <errno.h>
 
 #include "debug.h"
@@ -22,14 +21,6 @@
 #include "dynarec_arm64_helper.h"
 #include "dynarec_arm64_functions.h"
 
-#define GETGX(a, w)                     \
-    gd = ((nextop&0x38)>>3)+(rex.r<<3); \
-    a = sse_get_reg(dyn, ninst, x1, gd, w)
-
-#define GETGM(a)                        \
-    gd = ((nextop&0x38)>>3);            \
-    a = mmx_get_reg(dyn, ninst, x1, x2, x3, gd)
-
 #define GETGm   gd = ((nextop&0x38)>>3)
 
 uintptr_t dynarec64_67(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int* ok, int* need_epilog)
@@ -38,8 +29,9 @@ uintptr_t dynarec64_67(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
 
     uint8_t opcode = F8;
     uint8_t nextop;
-    uint8_t gd, ed, wback, wb, wb1, wb2, gb1, gb2;
+    uint8_t gd, ed, wback, wb, wb1, wb2, gb1, gb2, eb1, eb2;
     int64_t fixedaddress;
+    int unscaled;
     int8_t  i8;
     uint8_t u8;
     int32_t i32;
@@ -55,12 +47,14 @@ uintptr_t dynarec64_67(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
     MAYUSE(lock);
     MAYUSE(cacheupd);
 
-    // REX prefix before the 67 are ignored
-    rex.rex = 0;
-    while(opcode>=0x40 && opcode<=0x4f) {
-        rex.rex = opcode;
-        opcode = F8;
+    if(rex.is32bits) {
+        // should do a different file
+        DEFAULT;
+        return addr;
     }
+
+    GETREX();
+
     rep = 0;
     while((opcode==0xF2) || (opcode==0xF3)) {
         rep = opcode-0xF1;
@@ -172,6 +166,28 @@ uintptr_t dynarec64_67(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             opcode=F8;
             switch(opcode) {
 
+                case 0x11:
+                    switch(rep) {
+                        case 0:
+                            INST_NAME("MOVUPS Ex,Gx");
+                            nextop = F8;
+                            GETG;
+                            v0 = sse_get_reg(dyn, ninst, x1, gd, 0);
+                            if(MODREG) {
+                                ed = (nextop&7)+(rex.b<<3);
+                                v1 = sse_get_reg_empty(dyn, ninst, x1, ed);
+                                VMOVQ(v1, v0);
+                            } else {
+                                addr = geted32(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, &unscaled, 0xfff<<4, 15, rex, NULL, 0, 0);
+                                VST128(v0, ed, fixedaddress);
+                                SMWRITE2();
+                            }
+                            break;
+                        default:
+                            DEFAULT;
+                    }
+                    break;
+
                 case 0x2E:
                     // no special check...
                 case 0x2F:
@@ -186,8 +202,8 @@ uintptr_t dynarec64_67(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                             } else {
                                 s0 = fpu_get_scratch(dyn);
                                 SMREAD();
-                                addr = geted32(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0xfff<<2, 3, rex, NULL, 0, 0);
-                                VLDR32_U12(s0, ed, fixedaddress);
+                                addr = geted32(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, &unscaled, 0xfff<<2, 3, rex, NULL, 0, 0);
+                                VLD32(s0, ed, fixedaddress);
                             }
                             FCMPS(v0, s0);
                             FCOMI(x1, x2);
@@ -210,8 +226,22 @@ uintptr_t dynarec64_67(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                             } else {
                                 v0 = mmx_get_reg_empty(dyn, ninst, x1, x2, x3, gd);
                                 SMREAD();
-                                addr = geted32(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0xfff<<3, 7, rex, NULL, 0, 0);
-                                VLDR64_U12(v0, ed, fixedaddress);
+                                addr = geted32(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, &unscaled, 0xfff<<3, 7, rex, NULL, 0, 0);
+                                VLD64(v0, ed, fixedaddress);
+                            }
+                            break;
+                        case 2:
+                            INST_NAME("MOVDQU Gx,Ex");
+                            nextop = F8;
+                            if(MODREG) {
+                                v1 = sse_get_reg(dyn, ninst, x1, (nextop&7)+(rex.b<<3), 0);
+                                GETGX_empty(v0);
+                                VMOVQ(v0, v1);
+                            } else {
+                                GETGX_empty(v0);
+                                SMREAD();
+                                addr = geted32(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, &unscaled, 0xfff<<4, 15, rex, NULL, 0, 0);
+                                VLD128(v0, ed, fixedaddress);
                             }
                             break;
                         default:
@@ -229,8 +259,8 @@ uintptr_t dynarec64_67(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                                 v1 = mmx_get_reg_empty(dyn, ninst, x1, x2, x3, nextop&7);
                                 VMOV(v1, v0);
                             } else {
-                                addr = geted32(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0xfff<<3, 7, rex, NULL, 0, 0);
-                                VSTR64_U12(v0, ed, fixedaddress);
+                                addr = geted32(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, &unscaled, 0xfff<<3, 7, rex, NULL, 0, 0);
+                                VST64(v0, ed, fixedaddress);
                                 SMWRITE();
                             }
                             break;
@@ -239,6 +269,40 @@ uintptr_t dynarec64_67(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     }
                     break;
 
+                case 0xB6:
+                    INST_NAME("MOVZX Gd, Eb");
+                    nextop = F8;
+                    GETGD;
+                    if(MODREG) {
+                        if(rex.rex) {
+                            eb1 = xRAX+(nextop&7)+(rex.b<<3);
+                            eb2 = 0;
+                        } else {
+                            ed = (nextop&7);
+                            eb1 = xRAX+(ed&3);  // Ax, Cx, Dx or Bx
+                            eb2 = (ed&4)>>2;    // L or H
+                        }
+                        UBFXxw(gd, eb1, eb2*8, 8);
+                    } else {
+                        SMREAD();
+                        addr = geted32(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, &unscaled, 0xfff, 0, rex, NULL, 0, 0);
+                        LDB(gd, ed, fixedaddress);
+                    }
+                    break;
+                case 0xB7:
+                    INST_NAME("MOVZX Gd, Ew");
+                    nextop = F8;
+                    GETGD;
+                    if(MODREG) {
+                        ed = xRAX+(nextop&7)+(rex.b<<3);
+                        UBFXxw(gd, ed, 0, 16);
+                    } else {
+                        SMREAD();
+                        addr = geted32(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, &unscaled, 0xfff<<1, 1, rex, NULL, 0, 0);
+                        LDH(gd, ed, fixedaddress);
+                    }
+                    break;
+
                 default:
                     DEFAULT;
             }
@@ -563,6 +627,54 @@ uintptr_t dynarec64_67(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                 emit_cmp32_0(dyn, ninst, rex, xRAX, x3, x4);
             break;
 
+        case 0x63:
+            INST_NAME("MOVSXD Gd, Ed");
+            nextop = F8;
+            GETGD;
+            if(rex.w) {
+                if(MODREG) {   // reg <= reg
+                    SXTWx(gd, xRAX+(nextop&7)+(rex.b<<3));
+                } else {                    // mem <= reg
+                    SMREAD();
+                    addr = geted32(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, &unscaled, 0xfff<<2, 3, rex, NULL, 0, 0);
+                    LDSW(gd, ed, fixedaddress);
+                }
+            } else {
+                if(MODREG) {   // reg <= reg
+                    MOVw_REG(gd, xRAX+(nextop&7)+(rex.b<<3));
+                } else {                    // mem <= reg
+                    SMREAD();
+                    addr = geted32(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, &unscaled, 0xfff<<2, 3, rex, NULL, 0, 0);
+                    LDW(gd, ed, fixedaddress);
+                }
+            }
+            break;
+
+        case 0x66:
+            opcode=F8;
+            switch(opcode) {
+
+                case 0x89:
+                    INST_NAME("MOV Ew, Gw");
+                    nextop = F8;
+                    GETGD;  // don't need GETGW here
+                    if(MODREG) {
+                        ed = xRAX+(nextop&7)+(rex.b<<3);
+                        if(ed!=gd) {
+                            BFIx(ed, gd, 0, 16);
+                        }
+                    } else {
+                        addr = geted32(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, &unscaled, 0xfff<<1, 1, rex, &lock, 0, 0);
+                        STH(gd, ed, fixedaddress);
+                        SMWRITELOCK(lock);
+                    }
+                    break;
+
+                default:
+                    DEFAULT;
+            }
+            break;
+
         case 0x81:
         case 0x83:
             nextop = F8;
@@ -640,7 +752,40 @@ uintptr_t dynarec64_67(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     break;
             }
             break;
-            
+
+        case 0x88:
+            INST_NAME("MOV Eb, Gb");
+            nextop = F8;
+            gd = ((nextop&0x38)>>3)+(rex.r<<3);
+            if(rex.rex) {
+                gb2 = 0;
+                gb1 = xRAX + gd;
+            } else {
+                gb2 = ((gd&4)<<1);
+                gb1 = xRAX+(gd&3);
+            }
+            if(gb2) {
+                gd = x4;
+                UBFXw(gd, gb1, gb2, 8);
+            } else {
+                gd = gb1;   // no need to extract
+            }
+            if(MODREG) {
+                ed = (nextop&7) + (rex.b<<3);
+                if(rex.rex) {
+                    eb1 = xRAX+ed;
+                    eb2 = 0;
+                } else {
+                    eb1 = xRAX+(ed&3);  // Ax, Cx, Dx or Bx
+                    eb2 = ((ed&4)>>2);    // L or H
+                }
+                BFIx(eb1, gd, eb2*8, 8);
+            } else {
+                addr = geted32(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, &unscaled, 0xfff, 0, rex, &lock, 0, 0);
+                STB(gd, ed, fixedaddress);
+                SMWRITELOCK(lock);
+            }
+            break;
         case 0x89:
             INST_NAME("MOV Ed, Gd");
             nextop=F8;
@@ -648,12 +793,45 @@ uintptr_t dynarec64_67(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             if(MODREG) {   // reg <= reg
                 MOVxw_REG(xRAX+(nextop&7)+(rex.b<<3), gd);
             } else {                    // mem <= reg
-                addr = geted32(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, 0xfff<<(2+rex.w), (1<<(2+rex.w))-1, rex, &lock, 0, 0);
-                STRxw_U12(gd, ed, fixedaddress);
+                addr = geted32(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, &unscaled, 0xfff<<(2+rex.w), (1<<(2+rex.w))-1, rex, &lock, 0, 0);
+                STxw(gd, ed, fixedaddress);
                 SMWRITELOCK(lock);
             }
             break;
-
+        case 0x8A:
+            INST_NAME("MOV Gb, Eb");
+            nextop = F8;
+            if(rex.rex) {
+                gb1 = gd = xRAX+((nextop&0x38)>>3)+(rex.r<<3);
+                gb2=0;
+            } else {
+                gd = (nextop&0x38)>>3;
+                gb1 = xRAX+(gd&3);
+                gb2 = ((gd&4)<<1);
+            }
+            if(MODREG) {
+                if(rex.rex) {
+                    wback = xRAX+(nextop&7)+(rex.b<<3);
+                    wb2 = 0;
+                } else {
+                    wback = (nextop&7);
+                    wb2 = (wback>>2);
+                    wback = xRAX+(wback&3);
+                }
+                if(wb2) {
+                    UBFXw(x4, wback, wb2*8, 8);
+                    ed = x4;
+                } else {
+                    ed = wback;
+                }
+            } else {
+                addr = geted32(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, &unscaled, 0xfff, 0, rex, &lock, 0, 0);
+                SMREADLOCK(lock);
+                LDB(x4, wback, fixedaddress);
+                ed = x4;
+            }
+            BFIx(gb1, ed, gb2, 8);
+            break;
         case 0x8B:
             INST_NAME("MOV Gd, Ed");
             nextop=F8;
@@ -661,9 +839,9 @@ uintptr_t dynarec64_67(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             if(MODREG) {
                 MOVxw_REG(gd, xRAX+(nextop&7)+(rex.b<<3));
             } else {
-                addr = geted32(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, 0xfff<<(2+rex.w), (1<<(2+rex.w))-1, rex, &lock, 0, 0);
+                addr = geted32(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, &unscaled, 0xfff<<(2+rex.w), (1<<(2+rex.w))-1, rex, &lock, 0, 0);
                 SMREADLOCK(lock);
-                LDRxw_U12(gd, ed, fixedaddress);
+                LDxw(gd, ed, fixedaddress);
             }
             break;
 
@@ -674,8 +852,7 @@ uintptr_t dynarec64_67(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             if(MODREG) {   // reg <= reg? that's an invalid operation
                 DEFAULT;
             } else {                    // mem <= reg
-                // should a geted32 be created, to use 32bits regs instead of 64bits?
-                addr = geted32(dyn, addr, ninst, nextop, &ed, gd, &fixedaddress, 0, 0, rex, NULL, 0, 0);
+                addr = geted32(dyn, addr, ninst, nextop, &ed, gd, &fixedaddress, NULL, 0, 0, rex, NULL, 0, 0);
                 if(ed!=gd) {
                     MOVw_REG(gd, ed);
                 }
@@ -763,10 +940,10 @@ uintptr_t dynarec64_67(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                 ed = xRAX+(nextop&7)+(rex.b<<3);
                 MOV64xw(ed, i64);
             } else {                    // mem <= i32
-                addr = geted32(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, 0xfff<<(2+rex.w), (1<<(2+rex.w))-1, rex, &lock, 0, 4);
+                addr = geted32(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, &unscaled, 0xfff<<(2+rex.w), (1<<(2+rex.w))-1, rex, &lock, 0, 4);
                 i64 = F32S;
                 MOV64xw(x3, i64);
-                STRxw_U12(x3, ed, fixedaddress);
+                STxw(x3, ed, fixedaddress);
                 SMWRITELOCK(lock);
             }
             break;
@@ -846,7 +1023,7 @@ uintptr_t dynarec64_67(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     GETED32H(x1, 4);
                     i64 = F32S;
                     MOV64xw(x2, i64);
-                    emit_test32(dyn, ninst, rex, ed, x2, x3, x4);
+                    emit_test32(dyn, ninst, rex, ed, x2, x3, x4, x5);
                     break;
                 case 2:
                     INST_NAME("NOT Ed");
@@ -864,7 +1041,6 @@ uintptr_t dynarec64_67(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                 case 4:
                     INST_NAME("MUL EAX, Ed");
                     SETFLAGS(X_ALL, SF_PENDING);
-                    UFLAG_DF(x2, rex.w?d_mul64:d_mul32);
                     GETED32(0);
                     if(rex.w) {
                         if(ed==xRDX) gd=x3; else gd=xRDX;
@@ -878,11 +1054,11 @@ uintptr_t dynarec64_67(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     }
                     UFLAG_RES(xRAX);
                     UFLAG_OP1(xRDX);
+                    UFLAG_DF(x2, rex.w?d_mul64:d_mul32);
                     break;
                 case 5:
                     INST_NAME("IMUL EAX, Ed");
                     SETFLAGS(X_ALL, SF_PENDING);
-                    UFLAG_DF(x2, rex.w?d_imul64:d_imul32);
                     GETED32(0);
                     if(rex.w) {
                         if(ed==xRDX) gd=x3; else gd=xRDX;
@@ -896,6 +1072,7 @@ uintptr_t dynarec64_67(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     }
                     UFLAG_RES(xRAX);
                     UFLAG_OP1(xRDX);
+                    UFLAG_DF(x2, rex.w?d_imul64:d_imul32);
                     break;
                 case 6:
                     INST_NAME("DIV Ed");
@@ -914,9 +1091,9 @@ uintptr_t dynarec64_67(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                         MOVw_REG(xRAX, x2);
                         MOVw_REG(xRDX, x4);
                     } else {
-                        if(ninst && dyn->insts 
-                           && dyn->insts[ninst-1].x64.addr 
-                           && *(uint8_t*)(dyn->insts[ninst-1].x64.addr)==0x31 
+                        if(ninst && dyn->insts
+                           && dyn->insts[ninst-1].x64.addr
+                           && *(uint8_t*)(dyn->insts[ninst-1].x64.addr)==0x31
                            && *(uint8_t*)(dyn->insts[ninst-1].x64.addr+1)==0xD2) {
                             SET_DFNONE(x2);
                             GETED32(0);
@@ -939,6 +1116,7 @@ uintptr_t dynarec64_67(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     break;
                 case 7:
                     INST_NAME("IDIV Ed");
+                    NOTEST(x1);
                     SETFLAGS(X_ALL, SF_SET);
                     if(!rex.w) {
                         SET_DFNONE(x2)
@@ -951,7 +1129,7 @@ uintptr_t dynarec64_67(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                         MOVw_REG(xRDX, x4);
                     } else {
                         if(ninst && dyn->insts
-                           &&  dyn->insts[ninst-1].x64.addr 
+                           &&  dyn->insts[ninst-1].x64.addr
                            && *(uint8_t*)(dyn->insts[ninst-1].x64.addr)==0x48
                            && *(uint8_t*)(dyn->insts[ninst-1].x64.addr+1)==0x99) {
                             SET_DFNONE(x2)

src/dynarec/arm64/dynarec_arm64_6764_32.c

@@ -0,0 +1,103 @@
+#include <stdio.h>
+#include <stdlib.h>
+#include <stddef.h>
+#include <errno.h>
+
+#include "debug.h"
+#include "box64context.h"
+#include "dynarec.h"
+#include "emu/x64emu_private.h"
+#include "emu/x64run_private.h"
+#include "x64run.h"
+#include "x64emu.h"
+#include "box64stack.h"
+#include "callback.h"
+#include "emu/x64run_private.h"
+#include "x64trace.h"
+#include "dynarec_native.h"
+
+#include "arm64_printer.h"
+#include "dynarec_arm64_private.h"
+#include "dynarec_arm64_helper.h"
+#include "dynarec_arm64_functions.h"
+
+#define GETGm   gd = ((nextop&0x38)>>3)
+
+uintptr_t dynarec64_6764_32(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int seg, int* ok, int* need_epilog)
+{
+    (void)ip; (void)need_epilog;
+
+    uint8_t opcode = F8;
+    uint8_t nextop;
+    uint8_t gd, ed, wback, wb, wb1, wb2, gb1, gb2, eb1, eb2;
+    int64_t fixedaddress;
+    int unscaled;
+    int8_t  i8;
+    uint8_t u8;
+    int32_t i32;
+    int64_t j64, i64;
+    int cacheupd = 0;
+    int lock;
+    int v0, v1, s0;
+    MAYUSE(i32);
+    MAYUSE(j64);
+    MAYUSE(v0);
+    MAYUSE(v1);
+    MAYUSE(s0);
+    MAYUSE(lock);
+    MAYUSE(cacheupd);
+
+    if(!rex.is32bits) {
+        // should do a different file
+        DEFAULT;
+        return addr;
+    }
+
+    rep = 0;
+    while((opcode==0xF2) || (opcode==0xF3)) {
+        rep = opcode-0xF1;
+        opcode = F8;
+    }
+
+    switch(opcode) {
+
+        case 0xA3:
+            INST_NAME("MOV Seg:[Od], EAX");
+            i32 = F16;
+            grab_segdata(dyn, addr, ninst, x4, seg);
+            if(i32<4096 && !(i32&3)) {
+                STRw_U12(xRAX, x4, i32);
+            } else if(i32<256) {
+                STURw_I9(xRAX, x4, i32);
+            } else {
+                MOV32w(x1, i32);
+                STRw_REG(xRAX, x4, x1);
+            }
+            break;
+
+        case 0xFF:
+            nextop = F8;
+            grab_segdata(dyn, addr, ninst, x4, seg);
+            switch((nextop>>3)&7) {
+                case 6: // Push Ed
+                    INST_NAME("PUSH FS:Ew");
+                    if((nextop&0xC0)==0xC0) {   // reg
+                        DEFAULT;
+                    } else {                    // mem <= i32
+                        SMREAD();
+                        addr = geted16(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, &unscaled, 0, 0, 0);
+                        LDRw_REG(x3, ed, x4);
+                        PUSH1_32(x3);
+                    }
+                    break;
+                default:
+                    DEFAULT;
+            }
+            break;
+
+
+        default:
+            DEFAULT;
+    }
+    return addr;
+}

src/dynarec/arm64/dynarec_arm64_67_32.c

@@ -0,0 +1,72 @@
+#include <stdio.h>
+#include <stdlib.h>
+#include <stddef.h>
+#include <errno.h>
+
+#include "debug.h"
+#include "box64context.h"
+#include "dynarec.h"
+#include "emu/x64emu_private.h"
+#include "emu/x64run_private.h"
+#include "x64run.h"
+#include "x64emu.h"
+#include "box64stack.h"
+#include "callback.h"
+#include "emu/x64run_private.h"
+#include "x64trace.h"
+#include "dynarec_native.h"
+
+#include "arm64_printer.h"
+#include "dynarec_arm64_private.h"
+#include "dynarec_arm64_helper.h"
+#include "dynarec_arm64_functions.h"
+
+#define GETGm   gd = ((nextop&0x38)>>3)
+
+uintptr_t dynarec64_67_32(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int* ok, int* need_epilog)
+{
+    (void)ip; (void)need_epilog;
+
+    uint8_t opcode = F8;
+    uint8_t nextop;
+    uint8_t gd, ed, wback, wb, wb1, wb2, gb1, gb2, eb1, eb2;
+    int64_t fixedaddress;
+    int unscaled;
+    int8_t  i8;
+    uint8_t u8;
+    int32_t i32;
+    int64_t j64, i64;
+    int cacheupd = 0;
+    int lock;
+    int v0, v1, s0;
+    MAYUSE(i32);
+    MAYUSE(j64);
+    MAYUSE(v0);
+    MAYUSE(v1);
+    MAYUSE(s0);
+    MAYUSE(lock);
+    MAYUSE(cacheupd);
+
+    if(!rex.is32bits) {
+        // should do a different file
+        DEFAULT;
+        return addr;
+    }
+
+    rep = 0;
+    while((opcode==0xF2) || (opcode==0xF3)) {
+        rep = opcode-0xF1;
+        opcode = F8;
+    }
+
+    switch(opcode) {
+        
+        case 64:
+            addr = dynarec64_6764_32(dyn, addr, ip, ninst, rex, rep, _FS, ok, need_epilog);
+            break;
+
+        default:
+            DEFAULT;
+    }
+    return addr;
+}

src/dynarec/arm64/dynarec_arm64_d8.c

@@ -1,7 +1,6 @@
 #include <stdio.h>
 #include <stdlib.h>
 #include <stddef.h>
-#include <pthread.h>
 #include <errno.h>
 
 #include "debug.h"
@@ -31,6 +30,7 @@ uintptr_t dynarec64_D8(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
     uint8_t nextop = F8;
     uint8_t ed;
     int64_t fixedaddress;
+    int unscaled;
     int v1, v2;
     int s0;
 
@@ -108,7 +108,7 @@ uintptr_t dynarec64_D8(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                 FCMPD(v1, v2);
             }
             FCOM(x1, x2, x3);
-            x87_do_pop(dyn, ninst, x3);
+            X87_POP_OR_FAIL(dyn, ninst, x3);
             break;
         case 0xE0:
         case 0xE1:
@@ -178,15 +178,15 @@ uintptr_t dynarec64_D8(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                 FDIVD(v1, v2, v1);
             }
             break;
-      
+
         default:
             switch((nextop>>3)&7) {
                 case 0:
                     INST_NAME("FADD ST0, float[ED]");
                     v1 = x87_get_st(dyn, ninst, x1, x2, 0, X87_ST0);
                     s0 = fpu_get_scratch(dyn);
-                    addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, 0xfff<<2, 3, rex, NULL, 0, 0);
-                    VLDR32_U12(s0, ed, fixedaddress);
+                    addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, &unscaled, 0xfff<<2, 3, rex, NULL, 0, 0);
+                    VLD32(s0, ed, fixedaddress);
                     if(ST_IS_F(0)) {
                         FADDS(v1, v1, s0);
                     } else {
@@ -198,8 +198,8 @@ uintptr_t dynarec64_D8(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     INST_NAME("FMUL ST0, float[ED]");
                     v1 = x87_get_st(dyn, ninst, x1, x2, 0, X87_ST0);
                     s0 = fpu_get_scratch(dyn);
-                    addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, 0xfff<<2, 3, rex, NULL, 0, 0);
-                    VLDR32_U12(s0, ed, fixedaddress);
+                    addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, &unscaled, 0xfff<<2, 3, rex, NULL, 0, 0);
+                    VLD32(s0, ed, fixedaddress);
                     if(ST_IS_F(0)) {
                         FMULS(v1, v1, s0);
                     } else {
@@ -211,8 +211,8 @@ uintptr_t dynarec64_D8(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     INST_NAME("FCOM ST0, float[ED]");
                     v1 = x87_get_st(dyn, ninst, x1, x2, 0, X87_ST0);
                     s0 = fpu_get_scratch(dyn);
-                    addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, 0xfff<<2, 3, rex, NULL, 0, 0);
-                    VLDR32_U12(s0, ed, fixedaddress);
+                    addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, &unscaled, 0xfff<<2, 3, rex, NULL, 0, 0);
+                    VLD32(s0, ed, fixedaddress);
                     if(ST_IS_F(0)) {
                         FCMPS(v1, s0);
                     } else {
@@ -225,8 +225,8 @@ uintptr_t dynarec64_D8(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     INST_NAME("FCOMP ST0, float[ED]");
                     v1 = x87_get_st(dyn, ninst, x1, x2, 0, X87_ST0);
                     s0 = fpu_get_scratch(dyn);
-                    addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, 0xfff<<2, 3, rex, NULL, 0, 0);
-                    VLDR32_U12(s0, ed, fixedaddress);
+                    addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, &unscaled, 0xfff<<2, 3, rex, NULL, 0, 0);
+                    VLD32(s0, ed, fixedaddress);
                     if(ST_IS_F(0)) {
                         FCMPS(v1, s0);
                     } else {
@@ -234,14 +234,14 @@ uintptr_t dynarec64_D8(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                         FCMPD(v1, s0);
                     }
                     FCOM(x1, x2, x3);
-                    x87_do_pop(dyn, ninst, x3);
+                    X87_POP_OR_FAIL(dyn, ninst, x3);
                     break;
                 case 4:
                     INST_NAME("FSUB ST0, float[ED]");
                     v1 = x87_get_st(dyn, ninst, x1, x2, 0, X87_ST0);
                     s0 = fpu_get_scratch(dyn);
-                    addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, 0xfff<<2, 3, rex, NULL, 0, 0);
-                    VLDR32_U12(s0, ed, fixedaddress);
+                    addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, &unscaled, 0xfff<<2, 3, rex, NULL, 0, 0);
+                    VLD32(s0, ed, fixedaddress);
                     if(ST_IS_F(0)) {
                         FSUBS(v1, v1, s0);
                     } else {
@@ -253,8 +253,8 @@ uintptr_t dynarec64_D8(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     INST_NAME("FSUBR ST0, float[ED]");
                     v1 = x87_get_st(dyn, ninst, x1, x2, 0, X87_ST0);
                     s0 = fpu_get_scratch(dyn);
-                    addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, 0xfff<<2, 3, rex, NULL, 0, 0);
-                    VLDR32_U12(s0, ed, fixedaddress);
+                    addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, &unscaled, 0xfff<<2, 3, rex, NULL, 0, 0);
+                    VLD32(s0, ed, fixedaddress);
                     if(ST_IS_F(0)) {
                         FSUBS(v1, s0, v1);
                     } else {
@@ -266,8 +266,8 @@ uintptr_t dynarec64_D8(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     INST_NAME("FDIV ST0, float[ED]");
                     v1 = x87_get_st(dyn, ninst, x1, x2, 0, X87_ST0);
                     s0 = fpu_get_scratch(dyn);
-                    addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, 0xfff<<2, 3, rex, NULL, 0, 0);
-                    VLDR32_U12(s0, ed, fixedaddress);
+                    addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, &unscaled, 0xfff<<2, 3, rex, NULL, 0, 0);
+                    VLD32(s0, ed, fixedaddress);
                     if(ST_IS_F(0)) {
                         FDIVS(v1, v1, s0);
                     } else {
@@ -279,8 +279,8 @@ uintptr_t dynarec64_D8(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     INST_NAME("FDIVR ST0, float[ED]");
                     v1 = x87_get_st(dyn, ninst, x1, x2, 0, X87_ST0);
                     s0 = fpu_get_scratch(dyn);
-                    addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, 0xfff<<2, 3, rex, NULL, 0, 0);
-                    VLDR32_U12(s0, ed, fixedaddress);
+                    addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, &unscaled, 0xfff<<2, 3, rex, NULL, 0, 0);
+                    VLD32(s0, ed, fixedaddress);
                     if(ST_IS_F(0)) {
                         FDIVS(v1, s0, v1);
                     } else {

src/dynarec/arm64/dynarec_arm64_d9.c

@@ -1,7 +1,6 @@
 #include <stdio.h>
 #include <stdlib.h>
 #include <stddef.h>
-#include <pthread.h>
 #include <errno.h>
 
 #include "debug.h"
@@ -33,6 +32,7 @@ uintptr_t dynarec64_D9(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
     uint8_t wback, wb1;
     uint8_t u8;
     int64_t fixedaddress;
+    int unscaled;
     int v1, v2;
     int s0;
     int i1, i2, i3;
@@ -51,7 +51,7 @@ uintptr_t dynarec64_D9(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
         case 0xC6:
         case 0xC7:
             INST_NAME("FLD STx");
-            v2 = x87_do_push(dyn, ninst, x1, X87_ST(nextop&7));
+            X87_PUSH_OR_FAIL(v2, dyn, ninst, x1, X87_ST(nextop&7));
             v1 = x87_get_st(dyn, ninst, x1, x2, (nextop&7)+1, X87_COMBINE(0, (nextop&7)+1));
             if(ST_IS_F(0)) {
                 FMOVS(v2, v1);
@@ -84,7 +84,7 @@ uintptr_t dynarec64_D9(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
 
         case 0xD8:
             INST_NAME("FSTPNCE ST0, ST0");
-            x87_do_pop(dyn, ninst, x3);
+            X87_POP_OR_FAIL(dyn, ninst, x3);
             break;
         case 0xD9:
         case 0xDA:
@@ -98,7 +98,7 @@ uintptr_t dynarec64_D9(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             x87_get_st_empty(dyn, ninst, x1, x2, nextop&7, X87_ST(nextop&7));
             x87_get_st(dyn, ninst, x1, x2, 0, X87_ST0);
             x87_swapreg(dyn, ninst, x1, x2, 0, nextop&7);
-            x87_do_pop(dyn, ninst, x3);
+            X87_POP_OR_FAIL(dyn, ninst, x3);
             break;
         case 0xE0:
             INST_NAME("FCHS");
@@ -138,7 +138,7 @@ uintptr_t dynarec64_D9(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
 
         case 0xE8:
             INST_NAME("FLD1");
-            v1 = x87_do_push(dyn, ninst, x1, NEON_CACHE_ST_F);
+            X87_PUSH_OR_FAIL(v1, dyn, ninst, x1, NEON_CACHE_ST_F);
             if(ST_IS_F(0)) {
                 FMOVS_8(v1, 0b01110000);
             } else {
@@ -147,82 +147,123 @@ uintptr_t dynarec64_D9(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             break;
         case 0xE9:
             INST_NAME("FLDL2T");
-            v1 = x87_do_push(dyn, ninst, x1, NEON_CACHE_ST_D);
+            X87_PUSH_OR_FAIL(v1, dyn, ninst, x1, NEON_CACHE_ST_D);
             FTABLE64(v1, L2T);
             break;
-        case 0xEA:     
+        case 0xEA:
             INST_NAME("FLDL2E");
-            v1 = x87_do_push(dyn, ninst, x1, NEON_CACHE_ST_D);
+            X87_PUSH_OR_FAIL(v1, dyn, ninst, x1, NEON_CACHE_ST_D);
             FTABLE64(v1, L2E);
             break;
         case 0xEB:
             INST_NAME("FLDPI");
-            v1 = x87_do_push(dyn, ninst, x1, NEON_CACHE_ST_D);
+            X87_PUSH_OR_FAIL(v1, dyn, ninst, x1, NEON_CACHE_ST_D);
             FTABLE64(v1, PI);
             break;
         case 0xEC:
             INST_NAME("FLDLG2");
-            v1 = x87_do_push(dyn, ninst, x1, NEON_CACHE_ST_D);
+            X87_PUSH_OR_FAIL(v1, dyn, ninst, x1, NEON_CACHE_ST_D);
             FTABLE64(v1, LG2);
             break;
         case 0xED:
             INST_NAME("FLDLN2");
-            v1 = x87_do_push(dyn, ninst, x1, NEON_CACHE_ST_D);
+            X87_PUSH_OR_FAIL(v1, dyn, ninst, x1, NEON_CACHE_ST_D);
             FTABLE64(v1, LN2);
             break;
         case 0xEE:
             INST_NAME("FLDZ");
-            v1 = x87_do_push(dyn, ninst, x1, NEON_CACHE_ST_F);
+            X87_PUSH_OR_FAIL(v1, dyn, ninst, x1, NEON_CACHE_ST_F);
             VEOR(v1, v1, v1);
             break;
 
         case 0xF0:
             INST_NAME("F2XM1");
             MESSAGE(LOG_DUMP, "Need Optimization\n");
+            i1 = x87_stackcount(dyn, ninst, x1);
             x87_forget(dyn, ninst, x1, x2, 0);
-            CALL(arm_f2xm1, -1);
+            CALL(native_f2xm1, -1);
+            x87_unstackcount(dyn, ninst, x1, i1);
             break;
         case 0xF1:
             INST_NAME("FYL2X");
             MESSAGE(LOG_DUMP, "Need Optimization\n");
+            i1 = x87_stackcount(dyn, ninst, x1);
             x87_forget(dyn, ninst, x1, x2, 0);
             x87_forget(dyn, ninst, x1, x2, 1);
-            CALL(arm_fyl2x, -1);
-            x87_do_pop(dyn, ninst, x3);
+            CALL(native_fyl2x, -1);
+            x87_unstackcount(dyn, ninst, x1, i1);
+            X87_POP_OR_FAIL(dyn, ninst, x3);
             break;
         case 0xF2:
             INST_NAME("FPTAN");
             MESSAGE(LOG_DUMP, "Need Optimization\n");
+            i1 = x87_stackcount(dyn, ninst, x1);
             x87_forget(dyn, ninst, x1, x2, 0);
-            CALL(arm_ftan, -1);
-            v1 = x87_do_push(dyn, ninst, x1, NEON_CACHE_ST_F);
-            if(ST_IS_F(0)) {
-                FMOVS_8(v1, 0b01110000);
+            CALL(native_ftan, -1);
+            x87_unstackcount(dyn, ninst, x1, i1);
+            if(PK(0)==0xdd && PK(1)==0xd8) {
+                MESSAGE(LOG_DUMP, "Optimized next DD D8 fstp st0, st0, not emiting 1\n");
+                u8 = F8;
+                u8 = F8;
             } else {
-                FMOVD_8(v1, 0b01110000);
+                X87_PUSH_OR_FAIL(v1, dyn, ninst, x1, NEON_CACHE_ST_F);
+                if(ST_IS_F(0)) {
+                    FMOVS_8(v1, 0b01110000);
+                } else {
+                    FMOVD_8(v1, 0b01110000);
+                }
             }
             break;
         case 0xF3:
             INST_NAME("FPATAN");
             MESSAGE(LOG_DUMP, "Need Optimization\n");
+            i1 = x87_stackcount(dyn, ninst, x1);
             x87_forget(dyn, ninst, x1, x2, 0);
             x87_forget(dyn, ninst, x1, x2, 1);
-            CALL(arm_fpatan, -1);
-            x87_do_pop(dyn, ninst, x3);
+            CALL(native_fpatan, -1);
+            x87_unstackcount(dyn, ninst, x1, i1);
+            X87_POP_OR_FAIL(dyn, ninst, x3);
             break;
         case 0xF4:
             INST_NAME("FXTRACT");
             MESSAGE(LOG_DUMP, "Need Optimization\n");
-            x87_do_push_empty(dyn, ninst, 0);
+            X87_PUSH_EMPTY_OR_FAIL(dyn, ninst, 0);
+            i1 = x87_stackcount(dyn, ninst, x1);
             x87_forget(dyn, ninst, x1, x2, 1);
-            CALL(arm_fxtract, -1);
+            CALL(native_fxtract, -1);
+            x87_unstackcount(dyn, ninst, x1, i1);
             break;
         case 0xF5:
             INST_NAME("FPREM1");
             MESSAGE(LOG_DUMP, "Need Optimization\n");
+            #if 0
+            i1 = x87_stackcount(dyn, ninst, x1);
             x87_forget(dyn, ninst, x1, x2, 0);
             x87_forget(dyn, ninst, x1, x2, 1);
-            CALL(arm_fprem1, -1);
+            CALL(native_fprem1, -1);
+            x87_unstackcount(dyn, ninst, x1, i1);
+            #else
+            v1 = x87_get_st(dyn, ninst, x1, x2, 0, NEON_CACHE_ST_D);
+            v2 = x87_get_st(dyn, ninst, x1, x2, 1, NEON_CACHE_ST_D);
+            s0 = fpu_get_scratch(dyn);
+            FDIVD(s0, v1, v2);
+            FRINTRRD(s0, s0, 0b00); // Nearest == TieToEven?
+            FCVTZSxD(x4, s0);
+            FMULD(s0, s0, v2);
+            FSUBD(v1, v1, s0);
+            LDRw_U12(x1, xEmu, offsetof(x64emu_t, sw));
+            // set C2 = 0
+            BFCw(x1, 10, 1);
+            // set C1 = Q0
+            BFIw(x1, x4, 9, 1);
+            // set C3 = Q1
+            LSRx_IMM(x4, x4, 1);
+            BFIw(x1, x4, 14, 1);
+            // Set C0 = Q2
+            LSRx(x4, x4, 1);
+            BFIw(x1, x4, 8, 1);
+            STRw_U12(x1, xEmu, offsetof(x64emu_t, sw));
+            #endif
             break;
         case 0xF6:
             INST_NAME("FDECSTP");
@@ -242,18 +283,45 @@ uintptr_t dynarec64_D9(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             break;
         case 0xF8:
             INST_NAME("FPREM");
+            #if 0
             MESSAGE(LOG_DUMP, "Need Optimization\n");
+            i1 = x87_stackcount(dyn, ninst, x1);
             x87_forget(dyn, ninst, x1, x2, 0);
             x87_forget(dyn, ninst, x1, x2, 1);
-            CALL(arm_fprem, -1);
+            CALL(native_fprem, -1);
+            x87_unstackcount(dyn, ninst, x1, i1);
+            #else
+            v1 = x87_get_st(dyn, ninst, x1, x2, 0, NEON_CACHE_ST_D);
+            v2 = x87_get_st(dyn, ninst, x1, x2, 1, NEON_CACHE_ST_D);
+            s0 = fpu_get_scratch(dyn);
+            FDIVD(s0, v1, v2);
+            FRINTZD(s0, s0);
+            FCVTZSxD(x4, s0);
+            FMULD(s0, s0, v2);
+            FSUBD(v1, v1, s0);
+            LDRw_U12(x1, xEmu, offsetof(x64emu_t, sw));
+            // set C2 = 0
+            BFCw(x1, 10, 1);
+            // set C1 = Q0
+            BFIw(x1, x4, 9, 1);
+            // set C3 = Q1
+            LSRx_IMM(x4, x4, 1);
+            BFIw(x1, x4, 14, 1);
+            // Set C0 = Q2
+            LSRx(x4, x4, 1);
+            BFIw(x1, x4, 8, 1);
+            STRw_U12(x1, xEmu, offsetof(x64emu_t, sw));
+            #endif
             break;
         case 0xF9:
             INST_NAME("FYL2XP1");
             MESSAGE(LOG_DUMP, "Need Optimization\n");
+            i1 = x87_stackcount(dyn, ninst, x1);
             x87_forget(dyn, ninst, x1, x2, 0);
             x87_forget(dyn, ninst, x1, x2, 1);
-            CALL(arm_fyl2xp1, -1);
-            x87_do_pop(dyn, ninst, x3);
+            CALL(native_fyl2xp1, -1);
+            x87_unstackcount(dyn, ninst, x1, i1);
+            X87_POP_OR_FAIL(dyn, ninst, x3);
             break;
         case 0xFA:
             INST_NAME("FSQRT");
@@ -267,9 +335,11 @@ uintptr_t dynarec64_D9(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
         case 0xFB:
             INST_NAME("FSINCOS");
             MESSAGE(LOG_DUMP, "Need Optimization\n");
-            x87_do_push_empty(dyn, ninst, 0);
+            X87_PUSH_EMPTY_OR_FAIL(dyn, ninst, 0);
+            i1 = x87_stackcount(dyn, ninst, x1);
             x87_forget(dyn, ninst, x1, x2, 1);
-            CALL(arm_fsincos, -1);
+            CALL(native_fsincos, -1);
+            x87_unstackcount(dyn, ninst, x1, i1);
             break;
         case 0xFC:
             INST_NAME("FRNDINT");
@@ -277,7 +347,7 @@ uintptr_t dynarec64_D9(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             MESSAGE(LOG_DUMP, "Need Optimization\n");
             // use C helper for now, nothing staightforward is available
             x87_forget(dyn, ninst, x1, x2, 0);
-            CALL(arm_frndint, -1);
+            CALL(native_frndint, -1);
             #else
             v1 = x87_get_st(dyn, ninst, x1, x2, 0, X87_ST0);
             u8 = x87_setround(dyn, ninst, x1, x2, x3);
@@ -292,21 +362,27 @@ uintptr_t dynarec64_D9(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
         case 0xFD:
             INST_NAME("FSCALE");
             MESSAGE(LOG_DUMP, "Need Optimization\n");
+            i1 = x87_stackcount(dyn, ninst, x1);
             x87_forget(dyn, ninst, x1, x2, 0);
             x87_forget(dyn, ninst, x1, x2, 1);
-            CALL(arm_fscale, -1);
+            CALL(native_fscale, -1);
+            x87_unstackcount(dyn, ninst, x1, i1);
             break;
         case 0xFE:
             INST_NAME("FSIN");
             MESSAGE(LOG_DUMP, "Need Optimization\n");
+            i1 = x87_stackcount(dyn, ninst, x1);
             x87_forget(dyn, ninst, x1, x2, 0);
-            CALL(arm_fsin, -1);
+            CALL(native_fsin, -1);
+            x87_unstackcount(dyn, ninst, x1, i1);
             break;
         case 0xFF:
             INST_NAME("FCOS");
             MESSAGE(LOG_DUMP, "Need Optimization\n");
+            i1 = x87_stackcount(dyn, ninst, x1);
             x87_forget(dyn, ninst, x1, x2, 0);
-            CALL(arm_fcos, -1);
+            CALL(native_fcos, -1);
+            x87_unstackcount(dyn, ninst, x1, i1);
             break;
 
 
@@ -322,14 +398,14 @@ uintptr_t dynarec64_D9(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
         case 0xEF:
             DEFAULT;
             break;
-             
+
         default:
             switch((nextop>>3)&7) {
                 case 0:
                     INST_NAME("FLD ST0, float[ED]");
-                    v1 = x87_do_push(dyn, ninst, x1, box64_dynarec_x87double?NEON_CACHE_ST_D:NEON_CACHE_ST_F);
-                    addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, 0xfff<<2, 3, rex, NULL, 0, 0);
-                    VLDR32_U12(v1, ed, fixedaddress);
+                    X87_PUSH_OR_FAIL(v1, dyn, ninst, x1, box64_dynarec_x87double?NEON_CACHE_ST_D:NEON_CACHE_ST_F);
+                    addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, &unscaled, 0xfff<<2, 3, rex, NULL, 0, 0);
+                    VLD32(v1, ed, fixedaddress);
                     if(!ST_IS_F(0)) {
                         FCVT_D_S(v1, v1);
                     }
@@ -343,24 +419,24 @@ uintptr_t dynarec64_D9(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                         s0 = fpu_get_scratch(dyn);
                         FCVT_S_D(s0, v1);
                     }
-                    addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, 0xfff<<2, 3, rex, NULL, 0, 0);
-                    VSTR32_U12(s0, ed, fixedaddress);
+                    addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, &unscaled, 0xfff<<2, 3, rex, NULL, 0, 0);
+                    VST32(s0, ed, fixedaddress);
                     break;
                 case 3:
                     INST_NAME("FSTP float[ED], ST0");
                     v1 = x87_get_st(dyn, ninst, x1, x2, 0, NEON_CACHE_ST_F);
-                    addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, 0xfff<<2, 3, rex, NULL, 0, 0);
+                    addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, &unscaled, 0xfff<<2, 3, rex, NULL, 0, 0);
                     if(!ST_IS_F(0)) {
                         FCVT_S_D(v1, v1);
                     }
-                    VSTR32_U12(v1, ed, fixedaddress);
-                    x87_do_pop(dyn, ninst, x3);
+                    VST32(v1, ed, fixedaddress);
+                    X87_POP_OR_FAIL(dyn, ninst, x3);
                     break;
                 case 4:
                     INST_NAME("FLDENV Ed");
                     MESSAGE(LOG_DUMP, "Need Optimization\n");
                     fpu_purgecache(dyn, ninst, 0, x1, x2, x3); // maybe only x87, not SSE?
-                    addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0, 0, rex, NULL, 0, 0);
+                    addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, NULL, 0, 0, rex, NULL, 0, 0);
                     if(ed!=x1) {
                         MOVx_REG(x1, ed);
                     }
@@ -376,7 +452,7 @@ uintptr_t dynarec64_D9(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     INST_NAME("FNSTENV Ed");
                     MESSAGE(LOG_DUMP, "Need Optimization\n");
                     fpu_purgecache(dyn, ninst, 0, x1, x2, x3); // maybe only x87, not SSE?
-                    addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0, 0, rex, NULL, 0, 0);
+                    addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, NULL, 0, 0, rex, NULL, 0, 0);
                     if(ed!=x1) {
                         MOVx_REG(x1, ed);
                     }
@@ -385,7 +461,7 @@ uintptr_t dynarec64_D9(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     break;
                 case 7:
                     INST_NAME("FNSTCW Ew");
-                    addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, 0xfff<<1, 1, rex, NULL, 0, 0);
+                    addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, &unscaled, 0xfff<<1, 1, rex, NULL, 0, 0);
                     ed = x1;
                     wb1 = 1;
                     LDRH_U12(x1, xEmu, offsetof(x64emu_t, cw));

src/dynarec/arm64/dynarec_arm64_da.c

@@ -0,0 +1,239 @@
+#include <stdio.h>
+#include <stdlib.h>
+#include <stddef.h>
+#include <errno.h>
+
+#include "debug.h"
+#include "box64context.h"
+#include "dynarec.h"
+#include "emu/x64emu_private.h"
+#include "emu/x64run_private.h"
+#include "x64run.h"
+#include "x64emu.h"
+#include "box64stack.h"
+#include "callback.h"
+#include "emu/x64run_private.h"
+#include "x64trace.h"
+#include "emu/x87emu_private.h"
+#include "dynarec_native.h"
+
+#include "arm64_printer.h"
+#include "dynarec_arm64_private.h"
+#include "dynarec_arm64_helper.h"
+#include "dynarec_arm64_functions.h"
+
+
+uintptr_t dynarec64_DA(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int* ok, int* need_epilog)
+{
+    uint8_t nextop = F8;
+    int64_t j64;
+    uint8_t ed;
+    uint8_t wback;
+    int v1, v2;
+    int d0;
+    int s0;
+    int64_t fixedaddress;
+    int unscaled;
+
+    MAYUSE(s0);
+    MAYUSE(d0);
+    MAYUSE(v2);
+    MAYUSE(v1);
+    MAYUSE(ed);
+    MAYUSE(j64);
+
+    switch(nextop) {
+        case 0xC0:
+        case 0xC1:
+        case 0xC2:
+        case 0xC3:
+        case 0xC4:
+        case 0xC5:
+        case 0xC6:
+        case 0xC7:
+            INST_NAME("FCMOVB ST0, STx");
+            READFLAGS(X_CF);
+            v1 = x87_get_st(dyn, ninst, x1, x2, 0, X87_COMBINE(0, nextop&7));
+            v2 = x87_get_st(dyn, ninst, x1, x2, nextop&7, X87_COMBINE(0, nextop&7));
+            TSTw_mask(xFlags, 0, 0);    //mask=1<<F_CF
+            if(ST_IS_F(0)) {
+                FCSELS(v1, v2, v1, cNE);   // F_CF==1
+            } else {
+                FCSELD(v1, v2, v1, cNE);   // F_CF==1
+            }
+            break;
+        case 0xC8:
+        case 0xC9:
+        case 0xCA:
+        case 0xCB:
+        case 0xCC:
+        case 0xCD:
+        case 0xCE:
+        case 0xCF:
+            INST_NAME("FCMOVE ST0, STx");
+            READFLAGS(X_ZF);
+            v1 = x87_get_st(dyn, ninst, x1, x2, 0, X87_COMBINE(0, nextop&7));
+            v2 = x87_get_st(dyn, ninst, x1, x2, nextop&7, X87_COMBINE(0, nextop&7));
+            TSTw_mask(xFlags, 0b011010, 0); //mask=1<<F_ZF
+            if(ST_IS_F(0)) {
+                FCSELS(v1, v2, v1, cNE);
+            } else {
+                FCSELD(v1, v2, v1, cNE);        // F_ZF==0
+            }
+            break;
+        case 0xD0:
+        case 0xD1:
+        case 0xD2:
+        case 0xD3:
+        case 0xD4:
+        case 0xD5:
+        case 0xD6:
+        case 0xD7:
+            INST_NAME("FCMOVBE ST0, STx");
+            READFLAGS(X_CF|X_ZF);
+            v1 = x87_get_st(dyn, ninst, x1, x2, 0, X87_COMBINE(0, nextop&7));
+            v2 = x87_get_st(dyn, ninst, x1, x2, nextop&7, X87_COMBINE(0, nextop&7));
+            MOV32w(x1, (1<<F_CF)|(1<<F_ZF));
+            TSTw_REG(xFlags, x1);
+            if(ST_IS_F(0)) {
+                FCSELS(v1, v2, v1, cNE);
+            } else {
+                FCSELD(v1, v2, v1, cNE);   // F_CF==0 & F_ZF==0
+            }
+            break;
+        case 0xD8:
+        case 0xD9:
+        case 0xDA:
+        case 0xDB:
+        case 0xDC:
+        case 0xDD:
+        case 0xDE:
+        case 0xDF:
+            INST_NAME("FCMOVU ST0, STx");
+            READFLAGS(X_PF);
+            v1 = x87_get_st(dyn, ninst, x1, x2, 0, X87_COMBINE(0, nextop&7));
+            v2 = x87_get_st(dyn, ninst, x1, x2, nextop&7, X87_COMBINE(0, nextop&7));
+            TSTw_mask(xFlags, 0b011110, 0); //mask=1<<F_PF
+            if(ST_IS_F(0)) {
+                FCSELS(v1, v2, v1, cNE);
+            } else {
+                FCSELD(v1, v2, v1, cNE);        // F_PF==0
+            }
+            break;
+        case 0xE9:
+            INST_NAME("FUCOMPP ST0, ST1");
+            v1 = x87_get_st(dyn, ninst, x1, x2, 0, X87_COMBINE(0, nextop&7));
+            v2 = x87_get_st(dyn, ninst, x1, x2, 1, X87_COMBINE(0, nextop&7));
+            if(ST_IS_F(0)) {
+                FCMPS(v1, v2);
+            } else {
+                FCMPD(v1, v2);
+            }
+            FCOM(x1, x2, x3);
+            X87_POP_OR_FAIL(dyn, ninst, x3);
+            X87_POP_OR_FAIL(dyn, ninst, x3);
+            break;
+
+        case 0xE4:
+        case 0xF0:
+        case 0xF1:
+        case 0xF4:
+        case 0xF5:
+        case 0xF6:
+        case 0xF7:
+        case 0xF8:
+        case 0xF9:
+        case 0xFD:
+            DEFAULT;
+            break;
+
+        default:
+            switch((nextop>>3)&7) {
+                case 0:
+                    INST_NAME("FIADD ST0, Ed");
+                    v1 = x87_get_st(dyn, ninst, x1, x2, 0, NEON_CACHE_ST_D);
+                    v2 = fpu_get_scratch(dyn);
+                    addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, &unscaled, 0xfff<<2, 3, rex, NULL, 0, 0);
+                    VLD32(v2, ed, fixedaddress);
+                    SXTL_32(v2, v2);    // i32 -> i64
+                    SCVTFDD(v2, v2);    // i64 -> double
+                    FADDD(v1, v1, v2);
+                    break;
+                case 1:
+                    INST_NAME("FIMUL ST0, Ed");
+                    v1 = x87_get_st(dyn, ninst, x1, x2, 0, NEON_CACHE_ST_D);
+                    v2 = fpu_get_scratch(dyn);
+                    addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, &unscaled, 0xfff<<2, 3, rex, NULL, 0, 0);
+                    VLD32(v2, ed, fixedaddress);
+                    SXTL_32(v2, v2);    // i32 -> i64
+                    SCVTFDD(v2, v2);    // i64 -> double
+                    FMULD(v1, v1, v2);
+                    break;
+                case 2:
+                    INST_NAME("FICOM ST0, Ed");
+                    v1 = x87_get_st(dyn, ninst, x1, x2, 0, NEON_CACHE_ST_D);
+                    v2 = fpu_get_scratch(dyn);
+                    addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, &unscaled, 0xfff<<2, 3, rex, NULL, 0, 0);
+                    VLD32(v2, ed, fixedaddress);
+                    SXTL_32(v2, v2);    // i32 -> i64
+                    SCVTFDD(v2, v2);    // i64 -> double
+                    FCMPD(v1, v2);
+                    FCOM(x1, x2, x3);
+                    break;
+                case 3:
+                    INST_NAME("FICOMP ST0, Ed");
+                    v1 = x87_get_st(dyn, ninst, x1, x2, 0, NEON_CACHE_ST_D);
+                    v2 = fpu_get_scratch(dyn);
+                    addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, &unscaled, 0xfff<<2, 3, rex, NULL, 0, 0);
+                    VLD32(v2, ed, fixedaddress);
+                    SXTL_32(v2, v2);    // i32 -> i64
+                    SCVTFDD(v2, v2);    // i64 -> double
+                    FCMPD(v1, v2);
+                    FCOM(x1, x2, x3);
+                    X87_POP_OR_FAIL(dyn, ninst, x3);
+                    break;
+                case 4:
+                    INST_NAME("FISUB ST0, Ed");
+                    v1 = x87_get_st(dyn, ninst, x1, x2, 0, NEON_CACHE_ST_D);
+                    v2 = fpu_get_scratch(dyn);
+                    addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, &unscaled, 0xfff<<2, 3, rex, NULL, 0, 0);
+                    VLD32(v2, ed, fixedaddress);
+                    SXTL_32(v2, v2);    // i32 -> i64
+                    SCVTFDD(v2, v2);    // i64 -> double
+                    FSUBD(v1, v1, v2);
+                    break;
+                case 5:
+                    INST_NAME("FISUBR ST0, Ed");
+                    v1 = x87_get_st(dyn, ninst, x1, x2, 0, NEON_CACHE_ST_D);
+                    v2 = fpu_get_scratch(dyn);
+                    addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, &unscaled, 0xfff<<2, 3, rex, NULL, 0, 0);
+                    VLD32(v2, ed, fixedaddress);
+                    SXTL_32(v2, v2);    // i32 -> i64
+                    SCVTFDD(v2, v2);    // i64 -> double
+                    FSUBD(v1, v2, v1);
+                    break;
+                case 6:
+                    INST_NAME("FIDIV ST0, Ed");
+                    v1 = x87_get_st(dyn, ninst, x1, x2, 0, NEON_CACHE_ST_D);
+                    v2 = fpu_get_scratch(dyn);
+                    addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, &unscaled, 0xfff<<2, 3, rex, NULL, 0, 0);
+                    VLD32(v2, ed, fixedaddress);
+                    SXTL_32(v2, v2);    // i32 -> i64
+                    SCVTFDD(v2, v2);    // i64 -> double
+                    FDIVD(v1, v1, v2);
+                    break;
+                case 7:
+                    INST_NAME("FIDIVR ST0, Ed");
+                    v1 = x87_get_st(dyn, ninst, x1, x2, 0, NEON_CACHE_ST_D);
+                    v2 = fpu_get_scratch(dyn);
+                    addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, &unscaled, 0xfff<<2, 3, rex, NULL, 0, 0);
+                    VLD32(v2, ed, fixedaddress);
+                    SXTL_32(v2, v2);    // i32 -> i64
+                    SCVTFDD(v2, v2);    // i64 -> double
+                    FDIVD(v1, v2, v1);
+                    break;
+            }
+    }
+    return addr;
+}
+

src/dynarec/arm64/dynarec_arm64_db.c

@@ -1,7 +1,6 @@
 #include <stdio.h>
 #include <stdlib.h>
 #include <stddef.h>
-#include <pthread.h>
 #include <errno.h>
 
 #include "debug.h"
@@ -33,6 +32,7 @@ uintptr_t dynarec64_DB(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
     uint8_t wback;
     uint8_t u8;
     int64_t fixedaddress;
+    int unscaled;
     int v1, v2;
     int s0;
     int64_t j64;
@@ -156,7 +156,7 @@ uintptr_t dynarec64_DB(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             }
             FCOMI(x1, x2);
             break;
-        case 0xF0:  
+        case 0xF0:
         case 0xF1:
         case 0xF2:
         case 0xF3:
@@ -188,16 +188,16 @@ uintptr_t dynarec64_DB(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             switch((nextop>>3)&7) {
                 case 0:
                     INST_NAME("FILD ST0, Ed");
-                    v1 = x87_do_push(dyn, ninst, x1, NEON_CACHE_ST_D);
-                    addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, 0xfff<<2, 3, rex, NULL, 0, 0);
-                    VLDR32_U12(v1, ed, fixedaddress);
+                    X87_PUSH_OR_FAIL(v1, dyn, ninst, x1, NEON_CACHE_ST_D);
+                    addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, &unscaled, 0xfff<<2, 3, rex, NULL, 0, 0);
+                    VLD32(v1, ed, fixedaddress);
                     SXTL_32(v1, v1);    // i32 -> i64
                     SCVTFDD(v1, v1);    // i64 -> double
                     break;
                 case 1:
                     INST_NAME("FISTTP Ed, ST0");
                     v1 = x87_get_st(dyn, ninst, x1, x2, 0, NEON_CACHE_ST_D);
-                    addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, 0xfff<<2, 3, rex, NULL, 0, 0);
+                    addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, &unscaled, 0xfff<<2, 3, rex, NULL, 0, 0);
                     s0 = fpu_get_scratch(dyn);
                     #if 0
                     ed = x1;
@@ -211,20 +211,20 @@ uintptr_t dynarec64_DB(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     FRINTZD(s0, v1);
                     VFCVTZSd(s0, s0);
                     SQXTN_S_D(s0, s0);
-                    VSTR32_U12(s0, wback, fixedaddress);
+                    VST32(s0, wback, fixedaddress);
                     MRS_fpsr(x5);   // get back FPSR to check the IOC bit
                     TBZ_MARK3(x5, FPSR_IOC);
                     MOV32w(x5, 0x80000000);
-                    STRw_U12(x5, wback, fixedaddress);
+                    STW(x5, wback, fixedaddress);
                     MARK3;
                     #endif
-                    x87_do_pop(dyn, ninst, x3);
+                    X87_POP_OR_FAIL(dyn, ninst, x3);
                     break;
                 case 2:
                     INST_NAME("FIST Ed, ST0");
                     v1 = x87_get_st(dyn, ninst, x1, x2, 0, NEON_CACHE_ST_D);
                     u8 = x87_setround(dyn, ninst, x1, x2, x4); // x1 have the modified RPSCR reg
-                    addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, 0xfff<<2, 3, rex, NULL, 0, 0);
+                    addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, &unscaled, 0xfff<<2, 3, rex, NULL, 0, 0);
                     s0 = fpu_get_scratch(dyn);
                     #if 0
                     ed = x1;
@@ -238,11 +238,11 @@ uintptr_t dynarec64_DB(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     FRINTXD(s0, v1);
                     VFCVTZSd(s0, s0);
                     SQXTN_S_D(s0, s0);
-                    VSTR32_U12(s0, wback, fixedaddress);
+                    VST32(s0, wback, fixedaddress);
                     MRS_fpsr(x5);   // get back FPSR to check the IOC bit
                     TBZ_MARK3(x5, FPSR_IOC);
                     MOV32w(x5, 0x80000000);
-                    STRw_U12(x5, wback, fixedaddress);
+                    STW(x5, wback, fixedaddress);
                     MARK3;
                     #endif
                     x87_restoreround(dyn, ninst, u8);
@@ -251,7 +251,7 @@ uintptr_t dynarec64_DB(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     INST_NAME("FISTP Ed, ST0");
                     v1 = x87_get_st(dyn, ninst, x1, x2, 0, NEON_CACHE_ST_D);
                     u8 = x87_setround(dyn, ninst, x1, x2, x4); // x1 have the modified RPSCR reg
-                    addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, 0xfff<<2, 3, rex, NULL, 0, 0);
+                    addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, &unscaled, 0xfff<<2, 3, rex, NULL, 0, 0);
                     s0 = fpu_get_scratch(dyn);
                     #if 0
                     ed = x1;
@@ -265,19 +265,19 @@ uintptr_t dynarec64_DB(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     FRINTXD(s0, v1);
                     VFCVTZSd(s0, s0);
                     SQXTN_S_D(s0, s0);
-                    VSTR32_U12(s0, wback, fixedaddress);
+                    VST32(s0, wback, fixedaddress);
                     MRS_fpsr(x5);   // get back FPSR to check the IOC bit
                     TBZ_MARK3(x5, FPSR_IOC);
                     MOV32w(x5, 0x80000000);
-                    STRw_U12(x5, wback, fixedaddress);
+                    STW(x5, wback, fixedaddress);
                     MARK3;
                     #endif
                     x87_restoreround(dyn, ninst, u8);
-                    x87_do_pop(dyn, ninst, x3);
+                    X87_POP_OR_FAIL(dyn, ninst, x3);
                     break;
                 case 5:
                     INST_NAME("FLD tbyte");
-                    addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0, 0, rex, NULL, 0, 0);
+                    addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, NULL, 0, 0, rex, NULL, 0, 0);
                     if((PK(0)==0xDB && ((PK(1)>>3)&7)==7) || (PK(0)>=0x40 && PK(0)<=0x4f && PK(1)==0xDB && ((PK(2)>>3)&7)==7)) {
                         // the FLD is immediatly followed by an FSTP
                         LDRx_U12(x5, ed, 0);
@@ -291,20 +291,19 @@ uintptr_t dynarec64_DB(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                         } else
                             rex.rex = 0;
                         nextop = F8;    //modrm
-                        addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0, 0, rex, NULL, 0, 0);
+                        addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, NULL, 0, 0, rex, NULL, 0, 0);
                         STRx_U12(x5, ed, 0);
                         STRH_U12(x6, ed, 8);
                     } else {
                         if(box64_x87_no80bits) {
-                            v1 = x87_do_push(dyn, ninst, x1, NEON_CACHE_ST_D);
-                            addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, 0xfff<<3, 7, rex, NULL, 0, 0);
+                            X87_PUSH_OR_FAIL(v1, dyn, ninst, x1, NEON_CACHE_ST_D);
                             VLDR64_U12(v1, ed, fixedaddress);
                         } else {
                             if(ed!=x1) {
                                 MOVx_REG(x1, ed);
                             }
-                            x87_do_push_empty(dyn, ninst, x3);
-                            CALL(arm_fld, -1);
+                            X87_PUSH_EMPTY_OR_FAIL(dyn, ninst, x3);
+                            CALL(native_fld, -1);
                         }
                     }
                     break;
@@ -312,20 +311,20 @@ uintptr_t dynarec64_DB(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     INST_NAME("FSTP tbyte");
                     if(box64_x87_no80bits) {
                         v1 = x87_get_st(dyn, ninst, x1, x2, 0, NEON_CACHE_ST_D);
-                        addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, 0xfff<<3, 7, rex, NULL, 0, 0);
-                        VSTR64_U12(v1, wback, fixedaddress);
+                        addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, &unscaled, 0xfff<<3, 7, rex, NULL, 0, 0);
+                        VST64(v1, wback, fixedaddress);
                     } else {
                         #if 0
                         x87_forget(dyn, ninst, x1, x3, 0);
-                        addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0, 0, rex, NULL, 0, 0);
+                        addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, NULL, 0, 0, rex, NULL, 0, 0);
                         if(ed!=x1) {
                             MOVx_REG(x1, ed);
                         }
-                        CALL(arm_fstp, -1);
+                        CALL(native_fstp, -1);
                         #else
                         // Painfully long, straight conversion from the C code, shoud be optimized
                         v1 = x87_get_st(dyn, ninst, x1, x2, 0, NEON_CACHE_ST_D);
-                        addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, 0, 0, rex, NULL, 0, 0);
+                        addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, NULL, 0, 0, rex, NULL, 0, 0);
                         FMOVxD(x1, v1);
                         // do special value first
                         TSTx_mask(x1, 1, 0b00000, 0b111110);    //0x7fffffffffffffffL
@@ -345,7 +344,7 @@ uintptr_t dynarec64_DB(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                         CMPSw_REG(x3, x4);
                         B_MARK2(cNE);
                         // NaN and Infinite
-                        ORRw_mask(x3, x5, 0, 0b1110);    //x3 = sign | 0x7fff 
+                        ORRw_mask(x3, x5, 0, 0b1110);    //x3 = sign | 0x7fff
                         TSTx_mask(x1, 1, 0, 0b110011); //0x000fffffffffffffL
                         ORRx_mask(x5, xZR, 1, 1, 0);    //0x8000000000000000
                         ORRx_mask(x4, xZR, 1, 0b10, 0b01); //0xc000000000000000
@@ -373,7 +372,7 @@ uintptr_t dynarec64_DB(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                         STRH_U12(x3, wback, 8);
                         #endif
                     }
-                    x87_do_pop(dyn, ninst, x3);
+                    X87_POP_OR_FAIL(dyn, ninst, x3);
                     break;
                 default:
                     DEFAULT;

src/dynarec/arm64/dynarec_arm64_dc.c

@@ -1,7 +1,6 @@
 #include <stdio.h>
 #include <stdlib.h>
 #include <stddef.h>
-#include <pthread.h>
 #include <errno.h>
 
 #include "debug.h"
@@ -31,6 +30,7 @@ uintptr_t dynarec64_DC(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
     uint8_t nextop = F8;
     uint8_t wback;
     int64_t fixedaddress;
+    int unscaled;
     int v1, v2;
 
     MAYUSE(v2);
@@ -106,7 +106,7 @@ uintptr_t dynarec64_DC(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                 FCMPD(v1, v2);
             }
             FCOM(x1, x2, x3);
-            x87_do_pop(dyn, ninst, x3);
+            X87_POP_OR_FAIL(dyn, ninst, x3);
             break;
         case 0xE0:
         case 0xE1:
@@ -158,7 +158,7 @@ uintptr_t dynarec64_DC(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             } else {
                 FDIVD(v1, v2, v1);
             }
-            break;       
+            break;
         case 0xF8:
         case 0xF9:
         case 0xFA:
@@ -182,24 +182,24 @@ uintptr_t dynarec64_DC(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     INST_NAME("FADD ST0, double[ED]");
                     v1 = x87_get_st(dyn, ninst, x1, x2, 0, NEON_CACHE_ST_D);
                     v2 = fpu_get_scratch(dyn);
-                    addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, 0xfff<<3, 7, rex, NULL, 0, 0);
-                    VLDR64_U12(v2, wback, fixedaddress);
+                    addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, &unscaled, 0xfff<<3, 7, rex, NULL, 0, 0);
+                    VLD64(v2, wback, fixedaddress);
                     FADDD(v1, v1, v2);
                     break;
                 case 1:
                     INST_NAME("FMUL ST0, double[ED]");
                     v1 = x87_get_st(dyn, ninst, x1, x2, 0, NEON_CACHE_ST_D);
                     v2 = fpu_get_scratch(dyn);
-                    addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, 0xfff<<3, 7, rex, NULL, 0, 0);
-                    VLDR64_U12(v2, wback, fixedaddress);
+                    addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, &unscaled, 0xfff<<3, 7, rex, NULL, 0, 0);
+                    VLD64(v2, wback, fixedaddress);
                     FMULD(v1, v1, v2);
                     break;
                 case 2:
                     INST_NAME("FCOM ST0, double[ED]");
                     v1 = x87_get_st(dyn, ninst, x1, x2, 0, NEON_CACHE_ST_D);
                     v2 = fpu_get_scratch(dyn);
-                    addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, 0xfff<<3, 7, rex, NULL, 0, 0);
-                    VLDR64_U12(v2, wback, fixedaddress);
+                    addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, &unscaled, 0xfff<<3, 7, rex, NULL, 0, 0);
+                    VLD64(v2, wback, fixedaddress);
                     FCMPD(v1, v2);
                     FCOM(x1, x2, x3);
                     break;
@@ -207,42 +207,42 @@ uintptr_t dynarec64_DC(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     INST_NAME("FCOMP ST0, double[ED]");
                     v1 = x87_get_st(dyn, ninst, x1, x2, 0, NEON_CACHE_ST_D);
                     v2 = fpu_get_scratch(dyn);
-                    addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, 0xfff<<3, 7, rex, NULL, 0, 0);
-                    VLDR64_U12(v2, wback, fixedaddress);
+                    addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, &unscaled, 0xfff<<3, 7, rex, NULL, 0, 0);
+                    VLD64(v2, wback, fixedaddress);
                     FCMPD(v1, v2);
                     FCOM(x1, x2, x3);
-                    x87_do_pop(dyn, ninst, x3);
+                    X87_POP_OR_FAIL(dyn, ninst, x3);
                     break;
                 case 4:
                     INST_NAME("FSUB ST0, double[ED]");
                     v1 = x87_get_st(dyn, ninst, x1, x2, 0, NEON_CACHE_ST_D);
                     v2 = fpu_get_scratch(dyn);
-                    addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, 0xfff<<3, 7, rex, NULL, 0, 0);
-                    VLDR64_U12(v2, wback, fixedaddress);
+                    addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, &unscaled, 0xfff<<3, 7, rex, NULL, 0, 0);
+                    VLD64(v2, wback, fixedaddress);
                     FSUBD(v1, v1, v2);
                     break;
                 case 5:
                     INST_NAME("FSUBR ST0, double[ED]");
                     v1 = x87_get_st(dyn, ninst, x1, x2, 0, NEON_CACHE_ST_D);
                     v2 = fpu_get_scratch(dyn);
-                    addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, 0xfff<<3, 7, rex, NULL, 0, 0);
-                    VLDR64_U12(v2, wback, fixedaddress);
+                    addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, &unscaled, 0xfff<<3, 7, rex, NULL, 0, 0);
+                    VLD64(v2, wback, fixedaddress);
                     FSUBD(v1, v2, v1);
                     break;
                 case 6:
                     INST_NAME("FDIV ST0, double[ED]");
                     v1 = x87_get_st(dyn, ninst, x1, x2, 0, NEON_CACHE_ST_D);
                     v2 = fpu_get_scratch(dyn);
-                    addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, 0xfff<<3, 7, rex, NULL, 0, 0);
-                    VLDR64_U12(v2, wback, fixedaddress);
+                    addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, &unscaled, 0xfff<<3, 7, rex, NULL, 0, 0);
+                    VLD64(v2, wback, fixedaddress);
                     FDIVD(v1, v1, v2);
                     break;
                 case 7:
                     INST_NAME("FDIVR ST0, double[ED]");
                     v1 = x87_get_st(dyn, ninst, x1, x2, 0, NEON_CACHE_ST_D);
                     v2 = fpu_get_scratch(dyn);
-                    addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, 0xfff<<3, 7, rex, NULL, 0, 0);
-                    VLDR64_U12(v2, wback, fixedaddress);
+                    addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, &unscaled, 0xfff<<3, 7, rex, NULL, 0, 0);
+                    VLD64(v2, wback, fixedaddress);
                     FDIVD(v1, v2, v1);
                     break;
             }

src/dynarec/arm64/dynarec_arm64_dd.c

@@ -1,7 +1,6 @@
 #include <stdio.h>
 #include <stdlib.h>
 #include <stddef.h>
-#include <pthread.h>
 #include <errno.h>
 
 #include "debug.h"
@@ -31,6 +30,7 @@ uintptr_t dynarec64_DD(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
     uint8_t nextop = F8;
     uint8_t ed;
     int64_t fixedaddress;
+    int unscaled;
     int v1, v2;
     int s0;
     int64_t j64;
@@ -74,7 +74,7 @@ uintptr_t dynarec64_DD(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             break;
         case 0xD8:
             INST_NAME("FSTP ST0, ST0");
-            x87_do_pop(dyn, ninst, x3);
+            X87_POP_OR_FAIL(dyn, ninst, x3);
             break;
         case 0xD9:
         case 0xDA:
@@ -88,7 +88,7 @@ uintptr_t dynarec64_DD(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             x87_get_st_empty(dyn, ninst, x1, x2, nextop&7, X87_ST(nextop&7));
             x87_get_st(dyn, ninst, x1, x2, 0, X87_ST0);
             x87_swapreg(dyn, ninst, x1, x2, 0, nextop&7);
-            x87_do_pop(dyn, ninst, x3);
+            X87_POP_OR_FAIL(dyn, ninst, x3);
             break;
 
         case 0xE0:
@@ -126,7 +126,7 @@ uintptr_t dynarec64_DD(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                 FCMPD(v1, v2);
             }
             FCOM(x1, x2, x3);
-            x87_do_pop(dyn, ninst, x3);
+            X87_POP_OR_FAIL(dyn, ninst, x3);
             break;
 
         case 0xC8:
@@ -160,68 +160,72 @@ uintptr_t dynarec64_DD(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             switch((nextop>>3)&7) {
                 case 0:
                     INST_NAME("FLD double");
-                    v1 = x87_do_push(dyn, ninst, x3, NEON_CACHE_ST_D);
-                    addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0xfff<<3, 7, rex, NULL, 0, 0);
-                    VLDR64_U12(v1, ed, fixedaddress);
+                    X87_PUSH_OR_FAIL(v1, dyn, ninst, x3, NEON_CACHE_ST_D);
+                    addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, &unscaled, 0xfff<<3, 7, rex, NULL, 0, 0);
+                    VLD64(v1, ed, fixedaddress);
                     break;
                 case 1:
                     INST_NAME("FISTTP i64, ST0");
-                    v1 = x87_get_st(dyn, ninst, x1, x2, 0, NEON_CACHE_ST_D);
-                    addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0xfff<<3, 7, rex, NULL, 0, 0);
-                    s0 = fpu_get_scratch(dyn);
-                    #if 0
-                    // those are ARM 8.5 opcode!
-                    FRINT64ZD(s0, v1);
-                    FCVTZSxD(x2, s0);
-                    STRx_U12(x2, ed, fixedaddress);
-                    #else
-                    MRS_fpsr(x5);
-                    BFCw(x5, FPSR_IOC, 1);   // reset IOC bit
-                    MSR_fpsr(x5);
-                    FRINTRRD(s0, v1, 3);
-                    FCVTZSxD(x2, s0);
-                    STRx_U12(x2, ed, fixedaddress);
-                    MRS_fpsr(x5);   // get back FPSR to check the IOC bit
-                    TBZ_MARK3(x5, FPSR_IOC);
-                    ORRx_mask(x5, xZR, 1, 1, 0);    //0x8000000000000000
-                    STRw_U12(x5, ed, fixedaddress);
-                    MARK3;
-                    #endif
-                    x87_do_pop(dyn, ninst, x3);
+                    v1 = x87_get_st(dyn, ninst, x1, x2, 0, NEON_CACHE_ST_I64);
+                    addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, &unscaled, 0xfff<<3, 7, rex, NULL, 0, 0);
+                    if(ST_IS_I64(0)) {
+                        VST64(v1, ed, fixedaddress);
+                    } else {
+                        s0 = fpu_get_scratch(dyn);
+                        #if 0
+                        // those are ARM 8.5 opcode!
+                        FRINT64ZD(s0, v1);
+                        FCVTZSxD(x2, s0);
+                        STRx_U12(x2, ed, fixedaddress);
+                        #else
+                        MRS_fpsr(x5);
+                        BFCw(x5, FPSR_IOC, 1);   // reset IOC bit
+                        MSR_fpsr(x5);
+                        FRINTRRD(s0, v1, 3);
+                        FCVTZSxD(x2, s0);
+                        STx(x2, ed, fixedaddress);
+                        MRS_fpsr(x5);   // get back FPSR to check the IOC bit
+                        TBZ_MARK3(x5, FPSR_IOC);
+                        ORRx_mask(x5, xZR, 1, 1, 0);    //0x8000000000000000
+                        STx(x5, ed, fixedaddress);
+                        MARK3;
+                        #endif
+                    }
+                    X87_POP_OR_FAIL(dyn, ninst, x3);
                     break;
                 case 2:
                     INST_NAME("FST double");
                     v1 = x87_get_st(dyn, ninst, x1, x2, 0, NEON_CACHE_ST_D);
-                    addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0xfff<<3, 7, rex, NULL, 0, 0);
-                    VSTR64_U12(v1, ed, fixedaddress);
+                    addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, &unscaled, 0xfff<<3, 7, rex, NULL, 0, 0);
+                    VST64(v1, ed, fixedaddress);
                     break;
                 case 3:
                     INST_NAME("FSTP double");
                     v1 = x87_get_st(dyn, ninst, x1, x2, 0, NEON_CACHE_ST_D);
-                    addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0xfff<<3, 7, rex, NULL, 0, 0);
-                    VSTR64_U12(v1, ed, fixedaddress);
-                    x87_do_pop(dyn, ninst, x3);
+                    addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, &unscaled, 0xfff<<3, 7, rex, NULL, 0, 0);
+                    VST64(v1, ed, fixedaddress);
+                    X87_POP_OR_FAIL(dyn, ninst, x3);
                     break;
-                case 4: 
+                case 4:
                     INST_NAME("FRSTOR m108byte");
                     MESSAGE(LOG_DUMP, "Need Optimization\n");
                     fpu_purgecache(dyn, ninst, 0, x1, x2, x3);
-                    addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0, 0, rex, NULL, 0, 0);
+                    addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, NULL, 0, 0, rex, NULL, 0, 0);
                     if(ed!=x1) {MOVx_REG(x1, ed);}
-                    CALL(arm_frstor, -1);
+                    CALL(native_frstor, -1);
                     break;
-                case 6: 
+                case 6:
                     INST_NAME("FSAVE m108byte");
                     MESSAGE(LOG_DUMP, "Need Optimization\n");
                     fpu_purgecache(dyn, ninst, 0, x1, x2, x3);
-                    addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0, 0, rex, NULL, 0, 0);
+                    addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, NULL, 0, 0, rex, NULL, 0, 0);
                     if(ed!=x1) {MOVx_REG(x1, ed);}
-                    CALL(arm_fsave, -1);
+                    CALL(native_fsave, -1);
                     break;
                 case 7:
                     INST_NAME("FNSTSW m2byte");
-                    fpu_purgecache(dyn, ninst, 0, x1, x2, x3);
-                    addr = geted(dyn, addr, ninst, nextop, &ed, x4, &fixedaddress, 0xfff<<1, 1, rex, NULL, 0, 0);
+                    //fpu_purgecache(dyn, ninst, 0, x1, x2, x3);
+                    addr = geted(dyn, addr, ninst, nextop, &ed, x4, &fixedaddress, &unscaled, 0xfff<<1, 1, rex, NULL, 0, 0);
                     LDRw_U12(x2, xEmu, offsetof(x64emu_t, top));
                     LDRH_U12(x3, xEmu, offsetof(x64emu_t, sw));
                     if(dyn->n.x87stack) {
@@ -234,7 +238,8 @@ uintptr_t dynarec64_DD(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                         ANDw_mask(x2, x2, 0, 2);
                     }
                     BFIw(x3, x2, 11, 3); // inject TOP at bit 11 (3 bits)
-                    STRH_U12(x3, ed, fixedaddress);   // store whole sw flags
+                    STRH_U12(x3, xEmu, offsetof(x64emu_t, sw));
+                    STH(x3, ed, fixedaddress);   // store whole sw flags
                     break;
                 default:
                     DEFAULT;

src/dynarec/arm64/dynarec_arm64_de.c

@@ -1,7 +1,6 @@
 #include <stdio.h>
 #include <stdlib.h>
 #include <stddef.h>
-#include <pthread.h>
 #include <errno.h>
 
 #include "debug.h"
@@ -31,6 +30,7 @@ uintptr_t dynarec64_DE(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
     uint8_t nextop = F8;
     uint8_t wback;
     int64_t fixedaddress;
+    int unscaled;
     int v1, v2;
 
     MAYUSE(v2);
@@ -53,7 +53,7 @@ uintptr_t dynarec64_DE(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             } else {
                 FADDD(v1, v1, v2);
             }
-            x87_do_pop(dyn, ninst, x3);
+            X87_POP_OR_FAIL(dyn, ninst, x3);
             break;
         case 0xC8:
         case 0xC9:
@@ -71,7 +71,7 @@ uintptr_t dynarec64_DE(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             } else {
                 FMULD(v1, v1, v2);
             }
-            x87_do_pop(dyn, ninst, x3);
+            X87_POP_OR_FAIL(dyn, ninst, x3);
             break;
         case 0xD0:
         case 0xD1:
@@ -90,7 +90,7 @@ uintptr_t dynarec64_DE(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                 FCMPD(v1, v2);
             }
             FCOM(x1, x2, x3);
-            x87_do_pop(dyn, ninst, x3);
+            X87_POP_OR_FAIL(dyn, ninst, x3);
             break;
         case 0xD9:
             INST_NAME("FCOMPP ST0, STx");
@@ -102,8 +102,8 @@ uintptr_t dynarec64_DE(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                 FCMPD(v1, v2);
             }
             FCOM(x1, x2, x3);
-            x87_do_pop(dyn, ninst, x3);
-            x87_do_pop(dyn, ninst, x3);
+            X87_POP_OR_FAIL(dyn, ninst, x3);
+            X87_POP_OR_FAIL(dyn, ninst, x3);
             break;
         case 0xE0:
         case 0xE1:
@@ -121,7 +121,7 @@ uintptr_t dynarec64_DE(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             } else {
                 FSUBD(v1, v2, v1);
             }
-            x87_do_pop(dyn, ninst, x3);
+            X87_POP_OR_FAIL(dyn, ninst, x3);
             break;
         case 0xE8:
         case 0xE9:
@@ -139,7 +139,7 @@ uintptr_t dynarec64_DE(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             } else {
                 FSUBD(v1, v1, v2);
             }
-            x87_do_pop(dyn, ninst, x3);
+            X87_POP_OR_FAIL(dyn, ninst, x3);
             break;
         case 0xF0:
         case 0xF1:
@@ -157,8 +157,8 @@ uintptr_t dynarec64_DE(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             } else {
                 FDIVD(v1, v2, v1);
             }
-            x87_do_pop(dyn, ninst, x3);
-            break;       
+            X87_POP_OR_FAIL(dyn, ninst, x3);
+            break;
         case 0xF8:
         case 0xF9:
         case 0xFA:
@@ -175,7 +175,7 @@ uintptr_t dynarec64_DE(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             } else {
                 FDIVD(v1, v1, v2);
             }
-            x87_do_pop(dyn, ninst, x3);
+            X87_POP_OR_FAIL(dyn, ninst, x3);
             break;
         case 0xD8:
         case 0xDA:
@@ -184,15 +184,16 @@ uintptr_t dynarec64_DE(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
         case 0xDD:
         case 0xDE:
         case 0xDF:
-            return 0;
+            DEFAULT;
+            break;
         default:
             switch((nextop>>3)&7) {
                 case 0:
                     INST_NAME("FIADD ST0, word[ED]");
                     v1 = x87_get_st(dyn, ninst, x1, x2, 0, NEON_CACHE_ST_D);
                     v2 = fpu_get_scratch(dyn);
-                    addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, 0xfff<<1, 1, rex, NULL, 0, 0);
-                    VLDR16_U12(v2, wback, fixedaddress);
+                    addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, &unscaled, 0xfff<<1, 1, rex, NULL, 0, 0);
+                    VLD16(v2, wback, fixedaddress);
                     SXTL_16(v2, v2);
                     SXTL_32(v2, v2);
                     SCVTFDD(v2, v2);
@@ -202,8 +203,8 @@ uintptr_t dynarec64_DE(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     INST_NAME("FIMUL ST0, word[ED]");
                     v1 = x87_get_st(dyn, ninst, x1, x2, 0, NEON_CACHE_ST_D);
                     v2 = fpu_get_scratch(dyn);
-                    addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, 0xfff<<1, 1, rex, NULL, 0, 0);
-                    VLDR16_U12(v2, wback, fixedaddress);
+                    addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, &unscaled, 0xfff<<1, 1, rex, NULL, 0, 0);
+                    VLD16(v2, wback, fixedaddress);
                     SXTL_16(v2, v2);
                     SXTL_32(v2, v2);
                     SCVTFDD(v2, v2);
@@ -213,8 +214,8 @@ uintptr_t dynarec64_DE(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     INST_NAME("FICOM ST0, word[ED]");
                     v1 = x87_get_st(dyn, ninst, x1, x2, 0, NEON_CACHE_ST_D);
                     v2 = fpu_get_scratch(dyn);
-                    addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, 0xfff<<1, 1, rex, NULL, 0, 0);
-                    VLDR16_U12(v2, wback, fixedaddress);
+                    addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, &unscaled, 0xfff<<1, 1, rex, NULL, 0, 0);
+                    VLD16(v2, wback, fixedaddress);
                     SXTL_16(v2, v2);
                     SXTL_32(v2, v2);
                     SCVTFDD(v2, v2);
@@ -225,21 +226,21 @@ uintptr_t dynarec64_DE(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     INST_NAME("FICOMP ST0, word[ED]");
                     v1 = x87_get_st(dyn, ninst, x1, x2, 0, NEON_CACHE_ST_D);
                     v2 = fpu_get_scratch(dyn);
-                    addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, 0xfff<<1, 1, rex, NULL, 0, 0);
-                    VLDR16_U12(v2, wback, fixedaddress);
+                    addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, &unscaled, 0xfff<<1, 1, rex, NULL, 0, 0);
+                    VLD16(v2, wback, fixedaddress);
                     SXTL_16(v2, v2);
                     SXTL_32(v2, v2);
                     SCVTFDD(v2, v2);
                     FCMPD(v1, v2);
                     FCOM(x1, x2, x3);
-                    x87_do_pop(dyn, ninst, x3);
+                    X87_POP_OR_FAIL(dyn, ninst, x3);
                     break;
                 case 4:
                     INST_NAME("FISUB ST0, word[ED]");
                     v1 = x87_get_st(dyn, ninst, x1, x2, 0, NEON_CACHE_ST_D);
                     v2 = fpu_get_scratch(dyn);
-                    addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, 0xfff<<1, 1, rex, NULL, 0, 0);
-                    VLDR16_U12(v2, wback, fixedaddress);
+                    addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, &unscaled, 0xfff<<1, 1, rex, NULL, 0, 0);
+                    VLD16(v2, wback, fixedaddress);
                     SXTL_16(v2, v2);
                     SXTL_32(v2, v2);
                     SCVTFDD(v2, v2);
@@ -249,8 +250,8 @@ uintptr_t dynarec64_DE(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     INST_NAME("FISUBR ST0, word[ED]");
                     v1 = x87_get_st(dyn, ninst, x1, x2, 0, NEON_CACHE_ST_D);
                     v2 = fpu_get_scratch(dyn);
-                    addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, 0xfff<<1, 1, rex, NULL, 0, 0);
-                    VLDR16_U12(v2, wback, fixedaddress);
+                    addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, &unscaled, 0xfff<<1, 1, rex, NULL, 0, 0);
+                    VLD16(v2, wback, fixedaddress);
                     SXTL_16(v2, v2);
                     SXTL_32(v2, v2);
                     SCVTFDD(v2, v2);
@@ -260,8 +261,8 @@ uintptr_t dynarec64_DE(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     INST_NAME("FIDIV ST0, word[ED]");
                     v1 = x87_get_st(dyn, ninst, x1, x2, 0, NEON_CACHE_ST_D);
                     v2 = fpu_get_scratch(dyn);
-                    addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, 0xfff<<1, 1, rex, NULL, 0, 0);
-                    VLDR16_U12(v2, wback, fixedaddress);
+                    addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, &unscaled, 0xfff<<1, 1, rex, NULL, 0, 0);
+                    VLD16(v2, wback, fixedaddress);
                     SXTL_16(v2, v2);
                     SXTL_32(v2, v2);
                     SCVTFDD(v2, v2);
@@ -271,8 +272,8 @@ uintptr_t dynarec64_DE(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     INST_NAME("FIDIVR ST0, word[ED]");
                     v1 = x87_get_st(dyn, ninst, x1, x2, 0, NEON_CACHE_ST_D);
                     v2 = fpu_get_scratch(dyn);
-                    addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, 0xfff<<1, 1, rex, NULL, 0, 0);
-                    VLDR16_U12(v2, wback, fixedaddress);
+                    addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, &unscaled, 0xfff<<1, 1, rex, NULL, 0, 0);
+                    VLD16(v2, wback, fixedaddress);
                     SXTL_16(v2, v2);
                     SXTL_32(v2, v2);
                     SCVTFDD(v2, v2);

src/dynarec/arm64/dynarec_arm64_df.c

@@ -1,7 +1,6 @@
 #include <stdio.h>
 #include <stdlib.h>
 #include <stddef.h>
-#include <pthread.h>
 #include <errno.h>
 
 #include "debug.h"
@@ -34,6 +33,8 @@ uintptr_t dynarec64_DF(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
     int s0;
     int64_t j64;
     int64_t fixedaddress;
+    int unscaled;
+    int i1;
 
     MAYUSE(s0);
     MAYUSE(v2);
@@ -51,15 +52,24 @@ uintptr_t dynarec64_DF(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
         case 0xC7:
             INST_NAME("FFREEP STx");
             // not handling Tag...
-            x87_do_pop(dyn, ninst, x3);
+            X87_POP_OR_FAIL(dyn, ninst, x3);
             break;
 
         case 0xE0:
             INST_NAME("FNSTSW AX");
             LDRw_U12(x2, xEmu, offsetof(x64emu_t, top));
+            if(dyn->n.x87stack) {
+                if(dyn->n.x87stack>0) {
+                    SUBw_U12(x2, x2, dyn->n.x87stack);
+                } else {
+                    ADDw_U12(x2, x2, -dyn->n.x87stack);
+                }
+                ANDw_mask(x2, x2, 0, 2);  //mask=7
+            }
             LDRH_U12(x1, xEmu, offsetof(x64emu_t, sw));
             BFIw(x1, x2, 11, 3); // inject top
-            BFIw(xRAX, x1, 0, 16);
+            STRH_U12(x1, xEmu, offsetof(x64emu_t, sw));
+            BFIx(xRAX, x1, 0, 16);
             break;
         case 0xE8:
         case 0xE9:
@@ -80,7 +90,7 @@ uintptr_t dynarec64_DF(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                 FCMPD(v1, v2);
             }
             FCOMI(x1, x2);
-            x87_do_pop(dyn, ninst, x3);
+            X87_POP_OR_FAIL(dyn, ninst, x3);
             break;
         case 0xF0:
         case 0xF1:
@@ -101,7 +111,7 @@ uintptr_t dynarec64_DF(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                 FCMPD(v1, v2);
             }
             FCOMI(x1, x2);
-            x87_do_pop(dyn, ninst, x3);
+            X87_POP_OR_FAIL(dyn, ninst, x3);
             break;
 
         case 0xC8:
@@ -150,9 +160,9 @@ uintptr_t dynarec64_DF(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             switch((nextop>>3)&7) {
                 case 0:
                     INST_NAME("FILD ST0, Ew");
-                    v1 = x87_do_push(dyn, ninst, x1, NEON_CACHE_ST_F);
-                    addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, 0xfff<<1, 1, rex, NULL, 0, 0);
-                    LDRSHw_U12(x1, wback, fixedaddress);
+                    X87_PUSH_OR_FAIL(v1, dyn, ninst, x1, NEON_CACHE_ST_F);
+                    addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, &unscaled, 0xfff<<1, 1, rex, NULL, 0, 0);
+                    LDSHw(x1, wback, fixedaddress);
                     if(ST_IS_F(0)) {
                         SCVTFSw(v1, x1);
                     } else {
@@ -162,7 +172,7 @@ uintptr_t dynarec64_DF(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                 case 1:
                     INST_NAME("FISTTP Ew, ST0");
                     v1 = x87_get_st(dyn, ninst, x1, x2, 0, NEON_CACHE_ST_F);
-                    addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, 0xfff<<1, 1, rex, NULL, 0, 0);
+                    addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, &unscaled, 0xfff<<1, 1, rex, NULL, 0, 0);
                     ed = x1;
                     s0 = fpu_get_scratch(dyn);
                     #if 0
@@ -172,10 +182,11 @@ uintptr_t dynarec64_DF(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     VFCVTZSd(s0, s0);
                     SQXTN_S_D(s0, s0);
                     SQXTN_H_S(s0, s0);
-                    VSTR16_U12(s0, wback, fixedaddress);
+                    VST16(s0, wback, fixedaddress);
                     #else
                     MRS_fpsr(x5);
                     BFCw(x5, FPSR_IOC, 1);   // reset IOC bit
+                    BFCw(x5, FPSR_QC, 1);   // reset QC bit
                     MSR_fpsr(x5);
                     if(ST_IS_F(0)) {
                         VFCVTZSs(s0, v1);
@@ -183,21 +194,24 @@ uintptr_t dynarec64_DF(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                         VFCVTZSd(s0, v1);
                         SQXTN_S_D(s0, s0);
                     }
-                    SQXTN_H_S(s0, s0);
-                    VSTR16_U12(s0, wback, fixedaddress);
+                    VMOVSto(x3, s0, 0);
                     MRS_fpsr(x5);   // get back FPSR to check the IOC bit
-                    TBZ_MARK3(x5, FPSR_IOC);
-                    MOV32w(x5, 0x8000);
-                    STRH_U12(x5, wback, fixedaddress);
+                    TBNZ_MARK2(x5, FPSR_IOC);
+                    SXTHw(x5, x3);  // check if 16bits value is fine
+                    SUBw_REG(x5, x5, x3);
+                    CBZw_MARK3(x5);
+                    MARK2;
+                    MOV32w(x3, 0x8000);
                     MARK3;
+                    STH(x3, wback, fixedaddress);
                     #endif
-                    x87_do_pop(dyn, ninst, x3);
+                    X87_POP_OR_FAIL(dyn, ninst, x3);
                     break;
                 case 2:
                     INST_NAME("FIST Ew, ST0");
                     v1 = x87_get_st(dyn, ninst, x1, x2, 0, NEON_CACHE_ST_F);
                     u8 = x87_setround(dyn, ninst, x1, x2, x4);
-                    addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, 0xfff<<1, 1, rex, NULL, 0, 0);
+                    addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, &unscaled, 0xfff<<1, 1, rex, NULL, 0, 0);
                     ed = x1;
                     s0 = fpu_get_scratch(dyn);
                     #if 0
@@ -206,10 +220,11 @@ uintptr_t dynarec64_DF(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     VFCVTZSd(s0, s0);
                     SQXTN_S_D(s0, s0);
                     SQXTN_H_S(s0, s0);
-                    VSTR16_U12(s0, wback, fixedaddress);
+                    VST16(s0, wback, fixedaddress);
                     #else
                     MRS_fpsr(x5);
                     BFCw(x5, FPSR_IOC, 1);   // reset IOC bit
+                    BFCw(x5, FPSR_QC, 1);   // reset QC bit
                     MSR_fpsr(x5);
                     if(ST_IS_F(0)) {
                         FRINTXS(s0, v1);
@@ -219,13 +234,16 @@ uintptr_t dynarec64_DF(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                         VFCVTZSd(s0, s0);
                         SQXTN_S_D(s0, s0);
                     }
-                    SQXTN_H_S(s0, s0);
-                    VSTR16_U12(s0, wback, fixedaddress);
+                    VMOVSto(x3, s0, 0);
                     MRS_fpsr(x5);   // get back FPSR to check the IOC bit
-                    TBZ_MARK3(x5, FPSR_IOC);
-                    MOV32w(x5, 0x8000);
-                    STRH_U12(x5, wback, fixedaddress);
+                    TBNZ_MARK2(x5, FPSR_IOC);
+                    SXTHw(x5, x3);  // check if 16bits value is fine
+                    SUBw_REG(x5, x5, x3);
+                    CBZw_MARK3(x5);
+                    MARK2;
+                    MOV32w(x3, 0x8000);
                     MARK3;
+                    STH(x3, wback, fixedaddress);
                     #endif
                     x87_restoreround(dyn, ninst, u8);
                     break;
@@ -233,7 +251,7 @@ uintptr_t dynarec64_DF(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     INST_NAME("FISTP Ew, ST0");
                     v1 = x87_get_st(dyn, ninst, x1, x2, 0, NEON_CACHE_ST_F);
                     u8 = x87_setround(dyn, ninst, x1, x2, x4);
-                    addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, 0xfff<<1, 1, rex, NULL, 0, 0);
+                    addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, &unscaled, 0xfff<<1, 1, rex, NULL, 0, 0);
                     ed = x1;
                     s0 = fpu_get_scratch(dyn);
                     #if 0
@@ -242,7 +260,7 @@ uintptr_t dynarec64_DF(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     VFCVTZSd(s0, s0);
                     SQXTN_S_D(s0, s0);
                     SQXTN_H_S(s0, s0);
-                    VSTR16_U12(s0, wback, fixedaddress);
+                    VST16(s0, wback, fixedaddress);
                     #else
                     MRS_fpsr(x5);
                     BFCw(x5, FPSR_IOC, 1);   // reset IOC bit
@@ -255,65 +273,120 @@ uintptr_t dynarec64_DF(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                         VFCVTZSd(s0, s0);
                         SQXTN_S_D(s0, s0);
                     }
-                    SQXTN_H_S(s0, s0);
-                    VSTR16_U12(s0, wback, fixedaddress);
+                    VMOVSto(x3, s0, 0);
                     MRS_fpsr(x5);   // get back FPSR to check the IOC bit
-                    TBZ_MARK3(x5, FPSR_IOC);
-                    MOV32w(x5, 0x8000);
-                    STRH_U12(x5, wback, fixedaddress);
+                    TBNZ_MARK2(x5, FPSR_IOC);
+                    SXTHw(x5, x3);  // check if 16bits value is fine
+                    SUBw_REG(x5, x5, x3);
+                    CBZw_MARK3(x5);
+                    MARK2;
+                    MOV32w(x3, 0x8000);
                     MARK3;
+                    STH(x3, wback, fixedaddress);
                     #endif
-                    x87_do_pop(dyn, ninst, x3);
+                    X87_POP_OR_FAIL(dyn, ninst, x3);
                     x87_restoreround(dyn, ninst, u8);
                     break;
                 case 4:
                     INST_NAME("FBLD ST0, tbytes");
-                    x87_do_push_empty(dyn, ninst, x1);
-                    addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0, 0, rex, NULL, 0, 0);
+                    X87_PUSH_EMPTY_OR_FAIL(dyn, ninst, x1);
+                    addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, NULL, 0, 0, rex, NULL, 0, 0);
                     if(ed!=x1) {MOVx_REG(x1, ed);}
                     CALL(fpu_fbld, -1);
                     break;
                 case 5:
                     INST_NAME("FILD ST0, i64");
-                    v1 = x87_do_push(dyn, ninst, x1, NEON_CACHE_ST_D);
-                    addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, 0xfff<<3, 7, rex, NULL, 0, 0);
-                    LDRx_U12(x1, wback, fixedaddress);
-                    SCVTFDx(v1, x1);
+                    X87_PUSH_OR_FAIL(v1, dyn, ninst, x1, NEON_CACHE_ST_I64);
+                    addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, &unscaled, 0xfff<<3, 7, rex, NULL, 0, 0);
+                    VLD64(v1, wback, fixedaddress);
+                    if(!ST_IS_I64(0)) {
+                        if(rex.is32bits) {
+                            // need to also feed the STll stuff...
+                            ADDx_U12(x4, xEmu, offsetof(x64emu_t, fpu_ll));
+                            LDRw_U12(x1, xEmu, offsetof(x64emu_t, top));
+                            int a = 0 - dyn->n.x87stack;
+                            if(a) {
+                                if(a<0) {
+                                    SUBw_U12(x1, x1, -a);
+                                } else {
+                                    ADDw_U12(x1, x1, a);
+                                }
+                                ANDw_mask(x1, x1, 0, 2); //mask=7
+                            }
+                            ADDx_REG_LSL(x1, x4, x1, 4);    // fpu_ll is 2 i64
+                            VSTR64_U12(v1, x1, 8);  // ll
+                        }
+                        SCVTFDD(v1, v1);
+                        if(rex.is32bits) {
+                            VSTR64_U12(v1, x1, 0);  // ref
+                        }
+                    }
                     break;
                 case 6:
                     INST_NAME("FBSTP tbytes, ST0");
+                    i1 = x87_stackcount(dyn, ninst, x1);
                     x87_forget(dyn, ninst, x1, x2, 0);
-                    addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0, 0, rex, NULL, 0, 0);
+                    addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, NULL, 0, 0, rex, NULL, 0, 0);
                     if(ed!=x1) {MOVx_REG(x1, ed);}
                     CALL(fpu_fbst, -1);
-                    x87_do_pop(dyn, ninst, x3);
+                    x87_unstackcount(dyn, ninst, x1, i1);
+                    X87_POP_OR_FAIL(dyn, ninst, x3);
                     break;
                 case 7:
                     INST_NAME("FISTP i64, ST0");
-                    v1 = x87_get_st(dyn, ninst, x1, x2, 0, NEON_CACHE_ST_D);
-                    u8 = x87_setround(dyn, ninst, x1, x2, x4);
-                    addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, 0xfff<<3, 7, rex, NULL, 0, 0);
+                    v1 = x87_get_st(dyn, ninst, x1, x2, 0, NEON_CACHE_ST_I64);
+                    if(!ST_IS_I64(0)) {
+                        u8 = x87_setround(dyn, ninst, x1, x2, x4);
+                    }
+                    addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, &unscaled, 0xfff<<3, 7, rex, NULL, 0, 0);
                     ed = x1;
                     s0 = fpu_get_scratch(dyn);
-                    #if 0
-                    FRINT64XD(s0, v1);
-                    VFCVTZSd(s0, s0);
-                    VSTR64_U12(s0, wback, fixedaddress);
-                    #else
-                    MRS_fpsr(x5);
-                    BFCw(x5, FPSR_IOC, 1);   // reset IOC bit
-                    MSR_fpsr(x5);
-                    FRINTXD(s0, v1);
-                    VFCVTZSd(s0, s0);
-                    VSTR64_U12(s0, wback, fixedaddress);
-                    MRS_fpsr(x5);   // get back FPSR to check the IOC bit
-                    TBZ_MARK3(x5, FPSR_IOC);
-                    ORRx_mask(x5, xZR, 1, 1, 0);    //0x8000000000000000
-                    STRx_U12(x5, wback, fixedaddress);
-                    MARK3;
-                    #endif
-                    x87_restoreround(dyn, ninst, u8);
-                    x87_do_pop(dyn, ninst, x3);
+                    if(ST_IS_I64(0)) {
+                        VST64(v1, wback, fixedaddress);
+                    } else {
+                        #if 0
+                        FRINT64XD(s0, v1);
+                        VFCVTZSd(s0, s0);
+                        VSTR64_U12(s0, wback, fixedaddress);
+                        #else
+                        if(rex.is32bits) {
+                            // need to check STll first...
+                            ADDx_U12(x5, xEmu, offsetof(x64emu_t, fpu_ll));
+                            LDRw_U12(x1, xEmu, offsetof(x64emu_t, top));
+                            VMOVQDto(x3, v1, 0);
+                            int a = 0 - dyn->n.x87stack;
+                            if(a) {
+                                if(a<0) {
+                                    SUBw_U12(x1, x1, -a);
+                                } else {
+                                    ADDw_U12(x1, x1, a);
+                                }
+                                ANDw_mask(x1, x1, 0, 2); //mask=7
+                            }
+                            ADDx_REG_LSL(x1, x5, x1, 4);    // fpu_ll is 2 i64
+                            LDRx_U12(x5, x1, 0);  // ref
+                            SUBx_REG(x5, x5, x3);
+                            CBNZx_MARK2(x5);
+                            LDRx_U12(x5, x1, 8);  // ll
+                            STx(x5, wback, fixedaddress);
+                            B_MARK3(c__);
+                            MARK2;
+                        }
+                        MRS_fpsr(x5);
+                        BFCw(x5, FPSR_IOC, 1);   // reset IOC bit
+                        MSR_fpsr(x5);
+                        FRINTXD(s0, v1);
+                        VFCVTZSd(s0, s0);
+                        VST64(s0, wback, fixedaddress);
+                        MRS_fpsr(x5);   // get back FPSR to check the IOC bit
+                        TBZ_MARK3(x5, FPSR_IOC);
+                        ORRx_mask(x5, xZR, 1, 1, 0);    //0x8000000000000000
+                        STx(x5, wback, fixedaddress);
+                        MARK3;
+                        #endif
+                        x87_restoreround(dyn, ninst, u8);
+                    }
+                    X87_POP_OR_FAIL(dyn, ninst, x3);
                     break;
                 default:
                     DEFAULT;

src/dynarec/arm64/dynarec_arm64_emit_logic.c

@@ -1,7 +1,6 @@
 #include <stdio.h>
 #include <stdlib.h>
 #include <stddef.h>
-#include <pthread.h>
 #include <errno.h>
 
 #include "debug.h"
@@ -16,7 +15,6 @@
 #include "emu/x64run_private.h"
 #include "x64trace.h"
 #include "dynarec_native.h"
-#include "../tools/bridge_private.h"
 
 #include "arm64_printer.h"
 #include "dynarec_arm64_private.h"
@@ -232,15 +230,7 @@ void emit_or8(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4)
         MOV32w(s3, (1<<F_CF)|(1<<F_AF)|(1<<F_OF));
         BICw(xFlags, xFlags, s3);
     }
-    IFX(X_ZF) {
-        TSTw_REG(s1, s1);
-        CSETw(s3, cEQ);
-        BFIw(xFlags, s3, F_ZF, 1);
-    }
-    IFX(X_SF) {
-        LSRw(s3, s1, 7);
-        BFIw(xFlags, s3, F_SF, 1);
-    }
+    COMP_ZFSF(s1, 8)
     IFX(X_PF) {
         emit_pf(dyn, ninst, s1, s3, s4);
     }
@@ -263,15 +253,7 @@ void emit_or8c(dynarec_arm_t* dyn, int ninst, int s1, int32_t c, int s3, int s4)
         MOV32w(s3, (1<<F_CF)|(1<<F_AF)|(1<<F_OF));
         BICw(xFlags, xFlags, s3);
     }
-    IFX(X_ZF) {
-        TSTw_REG(s1, s1);
-        CSETw(s3, cEQ);
-        BFIw(xFlags, s3, F_ZF, 1);
-    }
-    IFX(X_SF) {
-        LSRw(s3, s1, 7);
-        BFIw(xFlags, s3, F_SF, 1);
-    }
+    COMP_ZFSF(s1, 8)
     IFX(X_PF) {
         emit_pf(dyn, ninst, s1, s3, s4);
     }
@@ -294,15 +276,7 @@ void emit_xor8(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4)
         MOV32w(s3, (1<<F_CF)|(1<<F_AF)|(1<<F_OF));
         BICw(xFlags, xFlags, s3);
     }
-    IFX(X_ZF) {
-        TSTw_REG(s1, s1);
-        CSETw(s3, cEQ);
-        BFIw(xFlags, s3, F_ZF, 1);
-    }
-    IFX(X_SF) {
-        LSRw(s3, s1, 7);
-        BFIw(xFlags, s3, F_SF, 1);
-    }
+    COMP_ZFSF(s1, 8)
     IFX(X_PF) {
         emit_pf(dyn, ninst, s1, s3, s4);
     }
@@ -325,15 +299,7 @@ void emit_xor8c(dynarec_arm_t* dyn, int ninst, int s1, int32_t c, int s3, int s4
         MOV32w(s3, (1<<F_CF)|(1<<F_AF)|(1<<F_OF));
         BICw(xFlags, xFlags, s3);
     }
-    IFX(X_ZF) {
-        TSTw_REG(s1, s1);
-        CSETw(s3, cEQ);
-        BFIw(xFlags, s3, F_ZF, 1);
-    }
-    IFX(X_SF) {
-        LSRw(s3, s1, 7);
-        BFIw(xFlags, s3, F_SF, 1);
-    }
+    COMP_ZFSF(s1, 8)
     IFX(X_PF) {
         emit_pf(dyn, ninst, s1, s3, s4);
     }
@@ -425,15 +391,7 @@ void emit_or16(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4)
         MOV32w(s3, (1<<F_CF)|(1<<F_AF)|(1<<F_OF));
         BICw(xFlags, xFlags, s3);
     }
-    IFX(X_ZF) {
-        ANDSw_mask(s1, s1, 0, 15);  //mask=0xffff
-        CSETw(s3, cEQ);
-        BFIw(xFlags, s3, F_ZF, 1);
-    }
-    IFX(X_SF) {
-        LSRw(s3, s1, 15);
-        BFIw(xFlags, s3, F_SF, 1);
-    }
+    COMP_ZFSF(s1, 16)
     IFX(X_PF) {
         emit_pf(dyn, ninst, s1, s3, s4);
     }
@@ -502,15 +460,7 @@ void emit_xor16(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4)
         MOV32w(s3, (1<<F_CF)|(1<<F_AF)|(1<<F_OF));
         BICw(xFlags, xFlags, s3);
     }
-    IFX(X_ZF) {
-        ANDSw_mask(s1, s1, 0, 15);  //mask=0xffff
-        CSETw(s3, cEQ);
-        BFIw(xFlags, s3, F_ZF, 1);
-    }
-    IFX(X_SF) {
-        LSRw(s3, s1, 15);
-        BFIw(xFlags, s3, F_SF, 1);
-    }
+    COMP_ZFSF(s1, 16)
     IFX(X_PF) {
         emit_pf(dyn, ninst, s1, s3, s4);
     }

src/dynarec/arm64/dynarec_arm64_emit_math.c

@@ -1,7 +1,6 @@
 #include <stdio.h>
 #include <stdlib.h>
 #include <stddef.h>
-#include <pthread.h>
 #include <errno.h>
 
 #include "debug.h"
@@ -16,7 +15,6 @@
 #include "emu/x64run_private.h"
 #include "x64trace.h"
 #include "dynarec_native.h"
-#include "../tools/bridge_private.h"
 
 #include "arm64_printer.h"
 #include "dynarec_arm64_private.h"
@@ -305,15 +303,7 @@ void emit_add8(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4)
     IFX(X_PEND) {
         STRH_U12(s1, xEmu, offsetof(x64emu_t, res));
     }
-    IFX(X_ZF) {
-        ANDSw_mask(s1, s1, 0, 7);   //mask=0xff
-        CSETw(s3, cEQ);
-        BFIw(xFlags, s3, F_ZF, 1);
-    }
-    IFX(X_SF) {
-        LSRw(s3, s1, 7);
-        BFIw(xFlags, s3, F_SF, 1);
-    }
+    COMP_ZFSF(s1, 8)
     IFX(X_PF) {
         emit_pf(dyn, ninst, s1, s3, s4);
     }
@@ -331,7 +321,7 @@ void emit_add8c(dynarec_arm_t* dyn, int ninst, int s1, int c, int s3, int s4)
         SET_DFNONE(s3);
     }
     IFX(X_AF | X_OF) {
-        if(X_PEND) {} else {MOV32w(s4, c&0xff);}
+        IFX(X_PEND) {} else {MOV32w(s4, c&0xff);}
         ORRw_REG(s3, s1, s4);       // s3 = op1 | op2
         ANDw_REG(s4, s1, s4);       // s4 = op1 & op2
     }
@@ -357,15 +347,7 @@ void emit_add8c(dynarec_arm_t* dyn, int ninst, int s1, int c, int s3, int s4)
     IFX(X_PEND) {
         STRH_U12(s1, xEmu, offsetof(x64emu_t, res));
     }
-    IFX(X_ZF) {
-        ANDSw_mask(s1, s1, 0, 0b000111);    //mask=000000ff
-        CSETw(s3, cEQ);
-        BFIw(xFlags, s3, F_ZF, 1);
-    }
-    IFX(X_SF) {
-        LSRw(s3, s1, 7);
-        BFIw(xFlags, s3, F_SF, 1);
-    }
+    COMP_ZFSF(s1, 8)
     IFX(X_PF) {
         emit_pf(dyn, ninst, s1, s3, s4);
     }
@@ -409,15 +391,7 @@ void emit_sub8(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4)
             BFIw(xFlags, s4, F_OF, 1);    // OF: ((bc >> 6) ^ ((bc>>6)>>1)) & 1
         }
     }
-    IFX(X_ZF) {
-        ANDSw_mask(s1, s1, 0, 7);   //mask=0xff
-        CSETw(s3, cEQ);
-        BFIw(xFlags, s3, F_ZF, 1);
-    }
-    IFX(X_SF) {
-        LSRw(s3, s1, 7);
-        BFIw(xFlags, s3, F_SF, 1);
-    }
+    COMP_ZFSF(s1, 8)
     IFX(X_PF) {
         emit_pf(dyn, ninst, s1, s3, s4);
     }
@@ -432,7 +406,7 @@ void emit_sub8c(dynarec_arm_t* dyn, int ninst, int s1, int c, int s3, int s4, in
     }
     IFX(X_PEND) {
         STRB_U12(s1, xEmu, offsetof(x64emu_t, op1));
-        STRB_U12(s3, xEmu, offsetof(x64emu_t, op2));
+        STRB_U12(s5, xEmu, offsetof(x64emu_t, op2));
         SET_DF(s3, d_sub8);
     } else IFX(X_ALL) {
         SET_DFNONE(s3);
@@ -467,15 +441,7 @@ void emit_sub8c(dynarec_arm_t* dyn, int ninst, int s1, int c, int s3, int s4, in
             BFIw(xFlags, s4, F_OF, 1);    // OF: ((bc >> 6) ^ ((bc>>6)>>1)) & 1
         }
     }
-    IFX(X_ZF) {
-        ANDSw_mask(s1, s1, 0, 0b000111);    //mask=000000ff
-        CSETw(s3, cEQ);
-        BFIw(xFlags, s3, F_ZF, 1);
-    }
-    IFX(X_SF) {
-        LSRw(s3, s1, 7);
-        BFIw(xFlags, s3, F_SF, 1);
-    }
+    COMP_ZFSF(s1, 8)
     IFX(X_PF) {
         emit_pf(dyn, ninst, s1, s3, s4);
     }
@@ -518,15 +484,7 @@ void emit_add16(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4)
     IFX(X_PEND) {
         STRw_U12(s1, xEmu, offsetof(x64emu_t, res));
     }
-    IFX(X_ZF) {
-        ANDSw_mask(s1, s1, 0, 15);  //mask=0xffff
-        CSETw(s3, cEQ);
-        BFIw(xFlags, s3, F_ZF, 1);
-    }
-    IFX(X_SF) {
-        LSRw(s3, s1, 15);
-        BFIw(xFlags, s3, F_SF, 1);
-    }
+    COMP_ZFSF(s1, 16)
     IFX(X_PF) {
         emit_pf(dyn, ninst, s1, s3, s4);
     }
@@ -636,15 +594,7 @@ void emit_sub16(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4)
             BFIw(xFlags, s4, F_OF, 1);    // OF: ((bc >> 14) ^ ((bc>>14)>>1)) & 1
         }
     }
-    IFX(X_ZF) {
-        ANDSw_mask(s1, s1, 0, 15);  //mask=0xffff
-        CSETw(s3, cEQ);
-        BFIw(xFlags, s3, F_ZF, 1);
-    }
-    IFX(X_SF) {
-        LSRw(s3, s1, 15);
-        BFIw(xFlags, s3, F_SF, 1);
-    }
+    COMP_ZFSF(s1, 16)
     IFX(X_PF) {
         emit_pf(dyn, ninst, s1, s3, s4);
     }
@@ -794,16 +744,7 @@ void emit_inc8(dynarec_arm_t* dyn, int ninst, int s1, int s3, int s4)
             BFIw(xFlags, s4, F_OF, 1);    // OF: ((bc >> 6) ^ ((bc>>6)>>1)) & 1
         }
     }
-
-    IFX(X_ZF) {
-        ANDSw_mask(s1, s1, 0, 7);   //mask=0xff
-        CSETw(s3, cEQ);
-        BFIw(xFlags, s3, F_ZF, 1);
-    }
-    IFX(X_SF) {
-        LSRw(s3, s1, 7);
-        BFIw(xFlags, s3, F_SF, 1);
-    }
+    COMP_ZFSF(s1, 8)
     IFX(X_PF) {
         emit_pf(dyn, ninst, s1, s3, s4);
     }
@@ -840,15 +781,7 @@ void emit_inc16(dynarec_arm_t* dyn, int ninst, int s1, int s3, int s4)
             BFIw(xFlags, s4, F_OF, 1);    // OF: ((bc >> 14) ^ ((bc>>14)>>1)) & 1
         }
     }
-    IFX(X_ZF) {
-        TSTw_mask(s1, 0, 0b001111); // mask=0xffff
-        CSETw(s3, cEQ);
-        BFIw(xFlags, s3, F_ZF, 1);
-    }
-    IFX(X_SF) {
-        LSRw(s3, s1, 15);
-        BFIw(xFlags, s3, F_SF, 1);
-    }
+    COMP_ZFSF(s1, 16)
     IFX(X_PF) {
         emit_pf(dyn, ninst, s1, s3, s4);
     }
@@ -908,7 +841,7 @@ void emit_dec32(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int s3, int s4
 void emit_dec8(dynarec_arm_t* dyn, int ninst, int s1, int s3, int s4)
 {
     IFX(X_PEND) {
-        STRB_U12(s3, xEmu, offsetof(x64emu_t, op2));
+        STRB_U12(s1, xEmu, offsetof(x64emu_t, op1));
         SET_DF(s3, d_dec8);
     } else IFX(X_ZF|X_OF|X_AF|X_SF|X_PF) {
         SET_DFNONE(s3);
@@ -1164,15 +1097,7 @@ void emit_adc8(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4)
         LSRw(s3, s1, 8);
         BFIw(xFlags, s3, F_CF, 1);
     }
-    IFX(X_ZF) {
-        ANDSw_mask(s1, s1, 0, 7);   //mask=0xff
-        CSETw(s3, cEQ);
-        BFIw(xFlags, s3, F_ZF, 1);
-    }
-    IFX(X_SF) {
-        LSRw(s3, s1, 7);
-        BFIw(xFlags, s3, F_SF, 1);
-    }
+    COMP_ZFSF(s1, 8)
     IFX(X_PF) {
         emit_pf(dyn, ninst, s1, s3, s4);
     }
@@ -1226,15 +1151,7 @@ void emit_adc16(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4)
         LSRw(s3, s1, 16);
         BFIw(xFlags, s3, F_CF, 1);
     }
-    IFX(X_ZF) {
-        ANDSw_mask(s1, s1, 0, 15);   //mask=0xffff
-        CSETw(s3, cEQ);
-        BFIw(xFlags, s3, F_ZF, 1);
-    }
-    IFX(X_SF) {
-        LSRw(s3, s1, 15);
-        BFIw(xFlags, s3, F_SF, 1);
-    }
+    COMP_ZFSF(s1, 16)
     IFX(X_PF) {
         emit_pf(dyn, ninst, s1, s3, s4);
     }
@@ -1476,15 +1393,7 @@ void emit_sbb8(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4)
             BFIw(xFlags, s4, F_OF, 1);    // OF: ((bc >> 6) ^ ((bc>>6)>>1)) & 1
         }
     }
-    IFX(X_ZF) {
-        ANDSw_mask(s1, s1, 0, 7);   //mask=0xff
-        CSETw(s3, cEQ);
-        BFIw(xFlags, s3, F_ZF, 1);
-    }
-    IFX(X_SF) {
-        LSRw(s3, s1, 7);
-        BFIw(xFlags, s3, F_SF, 1);
-    }
+    COMP_ZFSF(s1, 8)
     IFX(X_PF) {
         emit_pf(dyn, ninst, s1, s3, s4);
     }
@@ -1539,15 +1448,7 @@ void emit_sbb16(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4)
             BFIw(xFlags, s4, F_OF, 1);    // OF: ((bc >> 14) ^ ((bc>>14)>>1)) & 1
         }
     }
-    IFX(X_ZF) {
-        ANDSw_mask(s1, s1, 0, 15);  //mask=0xffff
-        CSETw(s3, cEQ);
-        BFIw(xFlags, s3, F_ZF, 1);
-    }
-    IFX(X_SF) {
-        LSRw(s3, s1, 15);
-        BFIw(xFlags, s3, F_SF, 1);
-    }
+    COMP_ZFSF(s1, 16)
     IFX(X_PF) {
         emit_pf(dyn, ninst, s1, s3, s4);
     }
@@ -1734,10 +1635,9 @@ void emit_neg8(dynarec_arm_t* dyn, int ninst, int s1, int s3, int s4)
     IFX(X_AF|X_OF) {
         MOVw_REG(s3, s1);
     }
+    NEGw_REG(s1, s1);
     IFX(X_ZF) {
-        NEGSw_REG(s1, s1);
-    } else {
-        NEGw_REG(s1, s1);
+        ANDSw_mask(s1, s1, 0, 7);   // mask 0xff
     }
     IFX(X_PEND) {
         STRB_U12(s1, xEmu, offsetof(x64emu_t, res));

src/dynarec/arm64/dynarec_arm64_emit_tests.c

@@ -1,7 +1,6 @@
 #include <stdio.h>
 #include <stdlib.h>
 #include <stddef.h>
-#include <pthread.h>
 #include <errno.h>
 
 #include "debug.h"
@@ -16,7 +15,6 @@
 #include "emu/x64run_private.h"
 #include "x64trace.h"
 #include "dynarec_native.h"
-#include "../tools/bridge_private.h"
 
 #include "arm64_printer.h"
 #include "dynarec_arm64_private.h"
@@ -113,22 +111,11 @@ void emit_cmp16(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4, i
     } else {
         SET_DFNONE(s3);
     }
-    IFX(X_ZF) {
-        SUBSw_REG(s5, s1, s2);   // res = s1 - s2
-    } else {
-        SUBw_REG(s5, s1, s2);   // res = s1 - s2
-    }
+    SUBw_REG(s5, s1, s2);   // res = s1 - s2
     IFX_PENDOR0 {
         STRH_U12(s5, xEmu, offsetof(x64emu_t, res));
     }
-    IFX(X_ZF) {
-        CSETw(s3, cEQ);
-        BFIw(xFlags, s3, F_ZF, 1);
-    }
-    IFX(X_SF) {
-        LSRw(s4, s5, 15);
-        BFIw(xFlags, s4, F_SF, 1);
-    }
+    COMP_ZFSF(s5, 16)
     // bc = (res & (~d | s)) | (~d & s)
     IFX(X_CF|X_AF|X_OF) {
         MVNw_REG(s4, s1);        // s4 = ~d
@@ -172,15 +159,7 @@ void emit_cmp16_0(dynarec_arm_t* dyn, int ninst, int s1, int s3, int s4)
         MOV32w(s3, (1<<F_CF)|(1<<F_AF)|(1<<F_OF));
         BICw(xFlags, xFlags, s3);
     }
-    IFX(X_ZF) {
-        ANDSw_mask(s1, s1, 0, 15);  //mask=0xffff
-        CSETw(s3, cEQ);
-        BFIw(xFlags, s3, F_ZF, 1);
-    }
-    IFX(X_SF) {
-        LSRw(s4, s1, 15);
-        BFIw(xFlags, s4, F_SF, 1);
-    }
+    COMP_ZFSF(s1, 16)
     IFX(X_PF) {
         emit_pf(dyn, ninst, s1, s3, s4);
     }
@@ -196,22 +175,11 @@ void emit_cmp8(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4, in
     } else {
         SET_DFNONE(s4);
     }
-    IFX(X_ZF) {
-        SUBSw_REG(s5, s1, s2);   // res = s1 - s2
-    } else {
-        SUBw_REG(s5, s1, s2);   // res = s1 - s2
-    }
+    SUBw_REG(s5, s1, s2);   // res = s1 - s2
     IFX_PENDOR0 {
         STRB_U12(s5, xEmu, offsetof(x64emu_t, res));
     }
-    IFX(X_ZF) {
-        CSETw(s3, cEQ);
-        BFIw(xFlags, s3, F_ZF, 1);
-    }
-    IFX(X_SF) {
-        LSRw(s3, s5, 7);
-        BFIw(xFlags, s3, F_SF, 1);
-    }
+    COMP_ZFSF(s5, 8)
     // bc = (res & (~d | s)) | (~d & s)
     IFX(X_CF|X_AF|X_OF) {
         ORNw_REG(s4, s2, s1);   // s4 = ~d | s
@@ -253,22 +221,14 @@ void emit_cmp8_0(dynarec_arm_t* dyn, int ninst, int s1, int s3, int s4)
         MOV32w(s3, (1<<F_CF)|(1<<F_AF)|(1<<F_OF));
         BICw(xFlags, xFlags, s3);
     }
-    IFX(X_ZF) {
-        ANDSw_mask(s1, s1, 0, 0b000111);    //mask=000000ff
-        CSETw(s3, cEQ);
-        BFIw(xFlags, s3, F_ZF, 1);
-    }
-    IFX(X_SF) {
-        LSRw(s3, s1, 7);
-        BFIw(xFlags, s3, F_SF, 1);
-    }
+    COMP_ZFSF(s1, 8)
     IFX(X_PF) {
         emit_pf(dyn, ninst, s1, s3, s4);
     }
 }
 
-// emit TEST32 instruction, from test s1, s2, using s3 and s4 as scratch
-void emit_test32(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int s2, int s3, int s4)
+// emit TEST32 instruction, from test s1, s2, using s3, s4 and s5 as scratch
+void emit_test32(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int s2, int s3, int s4, int s5)
 {
     MAYUSE(s1); MAYUSE(s2); MAYUSE(s3); MAYUSE(s4);
     IFX_PENDOR0 {
@@ -294,18 +254,11 @@ void emit_test32(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int s2, int s
     }
     // PF: (((emu->x64emu_parity_tab[(res) / 32] >> ((res) % 32)) & 1) == 0)
     IFX(X_PF) {
-        ANDw_mask(s3, s3, 0b011011, 0b000010); // 0xE0
-        LSRw(s3, s3, 5);
-        MOV64x(s4, (uintptr_t)GetParityTab());
-        LDRw_REG_LSL2(s4, s4, s3);
-        ANDw_mask(s3, s1, 0, 0b000100);   // 0x1f
-        LSRw_REG(s4, s4, s3);
-        MVNx_REG(s4, s4);
-        BFIw(xFlags, s4, F_PF, 1);
+        emit_pf(dyn, ninst, s3, s4, s5);
     }
 }
 
-// emit TEST16 instruction, from test s1, s2, using s3 and s4 as scratch
+// emit TEST16 instruction, from test s1, s2, using s3, s4 and s5 as scratch
 void emit_test16(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4, int s5)
 {
     MAYUSE(s1); MAYUSE(s2);
@@ -336,7 +289,7 @@ void emit_test16(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4,
     }
 }
 
-// emit TEST8 instruction, from test s1, s2, using s3 and s4 as scratch
+// emit TEST8 instruction, from test s1, s2, using s3, s4 and s5 as scratch
 void emit_test8(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4, int s5)
 {
     MAYUSE(s1); MAYUSE(s2);

src/dynarec/arm64/dynarec_arm64_f20f.c

@@ -1,7 +1,6 @@
 #include <stdio.h>
 #include <stdlib.h>
 #include <stddef.h>
-#include <pthread.h>
 #include <errno.h>
 
 #include "debug.h"
@@ -29,13 +28,14 @@ uintptr_t dynarec64_F20F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
     uint8_t opcode = F8;
     uint8_t nextop;
     uint8_t gd, ed;
-    uint8_t wback;
+    uint8_t wback, wb1, wb2;
     uint8_t u8;
     uint64_t u64, j64;
     int v0, v1;
     int q0;
     int d0, d1;
     int64_t fixedaddress;
+    int unscaled;
 
     MAYUSE(d0);
     MAYUSE(d1);
@@ -57,8 +57,8 @@ uintptr_t dynarec64_F20F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
             } else {
                 SMREAD();
                 v0 = sse_get_reg_empty(dyn, ninst, x1, gd);
-                addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0xfff<<3, 7, rex, NULL, 0, 0);
-                VLDR64_U12(v0, ed, fixedaddress); // upper part reseted
+                addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, &unscaled, 0xfff<<3, 7, rex, NULL, 0, 0);
+                VLD64(v0, ed, fixedaddress); // upper part reseted
             }
             break;
         case 0x11:
@@ -71,8 +71,8 @@ uintptr_t dynarec64_F20F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
                 d0 = sse_get_reg(dyn, ninst, x1, ed, 1);
                 VMOVeD(d0, 0, v0, 0);
             } else {
-                addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0xfff<<3, 7, rex, NULL, 0, 0);
-                VSTR64_U12(v0, ed, fixedaddress);
+                addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, &unscaled, 0xfff<<3, 7, rex, NULL, 0, 0);
+                VST64(v0, ed, fixedaddress);
                 SMWRITE2();
             }
             break;
@@ -87,8 +87,8 @@ uintptr_t dynarec64_F20F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
             } else {
                 SMREAD();
                 v0 = sse_get_reg_empty(dyn, ninst, x1, gd);
-                addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0xfff<<3, 7, rex, NULL, 0, 0);
-                VLDR64_U12(v0, ed, fixedaddress);
+                addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, &unscaled, 0xfff<<3, 7, rex, NULL, 0, 0);
+                VLD64(v0, ed, fixedaddress);
             }
             VMOVeD(v0, 1, v0, 0);
             break;
@@ -154,6 +154,53 @@ uintptr_t dynarec64_F20F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
             }
             break;
 
+        case 0x38:  // these are some more SSSE4.2+ opcodes
+            opcode = F8;
+            switch(opcode) {
+
+                case 0xF0:
+                    INST_NAME("CRC32 Gd, Eb");
+                    nextop = F8;
+                    GETEB(x1, 0);
+                    GETGD;
+                    if(arm64_crc32) {
+                        CRC32CB(gd, gd, ed);
+                    } else {
+                        EORw_REG(gd, gd, ed);
+                        MOV32w(x2, 0x82f63b78);
+                        for(int i=0; i<8; ++i) {
+                            LSRw_IMM((i&1)?gd:x4, (i&1)?x4:gd, 1);
+                            TBZ((i&1)?x4:gd, 0, 4+4);
+                            EORw_REG((i&1)?gd:x4, (i&1)?gd:x4, x2);
+                        }
+                    }
+                    break;
+                case 0xF1:
+                    INST_NAME("CRC32 Gd, Ed");
+                    nextop = F8;
+                    GETED(0);
+                    GETGD;
+                    if(arm64_crc32) {
+                        CRC32Cxw(gd, gd, ed);
+                    } else {
+                        MOV32w(x2, 0x82f63b78);
+                        for(int j=0; j<4*(1+rex.w); ++j) {
+                            UBFXxw(x3, ed, 8*j, 8);
+                            EORw_REG(gd, gd, x3);
+                            for(int i=0; i<8; ++i) {
+                                LSRw_IMM((i&1)?gd:x4, (i&1)?x4:gd, 1);
+                                TBZ((i&1)?x4:gd, 0, 4+4);
+                                EORw_REG((i&1)?gd:x4, (i&1)?gd:x4, x2);
+                            }
+                        }
+                    }
+                    break;
+
+                default:
+                    DEFAULT;
+            }
+            break;
+
 
         case 0x51:
             INST_NAME("SQRTSD Gx, Ex");
@@ -261,7 +308,7 @@ uintptr_t dynarec64_F20F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
             VMOVeD(v0, 0, d0, 0);   // to not erase uper part
             #else
             FCMPD(v0, v1);
-            B_NEXT(cLS);    //Less than or equal
+            B_NEXT(cCC);    //Less than
             VMOVeD(v0, 0, v1, 0);   // to not erase uper part
             #endif
             break;
@@ -299,7 +346,7 @@ uintptr_t dynarec64_F20F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
             VMOVeD(v0, 0, d0, 0);   // to not erase uper part
             #else
             FCMPD(v0, v1);
-            B_NEXT(cGE);    //Greater than or equal
+            B_NEXT(cGT);    //Greater than
             VMOVeD(v0, 0, v1, 0);   // to not erase uper part
             #endif
             break;
@@ -334,13 +381,28 @@ uintptr_t dynarec64_F20F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
             if(MODREG) {
                 v1 = sse_get_reg(dyn, ninst, x1, (nextop&7)+(rex.b<<3), 0);
             } else {
-                addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0xfff<<4, 15, rex, NULL, 0, 0);
+                addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, &unscaled, 0xfff<<4, 15, rex, NULL, 0, 0);
                 v1 = fpu_get_scratch(dyn);
-                VLDR128_U12(v1, ed, fixedaddress);
+                VLD128(v1, ed, fixedaddress);
             }
             VFADDPQS(v0, v0, v1);
             break;
-            
+        case 0x7D:
+            INST_NAME("HSUBPS Gx, Ex");
+            nextop = F8;
+            GETGX(v0, 1);
+            if(MODREG) {
+                v1 = sse_get_reg(dyn, ninst, x1, (nextop&7)+(rex.b<<3), 0);
+            } else {
+                addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, &unscaled, 0xfff<<4, 15, rex, NULL, 0, 0);
+                v1 = fpu_get_scratch(dyn);
+                VLD128(v1, ed, fixedaddress);
+            }
+            d0 = fpu_get_scratch(dyn);
+            VUZP1Q_32(d0, v0, v1);
+            VUZP2Q_32(v0, v0, v1);
+            VFSUBQS(v0, d0, v0);
+            break;
         case 0xC2:
             INST_NAME("CMPSD Gx, Ex, Ib");
             nextop = F8;
@@ -365,7 +427,7 @@ uintptr_t dynarec64_F20F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
             INST_NAME("ADDSUBPS Gx, Ex");
             nextop = F8;
             GETGX(v0, 1);
-            GETEXSD(v1, 0, 0);
+            GETEX(v1, 0, 0);
             q0 = fpu_get_scratch(dyn);
             static float addsubps[4] = {-1.f, 1.f, -1.f, 1.f};
             MAYUSE(addsubps);
@@ -385,13 +447,39 @@ uintptr_t dynarec64_F20F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
         case 0xE6:
             INST_NAME("CVTPD2DQ Gx, Ex");
             nextop = F8;
-            GETEXSD(v1, 0, 0);
+            GETEX(v1, 0, 0);
             GETGX_empty(v0);
-            u8 = sse_setround(dyn, ninst, x1, x2, x3);
-            VFRINTIDQ(v0, v1);
-            x87_restoreround(dyn, ninst, u8);
-            VFCVTNSQD(v0, v0);  // convert double -> int64
-            SQXTN_32(v0, v0);   // convert int64 -> int32 with saturation in lower part, RaZ high part
+            if(box64_dynarec_fastround) {
+                u8 = sse_setround(dyn, ninst, x1, x2, x3);
+                VFRINTIDQ(v0, v1);
+                x87_restoreround(dyn, ninst, u8);
+                VFCVTNSQD(v0, v0);  // convert double -> int64
+                SQXTN_32(v0, v0);   // convert int64 -> int32 with saturation in lower part, RaZ high part
+            } else {
+                u8 = sse_setround(dyn, ninst, x1, x2, x3);
+                MRS_fpsr(x5);
+                BFCw(x5, FPSR_IOC, 1);   // reset IOC bit
+                MSR_fpsr(x5);
+                ORRw_mask(x4, xZR, 1, 0);    //0x80000000
+                d0 = fpu_get_scratch(dyn);
+                for(int i=0; i<2; ++i) {
+                    BFCw(x5, FPSR_IOC, 1);   // reset IOC bit
+                    MSR_fpsr(x5);
+                    if(i) {
+                        VMOVeD(d0, 0, v1, i);
+                        FRINTID(d0, d0);
+                    } else {
+                        FRINTID(d0, v1);
+                    }
+                    FCVTZSwD(x1, d0);
+                    MRS_fpsr(x5);   // get back FPSR to check the IOC bit
+                    TBZ(x5, FPSR_IOC, 4+4);
+                    MOVw_REG(x1, x4);
+                    VMOVQSfrom(v0, i, x1);
+                }
+                x87_restoreround(dyn, ninst, u8);
+                VMOVQDfrom(v0, 1, xZR);
+            }
             break;
 
         case 0xF0:
@@ -405,8 +493,8 @@ uintptr_t dynarec64_F20F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
             } else {
                 v0 = sse_get_reg_empty(dyn, ninst, x1, gd);
                 SMREAD();
-                addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0xfff<<4, 7, rex, NULL, 0, 0);
-                VLDR128_U12(v0, ed, fixedaddress);
+                addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, &unscaled, 0xfff<<4, 7, rex, NULL, 0, 0);
+                VLD128(v0, ed, fixedaddress);
             }
             break;
 

src/dynarec/arm64/dynarec_arm64_f30f.c

@@ -1,7 +1,6 @@
 #include <stdio.h>
 #include <stdlib.h>
 #include <stddef.h>
-#include <pthread.h>
 #include <errno.h>
 
 #include "debug.h"
@@ -35,6 +34,7 @@ uintptr_t dynarec64_F30F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
     int q0, q1;
     int d0, d1;
     int64_t fixedaddress;
+    int unscaled;
     int64_t j64;
 
     MAYUSE(d0);
@@ -58,8 +58,8 @@ uintptr_t dynarec64_F30F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
             } else {
                 v0 = sse_get_reg_empty(dyn, ninst, x1, gd);
                 SMREAD();
-                addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0xfff<<2, 3, rex, NULL, 0, 0);
-                VLDR32_U12(v0, ed, fixedaddress);
+                addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, &unscaled, 0xfff<<2, 3, rex, NULL, 0, 0);
+                VLD32(v0, ed, fixedaddress);
             }
             break;
         case 0x11:
@@ -71,8 +71,8 @@ uintptr_t dynarec64_F30F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
                 q0 = sse_get_reg(dyn, ninst, x1, (nextop&7) + (rex.b<<3), 1);
                 VMOVeS(q0, 0, v0, 0);
             } else {
-                addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0xfff<<2, 3, rex, NULL, 0, 0);
-                VSTR32_U12(v0, ed, fixedaddress);
+                addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, &unscaled, 0xfff<<2, 3, rex, NULL, 0, 0);
+                VST32(v0, ed, fixedaddress);
                 SMWRITE2();
             }
             break;
@@ -83,9 +83,9 @@ uintptr_t dynarec64_F30F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
                 q1 = sse_get_reg(dyn, ninst, x1, (nextop&7)+(rex.b<<3), 0);
             } else {
                 SMREAD();
-                addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0xfff<<4, 15, rex, NULL, 0, 0);
+                addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, &unscaled, 0xfff<<4, 15, rex, NULL, 0, 0);
                 q1 = fpu_get_scratch(dyn);
-                VLDR128_U12(q1, ed, fixedaddress);
+                VLD128(q1, ed, fixedaddress);
             }
             GETGX_empty(q0);
             VTRNQ1_32(q0, q1, q1);
@@ -98,9 +98,9 @@ uintptr_t dynarec64_F30F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
                 q1 = sse_get_reg(dyn, ninst, x1, (nextop&7)+(rex.b<<3), 0);
             } else {
                 SMREAD();
-                addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0xfff<<4, 15, rex, NULL, 0, 0);
+                addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, &unscaled, 0xfff<<4, 15, rex, NULL, 0, 0);
                 q1 = fpu_get_scratch(dyn);
-                VLDR128_U12(q1, ed, fixedaddress);
+                VLD128(q1, ed, fixedaddress);
             }
             GETGX_empty(q0);
             VTRNQ2_32(q0, q1, q1);
@@ -143,7 +143,7 @@ uintptr_t dynarec64_F30F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
                 if(rex.w) {
                     ORRx_mask(gd, xZR, 1, 1, 0);    //0x8000000000000000
                 } else {
-                    MOV32w(gd, 0x80000000);
+                    ORRw_mask(gd, xZR, 1, 0);    //0x80000000
                 }
             }
             break;
@@ -168,7 +168,7 @@ uintptr_t dynarec64_F30F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
                 if(rex.w) {
                     ORRx_mask(gd, xZR, 1, 1, 0);    //0x8000000000000000
                 } else {
-                    MOV32w(gd, 0x80000000);
+                    ORRw_mask(gd, xZR, 1, 0);    //0x80000000
                 }
             }
             break;
@@ -239,9 +239,27 @@ uintptr_t dynarec64_F30F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
         case 0x5B:
             INST_NAME("CVTTPS2DQ Gx, Ex");
             nextop = F8;
-            GETEX(d0, 0, 0) ;
+            GETEX(v1, 0, 0) ;
             GETGX_empty(v0);
-            VFCVTZSQS(v0, d0);
+            if(box64_dynarec_fastround) {
+                VFCVTZSQS(v0, v1);
+            } else {
+                MRS_fpsr(x5);
+                BFCw(x5, FPSR_IOC, 1);   // reset IOC bit
+                MSR_fpsr(x5);
+                ORRw_mask(x4, xZR, 1, 0);    //0x80000000
+                d0 = fpu_get_scratch(dyn);
+                for(int i=0; i<4; ++i) {
+                    BFCw(x5, FPSR_IOC, 1);   // reset IOC bit
+                    MSR_fpsr(x5);
+                    VMOVeS(d0, 0, v1, i);
+                    VFCVTZSs(d0, d0);
+                    MRS_fpsr(x5);   // get back FPSR to check the IOC bit
+                    TBZ(x5, FPSR_IOC, 4+4);
+                    VMOVQSfrom(d0, 0, x4);
+                    VMOVeS(v0, i, d0, 0);
+                }
+            }
             break;
 
         case 0x5C:
@@ -305,8 +323,8 @@ uintptr_t dynarec64_F30F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
             } else {
                 GETGX_empty(v0);
                 SMREAD();
-                addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0xfff<<4, 15, rex, NULL, 0, 0);
-                VLDR128_U12(v0, ed, fixedaddress);
+                addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, &unscaled, 0xfff<<4, 15, rex, NULL, 0, 0);
+                VLD128(v0, ed, fixedaddress);
             }
             break;
         case 0x70:
@@ -341,8 +359,8 @@ uintptr_t dynarec64_F30F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
             } else {
                 GETGX_empty(v0);
                 SMREAD();
-                addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0xfff<<3, 7, rex, NULL, 0, 0);
-                VLDR64_U12(v0, ed, fixedaddress);
+                addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, &unscaled, 0xfff<<3, 7, rex, NULL, 0, 0);
+                VLD64(v0, ed, fixedaddress);
             }
             break;
         case 0x7F:
@@ -353,12 +371,48 @@ uintptr_t dynarec64_F30F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
                 v1 = sse_get_reg_empty(dyn, ninst, x1, (nextop&7) + (rex.b<<3));
                 VMOVQ(v1, v0);
             } else {
-                addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0xfff<<4, 15, rex, NULL, 0, 0);
-                VSTR128_U12(v0, ed, fixedaddress);
+                addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, &unscaled, 0xfff<<4, 15, rex, NULL, 0, 0);
+                VST128(v0, ed, fixedaddress);
                 SMWRITE2();
             }
             break;
 
+        case 0xB8:
+            INST_NAME("POPCNT Gd, Ed");
+            SETFLAGS(X_ALL, SF_SET);
+            SET_DFNONE(x1);
+            nextop = F8;
+            v1 = fpu_get_scratch(dyn);
+            GETGD;
+            if(MODREG) {
+                GETED(0);
+                if(rex.w)
+                    VMOVQDfrom(v1, 0, ed);
+                else {
+                    MOVxw_REG(x1, ed);  // need to clear uper part
+                    VMOVQDfrom(v1, 0, x1);
+                }
+            } else {
+                if(rex.w) {
+                    SMREAD();
+                    addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, &unscaled, 0xfff<<3, 7, rex, NULL, 0, 0);
+                    VLD64(v1, ed, fixedaddress);
+                } else {
+                    GETED(0);   // just load and clear the upper part
+                    VMOVQDfrom(v1, 0, ed);
+                }
+            }
+            CNT_8(v1, v1);
+            UADDLV_8(v1, v1);
+            VMOVQDto(gd, v1, 0);
+            IFX(X_ALL) {
+                MOV32w(x1, (1<<F_OF) | (1<<F_SF) | (1<<F_ZF) | (1<<F_AF) | (1<<F_CF) | (1<<F_PF));
+                BICw(xFlags, xFlags, x1);
+                CBNZx(gd, 4+4);
+                BFIw(xFlags, xFlags, F_ZF, 1);
+            }
+            break;
+
         case 0xBC:
             INST_NAME("TZCNT Gd, Ed");
             SETFLAGS(X_CF|X_ZF, SF_SUBSET);
@@ -421,8 +475,8 @@ uintptr_t dynarec64_F30F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
                 VMOV(v0, v1);
             } else {
                 SMREAD();
-                addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0xfff<<3, 7, rex, NULL, 0, 0);
-                VLDR64_U12(v0, ed, fixedaddress);
+                addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, &unscaled, 0xfff<<3, 7, rex, NULL, 0, 0);
+                VLD64(v0, ed, fixedaddress);
             }
             break;
 

src/dynarec/arm64/dynarec_arm64_functions.c

@@ -1,7 +1,6 @@
 #define _GNU_SOURCE
 #include <stdio.h>
 #include <stdlib.h>
-#include <pthread.h>
 #include <errno.h>
 #include <string.h>
 #include <math.h>
@@ -13,7 +12,6 @@
 #include "box64context.h"
 #include "dynarec.h"
 #include "emu/x64emu_private.h"
-#include "tools/bridge_private.h"
 #include "x64run.h"
 #include "x64emu.h"
 #include "box64stack.h"
@@ -28,337 +26,10 @@
 #include "custommem.h"
 #include "bridge.h"
 
-void arm_fstp(x64emu_t* emu, void* p)
-{
-    if(ST0.q!=STld(0).uref)
-        D2LD(&ST0.d, p);
-    else
-        memcpy(p, &STld(0).ld, 10);
-}
-
-void arm_print_armreg(x64emu_t* emu, uintptr_t reg, uintptr_t n)
-{
-    (void)emu;
-    dynarec_log(LOG_DEBUG, "R%lu=0x%lx (%lu)\n", n, reg, reg);
-}
-
-void arm_f2xm1(x64emu_t* emu)
-{
-    ST0.d = exp2(ST0.d) - 1.0;
-}
-void arm_fyl2x(x64emu_t* emu)
-{
-    ST(1).d = log2(ST0.d)*ST(1).d;
-}
-void arm_ftan(x64emu_t* emu)
-{
-    ST0.d = tan(ST0.d);
-    emu->sw.f.F87_C2 = 0;
-}
-void arm_fpatan(x64emu_t* emu)
-{
-    ST1.d = atan2(ST1.d, ST0.d);
-}
-void arm_fxtract(x64emu_t* emu)
-{
-    int32_t tmp32s = (ST1.q&0x7ff0000000000000LL)>>52;
-    tmp32s -= 1023;
-    ST1.d /= exp2(tmp32s);
-    ST0.d = tmp32s;
-}
-void arm_fprem(x64emu_t* emu)
-{
-    int32_t tmp32s = ST0.d / ST1.d;
-    ST0.d -= ST1.d * tmp32s;
-    emu->sw.f.F87_C2 = 0;
-    emu->sw.f.F87_C0 = (tmp32s&1);
-    emu->sw.f.F87_C3 = ((tmp32s>>1)&1);
-    emu->sw.f.F87_C1 = ((tmp32s>>2)&1);
-}
-void arm_fyl2xp1(x64emu_t* emu)
-{
-    ST(1).d = log2(ST0.d + 1.0)*ST(1).d;
-}
-void arm_fsincos(x64emu_t* emu)
-{
-    sincos(ST1.d, &ST1.d, &ST0.d);
-    emu->sw.f.F87_C2 = 0;
-}
-void arm_frndint(x64emu_t* emu)
-{
-    ST0.d = fpu_round(emu, ST0.d);
-}
-void arm_fscale(x64emu_t* emu)
-{
-    if(ST0.d!=0.0)
-        ST0.d *= exp2(trunc(ST1.d));
-}
-void arm_fsin(x64emu_t* emu)
-{
-    ST0.d = sin(ST0.d);
-    emu->sw.f.F87_C2 = 0;
-}
-void arm_fcos(x64emu_t* emu)
-{
-    ST0.d = cos(ST0.d);
-    emu->sw.f.F87_C2 = 0;
-}
-
-void arm_fbld(x64emu_t* emu, uint8_t* ed)
-{
-    fpu_fbld(emu, ed);
-}
-
-void arm_fild64(x64emu_t* emu, int64_t* ed)
-{
-    int64_t tmp;
-    memcpy(&tmp, ed, sizeof(tmp));
-    ST0.d = tmp;
-    STll(0).sq = tmp;
-    STll(0).sref = ST0.sq;
-}
-
-void arm_fbstp(x64emu_t* emu, uint8_t* ed)
-{
-    fpu_fbst(emu, ed);
-}
-
-void arm_fistp64(x64emu_t* emu, int64_t* ed)
-{
-    // used of memcpy to avoid aligments issues
-    if(STll(0).sref==ST(0).sq) {
-        memcpy(ed, &STll(0).sq, sizeof(int64_t));
-    } else {
-        int64_t tmp;
-        if(isgreater(ST0.d, (double)(int64_t)0x7fffffffffffffffLL) || isless(ST0.d, (double)(int64_t)0x8000000000000000LL) || !isfinite(ST0.d))
-            tmp = 0x8000000000000000LL;
-        else
-            tmp = fpu_round(emu, ST0.d);
-        memcpy(ed, &tmp, sizeof(tmp));
-    }
-}
-
-void arm_fistt64(x64emu_t* emu, int64_t* ed)
-{
-    // used of memcpy to avoid aligments issues
-    int64_t tmp = ST0.d;
-    memcpy(ed, &tmp, sizeof(tmp));
-}
-
-void arm_fld(x64emu_t* emu, uint8_t* ed)
-{
-    memcpy(&STld(0).ld, ed, 10);
-    LD2D(&STld(0), &ST(0).d);
-    STld(0).uref = ST0.q;
-}
-
-void arm_ud(x64emu_t* emu)
-{
-    emit_signal(emu, SIGILL, (void*)R_RIP, 0);
-}
-
-void arm_priv(x64emu_t* emu)
-{
-    emit_signal(emu, SIGSEGV, (void*)R_RIP, 0);
-}
-
-void arm_fsave(x64emu_t* emu, uint8_t* ed)
-{
-    fpu_savenv(emu, (char*)ed, 0);
-
-    uint8_t* p = ed;
-    p += 28;
-    for (int i=0; i<8; ++i) {
-        LD2D(p, &ST(i).d);
-        p+=10;
-    }
-}
-void arm_frstor(x64emu_t* emu, uint8_t* ed)
-{
-    fpu_loadenv(emu, (char*)ed, 0);
-
-    uint8_t* p = ed;
-    p += 28;
-    for (int i=0; i<8; ++i) {
-        D2LD(&ST(i).d, p);
-        p+=10;
-    }
-
-}
-
-void arm_fprem1(x64emu_t* emu)
-{
-    // simplified version
-    int32_t tmp32s = round(ST0.d / ST1.d);
-    ST0.d -= ST1.d*tmp32s;
-    emu->sw.f.F87_C2 = 0;
-    emu->sw.f.F87_C0 = (tmp32s&1);
-    emu->sw.f.F87_C3 = ((tmp32s>>1)&1);
-    emu->sw.f.F87_C1 = ((tmp32s>>2)&1);
-}
-
-static uint8_t ff_mult(uint8_t a, uint8_t b)
-{
-	int retval = 0;
-
-	for(int i = 0; i < 8; i++) {
-		if((b & 1) == 1) 
-			retval ^= a;
-		
-		if((a & 0x80)) {
-			a <<= 1;
-			a  ^= 0x1b;
-		} else {
-			a <<= 1;
-		}
-		
-		b >>= 1;
-	}
-	
-	return retval;
-}
-
-void arm_aesimc(x64emu_t* emu, int xmm)
-{
-    sse_regs_t eax1 = emu->xmm[xmm];
-
-    for(int j=0; j<4; ++j) {
-        emu->xmm[xmm].ub[0+j*4] = ff_mult(0x0E, eax1.ub[0+j*4]) ^ ff_mult(0x0B, eax1.ub[1+j*4]) ^ ff_mult(0x0D, eax1.ub[2+j*4]) ^ ff_mult(0x09, eax1.ub[3+j*4]);
-        emu->xmm[xmm].ub[1+j*4] = ff_mult(0x09, eax1.ub[0+j*4]) ^ ff_mult(0x0E, eax1.ub[1+j*4]) ^ ff_mult(0x0B, eax1.ub[2+j*4]) ^ ff_mult(0x0D, eax1.ub[3+j*4]);
-        emu->xmm[xmm].ub[2+j*4] = ff_mult(0x0D, eax1.ub[0+j*4]) ^ ff_mult(0x09, eax1.ub[1+j*4]) ^ ff_mult(0x0E, eax1.ub[2+j*4]) ^ ff_mult(0x0B, eax1.ub[3+j*4]);
-        emu->xmm[xmm].ub[3+j*4] = ff_mult(0x0B, eax1.ub[0+j*4]) ^ ff_mult(0x0D, eax1.ub[1+j*4]) ^ ff_mult(0x09, eax1.ub[2+j*4]) ^ ff_mult(0x0E, eax1.ub[3+j*4]);
-    }
-}
-void arm_aesmc(x64emu_t* emu, int xmm)
-{
-    sse_regs_t eax1 = emu->xmm[xmm];
-
-    for(int j=0; j<4; ++j) {
-        emu->xmm[xmm].ub[0+j*4] = ff_mult(0x02, eax1.ub[0+j*4]) ^ ff_mult(0x03, eax1.ub[1+j*4]) ^               eax1.ub[2+j*4]  ^               eax1.ub[3+j*4] ;
-        emu->xmm[xmm].ub[1+j*4] =               eax1.ub[0+j*4]  ^ ff_mult(0x02, eax1.ub[1+j*4]) ^ ff_mult(0x03, eax1.ub[2+j*4]) ^               eax1.ub[3+j*4] ;
-        emu->xmm[xmm].ub[2+j*4] =               eax1.ub[0+j*4]  ^               eax1.ub[1+j*4]  ^ ff_mult(0x02, eax1.ub[2+j*4]) ^ ff_mult(0x03, eax1.ub[3+j*4]);
-        emu->xmm[xmm].ub[3+j*4] = ff_mult(0x03, eax1.ub[0+j*4]) ^               eax1.ub[1+j*4]  ^               eax1.ub[2+j*4]  ^ ff_mult(0x02, eax1.ub[3+j*4]);
-    }
-}
-void arm_aesdlast(x64emu_t* emu, int xmm)
-{
-                            //   A0 B1 C2 D3 E4 F5 G6 H7 I8 J9 Ka Lb Mc Nd Oe Pf
-                            //   A  N  K  H  E  B  O  L  I  F  C  P  M  J  G  D
-    const uint8_t invshiftrows[] = {0,13,10, 7, 4, 1,14,11, 8, 5, 2,15,12, 9, 6, 3};
-    const uint8_t invsubbytes[256] = {
-        0x52, 0x09, 0x6a, 0xd5, 0x30, 0x36, 0xa5, 0x38, 0xbf, 0x40, 0xa3, 0x9e, 0x81, 0xf3, 0xd7, 0xfb,
-        0x7c, 0xe3, 0x39, 0x82, 0x9b, 0x2f, 0xff, 0x87, 0x34, 0x8e, 0x43, 0x44, 0xc4, 0xde, 0xe9, 0xcb,
-        0x54, 0x7b, 0x94, 0x32, 0xa6, 0xc2, 0x23, 0x3d, 0xee, 0x4c, 0x95, 0x0b, 0x42, 0xfa, 0xc3, 0x4e,
-        0x08, 0x2e, 0xa1, 0x66, 0x28, 0xd9, 0x24, 0xb2, 0x76, 0x5b, 0xa2, 0x49, 0x6d, 0x8b, 0xd1, 0x25,
-        0x72, 0xf8, 0xf6, 0x64, 0x86, 0x68, 0x98, 0x16, 0xd4, 0xa4, 0x5c, 0xcc, 0x5d, 0x65, 0xb6, 0x92,
-        0x6c, 0x70, 0x48, 0x50, 0xfd, 0xed, 0xb9, 0xda, 0x5e, 0x15, 0x46, 0x57, 0xa7, 0x8d, 0x9d, 0x84,
-        0x90, 0xd8, 0xab, 0x00, 0x8c, 0xbc, 0xd3, 0x0a, 0xf7, 0xe4, 0x58, 0x05, 0xb8, 0xb3, 0x45, 0x06,
-        0xd0, 0x2c, 0x1e, 0x8f, 0xca, 0x3f, 0x0f, 0x02, 0xc1, 0xaf, 0xbd, 0x03, 0x01, 0x13, 0x8a, 0x6b,
-        0x3a, 0x91, 0x11, 0x41, 0x4f, 0x67, 0xdc, 0xea, 0x97, 0xf2, 0xcf, 0xce, 0xf0, 0xb4, 0xe6, 0x73,
-        0x96, 0xac, 0x74, 0x22, 0xe7, 0xad, 0x35, 0x85, 0xe2, 0xf9, 0x37, 0xe8, 0x1c, 0x75, 0xdf, 0x6e,
-        0x47, 0xf1, 0x1a, 0x71, 0x1d, 0x29, 0xc5, 0x89, 0x6f, 0xb7, 0x62, 0x0e, 0xaa, 0x18, 0xbe, 0x1b,
-        0xfc, 0x56, 0x3e, 0x4b, 0xc6, 0xd2, 0x79, 0x20, 0x9a, 0xdb, 0xc0, 0xfe, 0x78, 0xcd, 0x5a, 0xf4,
-        0x1f, 0xdd, 0xa8, 0x33, 0x88, 0x07, 0xc7, 0x31, 0xb1, 0x12, 0x10, 0x59, 0x27, 0x80, 0xec, 0x5f,
-        0x60, 0x51, 0x7f, 0xa9, 0x19, 0xb5, 0x4a, 0x0d, 0x2d, 0xe5, 0x7a, 0x9f, 0x93, 0xc9, 0x9c, 0xef,
-        0xa0, 0xe0, 0x3b, 0x4d, 0xae, 0x2a, 0xf5, 0xb0, 0xc8, 0xeb, 0xbb, 0x3c, 0x83, 0x53, 0x99, 0x61,
-        0x17, 0x2b, 0x04, 0x7e, 0xba, 0x77, 0xd6, 0x26, 0xe1, 0x69, 0x14, 0x63, 0x55, 0x21, 0x0c, 0x7d,
-    };
-
-    sse_regs_t eax1;
-    for(int i=0; i<16; ++i)
-        eax1.ub[i] = emu->xmm[xmm].ub[invshiftrows[i]];
-    //STATE ← InvSubBytes( STATE );
-    for(int i=0; i<16; ++i)
-        emu->xmm[xmm].ub[i] = invsubbytes[eax1.ub[i]];
-
-}
-static const uint8_t shiftrows[] = {0, 5,10,15, 4, 9,14, 3, 8,13, 2, 7,12, 1, 6,11};
-static const uint8_t subbytes[256] = {
-    0x63, 0x7c, 0x77, 0x7b, 0xf2, 0x6b, 0x6f, 0xc5, 0x30, 0x01, 0x67, 0x2b, 0xfe, 0xd7, 0xab, 0x76,
-    0xca, 0x82, 0xc9, 0x7d, 0xfa, 0x59, 0x47, 0xf0, 0xad, 0xd4, 0xa2, 0xaf, 0x9c, 0xa4, 0x72, 0xc0,
-    0xb7, 0xfd, 0x93, 0x26, 0x36, 0x3f, 0xf7, 0xcc, 0x34, 0xa5, 0xe5, 0xf1, 0x71, 0xd8, 0x31, 0x15,
-    0x04, 0xc7, 0x23, 0xc3, 0x18, 0x96, 0x05, 0x9a, 0x07, 0x12, 0x80, 0xe2, 0xeb, 0x27, 0xb2, 0x75,
-    0x09, 0x83, 0x2c, 0x1a, 0x1b, 0x6e, 0x5a, 0xa0, 0x52, 0x3b, 0xd6, 0xb3, 0x29, 0xe3, 0x2f, 0x84,
-    0x53, 0xd1, 0x00, 0xed, 0x20, 0xfc, 0xb1, 0x5b, 0x6a, 0xcb, 0xbe, 0x39, 0x4a, 0x4c, 0x58, 0xcf,
-    0xd0, 0xef, 0xaa, 0xfb, 0x43, 0x4d, 0x33, 0x85, 0x45, 0xf9, 0x02, 0x7f, 0x50, 0x3c, 0x9f, 0xa8,
-    0x51, 0xa3, 0x40, 0x8f, 0x92, 0x9d, 0x38, 0xf5, 0xbc, 0xb6, 0xda, 0x21, 0x10, 0xff, 0xf3, 0xd2,
-    0xcd, 0x0c, 0x13, 0xec, 0x5f, 0x97, 0x44, 0x17, 0xc4, 0xa7, 0x7e, 0x3d, 0x64, 0x5d, 0x19, 0x73,
-    0x60, 0x81, 0x4f, 0xdc, 0x22, 0x2a, 0x90, 0x88, 0x46, 0xee, 0xb8, 0x14, 0xde, 0x5e, 0x0b, 0xdb,
-    0xe0, 0x32, 0x3a, 0x0a, 0x49, 0x06, 0x24, 0x5c, 0xc2, 0xd3, 0xac, 0x62, 0x91, 0x95, 0xe4, 0x79,
-    0xe7, 0xc8, 0x37, 0x6d, 0x8d, 0xd5, 0x4e, 0xa9, 0x6c, 0x56, 0xf4, 0xea, 0x65, 0x7a, 0xae, 0x08,
-    0xba, 0x78, 0x25, 0x2e, 0x1c, 0xa6, 0xb4, 0xc6, 0xe8, 0xdd, 0x74, 0x1f, 0x4b, 0xbd, 0x8b, 0x8a,
-    0x70, 0x3e, 0xb5, 0x66, 0x48, 0x03, 0xf6, 0x0e, 0x61, 0x35, 0x57, 0xb9, 0x86, 0xc1, 0x1d, 0x9e,
-    0xe1, 0xf8, 0x98, 0x11, 0x69, 0xd9, 0x8e, 0x94, 0x9b, 0x1e, 0x87, 0xe9, 0xce, 0x55, 0x28, 0xdf,
-    0x8c, 0xa1, 0x89, 0x0d, 0xbf, 0xe6, 0x42, 0x68, 0x41, 0x99, 0x2d, 0x0f, 0xb0, 0x54, 0xbb, 0x16,
-};
-void arm_aeselast(x64emu_t* emu, int xmm)
-{
-                            //   A0 B1 C2 D3 E4 F5 G6 H7 I8 J9 Ka Lb Mc Nd Oe Pf
-                            //   A  F  K  P  E  J  O  D  I  N  C  H  M  B  G  L
-    sse_regs_t eax1;
-    for(int i=0; i<16; ++i)
-        eax1.ub[i] = emu->xmm[xmm].ub[shiftrows[i]];
-    //STATE ← SubBytes( STATE );
-    for(int i=0; i<16; ++i)
-        emu->xmm[xmm].ub[i] = subbytes[eax1.ub[i]];
-}
-void arm_aesd(x64emu_t* emu, int xmm)
-{
-    arm_aesdlast(emu, xmm);
-    arm_aesimc(emu, xmm);
-}
-void arm_aese(x64emu_t* emu, int xmm)
-{
-    arm_aeselast(emu, xmm);
-    arm_aesmc(emu, xmm);
-}
-void arm_aeskeygenassist(x64emu_t* emu, int gx, int ex, void* p, uint32_t u8)
-{
-    sse_regs_t *EX = p?((sse_regs_t*)p):&emu->xmm[ex];
-    sse_regs_t *GX = &emu->xmm[gx];
-    for (int i = 4; i < 8; ++i)
-        GX->ub[i] = subbytes[EX->ub[i]];
-    for (int i = 12; i < 16; ++i)
-        GX->ub[i] = subbytes[EX->ub[i]];
-    GX->ud[0] = GX->ud[1];
-    uint8_t tmp8u = GX->ub[4];
-    GX->ud[1] = GX->ud[1] >> 8;
-    GX->ub[7] = tmp8u;
-    GX->ud[1] ^= u8;
-    GX->ud[2] = GX->ud[3];
-    tmp8u = GX->ub[12];
-    GX->ud[3] = GX->ud[3] >> 8;
-    GX->ub[15] = tmp8u;
-    GX->ud[3] ^= u8;
-}
-
-void arm_pclmul(x64emu_t* emu, int gx, int ex, void* p, uint32_t u8)
-{
-    sse_regs_t *EX = p?((sse_regs_t*)p):&emu->xmm[ex];
-    sse_regs_t *GX = &emu->xmm[gx];
-    int g = (u8&1)?1:0;
-    int e = (u8&0b10000)?1:0;
-    __int128 result = 0;
-    __int128 op2 = EX->q[e];
-    for (int i=0; i<64; ++i)
-        if(GX->q[g]&(1LL<<i))
-            result ^= (op2<<i);
-
-    GX->q[0] = result&0xffffffffffffffffLL;
-    GX->q[1] = (result>>64)&0xffffffffffffffffLL;
-}
-
-void arm_clflush(x64emu_t* emu, void* p)
-{
-    cleanDBFromAddressRange((uintptr_t)p, 8, 0);
-}
-
-
 #define XMM0    0
 #define XMM8    16
 #define X870    8
 #define EMM0    8
-#define SCRATCH0    24
 
 // Get a FPU scratch reg
 int fpu_get_scratch(dynarec_arm_t* dyn)
@@ -386,7 +57,7 @@ void fpu_free_reg(dynarec_arm_t* dyn, int reg)
 {
     // TODO: check upper limit?
     dyn->n.fpuused[reg] = 0;
-    if(dyn->n.neoncache[reg].t!=NEON_CACHE_ST_F && dyn->n.neoncache[reg].t!=NEON_CACHE_ST_D)
+    if(dyn->n.neoncache[reg].t!=NEON_CACHE_ST_F && dyn->n.neoncache[reg].t!=NEON_CACHE_ST_D && dyn->n.neoncache[reg].t!=NEON_CACHE_ST_I64)
         dyn->n.neoncache[reg].v = 0;
 }
 // Get an MMX double reg
@@ -424,6 +95,15 @@ void fpu_reset_reg(dynarec_arm_t* dyn)
 
 }
 
+int neoncache_no_i64(dynarec_arm_t* dyn, int ninst, int st, int a)
+{
+    if(a==NEON_CACHE_ST_I64) {
+        neoncache_promote_double(dyn, ninst, st);
+        return NEON_CACHE_ST_D;
+    }
+    return a;
+}
+
 int neoncache_get_st(dynarec_arm_t* dyn, int ninst, int a)
 {
     if (dyn->insts[ninst].n.swapped) {
@@ -434,7 +114,8 @@ int neoncache_get_st(dynarec_arm_t* dyn, int ninst, int a)
     }
     for(int i=0; i<24; ++i)
         if((dyn->insts[ninst].n.neoncache[i].t==NEON_CACHE_ST_F
-         || dyn->insts[ninst].n.neoncache[i].t==NEON_CACHE_ST_D)
+         || dyn->insts[ninst].n.neoncache[i].t==NEON_CACHE_ST_D
+         || dyn->insts[ninst].n.neoncache[i].t==NEON_CACHE_ST_I64)
          && dyn->insts[ninst].n.neoncache[i].n==a)
             return dyn->insts[ninst].n.neoncache[i].t;
     // not in the cache yet, so will be fetched...
@@ -448,7 +129,8 @@ int neoncache_get_current_st(dynarec_arm_t* dyn, int ninst, int a)
         return NEON_CACHE_ST_D;
     for(int i=0; i<24; ++i)
         if((dyn->n.neoncache[i].t==NEON_CACHE_ST_F
-         || dyn->n.neoncache[i].t==NEON_CACHE_ST_D)
+         || dyn->n.neoncache[i].t==NEON_CACHE_ST_D
+         || dyn->n.neoncache[i].t==NEON_CACHE_ST_I64)
          && dyn->n.neoncache[i].n==a)
             return dyn->n.neoncache[i].t;
     // not in the cache yet, so will be fetched...
@@ -465,7 +147,18 @@ int neoncache_get_st_f(dynarec_arm_t* dyn, int ninst, int a)
          && dyn->insts[ninst].n.neoncache[i].n==a)
             return i;
     return -1;
-} 
+}
+int neoncache_get_st_f_i64(dynarec_arm_t* dyn, int ninst, int a)
+{
+    /*if(a+dyn->insts[ninst].n.stack_next-st<0)
+        // The STx has been pushed at the end of instructon, so stop going back
+        return -1;*/
+    for(int i=0; i<24; ++i)
+        if((dyn->insts[ninst].n.neoncache[i].t==NEON_CACHE_ST_I64 || dyn->insts[ninst].n.neoncache[i].t==NEON_CACHE_ST_F)
+         && dyn->insts[ninst].n.neoncache[i].n==a)
+            return i;
+    return -1;
+}
 int neoncache_get_st_f_noback(dynarec_arm_t* dyn, int ninst, int a)
 {
     for(int i=0; i<24; ++i)
@@ -473,7 +166,15 @@ int neoncache_get_st_f_noback(dynarec_arm_t* dyn, int ninst, int a)
          && dyn->insts[ninst].n.neoncache[i].n==a)
             return i;
     return -1;
-} 
+}
+int neoncache_get_st_f_i64_noback(dynarec_arm_t* dyn, int ninst, int a)
+{
+    for(int i=0; i<24; ++i)
+        if((dyn->insts[ninst].n.neoncache[i].t==NEON_CACHE_ST_I64 || dyn->insts[ninst].n.neoncache[i].t==NEON_CACHE_ST_F)
+         && dyn->insts[ninst].n.neoncache[i].n==a)
+            return i;
+    return -1;
+}
 int neoncache_get_current_st_f(dynarec_arm_t* dyn, int a)
 {
     for(int i=0; i<24; ++i)
@@ -481,7 +182,15 @@ int neoncache_get_current_st_f(dynarec_arm_t* dyn, int a)
          && dyn->n.neoncache[i].n==a)
             return i;
     return -1;
-} 
+}
+int neoncache_get_current_st_f_i64(dynarec_arm_t* dyn, int a)
+{
+    for(int i=0; i<24; ++i)
+        if((dyn->n.neoncache[i].t==NEON_CACHE_ST_I64 || dyn->n.neoncache[i].t==NEON_CACHE_ST_F)
+         && dyn->n.neoncache[i].n==a)
+            return i;
+    return -1;
+}
 static void neoncache_promote_double_forward(dynarec_arm_t* dyn, int ninst, int maxinst, int a);
 static void neoncache_promote_double_internal(dynarec_arm_t* dyn, int ninst, int maxinst, int a);
 static void neoncache_promote_double_combined(dynarec_arm_t* dyn, int ninst, int maxinst, int a)
@@ -489,9 +198,9 @@ static void neoncache_promote_double_combined(dynarec_arm_t* dyn, int ninst, int
     if(a == dyn->insts[ninst].n.combined1 || a == dyn->insts[ninst].n.combined2) {
         if(a == dyn->insts[ninst].n.combined1) {
             a = dyn->insts[ninst].n.combined2;
-        } else 
+        } else
             a = dyn->insts[ninst].n.combined1;
-        int i = neoncache_get_st_f_noback(dyn, ninst, a);
+        int i = neoncache_get_st_f_i64_noback(dyn, ninst, a);
         //if(box64_dynarec_dump) dynarec_log(LOG_NONE, "neoncache_promote_double_combined, ninst=%d combined%c %d i=%d (stack:%d/%d)\n", ninst, (a == dyn->insts[ninst].n.combined2)?'2':'1', a ,i, dyn->insts[ninst].n.stack_push, -dyn->insts[ninst].n.stack_pop);
         if(i>=0) {
             dyn->insts[ninst].n.neoncache[i].t = NEON_CACHE_ST_D;
@@ -510,7 +219,7 @@ static void neoncache_promote_double_internal(dynarec_arm_t* dyn, int ninst, int
         return;
     while(ninst>=0) {
         a+=dyn->insts[ninst].n.stack_pop;    // adjust Stack depth: add pop'd ST (going backward)
-        int i = neoncache_get_st_f(dyn, ninst, a);
+        int i = neoncache_get_st_f_i64(dyn, ninst, a);
         //if(box64_dynarec_dump) dynarec_log(LOG_NONE, "neoncache_promote_double_internal, ninst=%d, a=%d st=%d:%d, i=%d\n", ninst, a, dyn->insts[ninst].n.stack, dyn->insts[ninst].n.stack_next, i);
         if(i<0) return;
         dyn->insts[ninst].n.neoncache[i].t = NEON_CACHE_ST_D;
@@ -545,7 +254,7 @@ static void neoncache_promote_double_forward(dynarec_arm_t* dyn, int ninst, int
             else if (a==dyn->insts[ninst].n.combined2)
                 a = dyn->insts[ninst].n.combined1;
         }
-        int i = neoncache_get_st_f_noback(dyn, ninst, a);
+        int i = neoncache_get_st_f_i64_noback(dyn, ninst, a);
         //if(box64_dynarec_dump) dynarec_log(LOG_NONE, "neoncache_promote_double_forward, ninst=%d, a=%d st=%d:%d(%d/%d), i=%d\n", ninst, a, dyn->insts[ninst].n.stack, dyn->insts[ninst].n.stack_next, dyn->insts[ninst].n.stack_push, -dyn->insts[ninst].n.stack_pop, i);
         if(i<0) return;
         dyn->insts[ninst].n.neoncache[i].t = NEON_CACHE_ST_D;
@@ -566,7 +275,7 @@ static void neoncache_promote_double_forward(dynarec_arm_t* dyn, int ninst, int
 
 void neoncache_promote_double(dynarec_arm_t* dyn, int ninst, int a)
 {
-    int i = neoncache_get_current_st_f(dyn, a);
+    int i = neoncache_get_current_st_f_i64(dyn, a);
     //if(box64_dynarec_dump) dynarec_log(LOG_NONE, "neoncache_promote_double, ninst=%d a=%d st=%d i=%d\n", ninst, a, dyn->n.stack, i);
     if(i<0) return;
     dyn->n.neoncache[i].t = NEON_CACHE_ST_D;
@@ -599,31 +308,23 @@ int neoncache_combine_st(dynarec_arm_t* dyn, int ninst, int a, int b)
     if( neoncache_get_current_st(dyn, ninst, a)==NEON_CACHE_ST_F
      && neoncache_get_current_st(dyn, ninst, b)==NEON_CACHE_ST_F )
         return NEON_CACHE_ST_F;
+    // don't combine i64, it's only for load/store
+    /*if( neoncache_get_current_st(dyn, ninst, a)==NEON_CACHE_ST_I64
+     && neoncache_get_current_st(dyn, ninst, b)==NEON_CACHE_ST_I64 )
+        return NEON_CACHE_ST_I64;*/
     return NEON_CACHE_ST_D;
 }
 
-int isPred(dynarec_arm_t* dyn, int ninst, int pred) {
-    for(int i=0; i<dyn->insts[ninst].pred_sz; ++i)
-        if(dyn->insts[ninst].pred[i]==pred)
-            return pred;
-    return -1;
-}
-int getNominalPred(dynarec_arm_t* dyn, int ninst) {
-    if((ninst<=0) || !dyn->insts[ninst].pred_sz)
-        return -1;
-    if(isPred(dyn, ninst, ninst-1)!=-1)
-        return ninst-1;
-    return dyn->insts[ninst].pred[0];
-}
-
-int isCacheEmpty(dynarec_arm_t* dyn, int ninst) {
+static int isCacheEmpty(dynarec_native_t* dyn, int ninst) {
     if(dyn->insts[ninst].n.stack_next) {
         return 0;
     }
     for(int i=0; i<24; ++i)
         if(dyn->insts[ninst].n.neoncache[i].v) {       // there is something at ninst for i
             if(!(
-            (dyn->insts[ninst].n.neoncache[i].t==NEON_CACHE_ST_F || dyn->insts[ninst].n.neoncache[i].t==NEON_CACHE_ST_D)
+            (dyn->insts[ninst].n.neoncache[i].t==NEON_CACHE_ST_F
+             || dyn->insts[ninst].n.neoncache[i].t==NEON_CACHE_ST_D
+             || dyn->insts[ninst].n.neoncache[i].t==NEON_CACHE_ST_I64)
             && dyn->insts[ninst].n.neoncache[i].n<dyn->insts[ninst].n.stack_pop))
                 return 0;
         }
@@ -631,7 +332,7 @@ int isCacheEmpty(dynarec_arm_t* dyn, int ninst) {
 
 }
 
-static int fpuCacheNeedsTransform(dynarec_arm_t* dyn, int ninst) {
+int fpuCacheNeedsTransform(dynarec_arm_t* dyn, int ninst) {
     int i2 = dyn->insts[ninst].x64.jmp_insts;
     if(i2<0)
         return 1;
@@ -646,7 +347,9 @@ static int fpuCacheNeedsTransform(dynarec_arm_t* dyn, int ninst) {
         for(int i=0; i<24 && !ret; ++i)
             if(dyn->insts[ninst].n.neoncache[i].v) {       // there is something at ninst for i
                 if(!(
-                (dyn->insts[ninst].n.neoncache[i].t==NEON_CACHE_ST_F || dyn->insts[ninst].n.neoncache[i].t==NEON_CACHE_ST_D)
+                (dyn->insts[ninst].n.neoncache[i].t==NEON_CACHE_ST_F
+                || dyn->insts[ninst].n.neoncache[i].t==NEON_CACHE_ST_D
+                || dyn->insts[ninst].n.neoncache[i].t==NEON_CACHE_ST_I64)
                 && dyn->insts[ninst].n.neoncache[i].n<dyn->insts[ninst].n.stack_pop))
                     ret = 1;
             }
@@ -678,56 +381,14 @@ static int fpuCacheNeedsTransform(dynarec_arm_t* dyn, int ninst) {
     return ret;
 }
 
-static int flagsCacheNeedsTransform(dynarec_arm_t* dyn, int ninst) {
-    int jmp = dyn->insts[ninst].x64.jmp_insts;
-    if(jmp<0)
-        return 0;
-    if(dyn->insts[ninst].f_exit.dfnone)  // flags are fully known, nothing we can do more
-        return 0;
-/*    if((dyn->f.pending!=SF_SET)
-    && (dyn->f.pending!=SF_SET_PENDING)) {
-        if(dyn->f.pending!=SF_PENDING) {*/
-    switch (dyn->insts[jmp].f_entry.pending) {
-        case SF_UNKNOWN: return 0;
-        case SF_SET: 
-            if(dyn->insts[ninst].f_exit.pending!=SF_SET && dyn->insts[ninst].f_exit.pending!=SF_SET_PENDING) 
-                return 1; 
-            else 
-                return 0;
-        case SF_SET_PENDING:
-            if(dyn->insts[ninst].f_exit.pending!=SF_SET 
-            && dyn->insts[ninst].f_exit.pending!=SF_SET_PENDING
-            && dyn->insts[ninst].f_exit.pending!=SF_PENDING) 
-                return 1; 
-            else 
-                return 0;
-        case SF_PENDING:
-            if(dyn->insts[ninst].f_exit.pending!=SF_SET 
-            && dyn->insts[ninst].f_exit.pending!=SF_SET_PENDING
-            && dyn->insts[ninst].f_exit.pending!=SF_PENDING)
-                return 1;
-            else
-                return (dyn->insts[jmp].f_entry.dfnone  == dyn->insts[ninst].f_exit.dfnone)?0:1;
-    }
-    if(dyn->insts[jmp].f_entry.dfnone && !dyn->insts[ninst].f_exit.dfnone)
-        return 1;
-    return 0;
-}
-int CacheNeedsTransform(dynarec_arm_t* dyn, int ninst) {
-    int ret = 0;
-    if (fpuCacheNeedsTransform(dyn, ninst)) ret|=1;
-    if (flagsCacheNeedsTransform(dyn, ninst)) ret|=2;
-    return ret;
-}
-
 void neoncacheUnwind(neoncache_t* cache)
 {
     if(cache->swapped) {
         // unswap
-        int a = -1; 
+        int a = -1;
         int b = -1;
         for(int j=0; j<24 && ((a==-1) || (b==-1)); ++j)
-            if((cache->neoncache[j].t == NEON_CACHE_ST_D || cache->neoncache[j].t == NEON_CACHE_ST_F)) {
+            if((cache->neoncache[j].t == NEON_CACHE_ST_D || cache->neoncache[j].t == NEON_CACHE_ST_F || cache->neoncache[j].t == NEON_CACHE_ST_I64)) {
                 if(cache->neoncache[j].n == cache->combined1)
                     a = j;
                 else if(cache->neoncache[j].n == cache->combined2)
@@ -751,7 +412,7 @@ void neoncacheUnwind(neoncache_t* cache)
     if(cache->stack_push) {
         // unpush
         for(int j=0; j<24; ++j) {
-            if((cache->neoncache[j].t == NEON_CACHE_ST_D || cache->neoncache[j].t == NEON_CACHE_ST_F)) {
+            if((cache->neoncache[j].t == NEON_CACHE_ST_D || cache->neoncache[j].t == NEON_CACHE_ST_F || cache->neoncache[j].t == NEON_CACHE_ST_I64)) {
                 if(cache->neoncache[j].n<cache->stack_push)
                     cache->neoncache[j].v = 0;
                 else
@@ -796,6 +457,7 @@ void neoncacheUnwind(neoncache_t* cache)
                     break;
                 case NEON_CACHE_ST_F:
                 case NEON_CACHE_ST_D:
+                case NEON_CACHE_ST_I64:
                     cache->x87cache[x87reg] = cache->neoncache[i].n;
                     cache->x87reg[x87reg] = i;
                     ++x87reg;
@@ -813,7 +475,6 @@ void neoncacheUnwind(neoncache_t* cache)
 }
 
 #define F8      *(uint8_t*)(addr++)
-#define F32     *(uint32_t*)(addr+=4, addr-4)
 #define F32S64  (uint64_t)(int64_t)*(int32_t*)(addr+=4, addr-4)
 // Get if ED will have the correct parity. Not emiting anything. Parity is 2 for DWORD or 3 for QWORD
 int getedparity(dynarec_arm_t* dyn, int ninst, uintptr_t addr, uint8_t nextop, int parity, int delta)
@@ -853,64 +514,8 @@ int getedparity(dynarec_arm_t* dyn, int ninst, uintptr_t addr, uint8_t nextop, i
         return 0; //Form [reg1 + reg2<<N + XXXXXX]
     }
 }
-
-// Do the GETED, but don't emit anything...
-uintptr_t fakeed(dynarec_arm_t* dyn, uintptr_t addr, int ninst, uint8_t nextop) 
-{
-    (void)dyn; (void)addr; (void)ninst;
-
-    if((nextop&0xC0)==0xC0)
-        return addr;
-    if(!(nextop&0xC0)) {
-        if((nextop&7)==4) {
-            uint8_t sib = F8;
-            if((sib&0x7)==5) {
-                addr+=4;
-            }
-        } else if((nextop&7)==5) {
-            addr+=4;
-        }
-    } else {
-        if((nextop&7)==4) {
-            ++addr;
-        }
-        if(nextop&0x80) {
-            addr+=4;
-        } else {
-            ++addr;
-        }
-    }
-    return addr;
-}
 #undef F8
-#undef F32
-
-int isNativeCall(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t* calladdress, int* retn)
-{
-    (void)dyn;
-
-#define PK(a)       *(uint8_t*)(addr+a)
-#define PK32(a)     *(int32_t*)(addr+a)
-
-    if(!addr || !getProtection(addr))
-        return 0;
-    if(PK(0)==0xff && PK(1)==0x25) {            // "absolute" jump, maybe the GOT (well, RIP relative in fact)
-        uintptr_t a1 = addr + 6 + (PK32(2));    // need to add a check to see if the address is from the GOT !
-        addr = (uintptr_t)getAlternate(*(void**)a1);
-    }
-    if(!addr || !getProtection(addr))
-        return 0;
-    onebridge_t *b = (onebridge_t*)(addr);
-    if(b->CC==0xCC && b->S=='S' && b->C=='C' && b->w!=(wrapper_t)0 && b->f!=(uintptr_t)PltResolver) {
-        // found !
-        if(retn) *retn = (b->C3==0xC2)?b->N:0;
-        if(calladdress) *calladdress = addr+1;
-        return 1;
-    }
-    return 0;
-#undef PK32
-#undef PK
-}
+#undef F32S64
 
 const char* getCacheName(int t, int n)
 {
@@ -918,6 +523,7 @@ const char* getCacheName(int t, int n)
     switch(t) {
         case NEON_CACHE_ST_D: sprintf(buff, "ST%d", n); break;
         case NEON_CACHE_ST_F: sprintf(buff, "st%d", n); break;
+        case NEON_CACHE_ST_I64: sprintf(buff, "STi%d", n); break;
         case NEON_CACHE_MM: sprintf(buff, "MM%d", n); break;
         case NEON_CACHE_XMMW: sprintf(buff, "XMM%d", n); break;
         case NEON_CACHE_XMMR: sprintf(buff, "xmm%d", n); break;
@@ -927,20 +533,59 @@ const char* getCacheName(int t, int n)
     return buff;
 }
 
-// is inst clean for a son branch?
-int isInstClean(dynarec_arm_t* dyn, int ninst)
+void inst_name_pass3(dynarec_native_t* dyn, int ninst, const char* name, rex_t rex)
 {
-    // check flags cache
-    if(dyn->insts[ninst].f_entry.dfnone || dyn->insts[ninst].f_entry.pending)
-        return 0;
-    if(dyn->insts[ninst].x64.state_flags)
-        return 0;
-    // check neoncache
-    neoncache_t* n = &dyn->insts[ninst].n;
-    if(n->news || n->stack || n->stack_next)
-        return 0;
-    for(int i=0; i<24; ++i)
-        if(n->neoncache[i].v)
-            return 0;
-    return 1;
+    if(box64_dynarec_dump) {
+        printf_x64_instruction(rex.is32bits?my_context->dec32:my_context->dec, &dyn->insts[ninst].x64, name);
+        dynarec_log(LOG_NONE, "%s%p: %d emitted opcodes, inst=%d, barrier=%d state=%d/%d(%d), %s=%X/%X, use=%X, need=%X/%X, sm=%d/%d",
+            (box64_dynarec_dump>1)?"\e[32m":"",
+            (void*)(dyn->native_start+dyn->insts[ninst].address),
+            dyn->insts[ninst].size/4,
+            ninst,
+            dyn->insts[ninst].x64.barrier,
+            dyn->insts[ninst].x64.state_flags,
+            dyn->f.pending,
+            dyn->f.dfnone,
+            dyn->insts[ninst].x64.may_set?"may":"set",
+            dyn->insts[ninst].x64.set_flags,
+            dyn->insts[ninst].x64.gen_flags,
+            dyn->insts[ninst].x64.use_flags,
+            dyn->insts[ninst].x64.need_before,
+            dyn->insts[ninst].x64.need_after,
+            dyn->smread, dyn->smwrite);
+        if(dyn->insts[ninst].pred_sz) {
+            dynarec_log(LOG_NONE, ", pred=");
+            for(int ii=0; ii<dyn->insts[ninst].pred_sz; ++ii)
+                dynarec_log(LOG_NONE, "%s%d", ii?"/":"", dyn->insts[ninst].pred[ii]);
+        }
+        if(dyn->insts[ninst].x64.jmp && dyn->insts[ninst].x64.jmp_insts>=0)
+            dynarec_log(LOG_NONE, ", jmp=%d", dyn->insts[ninst].x64.jmp_insts);
+        if(dyn->insts[ninst].x64.jmp && dyn->insts[ninst].x64.jmp_insts==-1)
+            dynarec_log(LOG_NONE, ", jmp=out");
+        if(dyn->last_ip)
+            dynarec_log(LOG_NONE, ", last_ip=%p", (void*)dyn->last_ip);
+        for(int ii=0; ii<24; ++ii) {
+            switch(dyn->insts[ninst].n.neoncache[ii].t) {
+                case NEON_CACHE_ST_D: dynarec_log(LOG_NONE, " D%d:%s", ii, getCacheName(dyn->insts[ninst].n.neoncache[ii].t, dyn->insts[ninst].n.neoncache[ii].n)); break;
+                case NEON_CACHE_ST_F: dynarec_log(LOG_NONE, " S%d:%s", ii, getCacheName(dyn->insts[ninst].n.neoncache[ii].t, dyn->insts[ninst].n.neoncache[ii].n)); break;
+                case NEON_CACHE_ST_I64: dynarec_log(LOG_NONE, " D%d:%s", ii, getCacheName(dyn->insts[ninst].n.neoncache[ii].t, dyn->insts[ninst].n.neoncache[ii].n)); break;
+                case NEON_CACHE_MM: dynarec_log(LOG_NONE, " D%d:%s", ii, getCacheName(dyn->insts[ninst].n.neoncache[ii].t, dyn->insts[ninst].n.neoncache[ii].n)); break;
+                case NEON_CACHE_XMMW: dynarec_log(LOG_NONE, " Q%d:%s", ii, getCacheName(dyn->insts[ninst].n.neoncache[ii].t, dyn->insts[ninst].n.neoncache[ii].n)); break;
+                case NEON_CACHE_XMMR: dynarec_log(LOG_NONE, " Q%d:%s", ii, getCacheName(dyn->insts[ninst].n.neoncache[ii].t, dyn->insts[ninst].n.neoncache[ii].n)); break;
+                case NEON_CACHE_SCR: dynarec_log(LOG_NONE, " D%d:%s", ii, getCacheName(dyn->insts[ninst].n.neoncache[ii].t, dyn->insts[ninst].n.neoncache[ii].n)); break;
+                case NEON_CACHE_NONE:
+                default:    break;
+            }
+        }
+        if(dyn->n.stack || dyn->insts[ninst].n.stack_next || dyn->insts[ninst].n.x87stack)
+            dynarec_log(LOG_NONE, " X87:%d/%d(+%d/-%d)%d", dyn->n.stack, dyn->insts[ninst].n.stack_next, dyn->insts[ninst].n.stack_push, dyn->insts[ninst].n.stack_pop, dyn->insts[ninst].n.x87stack);
+        if(dyn->insts[ninst].n.combined1 || dyn->insts[ninst].n.combined2)
+            dynarec_log(LOG_NONE, " %s:%d/%d", dyn->insts[ninst].n.swapped?"SWP":"CMB", dyn->insts[ninst].n.combined1, dyn->insts[ninst].n.combined2);
+        dynarec_log(LOG_NONE, "%s\n", (box64_dynarec_dump>1)?"\e[m":"");
+    }
+}
+
+void print_opcode(dynarec_native_t* dyn, int ninst, uint32_t opcode)
+{
+    dynarec_log(LOG_NONE, "\t%08x\t%s\n", opcode, arm64_print(opcode, (uintptr_t)dyn->block));
 }

src/dynarec/arm64/dynarec_arm64_functions.h

@@ -1,46 +1,9 @@
 #ifndef __DYNAREC_ARM_FUNCTIONS_H__
 #define __DYNAREC_ARM_FUNCTIONS_H__
 
-typedef struct x64emu_s x64emu_t;
+#include "../dynarec_native_functions.h"
 
-void arm_fstp(x64emu_t* emu, void* p);
-
-void arm_print_armreg(x64emu_t* emu, uintptr_t reg, uintptr_t n);
-
-void arm_f2xm1(x64emu_t* emu);
-void arm_fyl2x(x64emu_t* emu);
-void arm_ftan(x64emu_t* emu);
-void arm_fpatan(x64emu_t* emu);
-void arm_fxtract(x64emu_t* emu);
-void arm_fprem(x64emu_t* emu);
-void arm_fyl2xp1(x64emu_t* emu);
-void arm_fsincos(x64emu_t* emu);
-void arm_frndint(x64emu_t* emu);
-void arm_fscale(x64emu_t* emu);
-void arm_fsin(x64emu_t* emu);
-void arm_fcos(x64emu_t* emu);
-void arm_fbld(x64emu_t* emu, uint8_t* ed);
-void arm_fild64(x64emu_t* emu, int64_t* ed);
-void arm_fbstp(x64emu_t* emu, uint8_t* ed);
-void arm_fistp64(x64emu_t* emu, int64_t* ed);
-void arm_fistt64(x64emu_t* emu, int64_t* ed);
-void arm_fld(x64emu_t* emu, uint8_t* ed);
-void arm_fsave(x64emu_t* emu, uint8_t* ed);
-void arm_frstor(x64emu_t* emu, uint8_t* ed);
-void arm_fprem1(x64emu_t* emu);
-
-void arm_aesd(x64emu_t* emu, int xmm);
-void arm_aese(x64emu_t* emu, int xmm);
-void arm_aesdlast(x64emu_t* emu, int xmm);
-void arm_aeselast(x64emu_t* emu, int xmm);
-void arm_aesimc(x64emu_t* emu, int xmm);
-void arm_aeskeygenassist(x64emu_t* emu, int gx, int ex, void* p, uint32_t u8);
-void arm_pclmul(x64emu_t* emu, int gx, int ex, void* p, uint32_t u8);
-
-void arm_clflush(x64emu_t* emu, void* p);
-
-void arm_ud(x64emu_t* emu);
-void arm_priv(x64emu_t* emu);
+#define SCRATCH0    24
 
 // Get an FPU scratch reg
 int fpu_get_scratch(dynarec_arm_t* dyn);
@@ -60,38 +23,35 @@ void fpu_reset_reg(dynarec_arm_t* dyn);
 // ---- Neon cache functions
 // Get type for STx
 int neoncache_get_st(dynarec_arm_t* dyn, int ninst, int a);
-// Get if STx is FLOAT or DOUBLE
+// Get if STx is FLOAT
 int neoncache_get_st_f(dynarec_arm_t* dyn, int ninst, int a);
+// Get if STx is FLOAT or I64
+int neoncache_get_st_f_i64(dynarec_arm_t* dyn, int ninst, int a);
 // Get actual type for STx
 int neoncache_get_current_st(dynarec_arm_t* dyn, int ninst, int a);
-// Get actual STx is FLOAT or DOUBLE
+// Get actual STx is FLOAT
 int neoncache_get_current_st_f(dynarec_arm_t* dyn, int a);
+// Get actual STx is FLOAT or I64
+int neoncache_get_current_st_f_i64(dynarec_arm_t* dyn, int a);
 // Back-propagate a change float->double
 void neoncache_promote_double(dynarec_arm_t* dyn, int ninst, int a);
 // Combine and propagate if needed (pass 1 only)
 int neoncache_combine_st(dynarec_arm_t* dyn, int ninst, int a, int b);  // with stack current dyn->n_stack*
+// Do not allow i64 type
+int neoncache_no_i64(dynarec_arm_t* dyn, int ninst, int st, int a);
 
-// FPU Cache transformation (for loops)
-int CacheNeedsTransform(dynarec_arm_t* dyn, int i1);
+
+// FPU Cache transformation (for loops) // Specific, need to be written by backend
+int fpuCacheNeedsTransform(dynarec_arm_t* dyn, int ninst);
 
 // Undo the changes of a neoncache to get the status before the instruction
 void neoncacheUnwind(neoncache_t* cache);
 
-// is inst clean for a son branch?
-int isInstClean(dynarec_arm_t* dyn, int ninst);
-
-// predecessor access
-int isPred(dynarec_arm_t* dyn, int ninst, int pred);
-int getNominalPred(dynarec_arm_t* dyn, int ninst);
-
 // Get if ED will have the correct parity. Not emiting anything. Parity is 2 for DWORD or 3 for QWORD
-int getedparity(dynarec_arm_t* dyn, int ninst, uintptr_t addr, uint8_t nextop, int parity, int delta);
-// Do the GETED, but don't emit anything...
-uintptr_t fakeed(dynarec_arm_t* dyn, uintptr_t addr, int ninst, uint8_t nextop);
-
-// Is what pointed at addr a native call? And if yes, to what function?
-int isNativeCall(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t* calladdress, int* retn);
+int getedparity(dynarec_native_t* dyn, int ninst, uintptr_t addr, uint8_t nextop, int parity, int delta);
 
 const char* getCacheName(int t, int n);
 
-#endif //__DYNAREC_ARM_FUNCTIONS_H__
+void inst_name_pass3(dynarec_native_t* dyn, int ninst, const char* name, rex_t rex);
+void print_opcode(dynarec_native_t* dyn, int ninst, uint32_t opcode);
+#endif //__DYNAREC_ARM_FUNCTIONS_H__

src/dynarec/arm64/dynarec_arm64_helper.h

@@ -33,28 +33,31 @@
 #define PKip(a)   *(uint8_t*)(ip+a)
 
 // Strong mem emulation helpers
-// Sequence of Read will trigger a DMB on "first" read if strongmem is 2
-// Squence of Write will trigger a DMB on "last" write if strongmem is 1
+#define SMREAD_MIN  2
+#define SMWRITE_MIN 1
+// Sequence of Read will trigger a DMB on "first" read if strongmem is >= SMREAD_MIN
+// Sequence of Write will trigger a DMB on "last" write if strongmem is >= 1
+// All Write operation that might use a lock all have a memory barrier if strongmem is >= SMWRITE_MIN
 // Opcode will read
-#define SMREAD()    if(!dyn->smread && box64_dynarec_strongmem>1) {SMDMB();}
+#define SMREAD()    if((dyn->smread==0) && (box64_dynarec_strongmem>SMREAD_MIN)) {SMDMB();} else dyn->smread=1
 // Opcode will read with option forced lock
-#define SMREADLOCK(lock)    if(lock || (!dyn->smread && box64_dynarec_strongmem>1)) {SMDMB();}
-// Opcode migh read (depend on nextop)
+#define SMREADLOCK(lock)    if((lock) || ((dyn->smread==0) && (box64_dynarec_strongmem>SMREAD_MIN))) {SMDMB();}
+// Opcode might read (depend on nextop)
 #define SMMIGHTREAD()   if(!MODREG) {SMREAD();}
 // Opcode has wrote
 #define SMWRITE()   dyn->smwrite=1
 // Opcode has wrote (strongmem>1 only)
-#define SMWRITE2()   if(box64_dynarec_strongmem>1) dyn->smwrite=1
+#define SMWRITE2()   if(box64_dynarec_strongmem>SMREAD_MIN) dyn->smwrite=1
 // Opcode has wrote with option forced lock
-#define SMWRITELOCK(lock)   if(lock) {SMDMB();} else dyn->smwrite=1
-// Opcode migh have wrote (depend on nextop)
+#define SMWRITELOCK(lock)   if(lock || (box64_dynarec_strongmem>SMWRITE_MIN)) {SMDMB();} else dyn->smwrite=1
+// Opcode might have wrote (depend on nextop)
 #define SMMIGHTWRITE()   if(!MODREG) {SMWRITE();}
 // Start of sequence
 #define SMSTART()   SMEND()
 // End of sequence
-#define SMEND()     if(dyn->smwrite && box64_dynarec_strongmem) {DMB_ISH();} dyn->smwrite=0; dyn->smread=0;
+#define SMEND()     if(dyn->smwrite && box64_dynarec_strongmem) {if(box64_dynarec_strongmem){DSB_ISH();}else{DMB_ISH();}} dyn->smwrite=0; dyn->smread=0;
 // Force a Data memory barrier (for LOCK: prefix)
-#define SMDMB()     DMB_ISH(); dyn->smwrite=0; dyn->smread=1
+#define SMDMB()     if(box64_dynarec_strongmem){DSB_ISH();}else{DMB_ISH();} dyn->smwrite=0; dyn->smread=1
 
 //LOCK_* define
 #define LOCK_LOCK   (int*)1
@@ -66,9 +69,9 @@
                     ed = xRAX+(nextop&7)+(rex.b<<3);    \
                     wback = 0;                          \
                 } else {                                \
-                    SMREAD()                            \
-                    addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, 0xfff<<(2+rex.w), (1<<(2+rex.w))-1, rex, NULL, 0, D); \
-                    LDRxw_U12(x1, wback, fixedaddress); \
+                    SMREAD();                           \
+                    addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, &unscaled, 0xfff<<(2+rex.w), (1<<(2+rex.w))-1, rex, NULL, 0, D); \
+                    LDxw(x1, wback, fixedaddress);      \
                     ed = x1;                            \
                 }
 #define GETEDx(D)  if(MODREG) {                         \
@@ -76,8 +79,17 @@
                     wback = 0;                          \
                 } else {                                \
                     SMREAD();                           \
-                    addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, 0xfff<<3, 7, rex, NULL, 0, D); \
-                    LDRx_U12(x1, wback, fixedaddress);  \
+                    addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, &unscaled, 0xfff<<3, 7, rex, NULL, 0, D); \
+                    LDx(x1, wback, fixedaddress);       \
+                    ed = x1;                            \
+                }
+#define GETEDz(D)  if(MODREG) {                         \
+                    ed = xRAX+(nextop&7)+(rex.b<<3);    \
+                    wback = 0;                          \
+                } else {                                \
+                    SMREAD();                           \
+                    addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, &unscaled, 0xfff<<(3-rex.is32bits), rex.is32bits?3:7, rex, NULL, 0, D); \
+                    LDz(x1, wback, fixedaddress);       \
                     ed = x1;                            \
                 }
 #define GETEDw(D)  if((nextop&0xC0)==0xC0) {            \
@@ -85,8 +97,8 @@
                     wback = 0;                          \
                 } else {                                \
                     SMREAD();                           \
-                    addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, 0xfff<<2, 3, rex, NULL,0, D); \
-                    LDRw_U12(x1, wback, fixedaddress);  \
+                    addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, &unscaled, 0xfff<<2, 3, rex, NULL,0, D); \
+                    LDW(x1, wback, fixedaddress);       \
                     ed = x1;                            \
                 }
 #define GETSEDw(D)  if((nextop&0xC0)==0xC0) {           \
@@ -96,8 +108,8 @@
                     wback = 0;                          \
                 } else {                                \
                     SMREAD();                           \
-                    addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, 0xfff<<2, 3, rex, NULL, 0, D); \
-                    LDRSW_U12(x1, wback, fixedaddress); \
+                    addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, &unscaled, 0xfff<<2, 3, rex, NULL, 0, D); \
+                    LDSW(x1, wback, fixedaddress);      \
                     wb = ed = x1;                       \
                 }
 #define GETED32(D)  if(MODREG) {                        \
@@ -105,8 +117,8 @@
                     wback = 0;                          \
                 } else {                                \
                     SMREAD();                           \
-                    addr = geted32(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, 0xfff<<(2+rex.w), (1<<(2+rex.w))-1, rex, NULL, 0, D); \
-                    LDRxw_U12(x1, wback, fixedaddress); \
+                    addr = geted32(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, &unscaled, 0xfff<<(2+rex.w), (1<<(2+rex.w))-1, rex, NULL, 0, D); \
+                    LDxw(x1, wback, fixedaddress);      \
                     ed = x1;                            \
                 }
 #define GETSED32w(D)  if((nextop&0xC0)==0xC0) {         \
@@ -116,8 +128,8 @@
                     wback = 0;                          \
                 } else {                                \
                     SMREAD();                           \
-                    addr = geted32(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, 0xfff<<2, 3, rex, NULL, 0, D); \
-                    LDRSW_U12(x1, wback, fixedaddress); \
+                    addr = geted32(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, &unscaled, 0xfff<<2, 3, rex, NULL, 0, D); \
+                    LDSW(x1, wback, fixedaddress);      \
                     wb = ed = x1;                       \
                 }
 //GETEDH can use hint for ed, and r1 or r2 for wback (depending on hint). wback is 0 if ed is xEAX..xEDI
@@ -126,18 +138,18 @@
                     wback = 0;                          \
                 } else {                                \
                     SMREAD();                           \
-                    addr = geted(dyn, addr, ninst, nextop, &wback, (hint==x2)?x1:x2, &fixedaddress, 0xfff<<(2+rex.w), (1<<(2+rex.w))-1, rex, NULL, 0, D); \
-                    LDRxw_U12(hint, wback, fixedaddress); \
-                    ed = hint;                            \
+                    addr = geted(dyn, addr, ninst, nextop, &wback, (hint==x2)?x1:x2, &fixedaddress, &unscaled, 0xfff<<(2+rex.w), (1<<(2+rex.w))-1, rex, NULL, 0, D); \
+                    LDxw(hint, wback, fixedaddress);    \
+                    ed = hint;                          \
                 }
 #define GETED32H(hint, D) if(MODREG) {                  \
                     ed = xRAX+(nextop&7)+(rex.b<<3);    \
                     wback = 0;                          \
                 } else {                                \
                     SMREAD();                           \
-                    addr = geted32(dyn, addr, ninst, nextop, &wback, (hint==x2)?x1:x2, &fixedaddress, 0xfff<<(2+rex.w), (1<<(2+rex.w))-1, rex, NULL, 0, D); \
-                    LDRxw_U12(hint, wback, fixedaddress); \
-                    ed = hint;                            \
+                    addr = geted32(dyn, addr, ninst, nextop, &wback, (hint==x2)?x1:x2, &fixedaddress, &unscaled, 0xfff<<(2+rex.w), (1<<(2+rex.w))-1, rex, NULL, 0, D); \
+                    LDxw(hint, wback, fixedaddress);    \
+                    ed = hint;                          \
                 }
 //GETEDW can use hint for wback and ret for ed. wback is 0 if ed is xEAX..xEDI
 #define GETEDW(hint, ret, D)   if(MODREG) {             \
@@ -146,9 +158,9 @@
                     wback = 0;                          \
                 } else {                                \
                     SMREAD();                           \
-                    addr = geted(dyn, addr, ninst, nextop, &wback, hint, &fixedaddress, 0xfff<<(2+rex.w), (1<<(2+rex.w))-1, rex, NULL, 0, D); \
+                    addr = geted(dyn, addr, ninst, nextop, &wback, hint, &fixedaddress, &unscaled, 0xfff<<(2+rex.w), (1<<(2+rex.w))-1, rex, NULL, 0, D); \
                     ed = ret;                           \
-                    LDRxw_U12(ed, wback, fixedaddress); \
+                    LDxw(ed, wback, fixedaddress);      \
                 }
 #define GETED32W(hint, ret, D)   if(MODREG) {           \
                     ed = xRAX+(nextop&7)+(rex.b<<3);    \
@@ -156,23 +168,23 @@
                     wback = 0;                          \
                 } else {                                \
                     SMREAD();                           \
-                    addr = geted32(dyn, addr, ninst, nextop, &wback, hint, &fixedaddress, 0xfff<<(2+rex.w), (1<<(2+rex.w))-1, rex, NULL, 0, D); \
+                    addr = geted32(dyn, addr, ninst, nextop, &wback, hint, &fixedaddress, &unscaled, 0xfff<<(2+rex.w), (1<<(2+rex.w))-1, rex, NULL, 0, D); \
                     ed = ret;                           \
-                    LDRxw_U12(ed, wback, fixedaddress); \
+                    LDxw(ed, wback, fixedaddress);      \
                 }
 // Write back ed in wback (if wback not 0)
-#define WBACK       if(wback) {STRxw_U12(ed, wback, fixedaddress); SMWRITE();}
+#define WBACK       if(wback) {STxw(ed, wback, fixedaddress); SMWRITE();}
 // Write back ed in wback (if wback not 0)
-#define WBACKx      if(wback) {STRx_U12(ed, wback, fixedaddress); SMWRITE();}
+#define WBACKx      if(wback) {STx(ed, wback, fixedaddress); SMWRITE();}
 // Write back ed in wback (if wback not 0)
-#define WBACKw      if(wback) {STRw_U12(ed, wback, fixedaddress); SMWRITE();}
+#define WBACKw      if(wback) {STW(ed, wback, fixedaddress); SMWRITE();}
 //GETEDO can use r1 for ed, and r2 for wback. wback is 0 if ed is xEAX..xEDI
 #define GETEDO(O, D)   if(MODREG) {                     \
                     ed = xRAX+(nextop&7)+(rex.b<<3);    \
                     wback = 0;                          \
                 } else {                                \
                     SMREAD();                           \
-                    addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, 0, 0, rex, NULL, 0, D); \
+                    addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, NULL, 0, 0, rex, NULL, 0, D); \
                     LDRxw_REG(x1, wback, O);            \
                     ed = x1;                            \
                 }
@@ -183,10 +195,20 @@
                     wback = 0;                          \
                 } else {                                \
                     SMREAD();                           \
-                    addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, 0, 0, rex, NULL, 0, D); \
+                    addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, NULL, 0, 0, rex, NULL, 0, D); \
                     LDRx_REG(x1, wback, O);             \
                     ed = x1;                            \
                 }
+//GETEDOz can use r1 for ed, and r2 for wback. wback is 0 if ed is xEAX..xEDI
+#define GETEDOz(O, D)  if(MODREG) {                     \
+                    ed = xRAX+(nextop&7)+(rex.b<<3);    \
+                    wback = 0;                          \
+                } else {                                \
+                    SMREAD();                           \
+                    addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, NULL, 0, 0, rex, NULL, 0, D); \
+                    LDRz_REG(x1, wback, O);             \
+                    ed = x1;                            \
+                }
 #define GETSEDOw(O, D)  if((nextop&0xC0)==0xC0) {       \
                     ed = xRAX+(nextop&7)+(rex.b<<3);    \
                     SXTWx(x1, ed);                      \
@@ -194,7 +216,7 @@
                     wback = 0;                          \
                 } else {                                \
                     SMREAD();                           \
-                    addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, 0, 0, rex, NULL, 0, D); \
+                    addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, NULL, 0, 0, rex, NULL, 0, D); \
                     LDRSW_REG(x1, wback, O);            \
                     wb = ed = x1;                       \
                 }
@@ -214,8 +236,8 @@
                     wb1 = 0;                \
                 } else {                    \
                     SMREAD();               \
-                    addr = geted(dyn, addr, ninst, nextop, &wback, w, &fixedaddress, 0xfff<<1, (1<<1)-1, rex, NULL, 0, D); \
-                    LDRH_U12(i, wback, fixedaddress); \
+                    addr = geted(dyn, addr, ninst, nextop, &wback, w, &fixedaddress, &unscaled, 0xfff<<1, (1<<1)-1, rex, NULL, 0, D); \
+                    LDH(i, wback, fixedaddress);\
                     ed = i;                 \
                     wb1 = 1;                \
                 }
@@ -227,8 +249,8 @@
                     wb1 = 0;                \
                 } else {                    \
                     SMREAD();               \
-                    addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, 0xfff<<1, (1<<1)-1, rex, NULL, 0, D); \
-                    LDRH_U12(i, wback, fixedaddress); \
+                    addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, &unscaled, 0xfff<<1, (1<<1)-1, rex, NULL, 0, D); \
+                    LDH(i, wback, fixedaddress);   \
                     ed = i;                 \
                     wb1 = 1;                \
                 }
@@ -240,15 +262,15 @@
                     wb1 = 0;                \
                 } else {                    \
                     SMREAD();               \
-                    addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, 0xfff<<1, (1<<1)-1, rex, NULL, 0, D); \
-                    LDRSHx_U12(i, wback, fixedaddress);\
+                    addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, &unscaled, 0xfff<<1, (1<<1)-1, rex, NULL, 0, D); \
+                    LDSHw(i, wback, fixedaddress); \
                     ed = i;                 \
                     wb1 = 1;                \
                 }
 // Write ed back to original register / memory
-#define EWBACK   if(wb1) {STRH_U12(ed, wback, fixedaddress); SMWRITE();} else {BFIx(wback, ed, 0, 16);}
+#define EWBACK       EWBACKW(ed)
 // Write w back to original register / memory
-#define EWBACKW(w)   if(wb1) {STRH_U12(w, wback, fixedaddress); SMWRITE();} else {BFIx(wback, w, 0, 16);}
+#define EWBACKW(w)   if(wb1) {STH(w, wback, fixedaddress); SMWRITE();} else {BFIx(wback, w, 0, 16);}
 // Write back gd in correct register
 #define GWBACK       BFIx((xRAX+((nextop&0x38)>>3)+(rex.r<<3)), gd, 0, 16);
 //GETEB will use i for ed, and can use r3 for wback.
@@ -266,8 +288,8 @@
                     ed = i;                     \
                 } else {                        \
                     SMREAD();                   \
-                    addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, 0xfff, 0, rex, NULL, 0, D); \
-                    LDRB_U12(i, wback, fixedaddress); \
+                    addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, &unscaled, 0xfff, 0, rex, NULL, 0, D); \
+                    LDB(i, wback, fixedaddress);\
                     wb1 = 1;                    \
                     ed = i;                     \
                 }
@@ -286,10 +308,10 @@
                     ed = i;                     \
                 } else {                        \
                     SMREAD();                   \
-                    addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, 0xfff, 0, rex, NULL, 0, D); \
+                    addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, &unscaled, 0xfff, 0, rex, NULL, 0, D); \
                     ADDx_REG(x3, wback, i);     \
                     if(wback!=x3) wback = x3;   \
-                    LDRB_U12(i, wback, fixedaddress);      \
+                    LDB(i, wback, fixedaddress);\
                     wb1 = 1;                    \
                     ed = i;                     \
                 }
@@ -308,8 +330,8 @@
                     ed = i;                     \
                 } else {                        \
                     SMREAD();                   \
-                    addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, 0xfff, 0, rex, NULL, 0, D); \
-                    LDRSBx_U12(i, wback, fixedaddress); \
+                    addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, &unscaled, 0xfff, 0, rex, NULL, 0, D); \
+                    LDSBx(i, wback, fixedaddress); \
                     wb1 = 1;                    \
                     ed = i;                     \
                 }
@@ -328,31 +350,31 @@
                     ed = i;                     \
                 } else {                        \
                     SMREAD();                   \
-                    addr = geted32(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, 0xfff, 0, rex, NULL, 0, D); \
-                    LDRB_U12(i, wback, fixedaddress); \
+                    addr = geted32(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, &unscaled, 0xfff, 0, rex, NULL, 0, D); \
+                    LDB(i, wback, fixedaddress);\
                     wb1 = 1;                    \
                     ed = i;                     \
                 }
 // Write eb (ed) back to original register / memory
-#define EBBACK   if(wb1) {STRB_U12(ed, wback, fixedaddress); SMWRITE();} else {BFIx(wback, ed, wb2, 8);}
+#define EBBACK   if(wb1) {STB(ed, wback, fixedaddress); SMWRITE();} else {BFIx(wback, ed, wb2, 8);}
 //GETGB will use i for gd
 #define GETGB(i)    if(rex.rex) {               \
                         gb1 = xRAX+((nextop&0x38)>>3)+(rex.r<<3);     \
                         gb2 = 0;                \
                     } else {                    \
                         gd = (nextop&0x38)>>3;  \
-                        gb2 = ((gd&4)>>2);      \
+                        gb2 = ((gd&4)<<1);      \
                         gb1 = xRAX+(gd&3);      \
                     }                           \
                     gd = i;                     \
-                    UBFXx(gd, gb1, gb2*8, 8);
-//GETSGB signe extend GB, will use i for gd
+                    UBFXx(gd, gb1, gb2, 8);
+//GETSGB sign extend GB, will use i for gd
 #define GETSGB(i)   if(rex.rex) {               \
                         gb1 = xRAX+((nextop&0x38)>>3)+(rex.r<<3);     \
                         gb2 = 0;                \
                     } else {                    \
                         gd = (nextop&0x38)>>3;  \
-                        gb2 = ((gd&4)>>2);      \
+                        gb2 = ((gd&4)<<1);      \
                         gb1 = xRAX+(gd&3);      \
                     }                           \
                     gd = i;                     \
@@ -379,15 +401,15 @@
         a = sse_get_reg(dyn, ninst, x1, (nextop&7)+(rex.b<<3), w);                                      \
     } else {                                                                                            \
         SMREAD();                                                                                       \
-        addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0xfff<<4, 15, rex, NULL, 0, D);  \
+        addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, &unscaled, 0xfff<<4, 15, rex, NULL, 0, D);  \
         a = fpu_get_scratch(dyn);                                                                       \
-        VLDR128_U12(a, ed, fixedaddress);                                                               \
+        VLD128(a, ed, fixedaddress);                                                                    \
     }
 
 // Put Back EX if it was a memory and not an emm register
 #define PUTEX(a)                                    \
     if(!MODREG) {                                   \
-        VSTR128_U12(a, ed, fixedaddress);           \
+        VST128(a, ed, fixedaddress);                \
         SMWRITE2();                                 \
     }
 
@@ -399,10 +421,13 @@
     } else {                                                                                            \
         SMREAD();                                                                                       \
         a = fpu_get_scratch(dyn);                                                                       \
-        addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0xfff<<3, 7, rex, NULL, 0, D);   \
-        VLDR64_U12(a, ed, fixedaddress);                                                                \
+        addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, &unscaled, 0xfff<<3, 7, rex, NULL, 0, D);   \
+        VLD64(a, ed, fixedaddress);                                                                     \
     }
 
+// Get Ex as 64bits, not a quad (warning, x1 get used)
+#define GETEX64(a, w, D)    GETEXSD(a, w, D)
+
 // Get Ex as a single, not a quad (warning, x1 get used)
 #define GETEXSS(a, w, D)                                                                                \
     if(MODREG) {                                                                                        \
@@ -410,8 +435,22 @@
     } else {                                                                                            \
         SMREAD();                                                                                       \
         a = fpu_get_scratch(dyn);                                                                       \
-        addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0xfff<<2, 3, rex, NULL, 0, D);   \
-        VLDR32_U12(a, ed, fixedaddress);                                                                \
+        addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, &unscaled, 0xfff<<2, 3, rex, NULL, 0, D);   \
+        VLD32(a, ed, fixedaddress);                                                                     \
+    }
+
+// Get Ex as 32bits, not a quad (warning, x1 get used)
+#define GETEX32(a, w, D)    GETEXSS(a, w, D)
+
+// Get Ex as 16bits, not a quad (warning, x1 get used)
+#define GETEX16(a, w, D)                                                                                \
+    if(MODREG) {                                                                                        \
+        a = sse_get_reg(dyn, ninst, x1, (nextop&7)+(rex.b<<3), w);                                      \
+    } else {                                                                                            \
+        SMREAD();                                                                                       \
+        a = fpu_get_scratch(dyn);                                                                       \
+        addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, &unscaled, 0xfff<<1, 1, rex, NULL, 0, D);   \
+        VLD16(a, ed, fixedaddress);                                                                     \
     }
 
 // Get GM, might use x1, x2 and x3
@@ -425,15 +464,15 @@
         a = mmx_get_reg(dyn, ninst, x1, x2, x3, (nextop&7));    \
     } else {                                                    \
         SMREAD();                                               \
-        addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0xfff<<3, 7, rex, NULL, 0, D); \
+        addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, &unscaled, 0xfff<<3, 7, rex, NULL, 0, D); \
         a = fpu_get_scratch(dyn);                               \
-        VLDR64_U12(a, ed, fixedaddress);                        \
+        VLD64(a, ed, fixedaddress);                             \
     }
 
 // Put Back EM if it was a memory and not an emm register
 #define PUTEM(a)                            \
     if(!MODREG) {                           \
-        VSTR64_U12(a, ed, fixedaddress);    \
+        VST64(a, ed, fixedaddress);         \
         SMWRITE2();                         \
     }
 
@@ -445,6 +484,9 @@
     TSTw_mask(xFlags, 0b010110, 0); \
     CNEGx(r, r, cNE)
 
+#define ALIGNED_ATOMICxw ((fixedaddress && !(fixedaddress&((1<<(2+rex.w)-1)))) || box64_dynarec_aligned_atomics)
+#define ALIGNED_ATOMICH ((fixedaddress && !(fixedaddress&1)) || box64_dynarec_aligned_atomics)
+
 // CALL will use x7 for the call address. Return value can be put in ret (unless ret is -1)
 // R0 will not be pushed/popd if ret is -2
 #define CALL(F, ret) call_c(dyn, ninst, F, x7, ret, 1, 0)
@@ -455,17 +497,19 @@
 // R0 will not be pushed/popd if ret is -2. Flags are not save/restored
 #define CALL_S(F, ret) call_c(dyn, ninst, F, x7, ret, 0, 0)
 
-#define MARK    dyn->insts[ninst].mark = dyn->native_size
-#define GETMARK dyn->insts[ninst].mark
-#define MARK2   dyn->insts[ninst].mark2 = dyn->native_size
-#define GETMARK2 dyn->insts[ninst].mark2
-#define MARK3   dyn->insts[ninst].mark3 = dyn->native_size
-#define GETMARK3 dyn->insts[ninst].mark3
-#define MARKF   dyn->insts[ninst].markf = dyn->native_size
-#define GETMARKF dyn->insts[ninst].markf
-#define MARKSEG dyn->insts[ninst].markseg = dyn->native_size
-#define GETMARKSEG dyn->insts[ninst].markseg
-#define MARKLOCK dyn->insts[ninst].marklock = dyn->native_size
+#define MARK        dyn->insts[ninst].mark = dyn->native_size
+#define GETMARK     dyn->insts[ninst].mark
+#define MARK2       dyn->insts[ninst].mark2 = dyn->native_size
+#define GETMARK2    dyn->insts[ninst].mark2
+#define MARK3       dyn->insts[ninst].mark3 = dyn->native_size
+#define GETMARK3    dyn->insts[ninst].mark3
+#define MARKF       dyn->insts[ninst].markf = dyn->native_size
+#define GETMARKF    dyn->insts[ninst].markf
+#define MARKF2      dyn->insts[ninst].markf2 = dyn->native_size
+#define GETMARKF2   dyn->insts[ninst].markf2
+#define MARKSEG     dyn->insts[ninst].markseg = dyn->native_size
+#define GETMARKSEG  dyn->insts[ninst].markseg
+#define MARKLOCK    dyn->insts[ninst].marklock = dyn->native_size
 #define GETMARKLOCK dyn->insts[ninst].marklock
 
 // Branch to MARK if cond (use j64)
@@ -504,6 +548,10 @@
 #define B_MARK2_nocond              \
     j64 = GETMARK2-(dyn->native_size); \
     B(j64)
+// Branch to MARK2 if reg is 0 (use j64)
+#define CBZx_MARK2(reg)             \
+    j64 = GETMARK2-(dyn->native_size); \
+    CBZx(reg, j64)
 // Branch to MARK2 if reg is not 0 (use j64)
 #define CBNZx_MARK2(reg)            \
     j64 = GETMARK2-(dyn->native_size); \
@@ -717,8 +765,39 @@
     LDP_REGS(R12, R13);     \
     LDP_REGS(R14, R15)
 
-#define SET_DFNONE(S)    if(!dyn->f.dfnone) {MOVZw(S, d_none); STRw_U12(S, xEmu, offsetof(x64emu_t, df)); dyn->f.dfnone=1;}
-#define SET_DF(S, N)     if((N)!=d_none) {MOVZw(S, (N)); STRw_U12(S, xEmu, offsetof(x64emu_t, df)); dyn->f.dfnone=0;} else SET_DFNONE(S)
+#define X87_PUSH_OR_FAIL(var, dyn, ninst, scratch, t) \
+    if (dyn->n.stack == +8) {                         \
+        *ok = 0;                                      \
+        break;                                        \
+    }                                                 \
+    var = x87_do_push(dyn, ninst, scratch, t);
+
+#define X87_PUSH_EMPTY_OR_FAIL(dyn, ninst, scratch) \
+    if (dyn->n.stack == +8) {                       \
+        *ok = 0;                                    \
+        break;                                      \
+    }                                               \
+    x87_do_push_empty(dyn, ninst, scratch);
+
+#define X87_POP_OR_FAIL(dyn, ninst, scratch) \
+    if (dyn->n.stack == -8) {                \
+        *ok = 0;                             \
+        break;                               \
+    }                                        \
+    x87_do_pop(dyn, ninst, scratch);
+
+#define SET_DFNONE(S)    if(!dyn->f.dfnone) {STRw_U12(wZR, xEmu, offsetof(x64emu_t, df)); dyn->f.dfnone=1;}
+#define SET_DF(S, N)        \
+    if((N)!=d_none) {       \
+        MOVZw(S, (N));      \
+        STRw_U12(S, xEmu, offsetof(x64emu_t, df)); \
+        if(dyn->f.pending==SF_PENDING && dyn->insts[ninst].x64.need_after && !(dyn->insts[ninst].x64.need_after&X_PEND)) {  \
+            CALL_(UpdateFlags, -1, 0);              \
+            dyn->f.pending = SF_SET;                \
+            SET_NODF();     \
+        }                   \
+        dyn->f.dfnone=0;    \
+    } else SET_DFNONE(S)
 #define SET_NODF()          dyn->f.dfnone = 0
 #define SET_DFOK()          dyn->f.dfnone = 1
 
@@ -759,17 +838,20 @@
     } else dyn->f.pending = SF_SET
 #endif
 #ifndef JUMP
-#define JUMP(A, C) 
+#define JUMP(A, C) SMEND()
 #endif
 #ifndef BARRIER
-#define BARRIER(A) 
+#define BARRIER(A)
 #endif
 #ifndef BARRIER_NEXT
 #define BARRIER_NEXT(A)
 #endif
+#ifndef SET_HASCALLRET
+#define SET_HASCALLRET()
+#endif
 #define UFLAG_OP1(A) if(dyn->insts[ninst].x64.gen_flags) {STRxw_U12(A, xEmu, offsetof(x64emu_t, op1));}
 #define UFLAG_OP2(A) if(dyn->insts[ninst].x64.gen_flags) {STRxw_U12(A, xEmu, offsetof(x64emu_t, op2));}
-#define UFLAG_OP12(A1, A2) if(dyn->insts[ninst].x64.gen_flags) {STRxw_U12(A1, xEmu, offsetof(x64emu_t, op1));STRxw_U12(A2, 0, offsetof(x64emu_t, op2));}
+#define UFLAG_OP12(A1, A2) if(dyn->insts[ninst].x64.gen_flags) {STRxw_U12(A1, xEmu, offsetof(x64emu_t, op1));STRxw_U12(A2, xEmu, offsetof(x64emu_t, op2));}
 #define UFLAG_RES(A) if(dyn->insts[ninst].x64.gen_flags) {STRxw_U12(A, xEmu, offsetof(x64emu_t, res));}
 #define UFLAG_DF(r, A) if(dyn->insts[ninst].x64.gen_flags) {SET_DF(r, A)}
 #define UFLAG_IF if(dyn->insts[ninst].x64.gen_flags)
@@ -786,6 +868,10 @@
 #define FTABLE64(A, V)
 #endif
 
+#define ARCH_INIT()         \
+    dyn->doublepush = 0;    \
+    dyn->doublepop = 0;
+
 #if STEP < 2
 #define GETIP(A)
 #define GETIP_(A)
@@ -828,7 +914,7 @@
 
 #define MODREG  ((nextop&0xC0)==0xC0)
 
-void arm64_epilog();
+void arm64_epilog(void);
 void* arm64_next(x64emu_t* emu, uintptr_t addr);
 
 #ifndef STEPNAME
@@ -845,6 +931,8 @@ void* arm64_next(x64emu_t* emu, uintptr_t addr);
 #define dynarec64_65       STEPNAME(dynarec64_65)
 #define dynarec64_66       STEPNAME(dynarec64_66)
 #define dynarec64_67       STEPNAME(dynarec64_67)
+#define dynarec64_67_32    STEPNAME(dynarec64_67_32)
+#define dynarec64_6764_32  STEPNAME(dynarec64_6764_32)
 #define dynarec64_D8       STEPNAME(dynarec64_D8)
 #define dynarec64_D9       STEPNAME(dynarec64_D9)
 #define dynarec64_DA       STEPNAME(dynarec64_DA)
@@ -855,6 +943,8 @@ void* arm64_next(x64emu_t* emu, uintptr_t addr);
 #define dynarec64_DF       STEPNAME(dynarec64_DF)
 #define dynarec64_F0       STEPNAME(dynarec64_F0)
 #define dynarec64_660F     STEPNAME(dynarec64_660F)
+#define dynarec64_66F20F   STEPNAME(dynarec64_66F20F)
+#define dynarec64_66F30F   STEPNAME(dynarec64_66F30F)
 #define dynarec64_6664     STEPNAME(dynarec64_6664)
 #define dynarec64_66F0     STEPNAME(dynarec64_66F0)
 #define dynarec64_F20F     STEPNAME(dynarec64_F20F)
@@ -936,16 +1026,38 @@ void* arm64_next(x64emu_t* emu, uintptr_t addr);
 #define emit_shr32      STEPNAME(emit_shr32)
 #define emit_shr32c     STEPNAME(emit_shr32c)
 #define emit_sar32c     STEPNAME(emit_sar32c)
+#define emit_shl8       STEPNAME(emit_shl8)
+#define emit_shl8c      STEPNAME(emit_shl8c)
+#define emit_shr8       STEPNAME(emit_shr8)
+#define emit_shr8c      STEPNAME(emit_shr8c)
+#define emit_sar8       STEPNAME(emit_sar8)
+#define emit_sar8c      STEPNAME(emit_sar8c)
+#define emit_shl16      STEPNAME(emit_shl16)
+#define emit_shl16c     STEPNAME(emit_shl16c)
+#define emit_shr16      STEPNAME(emit_shr16)
+#define emit_shr16c     STEPNAME(emit_shr16c)
+#define emit_sar16      STEPNAME(emit_sar16)
+#define emit_sar16c     STEPNAME(emit_sar16c)
 #define emit_rol32c     STEPNAME(emit_rol32c)
 #define emit_ror32c     STEPNAME(emit_ror32c)
+#define emit_rol8c      STEPNAME(emit_rol8c)
+#define emit_ror8c      STEPNAME(emit_ror8c)
+#define emit_rol16c     STEPNAME(emit_rol16c)
+#define emit_ror16c     STEPNAME(emit_ror16c)
 #define emit_shrd32c    STEPNAME(emit_shrd32c)
+#define emit_shrd32     STEPNAME(emit_shrd32)
 #define emit_shld32c    STEPNAME(emit_shld32c)
+#define emit_shld32     STEPNAME(emit_shld32)
+#define emit_shrd16c    STEPNAME(emit_shrd16c)
+#define emit_shrd16     STEPNAME(emit_shrd16)
+#define emit_shld16c    STEPNAME(emit_shld16c)
+#define emit_shld16     STEPNAME(emit_shld16)
 
 #define emit_pf         STEPNAME(emit_pf)
 
-#define x87_do_push     STEPNAME(x87_do_push)
-#define x87_do_push_empty STEPNAME(x87_do_push_empty)
-#define x87_do_pop      STEPNAME(x87_do_pop)
+#define x87_do_push         STEPNAME(x87_do_push)
+#define x87_do_push_empty   STEPNAME(x87_do_push_empty)
+#define x87_do_pop          STEPNAME(x87_do_pop)
 #define x87_get_current_cache   STEPNAME(x87_get_current_cache)
 #define x87_get_cache   STEPNAME(x87_get_cache)
 #define x87_get_neoncache STEPNAME(x87_get_neoncache)
@@ -955,6 +1067,7 @@ void* arm64_next(x64emu_t* emu, uintptr_t addr);
 #define x87_forget      STEPNAME(x87_forget)
 #define x87_reget_st    STEPNAME(x87_reget_st)
 #define x87_stackcount  STEPNAME(x87_stackcount)
+#define x87_unstackcount  STEPNAME(x87_unstackcount)
 #define x87_swapreg     STEPNAME(x87_swapreg)
 #define x87_setround    STEPNAME(x87_setround)
 #define x87_restoreround STEPNAME(x87_restoreround)
@@ -965,34 +1078,36 @@ void* arm64_next(x64emu_t* emu, uintptr_t addr);
 #define sse_get_reg_empty STEPNAME(sse_get_reg_empty)
 #define sse_forget_reg   STEPNAME(sse_forget_reg)
 #define sse_purge07cache STEPNAME(sse_purge07cache)
+#define sse_reflect_reg  STEPNAME(sse_reflect_reg)
 
 #define fpu_pushcache   STEPNAME(fpu_pushcache)
 #define fpu_popcache    STEPNAME(fpu_popcache)
 #define fpu_reset       STEPNAME(fpu_reset)
+#define fpu_reset_cache STEPNAME(fpu_reset_cache)
+#define fpu_propagate_stack STEPNAME(fpu_propagate_stack)
 #define fpu_purgecache  STEPNAME(fpu_purgecache)
 #define mmx_purgecache  STEPNAME(mmx_purgecache)
 #define x87_purgecache  STEPNAME(x87_purgecache)
-#ifdef HAVE_TRACE
 #define fpu_reflectcache STEPNAME(fpu_reflectcache)
-#endif
+#define fpu_unreflectcache STEPNAME(fpu_unreflectcache)
 
 #define CacheTransform       STEPNAME(CacheTransform)
 
 /* setup r2 to address pointed by */
-uintptr_t geted(dynarec_arm_t* dyn, uintptr_t addr, int ninst, uint8_t nextop, uint8_t* ed, uint8_t hint, int64_t* fixaddress, int absmax, uint32_t mask, rex_t rex, int* l, int s, int delta);
+uintptr_t geted(dynarec_arm_t* dyn, uintptr_t addr, int ninst, uint8_t nextop, uint8_t* ed, uint8_t hint, int64_t* fixaddress, int* unscaled, int absmax, uint32_t mask, rex_t rex, int* l, int s, int delta);
 
 /* setup r2 to address pointed by */
-uintptr_t geted32(dynarec_arm_t* dyn, uintptr_t addr, int ninst, uint8_t nextop, uint8_t* ed, uint8_t hint, int64_t* fixaddress, int absmax, uint32_t mask, rex_t rex, int* l, int s, int delta);
+uintptr_t geted32(dynarec_arm_t* dyn, uintptr_t addr, int ninst, uint8_t nextop, uint8_t* ed, uint8_t hint, int64_t* fixaddress, int* unscaled, int absmax, uint32_t mask, rex_t rex, int* l, int s, int delta);
 
 /* setup r2 to address pointed by */
-uintptr_t geted16(dynarec_arm_t* dyn, uintptr_t addr, int ninst, uint8_t nextop, uint8_t* ed, uint8_t hint, int64_t* fixaddress, int absmax, uint32_t mask, int s);
+uintptr_t geted16(dynarec_arm_t* dyn, uintptr_t addr, int ninst, uint8_t nextop, uint8_t* ed, uint8_t hint, int64_t* fixaddress, int* unscaled, int absmax, uint32_t mask, int s);
 
 
 // generic x64 helper
 void jump_to_epilog(dynarec_arm_t* dyn, uintptr_t ip, int reg, int ninst);
 void jump_to_next(dynarec_arm_t* dyn, uintptr_t ip, int reg, int ninst);
-void ret_to_epilog(dynarec_arm_t* dyn, int ninst);
-void retn_to_epilog(dynarec_arm_t* dyn, int ninst, int n);
+void ret_to_epilog(dynarec_arm_t* dyn, int ninst, rex_t rex);
+void retn_to_epilog(dynarec_arm_t* dyn, int ninst, rex_t rex, int n);
 void iret_to_epilog(dynarec_arm_t* dyn, int ninst, int is64bits);
 void call_c(dynarec_arm_t* dyn, int ninst, void* fnc, int reg, int ret, int saveflags, int save_reg);
 void call_n(dynarec_arm_t* dyn, int ninst, void* fnc, int w);
@@ -1005,7 +1120,7 @@ void emit_cmp16_0(dynarec_arm_t* dyn, int ninst, int s1, int s3, int s4);
 void emit_cmp32_0(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int s3, int s4);
 void emit_test8(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4, int s5);
 void emit_test16(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4, int s5);
-void emit_test32(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int s2, int s3, int s4);
+void emit_test32(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int s2, int s3, int s4, int s5);
 void emit_add32(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int s2, int s3, int s4);
 void emit_add32c(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int64_t c, int s3, int s4, int s5);
 void emit_add8(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4);
@@ -1062,16 +1177,40 @@ void emit_shl32c(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, uint32_t c, i
 void emit_shr32(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int s2, int s3, int s4);
 void emit_shr32c(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, uint32_t c, int s3, int s4);
 void emit_sar32c(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, uint32_t c, int s3, int s4);
+void emit_shl8(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4);
+void emit_shl8c(dynarec_arm_t* dyn, int ninst, int s1, uint32_t c, int s3, int s4);
+void emit_shr8(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4);
+void emit_shr8c(dynarec_arm_t* dyn, int ninst, int s1, uint32_t c, int s3, int s4);
+void emit_sar8(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4);
+void emit_sar8c(dynarec_arm_t* dyn, int ninst, int s1, uint32_t c, int s3, int s4);
+void emit_shl16(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4);
+void emit_shl16c(dynarec_arm_t* dyn, int ninst, int s1, uint32_t c, int s3, int s4);
+void emit_shr16(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4);
+void emit_shr16c(dynarec_arm_t* dyn, int ninst, int s1, uint32_t c, int s3, int s4);
+void emit_sar16(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4);
+void emit_sar16c(dynarec_arm_t* dyn, int ninst, int s1, uint32_t c, int s3, int s4);
 void emit_rol32c(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, uint32_t c, int s3, int s4);
 void emit_ror32c(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, uint32_t c, int s3, int s4);
+void emit_rol8c(dynarec_arm_t* dyn, int ninst, int s1, uint32_t c, int s3, int s4);
+void emit_ror8c(dynarec_arm_t* dyn, int ninst, int s1, uint32_t c, int s3, int s4);
+void emit_rol16c(dynarec_arm_t* dyn, int ninst, int s1, uint32_t c, int s3, int s4);
+void emit_ror16c(dynarec_arm_t* dyn, int ninst, int s1, uint32_t c, int s3, int s4);
 void emit_shrd32c(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int s2, uint32_t c, int s3, int s4);
 void emit_shld32c(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int s2, uint32_t c, int s3, int s4);
+void emit_shrd32(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int s2, int s5, int s3, int s4);
+void emit_shld32(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int s2, int s5, int s3, int s4);
+void emit_shrd16c(dynarec_arm_t* dyn, int ninst, int s1, int s2, uint32_t c, int s3, int s4);
+void emit_shrd16(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s5, int s3, int s4);
+void emit_shld16c(dynarec_arm_t* dyn, int ninst, int s1, int s2, uint32_t c, int s3, int s4);
+void emit_shld16(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s5, int s3, int s4);
 
 void emit_pf(dynarec_arm_t* dyn, int ninst, int s1, int s3, int s4);
 
 // x87 helper
-// cache of the local stack counter, to avoid upadte at every call
-void x87_stackcount(dynarec_arm_t* dyn, int ninst, int scratch);
+// cache of the local stack counter, to avoid update at every call, return old internal stack counter
+int x87_stackcount(dynarec_arm_t* dyn, int ninst, int scratch);
+// revert local stack counter to previous version (return from x87_stackcount)
+void x87_unstackcount(dynarec_arm_t* dyn, int ninst, int scratch, int count);
 // fpu push. Return the Dd value to be used
 int x87_do_push(dynarec_arm_t* dyn, int ninst, int s1, int t);
 // fpu push. Do not allocate a cache register. Needs a scratch register to do x87stack synch (or 0 to not do it)
@@ -1116,16 +1255,19 @@ int neoncache_st_coherency(dynarec_arm_t* dyn, int ninst, int a, int b);
 
 #if STEP == 0
 #define ST_IS_F(A)          0
+#define ST_IS_I64(A)        0
 #define X87_COMBINE(A, B)   NEON_CACHE_ST_D
 #define X87_ST0             NEON_CACHE_ST_D
 #define X87_ST(A)           NEON_CACHE_ST_D
 #elif STEP == 1
 #define ST_IS_F(A) (neoncache_get_current_st(dyn, ninst, A)==NEON_CACHE_ST_F)
+#define ST_IS_I64(A) (neoncache_get_current_st(dyn, ninst, A)==NEON_CACHE_ST_I64)
 #define X87_COMBINE(A, B) neoncache_combine_st(dyn, ninst, A, B)
-#define X87_ST0     neoncache_get_current_st(dyn, ninst, 0)
-#define X87_ST(A)   neoncache_get_current_st(dyn, ninst, A)
+#define X87_ST0     neoncache_no_i64(dyn, ninst, 0, neoncache_get_current_st(dyn, ninst, 0))
+#define X87_ST(A)   neoncache_no_i64(dyn, ninst, A, neoncache_get_current_st(dyn, ninst, A))
 #else
 #define ST_IS_F(A) (neoncache_get_st(dyn, ninst, A)==NEON_CACHE_ST_F)
+#define ST_IS_I64(A) (neoncache_get_st(dyn, ninst, A)==NEON_CACHE_ST_I64)
 #if STEP == 3
 #define X87_COMBINE(A, B) neoncache_st_coherency(dyn, ninst, A, B)
 #else
@@ -1150,19 +1292,23 @@ int sse_get_reg_empty(dynarec_arm_t* dyn, int ninst, int s1, int a);
 void sse_forget_reg(dynarec_arm_t* dyn, int ninst, int a);
 // purge the XMM0..XMM7 cache (before function call)
 void sse_purge07cache(dynarec_arm_t* dyn, int ninst, int s1);
-
+// Push current value to the cache
+void sse_reflect_reg(dynarec_arm_t* dyn, int ninst, int a);
 // common coproc helpers
 // reset the cache
 void fpu_reset(dynarec_arm_t* dyn);
+// reset the cache with n
+void fpu_reset_cache(dynarec_arm_t* dyn, int ninst, int reset_n);
+// propagate stack state
+void fpu_propagate_stack(dynarec_arm_t* dyn, int ninst);
 // purge the FPU cache (needs 3 scratch registers)
 void fpu_purgecache(dynarec_arm_t* dyn, int ninst, int next, int s1, int s2, int s3);
 // purge MMX cache
 void mmx_purgecache(dynarec_arm_t* dyn, int ninst, int next, int s1);
 // purge x87 cache
 void x87_purgecache(dynarec_arm_t* dyn, int ninst, int next, int s1, int s2, int s3);
-#ifdef HAVE_TRACE
 void fpu_reflectcache(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3);
-#endif
+void fpu_unreflectcache(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3);
 void fpu_pushcache(dynarec_arm_t* dyn, int ninst, int s1, int not07);
 void fpu_popcache(dynarec_arm_t* dyn, int ninst, int s1, int not07);
 
@@ -1172,16 +1318,20 @@ uintptr_t dynarec64_64(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
 //uintptr_t dynarec64_65(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep,int* ok, int* need_epilog);
 uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int* ok, int* need_epilog);
 uintptr_t dynarec64_67(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int* ok, int* need_epilog);
+uintptr_t dynarec64_67_32(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int* ok, int* need_epilog);
+uintptr_t dynarec64_6764_32(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int seg, int* ok, int* need_epilog);
 uintptr_t dynarec64_D8(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int* ok, int* need_epilog);
 uintptr_t dynarec64_D9(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int* ok, int* need_epilog);
-//uintptr_t dynarec64_DA(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int* ok, int* need_epilog);
+uintptr_t dynarec64_DA(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int* ok, int* need_epilog);
 uintptr_t dynarec64_DB(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int* ok, int* need_epilog);
 uintptr_t dynarec64_DC(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int* ok, int* need_epilog);
 uintptr_t dynarec64_DD(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int* ok, int* need_epilog);
 uintptr_t dynarec64_DE(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int* ok, int* need_epilog);
 uintptr_t dynarec64_DF(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int* ok, int* need_epilog);
 uintptr_t dynarec64_F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int* ok, int* need_epilog);
-uintptr_t dynarec64_660F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int* ok, int* need_epilog);
+uintptr_t dynarec64_66F20F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int* ok, int* need_epilog);
+uintptr_t dynarec64_66F30F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int* ok, int* need_epilog);
+uintptr_t dynarec64_660F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int* ok, int* need_epilog);
 uintptr_t dynarec64_6664(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int seg, int* ok, int* need_epilog);
 uintptr_t dynarec64_66F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int* ok, int* need_epilog);
 uintptr_t dynarec64_F20F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int* ok, int* need_epilog);
@@ -1202,7 +1352,7 @@ uintptr_t dynarec64_F30F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
 #if STEP < 3
 #define MAYUSE(A)   (void)A
 #else
-#define MAYUSE(A)   
+#define MAYUSE(A)
 #endif
 
 #define GOCOND(B, T1, T2)                                   \
@@ -1295,4 +1445,53 @@ uintptr_t dynarec64_F30F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
             , cNE, cEQ, X_SF|X_OF|X_ZF)                     \
         break
 
+#define NOTEST(s1)                                          \
+    if(box64_dynarec_test) {                                \
+        STRw_U12(xZR, xEmu, offsetof(x64emu_t, test.test)); \
+        STRw_U12(xZR, xEmu, offsetof(x64emu_t, test.clean));\
+    }
+#define SKIPTEST(s1)                                        \
+    if(box64_dynarec_test) {                                \
+        STRw_U12(xZR, xEmu, offsetof(x64emu_t, test.clean));\
+    }
+#define GOTEST(s1, s2)                                      \
+    if(box64_dynarec_test) {                                \
+        MOV32w(s2, 1);                                      \
+        STRw_U12(s2, xEmu, offsetof(x64emu_t, test.test));  \
+    }
+
+#define GETREX()                                \
+    rex.rex = 0;                                \
+    if(!rex.is32bits)                           \
+        while(opcode>=0x40 && opcode<=0x4f) {   \
+            rex.rex = opcode;                   \
+            opcode = F8;                        \
+        }
+
+#define COMP_ZFSF(s1, A)                        \
+    IFX(X_ZF|X_SF) {                            \
+        if(arm64_flagm) {                       \
+            SETF##A(s1);                        \
+            IFX(X_ZF) {                         \
+                CSETw(s3, cEQ);                 \
+                BFIw(xFlags, s3, F_ZF, 1);      \
+            }                                   \
+            IFX(X_SF) {                         \
+                CSETw(s3, cMI);                 \
+                BFIw(xFlags, s3, F_SF, 1);      \
+            }                                   \
+        } else {                                \
+            IFX(X_ZF) {                         \
+                ANDSw_mask(s1, s1, 0, (A)-1);   \
+                CSETw(s3, cEQ);                 \
+                BFIw(xFlags, s3, F_ZF, 1);      \
+            }                                   \
+            IFX(X_SF) {                         \
+                LSRw(s3, s1, (A)-1);            \
+                BFIw(xFlags, s3, F_SF, 1);      \
+            }                                   \
+        }                                       \
+    }
+
+
 #endif //__DYNAREC_ARM64_HELPER_H__

src/dynarec/arm64/dynarec_arm64_pass0.h

@@ -16,13 +16,14 @@
         dyn->f.pending=(B)&SF_SET_PENDING;      \
         dyn->f.dfnone=((B)&SF_SET)?1:0;
 #define EMIT(A)     
-#define JUMP(A, C)         add_next(dyn, (uintptr_t)A); dyn->insts[ninst].x64.jmp = A; dyn->insts[ninst].x64.jmp_cond = C
+#define JUMP(A, C)         add_jump(dyn, ninst); add_next(dyn, (uintptr_t)A); SMEND(); dyn->insts[ninst].x64.jmp = A; dyn->insts[ninst].x64.jmp_cond = C
 #define BARRIER(A)      if(A!=BARRIER_MAYBE) {fpu_purgecache(dyn, ninst, 0, x1, x2, x3); dyn->insts[ninst].x64.barrier = A;} else dyn->insts[ninst].barrier_maybe = 1
-#define BARRIER_NEXT(A) dyn->insts[ninst+1].x64.barrier = A
+#define BARRIER_NEXT(A) dyn->insts[ninst].x64.barrier_next = A
+#define SET_HASCALLRET()    dyn->insts[ninst].x64.has_callret = 1
 #define NEW_INST \
         ++dyn->size;                            \
         if(dyn->size+3>=dyn->cap) {             \
-                dyn->insts = (instruction_native_t*)customRealloc(dyn->insts, sizeof(instruction_native_t)*dyn->cap*2);\
+                dyn->insts = (instruction_native_t*)dynaRealloc(dyn->insts, sizeof(instruction_native_t)*dyn->cap*2);\
                 memset(&dyn->insts[dyn->cap], 0, sizeof(instruction_native_t)*dyn->cap);   \
                 dyn->cap *= 2;                  \
         }                                       \
@@ -40,9 +41,10 @@
 #define DEFAULT                         \
         --dyn->size;                    \
         *ok = -1;                       \
-        if(box64_dynarec_log>=LOG_INFO) {\
-        dynarec_log(LOG_NONE, "%p: Dynarec stopped because of Opcode %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X", \
-        (void*)ip, PKip(0),             \
+        if(box64_dynarec_log>=LOG_INFO || box64_dynarec_dump || box64_dynarec_missing) {\
+        dynarec_log(LOG_NONE, "%p: Dynarec stopped because of %sOpcode %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X", \
+        (void*)ip, rex.is32bits?"32bits ":"",\
+        PKip(0),                        \
         PKip(1), PKip(2), PKip(3),      \
         PKip(4), PKip(5), PKip(6),      \
         PKip(7), PKip(8), PKip(9),      \

src/dynarec/arm64/dynarec_arm64_pass2.h

@@ -2,19 +2,17 @@
 #define FINI                                                                                            \
         if(ninst) {                                                                                     \
                 dyn->insts[ninst].address = (dyn->insts[ninst-1].address+dyn->insts[ninst-1].size);     \
-                dyn->insts_size += 1+((dyn->insts[ninst].x64.size>dyn->insts[ninst].size)?dyn->insts[ninst].x64.size:dyn->insts[ninst].size)/15; \
+                dyn->insts_size += 1+((dyn->insts[ninst].x64.size>(dyn->insts[ninst].size/4))?dyn->insts[ninst].x64.size:(dyn->insts[ninst].size/4))/15; \
         }
 
 #define MESSAGE(A, ...)  
-#define EMIT(A)     dyn->insts[ninst].size+=4; dyn->native_size+=4
+#define EMIT(A)     do{dyn->insts[ninst].size+=4; dyn->native_size+=4;}while(0)
 #define NEW_INST                                                                                        \
         if(ninst) {                                                                                     \
                 dyn->insts[ninst].address = (dyn->insts[ninst-1].address+dyn->insts[ninst-1].size);     \
-                if(isInstClean(dyn, ninst) && dyn->last_ip!=ip)                                         \
-                        dyn->last_ip = 0;                                                               \
-                dyn->insts_size += 1+((dyn->insts[ninst-1].x64.size>dyn->insts[ninst-1].size)?dyn->insts[ninst-1].x64.size:dyn->insts[ninst-1].size)/15; \
+                dyn->insts_size += 1+((dyn->insts[ninst-1].x64.size>(dyn->insts[ninst-1].size/4))?dyn->insts[ninst-1].x64.size:(dyn->insts[ninst-1].size/4))/15; \
         }
 #define INST_EPILOG dyn->insts[ninst].epilog = dyn->native_size; 
 #define INST_NAME(name) 
-#define TABLE64(A, V)   {Table64(dyn, (V)); EMIT(0);}
-#define FTABLE64(A, V)  {mmx87_regs_t v = {.d = V}; Table64(dyn, v.q); EMIT(0);}
+#define TABLE64(A, V)   {Table64(dyn, (V), 2); EMIT(0);}
+#define FTABLE64(A, V)  {mmx87_regs_t v = {.d = V}; Table64(dyn, v.q, 2); EMIT(0);}

src/dynarec/arm64/dynarec_arm64_pass3.h

@@ -3,68 +3,20 @@
     if(ninst)       \
         addInst(dyn->instsize, &dyn->insts_size, dyn->insts[ninst].x64.size, dyn->insts[ninst].size/4); \
     addInst(dyn->instsize, &dyn->insts_size, 0, 0);
-#define EMIT(A)     \
-    if(box64_dynarec_dump) {dynarec_log(LOG_NONE, "\t%08x\t%s\n", (uint32_t)(A), arm64_print(A, (uintptr_t)dyn->block));} \
-    *(uint32_t*)(dyn->block) = (uint32_t)(A);       \
-    dyn->block += 4; dyn->native_size += 4;         \
-    dyn->insts[ninst].size2 += 4
+#define EMIT(A)                                         \
+    do{                                                 \
+        if(box64_dynarec_dump) print_opcode(dyn, ninst, (uint32_t)(A)); \
+        if((uintptr_t)dyn->block<dyn->tablestart)       \
+            *(uint32_t*)(dyn->block) = (uint32_t)(A);   \
+        dyn->block += 4; dyn->native_size += 4;         \
+        dyn->insts[ninst].size2 += 4;                   \
+    }while(0)
 
 #define MESSAGE(A, ...)  if(box64_dynarec_dump) dynarec_log(LOG_NONE, __VA_ARGS__)
 #define NEW_INST        \
-    if(ninst && isInstClean(dyn, ninst)) {                      \
-        if(dyn->last_ip!=ip) dyn->last_ip = 0;                  \
-    }                                                           \
     if(ninst)                                                   \
         addInst(dyn->instsize, &dyn->insts_size, dyn->insts[ninst-1].x64.size, dyn->insts[ninst-1].size/4);
 #define INST_EPILOG     
-#define INST_NAME(name) \
-    if(box64_dynarec_dump) {\
-        printf_x64_instruction(my_context->dec, &dyn->insts[ninst].x64, name); \
-        dynarec_log(LOG_NONE, "%s%p: %d emited opcodes, inst=%d, barrier=%d state=%d/%d(%d), %s=%X/%X, use=%X, need=%X/%X, sm=%d/%d", \
-            (box64_dynarec_dump>1)?"\e[32m":"", \
-            (void*)(dyn->native_start+dyn->insts[ninst].address),  \
-            dyn->insts[ninst].size/4,           \
-            ninst,                              \
-            dyn->insts[ninst].x64.barrier,      \
-            dyn->insts[ninst].x64.state_flags,  \
-            dyn->f.pending,                     \
-            dyn->f.dfnone,                      \
-            dyn->insts[ninst].x64.may_set?"may":"set",              \
-            dyn->insts[ninst].x64.set_flags,    \
-            dyn->insts[ninst].x64.gen_flags,    \
-            dyn->insts[ninst].x64.use_flags,    \
-            dyn->insts[ninst].x64.need_before,  \
-            dyn->insts[ninst].x64.need_after,   \
-            dyn->smread, dyn->smwrite);         \
-        if(dyn->insts[ninst].pred_sz) {         \
-            dynarec_log(LOG_NONE, ", pred=");   \
-            for(int ii=0; ii<dyn->insts[ninst].pred_sz; ++ii)\
-                dynarec_log(LOG_NONE, "%s%d", ii?"/":"", dyn->insts[ninst].pred[ii]);\
-        }                                       \
-        if(dyn->insts[ninst].x64.jmp && dyn->insts[ninst].x64.jmp_insts>=0)\
-            dynarec_log(LOG_NONE, ", jmp=%d", dyn->insts[ninst].x64.jmp_insts);\
-        if(dyn->insts[ninst].x64.jmp && dyn->insts[ninst].x64.jmp_insts==-1)\
-            dynarec_log(LOG_NONE, ", jmp=out"); \
-        if(dyn->last_ip)                        \
-            dynarec_log(LOG_NONE, ", last_ip=%p", (void*)dyn->last_ip);\
-        for(int ii=0; ii<24; ++ii) {            \
-            switch(dyn->insts[ninst].n.neoncache[ii].t) {    \
-                case NEON_CACHE_ST_D: dynarec_log(LOG_NONE, " D%d:%s", ii, getCacheName(dyn->insts[ninst].n.neoncache[ii].t, dyn->insts[ninst].n.neoncache[ii].n)); break;  \
-                case NEON_CACHE_ST_F: dynarec_log(LOG_NONE, " S%d:%s", ii, getCacheName(dyn->insts[ninst].n.neoncache[ii].t, dyn->insts[ninst].n.neoncache[ii].n)); break;  \
-                case NEON_CACHE_MM: dynarec_log(LOG_NONE, " D%d:%s", ii, getCacheName(dyn->insts[ninst].n.neoncache[ii].t, dyn->insts[ninst].n.neoncache[ii].n)); break;    \
-                case NEON_CACHE_XMMW: dynarec_log(LOG_NONE, " Q%d:%s", ii, getCacheName(dyn->insts[ninst].n.neoncache[ii].t, dyn->insts[ninst].n.neoncache[ii].n)); break;  \
-                case NEON_CACHE_XMMR: dynarec_log(LOG_NONE, " Q%d:%s", ii, getCacheName(dyn->insts[ninst].n.neoncache[ii].t, dyn->insts[ninst].n.neoncache[ii].n)); break;  \
-                case NEON_CACHE_SCR: dynarec_log(LOG_NONE, " D%d:%s", ii, getCacheName(dyn->insts[ninst].n.neoncache[ii].t, dyn->insts[ninst].n.neoncache[ii].n)); break;   \
-                case NEON_CACHE_NONE:           \
-                default:    break;              \
-            }                                   \
-        }                                       \
-        if(dyn->n.stack || dyn->insts[ninst].n.stack_next || dyn->insts[ninst].n.x87stack)     \
-            dynarec_log(LOG_NONE, " X87:%d/%d(+%d/-%d)%d", dyn->n.stack, dyn->insts[ninst].n.stack_next, dyn->insts[ninst].n.stack_push, dyn->insts[ninst].n.stack_pop, dyn->insts[ninst].n.x87stack); \
-        if(dyn->insts[ninst].n.combined1 || dyn->insts[ninst].n.combined2)                     \
-            dynarec_log(LOG_NONE, " %s:%d/%d", dyn->insts[ninst].n.swapped?"SWP":"CMB", dyn->insts[ninst].n.combined1, dyn->insts[ninst].n.combined2);   \
-        dynarec_log(LOG_NONE, "%s\n", (box64_dynarec_dump>1)?"\e[m":"");                       \
-    }
-
-#define TABLE64(A, V)   {int val64offset = Table64(dyn, (V)); MESSAGE(LOG_DUMP, "  Table64: 0x%lx\n", (V)); LDRx_literal(A, val64offset);}
-#define FTABLE64(A, V)  {mmx87_regs_t v = {.d = V}; int val64offset = Table64(dyn, v.q); MESSAGE(LOG_DUMP, "  FTable64: %g\n", v.d); VLDR64_literal(A, val64offset);}
+#define INST_NAME(name) inst_name_pass3(dyn, ninst, name, rex)
+#define TABLE64(A, V)   {int val64offset = Table64(dyn, (V), 3); MESSAGE(LOG_DUMP, "  Table64: 0x%lx\n", (V)); LDRx_literal(A, val64offset);}
+#define FTABLE64(A, V)  {mmx87_regs_t v = {.d = V}; int val64offset = Table64(dyn, v.q, 3); MESSAGE(LOG_DUMP, "  FTable64: %g\n", v.d); VLDR64_literal(A, val64offset);}

src/dynarec/arm64/dynarec_arm64_private.h

@@ -9,13 +9,14 @@ typedef struct instsize_s instsize_t;
 
 #define BARRIER_MAYBE   8
 
-#define NEON_CACHE_NONE 0
-#define NEON_CACHE_ST_D 1
-#define NEON_CACHE_ST_F 2
-#define NEON_CACHE_MM   3
-#define NEON_CACHE_XMMW 4
-#define NEON_CACHE_XMMR 5
-#define NEON_CACHE_SCR  6
+#define NEON_CACHE_NONE     0
+#define NEON_CACHE_ST_D     1
+#define NEON_CACHE_ST_F     2
+#define NEON_CACHE_ST_I64   3
+#define NEON_CACHE_MM       4
+#define NEON_CACHE_XMMW     5
+#define NEON_CACHE_XMMR     6
+#define NEON_CACHE_SCR      7
 typedef union neon_cache_s {
     int8_t           v;
     struct {
@@ -57,27 +58,27 @@ typedef struct neoncache_s {
 
 typedef struct flagcache_s {
     int                 pending;    // is there a pending flags here, or to check?
-    int                 dfnone;     // if defered flags is already set to df_none
+    int                 dfnone;     // if deferred flags is already set to df_none
 } flagcache_t;
 
 typedef struct instruction_arm64_s {
     instruction_x64_t   x64;
-    uintptr_t           address;    // (start) address of the arm emited instruction
+    uintptr_t           address;    // (start) address of the arm emitted instruction
     uintptr_t           epilog;     // epilog of current instruction (can be start of next, or barrier stuff)
-    int                 size;       // size of the arm emited instruction
-    int                 size2;      // size of the arm emited instrucion after pass2
+    int                 size;       // size of the arm emitted instruction
+    int                 size2;      // size of the arm emitted instrucion after pass2
     int                 pred_sz;    // size of predecessor list
     int                 *pred;      // predecessor array
     uintptr_t           mark, mark2, mark3;
-    uintptr_t           markf;
+    uintptr_t           markf, markf2;
     uintptr_t           markseg;
     uintptr_t           marklock;
     int                 pass2choice;// value for choices that are fixed on pass2 for pass3
     uintptr_t           natcall;
     int                 retn;
     int                 barrier_maybe;
-    flagcache_t         f_exit;     // flags status at end of intruction
-    neoncache_t         n;          // neoncache at end of intruction (but before poping)
+    flagcache_t         f_exit;     // flags status at end of instruction
+    neoncache_t         n;          // neoncache at end of instruction (but before poping)
     flagcache_t         f_entry;    // flags status before the instruction begin
 } instruction_arm64_t;
 
@@ -86,47 +87,56 @@ typedef struct dynarec_arm_s {
     int32_t             size;
     int32_t             cap;
     uintptr_t           start;      // start of the block
-    uint32_t            isize;      // size in byte of x64 instructions included
-    void*               block;      // memory pointer where next instruction is emited
+    uint32_t            isize;      // size in bytes of x64 instructions included
+    void*               block;      // memory pointer where next instruction is emitted
     uintptr_t           native_start;  // start of the arm code
     size_t              native_size;   // size of emitted arm code
     uintptr_t           last_ip;    // last set IP in RIP (or NULL if unclean state) TODO: move to a cache something
-    uint64_t*           table64;   // table of 64bits value
+    uint64_t*           table64;    // table of 64bits values
     int                 table64size;// size of table (will be appended at end of executable code)
     int                 table64cap;
     uintptr_t           tablestart;
+    uintptr_t           jmp_next;   // address of the jump_next address
     flagcache_t         f;
     neoncache_t         n;          // cache for the 8..31 double reg from fpu, plus x87 stack delta
     uintptr_t*          next;       // variable array of "next" jump address
     int                 next_sz;
     int                 next_cap;
+    int*                jmps;       // variable array of jump instructions
+    int                 jmp_sz;
+    int                 jmp_cap;
     int*                predecessor;// single array of all predecessor
     dynablock_t*        dynablock;
     instsize_t*         instsize;
     size_t              insts_size; // size of the instruction size array (calculated)
-    uint8_t             smread;    // for strongmem model emulation
+    uint8_t             smread;     // for strongmem model emulation
     uint8_t             smwrite;    // for strongmem model emulation
     uintptr_t           forward;    // address of the last end of code while testing forward
     uintptr_t           forward_to; // address of the next jump to (to check if everything is ok)
     int32_t             forward_size;   // size at the forward point
     int                 forward_ninst;  // ninst at the forward point
+    uint8_t             doublepush;
+    uint8_t             doublepop;
+    uint8_t             always_test;
 } dynarec_arm_t;
 
 void add_next(dynarec_arm_t *dyn, uintptr_t addr);
 uintptr_t get_closest_next(dynarec_arm_t *dyn, uintptr_t addr);
+void add_jump(dynarec_arm_t *dyn, int ninst);
+int get_first_jump(dynarec_arm_t *dyn, int next);
 int is_nops(dynarec_arm_t *dyn, uintptr_t addr, int n);
 int is_instructions(dynarec_arm_t *dyn, uintptr_t addr, int n);
 
-int Table64(dynarec_arm_t *dyn, uint64_t val);  // add a value to etable64 (if needed) and gives back the imm19 to use in LDR_literal
+int Table64(dynarec_arm_t *dyn, uint64_t val, int pass);  // add a value to table64 (if needed) and gives back the imm19 to use in LDR_literal
 
 void CreateJmpNext(void* addr, void* next);
 
-#define GO_TRACE() \
-    GETIP_(ip);             \
+#define GO_TRACE(A, B, s0)  \
+    GETIP(addr);            \
     MOVx_REG(x1, xRIP);     \
     STORE_XEMU_CALL(xRIP);  \
-    MOV32w(x2, 1);          \
-    CALL(PrintTrace, -1);   \
+    MOV32w(x2, B);          \
+    CALL(A, -1);            \
     LOAD_XEMU_CALL(xRIP)
 
 #endif //__DYNAREC_ARM_PRIVATE_H_

src/dynarec/dynablock.c

@@ -1,6 +1,5 @@
 #include <stdio.h>
 #include <stdlib.h>
-#include <pthread.h>
 #include <errno.h>
 #include <setjmp.h>
 #include <sys/mman.h>
@@ -9,7 +8,6 @@
 #include "box64context.h"
 #include "dynarec.h"
 #include "emu/x64emu_private.h"
-#include "tools/bridge_private.h"
 #include "x64run.h"
 #include "x64emu.h"
 #include "box64stack.h"
@@ -37,19 +35,32 @@ uint32_t X31_hash_code(void* addr, int len)
 	return (uint32_t)h;
 }
 
-void FreeDynablock(dynablock_t* db, int need_lock)
+dynablock_t* InvalidDynablock(dynablock_t* db, int need_lock)
 {
     if(db) {
         if(db->gone)
-            return; // already in the process of deletion!
-        dynarec_log(LOG_DEBUG, "FreeDynablock(%p), db->block=%p x64=%p:%p already gone=%d\n", db, db->block, db->x64_addr, db->x64_addr+db->x64_size-1, db->gone);
+            return NULL; // already in the process of deletion!
+        dynarec_log(LOG_DEBUG, "InvalidDynablock(%p), db->block=%p x64=%p:%p already gone=%d\n", db, db->block, db->x64_addr, db->x64_addr+db->x64_size-1, db->gone);
+        // remove jumptable without waiting
+        setJumpTableDefault64(db->x64_addr);
         if(need_lock)
             mutex_lock(&my_context->mutex_dyndump);
-        // remove jumptable
-        setJumpTableDefault64(db->x64_addr);
-        dynarec_log(LOG_DEBUG, " -- FreeDyrecMap(%p, %d)\n", db->actual_block, db->size);
         db->done = 0;
         db->gone = 1;
+        if(need_lock)
+            mutex_unlock(&my_context->mutex_dyndump);
+    }
+    return db;
+}
+
+void FreeInvalidDynablock(dynablock_t* db, int need_lock)
+{
+    if(db) {
+        if(!db->gone)
+            return; // already in the process of deletion!
+        dynarec_log(LOG_DEBUG, "FreeInvalidDynablock(%p), db->block=%p x64=%p:%p already gone=%d\n", db, db->block, db->x64_addr, db->x64_addr+db->x64_size-1, db->gone);
+        if(need_lock)
+            mutex_lock(&my_context->mutex_dyndump);
         FreeDynarecMap((uintptr_t)db->actual_block);
         customFree(db);
         if(need_lock)
@@ -57,14 +68,48 @@ void FreeDynablock(dynablock_t* db, int need_lock)
     }
 }
 
+void FreeDynablock(dynablock_t* db, int need_lock)
+{
+    if(db) {
+        if(db->gone)
+            return; // already in the process of deletion!
+        dynarec_log(LOG_DEBUG, "FreeDynablock(%p), db->block=%p x64=%p:%p already gone=%d\n", db, db->block, db->x64_addr, db->x64_addr+db->x64_size-1, db->gone);
+        // remove jumptable without waiting
+        setJumpTableDefault64(db->x64_addr);
+        if(need_lock)
+            mutex_lock(&my_context->mutex_dyndump);
+        dynarec_log(LOG_DEBUG, " -- FreeDyrecMap(%p, %d)\n", db->actual_block, db->size);
+        db->done = 0;
+        db->gone = 1;
+        if(db->previous)
+            FreeInvalidDynablock(db->previous, 0);
+        FreeDynarecMap((uintptr_t)db->actual_block);
+        customFree(db);
+        if(need_lock)
+            mutex_unlock(&my_context->mutex_dyndump);
+    }
+}
+
+
+
 void MarkDynablock(dynablock_t* db)
 {
     if(db) {
-        if(db->need_test)
-            return; // already done
         dynarec_log(LOG_DEBUG, "MarkDynablock %p %p-%p\n", db, db->x64_addr, db->x64_addr+db->x64_size-1);
-        db->need_test = 1;
-        setJumpTableIfRef64(db->x64_addr, db->jmpnext, db->block);
+        if(!setJumpTableIfRef64(db->x64_addr, db->jmpnext, db->block)) {
+            dynablock_t* old = db;
+            db = getDB((uintptr_t)old->x64_addr);
+            if(!old->gone && db!=old) {
+                printf_log(LOG_INFO, "Warning, couldn't mark block as dirty for %p, block=%p, current_block=%p\n", old->x64_addr, old, db);
+                // the block is lost, need to invalidate it...
+                old->gone = 1;
+                old->done = 0;
+                if(!db || db->previous)
+                    FreeInvalidDynablock(old, 1);
+                else
+                    db->previous = old;
+            }
+        }
     }
 }
 
@@ -78,7 +123,7 @@ static int IntervalIntersects(uintptr_t start1, uintptr_t end1, uintptr_t start2
 static int MarkedDynablock(dynablock_t* db)
 {
     if(db) {
-        if(db->need_test)
+        if(getNeedTest((uintptr_t)db->x64_addr))
             return 1; // already done
     }
     return 0;
@@ -90,9 +135,8 @@ void MarkRangeDynablock(dynablock_t* db, uintptr_t addr, uintptr_t size)
     if(!db)
         return;
     dynarec_log(LOG_DEBUG, "MarkRangeDynablock %p-%p .. startdb=%p, sizedb=%p\n", (void*)addr, (void*)addr+size-1, (void*)db->x64_addr, (void*)db->x64_size);
-    if(!MarkedDynablock(db))
-        if(IntervalIntersects((uintptr_t)db->x64_addr, (uintptr_t)db->x64_addr+db->x64_size-1, addr, addr+size+1))
-            MarkDynablock(db);
+    if(IntervalIntersects((uintptr_t)db->x64_addr, (uintptr_t)db->x64_addr+db->x64_size-1, addr, addr+size+1))
+        MarkDynablock(db);
 }
 
 int FreeRangeDynablock(dynablock_t* db, uintptr_t addr, uintptr_t size)
@@ -127,18 +171,23 @@ dynablock_t *AddNewDynablock(uintptr_t addr)
 }
 
 //TODO: move this to dynrec_arm.c and track allocated structure to avoid memory leak
-static __thread struct __jmp_buf_tag dynarec_jmpbuf;
+static __thread JUMPBUFF dynarec_jmpbuf;
+#ifdef ANDROID
+#define DYN_JMPBUF dynarec_jmpbuf
+#else
+#define DYN_JMPBUF &dynarec_jmpbuf
+#endif
 
 void cancelFillBlock()
 {
-    longjmp(&dynarec_jmpbuf, 1);
+    longjmp(DYN_JMPBUF, 1);
 }
 
 /* 
     return NULL if block is not found / cannot be created. 
     Don't create if create==0
 */
-static dynablock_t* internalDBGetBlock(x64emu_t* emu, uintptr_t addr, uintptr_t filladdr, int create, int need_lock)
+static dynablock_t* internalDBGetBlock(x64emu_t* emu, uintptr_t addr, uintptr_t filladdr, int create, int need_lock, int is32bits)
 {
     if(hasAlternate((void*)addr))
         return NULL;
@@ -153,40 +202,40 @@ static dynablock_t* internalDBGetBlock(x64emu_t* emu, uintptr_t addr, uintptr_t
             if(mutex_trylock(&my_context->mutex_dyndump))   // FillBlock not available for now
                 return NULL;
         }
-    }
-    
-    block = getDB(addr);    // just in case
-    if(block) {
-        if(need_lock)
+        block = getDB(addr);    // just in case
+        if(block) {
             mutex_unlock(&my_context->mutex_dyndump);
-        return block;
+            return block;
+        }
     }
     
     block = AddNewDynablock(addr);
 
     // fill the block
     block->x64_addr = (void*)addr;
-    if(sigsetjmp(&dynarec_jmpbuf, 1)) {
-        printf_log(LOG_INFO, "FillBlock at %p triggered a segfault, cancelling\n", (void*)addr);
+    if(sigsetjmp(DYN_JMPBUF, 1)) {
+        printf_log(LOG_INFO, "FillBlock at %p triggered a segfault, canceling\n", (void*)addr);
+        FreeDynablock(block, 0);
         if(need_lock)
             mutex_unlock(&my_context->mutex_dyndump);
         return NULL;
     }
-    void* ret = FillBlock64(block, filladdr);
+    void* ret = FillBlock64(block, filladdr, (addr==filladdr)?0:1, is32bits);
     if(!ret) {
         dynarec_log(LOG_DEBUG, "Fillblock of block %p for %p returned an error\n", block, (void*)addr);
         customFree(block);
         block = NULL;
     }
     // check size
-    if(block && (block->x64_size || (!block->x64_size && !block->done))) {
+    if(block) {
         int blocksz = block->x64_size;
         if(blocksz>my_context->max_db_size)
             my_context->max_db_size = blocksz;
         // fill-in jumptable
-        if(!addJumpTableIfDefault64(block->x64_addr, block->block)) {
+        if(!addJumpTableIfDefault64(block->x64_addr, block->dirty?block->jmpnext:block->block)) {
             FreeDynablock(block, 0);
             block = getDB(addr);
+            MarkDynablock(block);   // just in case...
         } else {
             if(block->x64_size)
                 block->done = 1;    // don't validate the block if the size is null, but keep the block
@@ -200,15 +249,20 @@ static dynablock_t* internalDBGetBlock(x64emu_t* emu, uintptr_t addr, uintptr_t
     return block;
 }
 
-dynablock_t* DBGetBlock(x64emu_t* emu, uintptr_t addr, int create)
+dynablock_t* DBGetBlock(x64emu_t* emu, uintptr_t addr, int create, int is32bits)
 {
-    dynablock_t *db = internalDBGetBlock(emu, addr, addr, create, 1);
-    if(db && db->done && db->block && db->need_test) {
+    dynablock_t *db = internalDBGetBlock(emu, addr, addr, create, 1, is32bits);
+    if(db && db->done && db->block && getNeedTest(addr)) {
+        if(db->always_test)
+            sched_yield();  // just calm down...
         if(AreaInHotPage((uintptr_t)db->x64_addr, (uintptr_t)db->x64_addr + db->x64_size - 1)) {
+            emu->test.test = 0;
             if(box64_dynarec_fastpage) {
                 uint32_t hash = X31_hash_code(db->x64_addr, db->x64_size);
-                if(hash==db->hash)  // seems ok, run it without reprotecting it
+                if(hash==db->hash) { // seems ok, run it without reprotecting it
+                    setJumpTableIfRef64(db->x64_addr, db->block, db->jmpnext);
                     return db;
+                }
                 db->done = 0;   // invalidating the block, it's already not good
                 dynarec_log(LOG_DEBUG, "Invalidating block %p from %p:%p (hash:%X/%X) for %p\n", db, db->x64_addr, db->x64_addr+db->x64_size-1, hash, db->hash, (void*)addr);
                 // Free db, it's now invalid!
@@ -220,52 +274,70 @@ dynablock_t* DBGetBlock(x64emu_t* emu, uintptr_t addr, int create)
             }
         }
         uint32_t hash = X31_hash_code(db->x64_addr, db->x64_size);
-        if(mutex_trylock(&my_context->mutex_dyndump)) {
-            dynarec_log(LOG_DEBUG, "mutex_dyndump not available when trying to validate block %p from %p:%p (hash:%X) for %p\n", db, db->x64_addr, db->x64_addr+db->x64_size-1, db->hash, (void*)addr);
-            return NULL;
-        }
+        int need_lock = mutex_trylock(&my_context->mutex_dyndump);
         if(hash!=db->hash) {
             db->done = 0;   // invalidating the block
             dynarec_log(LOG_DEBUG, "Invalidating block %p from %p:%p (hash:%X/%X) for %p\n", db, db->x64_addr, db->x64_addr+db->x64_size-1, hash, db->hash, (void*)addr);
             // Free db, it's now invalid!
-            FreeDynablock(db, 0);
+            dynablock_t* old = InvalidDynablock(db, need_lock);
             // start again... (will create a new block)
-            db = internalDBGetBlock(emu, addr, addr, create, 0);
+            db = internalDBGetBlock(emu, addr, addr, create, need_lock, is32bits);
+            if(db) {
+                if(db->previous)
+                    FreeInvalidDynablock(db->previous, need_lock);
+                db->previous = old;
+            } else
+                FreeInvalidDynablock(old, need_lock);
         } else {
-            db->need_test = 0;
             dynarec_log(LOG_DEBUG, "Validating block %p from %p:%p (hash:%X) for %p\n", db, db->x64_addr, db->x64_addr+db->x64_size-1, db->hash, (void*)addr);
             protectDB((uintptr_t)db->x64_addr, db->x64_size);
             // fill back jumptable
-            setJumpTableIfRef64(db->x64_addr, db->block, db->jmpnext);
+            if(isprotectedDB((uintptr_t)db->x64_addr, db->x64_size) && !db->always_test) {
+                setJumpTableIfRef64(db->x64_addr, db->block, db->jmpnext);
+            }
         }
-        mutex_unlock(&my_context->mutex_dyndump);
+        if(!need_lock)
+            mutex_unlock(&my_context->mutex_dyndump);
     } 
+    if(!db || !db->block || !db->done)
+        emu->test.test = 0;
     return db;
 }
 
-dynablock_t* DBAlternateBlock(x64emu_t* emu, uintptr_t addr, uintptr_t filladdr)
+dynablock_t* DBAlternateBlock(x64emu_t* emu, uintptr_t addr, uintptr_t filladdr, int is32bits)
 {
-    dynarec_log(LOG_DEBUG, "Creating AlternateBlock at %p for %p\n", (void*)addr, (void*)filladdr);
+    dynarec_log(LOG_DEBUG, "Creating AlternateBlock at %p for %p%s\n", (void*)addr, (void*)filladdr, is32bits?" 32bits":"");
     int create = 1;
-    dynablock_t *db = internalDBGetBlock(emu, addr, filladdr, create, 1);
-    if(db && db->done && db->block && db->need_test) {
-        if(mutex_trylock(&my_context->mutex_dyndump))
-            return NULL;
+    dynablock_t *db = internalDBGetBlock(emu, addr, filladdr, create, 1, is32bits);
+    if(db && db->done && db->block && getNeedTest(filladdr)) {
+        if(db->always_test)
+            sched_yield();  // just calm down...
+        int need_lock = mutex_trylock(&my_context->mutex_dyndump);
         uint32_t hash = X31_hash_code(db->x64_addr, db->x64_size);
         if(hash!=db->hash) {
             db->done = 0;   // invalidating the block
             dynarec_log(LOG_DEBUG, "Invalidating alt block %p from %p:%p (hash:%X/%X) for %p\n", db, db->x64_addr, db->x64_addr+db->x64_size, hash, db->hash, (void*)addr);
             // Free db, it's now invalid!
-            FreeDynablock(db, 0);
+            dynablock_t* old = InvalidDynablock(db, need_lock);
             // start again... (will create a new block)
-            db = internalDBGetBlock(emu, addr, filladdr, create, 0);
+            db = internalDBGetBlock(emu, addr, filladdr, create, need_lock, is32bits);
+            if(db) {
+                if(db->previous)
+                    FreeInvalidDynablock(db->previous, need_lock);
+                db->previous = old;
+            } else
+                FreeInvalidDynablock(old, need_lock);
         } else {
-            db->need_test = 0;
             protectDB((uintptr_t)db->x64_addr, db->x64_size);
             // fill back jumptable
-            addJumpTableIfDefault64(db->x64_addr, db->block);
+            if(isprotectedDB((uintptr_t)db->x64_addr, db->x64_size) && !db->always_test) {
+                setJumpTableIfRef64(db->x64_addr, db->block, db->jmpnext);
+            }
         }
-        mutex_unlock(&my_context->mutex_dyndump);
+        if(!need_lock)
+            mutex_unlock(&my_context->mutex_dyndump);
     } 
+    if(!db || !db->block || !db->done)
+        emu->test.test = 0;
     return db;
 }

src/dynarec/dynablock_private.h

@@ -9,14 +9,15 @@ typedef struct instsize_s {
 typedef struct dynablock_s {
     void*           block;  // block-sizeof(void*) == self
     void*           actual_block;   // the actual start of the block (so block-sizeof(void*))
+    struct dynablock_s*    previous;   // a previous block that might need to be freed
     int             size;
     void*           x64_addr;
     uintptr_t       x64_size;
     uint32_t        hash;
-    uint8_t         need_test;
     uint8_t         done;
     uint8_t         gone;
-    uint8_t         dummy;
+    uint8_t         always_test;
+    uint8_t         dirty;      // if need to be tested as soon as it's created
     int             isize;
     instsize_t*     instsize;
     void*           jmpnext;    // a branch jmpnext code when block is marked

src/dynarec/dynarec.c

@@ -1,6 +1,5 @@
 #include <stdio.h>
 #include <stdlib.h>
-#include <pthread.h>
 #include <errno.h>
 #include <setjmp.h>
 
@@ -8,7 +7,6 @@
 #include "box64context.h"
 #include "dynarec.h"
 #include "emu/x64emu_private.h"
-#include "tools/bridge_private.h"
 #include "x64run.h"
 #include "x64emu.h"
 #include "box64stack.h"
@@ -31,6 +29,7 @@ uintptr_t getX64Address(dynablock_t* db, uintptr_t arm_addr);
 
 void* LinkNext(x64emu_t* emu, uintptr_t addr, void* x2, uintptr_t* x3)
 {
+    int is32bits = (R_CS == 0x23);
     #ifdef HAVE_TRACE
     if(!addr) {
         dynablock_t* db = FindDynablockFromNativeAddress(x2-4);
@@ -38,27 +37,28 @@ void* LinkNext(x64emu_t* emu, uintptr_t addr, void* x2, uintptr_t* x3)
     }
     #endif
     void * jblock;
-    dynablock_t* block = DBGetBlock(emu, addr, 1);
+    dynablock_t* block = NULL;
+    if(hasAlternate((void*)addr)) {
+        printf_log(LOG_DEBUG, "Jmp address has alternate: %p", (void*)addr);
+        if(box64_log<LOG_DEBUG) dynarec_log(LOG_INFO, "Jmp address has alternate: %p", (void*)addr);
+        uintptr_t old_addr = addr;
+        addr = (uintptr_t)getAlternate((void*)addr);    // set new address
+        R_RIP = addr;   // but also new RIP!
+        *x3 = addr; // and the RIP in x27 register
+        printf_log(LOG_DEBUG, " -> %p\n", (void*)addr);
+        block = DBAlternateBlock(emu, old_addr, addr, is32bits);
+    } else
+        block = DBGetBlock(emu, addr, 1, is32bits);
     if(!block) {
-        // no block, let link table as is...
-        if(hasAlternate((void*)addr)) {
-            printf_log(LOG_DEBUG, "Jmp address has alternate: %p", (void*)addr);
-            if(box64_log<LOG_DEBUG) dynarec_log(LOG_INFO, "Jmp address has alternate: %p", (void*)addr);
-            addr = (uintptr_t)getAlternate((void*)addr);    // set new address
-            R_RIP = addr;   // but also new RIP!
-            *x3 = addr; // and the RIP in x27 register
-            printf_log(LOG_DEBUG, " -> %p\n", (void*)addr);
-            block = DBGetBlock(emu, addr, 1);
-        }
-        if(!block) {
-            #ifdef HAVE_TRACE
+        #ifdef HAVE_TRACE
+        if(LOG_INFO<=box64_dynarec_log) {
             dynablock_t* db = FindDynablockFromNativeAddress(x2-4);
             elfheader_t* h = FindElfAddress(my_context, (uintptr_t)x2-4);
             dynarec_log(LOG_INFO, "Warning, jumping to a no-block address %p from %p (db=%p, x64addr=%p(elf=%s))\n", (void*)addr, x2-4, db, db?(void*)getX64Address(db, (uintptr_t)x2-4):NULL, h?ElfName(h):"(none)");
-            #endif
-            //tableupdate(native_epilog, addr, table);
-            return native_epilog;
         }
+        #endif
+        //tableupdate(native_epilog, addr, table);
+        return native_epilog;
     }
     if(!block->done) {
         // not finished yet... leave linker
@@ -73,127 +73,105 @@ void* LinkNext(x64emu_t* emu, uintptr_t addr, void* x2, uintptr_t* x3)
 }
 #endif
 
-#ifdef __GNUC__
-// Disable "clobbered" warnings
-#pragma GCC diagnostic push
-#pragma GCC diagnostic ignored "-Wclobbered"
-#endif
 void DynaCall(x64emu_t* emu, uintptr_t addr)
 {
-    // prepare setjump for signal handling
-    emu_jmpbuf_t *ejb = NULL;
-    int jmpbuf_reset = 0;
-    if(emu->type == EMUTYPE_MAIN) {
-        ejb = GetJmpBuf();
-        if(!ejb->jmpbuf_ok) {
-            ejb->emu = emu;
-            ejb->jmpbuf_ok = 1;
-            jmpbuf_reset = 1;
-            if(sigsetjmp((struct __jmp_buf_tag*)ejb->jmpbuf, 1)) {
-                printf_log(LOG_DEBUG, "Setjmp DynaCall, fs=0x%x\n", ejb->emu->segs[_FS]);
-                addr = R_RIP;   // not sure if it should still be inside DynaCall!
-            }
-        }
+    uint64_t old_rsp = R_RSP;
+    uint64_t old_rbx = R_RBX;
+    uint64_t old_rdi = R_RDI;
+    uint64_t old_rsi = R_RSI;
+    uint64_t old_rbp = R_RBP;
+    uint64_t old_rip = R_RIP;
+    // save defered flags
+    deferred_flags_t old_df = emu->df;
+    multiuint_t old_op1 = emu->op1;
+    multiuint_t old_op2 = emu->op2;
+    multiuint_t old_res = emu->res;
+    multiuint_t old_op1_sav= emu->op1_sav;
+    multiuint_t old_res_sav= emu->res_sav;
+    deferred_flags_t old_df_sav= emu->df_sav;
+    // uc_link
+    x64_ucontext_t* old_uc_link = emu->uc_link;
+    emu->uc_link = NULL;
+
+    PushExit(emu);
+    R_RIP = addr;
+    emu->df = d_none;
+    DynaRun(emu);
+    emu->quit = 0;  // reset Quit flags...
+    emu->df = d_none;
+    emu->uc_link = old_uc_link;
+    if(emu->flags.quitonlongjmp && emu->flags.longjmp) {
+        if(emu->flags.quitonlongjmp==1)
+            emu->flags.longjmp = 0;   // don't change anything because of the longjmp
+    } else {
+        // restore defered flags
+        emu->df = old_df;
+        emu->op1 = old_op1;
+        emu->op2 = old_op2;
+        emu->res = old_res;
+        emu->op1_sav = old_op1_sav;
+        emu->res_sav = old_res_sav;
+        emu->df_sav = old_df_sav;
+        // and the old registers
+        R_RBX = old_rbx;
+        R_RDI = old_rdi;
+        R_RSI = old_rsi;
+        R_RBP = old_rbp;
+        R_RSP = old_rsp;
+        R_RIP = old_rip;  // and set back instruction pointer
     }
-#ifdef DYNAREC
-    if(!box64_dynarec)
-#endif
-        EmuCall(emu, addr);
-#ifdef DYNAREC
-    else {
-        uint64_t old_rsp = R_RSP;
-        uint64_t old_rbx = R_RBX;
-        uint64_t old_rdi = R_RDI;
-        uint64_t old_rsi = R_RSI;
-        uint64_t old_rbp = R_RBP;
-        uint64_t old_rip = R_RIP;
-        PushExit(emu);
-        R_RIP = addr;
-        emu->df = d_none;
-        while(!emu->quit) {
-            dynablock_t* block = DBGetBlock(emu, R_RIP, 1);
-            if(!block || !block->block || !block->done) {
-                // no block, of block doesn't have DynaRec content (yet, temp is not null)
-                // Use interpreter (should use single instruction step...)
-                dynarec_log(LOG_DEBUG, "%04d|Calling Interpretor @%p, emu=%p\n", GetTID(), (void*)R_RIP, emu);
-                Run(emu, 1);
-            } else {
-                dynarec_log(LOG_DEBUG, "%04d|Calling DynaRec Block @%p (%p) of %d x64 instructions emu=%p\n", GetTID(), (void*)R_RIP, block->block, block->isize ,emu);
-                CHECK_FLAGS(emu);
-                // block is here, let's run it!
-                native_prolog(emu, block->block);
-            }
-            if(emu->fork) {
-                int forktype = emu->fork;
-                emu->quit = 0;
-                emu->fork = 0;
-                emu = x64emu_fork(emu, forktype);
-                if(emu->type == EMUTYPE_MAIN) {
-                    ejb = GetJmpBuf();
-                    ejb->emu = emu;
-                    ejb->jmpbuf_ok = 1;
-                    jmpbuf_reset = 1;
-                    if(sigsetjmp((struct __jmp_buf_tag*)ejb->jmpbuf, 1)) {
-                        printf_log(LOG_DEBUG, "Setjmp inner DynaCall, fs=0x%x\n", ejb->emu->segs[_FS]);
-                        addr = R_RIP;
-                    }
-                }
-            }
-        }
-        emu->quit = 0;  // reset Quit flags...
-        emu->df = d_none;
-        if(emu->quitonlongjmp && emu->longjmp) {
-            if(emu->quitonlongjmp==1)
-                emu->longjmp = 0;   // don't change anything because of the longjmp
-        } else {
-            R_RBX = old_rbx;
-            R_RDI = old_rdi;
-            R_RSI = old_rsi;
-            R_RBP = old_rbp;
-            R_RSP = old_rsp;
-            R_RIP = old_rip;  // and set back instruction pointer
-        }
-    }
-#endif
-    // clear the setjmp
-    if(ejb && jmpbuf_reset)
-        ejb->jmpbuf_ok = 0;
 }
 
-int DynaRun(x64emu_t* emu)
+int my_setcontext(x64emu_t* emu, void* ucp);
+void DynaRun(x64emu_t* emu)
 {
     // prepare setjump for signal handling
-    emu_jmpbuf_t *ejb = NULL;
-#ifdef DYNAREC
-    int jmpbuf_reset = 1;
-#endif
-    if(emu->type == EMUTYPE_MAIN) {
-        ejb = GetJmpBuf();
-        if(!ejb->jmpbuf_ok) {
-            ejb->emu = emu;
-            ejb->jmpbuf_ok = 1;
-#ifdef DYNAREC
-            jmpbuf_reset = 1;
-#endif
-            if(sigsetjmp((struct __jmp_buf_tag*)ejb->jmpbuf, 1))
-                printf_log(LOG_DEBUG, "Setjmp DynaRun, fs=0x%x\n", ejb->emu->segs[_FS]);
+    JUMPBUFF jmpbuf[1] = {0};
+    int skip = 0;
+    JUMPBUFF *old_jmpbuf = emu->jmpbuf;
+    emu->flags.jmpbuf_ready = 0;
+
+    while(!(emu->quit)) {
+        if(!emu->jmpbuf || (emu->flags.need_jmpbuf && emu->jmpbuf!=jmpbuf)) {
+            emu->jmpbuf = jmpbuf;
+            emu->flags.jmpbuf_ready = 1;
+            #ifdef ANDROID
+            if((skip=sigsetjmp(*(JUMPBUFF*)emu->jmpbuf, 1))) 
+            #else
+            if((skip=sigsetjmp(emu->jmpbuf, 1))) 
+            #endif
+            {
+                printf_log(LOG_DEBUG, "Setjmp DynaRun, fs=0x%x\n", emu->segs[_FS]);
+                #ifdef DYNAREC
+                if(box64_dynarec_test) {
+                    if(emu->test.clean)
+                        x64test_check(emu, R_RIP);
+                    emu->test.clean = 0;
+                }
+                #endif
+            }
         }
-    }
+        if(emu->flags.need_jmpbuf)
+            emu->flags.need_jmpbuf = 0;
+
 #ifdef DYNAREC
-    if(!box64_dynarec)
+        if(!box64_dynarec)
 #endif
-        return Run(emu, 0);
+            Run(emu, 0);
 #ifdef DYNAREC
-    else {
-        while(!emu->quit) {
-            dynablock_t* block = DBGetBlock(emu, R_RIP, 1);
-            if(!block || !block->block || !block->done) {
+        else {
+            int is32bits = (emu->segs[_CS]==0x23);
+            dynablock_t* block = (skip)?NULL:DBGetBlock(emu, R_RIP, 1, is32bits);
+            if(!block || !block->block || !block->done || ACCESS_FLAG(F_TF)) {
+                skip = 0;
                 // no block, of block doesn't have DynaRec content (yet, temp is not null)
                 // Use interpreter (should use single instruction step...)
-                dynarec_log(LOG_DEBUG, "%04d|Running Interpretor @%p, emu=%p\n", GetTID(), (void*)R_RIP, emu);
+                dynarec_log(LOG_DEBUG, "%04d|Running Interpreter @%p, emu=%p\n", GetTID(), (void*)R_RIP, emu);
+                if(box64_dynarec_test)
+                    emu->test.clean = 0;
                 Run(emu, 1);
             } else {
-                dynarec_log(LOG_DEBUG, "%04d|Running DynaRec Block @%p (%p) of %d x64 insts emu=%p\n", GetTID(), (void*)R_RIP, block->block, block->isize, emu);
+                dynarec_log(LOG_DEBUG, "%04d|Running DynaRec Block @%p (%p) of %d x64 insts (hash=0x%x) emu=%p\n", GetTID(), (void*)R_RIP, block->block, block->isize, block->hash, emu);
                 // block is here, let's run it!
                 native_prolog(emu, block->block);
             }
@@ -202,23 +180,16 @@ int DynaRun(x64emu_t* emu)
                 emu->quit = 0;
                 emu->fork = 0;
                 emu = x64emu_fork(emu, forktype);
-                if(emu->type == EMUTYPE_MAIN) {
-                    ejb = GetJmpBuf();
-                    ejb->emu = emu;
-                    ejb->jmpbuf_ok = 1;
-                    jmpbuf_reset = 1;
-                    if(sigsetjmp((struct __jmp_buf_tag*)ejb->jmpbuf, 1))
-                        printf_log(LOG_DEBUG, "Setjmp inner DynaRun, fs=0x%x\n", ejb->emu->segs[_FS]);
-                }
+            }
+            if(emu->quit && emu->uc_link) {
+                emu->quit = 0;
+                my_setcontext(emu, emu->uc_link);
             }
         }
+#endif
+        if(emu->flags.need_jmpbuf)
+            emu->quit = 0;
     }
     // clear the setjmp
-    if(ejb && jmpbuf_reset)
-        ejb->jmpbuf_ok = 0;
-    return 0;
-#endif
+    emu->jmpbuf = old_jmpbuf;
 }
-#ifdef __GNUC__
-#pragma GCC diagnostic pop
-#endif

src/dynarec/dynarec_arch.h

@@ -2,22 +2,45 @@
 #define __DYNAREC_ARCH__H_
 
 #ifdef ARM64
-#include "arm64/arm64_printer.h"
-#include "arm64/dynarec_arm64_private.h"
-#include "arm64/dynarec_arm64_functions.h"
 
 #define instruction_native_t        instruction_arm64_t
 #define dynarec_native_t            dynarec_arm_t
 
+#define ADDITIONNAL_DEFINITION()  \
+    int fpuCacheNeedsTransform(dynarec_native_t* dyn, int ninst);
+
+#define OTHER_CACHE()   \
+    if (fpuCacheNeedsTransform(dyn, ninst)) ret|=2;
+
+#include "arm64/arm64_printer.h"
+#include "arm64/dynarec_arm64_private.h"
+#include "arm64/dynarec_arm64_functions.h"
 #elif defined(LA464)
-#include "la464/la464_printer.h"
-#include "la464/dynarec_la464_private.h"
-#include "la464/dynarec_la464_functions.h"
 
 #define instruction_native_t        instruction_la464_t
 #define dynarec_native_t            dynarec_la464_t
 
+#define ADDITIONNAL_DEFINITION()
 
+#define OTHER_CACHE()
+
+#include "la464/la464_printer.h"
+#include "la464/dynarec_la464_private.h"
+#include "la464/dynarec_la464_functions.h"
+#elif defined(RV64)
+
+#define instruction_native_t        instruction_rv64_t
+#define dynarec_native_t            dynarec_rv64_t
+
+#define ADDITIONNAL_DEFINITION()  \
+    int fpuCacheNeedsTransform(dynarec_native_t* dyn, int ninst);
+
+#define OTHER_CACHE()   \
+    if (fpuCacheNeedsTransform(dyn, ninst)) ret|=2;
+
+#include "rv64/rv64_printer.h"
+#include "rv64/dynarec_rv64_private.h"
+#include "rv64/dynarec_rv64_functions.h"
 #else
 #error Unsupported platform
 #endif

src/dynarec/dynarec_helper.h

@@ -5,6 +5,8 @@
 #include "arm64/dynarec_arm64_helper.h"
 #elif defined(LA464)
 #include "la464/dynarec_la464_helper.h"
+#elif defined(RV64)
+#include "rv64/dynarec_rv64_helper.h"
 #else
 #error Unsupported architecture
 #endif

src/dynarec/dynarec_native.c

@@ -1,6 +1,5 @@
 #include <stdio.h>
 #include <stdlib.h>
-#include <pthread.h>
 #include <errno.h>
 #include <string.h>
 #include <assert.h>
@@ -10,7 +9,6 @@
 #include "custommem.h"
 #include "dynarec.h"
 #include "emu/x64emu_private.h"
-#include "tools/bridge_private.h"
 #include "x64run.h"
 #include "x64emu.h"
 #include "box64stack.h"
@@ -75,25 +73,42 @@ void add_next(dynarec_native_t *dyn, uintptr_t addr) {
     // add slots
     if(dyn->next_sz == dyn->next_cap) {
         dyn->next_cap += 64;
-        dyn->next = (uintptr_t*)customRealloc(dyn->next, dyn->next_cap*sizeof(uintptr_t));
+        dyn->next = (uintptr_t*)dynaRealloc(dyn->next, dyn->next_cap*sizeof(uintptr_t));
     }
     dyn->next[dyn->next_sz++] = addr;
 }
 uintptr_t get_closest_next(dynarec_native_t *dyn, uintptr_t addr) {
-    // get closest, but no addresses befores
+    // get closest, but no addresses before
     uintptr_t best = 0;
     int i = 0;
     while((i<dyn->next_sz) && (best!=addr)) {
-        if(dyn->next[i]<addr) { // remove the address, it's before current address
-            dyn->next[i] = 0;
-        } else {
-            if((dyn->next[i]<best) || !best)
-                best = dyn->next[i];
+        if(dyn->next[i]) {
+            if(dyn->next[i]<addr) { // remove the address, it's before current address
+                dyn->next[i] = 0;
+            } else {
+                if((dyn->next[i]<best) || !best)
+                    best = dyn->next[i];
+            }
         }
         ++i;
     }
     return best;
 }
+void add_jump(dynarec_native_t *dyn, int ninst) {
+    // add slots
+    if(dyn->jmp_sz == dyn->jmp_cap) {
+        dyn->jmp_cap += 64;
+        dyn->jmps = (int*)dynaRealloc(dyn->jmps, dyn->jmp_cap*sizeof(int));
+    }
+    dyn->jmps[dyn->jmp_sz++] = ninst;
+}
+int get_first_jump(dynarec_native_t *dyn, int next) {
+    for(int i=0; i<dyn->jmp_sz; ++i)
+        if(dyn->insts[dyn->jmps[i]].x64.jmp == next)
+            return i;
+    return -2;
+}
+
 #define PK(A) (*((uint8_t*)(addr+(A))))
 int is_nops(dynarec_native_t *dyn, uintptr_t addr, int n)
 {
@@ -124,8 +139,8 @@ int is_nops(dynarec_native_t *dyn, uintptr_t addr, int n)
     return 0;
 }
 
-// return size of next instuciton, -1 is unknown
-// not all instrction are setup
+// return size of next instruction, -1 is unknown
+// not all instructions are setup
 int next_instruction(dynarec_native_t *dyn, uintptr_t addr)
 {
     uint8_t opcode = PK(0);
@@ -265,7 +280,7 @@ void addInst(instsize_t* insts, size_t* size, int x64_size, int native_size)
 }
 
 // add a value to table64 (if needed) and gives back the imm19 to use in LDR_literal
-int Table64(dynarec_native_t *dyn, uint64_t val)
+int Table64(dynarec_native_t *dyn, uint64_t val, int pass)
 {
     // find the value if already present
     int idx = -1;
@@ -276,10 +291,14 @@ int Table64(dynarec_native_t *dyn, uint64_t val)
     if(idx==-1) {
         if(dyn->table64size == dyn->table64cap) {
             dyn->table64cap+=16;
-            dyn->table64 = (uint64_t*)customRealloc(dyn->table64, dyn->table64cap * sizeof(uint64_t));
+            if(pass<3)  // do not resize on pass3, it's not the same type of memory anymore
+                dyn->table64 = (uint64_t*)dynaRealloc(dyn->table64, dyn->table64cap * sizeof(uint64_t));
         }
         idx = dyn->table64size++;
-        dyn->table64[idx] = val;
+        if(idx < dyn->table64cap)
+            dyn->table64[idx] = val;
+        else
+            printf_log(LOG_NONE, "Warning, table64 bigger than expected %d vs %d\n", idx, dyn->table64cap);
     }
     // calculate offset
     int delta = dyn->tablestart + idx*sizeof(uint64_t) - (uintptr_t)dyn->block;
@@ -289,7 +308,7 @@ int Table64(dynarec_native_t *dyn, uint64_t val)
 static void fillPredecessors(dynarec_native_t* dyn)
 {
     int pred_sz = 1;    // to be safe
-    // compute total size of predecessor to alocate the array
+    // compute total size of predecessor to allocate the array
     // first compute the jumps
     for(int i=0; i<dyn->size; ++i) {
         if(dyn->insts[i].x64.jmp && (dyn->insts[i].x64.jmp_insts!=-1)) {
@@ -297,6 +316,13 @@ static void fillPredecessors(dynarec_native_t* dyn)
             dyn->insts[dyn->insts[i].x64.jmp_insts].pred_sz++;
         }
     }
+    // remove "has_next" from orphan branch
+    for(int i=0; i<dyn->size-1; ++i) {
+        if(!dyn->insts[i].x64.has_next) {
+            if(dyn->insts[i+1].x64.has_next && !dyn->insts[i+1].pred_sz)
+                dyn->insts[i+1].x64.has_next = 0;
+        }
+    }
     // second the "has_next"
     for(int i=0; i<dyn->size-1; ++i) {
         if(dyn->insts[i].x64.has_next) {
@@ -304,7 +330,8 @@ static void fillPredecessors(dynarec_native_t* dyn)
             dyn->insts[i+1].pred_sz++;
         }
     }
-    dyn->predecessor = (int*)customMalloc(pred_sz*sizeof(int));
+    int alloc_size = pred_sz;
+    dyn->predecessor = (int*)dynaMalloc(pred_sz*sizeof(int));
     // fill pred pointer
     int* p = dyn->predecessor;
     for(int i=0; i<dyn->size; ++i) {
@@ -321,11 +348,10 @@ static void fillPredecessors(dynarec_native_t* dyn)
             dyn->insts[j].pred[dyn->insts[j].pred_sz++] = i;
         }
     }
-
 }
 
-// updateNeed goes backward, from last intruction to top
-static int updateNeed(dynarec_arm_t* dyn, int ninst, uint8_t need) {
+// updateNeed goes backward, from last instruction to top
+static int updateNeed(dynarec_native_t* dyn, int ninst, uint8_t need) {
     while (ninst>=0) {
         // need pending but instruction is only a subset: remove pend and use an X_ALL instead
         need |= dyn->insts[ninst].x64.need_after;
@@ -345,11 +371,11 @@ static int updateNeed(dynarec_arm_t* dyn, int ninst, uint8_t need) {
             dyn->insts[ninst].x64.gen_flags |= X_PEND;
         dyn->insts[ninst].x64.need_after = need;
         need = dyn->insts[ninst].x64.need_after&~dyn->insts[ninst].x64.gen_flags;
+
         if(dyn->insts[ninst].x64.may_set)
             need |= dyn->insts[ninst].x64.gen_flags;    // forward the flags
-        // Consume X_PEND if relevant
-        if((need&X_PEND) && (dyn->insts[ninst].x64.set_flags&SF_PENDING))
-            need &=~X_PEND;
+        else if((need&X_PEND) && (dyn->insts[ninst].x64.set_flags&SF_PENDING))
+            need &=~X_PEND;         // Consume X_PEND if relevant
         need |= dyn->insts[ninst].x64.use_flags;
         if(dyn->insts[ninst].x64.need_before == need)
             return ninst - 1;
@@ -364,9 +390,9 @@ static int updateNeed(dynarec_arm_t* dyn, int ninst, uint8_t need) {
             else
                 updateNeed(dyn, dyn->insts[ninst].pred[i], need);
         }
-        if(!ok)
-            return ninst - 1;
         --ninst;
+        if(!ok)
+            return ninst;
     }
     return ninst;
 }
@@ -379,27 +405,26 @@ void CancelBlock64(int need_lock)
         mutex_lock(&my_context->mutex_dyndump);
     dynarec_native_t* helper = (dynarec_native_t*)current_helper;
     current_helper = NULL;
-    if(!helper) {
-        if(need_lock)
-            mutex_unlock(&my_context->mutex_dyndump);
-        return;
+    if(helper) {
+        dynaFree(helper->next);
+        dynaFree(helper->jmps);
+        dynaFree(helper->insts);
+        dynaFree(helper->predecessor);
+        if(helper->table64 && (helper->table64!=(uint64_t*)helper->tablestart))
+            dynaFree(helper->table64);
+        if(helper->dynablock && helper->dynablock->actual_block) {
+            FreeDynarecMap((uintptr_t)helper->dynablock->actual_block);
+            helper->dynablock->actual_block = NULL;
+        }
     }
-    customFree(helper->next);
-    customFree(helper->insts);
-    customFree(helper->predecessor);
-    customFree(helper->table64);
-    if(helper->dynablock && helper->dynablock->actual_block)
-        FreeDynarecMap((uintptr_t)helper->dynablock->actual_block);
-    else if(helper->dynablock && helper->block)
-        FreeDynarecMap((uintptr_t)helper->block-sizeof(void*));
     if(need_lock)
         mutex_unlock(&my_context->mutex_dyndump);
 }
 
-uintptr_t native_pass0(dynarec_native_t* dyn, uintptr_t addr);
-uintptr_t native_pass1(dynarec_native_t* dyn, uintptr_t addr);
-uintptr_t native_pass2(dynarec_native_t* dyn, uintptr_t addr);
-uintptr_t native_pass3(dynarec_native_t* dyn, uintptr_t addr);
+uintptr_t native_pass0(dynarec_native_t* dyn, uintptr_t addr, int alternate, int is32bits);
+uintptr_t native_pass1(dynarec_native_t* dyn, uintptr_t addr, int alternate, int is32bits);
+uintptr_t native_pass2(dynarec_native_t* dyn, uintptr_t addr, int alternate, int is32bits);
+uintptr_t native_pass3(dynarec_native_t* dyn, uintptr_t addr, int alternate, int is32bits);
 
 void* CreateEmptyBlock(dynablock_t* block, uintptr_t addr) {
     block->isize = 0;
@@ -408,7 +433,7 @@ void* CreateEmptyBlock(dynablock_t* block, uintptr_t addr) {
     void* actual_p = (void*)AllocDynarecMap(sz);
     void* p = actual_p + sizeof(void*);
     if(actual_p==NULL) {
-        dynarec_log(LOG_INFO, "AllocDynarecMap(%p, %zu) failed, cancelling block\n", block, sz);
+        dynarec_log(LOG_INFO, "AllocDynarecMap(%p, %zu) failed, canceling block\n", block, sz);
         CancelBlock64(0);
         return NULL;
     }
@@ -419,13 +444,12 @@ void* CreateEmptyBlock(dynablock_t* block, uintptr_t addr) {
     *(dynablock_t**)actual_p = block;
     *(void**)(p+2*sizeof(void*)) = native_epilog;
     CreateJmpNext(block->jmpnext, p+2*sizeof(void*));
-    block->need_test = 0;
     // all done...
     __clear_cache(actual_p, actual_p+sz);   // need to clear the cache before execution...
     return block;
 }
 
-void* FillBlock64(dynablock_t* block, uintptr_t addr) {
+void* FillBlock64(dynablock_t* block, uintptr_t addr, int alternate, int is32bits) {
     /*
         A Block must have this layout:
 
@@ -436,11 +460,11 @@ void* FillBlock64(dynablock_t* block, uintptr_t addr) {
         B+8 ..  B+15    : 2 Native code for jmpnext (or jmp epilog in case of empty block)
         B+16 .. B+23    : jmpnext (or jmp_epilog) address
         B+24 .. B+31    : empty (in case an architecture needs more than 2 opcodes)
-        B+32 .. B+32+sz : instsize (compressed array with each instruction lenght on x64 and native side)
+        B+32 .. B+32+sz : instsize (compressed array with each instruction length on x64 and native side)
 
     */
     if(IsInHotPage(addr)) {
-        dynarec_log(LOG_DEBUG, "Cancelling dynarec FillBlock on hotpage for %p\n", (void*)addr);
+        dynarec_log(LOG_DEBUG, "Canceling dynarec FillBlock on hotpage for %p\n", (void*)addr);
         return NULL;
     }
     if(addr>=box64_nodynarec_start && addr<box64_nodynarec_end) {
@@ -448,7 +472,7 @@ void* FillBlock64(dynablock_t* block, uintptr_t addr) {
         return CreateEmptyBlock(block, addr);
     }
     if(current_helper) {
-        dynarec_log(LOG_DEBUG, "Cancelling dynarec FillBlock at %p as anothor one is going on\n", (void*)addr);
+        dynarec_log(LOG_DEBUG, "Canceling dynarec FillBlock at %p as another one is going on\n", (void*)addr);
         return NULL;
     }
     // protect the 1st page
@@ -460,18 +484,14 @@ void* FillBlock64(dynablock_t* block, uintptr_t addr) {
     helper.start = addr;
     uintptr_t start = addr;
     helper.cap = 128;
-    helper.insts = (instruction_native_t*)customCalloc(helper.cap, sizeof(instruction_native_t));
+    helper.insts = (instruction_native_t*)dynaCalloc(helper.cap, sizeof(instruction_native_t));
     // pass 0, addresses, x64 jump addresses, overall size of the block
-    uintptr_t end = native_pass0(&helper, addr);
-    // no need for next anymore
-    customFree(helper.next);
-    helper.next_sz = helper.next_cap = 0;
-    helper.next = NULL;
+    uintptr_t end = native_pass0(&helper, addr, alternate, is32bits);
     // basic checks
     if(!helper.size) {
         dynarec_log(LOG_INFO, "Warning, null-sized dynarec block (%p)\n", (void*)addr);
         CancelBlock64(0);
-        return CreateEmptyBlock(block, addr);;
+        return CreateEmptyBlock(block, addr);
     }
     if(!isprotectedDB(addr, 1)) {
         dynarec_log(LOG_INFO, "Warning, write on current page on pass0, aborting dynablock creation (%p)\n", (void*)addr);
@@ -485,24 +505,57 @@ void* FillBlock64(dynablock_t* block, uintptr_t addr) {
     // compute hash signature
     uint32_t hash = X31_hash_code((void*)addr, end-addr);
     // calculate barriers
-    for(int i=0; i<helper.size; ++i)
-        if(helper.insts[i].x64.jmp) {
-            uintptr_t j = helper.insts[i].x64.jmp;
-            if(j<start || j>=end || j==helper.insts[i].x64.addr) {
-                helper.insts[i].x64.jmp_insts = -1;
-                helper.insts[i].x64.need_after |= X_PEND;
-            } else {
-                // find jump address instruction
-                int k=-1;
-                for(int i2=0; i2<helper.size && k==-1; ++i2) {
-                    if(helper.insts[i2].x64.addr==j)
-                        k=i2;
+    for(int ii=0; ii<helper.jmp_sz; ++ii) {
+        int i = helper.jmps[ii];
+        uintptr_t j = helper.insts[i].x64.jmp;
+        if(j<start || j>=end || j==helper.insts[i].x64.addr) {
+            if(j==helper.insts[i].x64.addr) // if there is a loop on some opcode, make the block "always to tested"
+                helper.always_test = 1;
+            helper.insts[i].x64.jmp_insts = -1;
+            helper.insts[i].x64.need_after |= X_PEND;
+        } else {
+            // find jump address instruction
+            int k=-1;
+            int search = ((j>=helper.insts[0].x64.addr) && j<helper.insts[0].x64.addr+helper.isize)?1:0;
+            int imin = 0;
+            int imax = helper.size-1;
+            int i2 = helper.size/2;
+            // dichotomy search
+            while(search) {
+                if(helper.insts[i2].x64.addr == j) {
+                    k = i2;
+                    search = 0;
+                } else if(helper.insts[i2].x64.addr>j) {
+                    imax = i2;
+                    i2 = (imax+imin)/2;
+                } else {
+                    imin = i2;
+                    i2 = (imax+imin)/2;
+                }
+                if(search && (imax-imin)<2) {
+                    search = 0;
+                    if(helper.insts[imin].x64.addr==j)
+                        k = imin;
+                    else if(helper.insts[imax].x64.addr==j)
+                        k = imax;
                 }
-                if(k!=-1 && !helper.insts[i].barrier_maybe)
-                    helper.insts[k].x64.barrier |= BARRIER_FULL;
-                helper.insts[i].x64.jmp_insts = k;
             }
+            /*for(int i2=0; i2<helper.size && k==-1; ++i2) {
+                if(helper.insts[i2].x64.addr==j)
+                    k=i2;
+            }*/
+            if(k!=-1 && !helper.insts[i].barrier_maybe)
+                helper.insts[k].x64.barrier |= BARRIER_FULL;
+            helper.insts[i].x64.jmp_insts = k;
         }
+    }
+    // no need for next and jmps anymore
+    dynaFree(helper.next);
+    helper.next_sz = helper.next_cap = 0;
+    helper.next = NULL;
+    dynaFree(helper.jmps);
+    helper.jmp_sz = helper.jmp_cap = 0;
+    helper.jmps = NULL;
     // fill predecessors with the jump address
     fillPredecessors(&helper);
 
@@ -510,43 +563,81 @@ void* FillBlock64(dynablock_t* block, uintptr_t addr) {
     while (pos>=0)
         pos = updateNeed(&helper, pos, 0);
 
-    // pass 1, float optimisations, first pass for flags
-    native_pass1(&helper, addr);
+    // pass 1, float optimizations, first pass for flags
+    native_pass1(&helper, addr, alternate, is32bits);
     
     // pass 2, instruction size
-    native_pass2(&helper, addr);
+    native_pass2(&helper, addr, alternate, is32bits);
     // keep size of instructions for signal handling
     size_t insts_rsize = (helper.insts_size+2)*sizeof(instsize_t);
     insts_rsize = (insts_rsize+7)&~7;   // round the size...
+    size_t native_size = (helper.native_size+7)&~7;   // round the size...
     // ok, now allocate mapped memory, with executable flag on
-    size_t sz = sizeof(void*) + helper.native_size + helper.table64size*sizeof(uint64_t) + 4*sizeof(void*) + insts_rsize;
-    //           dynablock_t*     block (arm insts)            table64                       jmpnext code       instsize
+    size_t sz = sizeof(void*) + native_size + helper.table64size*sizeof(uint64_t) + 4*sizeof(void*) + insts_rsize;
+    //           dynablock_t*     block (arm insts)            table64               jmpnext code       instsize
     void* actual_p = (void*)AllocDynarecMap(sz);
-    void* p = actual_p + sizeof(void*);
-    void* next = p + helper.native_size + helper.table64size*sizeof(uint64_t);
+    void* p = (void*)(((uintptr_t)actual_p) + sizeof(void*));
+    void* tablestart = p + native_size;
+    void* next = tablestart + helper.table64size*sizeof(uint64_t);
     void* instsize = next + 4*sizeof(void*);
     if(actual_p==NULL) {
-        dynarec_log(LOG_INFO, "AllocDynarecMap(%p, %zu) failed, cancelling block\n", block, sz);
+        dynarec_log(LOG_INFO, "AllocDynarecMap(%p, %zu) failed, canceling block\n", block, sz);
         CancelBlock64(0);
         return NULL;
     }
     helper.block = p;
+    block->actual_block = actual_p;
     helper.native_start = (uintptr_t)p;
-    helper.tablestart = helper.native_start + helper.native_size;
-    helper.insts_size = 0;  // reset
+    helper.tablestart = (uintptr_t)tablestart;
+    helper.jmp_next = (uintptr_t)next+sizeof(void*);
     helper.instsize = (instsize_t*)instsize;
     *(dynablock_t**)actual_p = block;
+    helper.table64cap = helper.table64size;
+    dynaFree(helper.table64);
+    helper.table64 = (uint64_t*)helper.tablestart;
     // pass 3, emit (log emit native opcode)
     if(box64_dynarec_dump) {
-        dynarec_log(LOG_NONE, "%s%04d|Emitting %zu bytes for %u x64 bytes", (box64_dynarec_dump>1)?"\e[01;36m":"", GetTID(), helper.native_size, helper.isize); 
+        dynarec_log(LOG_NONE, "%s%04d|Emitting %zu bytes for %u %s bytes", (box64_dynarec_dump>1)?"\e[01;36m":"", GetTID(), helper.native_size, helper.isize, is32bits?"x86":"x64"); 
         printFunctionAddr(helper.start, " => ");
         dynarec_log(LOG_NONE, "%s\n", (box64_dynarec_dump>1)?"\e[m":"");
     }
     int oldtable64size = helper.table64size;
     size_t oldnativesize = helper.native_size;
+    size_t oldinstsize = helper.insts_size;
     helper.native_size = 0;
     helper.table64size = 0; // reset table64 (but not the cap)
-    native_pass3(&helper, addr);
+    helper.insts_size = 0;  // reset
+    native_pass3(&helper, addr, alternate, is32bits);
+    // keep size of instructions for signal handling
+    block->instsize = instsize;
+    // ok, free the helper now
+    dynaFree(helper.insts);
+    helper.insts = NULL;
+    helper.table64 = NULL;
+    helper.instsize = NULL;
+    dynaFree(helper.predecessor);
+    helper.predecessor = NULL;
+    block->size = sz;
+    block->isize = helper.size;
+    block->block = p;
+    block->jmpnext = next+sizeof(void*);
+    block->always_test = helper.always_test;
+    block->dirty = block->always_test;
+    *(dynablock_t**)next = block;
+    *(void**)(next+3*sizeof(void*)) = native_next;
+    CreateJmpNext(block->jmpnext, next+3*sizeof(void*));
+    //block->x64_addr = (void*)start;
+    block->x64_size = end-start;
+    // all done...
+    __clear_cache(actual_p, actual_p+sz);   // need to clear the cache before execution...
+    block->hash = X31_hash_code(block->x64_addr, block->x64_size);
+    // Check if something changed, to abort if it is
+    if((block->hash != hash)) {
+        dynarec_log(LOG_DEBUG, "Warning, a block changed while being processed hash(%p:%ld)=%x/%x\n", block->x64_addr, block->x64_size, block->hash, hash);
+        AddHotPage(addr);
+        CancelBlock64(0);
+        return NULL;
+    }
     if((oldnativesize!=helper.native_size) || (oldtable64size<helper.table64size)) {
         printf_log(LOG_NONE, "BOX64: Warning, size difference in block between pass2 (%zu) & pass3 (%zu)!\n", sz, helper.native_size+helper.table64size*8);
         uint8_t *dump = (uint8_t*)helper.start;
@@ -559,47 +650,16 @@ void* FillBlock64(dynablock_t* block, uintptr_t addr) {
         }
         printf_log(LOG_NONE, "Table64 \t%d -> %d\n", oldtable64size*8, helper.table64size*8);
         printf_log(LOG_NONE, " ------------\n");
-        //TODO: Cancel block and return empty one
-    }
-    // add table64 if needed
-    if(helper.table64size) {
-        memcpy((void*)helper.tablestart, helper.table64, helper.table64size*8);
-    }
-    // keep size of instructions for signal handling
-    block->instsize = instsize;
-    // ok, free the helper now
-    customFree(helper.insts);
-    helper.insts = NULL;
-    customFree(helper.table64);
-    helper.table64 = NULL;
-    helper.instsize = NULL;
-    customFree(helper.predecessor);
-    helper.predecessor = NULL;
-    block->size = sz;
-    block->isize = helper.size;
-    block->actual_block = actual_p;
-    block->block = p;
-    block->jmpnext = next+sizeof(void*);
-    *(dynablock_t**)next = block;
-    *(void**)(next+2*sizeof(void*)) = native_next;
-    CreateJmpNext(block->jmpnext, next+2*sizeof(void*));
-    block->need_test = 0;
-    //block->x64_addr = (void*)start;
-    block->x64_size = end-start;
-    // all done...
-    __clear_cache(actual_p, actual_p+sz);   // need to clear the cache before execution...
-    block->hash = X31_hash_code(block->x64_addr, block->x64_size);
-    // Check if something changed, to abbort if it as
-    if((block->hash != hash)) {
-        dynarec_log(LOG_DEBUG, "Warning, a block changed while beeing processed hash(%p:%ld)=%x/%x\n", block->x64_addr, block->x64_size, block->hash, hash);
-        AddHotPage(addr);
         CancelBlock64(0);
         return NULL;
     }
+    if(insts_rsize/sizeof(instsize_t)<helper.insts_size) {
+        printf_log(LOG_NONE, "BOX64: Warning, insts_size difference in block between pass2 (%zu) and pass3 (%zu), allocated: %zu\n", oldinstsize, helper.insts_size, insts_rsize/sizeof(instsize_t));
+    }
     if(!isprotectedDB(addr, end-addr)) {
-        dynarec_log(LOG_DEBUG, "Warning, block unprotected while beeing processed %p:%ld, cancelling\n", block->x64_addr, block->x64_size);
+        dynarec_log(LOG_DEBUG, "Warning, block unprotected while being processed %p:%ld, marking as need_test\n", block->x64_addr, block->x64_size);
         AddHotPage(addr);
-        block->need_test = 1;
+        block->dirty = 1;
         //protectDB(addr, end-addr);
     }
     current_helper = NULL;

src/dynarec/dynarec_native_functions.c

@@ -0,0 +1,512 @@
+#define _GNU_SOURCE
+#include <stdio.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <string.h>
+#include <math.h>
+#include <signal.h>
+#include <sys/types.h>
+#include <unistd.h>
+
+#include "debug.h"
+#include "box64context.h"
+#include "dynarec.h"
+#include "emu/x64emu_private.h"
+#include "tools/bridge_private.h"
+#include "x64run.h"
+#include "x64emu.h"
+#include "box64stack.h"
+#include "callback.h"
+#include "emu/x64run_private.h"
+#include "emu/x87emu_private.h"
+#include "x64trace.h"
+#include "signals.h"
+#include "dynarec_native.h"
+#include "custommem.h"
+#include "bridge.h"
+#include "dynarec_native_functions.h"
+
+void native_fstp(x64emu_t* emu, void* p)
+{
+    if(ST0.q!=STld(0).uref)
+        D2LD(&ST0.d, p);
+    else
+        memcpy(p, &STld(0).ld, 10);
+}
+
+void native_print_armreg(x64emu_t* emu, uintptr_t reg, uintptr_t n)
+{
+    (void)emu;
+    dynarec_log(LOG_DEBUG, "R%lu=0x%lx (%lu)\n", n, reg, reg);
+}
+
+void native_f2xm1(x64emu_t* emu)
+{
+    ST0.d = exp2(ST0.d) - 1.0;
+}
+void native_fyl2x(x64emu_t* emu)
+{
+    ST(1).d = log2(ST0.d)*ST(1).d;
+}
+void native_ftan(x64emu_t* emu)
+{
+    ST0.d = tan(ST0.d);
+    emu->sw.f.F87_C2 = 0;
+}
+void native_fpatan(x64emu_t* emu)
+{
+    ST1.d = atan2(ST1.d, ST0.d);
+}
+void native_fxtract(x64emu_t* emu)
+{
+    int32_t tmp32s = (ST1.q&0x7ff0000000000000LL)>>52;
+    tmp32s -= 1023;
+    ST1.d /= exp2(tmp32s);
+    ST0.d = tmp32s;
+}
+void native_fprem(x64emu_t* emu)
+{
+    int e0, e1;
+    int64_t ll;
+    frexp(ST0.d, &e0);
+    frexp(ST1.d, &e1);
+    int32_t tmp32s = e0 - e1;
+    if(tmp32s<64)
+    {
+        ll = (int64_t)floor(ST0.d/ST1.d);
+        ST0.d = ST0.d - (ST1.d*ll);
+        emu->sw.f.F87_C2 = 0;
+        emu->sw.f.F87_C1 = (ll&1)?1:0;
+        emu->sw.f.F87_C3 = (ll&2)?1:0;
+        emu->sw.f.F87_C0 = (ll&4)?1:0;
+    } else {
+        ll = (int64_t)(floor((ST0.d/ST1.d))/exp2(tmp32s - 32));
+        ST0.d = ST0.d - ST1.d*ll*exp2(tmp32s - 32);
+        emu->sw.f.F87_C2 = 1;
+    }
+}
+void native_fyl2xp1(x64emu_t* emu)
+{
+    ST(1).d = log2(ST0.d + 1.0)*ST(1).d;
+}
+void native_fsincos(x64emu_t* emu)
+{
+    sincos(ST1.d, &ST1.d, &ST0.d);
+    emu->sw.f.F87_C2 = 0;
+}
+void native_frndint(x64emu_t* emu)
+{
+    ST0.d = fpu_round(emu, ST0.d);
+}
+void native_fscale(x64emu_t* emu)
+{
+    if(ST0.d!=0.0)
+        ST0.d *= exp2(trunc(ST1.d));
+}
+void native_fsin(x64emu_t* emu)
+{
+    ST0.d = sin(ST0.d);
+    emu->sw.f.F87_C2 = 0;
+}
+void native_fcos(x64emu_t* emu)
+{
+    ST0.d = cos(ST0.d);
+    emu->sw.f.F87_C2 = 0;
+}
+
+void native_fbld(x64emu_t* emu, uint8_t* ed)
+{
+    fpu_fbld(emu, ed);
+}
+
+void native_fild64(x64emu_t* emu, int64_t* ed)
+{
+    int64_t tmp;
+    memcpy(&tmp, ed, sizeof(tmp));
+    ST0.d = tmp;
+    STll(0).sq = tmp;
+    STll(0).sref = ST0.sq;
+}
+
+void native_fbstp(x64emu_t* emu, uint8_t* ed)
+{
+    fpu_fbst(emu, ed);
+}
+
+void native_fistp64(x64emu_t* emu, int64_t* ed)
+{
+    // used of memcpy to avoid aligments issues
+    if(STll(0).sref==ST(0).sq) {
+        memcpy(ed, &STll(0).sq, sizeof(int64_t));
+    } else {
+        int64_t tmp;
+        if(isgreater(ST0.d, (double)(int64_t)0x7fffffffffffffffLL) || isless(ST0.d, (double)(int64_t)0x8000000000000000LL) || !isfinite(ST0.d))
+            tmp = 0x8000000000000000LL;
+        else
+            tmp = fpu_round(emu, ST0.d);
+        memcpy(ed, &tmp, sizeof(tmp));
+    }
+}
+
+void native_fistt64(x64emu_t* emu, int64_t* ed)
+{
+    // used of memcpy to avoid alignments issues
+    int64_t tmp = ST0.d;
+    memcpy(ed, &tmp, sizeof(tmp));
+}
+
+void native_fld(x64emu_t* emu, uint8_t* ed)
+{
+    memcpy(&STld(0).ld, ed, 10);
+    LD2D(&STld(0), &ST(0).d);
+    STld(0).uref = ST0.q;
+}
+
+void native_ud(x64emu_t* emu)
+{
+    if(box64_dynarec_test)
+        emu->test.test = 0;
+    emit_signal(emu, SIGILL, (void*)R_RIP, 0);
+}
+
+void native_priv(x64emu_t* emu)
+{
+    emu->test.test = 0;
+    emit_signal(emu, SIGSEGV, (void*)R_RIP, 0);
+}
+
+void native_int(x64emu_t* emu, int num)
+{
+    emu->test.test = 0;
+    emit_interruption(emu, num, (void*)R_RIP);
+}
+
+void native_singlestep(x64emu_t* emu)
+{
+    emit_signal(emu, SIGTRAP, (void*)R_RIP, 1);
+}
+
+void native_int3(x64emu_t* emu)
+{
+    emit_signal(emu, SIGTRAP, (void*)R_RIP, 128);
+}
+
+void native_div0(x64emu_t* emu)
+{
+    emu->test.test = 0;
+    emit_div0(emu,  (void*)R_RIP, 0);
+}
+
+void native_fsave(x64emu_t* emu, uint8_t* ed)
+{
+    fpu_savenv(emu, (char*)ed, 0);
+
+    uint8_t* p = ed;
+    p += 28;
+    for (int i=0; i<8; ++i) {
+        LD2D(p, &ST(i).d);
+        p+=10;
+    }
+}
+void native_frstor(x64emu_t* emu, uint8_t* ed)
+{
+    fpu_loadenv(emu, (char*)ed, 0);
+
+    uint8_t* p = ed;
+    p += 28;
+    for (int i=0; i<8; ++i) {
+        D2LD(&ST(i).d, p);
+        p+=10;
+    }
+
+}
+
+void native_fprem1(x64emu_t* emu)
+{
+    int e0, e1;
+    int64_t ll;
+    frexp(ST0.d, &e0);
+    frexp(ST1.d, &e1);
+    int32_t tmp32s = e0 - e1;
+    if(tmp32s<64)
+    {
+        ll = (int64_t)round(ST0.d/ST1.d);
+        ST0.d = ST0.d - (ST1.d*ll);
+        emu->sw.f.F87_C2 = 0;
+        emu->sw.f.F87_C1 = (ll&1)?1:0;
+        emu->sw.f.F87_C3 = (ll&2)?1:0;
+        emu->sw.f.F87_C0 = (ll&4)?1:0;
+    } else {
+        ll = (int64_t)(trunc((ST0.d/ST1.d))/exp2(tmp32s - 32));
+        ST0.d = ST0.d - ST1.d*ll*exp2(tmp32s - 32);
+        emu->sw.f.F87_C2 = 1;
+    }
+}
+
+static uint8_t ff_mult(uint8_t a, uint8_t b)
+{
+	int retval = 0;
+
+	for(int i = 0; i < 8; i++) {
+		if((b & 1) == 1)
+			retval ^= a;
+
+		if((a & 0x80)) {
+			a <<= 1;
+			a  ^= 0x1b;
+		} else {
+			a <<= 1;
+		}
+
+		b >>= 1;
+	}
+
+	return retval;
+}
+
+void native_aesimc(x64emu_t* emu, int xmm)
+{
+    sse_regs_t eax1 = emu->xmm[xmm];
+
+    for(int j=0; j<4; ++j) {
+        emu->xmm[xmm].ub[0+j*4] = ff_mult(0x0E, eax1.ub[0+j*4]) ^ ff_mult(0x0B, eax1.ub[1+j*4]) ^ ff_mult(0x0D, eax1.ub[2+j*4]) ^ ff_mult(0x09, eax1.ub[3+j*4]);
+        emu->xmm[xmm].ub[1+j*4] = ff_mult(0x09, eax1.ub[0+j*4]) ^ ff_mult(0x0E, eax1.ub[1+j*4]) ^ ff_mult(0x0B, eax1.ub[2+j*4]) ^ ff_mult(0x0D, eax1.ub[3+j*4]);
+        emu->xmm[xmm].ub[2+j*4] = ff_mult(0x0D, eax1.ub[0+j*4]) ^ ff_mult(0x09, eax1.ub[1+j*4]) ^ ff_mult(0x0E, eax1.ub[2+j*4]) ^ ff_mult(0x0B, eax1.ub[3+j*4]);
+        emu->xmm[xmm].ub[3+j*4] = ff_mult(0x0B, eax1.ub[0+j*4]) ^ ff_mult(0x0D, eax1.ub[1+j*4]) ^ ff_mult(0x09, eax1.ub[2+j*4]) ^ ff_mult(0x0E, eax1.ub[3+j*4]);
+    }
+}
+void native_aesmc(x64emu_t* emu, int xmm)
+{
+    sse_regs_t eax1 = emu->xmm[xmm];
+
+    for(int j=0; j<4; ++j) {
+        emu->xmm[xmm].ub[0+j*4] = ff_mult(0x02, eax1.ub[0+j*4]) ^ ff_mult(0x03, eax1.ub[1+j*4]) ^               eax1.ub[2+j*4]  ^               eax1.ub[3+j*4] ;
+        emu->xmm[xmm].ub[1+j*4] =               eax1.ub[0+j*4]  ^ ff_mult(0x02, eax1.ub[1+j*4]) ^ ff_mult(0x03, eax1.ub[2+j*4]) ^               eax1.ub[3+j*4] ;
+        emu->xmm[xmm].ub[2+j*4] =               eax1.ub[0+j*4]  ^               eax1.ub[1+j*4]  ^ ff_mult(0x02, eax1.ub[2+j*4]) ^ ff_mult(0x03, eax1.ub[3+j*4]);
+        emu->xmm[xmm].ub[3+j*4] = ff_mult(0x03, eax1.ub[0+j*4]) ^               eax1.ub[1+j*4]  ^               eax1.ub[2+j*4]  ^ ff_mult(0x02, eax1.ub[3+j*4]);
+    }
+}
+void native_aesdlast(x64emu_t* emu, int xmm)
+{
+                            //   A0 B1 C2 D3 E4 F5 G6 H7 I8 J9 Ka Lb Mc Nd Oe Pf
+                            //   A  N  K  H  E  B  O  L  I  F  C  P  M  J  G  D
+    const uint8_t invshiftrows[] = {0,13,10, 7, 4, 1,14,11, 8, 5, 2,15,12, 9, 6, 3};
+    const uint8_t invsubbytes[256] = {
+        0x52, 0x09, 0x6a, 0xd5, 0x30, 0x36, 0xa5, 0x38, 0xbf, 0x40, 0xa3, 0x9e, 0x81, 0xf3, 0xd7, 0xfb,
+        0x7c, 0xe3, 0x39, 0x82, 0x9b, 0x2f, 0xff, 0x87, 0x34, 0x8e, 0x43, 0x44, 0xc4, 0xde, 0xe9, 0xcb,
+        0x54, 0x7b, 0x94, 0x32, 0xa6, 0xc2, 0x23, 0x3d, 0xee, 0x4c, 0x95, 0x0b, 0x42, 0xfa, 0xc3, 0x4e,
+        0x08, 0x2e, 0xa1, 0x66, 0x28, 0xd9, 0x24, 0xb2, 0x76, 0x5b, 0xa2, 0x49, 0x6d, 0x8b, 0xd1, 0x25,
+        0x72, 0xf8, 0xf6, 0x64, 0x86, 0x68, 0x98, 0x16, 0xd4, 0xa4, 0x5c, 0xcc, 0x5d, 0x65, 0xb6, 0x92,
+        0x6c, 0x70, 0x48, 0x50, 0xfd, 0xed, 0xb9, 0xda, 0x5e, 0x15, 0x46, 0x57, 0xa7, 0x8d, 0x9d, 0x84,
+        0x90, 0xd8, 0xab, 0x00, 0x8c, 0xbc, 0xd3, 0x0a, 0xf7, 0xe4, 0x58, 0x05, 0xb8, 0xb3, 0x45, 0x06,
+        0xd0, 0x2c, 0x1e, 0x8f, 0xca, 0x3f, 0x0f, 0x02, 0xc1, 0xaf, 0xbd, 0x03, 0x01, 0x13, 0x8a, 0x6b,
+        0x3a, 0x91, 0x11, 0x41, 0x4f, 0x67, 0xdc, 0xea, 0x97, 0xf2, 0xcf, 0xce, 0xf0, 0xb4, 0xe6, 0x73,
+        0x96, 0xac, 0x74, 0x22, 0xe7, 0xad, 0x35, 0x85, 0xe2, 0xf9, 0x37, 0xe8, 0x1c, 0x75, 0xdf, 0x6e,
+        0x47, 0xf1, 0x1a, 0x71, 0x1d, 0x29, 0xc5, 0x89, 0x6f, 0xb7, 0x62, 0x0e, 0xaa, 0x18, 0xbe, 0x1b,
+        0xfc, 0x56, 0x3e, 0x4b, 0xc6, 0xd2, 0x79, 0x20, 0x9a, 0xdb, 0xc0, 0xfe, 0x78, 0xcd, 0x5a, 0xf4,
+        0x1f, 0xdd, 0xa8, 0x33, 0x88, 0x07, 0xc7, 0x31, 0xb1, 0x12, 0x10, 0x59, 0x27, 0x80, 0xec, 0x5f,
+        0x60, 0x51, 0x7f, 0xa9, 0x19, 0xb5, 0x4a, 0x0d, 0x2d, 0xe5, 0x7a, 0x9f, 0x93, 0xc9, 0x9c, 0xef,
+        0xa0, 0xe0, 0x3b, 0x4d, 0xae, 0x2a, 0xf5, 0xb0, 0xc8, 0xeb, 0xbb, 0x3c, 0x83, 0x53, 0x99, 0x61,
+        0x17, 0x2b, 0x04, 0x7e, 0xba, 0x77, 0xd6, 0x26, 0xe1, 0x69, 0x14, 0x63, 0x55, 0x21, 0x0c, 0x7d,
+    };
+
+    sse_regs_t eax1;
+    for(int i=0; i<16; ++i)
+        eax1.ub[i] = emu->xmm[xmm].ub[invshiftrows[i]];
+    //STATE ← InvSubBytes( STATE );
+    for(int i=0; i<16; ++i)
+        emu->xmm[xmm].ub[i] = invsubbytes[eax1.ub[i]];
+
+}
+static const uint8_t shiftrows[] = {0, 5,10,15, 4, 9,14, 3, 8,13, 2, 7,12, 1, 6,11};
+static const uint8_t subbytes[256] = {
+    0x63, 0x7c, 0x77, 0x7b, 0xf2, 0x6b, 0x6f, 0xc5, 0x30, 0x01, 0x67, 0x2b, 0xfe, 0xd7, 0xab, 0x76,
+    0xca, 0x82, 0xc9, 0x7d, 0xfa, 0x59, 0x47, 0xf0, 0xad, 0xd4, 0xa2, 0xaf, 0x9c, 0xa4, 0x72, 0xc0,
+    0xb7, 0xfd, 0x93, 0x26, 0x36, 0x3f, 0xf7, 0xcc, 0x34, 0xa5, 0xe5, 0xf1, 0x71, 0xd8, 0x31, 0x15,
+    0x04, 0xc7, 0x23, 0xc3, 0x18, 0x96, 0x05, 0x9a, 0x07, 0x12, 0x80, 0xe2, 0xeb, 0x27, 0xb2, 0x75,
+    0x09, 0x83, 0x2c, 0x1a, 0x1b, 0x6e, 0x5a, 0xa0, 0x52, 0x3b, 0xd6, 0xb3, 0x29, 0xe3, 0x2f, 0x84,
+    0x53, 0xd1, 0x00, 0xed, 0x20, 0xfc, 0xb1, 0x5b, 0x6a, 0xcb, 0xbe, 0x39, 0x4a, 0x4c, 0x58, 0xcf,
+    0xd0, 0xef, 0xaa, 0xfb, 0x43, 0x4d, 0x33, 0x85, 0x45, 0xf9, 0x02, 0x7f, 0x50, 0x3c, 0x9f, 0xa8,
+    0x51, 0xa3, 0x40, 0x8f, 0x92, 0x9d, 0x38, 0xf5, 0xbc, 0xb6, 0xda, 0x21, 0x10, 0xff, 0xf3, 0xd2,
+    0xcd, 0x0c, 0x13, 0xec, 0x5f, 0x97, 0x44, 0x17, 0xc4, 0xa7, 0x7e, 0x3d, 0x64, 0x5d, 0x19, 0x73,
+    0x60, 0x81, 0x4f, 0xdc, 0x22, 0x2a, 0x90, 0x88, 0x46, 0xee, 0xb8, 0x14, 0xde, 0x5e, 0x0b, 0xdb,
+    0xe0, 0x32, 0x3a, 0x0a, 0x49, 0x06, 0x24, 0x5c, 0xc2, 0xd3, 0xac, 0x62, 0x91, 0x95, 0xe4, 0x79,
+    0xe7, 0xc8, 0x37, 0x6d, 0x8d, 0xd5, 0x4e, 0xa9, 0x6c, 0x56, 0xf4, 0xea, 0x65, 0x7a, 0xae, 0x08,
+    0xba, 0x78, 0x25, 0x2e, 0x1c, 0xa6, 0xb4, 0xc6, 0xe8, 0xdd, 0x74, 0x1f, 0x4b, 0xbd, 0x8b, 0x8a,
+    0x70, 0x3e, 0xb5, 0x66, 0x48, 0x03, 0xf6, 0x0e, 0x61, 0x35, 0x57, 0xb9, 0x86, 0xc1, 0x1d, 0x9e,
+    0xe1, 0xf8, 0x98, 0x11, 0x69, 0xd9, 0x8e, 0x94, 0x9b, 0x1e, 0x87, 0xe9, 0xce, 0x55, 0x28, 0xdf,
+    0x8c, 0xa1, 0x89, 0x0d, 0xbf, 0xe6, 0x42, 0x68, 0x41, 0x99, 0x2d, 0x0f, 0xb0, 0x54, 0xbb, 0x16,
+};
+void native_aeselast(x64emu_t* emu, int xmm)
+{
+                            //   A0 B1 C2 D3 E4 F5 G6 H7 I8 J9 Ka Lb Mc Nd Oe Pf
+                            //   A  F  K  P  E  J  O  D  I  N  C  H  M  B  G  L
+    sse_regs_t eax1;
+    for(int i=0; i<16; ++i)
+        eax1.ub[i] = emu->xmm[xmm].ub[shiftrows[i]];
+    //STATE ← SubBytes( STATE );
+    for(int i=0; i<16; ++i)
+        emu->xmm[xmm].ub[i] = subbytes[eax1.ub[i]];
+}
+void native_aesd(x64emu_t* emu, int xmm)
+{
+    native_aesdlast(emu, xmm);
+    native_aesimc(emu, xmm);
+}
+void native_aese(x64emu_t* emu, int xmm)
+{
+    native_aeselast(emu, xmm);
+    native_aesmc(emu, xmm);
+}
+void native_aeskeygenassist(x64emu_t* emu, int gx, int ex, void* p, uint32_t u8)
+{
+    sse_regs_t *EX = p?((sse_regs_t*)p):&emu->xmm[ex];
+    sse_regs_t *GX = &emu->xmm[gx];
+    for (int i = 4; i < 8; ++i)
+        GX->ub[i] = subbytes[EX->ub[i]];
+    for (int i = 12; i < 16; ++i)
+        GX->ub[i] = subbytes[EX->ub[i]];
+    GX->ud[0] = GX->ud[1];
+    uint8_t tmp8u = GX->ub[4];
+    GX->ud[1] = GX->ud[1] >> 8;
+    GX->ub[7] = tmp8u;
+    GX->ud[1] ^= u8;
+    GX->ud[2] = GX->ud[3];
+    tmp8u = GX->ub[12];
+    GX->ud[3] = GX->ud[3] >> 8;
+    GX->ub[15] = tmp8u;
+    GX->ud[3] ^= u8;
+}
+
+void native_pclmul(x64emu_t* emu, int gx, int ex, void* p, uint32_t u8)
+{
+    sse_regs_t *EX = p?((sse_regs_t*)p):&emu->xmm[ex];
+    sse_regs_t *GX = &emu->xmm[gx];
+    int g = (u8&1)?1:0;
+    int e = (u8&0b10000)?1:0;
+    __int128 result = 0;
+    __int128 op2 = EX->q[e];
+    for (int i=0; i<64; ++i)
+        if(GX->q[g]&(1LL<<i))
+            result ^= (op2<<i);
+
+    GX->q[0] = result&0xffffffffffffffffLL;
+    GX->q[1] = (result>>64)&0xffffffffffffffffLL;
+}
+
+void native_clflush(x64emu_t* emu, void* p)
+{
+    cleanDBFromAddressRange((uintptr_t)p, 8, 0);
+}
+
+static int flagsCacheNeedsTransform(dynarec_native_t* dyn, int ninst) {
+    int jmp = dyn->insts[ninst].x64.jmp_insts;
+    if(jmp<0)
+        return 0;
+    if(dyn->insts[ninst].f_exit.dfnone)  // flags are fully known, nothing we can do more
+        return 0;
+    if(dyn->insts[jmp].f_entry.dfnone && !dyn->insts[ninst].f_exit.dfnone)
+        return 1;
+    switch (dyn->insts[jmp].f_entry.pending) {
+        case SF_UNKNOWN: return 0;
+        case SF_SET:
+            if(dyn->insts[ninst].f_exit.pending!=SF_SET && dyn->insts[ninst].f_exit.pending!=SF_SET_PENDING)
+                return 1;
+            else
+                return 0;
+        case SF_SET_PENDING:
+            if(dyn->insts[ninst].f_exit.pending==SF_SET_PENDING)
+                return 0;
+            return 1;
+        case SF_PENDING:
+            if(dyn->insts[ninst].f_exit.pending==SF_PENDING || dyn->insts[ninst].f_exit.pending==SF_SET_PENDING)
+                return 0;
+            return (dyn->insts[jmp].f_entry.dfnone  == dyn->insts[ninst].f_exit.dfnone)?0:1;
+    }
+    return 0;
+}
+
+int CacheNeedsTransform(dynarec_native_t* dyn, int ninst) {
+    int ret = 0;
+    if (flagsCacheNeedsTransform(dyn, ninst)) ret|=1;
+    OTHER_CACHE()
+    return ret;
+}
+
+int isPred(dynarec_native_t* dyn, int ninst, int pred) {
+    for(int i=0; i<dyn->insts[ninst].pred_sz; ++i)
+        if(dyn->insts[ninst].pred[i]==pred)
+            return pred;
+    return -1;
+}
+int getNominalPred(dynarec_native_t* dyn, int ninst) {
+    if((ninst<=0) || !dyn->insts[ninst].pred_sz)
+        return -1;
+    if(isPred(dyn, ninst, ninst-1)!=-1)
+        return ninst-1;
+    return dyn->insts[ninst].pred[0];
+}
+
+#define F8      *(uint8_t*)(addr++)
+// Do the GETED, but don't emit anything...
+uintptr_t fakeed(dynarec_native_t* dyn, uintptr_t addr, int ninst, uint8_t nextop)
+{
+    (void)dyn; (void)addr; (void)ninst;
+
+    if((nextop&0xC0)==0xC0)
+        return addr;
+    if(!(nextop&0xC0)) {
+        if((nextop&7)==4) {
+            uint8_t sib = F8;
+            if((sib&0x7)==5) {
+                addr+=4;
+            }
+        } else if((nextop&7)==5) {
+            addr+=4;
+        }
+    } else {
+        if((nextop&7)==4) {
+            ++addr;
+        }
+        if(nextop&0x80) {
+            addr+=4;
+        } else {
+            ++addr;
+        }
+    }
+    return addr;
+}
+// return Ib on a mod/rm opcode without emiting anything
+uint8_t geted_ib(dynarec_native_t* dyn, uintptr_t addr, int ninst, uint8_t nextop)
+{
+    addr = fakeed(dyn, addr, ninst, nextop);
+    return F8;
+}
+#undef F8
+
+int isNativeCall(dynarec_native_t* dyn, uintptr_t addr, uintptr_t* calladdress, int* retn)
+{
+    (void)dyn;
+
+#define PK(a)       *(uint8_t*)(addr+a)
+#define PK32(a)     *(int32_t*)(addr+a)
+
+    if(!addr || !getProtection(addr))
+        return 0;
+    if(PK(0)==0xff && PK(1)==0x25) {            // "absolute" jump, maybe the GOT (well, RIP relative in fact)
+        uintptr_t a1 = addr + 6 + (PK32(2));    // need to add a check to see if the address is from the GOT !
+        addr = (uintptr_t)getAlternate(*(void**)a1);
+    }
+    if(!addr || !getProtection(addr))
+        return 0;
+    onebridge_t *b = (onebridge_t*)(addr);
+    if(b->CC==0xCC && b->S=='S' && b->C=='C' && b->w!=(wrapper_t)0 && b->f!=(uintptr_t)PltResolver) {
+        // found !
+        if(retn) *retn = (b->C3==0xC2)?b->N:0;
+        if(calladdress) *calladdress = addr+1;
+        return 1;
+    }
+    return 0;
+#undef PK32
+#undef PK
+}

src/dynarec/dynarec_native_functions.h

@@ -0,0 +1,70 @@
+#ifndef __DYNAREC_NATIVE_FUNCTIONS_H__
+#define __DYNAREC_NATIVE_FUNCTIONS_H__
+
+#include <stdint.h>
+
+#include "dynarec_arch.h"
+
+typedef struct x64emu_s x64emu_t;
+
+void native_fstp(x64emu_t* emu, void* p);
+
+void native_print_armreg(x64emu_t* emu, uintptr_t reg, uintptr_t n);
+
+void native_f2xm1(x64emu_t* emu);
+void native_fyl2x(x64emu_t* emu);
+void native_ftan(x64emu_t* emu);
+void native_fpatan(x64emu_t* emu);
+void native_fxtract(x64emu_t* emu);
+void native_fprem(x64emu_t* emu);
+void native_fyl2xp1(x64emu_t* emu);
+void native_fsincos(x64emu_t* emu);
+void native_frndint(x64emu_t* emu);
+void native_fscale(x64emu_t* emu);
+void native_fsin(x64emu_t* emu);
+void native_fcos(x64emu_t* emu);
+void native_fbld(x64emu_t* emu, uint8_t* ed);
+void native_fild64(x64emu_t* emu, int64_t* ed);
+void native_fbstp(x64emu_t* emu, uint8_t* ed);
+void native_fistp64(x64emu_t* emu, int64_t* ed);
+void native_fistt64(x64emu_t* emu, int64_t* ed);
+void native_fld(x64emu_t* emu, uint8_t* ed);
+void native_fsave(x64emu_t* emu, uint8_t* ed);
+void native_frstor(x64emu_t* emu, uint8_t* ed);
+void native_fprem1(x64emu_t* emu);
+
+void native_aesd(x64emu_t* emu, int xmm);
+void native_aese(x64emu_t* emu, int xmm);
+void native_aesdlast(x64emu_t* emu, int xmm);
+void native_aeselast(x64emu_t* emu, int xmm);
+void native_aesimc(x64emu_t* emu, int xmm);
+void native_aeskeygenassist(x64emu_t* emu, int gx, int ex, void* p, uint32_t u8);
+void native_pclmul(x64emu_t* emu, int gx, int ex, void* p, uint32_t u8);
+
+void native_clflush(x64emu_t* emu, void* p);
+
+void native_ud(x64emu_t* emu);
+void native_priv(x64emu_t* emu);
+void native_singlestep(x64emu_t* emu);
+void native_int3(x64emu_t* emu);
+void native_int(x64emu_t* emu, int num);
+void native_div0(x64emu_t* emu);
+
+// Caches transformation (for loops) // Specific, need to be written par backend
+int CacheNeedsTransform(dynarec_native_t* dyn, int i1);
+
+// predecessor access
+int isPred(dynarec_native_t* dyn, int ninst, int pred);
+int getNominalPred(dynarec_native_t* dyn, int ninst);
+
+// Do the GETED, but don't emit anything...
+uintptr_t fakeed(dynarec_native_t* dyn, uintptr_t addr, int ninst, uint8_t nextop);
+// return Ib on a mod/rm opcode without emiting anything
+uint8_t geted_ib(dynarec_native_t* dyn, uintptr_t addr, int ninst, uint8_t nextop);
+
+// Is what pointed at addr a native call? And if yes, to what function?
+int isNativeCall(dynarec_native_t* dyn, uintptr_t addr, uintptr_t* calladdress, int* retn);
+
+ADDITIONNAL_DEFINITION()
+
+#endif //__DYNAREC_NATIVE_FUNCTIONS_H__

src/dynarec/dynarec_native_pass.c

@@ -1,7 +1,6 @@
 #include <stdio.h>
 #include <stdlib.h>
 #include <stddef.h>
-#include <pthread.h>
 #include <errno.h>
 #include <string.h>
 
@@ -27,7 +26,7 @@
 #error No STEP defined
 #endif
 
-uintptr_t native_pass(dynarec_native_t* dyn, uintptr_t addr)
+uintptr_t native_pass(dynarec_native_t* dyn, uintptr_t addr, int alternate, int is32bits)
 {
     int ok = 1;
     int ninst = 0;
@@ -45,9 +44,10 @@ uintptr_t native_pass(dynarec_native_t* dyn, uintptr_t addr)
     dyn->forward_size = 0;
     dyn->forward_ninst = 0;
     fpu_reset(dyn);
+    ARCH_INIT();
     int reset_n = -1;
-    dyn->last_ip = (dyn->insts && dyn->insts[0].pred_sz)?0:ip;  // RIP is always set at start of block unless there is a predecessor!
-    int stopblock = 2+(FindElfAddress(my_context, addr)?0:1); // if block is in elf_memory, it can be extended with bligblocks==2, else it needs 3
+    dyn->last_ip = (alternate || (dyn->insts && dyn->insts[0].pred_sz))?0:ip;  // RIP is always set at start of block unless there is a predecessor!
+    int stopblock = 2+(FindElfAddress(my_context, addr)?0:1); // if block is in elf_memory, it can be extended with box64_dynarec_bigblock==2, else it needs 3
     // ok, go now
     INIT;
     while(ok) {
@@ -60,44 +60,7 @@ uintptr_t native_pass(dynarec_native_t* dyn, uintptr_t addr)
                 dyn->f.pending = 0;
                 fpu_reset(dyn);
             } else {
-                MESSAGE(LOG_DEBUG, "Reset Caches with %d\n",reset_n);
-                #if STEP > 1
-                // for STEP 2 & 3, just need to refrest with current, and undo the changes (push & swap)
-                dyn->n = dyn->insts[ninst].n;
-                neoncacheUnwind(&dyn->n);
-                #ifdef HAVE_TRACE
-                if(box64_dynarec_dump)
-                    if(memcmp(&dyn->n, &dyn->insts[reset_n].n, sizeof(neon_cache_t))) {
-                        MESSAGE(LOG_DEBUG, "Warning, difference in neoncache: reset=");
-                        for(int i=0; i<24; ++i)
-                            if(dyn->insts[reset_n].n.neoncache[i].v)
-                                MESSAGE(LOG_DEBUG, " %02d:%s", i, getCacheName(dyn->insts[reset_n].n.neoncache[i].t, dyn->insts[reset_n].n.neoncache[i].n));
-                        if(dyn->insts[reset_n].n.combined1 || dyn->insts[reset_n].n.combined2)
-                            MESSAGE(LOG_DEBUG, " %s:%02d/%02d", dyn->insts[reset_n].n.swapped?"SWP":"CMB", dyn->insts[reset_n].n.combined1, dyn->insts[reset_n].n.combined2);
-                        if(dyn->insts[reset_n].n.stack_push || dyn->insts[reset_n].n.stack_pop)
-                            MESSAGE(LOG_DEBUG, " (%d:%d)", dyn->insts[reset_n].n.stack_push, -dyn->insts[reset_n].n.stack_pop);
-                        MESSAGE(LOG_DEBUG, " ==> ");
-                        for(int i=0; i<24; ++i)
-                            if(dyn->insts[ninst].n.neoncache[i].v)
-                                MESSAGE(LOG_DEBUG, " %02d:%s", i, getCacheName(dyn->insts[ninst].n.neoncache[i].t, dyn->insts[ninst].n.neoncache[i].n));
-                        if(dyn->insts[ninst].n.combined1 || dyn->insts[ninst].n.combined2)
-                            MESSAGE(LOG_DEBUG, " %s:%02d/%02d", dyn->insts[ninst].n.swapped?"SWP":"CMB", dyn->insts[ninst].n.combined1, dyn->insts[ninst].n.combined2);
-                        if(dyn->insts[ninst].n.stack_push || dyn->insts[ninst].n.stack_pop)
-                            MESSAGE(LOG_DEBUG, " (%d:%d)", dyn->insts[ninst].n.stack_push, -dyn->insts[ninst].n.stack_pop);
-                        MESSAGE(LOG_DEBUG, " -> ");
-                        for(int i=0; i<24; ++i)
-                            if(dyn->n.neoncache[i].v)
-                                MESSAGE(LOG_DEBUG, " %02d:%s", i, getCacheName(dyn->n.neoncache[i].t, dyn->n.neoncache[i].n));
-                        if(dyn->n.combined1 || dyn->n.combined2)
-                            MESSAGE(LOG_DEBUG, " %s:%02d/%02d", dyn->n.swapped?"SWP":"CMB", dyn->n.combined1, dyn->n.combined2);
-                        if(dyn->n.stack_push || dyn->n.stack_pop)
-                            MESSAGE(LOG_DEBUG, " (%d:%d)", dyn->n.stack_push, -dyn->n.stack_pop);
-                        MESSAGE(LOG_DEBUG, "\n");
-                    }
-                #endif //HAVE_TRACE
-                #else
-                dyn->n = dyn->insts[reset_n].n;
-                #endif
+                fpu_reset_cache(dyn, ninst, reset_n);
                 dyn->f = dyn->insts[reset_n].f_exit;
                 if(dyn->insts[ninst].x64.barrier&BARRIER_FLOAT) {
                     MESSAGE(LOG_DEBUG, "Apply Barrier Float\n");
@@ -110,36 +73,38 @@ uintptr_t native_pass(dynarec_native_t* dyn, uintptr_t addr)
                 }
             }
             reset_n = -1;
-        } else if(ninst && (dyn->insts[ninst].pred_sz!=1 || dyn->insts[ninst].pred[0]!=ninst-1))
-            dyn->last_ip = 0;   // reset IP if some jump are comming here
-        // propagate ST stack state, especial stack pop that are defered
-        if(dyn->n.stack_pop) {
-            for(int j=0; j<24; ++j)
-                if((dyn->n.neoncache[j].t == NEON_CACHE_ST_D || dyn->n.neoncache[j].t == NEON_CACHE_ST_F)) {
-                    if(dyn->n.neoncache[j].n<dyn->n.stack_pop)
-                        dyn->n.neoncache[j].v = 0;
-                    else
-                        dyn->n.neoncache[j].n-=dyn->n.stack_pop;
-                }
-            dyn->n.stack_pop = 0;
-        }
-        dyn->n.stack = dyn->n.stack_next;
-        dyn->n.news = 0;
-        dyn->n.stack_push = 0;
-        dyn->n.swapped = 0;
+        } else if(ninst && (dyn->insts[ninst].pred_sz>1 || (dyn->insts[ninst].pred_sz==1 && dyn->insts[ninst].pred[0]!=ninst-1)))
+            dyn->last_ip = 0;   // reset IP if some jump are coming here
+        fpu_propagate_stack(dyn, ninst);
         NEW_INST;
+        #if STEP == 0
+        if(ninst && dyn->insts[ninst-1].x64.barrier_next) {
+            BARRIER(dyn->insts[ninst-1].x64.barrier_next);
+        }
+        #endif
+        if(!ninst) {
+            GOTEST(x1, x2);
+        }
         if(dyn->insts[ninst].pred_sz>1) {SMSTART();}
         fpu_reset_scratch(dyn);
         if((dyn->insts[ninst].x64.need_before&~X_PEND) && !dyn->insts[ninst].pred_sz) {
             READFLAGS(dyn->insts[ninst].x64.need_before&~X_PEND);
         }
+        if(box64_dynarec_test) {
+            MESSAGE(LOG_DUMP, "TEST INIT ----\n");
+            fpu_reflectcache(dyn, ninst, x1, x2, x3);
+            GO_TRACE(x64test_init, 1, x5);
+            fpu_unreflectcache(dyn, ninst, x1, x2, x3);
+            MESSAGE(LOG_DUMP, "----------\n");
+        }
 #ifdef HAVE_TRACE
-        if(my_context->dec && box64_dynarec_trace) {
-        if((trace_end == 0) 
+        else if(my_context->dec && box64_dynarec_trace) {
+        if((trace_end == 0)
             || ((ip >= trace_start) && (ip < trace_end)))  {
                 MESSAGE(LOG_DUMP, "TRACE ----\n");
                 fpu_reflectcache(dyn, ninst, x1, x2, x3);
-                GO_TRACE();
+                GO_TRACE(PrintTrace, 1, x5);
+                fpu_unreflectcache(dyn, ninst, x1, x2, x3);
                 MESSAGE(LOG_DUMP, "----------\n");
             }
         }
@@ -147,21 +112,24 @@ uintptr_t native_pass(dynarec_native_t* dyn, uintptr_t addr)
 
         rep = 0;
         uint8_t pk = PK(0);
-        while((pk==0xF2) || (pk==0xF3)) {
-            rep = pk-0xF1;
-            ++addr;
-            pk = PK(0);
-        }
-        while(pk==0x3E || pk==0x26) {   //Branch Taken Hint ignored, same for ES: prefix
+        while((pk==0xF2) || (pk==0xF3) || (pk==0x3E) || (pk==0x26)) {
+            switch(pk) {
+                case 0xF2: rep = 1; break;
+                case 0xF3: rep = 2; break;
+                case 0x3E:
+                case 0x26: /* ignored */ break;
+            }
             ++addr;
             pk = PK(0);
         }
         rex.rex = 0;
-        while(pk>=0x40 && pk<=0x4f) {
-            rex.rex = pk;
-            ++addr;
-            pk = PK(0);
-        }
+        rex.is32bits = is32bits;
+        if(!rex.is32bits)
+            while(pk>=0x40 && pk<=0x4f) {
+                rex.rex = pk;
+                ++addr;
+                pk = PK(0);
+            }
 
         addr = dynarec64_00(dyn, addr, ip, ninst, rex, rep, &ok, &need_epilog);
 
@@ -189,12 +157,22 @@ uintptr_t native_pass(dynarec_native_t* dyn, uintptr_t addr)
             ok = 1;
             // we use the 1st predecessor here
             int ii = ninst+1;
-            while(ii<dyn->size && !dyn->insts[ii].pred_sz) 
-                ++ii;
+            if(ii<dyn->size && !dyn->insts[ii].pred_sz) {
+                while(ii<dyn->size && (!dyn->insts[ii].pred_sz || (dyn->insts[ii].pred_sz==1 && dyn->insts[ii].pred[0]==ii-1))) {
+                    // may need to skip opcodes to advance
+                    ++ninst;
+                    NEW_INST;
+                    MESSAGE(LOG_DEBUG, "Skipping unused opcode\n");
+                    INST_NAME("Skipped opcode");
+                    INST_EPILOG;
+                    addr += dyn->insts[ii].x64.size;
+                    ++ii;
+                }
+            }
             if((dyn->insts[ii].x64.barrier&BARRIER_FULL)==BARRIER_FULL)
                 reset_n = -2;    // hack to say Barrier!
             else {
-                reset_n = getNominalPred(dyn, ii);  // may get -1 if no predecessor are availble
+                reset_n = getNominalPred(dyn, ii);  // may get -1 if no predecessor are available
                 if(reset_n==-1) {
                     reset_n = -2;
                     MESSAGE(LOG_DEBUG, "Warning, Reset Caches mark not found\n");
@@ -205,13 +183,15 @@ uintptr_t native_pass(dynarec_native_t* dyn, uintptr_t addr)
         if(dyn->forward) {
             if(dyn->forward_to == addr && !need_epilog) {
                 // we made it!
-                if(box64_dynarec_dump) dynarec_log(LOG_NONE, "Forward extend block for %d bytes %p -> %p\n", dyn->forward_to-dyn->forward, (void*)dyn->forward, (void*)dyn->forward_to);
+                if(box64_dynarec_dump) dynarec_log(LOG_NONE, "Forward extend block for %d bytes %s%p -> %p\n", dyn->forward_to-dyn->forward, dyn->insts[dyn->forward_ninst].x64.has_callret?"(opt. call) ":"", (void*)dyn->forward, (void*)dyn->forward_to);
+                if(dyn->insts[dyn->forward_ninst].x64.has_callret && !dyn->insts[dyn->forward_ninst].x64.has_next)
+                    dyn->insts[dyn->forward_ninst].x64.has_next = 1;  // this block actually continue
                 dyn->forward = 0;
                 dyn->forward_to = 0;
                 dyn->forward_size = 0;
                 dyn->forward_ninst = 0;
                 ok = 1; // in case it was 0
-            } else if ((dyn->forward_to < addr) || !ok) {
+            } else if ((dyn->forward_to < addr) || ok<=0) {
                 // something when wrong! rollback
                 if(box64_dynarec_dump) dynarec_log(LOG_NONE, "Could not forward extend block for %d bytes %p -> %p\n", dyn->forward_to-dyn->forward, (void*)dyn->forward, (void*)dyn->forward_to);
                 ok = 0;
@@ -228,37 +208,80 @@ uintptr_t native_pass(dynarec_native_t* dyn, uintptr_t addr)
             if(*(uint32_t*)addr!=0) {   // check if need to continue (but is next 4 bytes are 0, stop)
                 uintptr_t next = get_closest_next(dyn, addr);
                 if(next && (
-                    (((next-addr)<15) && is_nops(dyn, addr, next-addr)) 
+                    (((next-addr)<15) && is_nops(dyn, addr, next-addr))
                     /*||(((next-addr)<30) && is_instructions(dyn, addr, next-addr))*/ ))
                 {
                     ok = 1;
-                    // need to find back that instruction to copy the caches, as previous version cannot be used anymore
-                    reset_n = -2;
-                    for(int ii=0; ii<ninst; ++ii)
-                        if(dyn->insts[ii].x64.jmp == next) {
-                            reset_n = ii;
-                            ii=ninst;
-                        }
-                    if(box64_dynarec_dump) dynarec_log(LOG_NONE, "Extend block %p, %p -> %p (ninst=%d, jump from %d)\n", dyn, (void*)addr, (void*)next, ninst, reset_n);
+                    if(dyn->insts[ninst].x64.has_callret && !dyn->insts[ninst].x64.has_next) {
+                        dyn->insts[ninst].x64.has_next = 1;  // this block actually continue
+                    } else {
+                        // need to find back that instruction to copy the caches, as previous version cannot be used anymore
+                        // and pred table is not ready yet
+                        reset_n = get_first_jump(dyn, next);
+                    }
+                    if(box64_dynarec_dump) dynarec_log(LOG_NONE, "Extend block %p, %s%p -> %p (ninst=%d, jump from %d)\n", dyn, dyn->insts[ninst].x64.has_callret?"(opt. call) ":"", (void*)addr, (void*)next, ninst, dyn->insts[ninst].x64.has_callret?ninst:reset_n);
                 } else if(next && (next-addr)<box64_dynarec_forward && (getProtection(next)&PROT_READ)/*box64_dynarec_bigblock>=stopblock*/) {
-                    dyn->forward = addr;
-                    dyn->forward_to = next;
-                    dyn->forward_size = dyn->size;
-                    dyn->forward_ninst = ninst;
-                    reset_n = -2;
-                    ok = 1;
+                    if(!((box64_dynarec_bigblock<stopblock) && !isJumpTableDefault64((void*)next))) {
+                        if(dyn->forward) {
+                            if(next<dyn->forward_to)
+                                dyn->forward_to = next;
+                            reset_n = -2;
+                            ok = 1;
+                        } else {
+                            dyn->forward = addr;
+                            dyn->forward_to = next;
+                            dyn->forward_size = dyn->size;
+                            dyn->forward_ninst = ninst;
+                            reset_n = -2;
+                            ok = 1;
+                        }
+                    }
                 }
             }
         #endif
-        if(ok<0)  {ok = 0; need_epilog=1;}
+        if(ok<0)  {
+            ok = 0; need_epilog=1;
+            #if STEP == 0
+            if(ninst) {
+                --ninst;
+                if(!dyn->insts[ninst].x64.barrier) {
+                    BARRIER(BARRIER_FLOAT);
+                }
+                dyn->insts[ninst].x64.need_after |= X_PEND;
+                ++ninst;
+            }
+            if(dyn->forward) {
+                // stopping too soon
+                dyn->size = dyn->forward_size;
+                ninst = dyn->forward_ninst+1;
+                addr = dyn->forward;
+                dyn->forward = 0;
+                dyn->forward_to = 0;
+                dyn->forward_size = 0;
+                dyn->forward_ninst = 0;
+            }
+            #endif
+        }
         ++ninst;
         #if STEP == 0
-        if(ok && (((box64_dynarec_bigblock<stopblock) && !isJumpTableDefault64((void*)addr)) 
+        if(ok && (((box64_dynarec_bigblock<stopblock) && !isJumpTableDefault64((void*)addr))
             || (addr>=box64_nodynarec_start && addr<box64_nodynarec_end)))
         #else
         if(ok && (ninst==dyn->size))
         #endif
         {
+            #if STEP == 0
+            if(dyn->forward) {
+                // stopping too soon
+                dyn->size = dyn->forward_size;
+                ninst = dyn->forward_ninst+1;
+                addr = dyn->forward;
+                dyn->forward = 0;
+                dyn->forward_to = 0;
+                dyn->forward_size = 0;
+                dyn->forward_ninst = 0;
+            }
+            #endif
             int j32;
             MAYUSE(j32);
             MESSAGE(LOG_DEBUG, "Stopping block %p (%d / %d)\n",(void*)init_addr, ninst, dyn->size);
@@ -272,14 +295,16 @@ uintptr_t native_pass(dynarec_native_t* dyn, uintptr_t addr)
             dyn->insts[ninst].x64.need_after |= X_PEND;
             #endif
             ++ninst;
+            NOTEST(x3);
             fpu_purgecache(dyn, ninst, 0, x1, x2, x3);
             jump_to_next(dyn, addr, 0, ninst);
             ok=0; need_epilog=0;
         }
     }
     if(need_epilog) {
+        NOTEST(x3);
         fpu_purgecache(dyn, ninst, 0, x1, x2, x3);
-        jump_to_epilog(dyn, ip, 0, ninst);  // no linker here, it's an unknow instruction
+        jump_to_epilog(dyn, ip, 0, ninst);  // no linker here, it's an unknown instruction
     }
     FINI;
     MESSAGE(LOG_DUMP, "---- END OF BLOCK ---- (%d)\n", dyn->size);

src/dynarec/dynarec_next.h

@@ -4,17 +4,24 @@
 #ifdef ARM64
 void arm64_next(void) EXPORTDYN;
 void arm64_prolog(x64emu_t* emu, void* addr) EXPORTDYN;
-void arm64_epilog() EXPORTDYN;
+void arm64_epilog(void) EXPORTDYN;
 #define native_next         arm64_next
 #define native_prolog       arm64_prolog
 #define native_epilog       arm64_epilog
 #elif defined(LA464)
 void la464_next(void) EXPORTDYN;
 void la464_prolog(x64emu_t* emu, void* addr) EXPORTDYN;
-void la464_epilog() EXPORTDYN;
+void la464_epilog(void) EXPORTDYN;
 #define native_next         la464_next
 #define native_prolog       la464_prolog
 #define native_epilog       la464_epilog
+#elif defined(RV64)
+void rv64_next(void) EXPORTDYN;
+void rv64_prolog(x64emu_t* emu, void* addr) EXPORTDYN;
+void rv64_epilog(void) EXPORTDYN;
+#define native_next         rv64_next
+#define native_prolog       rv64_prolog
+#define native_epilog       rv64_epilog
 #else
 #error Unsupported architecture
 #endif

src/dynarec/dynarec_private.h

@@ -33,6 +33,8 @@ typedef struct instruction_x64_s {
     uint8_t     jmp_cond;   // 1 of conditionnal jump
     uint8_t     has_next;   // does this opcode can continue to the next?
     uint8_t     barrier;    // next instruction is a jump point, so no optim allowed
+    uint8_t     barrier_next;   // next instruction needs a barrier
+    uint8_t     has_callret;    // this instruction have an optimised call setup
     uint8_t     state_flags;// One of SF_XXX state
     uint8_t     use_flags;  // 0 or combination of X_?F
     uint8_t     set_flags;  // 0 or combination of X_?F

src/dynarec/native_lock.h

@@ -14,8 +14,10 @@
 #define native_lock_write_dd(A, B)          arm64_lock_write_dd(A, B)
 #define native_lock_read_dq(A, B, C)        arm64_lock_read_dq(A, B, C)
 #define native_lock_write_dq(A, B, C)       arm64_lock_write_dq(A, B, C)
-#define native_lock_xchg(A, B)              arm64_lock_xchg(A, B)
+#define native_lock_xchg_dd(A, B)           arm64_lock_xchg_dd(A, B)
 #define native_lock_xchg_d(A, B)            arm64_lock_xchg_d(A, B)
+#define native_lock_xchg_h(A, B)            arm64_lock_xchg_h(A, B)
+#define native_lock_xchg_b(A, B)            arm64_lock_xchg_b(A, B)
 #define native_lock_storeifref(A, B, C)     arm64_lock_storeifref(A, B, C)
 #define native_lock_storeifref_d(A, B, C)   arm64_lock_storeifref_d(A, B, C)
 #define native_lock_storeifref2_d(A, B, C)  arm64_lock_storeifref2_d(A, B, C)
@@ -26,6 +28,54 @@
 #define native_lock_incif0(A)               arm64_lock_incif0(A)
 #define native_lock_decifnot0(A)            arm64_lock_decifnot0(A)
 #define native_lock_store(A, B)             arm64_lock_store(A, B)
+#define native_lock_store_dd(A, B)          arm64_lock_store_dd(A, B)
+#define native_lock_get_b(A)                arm64_lock_get_b(A)
+#define native_lock_get_d(A)                arm64_lock_get_d(A)
+#define native_lock_get_dd(A)               arm64_lock_get_dd(A)
+
+#elif defined(RV64)
+#include "rv64/rv64_lock.h"
+
+#define USE_CAS
+// RV64 is quite strict (or at least strongly recommand) on what you can do between an LD.A and an SD.A
+// That basicaly forbid to call a function, so there cannot be READ / WRITE separated
+// And so need to use a Compare and Swap mecanism instead
+
+// no byte or 2-bytes atomic access on RISC-V
+#define native_lock_xchg_dd(A, B)           rv64_lock_xchg_dd(A, B)
+#define native_lock_xchg_d(A, B)            rv64_lock_xchg_d(A, B)
+#define native_lock_storeifref(A, B, C)     rv64_lock_storeifref(A, B, C)
+#define native_lock_storeifref_d(A, B, C)   rv64_lock_storeifref_d(A, B, C)
+#define native_lock_storeifref2_d(A, B, C)  rv64_lock_storeifref2_d(A, B, C)
+#define native_lock_storeifnull(A, B)       rv64_lock_storeifnull(A, B)
+#define native_lock_storeifnull_d(A, B)     rv64_lock_storeifnull_d(A, B)
+#define native_lock_decifnot0b(A)           rv64_lock_decifnot0b(A)
+#define native_lock_storeb(A, B)            rv64_lock_storeb(A, B)
+#define native_lock_incif0(A)               rv64_lock_incif0(A)
+#define native_lock_decifnot0(A)            rv64_lock_decifnot0(A)
+#define native_lock_store(A, B)             rv64_lock_store(A, B)
+#define native_lock_store_dd(A, B)          rv64_lock_store_dd(A, B)
+#define native_lock_cas_d(A, B, C)          rv64_lock_cas_d(A, B, C)
+#define native_lock_cas_dd(A, B, C)         rv64_lock_cas_dd(A, B, C)
+
+#define native_lock_xchg_b(A, B)            rv64_lock_xchg_b(A, B)
+#define native_lock_cas_b(A, B, C)          rv64_lock_cas_b(A, B, C)
+#define native_lock_cas_h(A, B, C)          rv64_lock_cas_h(A, B, C)
+
+#define native_lock_read_b(A)               tmpcas=*(uint8_t*)(A)
+#define native_lock_write_b(A, B)           rv64_lock_cas_b(A, tmpcas, B)
+#define native_lock_read_h(A)               tmpcas=*(uint16_t*)(A)
+#define native_lock_write_h(A, B)           rv64_lock_cas_h(A, tmpcas, B)
+#define native_lock_read_d(A)               tmpcas=*(uint32_t*)(A)
+#define native_lock_write_d(A, B)           rv64_lock_cas_d(A, tmpcas, B)
+#define native_lock_read_dd(A)              tmpcas=*(uint64_t*)(A)
+#define native_lock_write_dd(A, B)          rv64_lock_cas_dd(A, tmpcas, B)
+// there is no atomic move on 16bytes, so faking it
+#define native_lock_read_dq(A, B, C)        *A=tmpcas=((uint64_t*)(C))[0]; *B=((uint64_t*)(C))[1];
+#define native_lock_write_dq(A, B, C)       rv64_lock_cas_dq(C, A, tmpcas, B);
+#define native_lock_get_b(A)                rv64_lock_get_b(A)
+#define native_lock_get_d(A)                rv64_lock_get_d(A)
+#define native_lock_get_dd(A)               rv64_lock_get_dd(A)
 
 #else
 #error Unsupported architecture

src/dynarec/rv64/dynarec_rv64_00.c

@@ -0,0 +1,41 @@
+#include <stdio.h>
+#include <stdlib.h>
+#include <stddef.h>
+#include <errno.h>
+#include <signal.h>
+#include <assert.h>
+
+#include "debug.h"
+#include "box64context.h"
+#include "dynarec.h"
+#include "emu/x64emu_private.h"
+#include "emu/x64run_private.h"
+#include "x64run.h"
+#include "x64emu.h"
+#include "box64stack.h"
+#include "callback.h"
+#include "bridge.h"
+#include "emu/x64run_private.h"
+#include "x64trace.h"
+#include "dynarec_native.h"
+#include "custommem.h"
+
+#include "rv64_printer.h"
+#include "dynarec_rv64_private.h"
+#include "dynarec_rv64_functions.h"
+#include "dynarec_rv64_helper.h"
+
+uintptr_t dynarec64_00(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int* ok, int* need_epilog)
+{
+    uint8_t opcode;
+
+    opcode = PK(0);
+    switch(opcode) {
+        case 0x00 ... 0x3f: addr = dynarec64_00_0(dyn, addr, ip, ninst, rex, rep, ok, need_epilog); break;
+        case 0x40 ... 0x7f: addr = dynarec64_00_1(dyn, addr, ip, ninst, rex, rep, ok, need_epilog); break;
+        case 0x80 ... 0xbf: addr = dynarec64_00_2(dyn, addr, ip, ninst, rex, rep, ok, need_epilog); break;
+        case 0xc0 ... 0xff: addr = dynarec64_00_3(dyn, addr, ip, ninst, rex, rep, ok, need_epilog); break;
+    }
+
+    return addr;
+}

src/dynarec/rv64/dynarec_rv64_00_0.c

@@ -0,0 +1,497 @@
+#include <stdio.h>
+#include <stdlib.h>
+#include <stddef.h>
+#include <errno.h>
+#include <signal.h>
+#include <assert.h>
+
+#include "debug.h"
+#include "box64context.h"
+#include "dynarec.h"
+#include "emu/x64emu_private.h"
+#include "emu/x64run_private.h"
+#include "x64run.h"
+#include "x64emu.h"
+#include "box64stack.h"
+#include "callback.h"
+#include "bridge.h"
+#include "emu/x64run_private.h"
+#include "x64trace.h"
+#include "dynarec_native.h"
+#include "custommem.h"
+
+#include "rv64_printer.h"
+#include "dynarec_rv64_private.h"
+#include "dynarec_rv64_functions.h"
+#include "dynarec_rv64_helper.h"
+
+uintptr_t dynarec64_00_0(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int* ok, int* need_epilog)
+{
+    uint8_t nextop, opcode;
+    uint8_t gd, ed;
+    int8_t i8;
+    int32_t i32, tmp;
+    int64_t i64, j64;
+    uint8_t u8;
+    uint8_t gb1, gb2, eb1, eb2;
+    uint32_t u32;
+    uint64_t u64;
+    uint8_t wback, wb1, wb2, wb;
+    int64_t fixedaddress;
+    int lock;
+    int cacheupd = 0;
+
+    opcode = F8;
+    MAYUSE(eb1);
+    MAYUSE(eb2);
+    MAYUSE(j64);
+    MAYUSE(wb);
+    MAYUSE(lock);
+    MAYUSE(cacheupd);
+
+    switch(opcode) {
+        case 0x00:
+            INST_NAME("ADD Eb, Gb");
+            SETFLAGS(X_ALL, SF_SET_PENDING);
+            nextop = F8;
+            GETEB(x1, 0);
+            GETGB(x2);
+            emit_add8(dyn, ninst, x1, x2, x4, x5);
+            EBBACK(x5, 0);
+            break;
+        case 0x01:
+            INST_NAME("ADD Ed, Gd");
+            SETFLAGS(X_ALL, SF_SET_PENDING);
+            nextop = F8;
+            GETGD;
+            GETED(0);
+            emit_add32(dyn, ninst, rex, ed, gd, x3, x4, x5);
+            WBACK;
+            break;
+        case 0x02:
+            INST_NAME("ADD Gb, Eb");
+            SETFLAGS(X_ALL, SF_SET_PENDING);
+            nextop = F8;
+            GETEB(x1, 0);
+            GETGB(x2);
+            emit_add8(dyn, ninst, x2, x1, x4, x5);
+            GBBACK(x5);
+            break;
+        case 0x03:
+            INST_NAME("ADD Gd, Ed");
+            SETFLAGS(X_ALL, SF_SET_PENDING);
+            nextop = F8;
+            GETGD;
+            GETED(0);
+            emit_add32(dyn, ninst, rex, gd, ed, x3, x4, x5);
+            break;
+        case 0x04:
+            INST_NAME("ADD AL, Ib");
+            SETFLAGS(X_ALL, SF_SET_PENDING);
+            u8 = F8;
+            ANDI(x1, xRAX, 0xff);
+            emit_add8c(dyn, ninst, x1, u8, x3, x4, x5);
+            ANDI(xRAX, xRAX, ~0xff);
+            OR(xRAX, xRAX, x1);
+            break;
+        case 0x05:
+            INST_NAME("ADD EAX, Id");
+            SETFLAGS(X_ALL, SF_SET_PENDING);
+            i64 = F32S;
+            emit_add32c(dyn, ninst, rex, xRAX, i64, x3, x4, x5, x6);
+            break;
+        case 0x08:
+            INST_NAME("OR Eb, Gb");
+            SETFLAGS(X_ALL, SF_SET_PENDING);
+            nextop = F8;
+            GETEB(x1, 0);
+            GETGB(x2);
+            emit_or8(dyn, ninst, x1, x2, x4, x5);
+            EBBACK(x5, 0);
+            break;
+        case 0x09:
+            INST_NAME("OR Ed, Gd");
+            SETFLAGS(X_ALL, SF_SET_PENDING);
+            nextop = F8;
+            GETGD;
+            GETED(0);
+            emit_or32(dyn, ninst, rex, ed, gd, x3, x4);
+            WBACK;
+            break;
+
+        case 0x0A:
+            INST_NAME("OR Gb, Eb");
+            SETFLAGS(X_ALL, SF_SET_PENDING);
+            nextop = F8;
+            GETEB(x1, 0);
+            GETGB(x2);
+            emit_or8(dyn, ninst, x2, x1, x4, x5);
+            GBBACK(x5);
+            break;
+        case 0x0B:
+            INST_NAME("OR Gd, Ed");
+            SETFLAGS(X_ALL, SF_SET_PENDING);
+            nextop = F8;
+            GETGD;
+            GETED(0);
+            emit_or32(dyn, ninst, rex, gd, ed, x3, x4);
+            break;
+        case 0x0C:
+            INST_NAME("OR AL, Ib");
+            SETFLAGS(X_ALL, SF_SET_PENDING);
+            u8 = F8;
+            ANDI(x1, xRAX, 0xff);
+            emit_or8c(dyn, ninst, x1, u8, x3, x4, x5);
+            ANDI(xRAX, xRAX, ~0xff);
+            OR(xRAX, xRAX, x1);
+            break;
+        case 0x0D:
+            INST_NAME("OR EAX, Id");
+            SETFLAGS(X_ALL, SF_SET_PENDING);
+            i64 = F32S;
+            emit_or32c(dyn, ninst, rex, xRAX, i64, x3, x4);
+            break;
+
+        case 0x0F:
+            switch(rep) {
+            case 0:
+                addr = dynarec64_0F(dyn, addr, ip, ninst, rex, ok, need_epilog);
+                break;
+            case 1:
+                addr = dynarec64_F20F(dyn, addr, ip, ninst, rex, ok, need_epilog);
+                break;
+            case 2:
+                addr = dynarec64_F30F(dyn, addr, ip, ninst, rex, ok, need_epilog);
+                break;
+            default:
+                DEFAULT;
+            }
+            break;
+        case 0x10:
+            INST_NAME("ADC Eb, Gb");
+            READFLAGS(X_CF);
+            SETFLAGS(X_ALL, SF_SET_PENDING);
+            nextop = F8;
+            GETEB(x1, 0);
+            GETGB(x2);
+            emit_adc8(dyn, ninst, x1, x2, x4, x5, x3);
+            EBBACK(x5, 0);
+            break;
+        case 0x11:
+            INST_NAME("ADC Ed, Gd");
+            READFLAGS(X_CF);
+            SETFLAGS(X_ALL, SF_SET_PENDING);
+            nextop = F8;
+            GETGD;
+            GETED(0);
+            emit_adc32(dyn, ninst, rex, ed, gd, x3, x4, x5, x6);
+            WBACK;
+            break;
+        case 0x12:
+            INST_NAME("ADC Gb, Eb");
+            READFLAGS(X_CF);
+            SETFLAGS(X_ALL, SF_SET_PENDING);
+            nextop = F8;
+            GETEB(x2, 0);
+            GETGB(x1);
+            emit_adc8(dyn, ninst, x1, x2, x4, x3, x5);
+            GBBACK(x5);
+            break;
+        case 0x13:
+            INST_NAME("ADC Gd, Ed");
+            READFLAGS(X_CF);
+            SETFLAGS(X_ALL, SF_SET_PENDING);
+            nextop = F8;
+            GETGD;
+            GETED(0);
+            emit_adc32(dyn, ninst, rex, gd, ed, x3, x4, x5, x6);
+            break;
+        case 0x14:
+            INST_NAME("ADC AL, Ib");
+            READFLAGS(X_CF);
+            SETFLAGS(X_ALL, SF_SET_PENDING);
+            u8 = F8;
+            ANDI(x1, xRAX, 0xff);
+            emit_adc8c(dyn, ninst, x1, u8, x3, x4, x5, x6);
+            ANDI(xRAX, xRAX, ~0xff);
+            OR(xRAX, xRAX, x1);
+            break;
+        case 0x15:
+            INST_NAME("ADC EAX, Id");
+            READFLAGS(X_CF);
+            SETFLAGS(X_ALL, SF_SET_PENDING);
+            i64 = F32S;
+            MOV64xw(x1, i64);
+            emit_adc32(dyn, ninst, rex, xRAX, x1, x3, x4, x5, x6);
+            break;
+        case 0x18:
+            INST_NAME("SBB Eb, Gb");
+            READFLAGS(X_CF);
+            SETFLAGS(X_ALL, SF_SET_PENDING);
+            nextop = F8;
+            GETEB(x1, 0);
+            GETGB(x2);
+            emit_sbb8(dyn, ninst, x1, x2, x4, x5, x6);
+            EBBACK(x5, 0);
+            break;
+        case 0x19:
+            INST_NAME("SBB Ed, Gd");
+            READFLAGS(X_CF);
+            SETFLAGS(X_ALL, SF_SET_PENDING);
+            nextop = F8;
+            GETGD;
+            GETED(0);
+            emit_sbb32(dyn, ninst, rex, ed, gd, x3, x4, x5);
+            WBACK;
+            break;
+        case 0x1A:
+            INST_NAME("SBB Gb, Eb");
+            READFLAGS(X_CF);
+            SETFLAGS(X_ALL, SF_SET_PENDING);
+            nextop = F8;
+            GETEB(x2, 0);
+            GETGB(x1);
+            emit_sbb8(dyn, ninst, x1, x2, x3, x4, x5);
+            GBBACK(x5);
+            break;
+        case 0x1B:
+            INST_NAME("SBB Gd, Ed");
+            READFLAGS(X_CF);
+            SETFLAGS(X_ALL, SF_SET_PENDING);
+            nextop = F8;
+            GETGD;
+            GETED(0);
+            emit_sbb32(dyn, ninst, rex, gd, ed, x3, x4, x5);
+            break;
+        case 0x1C:
+            INST_NAME("SBB AL, Ib");
+            READFLAGS(X_CF);
+            SETFLAGS(X_ALL, SF_SET_PENDING);
+            u8 = F8;
+            ANDI(x1, xRAX, 0xff);
+            emit_sbb8c(dyn, ninst, x1, u8, x3, x4, x5, x6);
+            ANDI(xRAX, xRAX, ~0xff);
+            OR(xRAX, xRAX, x1);
+            break;
+        case 0x1D:
+            INST_NAME("SBB EAX, Id");
+            READFLAGS(X_CF);
+            SETFLAGS(X_ALL, SF_SET_PENDING);
+            i64 = F32S;
+            MOV64xw(x2, i64);
+            emit_sbb32(dyn, ninst, rex, xRAX, x2, x3, x4, x5);
+            break;
+
+        case 0x20:
+            INST_NAME("AND Eb, Gb");
+            SETFLAGS(X_ALL, SF_SET_PENDING);
+            nextop = F8;
+            GETEB(x1, 0);
+            GETGB(x2);
+            emit_and8(dyn, ninst, x1, x2, x4, x5);
+            EBBACK(x4, 0);
+            break;
+        case 0x21:
+            INST_NAME("AND Ed, Gd");
+            SETFLAGS(X_ALL, SF_SET_PENDING);
+            nextop = F8;
+            GETGD;
+            GETED(0);
+            emit_and32(dyn, ninst, rex, ed, gd, x3, x4);
+            WBACK;
+            break;
+        case 0x22:
+            INST_NAME("AND Gb, Eb");
+            SETFLAGS(X_ALL, SF_SET_PENDING);
+            nextop = F8;
+            GETEB(x1, 0);
+            GETGB(x2);
+            emit_and8(dyn, ninst, x2, x1, x4, x5);
+            GBBACK(x5);
+            break;
+        case 0x23:
+            INST_NAME("AND Gd, Ed");
+            SETFLAGS(X_ALL, SF_SET_PENDING);
+            nextop = F8;
+            GETGD;
+            GETED(0);
+            emit_and32(dyn, ninst, rex, gd, ed, x3, x4);
+            break;
+        case 0x24:
+            INST_NAME("AND AL, Ib");
+            SETFLAGS(X_ALL, SF_SET_PENDING);
+            u8 = F8;
+            ANDI(x1, xRAX, 0xff);
+            emit_and8c(dyn, ninst, x1, u8, x3, x4);
+            ANDI(xRAX, xRAX, ~0xff);
+            OR(xRAX, xRAX, x1);
+            break;
+        case 0x25:
+            INST_NAME("AND EAX, Id");
+            SETFLAGS(X_ALL, SF_SET_PENDING);
+            i64 = F32S;
+            emit_and32c(dyn, ninst, rex, xRAX, i64, x3, x4);
+            break;
+        case 0x28:
+            INST_NAME("SUB Eb, Gb");
+            SETFLAGS(X_ALL, SF_SET_PENDING);
+            nextop = F8;
+            GETEB(x1, 0);
+            GETGB(x2);
+            emit_sub8(dyn, ninst, x1, x2, x4, x5, x6);
+            EBBACK(x5, 0);
+            break;
+        case 0x29:
+            INST_NAME("SUB Ed, Gd");
+            SETFLAGS(X_ALL, SF_SET_PENDING);
+            nextop = F8;
+            GETGD;
+            GETED(0);
+            emit_sub32(dyn, ninst, rex, ed, gd, x3, x4, x5);
+            WBACK;
+            break;
+        case 0x2A:
+            INST_NAME("SUB Gb, Eb");
+            SETFLAGS(X_ALL, SF_SET_PENDING);
+            nextop = F8;
+            GETEB(x1, 0);
+            GETGB(x2);
+            emit_sub8(dyn, ninst, x2, x1, x4, x5, x6);
+            GBBACK(x5);
+            break;
+        case 0x2B:
+            INST_NAME("SUB Gd, Ed");
+            SETFLAGS(X_ALL, SF_SET_PENDING);
+            nextop = F8;
+            GETGD;
+            GETED(0);
+            emit_sub32(dyn, ninst, rex, gd, ed, x3, x4, x5);
+            break;
+        case 0x2C:
+            INST_NAME("SUB AL, Ib");
+            SETFLAGS(X_ALL, SF_SET_PENDING);
+            u8 = F8;
+            ANDI(x1, xRAX, 0xff);
+            emit_sub8c(dyn, ninst, x1, u8, x2, x3, x4, x5);
+            ANDI(xRAX, xRAX, ~0xff);
+            OR(xRAX, xRAX, x1);
+            break;
+        case 0x2D:
+            INST_NAME("SUB EAX, Id");
+            SETFLAGS(X_ALL, SF_SET_PENDING);
+            i64 = F32S;
+            emit_sub32c(dyn, ninst, rex, xRAX, i64, x2, x3, x4, x5);
+            break;
+        case 0x30:
+            INST_NAME("XOR Eb, Gb");
+            SETFLAGS(X_ALL, SF_SET_PENDING);
+            nextop = F8;
+            GETEB(x1, 0);
+            GETGB(x2);
+            emit_xor8(dyn, ninst, x1, x2, x4, x5);
+            EBBACK(x5, 0);
+            break;
+        case 0x31:
+            INST_NAME("XOR Ed, Gd");
+            SETFLAGS(X_ALL, SF_SET_PENDING);
+            nextop = F8;
+            GETGD;
+            GETED(0);
+            emit_xor32(dyn, ninst, rex, ed, gd, x3, x4);
+            if(ed!=gd) {
+                WBACK;
+            }
+            break;
+        case 0x32:
+            INST_NAME("XOR Gb, Eb");
+            SETFLAGS(X_ALL, SF_SET_PENDING);
+            nextop = F8;
+            GETEB(x1, 0);
+            GETGB(x2);
+            emit_xor8(dyn, ninst, x2, x1, x4, x5);
+            GBBACK(x5);
+            break;
+        case 0x33:
+            INST_NAME("XOR Gd, Ed");
+            SETFLAGS(X_ALL, SF_SET_PENDING);
+            nextop = F8;
+            GETGD;
+            GETED(0);
+            emit_xor32(dyn, ninst, rex, gd, ed, x3, x4);
+            break;
+        case 0x34:
+            INST_NAME("XOR AL, Ib");
+            SETFLAGS(X_ALL, SF_SET_PENDING);
+            u8 = F8;
+            ANDI(x1, xRAX, 0xff);
+            emit_xor8c(dyn, ninst, x1, u8, x3, x4);
+            ANDI(xRAX, xRAX, ~0xff);
+            OR(xRAX, xRAX, x1);
+            break;
+        case 0x35:
+            INST_NAME("XOR EAX, Id");
+            SETFLAGS(X_ALL, SF_SET_PENDING);
+            i64 = F32S;
+            emit_xor32c(dyn, ninst, rex, xRAX, i64, x3, x4);
+            break;
+        case 0x38:
+            INST_NAME("CMP Eb, Gb");
+            SETFLAGS(X_ALL, SF_SET_PENDING);
+            nextop = F8;
+            GETEB(x1, 0);
+            GETGB(x2);
+            emit_cmp8(dyn, ninst, x1, x2, x3, x4, x5, x6);
+            break;
+        case 0x39:
+            INST_NAME("CMP Ed, Gd");
+            SETFLAGS(X_ALL, SF_SET_PENDING);
+            nextop = F8;
+            GETGD;
+            GETED(0);
+            emit_cmp32(dyn, ninst, rex, ed, gd, x3, x4, x5, x6);
+            break;
+        case 0x3A:
+            INST_NAME("CMP Gb, Eb");
+            SETFLAGS(X_ALL, SF_SET_PENDING);
+            nextop = F8;
+            GETEB(x1, 0);
+            GETGB(x2);
+            emit_cmp8(dyn, ninst, x2, x1, x3, x4, x5, x6);
+            break;
+        case 0x3B:
+            INST_NAME("CMP Gd, Ed");
+            SETFLAGS(X_ALL, SF_SET_PENDING);
+            nextop = F8;
+            GETGD;
+            GETED(0);
+            emit_cmp32(dyn, ninst, rex, gd, ed, x3, x4, x5, x6);
+            break;
+        case 0x3C:
+            INST_NAME("CMP AL, Ib");
+            SETFLAGS(X_ALL, SF_SET_PENDING);
+            u8 = F8;
+            ANDI(x1, xRAX, 0xff);
+            if(u8) {
+                MOV32w(x2, u8);
+                emit_cmp8(dyn, ninst, x1, x2, x3, x4, x5, x6);
+            } else {
+                emit_cmp8_0(dyn, ninst, x1, x3, x4);
+            }
+            break;
+        case 0x3D:
+            INST_NAME("CMP EAX, Id");
+            SETFLAGS(X_ALL, SF_SET_PENDING);
+            i64 = F32S;
+            if(i64) {
+                MOV64xw(x2, i64);
+                emit_cmp32(dyn, ninst, rex, xRAX, x2, x3, x4, x5, x6);
+            } else
+                emit_cmp32_0(dyn, ninst, rex, xRAX, x3, x4);
+            break;
+
+        default:
+            DEFAULT;
+    }
+
+     return addr;
+}

src/dynarec/rv64/dynarec_rv64_00_1.c

@@ -0,0 +1,325 @@
+#include <stdio.h>
+#include <stdlib.h>
+#include <stddef.h>
+#include <errno.h>
+#include <signal.h>
+#include <assert.h>
+
+#include "debug.h"
+#include "box64context.h"
+#include "dynarec.h"
+#include "emu/x64emu_private.h"
+#include "emu/x64run_private.h"
+#include "x64run.h"
+#include "x64emu.h"
+#include "box64stack.h"
+#include "callback.h"
+#include "bridge.h"
+#include "emu/x64run_private.h"
+#include "x64trace.h"
+#include "dynarec_native.h"
+#include "custommem.h"
+
+#include "rv64_printer.h"
+#include "dynarec_rv64_private.h"
+#include "dynarec_rv64_functions.h"
+#include "dynarec_rv64_helper.h"
+
+int isSimpleWrapper(wrapper_t fun);
+
+uintptr_t dynarec64_00_1(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int* ok, int* need_epilog)
+{
+    uint8_t nextop, opcode;
+    uint8_t gd, ed;
+    int8_t i8;
+    int32_t i32, tmp;
+    int64_t i64, j64;
+    uint8_t u8;
+    uint8_t gb1, gb2, eb1, eb2;
+    uint32_t u32;
+    uint64_t u64;
+    uint8_t wback, wb1, wb2, wb;
+    int64_t fixedaddress;
+    int lock;
+    int cacheupd = 0;
+
+    opcode = F8;
+    MAYUSE(eb1);
+    MAYUSE(eb2);
+    MAYUSE(j64);
+    MAYUSE(wb);
+    MAYUSE(lock);
+    MAYUSE(cacheupd);
+
+    switch(opcode) {
+        case 0x40:
+        case 0x41:
+        case 0x42:
+        case 0x43:
+        case 0x44:
+        case 0x45:
+        case 0x46:
+        case 0x47:
+            INST_NAME("INC Reg (32bits)");
+            SETFLAGS(X_ALL&~X_CF, SF_SUBSET_PENDING);
+            gd = xRAX + (opcode&7);
+            emit_inc32(dyn, ninst, rex, gd, x1, x2, x3, x4);
+            break;
+        case 0x48:
+        case 0x49:
+        case 0x4A:
+        case 0x4B:
+        case 0x4C:
+        case 0x4D:
+        case 0x4E:
+        case 0x4F:
+            INST_NAME("DEC Reg (32bits)");
+            SETFLAGS(X_ALL&~X_CF, SF_SUBSET_PENDING);
+            gd = xRAX + (opcode&7);
+            emit_dec32(dyn, ninst, rex, gd, x1, x2, x3, x4);
+            break;
+        case 0x50:
+        case 0x51:
+        case 0x52:
+        case 0x53:
+        case 0x54:
+        case 0x55:
+        case 0x56:
+        case 0x57:
+            INST_NAME("PUSH reg");
+            gd = xRAX+(opcode&0x07)+(rex.b<<3);
+            PUSH1z(gd);
+            break;
+        case 0x58:
+        case 0x59:
+        case 0x5A:
+        case 0x5B:
+        case 0x5C:
+        case 0x5D:
+        case 0x5E:
+        case 0x5F:
+            INST_NAME("POP reg");
+            gd = xRAX+(opcode&0x07)+(rex.b<<3);
+            POP1z(gd);
+            break;
+
+        case 0x60:
+            if(rex.is32bits) {
+                INST_NAME("PUSHAD");
+                AND(x1, xRSP, xMASK);
+                PUSH1_32(xRAX);
+                PUSH1_32(xRCX);
+                PUSH1_32(xRDX);
+                PUSH1_32(xRBX);
+                PUSH1_32(x1);
+                PUSH1_32(xRBP);
+                PUSH1_32(xRSI);
+                PUSH1_32(xRDI);
+            } else {
+                DEFAULT;
+            }
+            break;
+        case 0x61:
+            if(rex.is32bits) {
+                INST_NAME("POPAD");
+                POP1_32(xRDI);
+                POP1_32(xRSI);
+                POP1_32(xRBP);
+                POP1_32(x1);
+                POP1_32(xRBX);
+                POP1_32(xRDX);
+                POP1_32(xRCX);
+                POP1_32(xRAX);
+            } else {
+                DEFAULT;
+            }
+            break;
+
+        case 0x63:
+            if(rex.is32bits) {
+                // this is ARPL opcode
+                DEFAULT;
+            } else {
+                INST_NAME("MOVSXD Gd, Ed");
+                nextop = F8;
+                GETGD;
+                if(rex.w) {
+                    if(MODREG) {   // reg <= reg
+                        ADDIW(gd, xRAX+(nextop&7)+(rex.b<<3), 0);
+                    } else {                    // mem <= reg
+                        SMREAD();
+                        addr = geted(dyn, addr, ninst, nextop, &ed, x2, x1, &fixedaddress, rex, NULL, 1, 0);
+                        LW(gd, ed, fixedaddress);
+                    }
+                } else {
+                    if(MODREG) {   // reg <= reg
+                        AND(gd, xRAX+(nextop&7)+(rex.b<<3), xMASK);
+                    } else {                    // mem <= reg
+                        SMREAD();
+                        addr = geted(dyn, addr, ninst, nextop, &ed, x2, x1, &fixedaddress, rex, NULL, 1, 0);
+                        LWU(gd, ed, fixedaddress);
+                    }
+                }
+            }
+            break;
+        case 0x64:
+            addr = dynarec64_64(dyn, addr, ip, ninst, rex, rep, _FS, ok, need_epilog);
+            break;
+        case 0x65:
+            addr = dynarec64_64(dyn, addr, ip, ninst, rex, rep, _GS, ok, need_epilog);
+            break;
+        case 0x66:
+            addr = dynarec64_66(dyn, addr, ip, ninst, rex, rep, ok, need_epilog);
+            break;
+        case 0x67:
+            if(rex.is32bits)
+                addr = dynarec64_67_32(dyn, addr, ip, ninst, rex, rep, ok, need_epilog);
+            else
+                addr = dynarec64_67(dyn, addr, ip, ninst, rex, rep, ok, need_epilog);
+            break;
+        case 0x68:
+            INST_NAME("PUSH Id");
+            i64 = F32S;
+            if(PK(0)==0xC3) {
+                MESSAGE(LOG_DUMP, "PUSH then RET, using indirect\n");
+                TABLE64(x3, addr-4);
+                LW(x1, x3, 0);
+                PUSH1z(x1);
+            } else {
+                MOV64z(x3, i64);
+                PUSH1z(x3);
+            }
+            break;
+        case 0x69:
+            INST_NAME("IMUL Gd, Ed, Id");
+            SETFLAGS(X_ALL, SF_PENDING);
+            nextop = F8;
+            GETGD;
+            GETED(4);
+            i64 = F32S;
+            MOV64xw(x4, i64);
+            if(rex.w) {
+                // 64bits imul
+                UFLAG_IF {
+                    MULH(x3, ed, x4);
+                    MUL(gd, ed, x4);
+                    UFLAG_OP1(x3);
+                    UFLAG_RES(gd);
+                    UFLAG_DF(x3, d_imul64);
+                } else {
+                    MULxw(gd, ed, x4);
+                }
+            } else {
+                // 32bits imul
+                UFLAG_IF {
+                    MUL(gd, ed, x4);
+                    UFLAG_RES(gd);
+                    SRLI(x3, gd, 32);
+                    UFLAG_OP1(x3);
+                    UFLAG_DF(x3, d_imul32);
+                } else {
+                    MULxw(gd, ed, x4);
+                }
+                ZEROUP(gd);
+            }
+            break;
+        case 0x6A:
+            INST_NAME("PUSH Ib");
+            i64 = F8S;
+            MOV64z(x3, i64);
+            PUSH1z(x3);
+            break;
+        case 0x6B:
+            INST_NAME("IMUL Gd, Ed, Ib");
+            SETFLAGS(X_ALL, SF_PENDING);
+            nextop = F8;
+            GETGD;
+            GETED(1);
+            i64 = F8S;
+            MOV64xw(x4, i64);
+            if(rex.w) {
+                // 64bits imul
+                UFLAG_IF {
+                    MULH(x3, ed, x4);
+                    MUL(gd, ed, x4);
+                    UFLAG_OP1(x3);
+                    UFLAG_RES(gd);
+                    UFLAG_DF(x3, d_imul64);
+                } else {
+                    MUL(gd, ed, x4);
+                }
+            } else {
+                // 32bits imul
+                UFLAG_IF {
+                    MUL(gd, ed, x4);
+                    UFLAG_RES(gd);
+                    SRLI(x3, gd, 32);
+                    UFLAG_OP1(x3);
+                    UFLAG_DF(x3, d_imul32);
+                } else {
+                    MULW(gd, ed, x4);
+                }
+                ZEROUP(gd);
+            }
+            break;
+
+        case 0x6C:
+        case 0x6D:
+            INST_NAME(opcode == 0x6C ? "INSB" : "INSD");
+            SETFLAGS(X_ALL, SF_SET); // Hack to set flags in "don't care" state
+            GETIP(ip);
+            STORE_XEMU_CALL(x3);
+            CALL(native_priv, -1);
+            LOAD_XEMU_CALL();
+            jump_to_epilog(dyn, 0, xRIP, ninst);
+            *need_epilog = 0;
+            *ok = 0;
+            break;
+        case 0x6E:
+        case 0x6F:
+            INST_NAME(opcode == 0x6C ? "OUTSB" : "OUTSD");
+            SETFLAGS(X_ALL, SF_SET); // Hack to set flags in "don't care" state
+            GETIP(ip);
+            STORE_XEMU_CALL(x3);
+            CALL(native_priv, -1);
+            LOAD_XEMU_CALL();
+            jump_to_epilog(dyn, 0, xRIP, ninst);
+            *need_epilog = 0;
+            *ok = 0;
+            break;
+
+        #define GO(GETFLAGS, NO, YES, F)                                \
+            READFLAGS(F);                                               \
+            i8 = F8S;                                                   \
+            BARRIER(BARRIER_MAYBE);                                     \
+            JUMP(addr+i8, 1);                                           \
+            GETFLAGS;                                                   \
+            if(dyn->insts[ninst].x64.jmp_insts==-1 ||                   \
+                CHECK_CACHE()) {                                        \
+                /* out of the block */                                  \
+                i32 = dyn->insts[ninst].epilog-(dyn->native_size);      \
+                B##NO##_safe(x1, i32);                                  \
+                if(dyn->insts[ninst].x64.jmp_insts==-1) {               \
+                    if(!(dyn->insts[ninst].x64.barrier&BARRIER_FLOAT))  \
+                        fpu_purgecache(dyn, ninst, 1, x1, x2, x3);      \
+                    jump_to_next(dyn, addr+i8, 0, ninst);               \
+                } else {                                                \
+                    CacheTransform(dyn, ninst, cacheupd, x1, x2, x3);   \
+                    i32 = dyn->insts[dyn->insts[ninst].x64.jmp_insts].address-(dyn->native_size);\
+                    B(i32);                                             \
+                }                                                       \
+            } else {                                                    \
+                /* inside the block */                                  \
+                i32 = dyn->insts[dyn->insts[ninst].x64.jmp_insts].address-(dyn->native_size);    \
+                B##YES##_safe(x1, i32);                                 \
+            }
+
+        GOCOND(0x70, "J", "ib");
+
+        #undef GO
+        default:
+            DEFAULT;
+    }
+
+     return addr;
+}

src/dynarec/rv64/dynarec_rv64_00_2.c

@@ -0,0 +1,917 @@
+#include <stdio.h>
+#include <stdlib.h>
+#include <stddef.h>
+#include <errno.h>
+#include <signal.h>
+#include <assert.h>
+
+#include "debug.h"
+#include "box64context.h"
+#include "dynarec.h"
+#include "emu/x64emu_private.h"
+#include "emu/x64run_private.h"
+#include "x64run.h"
+#include "x64emu.h"
+#include "box64stack.h"
+#include "callback.h"
+#include "bridge.h"
+#include "emu/x64run_private.h"
+#include "x64trace.h"
+#include "dynarec_native.h"
+#include "custommem.h"
+
+#include "rv64_printer.h"
+#include "dynarec_rv64_private.h"
+#include "dynarec_rv64_functions.h"
+#include "dynarec_rv64_helper.h"
+
+uintptr_t dynarec64_00_2(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int* ok, int* need_epilog)
+{
+    uint8_t nextop, opcode;
+    uint8_t gd, ed;
+    int8_t i8;
+    int32_t i32, tmp;
+    int64_t i64, j64;
+    uint8_t u8;
+    uint8_t gb1, gb2, eb1, eb2;
+    uint32_t u32;
+    uint64_t u64;
+    uint8_t wback, wb1, wb2, wb;
+    int64_t fixedaddress;
+    int lock;
+    int cacheupd = 0;
+
+    opcode = F8;
+    MAYUSE(eb1);
+    MAYUSE(eb2);
+    MAYUSE(j64);
+    MAYUSE(wb);
+    MAYUSE(lock);
+    MAYUSE(cacheupd);
+
+    switch(opcode) {
+        case 0x80:
+            nextop = F8;
+            switch((nextop>>3)&7) {
+                case 0: // ADD
+                    INST_NAME("ADD Eb, Ib");
+                    SETFLAGS(X_ALL, SF_SET_PENDING);
+                    GETEB(x1, 1);
+                    u8 = F8;
+                    emit_add8c(dyn, ninst, x1, u8, x2, x4, x5);
+                    EBBACK(x5, 0);
+                    break;
+                case 1: // OR
+                    INST_NAME("OR Eb, Ib");
+                    SETFLAGS(X_ALL, SF_SET_PENDING);
+                    GETEB(x1, 1);
+                    u8 = F8;
+                    emit_or8c(dyn, ninst, x1, u8, x2, x4, x5);
+                    EBBACK(x5, 0);
+                    break;
+                case 2: // ADC
+                    INST_NAME("ADC Eb, Ib");
+                    READFLAGS(X_CF);
+                    SETFLAGS(X_ALL, SF_SET_PENDING);
+                    GETEB(x1, 1);
+                    u8 = F8;
+                    emit_adc8c(dyn, ninst, x1, u8, x2, x4, x5, x6);
+                    EBBACK(x5, 0);
+                    break;
+                case 3: // SBB
+                    INST_NAME("SBB Eb, Ib");
+                    READFLAGS(X_CF);
+                    SETFLAGS(X_ALL, SF_SET_PENDING);
+                    GETEB(x1, 1);
+                    u8 = F8;
+                    emit_sbb8c(dyn, ninst, x1, u8, x2, x4, x5, x6);
+                    EBBACK(x5, 0);
+                    break;
+                case 4: // AND
+                    INST_NAME("AND Eb, Ib");
+                    SETFLAGS(X_ALL, SF_SET_PENDING);
+                    GETEB(x1, 1);
+                    u8 = F8;
+                    emit_and8c(dyn, ninst, x1, u8, x2, x4);
+                    EBBACK(x5, 0);
+                    break;
+                case 5: // SUB
+                    INST_NAME("SUB Eb, Ib");
+                    SETFLAGS(X_ALL, SF_SET_PENDING);
+                    GETEB(x1, 1);
+                    u8 = F8;
+                    emit_sub8c(dyn, ninst, x1, u8, x2, x4, x5, x6);
+                    EBBACK(x5, 0);
+                    break;
+                case 6: // XOR
+                    INST_NAME("XOR Eb, Ib");
+                    SETFLAGS(X_ALL, SF_SET_PENDING);
+                    GETEB(x1, 1);
+                    u8 = F8;
+                    emit_xor8c(dyn, ninst, x1, u8, x2, x4);
+                    EBBACK(x5, 0);
+                    break;
+                case 7: // CMP
+                    INST_NAME("CMP Eb, Ib");
+                    SETFLAGS(X_ALL, SF_SET_PENDING);
+                    GETEB(x1, 1);
+                    u8 = F8;
+                    if(u8) {
+                        ADDI(x2, xZR, u8);
+                        emit_cmp8(dyn, ninst, x1, x2, x3, x4, x5, x6);
+                    } else {
+                        emit_cmp8_0(dyn, ninst, x1, x3, x4);
+                    }
+                    break;
+                default:
+                    DEFAULT;
+            }
+            break;
+        case 0x81:
+        case 0x83:
+            nextop = F8;
+            switch((nextop>>3)&7) {
+                case 0: // ADD
+                    if(opcode==0x81) {INST_NAME("ADD Ed, Id");} else {INST_NAME("ADD Ed, Ib");}
+                    SETFLAGS(X_ALL, SF_SET_PENDING);
+                    GETED((opcode==0x81)?4:1);
+                    if(opcode==0x81) i64 = F32S; else i64 = F8S;
+                    emit_add32c(dyn, ninst, rex, ed, i64, x3, x4, x5, x6);
+                    WBACK;
+                    break;
+                case 1: // OR
+                    if(opcode==0x81) {INST_NAME("OR Ed, Id");} else {INST_NAME("OR Ed, Ib");}
+                    SETFLAGS(X_ALL, SF_SET_PENDING);
+                    GETED((opcode==0x81)?4:1);
+                    if(opcode==0x81) i64 = F32S; else i64 = F8S;
+                    emit_or32c(dyn, ninst, rex, ed, i64, x3, x4);
+                    WBACK;
+                    break;
+                case 2: // ADC
+                    if(opcode==0x81) {INST_NAME("ADC Ed, Id");} else {INST_NAME("ADC Ed, Ib");}
+                    READFLAGS(X_CF);
+                    SETFLAGS(X_ALL, SF_SET_PENDING);
+                    GETED((opcode==0x81)?4:1);
+                    if(opcode==0x81) i64 = F32S; else i64 = F8S;
+                    MOV64xw(x5, i64);
+                    emit_adc32(dyn, ninst, rex, ed, x5, x3, x4, x6, x9);
+                    WBACK;
+                    break;
+                case 3: // SBB
+                    if(opcode==0x81) {INST_NAME("SBB Ed, Id");} else {INST_NAME("SBB Ed, Ib");}
+                    READFLAGS(X_CF);
+                    SETFLAGS(X_ALL, SF_SET_PENDING);
+                    GETED((opcode==0x81)?4:1);
+                    if(opcode==0x81) i64 = F32S; else i64 = F8S;
+                    MOV64xw(x5, i64);
+                    emit_sbb32(dyn, ninst, rex, ed, x5, x3, x4, x6);
+                    WBACK;
+                    break;
+                case 4: // AND
+                    if(opcode==0x81) {INST_NAME("AND Ed, Id");} else {INST_NAME("AND Ed, Ib");}
+                    SETFLAGS(X_ALL, SF_SET_PENDING);
+                    GETED((opcode==0x81)?4:1);
+                    if(opcode==0x81) i64 = F32S; else i64 = F8S;
+                    emit_and32c(dyn, ninst, rex, ed, i64, x3, x4);
+                    WBACK;
+                    break;
+                case 5: // SUB
+                    if(opcode==0x81) {INST_NAME("SUB Ed, Id");} else {INST_NAME("SUB Ed, Ib");}
+                    SETFLAGS(X_ALL, SF_SET_PENDING);
+                    GETED((opcode==0x81)?4:1);
+                    if(opcode==0x81) i64 = F32S; else i64 = F8S;
+                    emit_sub32c(dyn, ninst, rex, ed, i64, x3, x4, x5, x6);
+                    WBACK;
+                    break;
+                case 6: // XOR
+                    if(opcode==0x81) {INST_NAME("XOR Ed, Id");} else {INST_NAME("XOR Ed, Ib");}
+                    SETFLAGS(X_ALL, SF_SET_PENDING);
+                    GETED((opcode==0x81)?4:1);
+                    if(opcode==0x81) i64 = F32S; else i64 = F8S;
+                    emit_xor32c(dyn, ninst, rex, ed, i64, x3, x4);
+                    WBACK;
+                    break;
+                case 7: // CMP
+                    if(opcode==0x81) {INST_NAME("CMP Ed, Id");} else {INST_NAME("CMP Ed, Ib");}
+                    SETFLAGS(X_ALL, SF_SET_PENDING);
+                    GETED((opcode==0x81)?4:1);
+                    if(opcode==0x81) i64 = F32S; else i64 = F8S;
+                    if(i64) {
+                        MOV64xw(x2, i64);
+                        emit_cmp32(dyn, ninst, rex, ed, x2, x3, x4, x5, x6);
+                    } else {
+                        if(!rex.w && MODREG) {
+                            AND(x1, ed, xMASK);
+                            ed = x1;
+                        }
+                        emit_cmp32_0(dyn, ninst, rex, ed, x3, x4);
+                    }
+                    break;
+            }
+            break;
+        case 0x84:
+            INST_NAME("TEST Eb, Gb");
+            SETFLAGS(X_ALL, SF_SET_PENDING);
+            nextop=F8;
+            GETEB(x1, 0);
+            GETGB(x2);
+            emit_test8(dyn, ninst, x1, x2, x3, x4, x5);
+            break;
+        case 0x85:
+            INST_NAME("TEST Ed, Gd");
+            SETFLAGS(X_ALL, SF_SET_PENDING);
+            nextop=F8;
+            GETGD;
+            GETED(0);
+            emit_test32(dyn, ninst, rex, ed, gd, x3, x4, x5);
+            break;
+        case 0x86:
+            INST_NAME("(LOCK)XCHG Eb, Gb");
+            nextop = F8;
+            if(MODREG) {
+                GETGB(x1);
+                GETEB(x2, 0);
+                MV(x4, gd);
+                MV(gd, ed);
+                MV(ed, x4);
+                GBBACK(x4);
+                EBBACK(x4, 0);
+            } else {
+                GETGB(x3);
+                addr = geted(dyn, addr, ninst, nextop, &ed, x2, x1, &fixedaddress, rex, LOCK_LOCK, 0, 0);
+                SMDMB();
+                LBU(x1, ed, 0);
+                SB(gd, ed, 0);
+                SMDMB();
+                gd = x1;
+                GBBACK(x3);
+            }
+            break;
+        case 0x87:
+            INST_NAME("(LOCK)XCHG Ed, Gd");
+            nextop = F8;
+            if(MODREG) {
+                GETGD;
+                GETED(0);
+                MVxw(x1, gd);
+                MVxw(gd, ed);
+                MVxw(ed, x1);
+            } else {
+                GETGD;
+                addr = geted(dyn, addr, ninst, nextop, &ed, x2, x1, &fixedaddress, rex, LOCK_LOCK, 0, 0);
+                SMDMB();
+                ANDI(x3, ed, (1<<(2+rex.w))-1);
+                BNE_MARK(x3, xZR);
+                MARKLOCK;
+                LRxw(x1, ed, 1, 0);
+                SCxw(x3, gd, ed, 0, 1);
+                BNE_MARKLOCK(x3, xZR);
+                B_MARK2_nocond;
+                MARK;
+                LDxw(x1, ed, 0);
+                SDxw(gd, ed, 0);
+                MARK2;
+                SMDMB();
+                MVxw(gd, x1);
+            }
+            break;
+        case 0x88:
+            INST_NAME("MOV Eb, Gb");
+            nextop = F8;
+            gd = ((nextop&0x38)>>3)+(rex.r<<3);
+            if(rex.rex) {
+                gb2 = 0;
+                gb1 = xRAX + gd;
+            } else {
+                gb2 = ((gd&4)>>2);
+                gb1 = xRAX+(gd&3);
+            }
+            gd = x4;
+            if(gb2) {
+                SRLI(x4, gb1, 8);
+                gb1 = x4;
+            }
+            if(MODREG) {
+                ed = (nextop&7) + (rex.b<<3);
+                if(rex.rex) {
+                    eb1 = xRAX+ed;
+                    eb2 = 0;
+                } else {
+                    eb1 = xRAX+(ed&3);  // Ax, Cx, Dx or Bx
+                    eb2 = ((ed&4)>>2);    // L or H
+                }
+                ANDI(gd, gb1, 0xff);
+                if(eb2) {
+                    MOV64x(x1, 0xffffffffffff00ffLL);
+                    AND(x1, eb1, x1);
+                    SLLI(gd, gd, 8);
+                    OR(eb1, x1, gd);
+                } else {
+                    ANDI(x1, eb1, ~0xff);
+                    OR(eb1, x1, gd);
+                }
+            } else {
+                addr = geted(dyn, addr, ninst, nextop, &ed, x2, x1, &fixedaddress, rex, &lock, 1, 0);
+                SB(gb1, ed, fixedaddress);
+                SMWRITELOCK(lock);
+            }
+            break;
+        case 0x89:
+            INST_NAME("MOV Ed, Gd");
+            nextop=F8;
+            GETGD;
+            if(MODREG) {   // reg <= reg
+                MVxw(xRAX+(nextop&7)+(rex.b<<3), gd);
+            } else {       // mem <= reg
+                addr = geted(dyn, addr, ninst, nextop, &ed, x2, x1, &fixedaddress, rex, &lock, 1, 0);
+                SDxw(gd, ed, fixedaddress);
+                SMWRITELOCK(lock);
+            }
+            break;
+        case 0x8A:
+            INST_NAME("MOV Gb, Eb");
+            nextop = F8;
+            gd = ((nextop&0x38)>>3)+(rex.r<<3);
+            if(rex.rex) {
+                gb2 = 0;
+                gb1 = xRAX + gd;
+            } else {
+                gb2 = ((gd&4)>>2);
+                gb1 = xRAX+(gd&3);
+            }
+            gd = x4;
+            if(MODREG) {
+                ed = (nextop&7) + (rex.b<<3);
+                if(rex.rex) {
+                    eb1 = xRAX+ed;
+                    eb2 = 0;
+                } else {
+                    eb1 = xRAX+(ed&3);  // Ax, Cx, Dx or Bx
+                    eb2 = ((ed&4)>>2);    // L or H
+                }
+                if(eb2) {
+                    SRLI(x1, eb1, 8);
+                    ANDI(x1, x1, 0xff);
+                } else {
+                    ANDI(x1, eb1, 0xff);
+                }
+            } else {
+                addr = geted(dyn, addr, ninst, nextop, &ed, x2, x1, &fixedaddress, rex, &lock, 1, 0);
+                SMREADLOCK(lock);
+                LBU(x1, ed, fixedaddress);
+            }
+            if(gb2) {
+                MOV64x(x4, ~0xff00);
+                AND(gb1, gb1, x4);
+                SLLI(x1, x1, 8);
+            } else {
+                ANDI(gb1, gb1, ~0xff);
+            }
+            OR(gb1, gb1, x1);
+            break;
+        case 0x8B:
+            INST_NAME("MOV Gd, Ed");
+            nextop=F8;
+            GETGD;
+            if(MODREG) {
+                MVxw(gd, xRAX+(nextop&7)+(rex.b<<3));
+            } else {
+                addr = geted(dyn, addr, ninst, nextop, &ed, x2, x1, &fixedaddress, rex, &lock, 1, 0);
+                SMREADLOCK(lock);
+                LDxw(gd, ed, fixedaddress);
+            }
+            break;
+        case 0x8C:
+            INST_NAME("MOV Ed, Seg");
+            nextop=F8;
+            if((nextop&0xC0)==0xC0) {   // reg <= seg
+                LHU(xRAX+(nextop&7)+(rex.b<<3), xEmu, offsetof(x64emu_t, segs[(nextop&0x38)>>3]));
+            } else {                    // mem <= seg
+                addr = geted(dyn, addr, ninst, nextop, &ed, x2, x1, &fixedaddress, rex, NULL, 1, 0);
+                LHU(x3, xEmu, offsetof(x64emu_t, segs[(nextop&0x38)>>3]));
+                SH(x3, ed, fixedaddress);
+                SMWRITE2();
+            }
+            break;
+        case 0x8D:
+            INST_NAME("LEA Gd, Ed");
+            nextop=F8;
+            GETGD;
+            if(MODREG) { // reg <= reg? that's an invalid operation
+                DEFAULT;
+            } else {     // mem <= reg
+                addr = geted(dyn, addr, ninst, nextop, &ed, x2, x1, &fixedaddress, rex, NULL, 0, 0);
+                MV(gd, ed);
+                if(!rex.w || rex.is32bits) {
+                    ZEROUP(gd); // truncate the higher 32bits as asked
+                }
+            }
+            break;
+        case 0x8E:
+            INST_NAME("MOV Seg,Ew");
+            nextop = F8;
+            if((nextop&0xC0)==0xC0) {
+                ed = xRAX+(nextop&7)+(rex.b<<3);
+            } else {
+                SMREAD();
+                addr = geted(dyn, addr, ninst, nextop, &ed, x2, x1, &fixedaddress, rex, &lock, 1, 0);
+                LHU(x1, ed, fixedaddress);
+                ed = x1;
+            }
+            SH(ed, xEmu, offsetof(x64emu_t, segs[(nextop&0x38)>>3]));
+            SW(xZR, xEmu, offsetof(x64emu_t, segs_serial[(nextop&0x38)>>3]));
+            break;
+        case 0x8F:
+            INST_NAME("POP Ed");
+            nextop = F8;
+            if(MODREG) {
+                POP1z(xRAX+(nextop&7)+(rex.b<<3));
+            } else {
+                POP1z(x2); // so this can handle POP [ESP] and maybe some variant too
+                addr = geted(dyn, addr, ninst, nextop, &ed, x3, x1, &fixedaddress, rex, &lock, 1, 0);
+                if(ed==xRSP) {
+                    SDz(x2, ed, fixedaddress);
+                } else {
+                    // complicated to just allow a segfault that can be recovered correctly
+                    ADDIz(xRSP, xRSP, rex.is32bits?-4:-8);
+                    SDz(x2, ed, fixedaddress);
+                    ADDIz(xRSP, xRSP, rex.is32bits?4:8);
+                }
+            }
+            break;
+        case 0x90:
+        case 0x91:
+        case 0x92:
+        case 0x93:
+        case 0x94:
+        case 0x95:
+        case 0x96:
+        case 0x97:
+            gd = xRAX+(opcode&0x07)+(rex.b<<3);
+            if(gd==xRAX) {
+                INST_NAME("NOP");
+            } else {
+                INST_NAME("XCHG EAX, Reg");
+                MVxw(x2, xRAX);
+                MVxw(xRAX, gd);
+                MVxw(gd, x2);
+            }
+            break;
+        case 0x98:
+            INST_NAME("CWDE");
+            if(rex.w) {
+                SEXT_W(xRAX, xRAX);
+            } else {
+                SLLI(xRAX, xRAX, 16);
+                SRAIW(xRAX, xRAX, 16);
+                ZEROUP(xRAX);
+            }
+            break;
+        case 0x99:
+            INST_NAME("CDQ");
+            if(rex.w) {
+                SRAI(xRDX, xRAX, 63);
+            } else {
+                SLLI(xRDX, xRAX, 32);
+                SRAI(xRDX, xRDX, 63);
+                ZEROUP(xRDX);
+            }
+            break;
+        case 0x9B:
+            INST_NAME("FWAIT");
+            break;
+        case 0x9C:
+            INST_NAME("PUSHF");
+            NOTEST(x1);
+            READFLAGS(X_ALL);
+            FLAGS_ADJUST_TO11(x3, xFlags, x2);
+            PUSH1z(x3);
+            break;
+        case 0x9D:
+            INST_NAME("POPF");
+            SETFLAGS(X_ALL, SF_SET);
+            POP1z(xFlags);
+            FLAGS_ADJUST_FROM11(xFlags, x2);
+            MOV32w(x1, 0x3F7FD7);
+            AND(xFlags, xFlags, x1);
+            ORI(xFlags, xFlags, 0x2);
+            SET_DFNONE();
+            if(box64_wine) {    // should this be done all the time?
+                ANDI(x1, xFlags, 1 << F_TF);
+                CBZ_NEXT(x1);
+                // go to epilog, TF should trigger at end of next opcode, so using Interpretor only
+                jump_to_epilog(dyn, addr, 0, ninst);
+            }
+            break;
+        case 0x9E:
+            INST_NAME("SAHF");
+            SETFLAGS(X_CF | X_PF | X_AF | X_ZF | X_SF, SF_SUBSET);
+            ADDI(x1, xZR, ~0b11010101);
+            AND(xFlags, xFlags, x1);
+            NOT(x1, x1);
+            SRLI(x2, xRAX, 8);
+            AND(x1, x1, x2);
+            OR(xFlags, xFlags, x1);
+            SET_DFNONE();
+            break;
+        case 0x9F:
+            INST_NAME("LAHF");
+            READFLAGS(X_CF | X_PF | X_AF | X_ZF | X_SF);
+            ANDI(x1, xFlags, 0xFF);
+            SLLI(x1, x1, 8);
+            MOV64x(x2, 0xffffffffffff00ffLL);
+            AND(xRAX, xRAX, x2);
+            OR(xRAX, xRAX, x1);
+            break;
+        case 0xA0:
+            INST_NAME("MOV AL,Ob");
+            if(rex.is32bits) u64 = F32; else u64 = F64;
+            MOV64z(x1, u64);
+            LBU(x1, x1, 0);
+            ANDI(xRAX, xRAX, ~0xff);
+            OR(xRAX, xRAX, x1);
+            break;
+        case 0xA1:
+            INST_NAME("MOV EAX,Od");
+            if(rex.is32bits) u64 = F32; else u64 = F64;
+            MOV64z(x1, u64);
+            LDxw(xRAX, x1, 0);
+            break;
+        case 0xA2:
+            INST_NAME("MOV Ob,AL");
+            if(rex.is32bits) u64 = F32; else u64 = F64;
+            MOV64z(x1, u64);
+            SB(xRAX, x1, 0);
+            SMWRITE();
+            break;
+        case 0xA3:
+            INST_NAME("MOV Od,EAX");
+            if(rex.is32bits) u64 = F32; else u64 = F64;
+            MOV64z(x1, u64);
+            SDxw(xRAX, x1, 0);
+            SMWRITE();
+            break;
+        case 0xA4:
+            if(rep) {
+                INST_NAME("REP MOVSB");
+                CBZ_NEXT(xRCX);
+                ANDI(x1, xFlags, 1<<F_DF);
+                BNEZ_MARK2(x1);
+                MARK;   // Part with DF==0
+                LBU(x1, xRSI, 0);
+                SB(x1, xRDI, 0);
+                ADDI(xRSI, xRSI, 1);
+                ADDI(xRDI, xRDI, 1);
+                SUBI(xRCX, xRCX, 1);
+                BNEZ_MARK(xRCX);
+                B_NEXT_nocond;
+                MARK2;  // Part with DF==1
+                LBU(x1, xRSI, 0);
+                SB(x1, xRDI, 0);
+                SUBI(xRSI, xRSI, 1);
+                SUBI(xRDI, xRDI, 1);
+                SUBI(xRCX, xRCX, 1);
+                BNEZ_MARK2(xRCX);
+                // done
+            } else {
+                INST_NAME("MOVSB");
+                GETDIR(x3, x1, 1);
+                LBU(x1, xRSI, 0);
+                SB(x1, xRDI, 0);
+                ADD(xRSI, xRSI, x3);
+                ADD(xRDI, xRDI, x3);
+            }
+            break;
+        case 0xA5:
+            if(rep) {
+                INST_NAME("REP MOVSD");
+                CBZ_NEXT(xRCX);
+                ANDI(x1, xFlags, 1<<F_DF);
+                BNEZ_MARK2(x1);
+                MARK;   // Part with DF==0
+                LDxw(x1, xRSI, 0);
+                ADDI(xRSI, xRSI, rex.w?8:4);
+                SDxw(x1, xRDI, 0);
+                ADDI(xRDI, xRDI, rex.w?8:4);
+                SUBI(xRCX, xRCX, 1);
+                BNEZ_MARK(xRCX);
+                B_NEXT_nocond;
+                MARK2;  // Part with DF==1
+                LDxw(x1, xRSI, 0);
+                SUBI(xRSI, xRSI, rex.w?8:4);
+                SDxw(x1, xRDI, 0);
+                SUBI(xRDI, xRDI, rex.w?8:4);
+                SUBI(xRCX, xRCX, 1);
+                BNEZ_MARK2(xRCX);
+                // done
+            } else {
+                INST_NAME("MOVSD");
+                GETDIR(x3, x1, rex.w?8:4);
+                LDxw(x1, xRSI, 0);
+                SDxw(x1, xRDI, 0);
+                ADD(xRSI, xRSI, x3);
+                ADD(xRDI, xRDI, x3);
+            }
+            break;
+        case 0xA6:
+            switch(rep) {
+            case 1:
+            case 2:
+                if(rep==1) {INST_NAME("REPNZ CMPSB");} else {INST_NAME("REPZ CMPSB");}
+                MAYSETFLAGS();
+                SETFLAGS(X_ALL, SF_SET_PENDING);
+                CBZ_NEXT(xRCX);
+                ANDI(x1, xFlags, 1<<F_DF);
+                BNEZ_MARK2(x1);
+                MARK;   // Part with DF==0
+                LBU(x1, xRSI, 0);
+                ADDI(xRSI, xRSI, 1);
+                LBU(x2, xRDI, 0);
+                ADDI(xRDI, xRDI, 1);
+                SUBI(xRCX, xRCX, 1);
+                if (rep==1) {BEQ_MARK3(x1, x2);} else {BNE_MARK3(x1, x2);}
+                BNEZ_MARK(xRCX);
+                B_MARK3_nocond;
+                MARK2;   // Part with DF==1
+                LBU(x1, xRSI, 0);
+                SUBI(xRSI, xRSI, 1);
+                LBU(x2, xRDI, 0);
+                SUBI(xRDI, xRDI, 1);
+                SUBI(xRCX, xRCX, 1);
+                if (rep==1) {BEQ_MARK3(x1, x2);} else {BNE_MARK3(x1, x2);}
+                BNEZ_MARK2(xRCX);
+                MARK3;  // end
+                emit_cmp8(dyn, ninst, x1, x2, x3, x4, x5, x6);
+                break;
+            default:
+                INST_NAME("CMPSB");
+                SETFLAGS(X_ALL, SF_SET_PENDING);
+                GETDIR(x3, x1, 1);
+                LBU(x1, xRSI, 0);
+                LBU(x2, xRDI, 0);
+                ADD(xRSI, xRSI, x3);
+                ADD(xRDI, xRDI, x3);
+                emit_cmp8(dyn, ninst, x1, x2, x3, x4, x5, x6);
+                break;
+            }
+            break;
+        case 0xA7:
+            switch (rep) {
+                case 1:
+                case 2:
+                    if (rep == 1) { INST_NAME("REPNZ CMPSD"); } else { INST_NAME("REPZ CMPSD"); }
+                    MAYSETFLAGS();
+                    SETFLAGS(X_ALL, SF_SET_PENDING);
+                    CBZ_NEXT(xRCX);
+                    ANDI(x1, xFlags, 1 << F_DF);
+                    BNEZ_MARK2(x1);
+                    MARK; // Part with DF==0
+                    LDxw(x1, xRSI, 0);
+                    ADDI(xRSI, xRSI, rex.w ? 8 : 4);
+                    LDxw(x2, xRDI, 0);
+                    ADDI(xRDI, xRDI, rex.w ? 8 : 4);
+                    SUBI(xRCX, xRCX, 1);
+                    if (rep == 1) { BEQ_MARK3(x1, x2); } else { BNE_MARK3(x1, x2); }
+                    BNEZ_MARK(xRCX);
+                    B_MARK3_nocond;
+                    MARK2; // Part with DF==1
+                    LDxw(x1, xRSI, 0);
+                    SUBI(xRSI, xRSI, rex.w ? 8 : 4);
+                    LDxw(x2, xRDI, 0);
+                    SUBI(xRDI, xRDI, rex.w ? 8 : 4);
+                    SUBI(xRCX, xRCX, 1);
+                    if (rep == 1) { BEQ_MARK3(x1, x2); } else { BNE_MARK3(x1, x2); }
+                    BNEZ_MARK2(xRCX);
+                    MARK3; // end
+                    emit_cmp32(dyn, ninst, rex, x1, x2, x3, x4, x5, x6);
+                    break;
+                default:
+                    INST_NAME("CMPSD");
+                    SETFLAGS(X_ALL, SF_SET_PENDING);
+                    GETDIR(x3, x1, rex.w ? 8 : 4);
+                    LDxw(x1, xRSI, 0);
+                    LDxw(x2, xRDI, 0);
+                    ADD(xRSI, xRSI, x3);
+                    ADD(xRDI, xRDI, x3);
+                    emit_cmp32(dyn, ninst, rex, x1, x2, x3, x4, x5, x6);
+                    break;
+            }
+            break;
+        case 0xA8:
+            INST_NAME("TEST AL, Ib");
+            SETFLAGS(X_ALL, SF_SET_PENDING);
+            ANDI(x1, xRAX, 0xff);
+            u8 = F8;
+            MOV32w(x2, u8);
+            emit_test8(dyn, ninst, x1, x2, x3, x4, x5);
+            break;
+        case 0xA9:
+            INST_NAME("TEST EAX, Id");
+            SETFLAGS(X_ALL, SF_SET_PENDING);
+            i64 = F32S;
+            MOV64xw(x2, i64);
+            emit_test32(dyn, ninst, rex, xRAX, x2, x3, x4, x5);
+            break;
+        case 0xAA:
+            if(rep) {
+                INST_NAME("REP STOSB");
+                CBZ_NEXT(xRCX);
+                ANDI(x1, xFlags, 1<<F_DF);
+                BNEZ_MARK2(x1);
+                MARK;   // Part with DF==0
+                SB(xRAX, xRDI, 0);
+                ADDI(xRDI, xRDI, 1);
+                ADDI(xRCX, xRCX, -1);
+                BNEZ_MARK(xRCX);
+                B_NEXT_nocond;
+                MARK2;  // Part with DF==1
+                SB(xRAX, xRDI, 0);
+                ADDI(xRDI, xRDI, -1);
+                ADDI(xRCX, xRCX, -1);
+                BNEZ_MARK2(xRCX);
+                // done
+            } else {
+                INST_NAME("STOSB");
+                GETDIR(x3, x1, 1);
+                SB(xRAX, xRDI, 0);
+                ADD(xRDI, xRDI, x3);
+            }
+            break;
+        case 0xAB:
+            if(rep) {
+                INST_NAME("REP STOSD");
+                CBZ_NEXT(xRCX);
+                ANDI(x1, xFlags, 1<<F_DF);
+                BNEZ_MARK2(x1);
+                MARK;   // Part with DF==0
+                SDxw(xRAX, xRDI, 0);
+                ADDI(xRDI, xRDI, rex.w?8:4);
+                SUBI(xRCX, xRCX, 1);
+                BNEZ_MARK(xRCX);
+                B_NEXT_nocond;
+                MARK2;  // Part with DF==1
+                SDxw(xRAX, xRDI, 0);
+                SUBI(xRDI, xRDI, rex.w?8:4);
+                SUBI(xRCX, xRCX, 1);
+                BNEZ_MARK2(xRCX);
+                // done
+            } else {
+                INST_NAME("STOSD");
+                GETDIR(x3, x1, rex.w?8:4);
+                SDxw(xRAX, xRDI, 0);
+                ADD(xRDI, xRDI, x3);
+            }
+            break;
+        case 0xAC:
+            if (rep) {
+                DEFAULT;
+            } else {
+                INST_NAME("LODSB");
+                GETDIR(x1, x2, 1);
+                LBU(x2, xRSI, 0);
+                ADD(xRSI, xRSI, x1);
+                ANDI(xRAX, xRAX, ~0xff);
+                OR(xRAX, xRAX, x2);
+            }
+            break;
+        case 0xAD:
+            if (rep) {
+                DEFAULT;
+            } else {
+                INST_NAME("LODSD");
+                GETDIR(x1, x2, rex.w ? 8 : 4);
+                LDxw(xRAX, xRSI, 0);
+                ADD(xRSI, xRSI, x1);
+            }
+            break;
+        case 0xAE:
+            switch (rep) {
+            case 1:
+            case 2:
+                if (rep==1) {INST_NAME("REPNZ SCASB");} else {INST_NAME("REPZ SCASB");}
+                MAYSETFLAGS();
+                SETFLAGS(X_ALL, SF_SET_PENDING);
+                CBZ_NEXT(xRCX);
+                ANDI(x1, xRAX, 0xff);
+                ANDI(x2, xFlags, 1<<F_DF);
+                BNEZ_MARK2(x2);
+                MARK;   // Part with DF==0
+                LBU(x2, xRDI, 0);
+                ADDI(xRDI, xRDI, 1);
+                SUBI(xRCX, xRCX, 1);
+                if (rep==1) {BEQ_MARK3(x1, x2);} else {BNE_MARK3(x1, x2);}
+                BNE_MARK(xRCX, xZR);
+                B_MARK3_nocond;
+                MARK2;  // Part with DF==1
+                LBU(x2, xRDI, 0);
+                SUBI(xRDI, xRDI, 1);
+                SUBI(xRCX, xRCX, 1);
+                if (rep==1) {BEQ_MARK3(x1, x2);} else {BNE_MARK3(x1, x2);}
+                BNE_MARK2(xRCX, xZR);
+                MARK3; // end
+                emit_cmp8(dyn, ninst, x1, x2, x3, x4, x5, x6);
+                break;
+            default:
+                INST_NAME("SCASB");
+                SETFLAGS(X_ALL, SF_SET_PENDING);
+                GETDIR(x3, x1, 1);
+                ANDI(x1, xRAX, 0xff);
+                LBU(x2, xRDI, 0);
+                ADD(xRDI, xRDI, x3);
+                emit_cmp8(dyn, ninst, x1, x2, x3, x4, x5, x6);
+                break;
+            }
+            break;
+        case 0xAF:
+            switch (rep) {
+            case 1:
+            case 2:
+                if (rep==1) {INST_NAME("REPNZ SCASD");} else {INST_NAME("REPZ SCASD");}
+                MAYSETFLAGS();
+                SETFLAGS(X_ALL, SF_SET_PENDING);
+                CBZ_NEXT(xRCX);
+                if (rex.w) {MV(x1, xRAX);} else {AND(x1, xRAX, xMASK);}
+                ANDI(x2, xFlags, 1<<F_DF);
+                BNEZ_MARK2(x2);
+                MARK;   // Part with DF==0
+                LDxw(x2, xRDI, 0);
+                ADDI(xRDI, xRDI, rex.w?8:4);
+                SUBI(xRCX, xRCX, 1);
+                if (rep==1) {BEQ_MARK3(x1, x2);} else {BNE_MARK3(x1, x2);}
+                BNE_MARK(xRCX, xZR);
+                B_MARK3_nocond;
+                MARK2;  // Part with DF==1
+                LDxw(x2, xRDI, 0);
+                SUBI(xRDI, xRDI, rex.w?8:4);
+                SUBI(xRCX, xRCX, 1);
+                if (rep==1) {BEQ_MARK3(x1, x2);} else {BNE_MARK3(x1, x2);}
+                BNE_MARK2(xRCX, xZR);
+                MARK3; // end
+                emit_cmp32(dyn, ninst, rex, x1, x2, x3, x4, x5, x6);
+                break;
+            default:
+                INST_NAME("SCASD");
+                SETFLAGS(X_ALL, SF_SET_PENDING);
+                GETDIR(x3, x1, rex.w?8:4);
+                LDxw(x2, xRDI, 0);
+                ADD(xRDI, xRDI, x3);
+                emit_cmp32(dyn, ninst, rex, xRAX, x2, x3, x4, x5, x6);
+                break;
+            }
+            break;
+        case 0xB0:
+        case 0xB1:
+        case 0xB2:
+        case 0xB3:
+            INST_NAME("MOV xL, Ib");
+            u8 = F8;
+            if(rex.rex)
+                gb1 = xRAX+(opcode&7)+(rex.b<<3);
+            else
+                gb1 = xRAX+(opcode&3);
+            ANDI(gb1, gb1, ~0xff);
+            ORI(gb1, gb1, u8);
+            break;
+        case 0xB4:
+        case 0xB5:
+        case 0xB6:
+        case 0xB7:
+            INST_NAME("MOV xH, Ib");
+            u8 = F8;
+            if(rex.rex) {
+                gb1 = xRAX+(opcode&7)+(rex.b<<3);
+                ANDI(gb1, gb1, ~0xff);
+                ORI(gb1, gb1, u8);
+            } else {
+                MOV32w(x1, u8);
+                gb1 = xRAX+(opcode&3);
+                MOV64x(x2, 0xffffffffffff00ffLL);
+                AND(gb1, gb1, x2);
+                SLLI(x1, x1, 8);
+                OR(gb1, gb1, x1);
+            }
+            break;
+        case 0xB8:
+        case 0xB9:
+        case 0xBA:
+        case 0xBB:
+        case 0xBC:
+        case 0xBD:
+        case 0xBE:
+        case 0xBF:
+            INST_NAME("MOV Reg, Id");
+            gd = xRAX+(opcode&7)+(rex.b<<3);
+            if(rex.w) {
+                u64 = F64;
+                MOV64x(gd, u64);
+            } else {
+                u32 = F32;
+                MOV32w(gd, u32);
+            }
+            break;
+        default:
+            DEFAULT;
+    }
+
+     return addr;
+}