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test: QL_VERBOSE.DISASM implicitly uses r2.disassembler
see https://github.com/qilingframework/qiling/issues/1396
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@@ -1,12 +1,14 @@
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#!/usr/bin/env python3
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import unittest
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from io import StringIO
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import sys
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sys.path.append("..")
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from qiling import Qiling
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from qiling.const import QL_ARCH, QL_VERBOSE
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from qiling.const import QL_ARCH, QL_INTERCEPT, QL_OS, QL_VERBOSE
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from tests.test_shellcode import ARM64_LIN, graceful_execve
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try:
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from qiling.extensions.r2.r2 import R2
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@@ -59,6 +61,20 @@ class R2Test(unittest.TestCase):
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print(r2.where('main'))
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self.assertEqual(r2.at(r2.where('main')), 'main')
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def test_disasm_monkeypatch(self):
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# QlArchUtils.setup_output(QL_VERBOSE.DISASM) implicitly uses r2.disassembler if available
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# see https://github.com/qilingframework/qiling/issues/1396
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ql = Qiling(code=ARM64_LIN, archtype=QL_ARCH.ARM64, ostype=QL_OS.LINUX, verbose=QL_VERBOSE.DISASM)
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ql.os.set_syscall('execve', graceful_execve, QL_INTERCEPT.EXIT)
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# store ql log output in a string
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ql_log = StringIO()
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ql.log.handlers[0].setStream(ql_log)
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ql.run()
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ql_log_str = ql_log.getvalue()
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self.assertFalse('invalid' in ql_log_str)
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self.assertTrue('adr x1, #0x11ff058' in ql_log_str)
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if __name__ == "__main__":
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unittest.main()
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