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Resolve x86-64 pool slots by adding back the heap tag
On x86-64 the pool pointer r15 carries the heap tag, so a [r15, off] instruction offset is one less than the collector/arm64 slot offset. Detect x64 from asm.arch/bits and add the tag (+1) back to get the canonical slot offset used for the string/ref map lookups and the pool-slot address. This makes the whole chain line up on x64: the code->pool-slot xref now lands on the same slot the data-image string ref targets, pool strings resolve inline, and a real code->string xref is emitted. On the Android x86_64 app axt 0x76a97 now shows 'method.DioManager.initParams ... mov rax, [r15 + str.https:__pss.aakredit.in_]' with the value inlined; resolved strings went 1455 -> 7411. arm64 is unchanged (slot_off == pp_off).
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05ebbd2c2d
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abcdbb2b11
1 file changed
+14
-5
@@ -80,6 +80,8 @@ typedef struct {
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HtUP *by_pp_off; // pp_off -> FlutterPpRef
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HtUP *addr_by_code_index; // code_index -> normalized code address
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ut64 pp_base; // ObjectPool base address, so a [PP, off] load can xref pp_base+off
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bool is_x64; // x86-64 keeps the heap tag in r15, so a [r15, off] offset is one
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// less than the arm64/collector offset; add it back before lookup/xref.
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} FlutterPpRefMap;
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typedef struct {
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@@ -690,6 +692,9 @@ static void flutter_pp_ref_map_load(DartCtx *ctx, FlutterPpRefMap *map) {
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// pp_base + off. r2flutter_setup_pp_gp already resolved it into anal.gp.
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if (ctx->core) {
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map->pp_base = (ut64)r_config_get_i (ctx->core->config, "anal.gp");
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const char *arch = r_config_get (ctx->core->config, "asm.arch");
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const int bits = (int)r_config_get_i (ctx->core->config, "asm.bits");
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map->is_x64 = arch && bits == 64 && (!strcmp (arch, "x86") || !strcmp (arch, "x64"));
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}
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if (layout_ours) {
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dart_ctx_fini_layout (ctx, layout_owned);
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@@ -1166,20 +1171,24 @@ static bool flutter_process_pp_load(RCore *core, FlutterAnalState *state, Flutte
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}
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pp_off = state->regs[base].pp_off + (ut64)info->mem_disp;
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}
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// On x86-64 the heap tag is carried in r15, so the instruction offset is one
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// less than the collector/arm64 slot offset. Add it back to get the
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// canonical offset used for resolution maps and the slot address.
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const ut64 slot_off = pp_off + (pp_refs && pp_refs->is_x64? 1: 0);
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// The destination now holds the pool OBJECT at pp_off, not a PP pointer.
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// Marking it has_pp_off would make a later [dst, field] load look like a
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// bogus pool slot (e.g. a Code entry-point deref read as PP+off+7).
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memset (&state->regs[dst], 0, sizeof (state->regs[dst]));
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state->regs[dst].has_pp_slot = true;
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state->regs[dst].pp_slot = pp_off;
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state->regs[dst].pp_slot = slot_off;
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// Link the instruction to the ObjectPool slot it reads (pp_base + off), so
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// `axt` on the slot shows the loading code; the slot's own ref to its value
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// (applied by -AA) then chains through to the string/object. Works on any
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// arch since pp_base + off is the slot address regardless of index scheme.
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if (pp_refs && pp_refs->pp_base) {
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flutter_add_ref (core, at, pp_refs->pp_base + pp_off, R_ANAL_REF_TYPE_DATA | R_ANAL_REF_TYPE_READ);
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flutter_add_ref (core, at, pp_refs->pp_base + slot_off, R_ANAL_REF_TYPE_DATA | R_ANAL_REF_TYPE_READ);
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}
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const FlutterPpStringRef *string_ref = flutter_pp_string_map_get (pp_strings, pp_off);
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const FlutterPpStringRef *string_ref = flutter_pp_string_map_get (pp_strings, slot_off);
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if (string_ref) {
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flutter_set_flag (core, "dart.str", string_ref->string_value, string_ref->string_addr, (ut32)strlen (string_ref->string_value), true);
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flutter_add_ref (core, at, string_ref->string_addr, R_ANAL_REF_TYPE_STRN | R_ANAL_REF_TYPE_READ);
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@@ -1189,10 +1198,10 @@ static bool flutter_process_pp_load(RCore *core, FlutterAnalState *state, Flutte
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flutter_append_comment (core, at, msg, stats);
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free (msg);
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free (escaped);
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} else if (!flutter_annotate_pp_ref (core, pp_refs, at, pp_off, false, stats)) {
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} else if (!flutter_annotate_pp_ref (core, pp_refs, at, slot_off, false, stats)) {
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char *msg = r_str_newf ("dart: "
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"PP slot +0x%" PFMT64x,
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pp_off);
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slot_off);
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flutter_append_comment (core, at, msg, stats);
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free (msg);
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}
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