ARC

Fixes https://github.com/rui314/mold/issues/1442

.github/workflows/build-all.yml

@@ -9,11 +9,18 @@ on:
 
 jobs:
   build-tarballs:
-    runs-on: ubuntu-24.04
-
     strategy:
       matrix:
-        target: [ x86_64, aarch64, arm, riscv64, ppc64le, s390x ]
+        include:
+          - { target: x86_64,      os: ubuntu-24.04 }
+          - { target: aarch64,     os: ubuntu-24.04-arm }
+          - { target: arm,         os: ubuntu-24.04-arm }
+          - { target: riscv64,     os: ubuntu-24.04 }
+          - { target: ppc64le,     os: ubuntu-24.04 }
+          - { target: s390x,       os: ubuntu-24.04 }
+          - { target: loongarch64, os: ubuntu-24.04 }
+
+    runs-on: ${{ matrix.os }}
 
     permissions:
       contents: read
@@ -21,7 +28,10 @@ jobs:
 
     steps:
     - name: Checkout Repository
-      uses: actions/checkout@v2
+      uses: actions/checkout@v4
+
+    - name: Install Podman
+      run: sudo apt-get update && sudo apt-get install -y podman qemu-user-static
 
     - name: Login to GitHub Container Registry
       uses: redhat-actions/podman-login@v1
@@ -30,9 +40,6 @@ jobs:
         username: ${{ github.repository_owner }}
         password: ${{ secrets.GITHUB_TOKEN }}
 
-    - name: Set up QEMU
-      uses: docker/setup-qemu-action@v3
-
     - name: Build a tarball
       run: ./dist.sh ${{ matrix.target }}
 

.github/workflows/build-native.yml

@@ -1,12 +1,19 @@
-name: Build x86 tarball
+name: Build native tarballs
 
 on:
   push:
   workflow_dispatch:
 
 jobs:
-  build-tarball:
-    runs-on: ubuntu-24.04
+  build-tarballs:
+    strategy:
+      matrix:
+        include:
+          - { target: x86_64,  os: ubuntu-24.04 }
+          - { target: aarch64, os: ubuntu-24.04-arm }
+          - { target: arm,     os: ubuntu-24.04-arm }
+
+    runs-on: ${{ matrix.os }}
 
     permissions:
       contents: read
@@ -14,7 +21,10 @@ jobs:
 
     steps:
     - name: Checkout Repository
-      uses: actions/checkout@v2
+      uses: actions/checkout@v4
+
+    - name: Install Podman
+      run: sudo apt-get update && sudo apt-get install -y podman qemu-user-static
 
     - name: Login to GitHub Container Registry
       uses: redhat-actions/podman-login@v1
@@ -24,11 +34,11 @@ jobs:
         password: ${{ secrets.GITHUB_TOKEN }}
 
     - name: Build a tarball
-      run: ./dist.sh
+      run: ./dist.sh ${{ matrix.target }}
 
     - name: Upload artifact
       uses: actions/upload-artifact@v4
       with:
-        name: tarball
+        name: ${{ matrix.target }}
         path: dist/mold-*.tar.gz
         compression-level: 0

.github/workflows/ci.yml

@@ -14,7 +14,7 @@ jobs:
         - '-DMOLD_USE_TSAN=On'
     runs-on: ubuntu-24.04
     steps:
-    - uses: actions/checkout@v3
+    - uses: actions/checkout@v4
     - uses: rui314/setup-mold@staging
     - run: sudo ./install-build-deps.sh
     - name: build
@@ -26,7 +26,7 @@ jobs:
         cmake --build . -j$(nproc)
     - run: cd build; ctest --output-on-failure -j$(nproc)
     - name: archive test results
-      uses: actions/upload-artifact@v3
+      uses: actions/upload-artifact@v4
       if: failure()
       with:
         name: test-results-clang
@@ -35,17 +35,14 @@ jobs:
           !build/CMakeFiles
 
   build-multi-archs:
-    runs-on: ubuntu-latest
-    container: gcc:11.1.0
+    runs-on: ubuntu-24.04
     steps:
-    - uses: actions/checkout@v3
+    - uses: actions/checkout@v4
     - name: install-build-deps
-      shell: bash
       run: |
-        # Install cross toolchains
-        ./install-build-deps.sh
-        ./install-cross-tools.sh
-        .github/workflows/install-extras.sh
+        sudo ./install-build-deps.sh
+        sudo ./install-cross-tools.sh
+        sudo .github/workflows/install-extras.sh
     - name: build
       run: |
         mkdir build
@@ -54,10 +51,10 @@ jobs:
         cmake --build . -j$(nproc)
     - run: cd build; ctest --output-on-failure -j$(nproc)
     - name: archive test results
-      uses: actions/upload-artifact@v3
+      uses: actions/upload-artifact@v4
       if: failure()
       with:
-        name: test-results-gcc
+        name: test-results-multi-archs
         path: |
           build
           !build/CMakeFiles
@@ -73,10 +70,11 @@ jobs:
         - gentoo/stage3
         - opensuse/tumbleweed
         - ubuntu:22.04
+        - ubuntu:25.04
     runs-on: ubuntu-latest
     container: ${{ matrix.distro }}
     steps:
-    - uses: actions/checkout@v2
+    - uses: actions/checkout@v4
     - run: ./install-build-deps.sh
     - name: build
       run: |
@@ -85,11 +83,19 @@ jobs:
         cmake ..
         cmake --build . -j$(nproc)
     - run: cd build; ctest --output-on-failure -j$(nproc)
+    - name: archive test results
+      uses: actions/upload-artifact@v4
+      if: failure()
+      with:
+        name: test-results-${{ matrix.distro }}
+        path: |
+          build
+          !build/CMakeFiles
 
   build-macos:
     runs-on: macos-latest
     steps:
-    - uses: actions/checkout@v3
+    - uses: actions/checkout@v4
     - name: build
       run: |
         mkdir build
@@ -100,7 +106,7 @@ jobs:
   build-windows:
     runs-on: windows-latest
     steps:
-    - uses: actions/checkout@v3
+    - uses: actions/checkout@v4
     - name: build
       run: |
         mkdir build
@@ -111,7 +117,7 @@ jobs:
   build-msys:
     runs-on: windows-latest
     steps:
-    - uses: actions/checkout@v3
+    - uses: actions/checkout@v4
     - name: Setup MSYS2
       uses: msys2/setup-msys2@v2
       with:
@@ -129,7 +135,7 @@ jobs:
   build-freebsd:
     runs-on: ubuntu-latest
     steps:
-    - uses: actions/checkout@v3
+    - uses: actions/checkout@v4
     - name: Build and test
       uses: vmactions/freebsd-vm@v1
       with:

.github/workflows/install-extras.sh

@@ -5,7 +5,7 @@ apt-get install -y wget xz-utils
 
 # Install a 32-bit RISC-V toolchain
 mkdir /rv32
-wget -O- -q https://github.com/riscv-collab/riscv-gnu-toolchain/releases/download/2023.07.07/riscv32-glibc-ubuntu-20.04-gcc-nightly-2023.07.07-nightly.tar.gz | tar -C /rv32 --strip-components=1 -xzf -
+wget -O- -q https://github.com/riscv-collab/riscv-gnu-toolchain/releases/download/2025.01.20/riscv32-glibc-ubuntu-22.04-gcc-nightly-2025.01.20-nightly.tar.xz | tar -C /rv32 --strip-components=1 --xz -xf -
 
 ln -sf /rv32/sysroot /usr/riscv32-linux-gnu
 echo '/rv32/bin/riscv32-unknown-linux-gnu-gcc -L/usr/riscv32-linux-gnu "$@"' > /usr/bin/riscv32-linux-gnu-gcc
@@ -18,7 +18,7 @@ done
 
 # Install a LoongArch toolchain
 mkdir /larch
-wget -O- -q https://github.com/loongson/build-tools/releases/download/2024.11.01/x86_64-cross-tools-loongarch64-binutils_2.43.1-gcc_14.2.0-glibc_2.40.tar.xz | tar -C /larch --strip-components=1 --xz -xf -
+wget -O- -q https://github.com/loongson/build-tools/releases/download/2025.02.21/x86_64-cross-tools-loongarch64-binutils_2.44-gcc_14.2.0-glibc_2.41.tar.xz | tar -C /larch --strip-components=1 --xz -xf -
 
 cp -r /larch/loongarch64-unknown-linux-gnu/lib/* /larch/target/lib64
 ln -sf /larch/target /usr/loongarch64-linux-gnu
@@ -57,5 +57,5 @@ done
 
 # Install Intel SDE CPU emulator for CET-related tests
 mkdir /sde
-wget -O- -q https://downloadmirror.intel.com/831748/sde-external-9.44.0-2024-08-22-lin.tar.xz | tar -C /sde --strip-components=1 --xz -xf -
+wget -O- -q https://downloadmirror.intel.com/843185/sde-external-9.48.0-2024-11-25-lin.tar.xz | tar -C /sde --strip-components=1 --xz -xf -
 ln -s /sde/sde64 /usr/bin

.github/workflows/update-manpage.yml

@@ -14,7 +14,7 @@ jobs:
 
     steps:
     - name: Check out repository
-      uses: actions/checkout@v2
+      uses: actions/checkout@v4
 
     - name: Install ronn
       run: sudo apt-get update && sudo apt-get install -y ronn

CMakeLists.txt

@@ -44,7 +44,7 @@
 # features and behave exactly the same.
 
 cmake_minimum_required(VERSION 3.14)
-project(mold VERSION 2.36.0)
+project(mold VERSION 2.37.1)
 
 include(CMakeDependentOption)
 include(CheckSymbolExists)
@@ -311,7 +311,7 @@ include_directories(${CMAKE_CURRENT_BINARY_DIR})
 # on a multicore machine.
 list(APPEND MOLD_ELF_TARGETS
   X86_64 I386 ARM64LE ARM64BE ARM32 RV32LE RV32BE RV64LE RV64BE PPC32
-  PPC64V1 PPC64V2 S390X SPARC64 M68K SH4LE SH4BE LOONGARCH32 LOONGARCH64)
+  PPC64V1 PPC64V2 S390X SPARC64 M68K SH4LE SH4BE LOONGARCH32 LOONGARCH64 ARC)
 
 list(APPEND MOLD_ELF_TEMPLATE_FILES
   src/arch-arm64.cc
@@ -385,6 +385,7 @@ target_sources(mold PRIVATE
   lib/perf.cc
   lib/random.cc
   lib/tar.cc
+  src/arch-arc.cc
   src/arch-arm32.cc
   src/arch-i386.cc
   src/arch-m68k.cc

README.md

@@ -76,12 +76,12 @@ installation location by passing `-DCMAKE_INSTALL_PREFIX=<directory>`.
 For other cmake options, see the comments in `CMakeLists.txt`.
 
 If you are not using a recent enough Linux distribution, or if `cmake` does
-not work for you for any reason, you can use Docker to build mold in a Docker
-environment. To do so, run `./dist.sh` in this directory instead of using
-`cmake`. The shell script will pull a Docker image, build mold and auxiliary
+not work for you for any reason, you can use Podman to build mold in a
+container. To do so, run `./dist.sh` in this directory instead of using
+`cmake`. The shell script will pull a container image, build mold and auxiliary
 files inside it, and package them into a single tar file named
-`mold-$version-$arch-linux.tar.gz`. You can extract the tar file anywhere and
-use the mold executable within it.
+`dist/mold-$version-$arch-linux.tar.gz`. You can extract the tar file anywhere
+and use the mold executable in it.
 
 ## How to use
 
@@ -158,6 +158,14 @@ If you want to use mold for all projects, add the above snippet to
 
 </details>
 
+<details><summary>If you are using Conan package manager</summary>
+
+You can configure [Conan](https://github.com/conan-io) to download the latest
+version of `mold` and use it as the linker when building your dependencies and
+projects from source. Please see the instructions [here](https://conan.io/center/recipes/mold).
+
+</details>
+
 <details><summary>mold -run</summary>
 
 It is sometimes very hard to pass an appropriate command line option to `cc`
@@ -264,3 +272,4 @@ the following people and organizations who have sponsored $128/month or more:
 - [Bryant Biggs](https://github.com/bryantbiggs)
 - [kraptor23](https://github.com/kraptor23)
 - [Jinkyu Yi](https://github.com/jincreator)
+- [Pedro Navarro](https://github.com/pedronavf)

arc.sh

@@ -0,0 +1,29 @@
+#!/bin/bash -x
+set -e
+apt-get install -y git bzip2 ninja-build pkg-config libglib2.0-dev python3-distutils-extra libpixman-1-dev
+
+cd /
+git clone --depth=1 https://github.com/foss-for-synopsys-dwc-arc-processors/qemu.git
+mkdir /qemu/build
+cd /qemu/build
+../configure --static --extra-cflags=-Wno-error
+ninja
+ln -s /qemu/build/qemu-arc /qemu/build/qemu-arc64 /usr/local/bin
+
+
+apt-get install -y libgmp-dev libmpfr-dev texinfo bison yacc flex
+cd /
+git clone --depth=1 https://github.com/foss-for-synopsys-dwc-arc-processors/binutils-gdb.git
+cd /binutils-gdb
+mkdir build
+cd build
+../configure --target=arc-linux
+make -j$(nproc)
+
+
+apt-get install -y mold
+mkdir /build
+cd /build
+cmake -GNinja -DCMAKE_BUILD_TYPE=Debug -DMOLD_USE_MOLD=1 /mold
+ninja
+TRIPLE=arc-linux-gnu bash -x /mold/test/hello-dynamic.sh

dist.sh

@@ -1,7 +1,7 @@
 #!/bin/bash
 #
 # This script creates a mold binary distribution. The output is written in
-# this directory as `mold-$version-$arch-linux.tar.gz` (e.g.,
+# `dist` directory as `mold-$version-$arch-linux.tar.gz` (e.g.,
 # `mold-1.0.3-x86_64-linux.tar.gz`).
 #
 # The mold executable created by this script is statically linked to
@@ -73,34 +73,35 @@ fi
 
 case $arch in
 x86_64)
-  # Debian 8 (Jessie) released in April 2015
+  # Debian 9 (Stretch) released in June 2017.
+  # We use a Google-provided mirror (gcr.io) of the official Docker hub
+  # (docker.io) because docker.io has a strict rate limit policy.
   cat <<EOF | $image_build
-FROM debian:jessie-20210326@sha256:32ad5050caffb2c7e969dac873bce2c370015c2256ff984b70c1c08b3a2816a0
+FROM mirror.gcr.io/library/debian:stretch@sha256:c5c5200ff1e9c73ffbf188b4a67eb1c91531b644856b4aefe86a58d2f0cb05be
 ENV DEBIAN_FRONTEND=noninteractive TZ=UTC
 RUN sed -i -e '/^deb/d' -e 's/^# deb /deb [trusted=yes] /g' /etc/apt/sources.list && \
   echo 'Acquire::Retries "10"; Acquire::http::timeout "10"; Acquire::Check-Valid-Until "false";' > /etc/apt/apt.conf.d/80-retries && \
   apt-get update && \
-  apt-get install -y --no-install-recommends wget bzip2 file make autoconf gcc g++ libssl-dev && \
+  apt-get install -y --no-install-recommends wget file make gcc g++ zlib1g-dev libssl-dev && \
   rm -rf /var/lib/apt/lists
 
 # Build CMake 3.27
 RUN mkdir /build && \
   cd /build && \
-  wget -O- --no-check-certificate https://cmake.org/files/v3.27/cmake-3.27.7.tar.gz | tar xzf - --strip-components=1 && \
+  wget -O- --no-check-certificate --progress=dot:mega https://cmake.org/files/v3.27/cmake-3.27.7.tar.gz | tar xzf - --strip-components=1 && \
   ./bootstrap --parallel=\$(nproc) && \
   make -j\$(nproc) && \
   make install && \
   rm -rf /build
 
-# Build GCC 10
+# Build GCC 14
 RUN mkdir /build && \
   cd /build && \
-  wget -O- --no-check-certificate https://ftpmirror.gnu.org/gnu/gcc/gcc-10.5.0/gcc-10.5.0.tar.gz | tar xzf - --strip-components=1 && \
-  mkdir isl gmp mpc mpfr && \
-  wget -O- --no-check-certificate https://gcc.gnu.org/pub/gcc/infrastructure/isl-0.18.tar.bz2 | tar xjf - --strip-components=1 -C isl && \
-  wget -O- --no-check-certificate https://ftpmirror.gnu.org/gnu/gmp/gmp-6.1.2.tar.bz2 | tar xjf - --strip-components=1 -C gmp && \
-  wget -O- --no-check-certificate https://ftpmirror.gnu.org/gnu/mpc/mpc-1.2.1.tar.gz | tar xzf - --strip-components=1 -C mpc && \
-  wget -O- --no-check-certificate https://ftpmirror.gnu.org/gnu/mpfr/mpfr-4.1.0.tar.gz | tar xzf - --strip-components=1 -C mpfr && \
+  wget -O- --no-check-certificate --progress=dot:mega https://ftpmirror.gnu.org/gcc/gcc-14.2.0/gcc-14.2.0.tar.gz | tar xzf - --strip-components=1 && \
+  mkdir gmp mpc mpfr && \
+  wget -O- --no-check-certificate --progress=dot:mega https://ftpmirror.gnu.org/gmp/gmp-6.3.0.tar.gz | tar xzf - --strip-components=1 -C gmp && \
+  wget -O- --no-check-certificate --progress=dot:mega https://ftpmirror.gnu.org/mpc/mpc-1.3.1.tar.gz | tar xzf - --strip-components=1 -C mpc && \
+  wget -O- --no-check-certificate --progress=dot:mega https://ftpmirror.gnu.org/mpfr/mpfr-4.2.1.tar.gz | tar xzf - --strip-components=1 -C mpfr && \
   ./configure --prefix=/usr --enable-languages=c,c++ --disable-bootstrap --disable-multilib && \
   make -j\$(nproc) && \
   make install && \
@@ -110,7 +111,7 @@ RUN mkdir /build && \
 # Build GNU binutils 2.43
 RUN mkdir /build && \
   cd /build && \
-  wget -O- --no-check-certificate https://ftp.gnu.org/gnu/binutils/binutils-2.43.tar.gz | tar xzf - --strip-components=1 && \
+  wget -O- --no-check-certificate --progress=dot:mega https://ftpmirror.gnu.org/binutils/binutils-2.43.tar.gz | tar xzf - --strip-components=1 && \
   ./configure --prefix=/usr && \
   make -j\$(nproc) && \
   make install && \
@@ -119,17 +120,16 @@ RUN mkdir /build && \
 # Build Python 3.12.7
 RUN mkdir /build && \
   cd /build && \
-  wget -O- --no-check-certificate https://www.python.org/ftp/python/3.12.7/Python-3.12.7.tgz | tar xzf - --strip-components=1 && \
+  wget -O- --no-check-certificate --progress=dot:mega https://www.python.org/ftp/python/3.12.7/Python-3.12.7.tgz | tar xzf - --strip-components=1 && \
   ./configure && \
   make -j\$(nproc) && \
   make install && \
-  ln -sf /usr/local/bin/python3 /usr/local/bin/python && \
   rm -rf /build
 
-# Build LLVM 18.1.8
+# Build LLVM 19
 RUN mkdir /build && \
   cd /build && \
-  wget -O- --no-check-certificate https://github.com/llvm/llvm-project/archive/refs/tags/llvmorg-18.1.8.tar.gz | tar xzf - --strip-components=1 && \
+  wget -O- --no-check-certificate --progress=dot:mega https://github.com/llvm/llvm-project/archive/refs/tags/llvmorg-19.1.7.tar.gz | tar xzf - --strip-components=1 && \
   mkdir b && \
   cd b && \
   cmake -DCMAKE_BUILD_TYPE=Release -DLLVM_ENABLE_PROJECTS=clang ../llvm && \
@@ -139,13 +139,13 @@ RUN mkdir /build && \
 EOF
   ;;
 aarch64 | arm | ppc64le | s390x)
-  # Debian 10 (Bullseye) released in July 2019
+  # Debian 11 (Bullseye) released in August 2021
   #
   # We don't want to build Clang for these targets with Qemu becuase
   # that'd take extremely long time. Also I believe old build machines
   # are usually x86-64.
   cat <<EOF | $image_build
-FROM debian:bullseye-20240904@sha256:8ccc486c29a3ad02ad5af7f1156e2152dff3ba5634eec9be375269ef123457d8
+FROM mirror.gcr.io/library/debian:bullseye-20240904@sha256:8ccc486c29a3ad02ad5af7f1156e2152dff3ba5634eec9be375269ef123457d8
 ENV DEBIAN_FRONTEND=noninteractive TZ=UTC
 RUN sed -i -e '/^deb/d' -e 's/^# deb /deb [trusted=yes] /g' /etc/apt/sources.list && \
   echo 'Acquire::Retries "10"; Acquire::http::timeout "10"; Acquire::Check-Valid-Until "false";' > /etc/apt/apt.conf.d/80-retries && \
@@ -158,7 +158,7 @@ EOF
   ;;
 riscv64)
   cat <<EOF | $image_build
-FROM docker.io/riscv64/debian:unstable-20240926@sha256:25654919c2926f38952cdd14b3300d83d13f2d820715f78c9f4b7a1d9399bf48
+FROM mirror.gcr.io/riscv64/debian:unstable-20240926@sha256:25654919c2926f38952cdd14b3300d83d13f2d820715f78c9f4b7a1d9399bf48
 ENV DEBIAN_FRONTEND=noninteractive TZ=UTC
 RUN sed -i -e '/^URIs/d' -e 's/^# http/URIs: http/' /etc/apt/sources.list.d/debian.sources && \
   echo 'Acquire::Retries "10"; Acquire::http::timeout "10"; Acquire::Check-Valid-Until "false";' > /etc/apt/apt.conf.d/80-retries && \
@@ -172,12 +172,12 @@ EOF
 loongarch64)
   # LoongArch build is not reproducible yet
   cat <<EOF | $image_build
-FROM docker.io/loongarch64/debian:sid
+FROM mirror.gcr.io/loongarch64/debian:sid
 ENV DEBIAN_FRONTEND=noninteractive TZ=UTC
 RUN apt-get update && \
-  apt-get install -y --no-install-recommends build-essential gcc-14 g++-14 clang-17 cmake && \
-  ln -sf /usr/bin/clang-17 /usr/bin/clang && \
-  ln -sf /usr/bin/clang++-17 /usr/bin/clang++ && \
+  apt-get install -y --no-install-recommends build-essential gcc-14 g++-14 clang-19 cmake && \
+  ln -sf /usr/bin/clang-19 /usr/bin/clang && \
+  ln -sf /usr/bin/clang++-19 /usr/bin/clang++ && \
   rm -rf /var/lib/apt/lists
 EOF
   ;;
@@ -200,7 +200,7 @@ timestamp="$(git log -1 --format=%ci)"
 # Build mold in a container.
 mkdir -p dist
 
-podman run --arch $arch -it --rm --userns=host --pids-limit=-1 \
+podman run --arch $arch -it --rm --userns=host --pids-limit=-1 --network=none \
   -v "$(pwd):/mold:ro" -v "$(pwd)/dist:/dist" $image bash -c "
 set -e
 mkdir /build

docs/mold.1

@@ -1,6 +1,6 @@
 .\" generated with Ronn-NG/v0.9.1
 .\" http://github.com/apjanke/ronn-ng/tree/0.9.1
-.TH "MOLD" "1" "January 2025" ""
+.TH "MOLD" "1" "February 2025" ""
 .SH "NAME"
 \fBmold\fR \- a modern linker
 .SH "SYNOPSIS"
@@ -353,7 +353,7 @@ Report undefined symbols (even with \fB\-\-shared\fR)\.
 \fB\-\-noinhibit\-exec\fR
 Create an output file even if errors occur\.
 .TP
-\fB\-\-package\-metadata\fR==\fIpercent\-encoded\-string\fR
+\fB\-\-package\-metadata\fR=\fIpercent\-encoded\-string\fR
 Embed a specified string into the \fB\.note\.package\fR section\. This option is designed for build scripts that generate binary packages, such as \fB\.rpm\fR or \fB\.deb\fR, to include package metadata in each executable\. It simplifies the process of identifying the corresponding package for a given executable or core file\.
 .IP
 An argument to this option is treated as percent\-encoded and decoded before being inserted into the section, allowing you to avoid the use of the comma (\fB,\fR) character in the argument\. This is useful because the compiler replaces all occurrences of commas in \fB\-Wl,\fR with spaces before forwarding them to the linker\. Note that \fBmold\fR always interprets the argument as percent\-encoded, so you also need to escape all occurrences of \fB%\fR as \fB%25\fR\.

docs/mold.md

@@ -617,7 +617,7 @@ but as `-o magic`.
 * `--noinhibit-exec`:
   Create an output file even if errors occur.
 
-* `--package-metadata`==_percent-encoded-string_:
+* `--package-metadata`=_percent-encoded-string_:
   Embed a specified string into the `.note.package` section. This option
   is designed for build scripts that generate binary packages, such as
   `.rpm` or `.deb`, to include package metadata in each executable. It

install-build-deps.sh

@@ -10,11 +10,13 @@ set -x
 case "$ID" in
 ubuntu | pop | linuxmint | debian | raspbian | neon)
   apt-get update
-  apt-get install -y cmake gcc g++
-  if [ "$ID-$VERSION_ID" = ubuntu-20.04 ]; then apt-get install -y g++-10; fi
+  apt-get install -y cmake gcc g++ clang gdb
   ;;
-fedora | amzn | rhel)
-  dnf install -y gcc-g++ cmake glibc-static libstdc++-static diffutils util-linux
+fedora | amzn | rhel | centos)
+  dnf install -y gcc-g++ cmake glibc-static libstdc++-static diffutils util-linux tar
+  ;;
+rocky)
+  dnf install -y gcc-g++ cmake diffutils util-linux
   ;;
 opensuse-*)
   zypper install -y make cmake gcc-c++ glibc-devel-static tar diffutils util-linux

install-cross-tools.sh

@@ -11,7 +11,7 @@ set -x
 
 case "$ID" in
 ubuntu | pop | linuxmint | debian | raspbian)
-  apt-get install -y qemu-user {gcc,g++}-{i686,aarch64,riscv64,powerpc,powerpc64,powerpc64le,s390x,sparc64,m68k,sh4}-linux-gnu {gcc,g++}-arm-linux-gnueabihf
+  apt-get install -y qemu-user {gcc,g++}-{i686,aarch64,riscv64,powerpc,powerpc64,powerpc64le,s390x,sparc64,m68k,sh4,arc}-linux-gnu {gcc,g++}-arm-linux-gnueabihf
   ;;
 *)
   echo "Error: don't know anything about build dependencies on $ID-$VERSION_ID"

lib/common.h

@@ -60,6 +60,7 @@ public:
 
 namespace mold {
 
+namespace ranges = std::ranges;
 using namespace std::literals::string_literals;
 using namespace std::literals::string_view_literals;
 
@@ -372,12 +373,16 @@ inline u64 bits(u64 val, u64 hi, u64 lo) {
   return (val >> lo) & ((1LL << (hi - lo + 1)) - 1);
 }
 
-// Cast val to a signed N bit integer. I.e., int_cast(x, 32) == (i32)x
-// for any integer x.
-inline i64 int_cast(u64 val, i64 n) {
+// Cast val to a signed N bit integer.
+// For example, sign_extend(x, 32) == (i32)x for any integer x.
+inline i64 sign_extend(u64 val, i64 n) {
   return (i64)(val << (64 - n)) >> (64 - n);
 }
 
+inline bool is_int(u64 val, i64 n) {
+  return sign_extend(val, n) == val;
+}
+
 template <typename T, typename Compare = std::less<T>>
 void update_minimum(std::atomic<T> &atomic, u64 new_val, Compare cmp = {}) {
   T old_val = atomic.load(std::memory_order_relaxed);
@@ -412,14 +417,6 @@ inline std::vector<T> flatten(std::vector<std::vector<T>> &vec) {
   return ret;
 }
 
-inline void sort(auto &vec) {
-  std::stable_sort(vec.begin(), vec.end());
-}
-
-inline void sort(auto &vec, auto less) {
-  std::stable_sort(vec.begin(), vec.end(), less);
-}
-
 template <typename T>
 inline void remove_duplicates(std::vector<T> &vec) {
   vec.erase(std::unique(vec.begin(), vec.end()), vec.end());
@@ -486,6 +483,23 @@ inline u64 read_uleb(u8 *buf) {
   return read_uleb(&tmp);
 }
 
+inline i64 read_sleb(u8 **buf) {
+  u64 val = 0;
+  u8 shift = 0;
+  u8 byte;
+  do {
+    byte = *(*buf)++;
+    val |= (byte & 0x7f) << shift;
+    shift += 7;
+  } while (byte & 0x80);
+  return sign_extend(val, shift);
+}
+
+inline i64 read_sleb(u8 *buf) {
+  u8 *tmp = buf;
+  return read_sleb(&tmp);
+}
+
 inline u64 read_uleb(std::string_view *str) {
   u8 *start = (u8 *)str->data();
   u8 *ptr = start;

lib/crc32.cc

@@ -48,7 +48,7 @@ u32 compute_crc32(u32 crc, u8 *buf, i64 len) {
     len -= sz;
   }
 
-  tbb::parallel_for_each(shards.begin(), shards.end(), [](Shard &shard) {
+  tbb::parallel_for_each(shards, [](Shard &shard) {
     shard.crc = crc32(0, shard.buf, shard.len);
   });
 

lib/gentoo-test.sh

@@ -31,7 +31,7 @@ RUN echo 'USE="X ssl elogind -systemd corefonts truetype jpeg jpeg2k tiff zstd s
     echo 'ACCEPT_LICENSE="* -@EULA"' >> /etc/portage/make.conf && \
     echo 'FEATURES="\${FEATURE} noclean nostrip ccache -ipc-sandbox -network-sandbox -pid-sandbox -sandbox"' >> /etc/portage/make.conf && \
     echo 'CCACHE_DIR="/ccache"' >> /etc/portage/make.conf && \
-    emerge gdb lld llvm-core/clang vim emacs strace ccache xeyes dev-build/cmake dev-vcs/git && \
+    FEATURES='getbinpkg binpkg-request-signature' emerge gdb lld llvm-core/clang vim emacs strace ccache xeyes dev-build/cmake dev-vcs/git && \
     rm -rf /var/tmp/portage
 EOF
   set +e

lib/perf.cc

@@ -17,9 +17,7 @@ i64 Counter::get_value() {
 }
 
 void Counter::print() {
-  sort(instances, [](Counter *a, Counter *b) {
-    return a->get_value() > b->get_value();
-  });
+  ranges::stable_sort(instances, {}, [](Counter *x) { return x->get_value(); });
 
   for (Counter *c : instances)
     std::cout << std::setw(20) << std::right << c->name
@@ -80,9 +78,7 @@ static void print_rec(TimerRecord &rec, i64 indent) {
          std::string(indent * 2, ' ').c_str(),
          rec.name.c_str());
 
-  sort(rec.children, [](TimerRecord *a, TimerRecord *b) {
-    return a->start < b->start;
-  });
+  ranges::stable_sort(rec.children, {}, &TimerRecord::start);
 
   for (TimerRecord *child : rec.children)
     print_rec(*child, indent + 1);

src/arch-arc.cc

@@ -0,0 +1,285 @@
+// r31 is blink. r30 is I believe a scratch register.
+//
+// Programs might use one of several branch, jump, and link instructions
+// to control execution flow through direct and indirect function calls
+// and branching. For function calling, the conditional branch-and-link
+// instruction has a maximum branch range of ±1 MiB, and the target
+// address is 32-bit-aligned. The unconditional branch-and-link format has
+// a maximum branch range of ±16 MiB.
+//
+// https://github.com/foss-for-synopsys-dwc-arc-processors/arc-ABI-manual/blob/master/ARCv2_ABI.pdf
+
+#include "mold.h"
+
+namespace mold {
+
+using E = ARC;
+
+// An integer-like class for the mixed-endian encoding
+class M32 {
+public:
+  operator u32() const {
+    return (buf[1] << 24) | (buf[0] << 16) | (buf[3] << 8) | buf[2];
+  }
+
+  M32 &operator=(u32 x) {
+    buf[0] = x >> 16;
+    buf[1] = x >> 24;
+    buf[2] = x;
+    buf[3] = x >> 8;
+    return *this;
+  }
+
+  M32 &operator&=(u32 x) { return *this = *this & x; }
+  M32 &operator|=(u32 x) { return *this = *this | x; }
+  u8 buf[4];
+};
+
+static void write_disp7u(u8 *loc, u32 val) {
+  *(ul16 *)loc |= (bits(val, 6, 3) << 4) | bits(val, 2, 0);
+}
+
+static void write_disp9(u8 *loc, u32 val) {
+  *(M32 *)loc |= bits(val, 8, 0);
+}
+
+static void write_disp9ls(u8 *loc, u32 val) {
+  *(M32 *)loc |= (bits(val, 7, 0) << 16) | (bit(val, 8) << 15);
+}
+
+static void write_disp9s(u8 *loc, u32 val) {
+  *(ul16 *)loc |= bits(val, 8, 0);
+}
+
+static void write_disp10u(u8 *loc, u32 val) {
+  *(ul16 *)loc |= bits(val, 9, 0);
+}
+
+static void write_disp13s(u8 *loc, u32 val) {
+  *(ul16 *)loc |= bits(val, 12, 0);
+}
+
+static void write_disp21h(u8 *loc, u32 val) {
+  *(M32 *)loc |= (bits(val, 10, 1) << 17) | (bits(val, 20, 11) << 6);
+}
+
+static void write_disp21w(u8 *loc, u32 val) {
+  *(M32 *)loc |= (bits(val, 10, 2) << 18) | (bits(val, 20, 11) << 6);
+}
+
+static void write_disp25h(u8 *loc, u32 val) {
+  *(M32 *)loc |= (bits(val, 10, 1) << 17) | (bits(val, 20, 11) << 6) |
+                  bits(val, 24, 21);
+}
+
+static void write_disp25w(u8 *loc, u32 val) {
+  *(M32 *)loc |= (bits(val, 10, 2) << 18) | (bits(val, 20, 11) << 6) |
+                  bits(val, 24, 21);
+}
+
+static void write_disps9(u8 *loc, u32 val) {
+  *(ul16 *)loc |= bits(val, 10, 2);
+}
+
+static void write_disps12(u8 *loc, u32 val) {
+  *(M32 *)loc |= (bits(val, 5, 0) << 6) | bits(val, 11, 6);
+}
+
+template <>
+void write_plt_header(Context<E> &ctx, u8 *buf) {
+  static const ul16 insn[] = {
+    0x2730, 0x7f8b, 0, 0, // ld r11, [pcl,0]
+    0x2730, 0x7f8a, 0, 0, // ld r10, [pcl,0]
+    0x2020, 0x0280,       // j       [r10]
+    0, 0,                 // (address of GOTPLT)
+  };
+
+  memcpy(buf, insn, sizeof(insn));
+  *(M32 *)(buf + 4) = ctx.gotplt->shdr.sh_addr - ctx.plt->shdr.sh_addr + 4;
+  *(M32 *)(buf + 12) = ctx.gotplt->shdr.sh_addr - ctx.plt->shdr.sh_addr;
+  *(M32 *)(buf + 20) = ctx.gotplt->shdr.sh_addr;
+}
+
+template <>
+void write_plt_entry(Context<E> &ctx, u8 *buf, Symbol<E> &sym) {
+  static const ul16 insn[] = {
+    0x2730, 0x7f8c, 0, 0, // ld  r12, [pcl,0]
+    0x2021, 0x0300,       // j.d [r12]
+    0x240a, 0x1fc0,       // mov r12,pcl
+  };
+
+  memcpy(buf, insn, sizeof(insn));
+  *(M32 *)(buf + 4) = sym.get_gotplt_addr(ctx) - sym.get_plt_addr(ctx);
+}
+
+template <>
+void write_pltgot_entry(Context<E> &ctx, u8 *buf, Symbol<E> &sym) {
+  static const ul16 insn[] = {
+    0x2730, 0x7f8c, 0, 0, // ld  r12, [pcl,0]
+    0x2021, 0x0300,       // j.d [r12]
+    0x240a, 0x1fc0,       // mov r12,pcl
+  };
+
+  memcpy(buf, insn, sizeof(insn));
+  *(M32 *)(buf + 4) = sym.get_got_pltgot_addr(ctx) - sym.get_plt_addr(ctx);
+}
+
+template <>
+void EhFrameSection<E>::apply_eh_reloc(Context<E> &ctx, const ElfRel<E> &rel,
+                                       u64 offset, u64 val) {
+  u8 *loc = ctx.buf + this->shdr.sh_offset + offset;
+
+  switch (rel.r_type) {
+  case R_NONE:
+    break;
+  case R_ARC_32:
+    *(ul32 *)loc = val;
+    break;
+  case R_ARC_32_PCREL:
+    *(ul32 *)loc = val - this->shdr.sh_addr - offset;
+    break;
+  default:
+    Fatal(ctx) << "unsupported relocation in .eh_frame: " << rel;
+  }
+}
+
+template <>
+void InputSection<E>::apply_reloc_alloc(Context<E> &ctx, u8 *base) {
+  std::span<const ElfRel<E>> rels = get_rels(ctx);
+
+  for (i64 i = 0; i < rels.size(); i++) {
+    const ElfRel<E> &rel = rels[i];
+    if (rel.r_type == R_NONE)
+      continue;
+
+    Symbol<E> &sym = *file.symbols[rel.r_sym];
+    u8 *loc = base + rel.r_offset;
+
+    u64 S = sym.get_addr(ctx);
+    u64 A = rel.r_addend;
+    u64 P = get_addr() + rel.r_offset;
+    u64 G = sym.get_got_idx(ctx) * sizeof(Word<E>);
+    u64 GOT = ctx.got->shdr.sh_addr;
+
+    switch (rel.r_type) {
+    case R_ARC_32:
+      *(ul32 *)loc = S + A;
+      break;
+    case R_ARC_32_ME:
+      *(M32 *)loc = S + A;
+      break;
+    case R_ARC_S25H_PCREL:
+    case R_ARC_S25H_PCREL_PLT:
+      write_disp25h(loc, align_to(S + A - P, 2));
+      break;
+    case R_ARC_S25W_PCREL:
+    case R_ARC_S25W_PCREL_PLT:
+      write_disp25w(loc, align_to(S + A - P, 4));
+      break;
+    case R_ARC_PC32:
+      *(M32 *)loc = S + A - P;
+      break;
+    case R_ARC_32_PCREL:
+      *(ul32 *)loc = S + A - P;
+      break;
+    case R_ARC_GOTPC32:
+      *(M32 *)loc = GOT + G + A - P;
+      break;
+    case R_ARC_TLS_LE_32:
+      *(M32 *)loc = S + A - ctx.tp_addr;
+      break;
+    case R_ARC_TLS_IE_GOT:
+      *(M32 *)loc = sym.get_gottp_addr(ctx) + A - P;
+      break;
+    default:
+      unreachable();
+    }
+  }
+}
+
+template <>
+void InputSection<E>::apply_reloc_nonalloc(Context<E> &ctx, u8 *base) {
+  std::span<const ElfRel<E>> rels = get_rels(ctx);
+
+  for (i64 i = 0; i < rels.size(); i++) {
+    const ElfRel<E> &rel = rels[i];
+    if (rel.r_type == R_NONE || record_undef_error(ctx, rel))
+      continue;
+
+    Symbol<E> &sym = *file.symbols[rel.r_sym];
+    u8 *loc = base + rel.r_offset;
+
+    SectionFragment<E> *frag;
+    i64 frag_addend;
+    std::tie(frag, frag_addend) = get_fragment(ctx, rel);
+
+    u64 S = frag ? frag->get_addr(ctx) : sym.get_addr(ctx);
+    u64 A = frag ? frag_addend : (i64)rel.r_addend;
+
+    switch (rel.r_type) {
+    case R_ARC_32:
+      if (std::optional<u64> val = get_tombstone(sym, frag))
+        *(ul32 *)loc = *val;
+      else
+        *(ul32 *)loc = S + A;
+      break;
+    default:
+      Fatal(ctx) << *this << ": invalid relocation for non-allocated sections: "
+                 << rel;
+    }
+  }
+}
+
+template <>
+void InputSection<E>::scan_relocations(Context<E> &ctx) {
+  assert(shdr().sh_flags & SHF_ALLOC);
+  std::span<const ElfRel<E>> rels = get_rels(ctx);
+
+  for (i64 i = 0; i < rels.size(); i++) {
+    const ElfRel<E> &rel = rels[i];
+    if (rel.r_type == R_NONE || record_undef_error(ctx, rel))
+      continue;
+
+    Symbol<E> &sym = *file.symbols[rel.r_sym];
+
+    if (sym.is_ifunc())
+      Error(ctx) << sym << ": GNU ifunc symbol is not supported on m68k";
+
+    switch (rel.r_type) {
+    case R_ARC_32:
+      break;
+    case R_ARC_32_ME:
+      scan_absrel(ctx, sym, rel);
+      break;
+    case R_ARC_S25H_PCREL:
+    case R_ARC_S25W_PCREL:
+    case R_ARC_32_PCREL:
+    case R_ARC_PC32:
+      scan_pcrel(ctx, sym, rel);
+      break;
+    case R_ARC_S25H_PCREL_PLT:
+    case R_ARC_S25W_PCREL_PLT:
+      if (sym.is_imported)
+        sym.flags |= NEEDS_PLT;
+      break;
+    case R_ARC_GOTPC32:
+      sym.flags |= NEEDS_GOT;
+      break;
+    case R_ARC_TLS_LE_32:
+      check_tlsle(ctx, sym, rel);
+      break;
+    case R_ARC_TLS_IE_GOT:
+      sym.flags |= NEEDS_GOTTP;
+      break;
+    default:
+      Error(ctx) << *this << ": unknown relocation: " << rel;
+    }
+  }
+}
+
+template <>
+u64 get_eflags(Context<E> &ctx) {
+  return 0x406;
+}
+
+} // namespace mold

src/arch-arm32.cc

@@ -41,6 +41,9 @@ using E = ARM32;
 
 template <>
 i64 get_addend(u8 *loc, const ElfRel<E> &rel) {
+  ul32 *arm = (ul32 *)loc;
+  ul16 *thm = (ul16 *)loc;
+
   switch (rel.r_type) {
   case R_ARM_ABS32:
   case R_ARM_REL32:
@@ -54,77 +57,104 @@ i64 get_addend(u8 *loc, const ElfRel<E> &rel) {
   case R_ARM_TLS_IE32:
   case R_ARM_TLS_LE32:
   case R_ARM_TLS_GOTDESC:
+  case R_ARM_TARGET1:
   case R_ARM_TARGET2:
-    return *(il32 *)loc;
+    return (il32)*arm;
+  case R_ARM_THM_JUMP8:
+    return sign_extend(thm[0], 8) << 1;
   case R_ARM_THM_JUMP11:
-    return int_cast(*(ul16 *)loc, 11) << 1;
+    return sign_extend(thm[0], 11) << 1;
+  case R_ARM_THM_JUMP19: {
+    // https://developer.arm.com/documentation/ddi0597/2024-12/Base-Instructions/B--Branch-
+    u32 S = bit(thm[0], 10);
+    u32 J2 = bit(thm[1], 11);
+    u32 J1 = bit(thm[1], 13);
+    u32 imm6 = bits(thm[0], 5, 0);
+    u32 imm11 = bits(thm[1], 10, 0);
+    u32 val = (S << 20) | (J2 << 19) | (J1 << 18) | (imm6 << 12) | (imm11 << 1);
+    return sign_extend(val, 21);
+  }
   case R_ARM_THM_CALL:
   case R_ARM_THM_JUMP24:
   case R_ARM_THM_TLS_CALL: {
-    u32 S = bit(*(ul16 *)loc, 10);
-    u32 J1 = bit(*(ul16 *)(loc + 2), 13);
-    u32 J2 = bit(*(ul16 *)(loc + 2), 11);
+    // https://developer.arm.com/documentation/ddi0597/2024-12/Base-Instructions/BL--BLX--immediate---Branch-with-Link-and-optional-Exchange--immediate--
+    u32 S = bit(thm[0], 10);
+    u32 J1 = bit(thm[1], 13);
+    u32 J2 = bit(thm[1], 11);
     u32 I1 = !(J1 ^ S);
     u32 I2 = !(J2 ^ S);
-    u32 imm10 = bits(*(ul16 *)loc, 9, 0);
-    u32 imm11 = bits(*(ul16 *)(loc + 2), 10, 0);
+    u32 imm10 = bits(thm[0], 9, 0);
+    u32 imm11 = bits(thm[1], 10, 0);
     u32 val = (S << 24) | (I1 << 23) | (I2 << 22) | (imm10 << 12) | (imm11 << 1);
-    return int_cast(val, 25);
+    return sign_extend(val, 25);
   }
   case R_ARM_CALL:
   case R_ARM_JUMP24:
   case R_ARM_PLT32:
   case R_ARM_TLS_CALL:
-    return int_cast(*(ul32 *)loc, 24) << 2;
+    return sign_extend(*arm, 24) << 2;
   case R_ARM_MOVW_PREL_NC:
   case R_ARM_MOVW_ABS_NC:
   case R_ARM_MOVT_PREL:
   case R_ARM_MOVT_ABS: {
-    u32 imm12 = bits(*(ul32 *)loc, 11, 0);
-    u32 imm4 = bits(*(ul32 *)loc, 19, 16);
-    return int_cast((imm4 << 12) | imm12, 16);
+    // https://developer.arm.com/documentation/ddi0597/2024-12/Base-Instructions/MOV--MOVS--immediate---Move--immediate--
+    u32 imm4 = bits(*arm, 19, 16);
+    u32 imm12 = bits(*arm, 11, 0);
+    u32 val = (imm4 << 12) | imm12;
+    return sign_extend(val, 16);
   }
   case R_ARM_PREL31:
-    return int_cast(*(ul32 *)loc, 31);
+    return sign_extend(*arm, 31);
   case R_ARM_THM_MOVW_PREL_NC:
   case R_ARM_THM_MOVW_ABS_NC:
   case R_ARM_THM_MOVT_PREL:
   case R_ARM_THM_MOVT_ABS: {
-    u32 imm4 = bits(*(ul16 *)loc, 3, 0);
-    u32 i = bit(*(ul16 *)loc, 10);
-    u32 imm3 = bits(*(ul16 *)(loc + 2), 14, 12);
-    u32 imm8 = bits(*(ul16 *)(loc + 2), 7, 0);
+    // https://developer.arm.com/documentation/ddi0597/2024-12/Base-Instructions/MOVT--Move-Top-
+    u32 imm4 = bits(thm[0], 3, 0);
+    u32 i = bit(thm[0], 10);
+    u32 imm3 = bits(thm[1], 14, 12);
+    u32 imm8 = bits(thm[1], 7, 0);
     u32 val = (imm4 << 12) | (i << 11) | (imm3 << 8) | imm8;
-    return int_cast(val, 16);
+    return sign_extend(val, 16);
   }
   default:
     return 0;
   }
 }
 
-static void write_mov_imm(u8 *loc, u32 val) {
+static void write_arm_mov(u8 *loc, u32 val) {
   u32 imm12 = bits(val, 11, 0);
   u32 imm4 = bits(val, 15, 12);
-  *(ul32 *)loc = (*(ul32 *)loc & 0xfff0f000) | (imm4 << 16) | imm12;
+  *(ul32 *)loc = (*(ul32 *)loc & 0xfff0'f000) | (imm4 << 16) | imm12;
 }
 
-static void write_thm_b_imm(u8 *loc, u32 val) {
-  // https://developer.arm.com/documentation/ddi0406/cb/Application-Level-Architecture/Instruction-Details/Alphabetical-list-of-instructions/BL--BLX--immediate-
-  u32 sign = bit(val, 24);
+static void write_thm_b21(u8 *loc, u32 val) {
+  u32 S = bit(val, 20);
+  u32 J2 = bit(val, 19);
+  u32 J1 = bit(val, 18);
+  u32 imm6 = bits(val, 17, 12);
+  u32 imm11 = bits(val, 11, 1);
+
+  ul16 *buf = (ul16 *)loc;
+  buf[0] = (buf[0] & 0b1111'1011'1100'0000) | (S << 10) | imm6;
+  buf[1] = (buf[1] & 0b1101'0000'0000'0000) | (J1 << 13) | (J2 << 11) | imm11;
+}
+
+static void write_thm_b25(u8 *loc, u32 val) {
+  u32 S = bit(val, 24);
   u32 I1 = bit(val, 23);
   u32 I2 = bit(val, 22);
-  u32 J1 = !I1 ^ sign;
-  u32 J2 = !I2 ^ sign;
+  u32 J1 = !I1 ^ S;
+  u32 J2 = !I2 ^ S;
   u32 imm10 = bits(val, 21, 12);
   u32 imm11 = bits(val, 11, 1);
 
   ul16 *buf = (ul16 *)loc;
-  buf[0] = (buf[0] & 0b1111'1000'0000'0000) | (sign << 10) | imm10;
+  buf[0] = (buf[0] & 0b1111'1000'0000'0000) | (S << 10) | imm10;
   buf[1] = (buf[1] & 0b1101'0000'0000'0000) | (J1 << 13) | (J2 << 11) | imm11;
 }
 
-static void write_thm_mov_imm(u8 *loc, u32 val) {
-  // https://developer.arm.com/documentation/ddi0406/cb/Application-Level-Architecture/Instruction-Details/Alphabetical-list-of-instructions/MOVT
+static void write_thm_mov(u8 *loc, u32 val) {
   u32 imm4 = bits(val, 15, 12);
   u32 i = bit(val, 11);
   u32 imm3 = bits(val, 10, 8);
@@ -152,16 +182,20 @@ void write_addend(u8 *loc, i64 val, const ElfRel<E> &rel) {
   case R_ARM_TLS_IE32:
   case R_ARM_TLS_LE32:
   case R_ARM_TLS_GOTDESC:
+  case R_ARM_TARGET1:
   case R_ARM_TARGET2:
     *(ul32 *)loc = val;
     break;
+  case R_ARM_THM_JUMP8:
+    *(ul16 *)loc = (*(ul16 *)loc & 0xff00) | bits(val, 8, 1);
+    break;
   case R_ARM_THM_JUMP11:
     *(ul16 *)loc = (*(ul16 *)loc & 0xf800) | bits(val, 11, 1);
     break;
   case R_ARM_THM_CALL:
   case R_ARM_THM_JUMP24:
   case R_ARM_THM_TLS_CALL:
-    write_thm_b_imm(loc, val);
+    write_thm_b25(loc, val);
     break;
   case R_ARM_CALL:
   case R_ARM_JUMP24:
@@ -172,7 +206,7 @@ void write_addend(u8 *loc, i64 val, const ElfRel<E> &rel) {
   case R_ARM_MOVW_ABS_NC:
   case R_ARM_MOVT_PREL:
   case R_ARM_MOVT_ABS:
-    write_mov_imm(loc, val);
+    write_arm_mov(loc, val);
     break;
   case R_ARM_PREL31:
     *(ul32 *)loc = (*(ul32 *)loc & 0x8000'0000) | (val & 0x7fff'ffff);
@@ -181,7 +215,7 @@ void write_addend(u8 *loc, i64 val, const ElfRel<E> &rel) {
   case R_ARM_THM_MOVW_ABS_NC:
   case R_ARM_THM_MOVT_PREL:
   case R_ARM_THM_MOVT_ABS:
-    write_thm_mov_imm(loc, val);
+    write_thm_mov(loc, val);
     break;
   default:
     unreachable();
@@ -205,7 +239,7 @@ void write_plt_header(Context<E> &ctx, u8 *buf) {
   *(ul32 *)(buf + 16) = ctx.gotplt->shdr.sh_addr - ctx.plt->shdr.sh_addr - 16;
 }
 
-constexpr ul32 plt_entry[] = {
+static constexpr ul32 plt_entry[] = {
   0xe59f'c004, // 1: ldr ip, 2f
   0xe08c'c00f, //    add ip, ip, pc
   0xe59c'f000, //    ldr pc, [ip]
@@ -243,15 +277,12 @@ void EhFrameSection<E>::apply_eh_reloc(Context<E> &ctx, const ElfRel<E> &rel,
   }
 }
 
-static bool is_reachable(i64 disp) {
-  return -branch_distance<E> <= disp && disp < branch_distance<E>;
-}
-
 static Thunk<E> &get_reachable_thunk(OutputSection<E> &osec, u64 addr) {
-  for (std::unique_ptr<Thunk<E>> &thunk : osec.thunks)
-    if (is_reachable(thunk->get_addr() - addr))
-      return *thunk;
-  abort();
+  auto it = std::upper_bound(osec.thunks.begin(), osec.thunks.end(), addr,
+                             [](u64 addr, std::unique_ptr<Thunk<E>> &thunk) {
+    return addr < thunk->get_addr();
+  });
+  return **it;
 }
 
 template <>
@@ -266,13 +297,6 @@ void InputSection<E>::apply_reloc_alloc(Context<E> &ctx, u8 *base) {
     Symbol<E> &sym = *file.symbols[rel.r_sym];
     u8 *loc = base + rel.r_offset;
 
-    auto check = [&](i64 val, i64 lo, i64 hi) {
-      if (val < lo || hi <= val)
-        Error(ctx) << *this << ": relocation " << rel << " against "
-                   << sym << " out of range: " << val << " is not in ["
-                   << lo << ", " << hi << ")";
-    };
-
     u64 S = sym.get_addr(ctx);
     u64 A = get_addend(*this, rel);
     u64 P = get_addr() + rel.r_offset;
@@ -280,6 +304,10 @@ void InputSection<E>::apply_reloc_alloc(Context<E> &ctx, u8 *base) {
     u64 G = sym.get_got_idx(ctx) * sizeof(Word<E>);
     u64 GOT = ctx.got->shdr.sh_addr;
 
+    auto check = [&](i64 val, i64 lo, i64 hi) {
+      check_range(ctx, i, val, lo, hi);
+    };
+
     auto get_thumb_thunk_addr = [&] { return sym.get_thunk_addr(ctx, P); };
     auto get_arm_thunk_addr   = [&] { return sym.get_thunk_addr(ctx, P) + 4; };
 
@@ -289,6 +317,7 @@ void InputSection<E>::apply_reloc_alloc(Context<E> &ctx, u8 *base) {
 
     switch (rel.r_type) {
     case R_ARM_ABS32:
+    case R_ARM_TARGET1:
       break;
     case R_ARM_REL32:
       *(ul32 *)loc = S + A - P;
@@ -301,21 +330,21 @@ void InputSection<E>::apply_reloc_alloc(Context<E> &ctx, u8 *base) {
         break;
       }
 
-      // THM_CALL relocation refers either BL or BLX instruction.
+      // THM_CALL relocation refers to either BL or BLX instruction.
       // They are different in only one bit. We need to use BL if
       // the jump target is Thumb. Otherwise, use BLX.
-      i64 val = S + A - P;
-      if (is_reachable(val)) {
-        if (T) {
-          write_thm_b_imm(loc, val);
-          *(ul16 *)(loc + 2) |= 0x1000;  // rewrite to BL
-        } else {
-          write_thm_b_imm(loc, align_to(val, 4));
-          *(ul16 *)(loc + 2) &= ~0x1000; // rewrite to BLX
-        }
+      i64 val1 = S + A - P;
+      i64 val2 = align_to(S + A - P, 4);
+
+      if (T && is_int(val1, 25)) {
+        *(ul16 *)(loc + 2) |= 0x1000;  // BL
+        write_thm_b25(loc, val1);
+      } else if (!T && is_int(val2, 25)) {
+        *(ul16 *)(loc + 2) &= ~0x1000; // BLX
+        write_thm_b25(loc, val2);
       } else {
-        write_thm_b_imm(loc, align_to(get_arm_thunk_addr() + A - P, 4));
-        *(ul16 *)(loc + 2) &= ~0x1000;  // rewrite to BLX
+        *(ul16 *)(loc + 2) |= 0x1000;  // BL
+        write_thm_b25(loc, get_thumb_thunk_addr() + A - P);
       }
       break;
     }
@@ -346,7 +375,7 @@ void InputSection<E>::apply_reloc_alloc(Context<E> &ctx, u8 *base) {
         Fatal(ctx) << *this << ": R_ARM_CALL refers to neither BL nor BLX";
 
       i64 val = S + A - P;
-      if (is_reachable(val)) {
+      if (is_int(val, 26)) {
         if (T) {
           *(ul32 *)loc = 0xfa00'0000; // BLX
           *(ul32 *)loc |= (bit(val, 1) << 24) | bits(val, 25, 2);
@@ -373,7 +402,7 @@ void InputSection<E>::apply_reloc_alloc(Context<E> &ctx, u8 *base) {
       // required, we jump to a linker-synthesized thunk which does the
       // job with a longer code sequence.
       i64 val = S + A - P;
-      if (!is_reachable(val) || T)
+      if (T || !is_int(val, 26))
         val = get_arm_thunk_addr() + A - P;
       *(ul32 *)loc = (*(ul32 *)loc & 0xff00'0000) | bits(val, 25, 2);
       break;
@@ -386,30 +415,20 @@ void InputSection<E>::apply_reloc_alloc(Context<E> &ctx, u8 *base) {
         *(ul32 *)loc = (*(ul32 *)loc & 0xff00'0000) | bits(val, 25, 2);
       }
       break;
+    case R_ARM_THM_JUMP8:
+      check(S + A - P, -(1 << 8), 1 << 8);
+      *(ul16 *)loc &= 0xff00;
+      *(ul16 *)loc |= bits(S + A - P, 8, 1);
+      break;
     case R_ARM_THM_JUMP11:
-      assert(T);
       check(S + A - P, -(1 << 11), 1 << 11);
       *(ul16 *)loc &= 0xf800;
       *(ul16 *)loc |= bits(S + A - P, 11, 1);
       break;
-    case R_ARM_THM_JUMP19: {
-      i64 val = S + A - P;
-      check(val, -(1 << 19), 1 << 19);
-
-      // sign:J2:J1:imm6:imm11:'0'
-      u32 sign = bit(val, 20);
-      u32 J2 = bit(val, 19);
-      u32 J1 = bit(val, 18);
-      u32 imm6 = bits(val, 17, 12);
-      u32 imm11 = bits(val, 11, 1);
-
-      *(ul16 *)loc &= 0b1111'1011'1100'0000;
-      *(ul16 *)loc |= (sign << 10) | imm6;
-
-      *(ul16 *)(loc + 2) &= 0b1101'0000'0000'0000;
-      *(ul16 *)(loc + 2) |= (J2 << 13) | (J1 << 11) | imm11;
+    case R_ARM_THM_JUMP19:
+      check(S + A - P, -(1 << 20), 1 << 20);
+      write_thm_b21(loc, S + A - P);
       break;
-    }
     case R_ARM_THM_JUMP24: {
       if (sym.is_remaining_undef_weak()) {
         *(ul32 *)loc = 0x8000'f3af; // NOP
@@ -419,19 +438,19 @@ void InputSection<E>::apply_reloc_alloc(Context<E> &ctx, u8 *base) {
       // Just like R_ARM_JUMP24, we need to jump to a thunk if we need to
       // switch processor mode.
       i64 val = S + A - P;
-      if (!is_reachable(val) || !T)
+      if (!T || !is_int(val, 25))
         val = get_thumb_thunk_addr() + A - P;
-      write_thm_b_imm(loc, val);
+      write_thm_b25(loc, val);
       break;
     }
     case R_ARM_MOVW_PREL_NC:
-      write_mov_imm(loc, ((S + A) | T) - P);
+      write_arm_mov(loc, ((S + A) | T) - P);
       break;
     case R_ARM_MOVW_ABS_NC:
-      write_mov_imm(loc, (S + A) | T);
+      write_arm_mov(loc, (S + A) | T);
       break;
     case R_ARM_THM_MOVW_PREL_NC:
-      write_thm_mov_imm(loc, ((S + A) | T) - P);
+      write_thm_mov(loc, ((S + A) | T) - P);
       break;
     case R_ARM_PREL31:
       check(S + A - P, -(1LL << 30), 1LL << 30);
@@ -439,19 +458,19 @@ void InputSection<E>::apply_reloc_alloc(Context<E> &ctx, u8 *base) {
       *(ul32 *)loc |= (S + A - P) & 0x7fff'ffff;
       break;
     case R_ARM_THM_MOVW_ABS_NC:
-      write_thm_mov_imm(loc, (S + A) | T);
+      write_thm_mov(loc, (S + A) | T);
       break;
     case R_ARM_MOVT_PREL:
-      write_mov_imm(loc, (S + A - P) >> 16);
+      write_arm_mov(loc, (S + A - P) >> 16);
       break;
     case R_ARM_THM_MOVT_PREL:
-      write_thm_mov_imm(loc, (S + A - P) >> 16);
+      write_thm_mov(loc, (S + A - P) >> 16);
       break;
     case R_ARM_MOVT_ABS:
-      write_mov_imm(loc, (S + A) >> 16);
+      write_arm_mov(loc, (S + A) >> 16);
       break;
     case R_ARM_THM_MOVT_ABS:
-      write_thm_mov_imm(loc, (S + A) >> 16);
+      write_thm_mov(loc, (S + A) >> 16);
       break;
     case R_ARM_TLS_GD32:
       *(ul32 *)loc = sym.get_tlsgd_addr(ctx) + A - P;
@@ -515,7 +534,7 @@ void InputSection<E>::apply_reloc_alloc(Context<E> &ctx, u8 *base) {
     case R_ARM_THM_TLS_CALL:
       if (sym.has_tlsdesc(ctx)) {
         u64 val = align_to(get_tlsdesc_trampoline_addr() - P - 4, 4);
-        write_thm_b_imm(loc, val);
+        write_thm_b25(loc, val);
         *(ul16 *)(loc + 2) &= ~0x1000; // rewrite BL with BLX
       } else if (sym.has_gottp(ctx)) {
         // Since `ldr r0, [pc, r0]` is not representable in Thumb,
@@ -628,11 +647,13 @@ void InputSection<E>::scan_relocations(Context<E> &ctx) {
       check_tlsle(ctx, sym, rel);
       break;
     case R_ARM_ABS32:
+    case R_ARM_TARGET1:
     case R_ARM_MOVT_ABS:
     case R_ARM_THM_MOVT_ABS:
     case R_ARM_REL32:
     case R_ARM_BASE_PREL:
     case R_ARM_GOTOFF32:
+    case R_ARM_THM_JUMP8:
     case R_ARM_THM_JUMP11:
     case R_ARM_THM_JUMP19:
     case R_ARM_MOVW_PREL_NC:
@@ -661,7 +682,7 @@ void Thunk<E>::copy_buf(Context<E> &ctx) {
 
   // This is a range extension and mode switch thunk.
   // It has two entry points: +0 for Thumb and +4 for ARM.
-  static const u8 entry[] = {
+  constexpr u8 entry[] = {
     // .thumb
     0x78, 0x47,             //    bx   pc  # jumps to 1f
     0xc0, 0x46,             //    nop
@@ -713,7 +734,7 @@ void create_arm_exidx_section(Context<E> &ctx) {
 
 void Arm32ExidxSection::compute_section_size(Context<E> &ctx) {
   output_section.compute_section_size(ctx);
-  this->shdr.sh_size = output_section.shdr.sh_size;
+  this->shdr.sh_size = output_section.shdr.sh_size + 8; // +8 for sentinel
 }
 
 void Arm32ExidxSection::update_shdr(Context<E> &ctx) {
@@ -733,6 +754,15 @@ void Arm32ExidxSection::copy_buf(Context<E> &ctx) {
   write_vector(ctx.buf + this->shdr.sh_offset, contents);
 }
 
+// Returns the end of the text segment
+static u64 get_text_end(Context<E> &ctx) {
+  u64 ret = 0;
+  for (Chunk<E> *chunk : ctx.chunks)
+    if (chunk->shdr.sh_flags & SHF_EXECINSTR)
+      ret = std::max<u64>(ret, chunk->shdr.sh_addr + chunk->shdr.sh_size);
+  return ret;
+}
+
 // ARM executables use an .ARM.exidx section to look up an exception
 // handling record for the current instruction pointer. The table needs
 // to be sorted by their addresses.
@@ -743,11 +773,6 @@ void Arm32ExidxSection::copy_buf(Context<E> &ctx) {
 //
 // This function returns contents of .ARM.exidx.
 std::vector<u8> Arm32ExidxSection::get_contents(Context<E> &ctx) {
-  std::vector<u8> buf(output_section.shdr.sh_size);
-
-  output_section.shdr.sh_addr = this->shdr.sh_addr;
-  output_section.write_to(ctx, buf.data());
-
   // .ARM.exidx records consists of a signed 31-bit relative address
   // and a 32-bit value. The relative address indicates the start
   // address of a function that the record covers. The value is one of
@@ -767,11 +792,19 @@ std::vector<u8> Arm32ExidxSection::get_contents(Context<E> &ctx) {
     ul32 val;
   };
 
-  if (buf.size() % sizeof(Entry))
-    Fatal(ctx) << "invalid .ARM.exidx section size";
-
+  // We reserve one extra slot for the sentinel
+  i64 num_entries = output_section.shdr.sh_size / sizeof(Entry) + 1;
+  std::vector<u8> buf(num_entries * sizeof(Entry));
   Entry *ent = (Entry *)buf.data();
-  i64 num_entries = buf.size() / sizeof(Entry);
+
+  // Write section contents to the buffer
+  output_section.shdr.sh_addr = this->shdr.sh_addr;
+  output_section.write_to(ctx, buf.data());
+
+  // Fill in sentinel fields
+  u64 sentinel_addr = this->shdr.sh_addr + sizeof(Entry) * (num_entries - 1);
+  ent[num_entries - 1].addr = get_text_end(ctx) - sentinel_addr;
+  ent[num_entries - 1].val = CANTUNWIND;
 
   // Entry's addresses are relative to themselves. In order to sort
   // records by address, we first translate them so that the addresses
@@ -782,7 +815,7 @@ std::vector<u8> Arm32ExidxSection::get_contents(Context<E> &ctx) {
 
   tbb::parallel_for((i64)0, num_entries, [&](i64 i) {
     i64 offset = sizeof(Entry) * i;
-    ent[i].addr = int_cast(ent[i].addr, 31) + offset;
+    ent[i].addr = sign_extend(ent[i].addr, 31) + offset;
     if (is_relative(ent[i].val))
       ent[i].val = 0x7fff'ffff & (ent[i].val + offset);
   });

src/arch-arm64.cc

@@ -155,19 +155,16 @@ void InputSection<E>::apply_reloc_alloc(Context<E> &ctx, u8 *base) {
     Symbol<E> &sym = *file.symbols[rel.r_sym];
     u8 *loc = base + rel.r_offset;
 
-    auto check = [&](i64 val, i64 lo, i64 hi) {
-      if (val < lo || hi <= val)
-        Error(ctx) << *this << ": relocation " << rel << " against "
-                   << sym << " out of range: " << val << " is not in ["
-                   << lo << ", " << hi << ")";
-    };
-
     u64 S = sym.get_addr(ctx);
     u64 A = rel.r_addend;
     u64 P = get_addr() + rel.r_offset;
     u64 G = sym.get_got_idx(ctx) * sizeof(Word<E>);
     u64 GOT = ctx.got->shdr.sh_addr;
 
+    auto check = [&](i64 val, i64 lo, i64 hi) {
+      check_range(ctx, i, val, lo, hi);
+    };
+
     switch (rel.r_type) {
     case R_AARCH64_ABS64:
       break;
@@ -238,7 +235,7 @@ void InputSection<E>::apply_reloc_alloc(Context<E> &ctx, u8 *base) {
           i + 1 < rels.size()) {
         i64 val = S + A - P - 4;
         const ElfRel<E> &rel2 = rels[i + 1];
-        if (int_cast(val, 21) == val &&
+        if (is_int(val, 21) &&
             rel2.r_type == R_AARCH64_ADD_ABS_LO12_NC &&
             rel2.r_sym == rel.r_sym &&
             rel2.r_offset == rel.r_offset + 4 &&
@@ -277,7 +274,7 @@ void InputSection<E>::apply_reloc_alloc(Context<E> &ctx, u8 *base) {
       }
 
       i64 val = S + A - P;
-      if (val < -(1 << 27) || (1 << 27) <= val)
+      if (!is_int(val, 28))
         val = sym.get_thunk_addr(ctx, P) + A - P;
       *(ul32 *)loc |= bits(val, 27, 2);
       break;
@@ -292,7 +289,7 @@ void InputSection<E>::apply_reloc_alloc(Context<E> &ctx, u8 *base) {
       *(ul32 *)loc |= bits(S + A - P, 20, 2) << 5;
       break;
     case R_AARCH64_PREL16:
-      check(S + A - P, -(1LL << 15), 1LL << 15);
+      check(S + A - P, -(1LL << 15), 1LL << 16);
       *(U16<E> *)loc = S + A - P;
       break;
     case R_AARCH64_PREL32:
@@ -448,13 +445,6 @@ void InputSection<E>::apply_reloc_nonalloc(Context<E> &ctx, u8 *base) {
     Symbol<E> &sym = *file.symbols[rel.r_sym];
     u8 *loc = base + rel.r_offset;
 
-    auto check = [&](i64 val, i64 lo, i64 hi) {
-      if (val < lo || hi <= val)
-        Error(ctx) << *this << ": relocation " << rel << " against "
-                   << sym << " out of range: " << val << " is not in ["
-                   << lo << ", " << hi << ")";
-    };
-
     SectionFragment<E> *frag;
     i64 frag_addend;
     std::tie(frag, frag_addend) = get_fragment(ctx, rel);
@@ -462,6 +452,10 @@ void InputSection<E>::apply_reloc_nonalloc(Context<E> &ctx, u8 *base) {
     u64 S = frag ? frag->get_addr(ctx) : sym.get_addr(ctx);
     u64 A = frag ? frag_addend : (i64)rel.r_addend;
 
+    auto check = [&](i64 val, i64 lo, i64 hi) {
+      check_range(ctx, val, i, lo, hi);
+    };
+
     switch (rel.r_type) {
     case R_AARCH64_ABS64:
       if (std::optional<u64> val = get_tombstone(sym, frag))
@@ -469,12 +463,10 @@ void InputSection<E>::apply_reloc_nonalloc(Context<E> &ctx, u8 *base) {
       else
         *(U64<E> *)loc = S + A;
       break;
-    case R_AARCH64_ABS32: {
-      i64 val = S + A;
-      check(val, 0, 1LL << 32);
-      *(U32<E> *)loc = val;
+    case R_AARCH64_ABS32:
+      check(S + A, 0, 1LL << 32);
+      *(U32<E> *)loc = S + A;
       break;
-    }
     default:
       Fatal(ctx) << *this << ": invalid relocation for non-allocated sections: "
                  << rel;

src/arch-i386.cc

@@ -108,25 +108,24 @@ template <>
 void write_plt_header(Context<E> &ctx, u8 *buf) {
   if (ctx.arg.pic) {
     static const u8 insn[] = {
-      0xf3, 0x0f, 0x1e, 0xfb, // endbr32
       0x51,                   // push   %ecx
       0x8d, 0x8b, 0, 0, 0, 0, // lea    GOTPLT+4(%ebx), %ecx
       0xff, 0x31,             // push   (%ecx)
       0xff, 0x61, 0x04,       // jmp    *0x4(%ecx)
+      0xcc, 0xcc, 0xcc, 0xcc, // (padding)
     };
     memcpy(buf, insn, sizeof(insn));
-    *(ul32 *)(buf + 7) = ctx.gotplt->shdr.sh_addr - ctx.got->shdr.sh_addr + 4;
+    *(ul32 *)(buf + 3) = ctx.gotplt->shdr.sh_addr - ctx.got->shdr.sh_addr + 4;
   } else {
     static const u8 insn[] = {
-      0xf3, 0x0f, 0x1e, 0xfb, // endbr32
-      0x51,                   // push   %ecx
-      0xb9, 0, 0, 0, 0,       // mov    GOTPLT+4, %ecx
-      0xff, 0x31,             // push   (%ecx)
-      0xff, 0x61, 0x04,       // jmp    *0x4(%ecx)
-      0xcc,                   // (padding)
+      0x51,                         // push   %ecx
+      0xb9, 0, 0, 0, 0,             // mov    GOTPLT+4, %ecx
+      0xff, 0x31,                   // push   (%ecx)
+      0xff, 0x61, 0x04,             // jmp    *0x4(%ecx)
+      0xcc, 0xcc, 0xcc, 0xcc, 0xcc, // (padding)
     };
     memcpy(buf, insn, sizeof(insn));
-    *(ul32 *)(buf + 6) = ctx.gotplt->shdr.sh_addr + 4;
+    *(ul32 *)(buf + 2) = ctx.gotplt->shdr.sh_addr + 4;
   }
 }
 
@@ -134,24 +133,22 @@ template <>
 void write_plt_entry(Context<E> &ctx, u8 *buf, Symbol<E> &sym) {
   if (ctx.arg.pic) {
     static const u8 insn[] = {
-      0xf3, 0x0f, 0x1e, 0xfb, // endbr32
-      0xb9, 0, 0, 0, 0,       // mov $reloc_offset, %ecx
-      0xff, 0xa3, 0, 0, 0, 0, // jmp *foo@GOT(%ebx)
-      0xcc,                   // (padding)
+      0xb9, 0, 0, 0, 0,             // mov $reloc_offset, %ecx
+      0xff, 0xa3, 0, 0, 0, 0,       // jmp *foo@GOT(%ebx)
+      0xcc, 0xcc, 0xcc, 0xcc, 0xcc, // (padding)
     };
     memcpy(buf, insn, sizeof(insn));
-    *(ul32 *)(buf + 5) = sym.get_plt_idx(ctx) * sizeof(ElfRel<E>);
-    *(ul32 *)(buf + 11) = sym.get_gotplt_addr(ctx) - ctx.got->shdr.sh_addr;
+    *(ul32 *)(buf + 1) = sym.get_plt_idx(ctx) * sizeof(ElfRel<E>);
+    *(ul32 *)(buf + 7) = sym.get_gotplt_addr(ctx) - ctx.got->shdr.sh_addr;
   } else {
     static const u8 insn[] = {
-      0xf3, 0x0f, 0x1e, 0xfb, // endbr32
-      0xb9, 0, 0, 0, 0,       // mov $reloc_offset, %ecx
-      0xff, 0x25, 0, 0, 0, 0, // jmp *foo@GOT
-      0xcc,                   // (padding)
+      0xb9, 0, 0, 0, 0,             // mov $reloc_offset, %ecx
+      0xff, 0x25, 0, 0, 0, 0,       // jmp *foo@GOT
+      0xcc, 0xcc, 0xcc, 0xcc, 0xcc, // (padding)
     };
     memcpy(buf, insn, sizeof(insn));
-    *(ul32 *)(buf + 5) = sym.get_plt_idx(ctx) * sizeof(ElfRel<E>);
-    *(ul32 *)(buf + 11) = sym.get_gotplt_addr(ctx);
+    *(ul32 *)(buf + 1) = sym.get_plt_idx(ctx) * sizeof(ElfRel<E>);
+    *(ul32 *)(buf + 7) = sym.get_gotplt_addr(ctx);
   }
 }
 
@@ -159,20 +156,18 @@ template <>
 void write_pltgot_entry(Context<E> &ctx, u8 *buf, Symbol<E> &sym) {
   if (ctx.arg.pic) {
     static const u8 insn[] = {
-      0xf3, 0x0f, 0x1e, 0xfb,             // endbr32
-      0xff, 0xa3, 0, 0, 0, 0,             // jmp *foo@GOT(%ebx)
-      0xcc, 0xcc, 0xcc, 0xcc, 0xcc, 0xcc, // (padding)
+      0xff, 0xa3, 0, 0, 0, 0, // jmp *foo@GOT(%ebx)
+      0xcc, 0xcc,             // (padding)
     };
     memcpy(buf, insn, sizeof(insn));
-    *(ul32 *)(buf + 6) = sym.get_got_pltgot_addr(ctx) - ctx.got->shdr.sh_addr;
+    *(ul32 *)(buf + 2) = sym.get_got_pltgot_addr(ctx) - ctx.got->shdr.sh_addr;
   } else {
     static const u8 insn[] = {
-      0xf3, 0x0f, 0x1e, 0xfb,             // endbr32
-      0xff, 0x25, 0, 0, 0, 0,             // jmp *foo@GOT
-      0xcc, 0xcc, 0xcc, 0xcc, 0xcc, 0xcc, // (padding)
+      0xff, 0x25, 0, 0, 0, 0, // jmp *foo@GOT
+      0xcc, 0xcc,             // (padding)
     };
     memcpy(buf, insn, sizeof(insn));
-    *(ul32 *)(buf + 6) = sym.get_got_pltgot_addr(ctx);
+    *(ul32 *)(buf + 2) = sym.get_got_pltgot_addr(ctx);
   }
 }
 
@@ -242,11 +237,10 @@ static void relax_ld_to_le(u8 *loc, ElfRel<E> rel, u64 tls_size) {
   case R_386_GOT32X: {
     static const u8 insn[] = {
       0x65, 0xa1, 0, 0, 0, 0, // mov %gs:0, %eax
-      0x2d, 0, 0, 0, 0,       // sub $tls_size, %eax
-      0x90,                   // nop
+      0x81, 0xe8, 0, 0, 0, 0, // sub $tls_size, %eax
     };
     memcpy(loc - 2, insn, sizeof(insn));
-    *(ul32 *)(loc + 5) = tls_size;
+    *(ul32 *)(loc + 6) = tls_size;
     break;
   }
   default:
@@ -294,19 +288,16 @@ void InputSection<E>::apply_reloc_alloc(Context<E> &ctx, u8 *base) {
     Symbol<E> &sym = *file.symbols[rel.r_sym];
     u8 *loc = base + rel.r_offset;
 
-    auto check = [&](i64 val, i64 lo, i64 hi) {
-      if (val < lo || hi <= val)
-        Error(ctx) << *this << ": relocation " << rel << " against "
-                   << sym << " out of range: " << val << " is not in ["
-                   << lo << ", " << hi << ")";
-    };
-
     u64 S = sym.get_addr(ctx);
     u64 A = get_addend(*this, rel);
     u64 P = get_addr() + rel.r_offset;
     u64 G = sym.get_got_idx(ctx) * sizeof(Word<E>);
     u64 GOT = ctx.got->shdr.sh_addr;
 
+    auto check = [&](i64 val, i64 lo, i64 hi) {
+      check_range(ctx, i, val, lo, hi);
+    };
+
     switch (rel.r_type) {
     case R_386_8:
       check(S + A, 0, 1 << 8);
@@ -406,6 +397,10 @@ void InputSection<E>::apply_reloc_alloc(Context<E> &ctx, u8 *base) {
       //   mov    %reg, %eax
       //   call   *(%eax)
       //       R_386_TLS_DESC_CALL foo
+      //
+      // Note that the compiler always uses the local-exec TLS model
+      // for -fno-pic, so TLSDESC code is always PIC (i.e. uses %ebx to
+      // store the address of GOT.)
       if (sym.has_tlsdesc(ctx)) {
         *(ul32 *)loc = sym.get_tlsdesc_addr(ctx) + A - GOT;
       } else if (sym.has_gottp(ctx)) {
@@ -449,13 +444,6 @@ void InputSection<E>::apply_reloc_nonalloc(Context<E> &ctx, u8 *base) {
     Symbol<E> &sym = *file.symbols[rel.r_sym];
     u8 *loc = base + rel.r_offset;
 
-    auto check = [&](i64 val, i64 lo, i64 hi) {
-      if (val < lo || hi <= val)
-        Error(ctx) << *this << ": relocation " << rel << " against "
-                   << sym << " out of range: " << val << " is not in ["
-                   << lo << ", " << hi << ")";
-    };
-
     SectionFragment<E> *frag;
     i64 frag_addend;
     std::tie(frag, frag_addend) = get_fragment(ctx, rel);
@@ -464,6 +452,10 @@ void InputSection<E>::apply_reloc_nonalloc(Context<E> &ctx, u8 *base) {
     u64 A = frag ? frag_addend : get_addend(*this, rel);
     u64 GOT = ctx.got->shdr.sh_addr;
 
+    auto check = [&](i64 val, i64 lo, i64 hi) {
+      check_range(ctx, val, i, lo, hi);
+    };
+
     switch (rel.r_type) {
     case R_386_8:
       check(S + A, 0, 1 << 8);

src/arch-loongarch.cc

@@ -51,7 +51,7 @@ static u64 hi20(u64 val, u64 pc) {
   return bits(page(val + 0x800) - page(pc), 31, 12);
 }
 
-static u64 highest32(u64 val, u64 pc) {
+static u64 higher(u64 val, u64 pc) {
   // A PC-relative 64-bit address is materialized with the following
   // instructions for the large code model:
   //
@@ -72,11 +72,11 @@ static u64 highest32(u64 val, u64 pc) {
 }
 
 static u64 higher20(u64 val, u64 pc) {
-  return bits(highest32(val, pc), 51, 32);
+  return bits(higher(val, pc), 51, 32);
 }
 
 static u64 highest12(u64 val, u64 pc) {
-  return bits(highest32(val, pc), 63, 52);
+  return bits(higher(val, pc), 63, 52);
 }
 
 static void write_k12(u8 *loc, u32 val) {
@@ -128,8 +128,8 @@ static void set_rj(u8 *loc, u32 rj) {
 // Returns true if isec's i'th relocation refers to the following
 // relaxable instructioon pair.
 //
-//   pcalau12i $t0, 0         # R_LARCH_GOT_PC_HI20
-//   ld.d      $t0, $t0, 0    # R_LARCH_GOT_PC_LO12
+//   pcalau12i $t0, 0         # R_LARCH_GOT_PC_HI20, R_LARCH_RELAX
+//   ld.d      $t0, $t0, 0    # R_LARCH_GOT_PC_LO12, R_LARCH_RELAX
 static bool is_relaxable_got_load(Context<E> &ctx, InputSection<E> &isec, i64 i) {
   std::span<const ElfRel<E>> rels = isec.get_rels(ctx);
   Symbol<E> &sym = *isec.file.symbols[rels[i].r_sym];
@@ -138,6 +138,7 @@ static bool is_relaxable_got_load(Context<E> &ctx, InputSection<E> &isec, i64 i)
   if (ctx.arg.relax &&
       sym.is_pcrel_linktime_const(ctx) &&
       i + 3 < rels.size() &&
+      rels[i + 1].r_type == R_LARCH_RELAX &&
       rels[i + 2].r_type == R_LARCH_GOT_PC_LO12 &&
       rels[i + 2].r_offset == rels[i].r_offset + 4 &&
       rels[i + 3].r_type == R_LARCH_RELAX) {
@@ -183,14 +184,14 @@ void write_plt_header<E>(Context<E> &ctx, u8 *buf) {
   write_k12(buf + 16, gotplt);
 }
 
-constexpr ul32 plt_entry_64[] = {
+static constexpr ul32 plt_entry_64[] = {
   0x1a00'000f, // pcalau12i $t3, %pc_hi20([email protected])
   0x28c0'01ef, // ld.d      $t3, $t3, %lo12([email protected])
   0x4c00'01ed, // jirl      $t1, $t3, 0
   0x002a'0000, // break
 };
 
-constexpr ul32 plt_entry_32[] = {
+static constexpr ul32 plt_entry_32[] = {
   0x1a00'000f, // pcalau12i $t3, %pc_hi20([email protected])
   0x2880'01ef, // ld.w      $t3, $t3, %lo12([email protected])
   0x4c00'01ed, // jirl      $t1, $t3, 0
@@ -297,20 +298,6 @@ void InputSection<E>::apply_reloc_alloc(Context<E> &ctx, u8 *base) {
     i64 r_offset = rel.r_offset - r_delta;
     u8 *loc = base + r_offset;
 
-    auto check = [&](i64 val, i64 lo, i64 hi) {
-      if (val < lo || hi <= val)
-        Error(ctx) << *this << ": relocation " << rel << " against "
-                   << sym << " out of range: " << val << " is not in ["
-                   << lo << ", " << hi << ")";
-    };
-
-    auto check_branch = [&](i64 val, i64 lo, i64 hi) {
-      if (val & 0b11)
-        Error(ctx) << *this << ": misaligned symbol " << sym
-                   << " for relocation " << rel;
-      check(val, lo, hi);
-    };
-
     // Unlike other psABIs, the LoongArch ABI uses the same relocation
     // types to refer to GOT entries for thread-local symbols and regular
     // ones. Therefore, G may refer to a TLSGD or a regular GOT slot
@@ -334,10 +321,21 @@ void InputSection<E>::apply_reloc_alloc(Context<E> &ctx, u8 *base) {
     u64 G = got_idx * sizeof(Word<E>);
     u64 GOT = ctx.got->shdr.sh_addr;
 
+    auto check = [&](i64 val, i64 lo, i64 hi) {
+      check_range(ctx, i, val, lo, hi);
+    };
+
+    auto check_branch = [&](i64 val, i64 lo, i64 hi) {
+      check(val, lo, hi);
+      if (val & 0b11)
+        Error(ctx) << *this << ": misaligned symbol " << sym
+                   << " for relocation " << rel;
+    };
+
     switch (rel.r_type) {
     case R_LARCH_32:
-      if constexpr (E::is_64)
-        *(ul32 *)loc = S + A;
+      assert(E::is_64);
+      *(ul32 *)loc = S + A;
       break;
     case R_LARCH_B16:
       check_branch(S + A - P, -(1 << 17), 1 << 17);
@@ -369,7 +367,7 @@ void InputSection<E>::apply_reloc_alloc(Context<E> &ctx, u8 *base) {
       // It is contrary to the psABI document, but GNU ld has special
       // code to handle it, so we accept it too.
       if ((*(ul32 *)loc & 0xfc00'0000) == 0x4c00'0000)
-        write_k16(loc, int_cast(S + A, 12) >> 2);
+        write_k16(loc, sign_extend(S + A, 12) >> 2);
       else
         write_k12(loc, S + A);
       break;
@@ -407,7 +405,7 @@ void InputSection<E>::apply_reloc_alloc(Context<E> &ctx, u8 *base) {
         //   addi.d    $t0, $t0, 0
         if (is_relaxable_got_load(ctx, *this, i)) {
           i64 dist = compute_distance(ctx, sym, *this, rel);
-          if ((i32)dist == dist) {
+          if (is_int(dist, 32)) {
             u32 rd = get_rd(*(ul32 *)loc);
             *(ul32 *)(loc + 4) = 0x02c0'0000 | (rd << 5) | rd; // addi.d
 
@@ -590,19 +588,13 @@ void InputSection<E>::apply_reloc_alloc(Context<E> &ctx, u8 *base) {
       //   pcaddi    $a0, foo@GOTDESC
       //   ld.d      $ra, $a0, 0
       //   jirl      $ra, $ra, 0
-      //
-      // If the code-shrinking relaxation is disabled, we may leave
-      // original useless instructions instead of deleting them, but we
-      // accept that because relaxations are enabled by default.
       if (sym.has_tlsdesc(ctx) && removed_bytes == 0)
         write_j20(loc, hi20(sym.get_tlsdesc_addr(ctx) + A, P));
       break;
     case R_LARCH_TLS_DESC_PC_LO12:
       if (sym.has_tlsdesc(ctx) && removed_bytes == 0) {
         i64 dist = sym.get_tlsdesc_addr(ctx) + A - P;
-        if (int_cast(dist, 22) == dist) {
-          // If we can directly materialize the PC-relative address
-          // with pcaddi, do that.
+        if (is_int(dist, 22)) {
           *(ul32 *)loc = 0x1800'0000 | get_rd(*(ul32 *)loc); // pcaddi
           write_j20(loc, dist >> 2);
         } else {
@@ -649,7 +641,7 @@ void InputSection<E>::apply_reloc_alloc(Context<E> &ctx, u8 *base) {
 
       // Rewrite `addi.d $t0, $t0, <offset>` with `addi.d $t0, $tp, <offset>`
       // if the offset is directly accessible using tp. tp is r2.
-      if (int_cast(val, 12) == val)
+      if (is_int(val, 12))
         set_rj(loc, 2);
       break;
     }
@@ -863,6 +855,7 @@ template <>
 void shrink_section(Context<E> &ctx, InputSection<E> &isec) {
   std::span<const ElfRel<E>> rels = isec.get_rels(ctx);
   std::vector<RelocDelta> &deltas = isec.extra.r_deltas;
+  i64 r_delta = 0;
   u8 *buf = (u8 *)isec.contents.data();
 
   for (i64 i = 0; i < rels.size(); i++) {
@@ -870,8 +863,8 @@ void shrink_section(Context<E> &ctx, InputSection<E> &isec) {
     Symbol<E> &sym = *isec.file.symbols[r.r_sym];
 
     auto remove = [&](i64 d) {
-      i64 sum = deltas.empty() ? 0 : deltas.back().delta;
-      deltas.push_back(RelocDelta{r.r_offset, sum + d});
+      r_delta += d;
+      deltas.push_back(RelocDelta{r.r_offset, r_delta});
     };
 
     // A R_LARCH_ALIGN relocation refers to the beginning of a nop
@@ -897,7 +890,6 @@ void shrink_section(Context<E> &ctx, InputSection<E> &isec) {
         alignment = r.r_addend + 4;
       }
 
-      u64 r_delta = deltas.empty() ? 0 : deltas.back().delta;
       u64 P = isec.get_addr() + r.r_offset - r_delta;
       u64 desired = align_to(P, alignment);
       u64 actual = P + alignment - 4;
@@ -931,7 +923,7 @@ void shrink_section(Context<E> &ctx, InputSection<E> &isec) {
       //
       //  addi.d  $t0, $tp, <tp-offset>
       if (i64 val = sym.get_addr(ctx) + r.r_addend - ctx.tp_addr;
-          int_cast(val, 12) == val)
+          is_int(val, 12))
         remove(4);
       break;
     case R_LARCH_PCALA_HI20:
@@ -954,7 +946,7 @@ void shrink_section(Context<E> &ctx, InputSection<E> &isec) {
         u32 insn2 = *(ul32 *)(buf + rels[i].r_offset + 4);
         bool is_addi_d = (insn2 & 0xffc0'0000) == 0x02c0'0000;
 
-        if ((dist & 0b11) == 0 && int_cast(dist, 22) == dist &&
+        if ((dist & 0b11) == 0 && is_int(dist, 22) &&
             is_addi_d && get_rd(insn1) == get_rd(insn2) &&
             get_rd(insn2) == get_rj(insn2))
           remove(4);
@@ -970,7 +962,7 @@ void shrink_section(Context<E> &ctx, InputSection<E> &isec) {
       // If the displacement is PC ± 128 MiB, we can use B or BL instead.
       // Note that $zero is $r0 and $ra is $r1.
       if (i64 dist = compute_distance(ctx, sym, isec, r);
-          int_cast(dist, 28) == dist)
+          is_int(dist, 28))
         if (u32 jirl = *(ul32 *)(buf + rels[i].r_offset + 4);
             get_rd(jirl) == 0 || get_rd(jirl) == 1)
           remove(4);
@@ -986,17 +978,16 @@ void shrink_section(Context<E> &ctx, InputSection<E> &isec) {
       // relax them to the following instruction.
       //
       //   pcaddi    $t0, <offset>
-      if (is_relaxable_got_load(ctx, isec, i)) {
-        i64 dist = compute_distance(ctx, sym, isec, r);
-        if ((dist & 0b11) == 0 && int_cast(dist, 22) == dist)
+      if (is_relaxable_got_load(ctx, isec, i))
+        if (i64 dist = compute_distance(ctx, sym, isec, r);
+            is_int(dist, 22))
           remove(4);
-      }
       break;
     case R_LARCH_TLS_DESC_PC_HI20:
       if (sym.has_tlsdesc(ctx)) {
         u64 P = isec.get_addr() + r.r_offset;
         i64 dist = sym.get_tlsdesc_addr(ctx) + r.r_addend - P;
-        if (int_cast(dist, 22) == dist)
+        if (is_int(dist, 22))
           remove(4);
       } else {
         remove(4);
@@ -1015,8 +1006,7 @@ void shrink_section(Context<E> &ctx, InputSection<E> &isec) {
     }
   }
 
-  if (!deltas.empty())
-    isec.sh_size -= deltas.back().delta;
+  isec.sh_size -= r_delta;
 }
 
 } // namespace mold

src/arch-m68k.cc

@@ -86,11 +86,14 @@ void InputSection<E>::apply_reloc_alloc(Context<E> &ctx, u8 *base) {
     Symbol<E> &sym = *file.symbols[rel.r_sym];
     u8 *loc = base + rel.r_offset;
 
+    u64 S = sym.get_addr(ctx);
+    u64 A = rel.r_addend;
+    u64 P = get_addr() + rel.r_offset;
+    u64 G = sym.get_got_idx(ctx) * sizeof(Word<E>);
+    u64 GOT = ctx.got->shdr.sh_addr;
+
     auto check = [&](i64 val, i64 lo, i64 hi) {
-      if (val < lo || hi <= val)
-        Error(ctx) << *this << ": relocation " << rel << " against "
-                   << sym << " out of range: " << val << " is not in ["
-                   << lo << ", " << hi << ")";
+      check_range(ctx, i, val, lo, hi);
     };
 
     auto write16 = [&](u64 val) {
@@ -113,12 +116,6 @@ void InputSection<E>::apply_reloc_alloc(Context<E> &ctx, u8 *base) {
       *loc = val;
     };
 
-    u64 S = sym.get_addr(ctx);
-    u64 A = rel.r_addend;
-    u64 P = get_addr() + rel.r_offset;
-    u64 G = sym.get_got_idx(ctx) * sizeof(Word<E>);
-    u64 GOT = ctx.got->shdr.sh_addr;
-
     switch (rel.r_type) {
     case R_68K_32:
       break;

src/arch-ppc32.cc

@@ -88,7 +88,7 @@ void write_plt_header(Context<E> &ctx, u8 *buf) {
   loc[5] |= lo(ctx.gotplt->shdr.sh_addr - ctx.plt->shdr.sh_addr + 4);
 }
 
-constexpr ub32 plt_entry[] = {
+static constexpr ub32 plt_entry[] = {
   // Get the address of this PLT entry
   0x7c08'02a6, // mflr    r0
   0x429f'0005, // bcl     20, 31, 4
@@ -213,14 +213,14 @@ void InputSection<E>::apply_reloc_alloc(Context<E> &ctx, u8 *base) {
     case R_PPC_REL24:
     case R_PPC_LOCAL24PC: {
       i64 val = S + A - P;
-      if (int_cast(val, 26) != val)
+      if (!is_int(val, 26))
         val = sym.get_thunk_addr(ctx, P) - P;
       *(ub32 *)loc |= bits(val, 25, 2) << 2;
       break;
     }
     case R_PPC_PLTREL24: {
       i64 val = S - P;
-      if (sym.has_plt(ctx) || int_cast(val, 26) != val)
+      if (sym.has_plt(ctx) || !is_int(val, 26))
         val = sym.get_thunk_addr(ctx, P) - P;
       *(ub32 *)loc |= bits(val, 25, 2) << 2;
       break;

src/arch-ppc64v1.cc

@@ -162,13 +162,6 @@ void InputSection<E>::apply_reloc_alloc(Context<E> &ctx, u8 *base) {
     Symbol<E> &sym = *file.symbols[rel.r_sym];
     u8 *loc = base + rel.r_offset;
 
-    auto check = [&](i64 val, i64 lo, i64 hi) {
-      if (val < lo || hi <= val)
-        Error(ctx) << *this << ": relocation " << rel << " against "
-                   << sym << " out of range: " << val << " is not in ["
-                   << lo << ", " << hi << ")";
-    };
-
     u64 S = sym.get_addr(ctx);
     u64 A = rel.r_addend;
     u64 P = get_addr() + rel.r_offset;
@@ -176,6 +169,10 @@ void InputSection<E>::apply_reloc_alloc(Context<E> &ctx, u8 *base) {
     u64 GOT = ctx.got->shdr.sh_addr;
     u64 TOC = ctx.extra.TOC->value;
 
+    auto check = [&](i64 val, i64 lo, i64 hi) {
+      check_range(ctx, i, val, lo, hi);
+    };
+
     switch (rel.r_type) {
     case R_PPC64_TOC:
       break;
@@ -194,7 +191,7 @@ void InputSection<E>::apply_reloc_alloc(Context<E> &ctx, u8 *base) {
       break;
     case R_PPC64_REL24: {
       i64 val = sym.get_addr(ctx, NO_OPD) + A - P;
-      if (sym.has_plt(ctx) || int_cast(val, 26) != val)
+      if (sym.has_plt(ctx) || !is_int(val, 26))
         val = sym.get_thunk_addr(ctx, P) + A - P;
 
       check(val, -(1 << 25), 1 << 25);
@@ -293,13 +290,6 @@ void InputSection<E>::apply_reloc_nonalloc(Context<E> &ctx, u8 *base) {
     Symbol<E> &sym = *file.symbols[rel.r_sym];
     u8 *loc = base + rel.r_offset;
 
-    auto check = [&](i64 val, i64 lo, i64 hi) {
-      if (val < lo || hi <= val)
-        Error(ctx) << *this << ": relocation " << rel << " against "
-                   << sym << " out of range: " << val << " is not in ["
-                   << lo << ", " << hi << ")";
-    };
-
     SectionFragment<E> *frag;
     i64 frag_addend;
     std::tie(frag, frag_addend) = get_fragment(ctx, rel);
@@ -307,6 +297,10 @@ void InputSection<E>::apply_reloc_nonalloc(Context<E> &ctx, u8 *base) {
     u64 S = frag ? frag->get_addr(ctx) : sym.get_addr(ctx);
     u64 A = frag ? frag_addend : (i64)rel.r_addend;
 
+    auto check = [&](i64 val, i64 lo, i64 hi) {
+      check_range(ctx, val, i, lo, hi);
+    };
+
     switch (rel.r_type) {
     case R_PPC64_ADDR64:
       if (std::optional<u64> val = get_tombstone(sym, frag))
@@ -314,12 +308,10 @@ void InputSection<E>::apply_reloc_nonalloc(Context<E> &ctx, u8 *base) {
       else
         *(ub64 *)loc = S + A;
       break;
-    case R_PPC64_ADDR32: {
-      i64 val = S + A;
-      check(val, 0, 1LL << 32);
-      *(ub32 *)loc = val;
+    case R_PPC64_ADDR32:
+      check(S + A, 0, 1LL << 32);
+      *(ub32 *)loc = S + A;
       break;
-    }
     case R_PPC64_DTPREL64:
       *(ub64 *)loc = S + A - ctx.dtp_addr;
       break;
@@ -509,7 +501,6 @@ get_relocation_at(Context<E> &ctx, InputSection<E> &isec, i64 offset) {
 
 namespace {
 struct OpdSymbol {
-  bool operator<(const OpdSymbol &x) const { return r_offset < x.r_offset; }
   u64 r_offset = 0;
   Symbol<E> *sym = nullptr;
 };
@@ -517,7 +508,7 @@ struct OpdSymbol {
 
 static Symbol<E> *
 get_opd_sym_at(std::span<OpdSymbol> syms, u64 offset) {
-  auto it = std::lower_bound(syms.begin(), syms.end(), OpdSymbol{offset});
+  auto it = ranges::lower_bound(syms, offset, {}, &OpdSymbol::r_offset);
   if (it == syms.end())
     return nullptr;
   if (it->r_offset != offset)
@@ -599,7 +590,7 @@ void ppc64v1_rewrite_opd(Context<E> &ctx) {
     }
 
     // Sort symbols so that get_opd_sym_at() can do binary search.
-    sort(opd_syms);
+    ranges::stable_sort(opd_syms, {}, &OpdSymbol::r_offset);
 
     // Rewrite relocations so that they directly refer to .opd.
     for (std::unique_ptr<InputSection<E>> &isec : file->sections) {

src/arch-ppc64v2.cc

@@ -227,7 +227,7 @@ void InputSection<E>::apply_reloc_alloc(Context<E> &ctx, u8 *base) {
           *(ul32 *)(loc + 4) = 0xe841'0018; // ld r2, 24(r1)
       } else {
         i64 val = S + get_local_entry_offset(ctx, sym) + A - P;
-        if (int_cast(val, 26) != val)
+        if (!is_int(val, 26))
           val = no_r2save_thunk_addr() + A - P;
         *(ul32 *)loc |= bits(val, 25, 2) << 2;
       }
@@ -238,7 +238,7 @@ void InputSection<E>::apply_reloc_alloc(Context<E> &ctx, u8 *base) {
         *(ul32 *)loc |= bits(val, 25, 2) << 2;
       } else {
         i64 val = S + A - P;
-        if (int_cast(val, 26) != val)
+        if (!is_int(val, 26))
           val = no_r2save_thunk_addr() + A - P;
         *(ul32 *)loc |= bits(val, 25, 2) << 2;
       }
@@ -334,6 +334,7 @@ void InputSection<E>::apply_reloc_alloc(Context<E> &ctx, u8 *base) {
     case R_PPC64_TLS:
     case R_PPC64_TLSGD:
     case R_PPC64_TLSLD:
+    case R_PPC64_ENTRY:
       break;
     default:
       unreachable();
@@ -353,13 +354,6 @@ void InputSection<E>::apply_reloc_nonalloc(Context<E> &ctx, u8 *base) {
     Symbol<E> &sym = *file.symbols[rel.r_sym];
     u8 *loc = base + rel.r_offset;
 
-    auto check = [&](i64 val, i64 lo, i64 hi) {
-      if (val < lo || hi <= val)
-        Error(ctx) << *this << ": relocation " << rel << " against "
-                   << sym << " out of range: " << val << " is not in ["
-                   << lo << ", " << hi << ")";
-    };
-
     SectionFragment<E> *frag;
     i64 frag_addend;
     std::tie(frag, frag_addend) = get_fragment(ctx, rel);
@@ -367,6 +361,10 @@ void InputSection<E>::apply_reloc_nonalloc(Context<E> &ctx, u8 *base) {
     u64 S = frag ? frag->get_addr(ctx) : sym.get_addr(ctx);
     u64 A = frag ? frag_addend : (i64)rel.r_addend;
 
+    auto check = [&](i64 val, i64 lo, i64 hi) {
+      check_range(ctx, i, val, lo, hi);
+    };
+
     switch (rel.r_type) {
     case R_PPC64_ADDR64:
       if (std::optional<u64> val = get_tombstone(sym, frag))
@@ -374,12 +372,10 @@ void InputSection<E>::apply_reloc_nonalloc(Context<E> &ctx, u8 *base) {
       else
         *(ul64 *)loc = S + A;
       break;
-    case R_PPC64_ADDR32: {
-      i64 val = S + A;
-      check(val, 0, 1LL << 32);
-      *(ul32 *)loc = val;
+    case R_PPC64_ADDR32:
+      check(S + A, 0, 1LL << 32);
+      *(ul32 *)loc = S + A;
       break;
-    }
     case R_PPC64_DTPREL64:
       *(ul64 *)loc = S + A - ctx.dtp_addr;
       break;
@@ -467,6 +463,7 @@ void InputSection<E>::scan_relocations(Context<E> &ctx) {
     case R_PPC64_DTPREL16_LO:
     case R_PPC64_DTPREL16_LO_DS:
     case R_PPC64_DTPREL34:
+    case R_PPC64_ENTRY:
       break;
     default:
       Error(ctx) << *this << ": unknown relocation: " << rel;

src/arch-riscv.cc

@@ -123,14 +123,14 @@ void write_plt_header<E>(Context<E> &ctx, u8 *buf) {
   write_itype(buf + 16, gotplt - plt);
 }
 
-constexpr ul32 plt_entry_64[] = {
+static constexpr ul32 plt_entry_64[] = {
   0x0000'0e17, // auipc   t3, %pcrel_hi([email protected])
   0x000e'3e03, // ld      t3, %pcrel_lo(1b)(t3)
   0x000e'0367, // jalr    t1, t3
   0x0010'0073, // ebreak
 };
 
-constexpr ul32 plt_entry_32[] = {
+static constexpr ul32 plt_entry_32[] = {
   0x0000'0e17, // auipc   t3, %pcrel_hi([email protected])
   0x000e'2e03, // lw      t3, %pcrel_lo(1b)(t3)
   0x000e'0367, // jalr    t1, t3
@@ -243,6 +243,26 @@ find_paired_reloc(Context<E> &ctx, InputSection<E> &isec,
   Fatal(ctx) << isec << ": paired relocation is missing: " << i;
 }
 
+// Returns true if isec's i'th relocation refers to the following
+// GOT-load instructioon pair, which is an expeanded form of
+// `la t0, foo` pseudo assembly instruction.
+//
+// .L0
+//   auipc t0, 0      # R_RISCV_GOT_HI20(foo),     R_RISCV_RELAX
+//   ld    t0, 0(t0)  # R_RISCV_PCREL_LO12_I(.L0), R_RISCV_RELAX
+static bool is_got_load_pair(Context<E> &ctx, InputSection<E> &isec,
+                             std::span<const ElfRel<E>> rels, i64 i) {
+  u8 *buf = (u8 *)isec.contents.data();
+  return i + 3 < rels.size() &&
+         rels[i].r_type == R_RISCV_GOT_HI20 &&
+         rels[i + 1].r_type == R_RISCV_RELAX &&
+         rels[i + 2].r_type == R_RISCV_PCREL_LO12_I &&
+         rels[i + 3].r_type == R_RISCV_RELAX &&
+         rels[i].r_offset == rels[i + 2].r_offset - 4 &&
+         rels[i].r_offset == isec.file.symbols[rels[i + 2].r_sym]->value &&
+         get_rd(buf + rels[i].r_offset) == get_rd(buf + rels[i + 2].r_offset);
+}
+
 template <>
 void InputSection<E>::apply_reloc_alloc(Context<E> &ctx, u8 *base) {
   std::span<const ElfRel<E>> rels = get_rels(ctx);
@@ -271,23 +291,20 @@ void InputSection<E>::apply_reloc_alloc(Context<E> &ctx, u8 *base) {
     i64 r_offset = rel.r_offset - r_delta;
     u8 *loc = base + r_offset;
 
-    auto check = [&](i64 val, i64 lo, i64 hi) {
-      if (val < lo || hi <= val)
-        Error(ctx) << *this << ": relocation " << rel << " against "
-                   << sym << " out of range: " << val << " is not in ["
-                   << lo << ", " << hi << ")";
-    };
-
     u64 S = sym.get_addr(ctx);
     u64 A = rel.r_addend;
     u64 P = get_addr() + r_offset;
     u64 G = sym.get_got_idx(ctx) * sizeof(Word<E>);
     u64 GOT = ctx.got->shdr.sh_addr;
 
+    auto check = [&](i64 val, i64 lo, i64 hi) {
+      check_range(ctx, i, val, lo, hi);
+    };
+
     switch (rel.r_type) {
     case R_RISCV_32:
-      if constexpr (E::is_64)
-        *(U32<E> *)loc = S + A;
+      assert(E::is_64);
+      *(U32<E> *)loc = S + A;
       break;
     case R_RISCV_64:
       break;
@@ -350,27 +367,20 @@ void InputSection<E>::apply_reloc_alloc(Context<E> &ctx, u8 *base) {
         i += 3;
       } else {
         assert(removed_bytes == 0);
-        if (ctx.arg.relax &&
-            sym.is_pcrel_linktime_const(ctx) &&
-            i + 3 < rels.size() &&
-            rels[i + 1].r_type == R_RISCV_RELAX &&
-            rels[i + 2].r_type == R_RISCV_PCREL_LO12_I &&
-            rels[i + 2].r_offset == rels[i].r_offset + 4 &&
-            file.symbols[rels[i + 2].r_sym]->value == r_offset &&
-            rels[i + 3].r_type == R_RISCV_RELAX) {
-          i64 val = S + A - P;
-          if (rd == get_rd(buf + rel.r_offset + 4) && (i32)val == val) {
-            // auipc <rd>, %hi20(val)
-            write_utype(loc, val);
 
-            // addi <rd>, <rd>, %lo12(val)
-            *(ul32 *)(loc + 4) = 0b0010011 | (rd << 15) | (rd << 7);
-            write_itype(loc + 4, val);
-            i += 3;
-            break;
-          }
+        i64 val = S + A - P;
+        if (ctx.arg.relax && sym.is_pcrel_linktime_const(ctx) &&
+            is_got_load_pair(ctx, *this, rels, i) && is_int(val, 32)) {
+          // auipc <rd>, %hi20(val)
+          write_utype(loc, val);
+
+          // addi <rd>, <rd>, %lo12(val)
+          *(ul32 *)(loc + 4) = 0b0010011 | (rd << 15) | (rd << 7);
+          write_itype(loc + 4, val);
+          i += 3;
+        } else {
+          write_utype(loc, G + GOT + A - P);
         }
-        write_utype(loc, G + GOT + A - P);
       }
       break;
     }
@@ -433,7 +443,7 @@ void InputSection<E>::apply_reloc_alloc(Context<E> &ctx, u8 *base) {
       // Rewrite `lw t1, 0(t0)` with `lw t1, 0(x0)` if the address is
       // accessible relative to the zero register because if that's the
       // case, corresponding LUI might have been removed by relaxation.
-      if (int_cast(S + A, 12) == S + A)
+      if (is_int(S + A, 12))
         set_rs1(loc, 0);
       break;
     case R_RISCV_TPREL_HI20:
@@ -457,7 +467,7 @@ void InputSection<E>::apply_reloc_alloc(Context<E> &ctx, u8 *base) {
 
       // Rewrite `lw t1, 0(t0)` with `lw t1, 0(tp)` if the address is
       // directly accessible using tp. tp is x4.
-      if (int_cast(val, 12) == val)
+      if (is_int(val, 12))
         set_rs1(loc, 4);
       break;
     }
@@ -518,7 +528,10 @@ void InputSection<E>::apply_reloc_alloc(Context<E> &ctx, u8 *base) {
 
       switch (rel.r_type) {
       case R_RISCV_TLSDESC_LOAD_LO12:
-        write_itype(loc, sym2.get_tlsdesc_addr(ctx) + A - P);
+        if (sym2.has_tlsdesc(ctx))
+          write_itype(loc, sym2.get_tlsdesc_addr(ctx) + A - P);
+        else
+          *(ul32 *)loc = 0x13; // nop
         break;
       case R_RISCV_TLSDESC_ADD_LO12:
         if (sym2.has_tlsdesc(ctx)) {
@@ -540,7 +553,7 @@ void InputSection<E>::apply_reloc_alloc(Context<E> &ctx, u8 *base) {
           write_itype(loc, sym2.get_gottp_addr(ctx) + A - P);
         } else {
           i64 val = S + A - ctx.tp_addr;
-          if (int_cast(val, 12) == val)
+          if (is_int(val, 12))
             *(ul32 *)loc = 0x513;   // addi a0,zero,<lo12>
           else
             *(ul32 *)loc = 0x50513; // addi a0,a0,<lo12>
@@ -831,6 +844,7 @@ template <>
 void shrink_section(Context<E> &ctx, InputSection<E> &isec) {
   std::span<const ElfRel<E>> rels = isec.get_rels(ctx);
   std::vector<RelocDelta> &deltas = isec.extra.r_deltas;
+  i64 r_delta = 0;
   u8 *buf = (u8 *)isec.contents.data();
 
   // True if we can use 2-byte instructions. This is usually true on
@@ -842,8 +856,8 @@ void shrink_section(Context<E> &ctx, InputSection<E> &isec) {
     Symbol<E> &sym = *isec.file.symbols[r.r_sym];
 
     auto remove = [&](i64 d) {
-      i64 sum = deltas.empty() ? 0 : deltas.back().delta;
-      deltas.push_back(RelocDelta{r.r_offset, sum + d});
+      r_delta += d;
+      deltas.push_back(RelocDelta{r.r_offset, r_delta});
     };
 
     // Handling R_RISCV_ALIGN is mandatory.
@@ -854,7 +868,6 @@ void shrink_section(Context<E> &ctx, InputSection<E> &isec) {
     if (r.r_type == R_RISCV_ALIGN) {
       // The total bytes of NOPs is stored to r_addend, so the next
       // instruction is r_addend away.
-      u64 r_delta = deltas.empty() ? 0 : deltas.back().delta;
       u64 P = isec.get_addr() + r.r_offset - r_delta;
       u64 desired = align_to(P, bit_ceil(r.r_addend));
       u64 actual = P + r.r_addend;
@@ -888,59 +901,46 @@ void shrink_section(Context<E> &ctx, InputSection<E> &isec) {
 
       i64 rd = get_rd(buf + r.r_offset + 4);
 
-      if (use_rvc && rd == 0 && int_cast(dist, 12) == dist) {
+      if (use_rvc && rd == 0 && is_int(dist, 12)) {
         // If rd is x0 and the jump target is within ±2 KiB, we can use
         // C.J, saving 6 bytes.
         remove(6);
-      } else if (use_rvc && !E::is_64 && rd == 1 && int_cast(dist, 12) == dist) {
+      } else if (use_rvc && !E::is_64 && rd == 1 && is_int(dist, 12)) {
         // If rd is x1 and the jump target is within ±2 KiB, we can use
         // C.JAL. This is RV32 only because C.JAL is RV32-only instruction.
         remove(6);
-      } else if (int_cast(dist, 21) == dist) {
+      } else if (is_int(dist, 21)) {
         // If the jump target is within ±1 MiB, we can use JAL.
         remove(4);
       }
       break;
     }
-    case R_RISCV_GOT_HI20: {
+    case R_RISCV_GOT_HI20:
       // A GOT_HI20 followed by a PCREL_LO12_I is used to load a value from
       // GOT. If the loaded value is a link-time constant, we can rewrite
       // the instructions to directly materialize the value, eliminating a
       // memory load.
-      if (sym.is_absolute() &&
-          i + 3 < rels.size() &&
-          rels[i + 1].r_type == R_RISCV_RELAX &&
-          rels[i + 2].r_type == R_RISCV_PCREL_LO12_I &&
-          rels[i + 2].r_offset == rels[i].r_offset + 4 &&
-          isec.file.symbols[rels[i + 2].r_sym]->value == rels[i].r_offset &&
-          rels[i + 3].r_type == R_RISCV_RELAX) {
-        i64 rd = get_rd(buf + r.r_offset);
-
-        if (rd == get_rd(buf + r.r_offset + 4)) {
-          u64 val = sym.get_addr(ctx) + r.r_addend;
-
-          if (use_rvc && rd != 0 && int_cast(val, 6) == val) {
-            // Replace AUIPC + LD with C.LI.
-            remove(6);
-          } else if (int_cast(val, 12) == val) {
-            // Replace AUIPC + LD with ADDI.
-            remove(4);
-          }
+      if (sym.is_absolute() && is_got_load_pair(ctx, isec, rels, i)) {
+        u64 val = sym.get_addr(ctx) + r.r_addend;
+        if (use_rvc && is_int(val, 6) && get_rd(buf + r.r_offset) != 0) {
+          // Replace AUIPC + LD with C.LI.
+          remove(6);
+        } else if (is_int(val, 12)) {
+          // Replace AUIPC + LD with ADDI.
+          remove(4);
         }
       }
       break;
-    }
     case R_RISCV_HI20: {
       u64 val = sym.get_addr(ctx) + r.r_addend;
       i64 rd = get_rd(buf + r.r_offset);
 
-      if (int_cast(val, 12) == val) {
+      if (is_int(val, 12)) {
         // We can replace `lui t0, %hi(foo)` and `add t0, t0, %lo(foo)`
         // instruction pair with `add t0, x0, %lo(foo)` if foo's bits
         // [32:11] are all one or all zero.
         remove(4);
-      } else if (use_rvc && rd != 0 && rd != 2 &&
-                 int_cast(val + 0x800, 18) == val + 0x800) {
+      } else if (use_rvc && rd != 0 && rd != 2 && is_int(val + 0x800, 18)) {
         // If the upper 20 bits can actually be represented in 6 bits,
         // we can use C.LUI instead of LUI.
         remove(2);
@@ -969,7 +969,7 @@ void shrink_section(Context<E> &ctx, InputSection<E> &isec) {
       //
       // Here, we remove `lui` and `add` if the offset is within ±2 KiB.
       if (i64 val = sym.get_addr(ctx) + r.r_addend - ctx.tp_addr;
-          int_cast(val, 12) == val)
+          is_int(val, 12))
         remove(4);
       break;
     case R_RISCV_TLSDESC_HI20:
@@ -988,7 +988,7 @@ void shrink_section(Context<E> &ctx, InputSection<E> &isec) {
         assert(r.r_type == R_RISCV_TLSDESC_ADD_LO12);
         if (!sym2.has_tlsdesc(ctx) && !sym2.has_gottp(ctx))
           if (i64 val = sym2.get_addr(ctx) + rel2.r_addend - ctx.tp_addr;
-              int_cast(val, 12) == val)
+              is_int(val, 12))
             remove(4);
       }
       break;
@@ -996,8 +996,7 @@ void shrink_section(Context<E> &ctx, InputSection<E> &isec) {
     }
   }
 
-  if (!deltas.empty())
-    isec.sh_size -= deltas.back().delta;
+  isec.sh_size -= r_delta;
 }
 
 // ISA name handlers
@@ -1116,15 +1115,12 @@ static std::vector<Extn> merge_extensions(std::span<Extn> x, std::span<Extn> y)
   return vec;
 }
 
-static std::string to_string(const Extn &e) {
-  return e.name + std::to_string(e.major) + "p" + std::to_string(e.minor);
-}
-
 static std::string to_string(std::span<Extn> v) {
-  std::string str = to_string(v[0]);
-  for (i64 i = 1; i < v.size(); i++)
-    str += "_" + to_string(v[i]);
-  return str;
+  std::ostringstream os;
+  os << v[0].name << v[0].major << 'p' << v[0].minor;
+  for (Extn &e : v.subspan(1))
+    os << '_' << e.name << e.major << 'p' << e.minor;
+  return os.str();
 }
 
 //

src/arch-s390x.cc

@@ -124,28 +124,24 @@ void InputSection<E>::apply_reloc_alloc(Context<E> &ctx, u8 *base) {
     Symbol<E> &sym = *file.symbols[rel.r_sym];
     u8 *loc = base + rel.r_offset;
 
-    auto check = [&](i64 val, i64 lo, i64 hi) {
-      if (val < lo || hi <= val)
-        Error(ctx) << *this << ": relocation " << rel << " against "
-                   << sym << " out of range: " << val << " is not in ["
-                   << lo << ", " << hi << ")";
-    };
-
-    auto check_dbl = [&](i64 val, i64 lo, i64 hi) {
-      check(val, lo, hi);
-
-      // R_390_*DBL relocs should never refer a symbol at an odd address
-      if (val & 1)
-        Error(ctx) << *this << ": misaligned symbol " << sym
-                   << " for relocation " << rel;
-    };
-
     u64 S = sym.get_addr(ctx);
     u64 A = rel.r_addend;
     u64 P = get_addr() + rel.r_offset;
     u64 G = sym.get_got_idx(ctx) * sizeof(Word<E>);
     u64 GOT = ctx.got->shdr.sh_addr;
 
+    auto check = [&](i64 val, i64 lo, i64 hi) {
+      check_range(ctx, i, val, lo, hi);
+    };
+
+    auto check_dbl = [&](i64 val, i64 lo, i64 hi) {
+      // R_390_*DBL relocs should never refer to a symbol at an odd address
+      check(val, lo, hi);
+      if (val & 1)
+        Error(ctx) << *this << ": misaligned symbol " << sym
+                   << " for relocation " << rel;
+    };
+
     switch (rel.r_type) {
     case R_390_64:
       break;
@@ -170,9 +166,6 @@ void InputSection<E>::apply_reloc_alloc(Context<E> &ctx, u8 *base) {
       check(S + A, 0, 1LL << 32);
       *(ub32 *)loc = S + A;
       break;
-    case R_390_PLT64:
-      *(ub64 *)loc = S + A;
-      break;
     case R_390_PC12DBL:
     case R_390_PLT12DBL:
       check_dbl(S + A - P, -(1 << 12), 1 << 12);
@@ -187,6 +180,7 @@ void InputSection<E>::apply_reloc_alloc(Context<E> &ctx, u8 *base) {
       *(ub32 *)loc = S + A - P;
       break;
     case R_390_PC64:
+    case R_390_PLT64:
       *(ub64 *)loc = S + A - P;
       break;
     case R_390_PC16DBL:
@@ -257,7 +251,7 @@ void InputSection<E>::apply_reloc_alloc(Context<E> &ctx, u8 *base) {
         u64 op = *(ub16 *)(loc - 2);
         u64 val = S + A - P;
         if ((op & 0xff0f) == 0xc408 && A == 2 && (val & 1) == 0 &&
-            int_cast(val, 33) == val) {
+            is_int(val, 33)) {
           *(ub16 *)(loc - 2) = 0xc000 | (op & 0x00f0);
           *(ub32 *)loc = val >> 1;
           break;
@@ -350,13 +344,6 @@ void InputSection<E>::apply_reloc_nonalloc(Context<E> &ctx, u8 *base) {
     Symbol<E> &sym = *file.symbols[rel.r_sym];
     u8 *loc = base + rel.r_offset;
 
-    auto check = [&](i64 val, i64 lo, i64 hi) {
-      if (val < lo || hi <= val)
-        Error(ctx) << *this << ": relocation " << rel << " against "
-                   << sym << " out of range: " << val << " is not in ["
-                   << lo << ", " << hi << ")";
-    };
-
     SectionFragment<E> *frag;
     i64 frag_addend;
     std::tie(frag, frag_addend) = get_fragment(ctx, rel);
@@ -364,6 +351,10 @@ void InputSection<E>::apply_reloc_nonalloc(Context<E> &ctx, u8 *base) {
     u64 S = frag ? frag->get_addr(ctx) : sym.get_addr(ctx);
     u64 A = frag ? frag_addend : (i64)rel.r_addend;
 
+    auto check = [&](i64 val, i64 lo, i64 hi) {
+      check_range(ctx, val, i, lo, hi);
+    };
+
     switch (rel.r_type) {
     case R_390_32:
       check(S + A, 0, 1LL << 32);
@@ -411,8 +402,10 @@ void InputSection<E>::scan_relocations(Context<E> &ctx) {
     case R_390_32:
       scan_absrel(ctx, sym, rel);
       break;
+    case R_390_PC12DBL:
     case R_390_PC16:
     case R_390_PC16DBL:
+    case R_390_PC24DBL:
     case R_390_PC32:
     case R_390_PC32DBL:
     case R_390_PC64:

src/arch-sparc64.cc

@@ -51,9 +51,6 @@
 // address. That also means each function needs to execute the above piece
 // of code to become position-independent.
 //
-// This scheme is very similar to i386. That may not be a coincidence
-// because the i386 ELF psABI is created by Sun Microsystems too.
-//
 // https://github.com/rui314/psabi/blob/main/sparc.pdf
 
 #include "mold.h"
@@ -150,19 +147,16 @@ void InputSection<E>::apply_reloc_alloc(Context<E> &ctx, u8 *base) {
     Symbol<E> &sym = *file.symbols[rel.r_sym];
     u8 *loc = base + rel.r_offset;
 
-    auto check = [&](i64 val, i64 lo, i64 hi) {
-      if (val < lo || hi <= val)
-        Error(ctx) << *this << ": relocation " << rel << " against "
-                   << sym << " out of range: " << val << " is not in ["
-                   << lo << ", " << hi << ")";
-    };
-
     u64 S = sym.get_addr(ctx);
     u64 A = rel.r_addend;
     u64 P = get_addr() + rel.r_offset;
     u64 G = sym.get_got_idx(ctx) * sizeof(Word<E>);
     u64 GOT = ctx.got->shdr.sh_addr;
 
+    auto check = [&](i64 val, i64 lo, i64 hi) {
+      check_range(ctx, i, val, lo, hi);
+    };
+
     switch (rel.r_type) {
     case R_SPARC_5:
       check(S + A, 0, 1 << 5);
@@ -466,13 +460,6 @@ void InputSection<E>::apply_reloc_nonalloc(Context<E> &ctx, u8 *base) {
     Symbol<E> &sym = *file.symbols[rel.r_sym];
     u8 *loc = base + rel.r_offset;
 
-    auto check = [&](i64 val, i64 lo, i64 hi) {
-      if (val < lo || hi <= val)
-        Error(ctx) << *this << ": relocation " << rel << " against "
-                   << sym << " out of range: " << val << " is not in ["
-                   << lo << ", " << hi << ")";
-    };
-
     SectionFragment<E> *frag;
     i64 frag_addend;
     std::tie(frag, frag_addend) = get_fragment(ctx, rel);
@@ -480,6 +467,10 @@ void InputSection<E>::apply_reloc_nonalloc(Context<E> &ctx, u8 *base) {
     u64 S = frag ? frag->get_addr(ctx) : sym.get_addr(ctx);
     u64 A = frag ? frag_addend : (i64)rel.r_addend;
 
+    auto check = [&](i64 val, i64 lo, i64 hi) {
+      check_range(ctx, val, i, lo, hi);
+    };
+
     switch (rel.r_type) {
     case R_SPARC_64:
     case R_SPARC_UA64:

src/arch-x86-64.cc

@@ -127,98 +127,165 @@ void EhFrameSection<E>::apply_eh_reloc(Context<E> &ctx, const ElfRel<E> &rel,
   }
 }
 
-static u32 relax_gotpcrelx(u8 *loc) {
-  switch ((loc[0] << 8) | loc[1]) {
-  case 0xff15: return 0x90e8; // call *0(%rip) -> call 0
-  case 0xff25: return 0x90e9; // jmp  *0(%rip) -> jmp  0
+static u32 relax_gotpcrelx(u8 *loc, const ElfRel<E> &rel) {
+  if (rel.r_type == R_X86_64_GOTPCRELX) {
+    switch ((loc[-2] << 8) | loc[-1]) {
+    case 0xff15: return 0x40e8; // call *0(%rip) -> call 0
+    case 0xff25: return 0x40e9; // jmp  *0(%rip) -> jmp  0
+    }
+  } else {
+    assert(rel.r_type == R_X86_64_REX_GOTPCRELX ||
+           rel.r_type == R_X86_64_CODE_4_GOTPCRELX);
+    switch ((loc[-3] << 16) | (loc[-2] << 8) | loc[-1]) {
+    case 0x488b05: return 0x8d05; // mov 0(%rip), %rax -> lea 0(%rip), %rax
+    case 0x488b0d: return 0x8d0d; // mov 0(%rip), %rcx -> lea 0(%rip), %rcx
+    case 0x488b15: return 0x8d15; // mov 0(%rip), %rdx -> lea 0(%rip), %rdx
+    case 0x488b1d: return 0x8d1d; // mov 0(%rip), %rbx -> lea 0(%rip), %rbx
+    case 0x488b25: return 0x8d25; // mov 0(%rip), %rsp -> lea 0(%rip), %rsp
+    case 0x488b2d: return 0x8d2d; // mov 0(%rip), %rbp -> lea 0(%rip), %rbp
+    case 0x488b35: return 0x8d35; // mov 0(%rip), %rsi -> lea 0(%rip), %rsi
+    case 0x488b3d: return 0x8d3d; // mov 0(%rip), %rdi -> lea 0(%rip), %rdi
+    case 0x4c8b05: return 0x8d05; // mov 0(%rip), %r8  -> lea 0(%rip), %r8
+    case 0x4c8b0d: return 0x8d0d; // mov 0(%rip), %r9  -> lea 0(%rip), %r9
+    case 0x4c8b15: return 0x8d15; // mov 0(%rip), %r10 -> lea 0(%rip), %r10
+    case 0x4c8b1d: return 0x8d1d; // mov 0(%rip), %r11 -> lea 0(%rip), %r11
+    case 0x4c8b25: return 0x8d25; // mov 0(%rip), %r12 -> lea 0(%rip), %r12
+    case 0x4c8b2d: return 0x8d2d; // mov 0(%rip), %r13 -> lea 0(%rip), %r13
+    case 0x4c8b35: return 0x8d35; // mov 0(%rip), %r14 -> lea 0(%rip), %r14
+    case 0x4c8b3d: return 0x8d3d; // mov 0(%rip), %r15 -> lea 0(%rip), %r15
+    }
   }
   return 0;
 }
 
-static u32 relax_rex_gotpcrelx(u8 *loc) {
-  switch ((loc[0] << 16) | (loc[1] << 8) | loc[2]) {
-  case 0x488b05: return 0x488d05; // mov 0(%rip), %rax -> lea 0(%rip), %rax
-  case 0x488b0d: return 0x488d0d; // mov 0(%rip), %rcx -> lea 0(%rip), %rcx
-  case 0x488b15: return 0x488d15; // mov 0(%rip), %rdx -> lea 0(%rip), %rdx
-  case 0x488b1d: return 0x488d1d; // mov 0(%rip), %rbx -> lea 0(%rip), %rbx
-  case 0x488b25: return 0x488d25; // mov 0(%rip), %rsp -> lea 0(%rip), %rsp
-  case 0x488b2d: return 0x488d2d; // mov 0(%rip), %rbp -> lea 0(%rip), %rbp
-  case 0x488b35: return 0x488d35; // mov 0(%rip), %rsi -> lea 0(%rip), %rsi
-  case 0x488b3d: return 0x488d3d; // mov 0(%rip), %rdi -> lea 0(%rip), %rdi
-  case 0x4c8b05: return 0x4c8d05; // mov 0(%rip), %r8  -> lea 0(%rip), %r8
-  case 0x4c8b0d: return 0x4c8d0d; // mov 0(%rip), %r9  -> lea 0(%rip), %r9
-  case 0x4c8b15: return 0x4c8d15; // mov 0(%rip), %r10 -> lea 0(%rip), %r10
-  case 0x4c8b1d: return 0x4c8d1d; // mov 0(%rip), %r11 -> lea 0(%rip), %r11
-  case 0x4c8b25: return 0x4c8d25; // mov 0(%rip), %r12 -> lea 0(%rip), %r12
-  case 0x4c8b2d: return 0x4c8d2d; // mov 0(%rip), %r13 -> lea 0(%rip), %r13
-  case 0x4c8b35: return 0x4c8d35; // mov 0(%rip), %r14 -> lea 0(%rip), %r14
-  case 0x4c8b3d: return 0x4c8d3d; // mov 0(%rip), %r15 -> lea 0(%rip), %r15
+static u32 relax_gottpoff(u8 *loc, const ElfRel<E> &rel) {
+  if (rel.r_type == R_X86_64_GOTTPOFF) {
+    switch ((loc[-3] << 16) | (loc[-2] << 8) | loc[-1]) {
+    case 0x488b05: return 0x48c7c0; // mov 0(%rip), %rax -> mov $0, %rax
+    case 0x488b0d: return 0x48c7c1; // mov 0(%rip), %rcx -> mov $0, %rcx
+    case 0x488b15: return 0x48c7c2; // mov 0(%rip), %rdx -> mov $0, %rdx
+    case 0x488b1d: return 0x48c7c3; // mov 0(%rip), %rbx -> mov $0, %rbx
+    case 0x488b25: return 0x48c7c4; // mov 0(%rip), %rsp -> mov $0, %rsp
+    case 0x488b2d: return 0x48c7c5; // mov 0(%rip), %rbp -> mov $0, %rbp
+    case 0x488b35: return 0x48c7c6; // mov 0(%rip), %rsi -> mov $0, %rsi
+    case 0x488b3d: return 0x48c7c7; // mov 0(%rip), %rdi -> mov $0, %rdi
+    case 0x4c8b05: return 0x49c7c0; // mov 0(%rip), %r8  -> mov $0, %r8
+    case 0x4c8b0d: return 0x49c7c1; // mov 0(%rip), %r9  -> mov $0, %r9
+    case 0x4c8b15: return 0x49c7c2; // mov 0(%rip), %r10 -> mov $0, %r10
+    case 0x4c8b1d: return 0x49c7c3; // mov 0(%rip), %r11 -> mov $0, %r11
+    case 0x4c8b25: return 0x49c7c4; // mov 0(%rip), %r12 -> mov $0, %r12
+    case 0x4c8b2d: return 0x49c7c5; // mov 0(%rip), %r13 -> mov $0, %r13
+    case 0x4c8b35: return 0x49c7c6; // mov 0(%rip), %r14 -> mov $0, %r14
+    case 0x4c8b3d: return 0x49c7c7; // mov 0(%rip), %r15 -> mov $0, %r15
+    }
+  } else {
+    assert(rel.r_type == R_X86_64_CODE_4_GOTTPOFF);
+    switch ((loc[-3] << 16) | (loc[-2] << 8) | loc[-1]) {
+    case 0x488b05: return 0x18c7c0; // mov 0(%rip), %r16 -> mov $0, %r16
+    case 0x488b0d: return 0x18c7c1; // mov 0(%rip), %r17 -> mov $0, %r17
+    case 0x488b15: return 0x18c7c2; // mov 0(%rip), %r18 -> mov $0, %r18
+    case 0x488b1d: return 0x18c7c3; // mov 0(%rip), %r19 -> mov $0, %r19
+    case 0x488b25: return 0x18c7c4; // mov 0(%rip), %r20 -> mov $0, %r20
+    case 0x488b2d: return 0x18c7c5; // mov 0(%rip), %r21 -> mov $0, %r21
+    case 0x488b35: return 0x18c7c6; // mov 0(%rip), %r22 -> mov $0, %r22
+    case 0x488b3d: return 0x18c7c7; // mov 0(%rip), %r23 -> mov $0, %r23
+    case 0x4c8b05: return 0x19c7c0; // mov 0(%rip), %r24 -> mov $0, %r24
+    case 0x4c8b0d: return 0x19c7c1; // mov 0(%rip), %r25 -> mov $0, %r25
+    case 0x4c8b15: return 0x19c7c2; // mov 0(%rip), %r26 -> mov $0, %r26
+    case 0x4c8b1d: return 0x19c7c3; // mov 0(%rip), %r27 -> mov $0, %r27
+    case 0x4c8b25: return 0x19c7c4; // mov 0(%rip), %r28 -> mov $0, %r28
+    case 0x4c8b2d: return 0x19c7c5; // mov 0(%rip), %r29 -> mov $0, %r29
+    case 0x4c8b35: return 0x19c7c6; // mov 0(%rip), %r30 -> mov $0, %r30
+    case 0x4c8b3d: return 0x19c7c7; // mov 0(%rip), %r31 -> mov $0, %r31
+    }
   }
   return 0;
 }
 
-static u32 relax_gottpoff(u8 *loc) {
-  switch ((loc[0] << 16) | (loc[1] << 8) | loc[2]) {
-  case 0x488b05: return 0x48c7c0; // mov 0(%rip), %rax -> mov $0, %rax
-  case 0x488b0d: return 0x48c7c1; // mov 0(%rip), %rcx -> mov $0, %rcx
-  case 0x488b15: return 0x48c7c2; // mov 0(%rip), %rdx -> mov $0, %rdx
-  case 0x488b1d: return 0x48c7c3; // mov 0(%rip), %rbx -> mov $0, %rbx
-  case 0x488b25: return 0x48c7c4; // mov 0(%rip), %rsp -> mov $0, %rsp
-  case 0x488b2d: return 0x48c7c5; // mov 0(%rip), %rbp -> mov $0, %rbp
-  case 0x488b35: return 0x48c7c6; // mov 0(%rip), %rsi -> mov $0, %rsi
-  case 0x488b3d: return 0x48c7c7; // mov 0(%rip), %rdi -> mov $0, %rdi
-  case 0x4c8b05: return 0x49c7c0; // mov 0(%rip), %r8  -> mov $0, %r8
-  case 0x4c8b0d: return 0x49c7c1; // mov 0(%rip), %r9  -> mov $0, %r9
-  case 0x4c8b15: return 0x49c7c2; // mov 0(%rip), %r10 -> mov $0, %r10
-  case 0x4c8b1d: return 0x49c7c3; // mov 0(%rip), %r11 -> mov $0, %r11
-  case 0x4c8b25: return 0x49c7c4; // mov 0(%rip), %r12 -> mov $0, %r12
-  case 0x4c8b2d: return 0x49c7c5; // mov 0(%rip), %r13 -> mov $0, %r13
-  case 0x4c8b35: return 0x49c7c6; // mov 0(%rip), %r14 -> mov $0, %r14
-  case 0x4c8b3d: return 0x49c7c7; // mov 0(%rip), %r15 -> mov $0, %r15
+static u32 relax_tlsdesc_to_ie(u8 *loc, const ElfRel<E> &rel) {
+  if (rel.r_type == R_X86_64_GOTPC32_TLSDESC) {
+    switch ((loc[-3] << 16) | (loc[-2] << 8) | loc[-1]) {
+    case 0x488d05: return 0x488b05; // lea 0(%rip), %rax -> mov 0(%rip), %rax
+    case 0x488d0d: return 0x488b0d; // lea 0(%rip), %rcx -> mov 0(%rip), %rcx
+    case 0x488d15: return 0x488b15; // lea 0(%rip), %rdx -> mov 0(%rip), %rdx
+    case 0x488d1d: return 0x488b1d; // lea 0(%rip), %rbx -> mov 0(%rip), %rbx
+    case 0x488d25: return 0x488b25; // lea 0(%rip), %rsp -> mov 0(%rip), %rsp
+    case 0x488d2d: return 0x488b2d; // lea 0(%rip), %rbp -> mov 0(%rip), %rbp
+    case 0x488d35: return 0x488b35; // lea 0(%rip), %rsi -> mov 0(%rip), %rsi
+    case 0x488d3d: return 0x488b3d; // lea 0(%rip), %rdi -> mov 0(%rip), %rdi
+    case 0x4c8d05: return 0x4c8b05; // lea 0(%rip), %r8  -> mov 0(%rip), %r8
+    case 0x4c8d0d: return 0x4c8b0d; // lea 0(%rip), %r9  -> mov 0(%rip), %r9
+    case 0x4c8d15: return 0x4c8b15; // lea 0(%rip), %r10 -> mov 0(%rip), %r10
+    case 0x4c8d1d: return 0x4c8b1d; // lea 0(%rip), %r11 -> mov 0(%rip), %r11
+    case 0x4c8d25: return 0x4c8b25; // lea 0(%rip), %r12 -> mov 0(%rip), %r12
+    case 0x4c8d2d: return 0x4c8b2d; // lea 0(%rip), %r13 -> mov 0(%rip), %r13
+    case 0x4c8d35: return 0x4c8b35; // lea 0(%rip), %r14 -> mov 0(%rip), %r14
+    case 0x4c8d3d: return 0x4c8b3d; // lea 0(%rip), %r15 -> mov 0(%rip), %r15
+    }
+  } else {
+    assert(rel.r_type == R_X86_64_CODE_4_GOTPC32_TLSDESC);
+    switch ((loc[-3] << 16) | (loc[-2] << 8) | loc[-1]) {
+    case 0x488d05: return 0x488b05; // lea 0(%rip), %r16 -> mov 0(%rip), %r16
+    case 0x488d0d: return 0x488b0d; // lea 0(%rip), %r17 -> mov 0(%rip), %r17
+    case 0x488d15: return 0x488b15; // lea 0(%rip), %r18 -> mov 0(%rip), %r18
+    case 0x488d1d: return 0x488b1d; // lea 0(%rip), %r19 -> mov 0(%rip), %r19
+    case 0x488d25: return 0x488b25; // lea 0(%rip), %r20 -> mov 0(%rip), %r20
+    case 0x488d2d: return 0x488b2d; // lea 0(%rip), %r21 -> mov 0(%rip), %r21
+    case 0x488d35: return 0x488b35; // lea 0(%rip), %r22 -> mov 0(%rip), %r22
+    case 0x488d3d: return 0x488b3d; // lea 0(%rip), %r23 -> mov 0(%rip), %r23
+    case 0x4c8d05: return 0x4c8b05; // lea 0(%rip), %r24 -> mov 0(%rip), %r24
+    case 0x4c8d0d: return 0x4c8b0d; // lea 0(%rip), %r25 -> mov 0(%rip), %r25
+    case 0x4c8d15: return 0x4c8b15; // lea 0(%rip), %r26 -> mov 0(%rip), %r26
+    case 0x4c8d1d: return 0x4c8b1d; // lea 0(%rip), %r27 -> mov 0(%rip), %r27
+    case 0x4c8d25: return 0x4c8b25; // lea 0(%rip), %r28 -> mov 0(%rip), %r28
+    case 0x4c8d2d: return 0x4c8b2d; // lea 0(%rip), %r29 -> mov 0(%rip), %r29
+    case 0x4c8d35: return 0x4c8b35; // lea 0(%rip), %r30 -> mov 0(%rip), %r30
+    case 0x4c8d3d: return 0x4c8b3d; // lea 0(%rip), %r31 -> mov 0(%rip), %r31
+    }
   }
   return 0;
 }
 
-static u32 relax_tlsdesc_to_ie(u8 *loc) {
-  switch ((loc[0] << 16) | (loc[1] << 8) | loc[2]) {
-  case 0x488d05: return 0x488b05; // lea 0(%rip), %rax -> mov 0(%rip), %rax
-  case 0x488d0d: return 0x488b0d; // lea 0(%rip), %rcx -> mov 0(%rip), %rcx
-  case 0x488d15: return 0x488b15; // lea 0(%rip), %rdx -> mov 0(%rip), %rdx
-  case 0x488d1d: return 0x488b1d; // lea 0(%rip), %rbx -> mov 0(%rip), %rbx
-  case 0x488d25: return 0x488b25; // lea 0(%rip), %rsp -> mov 0(%rip), %rsp
-  case 0x488d2d: return 0x488b2d; // lea 0(%rip), %rbp -> mov 0(%rip), %rbp
-  case 0x488d35: return 0x488b35; // lea 0(%rip), %rsi -> mov 0(%rip), %rsi
-  case 0x488d3d: return 0x488b3d; // lea 0(%rip), %rdi -> mov 0(%rip), %rdi
-  case 0x4c8d05: return 0x4c8b05; // lea 0(%rip), %r8  -> mov 0(%rip), %r8
-  case 0x4c8d0d: return 0x4c8b0d; // lea 0(%rip), %r9  -> mov 0(%rip), %r9
-  case 0x4c8d15: return 0x4c8b15; // lea 0(%rip), %r10 -> mov 0(%rip), %r10
-  case 0x4c8d1d: return 0x4c8b1d; // lea 0(%rip), %r11 -> mov 0(%rip), %r11
-  case 0x4c8d25: return 0x4c8b25; // lea 0(%rip), %r12 -> mov 0(%rip), %r12
-  case 0x4c8d2d: return 0x4c8b2d; // lea 0(%rip), %r13 -> mov 0(%rip), %r13
-  case 0x4c8d35: return 0x4c8b35; // lea 0(%rip), %r14 -> mov 0(%rip), %r14
-  case 0x4c8d3d: return 0x4c8b3d; // lea 0(%rip), %r15 -> mov 0(%rip), %r15
-  }
-  return 0;
-}
-
-static u32 relax_tlsdesc_to_le(u8 *loc) {
-  switch ((loc[0] << 16) | (loc[1] << 8) | loc[2]) {
-  case 0x488d05: return 0x48c7c0; // lea 0(%rip), %rax -> mov $0, %rax
-  case 0x488d0d: return 0x48c7c1; // lea 0(%rip), %rcx -> mov $0, %rcx
-  case 0x488d15: return 0x48c7c2; // lea 0(%rip), %rdx -> mov $0, %rdx
-  case 0x488d1d: return 0x48c7c3; // lea 0(%rip), %rbx -> mov $0, %rbx
-  case 0x488d25: return 0x48c7c4; // lea 0(%rip), %rsp -> mov $0, %rsp
-  case 0x488d2d: return 0x48c7c5; // lea 0(%rip), %rbp -> mov $0, %rbp
-  case 0x488d35: return 0x48c7c6; // lea 0(%rip), %rsi -> mov $0, %rsi
-  case 0x488d3d: return 0x48c7c7; // lea 0(%rip), %rdi -> mov $0, %rdi
-  case 0x4c8d05: return 0x49c7c0; // lea 0(%rip), %r8  -> mov $0, %r8
-  case 0x4c8d0d: return 0x49c7c1; // lea 0(%rip), %r9  -> mov $0, %r9
-  case 0x4c8d15: return 0x49c7c2; // lea 0(%rip), %r10 -> mov $0, %r10
-  case 0x4c8d1d: return 0x49c7c3; // lea 0(%rip), %r11 -> mov $0, %r11
-  case 0x4c8d25: return 0x49c7c4; // lea 0(%rip), %r12 -> mov $0, %r12
-  case 0x4c8d2d: return 0x49c7c5; // lea 0(%rip), %r13 -> mov $0, %r13
-  case 0x4c8d35: return 0x49c7c6; // lea 0(%rip), %r14 -> mov $0, %r14
-  case 0x4c8d3d: return 0x49c7c7; // lea 0(%rip), %r15 -> mov $0, %r15
+static u32 relax_tlsdesc_to_le(u8 *loc, const ElfRel<E> &rel) {
+  if (rel.r_type == R_X86_64_GOTPC32_TLSDESC) {
+    switch ((loc[-3] << 16) | (loc[-2] << 8) | loc[-1]) {
+    case 0x488d05: return 0x48c7c0; // lea 0(%rip), %rax -> mov $0, %rax
+    case 0x488d0d: return 0x48c7c1; // lea 0(%rip), %rcx -> mov $0, %rcx
+    case 0x488d15: return 0x48c7c2; // lea 0(%rip), %rdx -> mov $0, %rdx
+    case 0x488d1d: return 0x48c7c3; // lea 0(%rip), %rbx -> mov $0, %rbx
+    case 0x488d25: return 0x48c7c4; // lea 0(%rip), %rsp -> mov $0, %rsp
+    case 0x488d2d: return 0x48c7c5; // lea 0(%rip), %rbp -> mov $0, %rbp
+    case 0x488d35: return 0x48c7c6; // lea 0(%rip), %rsi -> mov $0, %rsi
+    case 0x488d3d: return 0x48c7c7; // lea 0(%rip), %rdi -> mov $0, %rdi
+    case 0x4c8d05: return 0x49c7c0; // lea 0(%rip), %r8  -> mov $0, %r8
+    case 0x4c8d0d: return 0x49c7c1; // lea 0(%rip), %r9  -> mov $0, %r9
+    case 0x4c8d15: return 0x49c7c2; // lea 0(%rip), %r10 -> mov $0, %r10
+    case 0x4c8d1d: return 0x49c7c3; // lea 0(%rip), %r11 -> mov $0, %r11
+    case 0x4c8d25: return 0x49c7c4; // lea 0(%rip), %r12 -> mov $0, %r12
+    case 0x4c8d2d: return 0x49c7c5; // lea 0(%rip), %r13 -> mov $0, %r13
+    case 0x4c8d35: return 0x49c7c6; // lea 0(%rip), %r14 -> mov $0, %r14
+    case 0x4c8d3d: return 0x49c7c7; // lea 0(%rip), %r15 -> mov $0, %r15
+    }
+  } else {
+    assert(rel.r_type == R_X86_64_CODE_4_GOTPC32_TLSDESC);
+    switch ((loc[-3] << 16) | (loc[-2] << 8) | loc[-1]) {
+    case 0x488d05: return 0x18c7c0; // lea 0(%rip), %r16 -> mov $0, %r16
+    case 0x488d0d: return 0x18c7c1; // lea 0(%rip), %r17 -> mov $0, %r17
+    case 0x488d15: return 0x18c7c2; // lea 0(%rip), %r18 -> mov $0, %r18
+    case 0x488d1d: return 0x18c7c3; // lea 0(%rip), %r19 -> mov $0, %r19
+    case 0x488d25: return 0x18c7c4; // lea 0(%rip), %r20 -> mov $0, %r20
+    case 0x488d2d: return 0x18c7c5; // lea 0(%rip), %r21 -> mov $0, %r21
+    case 0x488d35: return 0x18c7c6; // lea 0(%rip), %r22 -> mov $0, %r22
+    case 0x488d3d: return 0x18c7c7; // lea 0(%rip), %r23 -> mov $0, %r23
+    case 0x4c8d05: return 0x19c7c0; // lea 0(%rip), %r24 -> mov $0, %r24
+    case 0x4c8d0d: return 0x19c7c1; // lea 0(%rip), %r25 -> mov $0, %r25
+    case 0x4c8d15: return 0x19c7c2; // lea 0(%rip), %r26 -> mov $0, %r26
+    case 0x4c8d1d: return 0x19c7c3; // lea 0(%rip), %r27 -> mov $0, %r27
+    case 0x4c8d25: return 0x19c7c4; // lea 0(%rip), %r28 -> mov $0, %r28
+    case 0x4c8d2d: return 0x19c7c5; // lea 0(%rip), %r29 -> mov $0, %r29
+    case 0x4c8d35: return 0x19c7c6; // lea 0(%rip), %r30 -> mov $0, %r30
+    case 0x4c8d3d: return 0x19c7c7; // lea 0(%rip), %r31 -> mov $0, %r31
+    }
   }
   return 0;
 }
@@ -226,7 +293,7 @@ static u32 relax_tlsdesc_to_le(u8 *loc) {
 // Rewrite a function call to __tls_get_addr to a cheaper instruction
 // sequence. We can do this when we know the thread-local variable's TP-
 // relative address at link-time.
-static void relax_gd_to_le(u8 *loc, ElfRel<E> rel, u64 val) {
+static void relax_gd_to_le(u8 *loc, const ElfRel<E> &rel, u64 val) {
   switch (rel.r_type) {
   case R_X86_64_PLT32:
   case R_X86_64_PC32:
@@ -270,7 +337,7 @@ static void relax_gd_to_le(u8 *loc, ElfRel<E> rel, u64 val) {
   }
 }
 
-static void relax_gd_to_ie(u8 *loc, ElfRel<E> rel, u64 val) {
+static void relax_gd_to_ie(u8 *loc, const ElfRel<E> &rel, u64 val) {
   switch (rel.r_type) {
   case R_X86_64_PLT32:
   case R_X86_64_PC32:
@@ -303,7 +370,7 @@ static void relax_gd_to_ie(u8 *loc, ElfRel<E> rel, u64 val) {
 // sequence. The difference from relax_gd_to_le is that we are materializing
 // the address of the beginning of TLS block instead of an address of a
 // particular thread-local variable.
-static void relax_ld_to_le(u8 *loc, ElfRel<E> rel, i64 tls_size) {
+static void relax_ld_to_le(u8 *loc, const ElfRel<E> &rel, i64 tls_size) {
   switch (rel.r_type) {
   case R_X86_64_PLT32:
   case R_X86_64_PC32: {
@@ -375,11 +442,14 @@ void InputSection<E>::apply_reloc_alloc(Context<E> &ctx, u8 *base) {
     Symbol<E> &sym = *file.symbols[rel.r_sym];
     u8 *loc = base + rel.r_offset;
 
+    u64 S = sym.get_addr(ctx);
+    u64 A = rel.r_addend;
+    u64 P = get_addr() + rel.r_offset;
+    u64 G = sym.get_got_addr(ctx) - ctx.gotplt->shdr.sh_addr;
+    u64 GOT = ctx.gotplt->shdr.sh_addr;
+
     auto check = [&](i64 val, i64 lo, i64 hi) {
-      if (val < lo || hi <= val)
-        Error(ctx) << *this << ": relocation " << rel << " against "
-                   << sym << " out of range: " << val << " is not in ["
-                   << lo << ", " << hi << ")";
+      check_range(ctx, i, val, lo, hi);
     };
 
     auto write32 = [&](u64 val) {
@@ -392,12 +462,6 @@ void InputSection<E>::apply_reloc_alloc(Context<E> &ctx, u8 *base) {
       *(ul32 *)loc = val;
     };
 
-    u64 S = sym.get_addr(ctx);
-    u64 A = rel.r_addend;
-    u64 P = get_addr() + rel.r_offset;
-    u64 G = sym.get_got_addr(ctx) - ctx.gotplt->shdr.sh_addr;
-    u64 GOT = ctx.gotplt->shdr.sh_addr;
-
     switch (rel.r_type) {
     case R_X86_64_8:
       check(S + A, 0, 1 << 8);
@@ -453,30 +517,16 @@ void InputSection<E>::apply_reloc_alloc(Context<E> &ctx, u8 *base) {
       *(ul64 *)loc = G + GOT + A - P;
       break;
     case R_X86_64_GOTPCRELX:
+    case R_X86_64_REX_GOTPCRELX:
+    case R_X86_64_CODE_4_GOTPCRELX:
       // We always want to relax GOTPCRELX relocs even if --no-relax
       // was given because some static PIE runtime code depends on these
       // relaxations.
-      if (sym.is_pcrel_linktime_const(ctx)) {
-        u32 insn = relax_gotpcrelx(loc - 2);
-        i64 val = S + A - P;
-        if (insn && (i32)val == val) {
+      if (sym.is_pcrel_linktime_const(ctx) && is_int(S + A - P, 32)) {
+        if (u32 insn = relax_gotpcrelx(loc, rel)) {
           loc[-2] = insn >> 8;
           loc[-1] = insn;
-          *(ul32 *)loc = val;
-          break;
-        }
-      }
-      write32s(G + GOT + A - P);
-      break;
-    case R_X86_64_REX_GOTPCRELX:
-      if (sym.is_pcrel_linktime_const(ctx)) {
-        u32 insn = relax_rex_gotpcrelx(loc - 3);
-        i64 val = S + A - P;
-        if (insn && (i32)val == val) {
-          loc[-3] = insn >> 16;
-          loc[-2] = insn >> 8;
-          loc[-1] = insn;
-          *(ul32 *)loc = val;
+          *(ul32 *)loc = S + A - P;
           break;
         }
       }
@@ -509,18 +559,22 @@ void InputSection<E>::apply_reloc_alloc(Context<E> &ctx, u8 *base) {
       *(ul64 *)loc = S + A - ctx.tp_addr;
       break;
     case R_X86_64_GOTTPOFF:
+    case R_X86_64_CODE_4_GOTTPOFF:
       if (sym.has_gottp(ctx)) {
         write32s(sym.get_gottp_addr(ctx) + A - P);
       } else {
-        u32 insn = relax_gottpoff(loc - 3);
+        u32 insn = relax_gottpoff(loc, rel);
         loc[-3] = insn >> 16;
         loc[-2] = insn >> 8;
         loc[-1] = insn;
         write32s(S - ctx.tp_addr);
-        assert(A == -4);
       }
       break;
+    case R_X86_64_CODE_6_GOTTPOFF:
+      write32s(sym.get_gottp_addr(ctx) + A - P);
+      break;
     case R_X86_64_GOTPC32_TLSDESC:
+    case R_X86_64_CODE_4_GOTPC32_TLSDESC:
       // x86-64 TLSDESC uses the following code sequence to materialize
       // a TP-relative address in %rax.
       //
@@ -552,17 +606,17 @@ void InputSection<E>::apply_reloc_alloc(Context<E> &ctx, u8 *base) {
       if (sym.has_tlsdesc(ctx)) {
         write32s(sym.get_tlsdesc_addr(ctx) + A - P);
       } else if (sym.has_gottp(ctx)) {
-        u32 insn = relax_tlsdesc_to_ie(loc - 3);
+        u32 insn = relax_tlsdesc_to_ie(loc, rel);
         if (!insn)
-          Fatal(ctx) << *this << ": illegal instruction sequence for TLSDESC";
+          Fatal(ctx) << *this << ": illegal instruction sequence for " << rel;
         loc[-3] = insn >> 16;
         loc[-2] = insn >> 8;
         loc[-1] = insn;
         write32s(sym.get_gottp_addr(ctx) + A - P);
       } else {
-        u32 insn = relax_tlsdesc_to_le(loc - 3);
+        u32 insn = relax_tlsdesc_to_le(loc, rel);
         if (!insn)
-          Fatal(ctx) << *this << ": illegal instruction sequence for TLSDESC";
+          Fatal(ctx) << *this << ": illegal instruction sequence for " << rel;
         loc[-3] = insn >> 16;
         loc[-2] = insn >> 8;
         loc[-1] = insn;
@@ -570,9 +624,7 @@ void InputSection<E>::apply_reloc_alloc(Context<E> &ctx, u8 *base) {
       }
       break;
     case R_X86_64_TLSDESC_CALL:
-      if (sym.has_tlsdesc(ctx)) {
-        // Do nothing
-      } else {
+      if (!sym.has_tlsdesc(ctx)) {
         // call *(%rax) -> nop
         loc[0] = 0x66;
         loc[1] = 0x90;
@@ -614,11 +666,15 @@ void InputSection<E>::apply_reloc_nonalloc(Context<E> &ctx, u8 *base) {
     Symbol<E> &sym = *file.symbols[rel.r_sym];
     u8 *loc = base + rel.r_offset;
 
+    SectionFragment<E> *frag;
+    i64 frag_addend;
+    std::tie(frag, frag_addend) = get_fragment(ctx, rel);
+
+    u64 S = frag ? frag->get_addr(ctx) : sym.get_addr(ctx);
+    u64 A = frag ? frag_addend : (i64)rel.r_addend;
+
     auto check = [&](i64 val, i64 lo, i64 hi) {
-      if (val < lo || hi <= val)
-        Error(ctx) << *this << ": relocation " << rel << " against "
-                   << sym << " out of range: " << val << " is not in ["
-                   << lo << ", " << hi << ")";
+      check_range(ctx, i, val, lo, hi);
     };
 
     auto write32 = [&](u64 val) {
@@ -631,13 +687,6 @@ void InputSection<E>::apply_reloc_nonalloc(Context<E> &ctx, u8 *base) {
       *(ul32 *)loc = val;
     };
 
-    SectionFragment<E> *frag;
-    i64 frag_addend;
-    std::tie(frag, frag_addend) = get_fragment(ctx, rel);
-
-    u64 S = frag ? frag->get_addr(ctx) : sym.get_addr(ctx);
-    u64 A = frag ? frag_addend : (i64)rel.r_addend;
-
     switch (rel.r_type) {
     case R_X86_64_8:
       check(S + A, 0, 1 << 8);
@@ -750,6 +799,7 @@ void InputSection<E>::scan_relocations(Context<E> &ctx) {
     case R_X86_64_GOTPCREL64:
     case R_X86_64_GOTPCRELX:
     case R_X86_64_REX_GOTPCRELX:
+    case R_X86_64_CODE_4_GOTPCRELX:
       sym.flags |= NEEDS_GOT;
       break;
     case R_X86_64_PLT32:
@@ -778,12 +828,13 @@ void InputSection<E>::scan_relocations(Context<E> &ctx) {
         ctx.needs_tlsld = true;
       break;
     case R_X86_64_GOTTPOFF:
-      if (ctx.arg.relax && relax_gottpoff(loc - 3) &&
-          sym.is_tprel_linktime_const(ctx)) {
-        // do nothing
-      } else {
+    case R_X86_64_CODE_4_GOTTPOFF:
+      if (!ctx.arg.relax || !sym.is_tprel_linktime_const(ctx) ||
+          !relax_gottpoff(loc, rel))
         sym.flags |= NEEDS_GOTTP;
-      }
+      break;
+    case R_X86_64_CODE_6_GOTTPOFF:
+      sym.flags |= NEEDS_GOTTP;
       break;
     case R_X86_64_TLSDESC_CALL:
       scan_tlsdesc(ctx, sym);
@@ -799,6 +850,7 @@ void InputSection<E>::scan_relocations(Context<E> &ctx) {
     case R_X86_64_SIZE32:
     case R_X86_64_SIZE64:
     case R_X86_64_GOTPC32_TLSDESC:
+    case R_X86_64_CODE_4_GOTPC32_TLSDESC:
       break;
     default:
       Error(ctx) << *this << ": unknown relocation: " << rel;

src/cmdline.cc

@@ -41,6 +41,8 @@ Options:
   -N, --omagic                Do not page align data; do not make text readonly
     --no-omagic
   -O NUMBER                   Ignored
+  -P AUDITLIB, --depaudit AUDITLIB
+                              Set DT_DEPAUDIT to the specified value
   -S, --strip-debug           Strip .debug_* sections
   -T FILE, --script FILE      Read linker script
   -X, --discard-locals        Discard temporary local symbols
@@ -76,6 +78,7 @@ Options:
     --no-apply-dynamic-relocs
   --as-needed                 Only set DT_NEEDED if used
     --no-as-needed
+  --audit LIBNAME             Set DT_AUDIT to the specified value
   --build-id [none,md5,sha1,sha256,fast,uuid,HEXSTRING]
                               Generate build ID
     --no-build-id
@@ -403,7 +406,7 @@ static std::vector<u8> parse_hex_build_id(Context<E> &ctx, std::string_view arg)
 
 template <typename E>
 static std::string
-parse_encoded_package_metadata(Context<E> &ctx, std::string_view arg) {
+parse_package_metadata(Context<E> &ctx, std::string_view arg) {
   auto flags = std::regex_constants::optimize | std::regex_constants::ECMAScript;
   static std::regex re(R"(([^%]|%[0-9a-fA-F][0-9a-fA-F])*)", flags);
 
@@ -586,6 +589,7 @@ std::vector<std::string> parse_nonpositional_args(Context<E> &ctx) {
   std::optional<SeparateCodeKind> z_separate_code;
   std::optional<bool> report_undefined;
   std::optional<bool> z_relro;
+  std::optional<bool> z_dynamic_undefined_weak;
   std::optional<std::string> separate_debug_file;
   std::optional<u64> shuffle_sections_seed;
   std::unordered_set<std::string_view> rpaths;
@@ -714,8 +718,11 @@ std::vector<std::string> parse_nonpositional_args(Context<E> &ctx) {
                << "   elf64briscv\n   elf32lriscv\n   elf32briscv\n"
                << "   elf32ppc\n   elf64ppc\n   elf64lppc\n   elf64_s390\n"
                << "   elf64_sparc\n   m68kelf\n   shlelf_linux\n"
-               << "   shelf_linux\n   elf64loongarch\n   elf32loongarch";
+               << "   shelf_linux\n   elf64loongarch\n   elf32loongarch\n"
+               << "   arclinux";
       version_shown = true;
+    } else if (read_arg("mllvm")) {
+      ctx.arg.plugin_opt.emplace_back(arg);
     } else if (read_arg("m")) {
       if (arg == "elf_x86_64") {
         ctx.arg.emulation = X86_64::name;
@@ -755,6 +762,8 @@ std::vector<std::string> parse_nonpositional_args(Context<E> &ctx) {
         ctx.arg.emulation = LOONGARCH64::name;
       } else if (arg == "elf32loongarch") {
         ctx.arg.emulation = LOONGARCH32::name;
+      } else if (arg == "arclinux") {
+        ctx.arg.emulation = ARC::name;
       } else {
         Fatal(ctx) << "unknown -m argument: " << arg;
       }
@@ -887,9 +896,16 @@ std::vector<std::string> parse_nonpositional_args(Context<E> &ctx) {
       } else {
         Fatal(ctx) << "invalid --hash-style argument: " << arg;
       }
-    } else if (read_arg("soname") ||
-               read_arg("h")) {
+    } else if (read_arg("soname") || read_arg("h")) {
       ctx.arg.soname = arg;
+    } else if (read_arg("audit")) {
+      if (!ctx.arg.audit.empty())
+        ctx.arg.audit += ':';
+      ctx.arg.audit += std::string(arg);
+    } else if (read_arg("depaudit") || read_arg("P")) {
+      if (!ctx.arg.depaudit.empty())
+        ctx.arg.depaudit += ':';
+      ctx.arg.depaudit += std::string(arg);
     } else if (read_flag("allow-multiple-definition")) {
       ctx.arg.allow_multiple_definition = true;
     } else if (read_flag("apply-dynamic-relocs")) {
@@ -932,7 +948,7 @@ std::vector<std::string> parse_nonpositional_args(Context<E> &ctx) {
                read_z_flag("nopack-relative-relocs")) {
       ctx.arg.pack_dyn_relocs_relr = false;
     } else if (read_arg("package-metadata")) {
-      ctx.arg.package_metadata = parse_encoded_package_metadata(ctx, arg);
+      ctx.arg.package_metadata = parse_package_metadata(ctx, arg);
     } else if (read_flag("stats")) {
       ctx.arg.stats = true;
       Counter::enabled = true;
@@ -1087,9 +1103,9 @@ std::vector<std::string> parse_nonpositional_args(Context<E> &ctx) {
     } else if (read_z_arg("stack-size")) {
       ctx.arg.z_stack_size = parse_number(ctx, "-z stack-size", arg);
     } else if (read_z_flag("dynamic-undefined-weak")) {
-      ctx.arg.z_dynamic_undefined_weak = true;
+      z_dynamic_undefined_weak = true;
     } else if (read_z_flag("nodynamic-undefined-weak")) {
-      ctx.arg.z_dynamic_undefined_weak = false;
+      z_dynamic_undefined_weak = false;
     } else if (read_z_flag("sectionheader")) {
       ctx.arg.z_sectionheader = true;
     } else if (read_z_flag("nosectionheader")) {
@@ -1128,6 +1144,10 @@ std::vector<std::string> parse_nonpositional_args(Context<E> &ctx) {
       ctx.arg.print_gc_sections = true;
     } else if (read_flag("no-print-gc-sections")) {
       ctx.arg.print_gc_sections = false;
+    } else if (read_arg("discard-section")) {
+      ctx.arg.discard_section.insert(arg);
+    } else if (read_arg("no-discard-section")) {
+      ctx.arg.discard_section.erase(arg);
     } else if (read_arg("icf")) {
       if (arg == "all") {
         ctx.arg.icf = true;
@@ -1329,6 +1349,8 @@ std::vector<std::string> parse_nonpositional_args(Context<E> &ctx) {
     } else if (read_z_arg("common-page-size")) {
     } else if (read_flag("no-keep-memory")) {
     } else if (read_arg("max-cache-size")) {
+    } else if (read_flag("mmap-output-file")) {
+    } else if (read_flag("no-mmap-output-file")) {
     } else if (read_arg("version-script")) {
       version_scripts.push_back(arg);
     } else if (read_arg("dynamic-list")) {
@@ -1427,6 +1449,12 @@ std::vector<std::string> parse_nonpositional_args(Context<E> &ctx) {
   else if (!ctx.arg.section_order.empty())
     ctx.arg.z_separate_code = SEPARATE_LOADABLE_SEGMENTS;
 
+  // `-z dynamic-undefined-weak` is enabled by default for DSOs.
+  if (z_dynamic_undefined_weak)
+    ctx.arg.z_dynamic_undefined_weak = *z_dynamic_undefined_weak;
+  else
+    ctx.arg.z_dynamic_undefined_weak = ctx.arg.shared;
+
   // --section-order implies `-z norelro`
   if (z_relro)
     ctx.arg.z_relro = *z_relro;

src/elf.cc

@@ -53,6 +53,15 @@ std::string rel_to_string<X86_64>(u32 r_type) {
   CASE(R_X86_64_IRELATIVE);
   CASE(R_X86_64_GOTPCRELX);
   CASE(R_X86_64_REX_GOTPCRELX);
+  CASE(R_X86_64_CODE_4_GOTPCRELX);
+  CASE(R_X86_64_CODE_4_GOTTPOFF);
+  CASE(R_X86_64_CODE_4_GOTPC32_TLSDESC);
+  CASE(R_X86_64_CODE_5_GOTPCRELX);
+  CASE(R_X86_64_CODE_5_GOTTPOFF);
+  CASE(R_X86_64_CODE_5_GOTPC32_TLSDESC);
+  CASE(R_X86_64_CODE_6_GOTPCRELX);
+  CASE(R_X86_64_CODE_6_GOTTPOFF);
+  CASE(R_X86_64_CODE_6_GOTPC32_TLSDESC);
   }
   return unknown_type(r_type);
 }
@@ -619,6 +628,7 @@ std::string rel_to_string<PPC64V1>(u32 r_type) {
   CASE(R_PPC64_DTPREL16_HIGH);
   CASE(R_PPC64_DTPREL16_HIGHA);
   CASE(R_PPC64_REL24_NOTOC);
+  CASE(R_PPC64_ENTRY);
   CASE(R_PPC64_PLTSEQ);
   CASE(R_PPC64_PLTCALL);
   CASE(R_PPC64_PLTSEQ_NOTOC);
@@ -1028,4 +1038,73 @@ std::string rel_to_string<LOONGARCH32>(u32 r_type) {
   return rel_to_string<LOONGARCH64>(r_type);
 }
 
+template <>
+std::string rel_to_string<ARC>(u32 r_type) {
+  switch (r_type) {
+  CASE(R_ARC_8);
+  CASE(R_ARC_16);
+  CASE(R_ARC_24);
+  CASE(R_ARC_32);
+  CASE(R_ARC_N8);
+  CASE(R_ARC_N16);
+  CASE(R_ARC_N24);
+  CASE(R_ARC_N32);
+  CASE(R_ARC_SDA);
+  CASE(R_ARC_SECTOFF);
+  CASE(R_ARC_S21H_PCREL);
+  CASE(R_ARC_S21W_PCREL);
+  CASE(R_ARC_S25H_PCREL);
+  CASE(R_ARC_S25W_PCREL);
+  CASE(R_ARC_SDA32);
+  CASE(R_ARC_SDA_LDST);
+  CASE(R_ARC_SDA_LDST1);
+  CASE(R_ARC_SDA_LDST2);
+  CASE(R_ARC_SDA16_LD);
+  CASE(R_ARC_SDA16_LD1);
+  CASE(R_ARC_SDA16_LD2);
+  CASE(R_ARC_S13_PCREL);
+  CASE(R_ARC_W);
+  CASE(R_ARC_32_ME);
+  CASE(R_ARC_32_ME_S);
+  CASE(R_ARC_N32_ME);
+  CASE(R_ARC_SECTOFF_ME);
+  CASE(R_ARC_SDA32_ME);
+  CASE(R_ARC_W_ME);
+  CASE(R_ARC_SECTOFF_ME_1);
+  CASE(R_ARC_SECTOFF_ME_2);
+  CASE(R_ARC_SECTOFF_1);
+  CASE(R_ARC_SECTOFF_2);
+  CASE(R_ARC_SDA_12);
+  CASE(R_ARC_SDA16_ST2);
+  CASE(R_ARC_32_PCREL);
+  CASE(R_ARC_PC32);
+  CASE(R_ARC_GOT32);
+  CASE(R_ARC_GOTPC32);
+  CASE(R_ARC_PLT32);
+  CASE(R_ARC_COPY);
+  CASE(R_ARC_GLOB_DAT);
+  CASE(R_ARC_JMP_SLOT);
+  CASE(R_ARC_RELATIVE);
+  CASE(R_ARC_GOTOFF);
+  CASE(R_ARC_GOTPC);
+  CASE(R_ARC_S21W_PCREL_PLT);
+  CASE(R_ARC_S25H_PCREL_PLT);
+  CASE(R_ARC_JLI_SECTOFF);
+  CASE(R_ARC_TLS_DTPMOD);
+  CASE(R_ARC_TLS_TPOFF);
+  CASE(R_ARC_TLS_GD_GOT);
+  CASE(R_ARC_TLS_GD_LD);
+  CASE(R_ARC_TLS_GD_CALL);
+  CASE(R_ARC_TLS_IE_GOT);
+  CASE(R_ARC_TLS_DTPOFF);
+  CASE(R_ARC_TLS_DTPOFF_S9);
+  CASE(R_ARC_TLS_LE_S9);
+  CASE(R_ARC_TLS_LE_32);
+  CASE(R_ARC_S25W_PCREL_PLT);
+  CASE(R_ARC_S21H_PCREL_PLT);
+  CASE(R_ARC_NPS_CMEM16);
+  }
+  return unknown_type(r_type);
+}
+
 } // namespace mold

src/elf.h

@@ -28,6 +28,7 @@ struct SH4LE;
 struct SH4BE;
 struct LOONGARCH64;
 struct LOONGARCH32;
+struct ARC;
 
 template <typename E> struct ElfSym;
 template <typename E> struct ElfShdr;
@@ -78,6 +79,7 @@ enum : u32 {
   SHT_GROUP = 17,
   SHT_SYMTAB_SHNDX = 18,
   SHT_RELR = 19,
+  SHT_CREL = 0x40000014,
   SHT_LOOS = 0x60000000,
   SHT_LLVM_ADDRSIG = 0x6fff4c03,
   SHT_GNU_HASH = 0x6ffffff6,
@@ -87,6 +89,7 @@ enum : u32 {
   SHT_HIOS = 0x6fffffff,
   SHT_X86_64_UNWIND = 0x70000001,
   SHT_ARM_EXIDX = 0x70000001,
+  SHT_ARC_ATTRIBUTES = 0x70000001,
   SHT_ARM_ATTRIBUTES = 0x70000003,
   SHT_RISCV_ATTRIBUTES = 0x70000003,
   SHT_LOUSER = 0x80000000,
@@ -234,6 +237,7 @@ enum : u32 {
   EM_SPARC64 = 43,
   EM_X86_64 = 62,
   EM_AARCH64 = 183,
+  EM_ARC_COMPACT2 = 195,
   EM_RISCV = 243,
   EM_LOONGARCH = 258,
 };
@@ -284,6 +288,8 @@ enum : u32 {
   DT_RELR = 36,
   DT_RELRENT = 37,
   DT_GNU_HASH = 0x6ffffef5,
+  DT_DEPAUDIT = 0x6ffffefb,
+  DT_AUDIT = 0x6ffffefc,
   DT_VERSYM = 0x6ffffff0,
   DT_RELACOUNT = 0x6ffffff9,
   DT_RELCOUNT = 0x6ffffffa,
@@ -452,6 +458,15 @@ enum : u32 {
   R_X86_64_IRELATIVE = 37,
   R_X86_64_GOTPCRELX = 41,
   R_X86_64_REX_GOTPCRELX = 42,
+  R_X86_64_CODE_4_GOTPCRELX = 43,
+  R_X86_64_CODE_4_GOTTPOFF = 44,
+  R_X86_64_CODE_4_GOTPC32_TLSDESC = 45,
+  R_X86_64_CODE_5_GOTPCRELX = 46,
+  R_X86_64_CODE_5_GOTTPOFF = 47,
+  R_X86_64_CODE_5_GOTPC32_TLSDESC = 48,
+  R_X86_64_CODE_6_GOTPCRELX = 49,
+  R_X86_64_CODE_6_GOTTPOFF = 50,
+  R_X86_64_CODE_6_GOTPC32_TLSDESC = 51,
 };
 
 enum : u32 {
@@ -975,6 +990,7 @@ enum : u32 {
   R_PPC64_DTPREL16_HIGH = 114,
   R_PPC64_DTPREL16_HIGHA = 115,
   R_PPC64_REL24_NOTOC = 116,
+  R_PPC64_ENTRY = 118,
   R_PPC64_PLTSEQ = 119,
   R_PPC64_PLTCALL = 120,
   R_PPC64_PLTSEQ_NOTOC = 121,
@@ -1349,6 +1365,71 @@ enum : u32 {
   R_LARCH_TLS_DESC_PCREL20_S2 = 126,
 };
 
+enum : u32 {
+  R_ARC_8 = 1,
+  R_ARC_16 = 2,
+  R_ARC_24 = 3,
+  R_ARC_32 = 4,
+  R_ARC_N8 = 8,
+  R_ARC_N16 = 9,
+  R_ARC_N24 = 10,
+  R_ARC_N32 = 11,
+  R_ARC_SDA = 12,
+  R_ARC_SECTOFF = 13,
+  R_ARC_S21H_PCREL = 14,
+  R_ARC_S21W_PCREL = 15,
+  R_ARC_S25H_PCREL = 16,
+  R_ARC_S25W_PCREL = 17,
+  R_ARC_SDA32 = 18,
+  R_ARC_SDA_LDST = 19,
+  R_ARC_SDA_LDST1 = 20,
+  R_ARC_SDA_LDST2 = 21,
+  R_ARC_SDA16_LD = 22,
+  R_ARC_SDA16_LD1 = 23,
+  R_ARC_SDA16_LD2 = 24,
+  R_ARC_S13_PCREL = 25,
+  R_ARC_W = 26,
+  R_ARC_32_ME = 27,
+  R_ARC_32_ME_S = 105,
+  R_ARC_N32_ME = 28,
+  R_ARC_SECTOFF_ME = 29,
+  R_ARC_SDA32_ME = 30,
+  R_ARC_W_ME = 31,
+  R_ARC_SECTOFF_ME_1 = 41,
+  R_ARC_SECTOFF_ME_2 = 42,
+  R_ARC_SECTOFF_1 = 43,
+  R_ARC_SECTOFF_2 = 44,
+  R_ARC_SDA_12 = 45,
+  R_ARC_SDA16_ST2 = 48,
+  R_ARC_32_PCREL = 49,
+  R_ARC_PC32 = 50,
+  R_ARC_GOT32 = 59,
+  R_ARC_GOTPC32 = 51,
+  R_ARC_PLT32 = 52,
+  R_ARC_COPY = 53,
+  R_ARC_GLOB_DAT = 54,
+  R_ARC_JMP_SLOT = 55,
+  R_ARC_RELATIVE = 56,
+  R_ARC_GOTOFF = 57,
+  R_ARC_GOTPC = 58,
+  R_ARC_S21W_PCREL_PLT = 60,
+  R_ARC_S25H_PCREL_PLT = 61,
+  R_ARC_JLI_SECTOFF = 63,
+  R_ARC_TLS_DTPMOD = 66,
+  R_ARC_TLS_TPOFF = 68,
+  R_ARC_TLS_GD_GOT = 69,
+  R_ARC_TLS_GD_LD = 70,
+  R_ARC_TLS_GD_CALL = 71,
+  R_ARC_TLS_IE_GOT = 72,
+  R_ARC_TLS_DTPOFF = 67,
+  R_ARC_TLS_DTPOFF_S9 = 73,
+  R_ARC_TLS_LE_S9 = 74,
+  R_ARC_TLS_LE_32 = 75,
+  R_ARC_S25W_PCREL_PLT = 76,
+  R_ARC_S21H_PCREL_PLT = 77,
+  R_ARC_NPS_CMEM16 = 78,
+};
+
 // Returns true if a given relocation is of type used for direct
 // function call.
 template <typename E>
@@ -1812,6 +1893,7 @@ template <typename E> concept is_sh4le = std::same_as<E, SH4LE>;
 template <typename E> concept is_sh4be = std::same_as<E, SH4BE>;
 template <typename E> concept is_loongarch64 = std::same_as<E, LOONGARCH64>;
 template <typename E> concept is_loongarch32 = std::same_as<E, LOONGARCH32>;
+template <typename E> concept is_arc = std::same_as<E, ARC>;
 
 template <typename E> concept is_x86 = is_x86_64<E> || is_i386<E>;
 template <typename E> concept is_arm64 = is_arm64le<E> || is_arm64be<E>;
@@ -1859,7 +1941,7 @@ struct I386 {
   static constexpr u32 e_machine = EM_386;
   static constexpr u32 plt_hdr_size = 16;
   static constexpr u32 plt_size = 16;
-  static constexpr u32 pltgot_size = 16;
+  static constexpr u32 pltgot_size = 8;
   static constexpr u8 filler[] = { 0xcc }; // int3
 
   static constexpr u32 R_COPY = R_386_COPY;
@@ -1912,7 +1994,7 @@ struct ARM32 {
   static constexpr bool is_64 = false;
   static constexpr bool is_le = true;
   static constexpr bool is_rela = false;
-  static constexpr u32 page_size = 4096;
+  static constexpr u32 page_size = 65536;
   static constexpr u32 e_machine = EM_ARM;
   static constexpr u32 plt_hdr_size = 32;
   static constexpr u32 plt_size = 16;
@@ -2215,4 +2297,27 @@ struct LOONGARCH32 {
   static constexpr u32 R_FUNCALL[] = { R_LARCH_B26, R_LARCH_CALL36 };
 };
 
+struct ARC {
+  static constexpr std::string_view name = "arc";
+  static constexpr bool is_64 = false;
+  static constexpr bool is_le = true;
+  static constexpr bool is_rela = true;
+  static constexpr u32 page_size = 8192;
+  static constexpr u32 e_machine = EM_ARC_COMPACT2;
+  static constexpr u32 plt_hdr_size = 24;
+  static constexpr u32 plt_size = 16;
+  static constexpr u32 pltgot_size = 16;
+  static constexpr u8 filler[] = { 0, 0, 0, 0 };
+
+  static constexpr u32 R_COPY = R_ARC_COPY;
+  static constexpr u32 R_GLOB_DAT = R_ARC_GLOB_DAT;
+  static constexpr u32 R_JUMP_SLOT = R_ARC_JMP_SLOT;
+  static constexpr u32 R_ABS = R_ARC_32;
+  static constexpr u32 R_RELATIVE = R_ARC_RELATIVE;
+  static constexpr u32 R_DTPOFF = R_ARC_TLS_DTPOFF;
+  static constexpr u32 R_TPOFF = R_ARC_TLS_TPOFF;
+  static constexpr u32 R_DTPMOD = R_ARC_TLS_DTPMOD;
+  static constexpr u32 R_FUNCALL[] = { R_ARC_S25W_PCREL_PLT };
+};
+
 } // namespace mold

src/filetype.cc

@@ -160,6 +160,8 @@ static std::string_view get_elf_type(u8 *buf) {
     return is_le ? SH4LE::name : SH4BE::name;
   case EM_LOONGARCH:
     return is_64 ? LOONGARCH64::name : LOONGARCH32::name;
+  case EM_ARC_COMPACT2:
+    return ARC::name;
   default:
     return "";
   }

src/gc-sections.cc

@@ -24,7 +24,6 @@ static bool should_keep(const InputSection<E> &isec) {
          type == SHT_INIT_ARRAY ||
          type == SHT_FINI_ARRAY ||
          type == SHT_PREINIT_ARRAY ||
-         (is_arm32<E> && type == SHT_ARM_EXIDX) ||
          name.starts_with(".ctors") ||
          name.starts_with(".dtors") ||
          name.starts_with(".init") ||
@@ -100,34 +99,36 @@ static void visit(Context<E> &ctx, InputSection<E> *isec,
                   tbb::feeder<InputSection<E> *> &feeder, i64 depth) {
   assert(isec->is_visited);
 
+  // Mark a section alive. For better performacne, we don't call
+  // `feeder.add` too often.
+  auto mark = [&](InputSection<E> *sec) {
+    if (mark_section(sec)) {
+      if (depth < 3)
+        visit(ctx, sec, feeder, depth + 1);
+      else
+        feeder.add(sec);
+    }
+  };
+
   // If this is a text section, .eh_frame may contain records
   // describing how to handle exceptions for that function.
   // We want to keep associated .eh_frame records.
   for (FdeRecord<E> &fde : isec->get_fdes())
     for (const ElfRel<E> &rel : fde.get_rels(isec->file).subspan(1))
       if (Symbol<E> *sym = isec->file.symbols[rel.r_sym])
-        if (mark_section(sym->get_input_section()))
-          feeder.add(sym->get_input_section());
+        mark(sym->get_input_section());
 
   for (const ElfRel<E> &rel : isec->get_rels(ctx)) {
-    Symbol<E> &sym = *isec->file.symbols[rel.r_sym];
-
     // Symbol can refer to either a section fragment or an input section.
-    // Mark a fragment as alive.
-    if (SectionFragment<E> *frag = sym.get_frag()) {
+    Symbol<E> &sym = *isec->file.symbols[rel.r_sym];
+    if (SectionFragment<E> *frag = sym.get_frag())
       frag->is_alive = true;
-      continue;
-    }
-
-    // Mark a section alive. For better performacne, we don't call
-    // `feeder.add` too often.
-    if (mark_section(sym.get_input_section())) {
-      if (depth < 3)
-        visit(ctx, sym.get_input_section(), feeder, depth + 1);
-      else
-        feeder.add(sym.get_input_section());
-    }
+    else
+      mark(sym.get_input_section());
   }
+
+  if constexpr (is_arm32<E>)
+    mark(isec->extra.exidx);
 }
 
 // Mark all reachable sections

src/gdb-index.cc

@@ -620,7 +620,7 @@ static std::vector<Compunit> read_compunits(Context<E> &ctx) {
   // Uniquify elements because GCC 11 seems to emit one record for each
   // comdat group which results in having a lot of duplicate records.
   tbb::parallel_for_each(cus, [](Compunit &cu) {
-    sort(cu.nametypes);
+    ranges::stable_sort(cu.nametypes);
     remove_duplicates(cu.nametypes);
   });
 

src/input-files.cc

@@ -93,12 +93,6 @@ InputFile<E>::InputFile(Context<E> &ctx, MappedFile *mf)
   shstrtab = this->get_string(ctx, shstrtab_idx);
 }
 
-template <typename E>
-std::span<ElfPhdr<E>> InputFile<E>::get_phdrs() {
-  ElfEhdr<E> &ehdr = *(ElfEhdr<E> *)mf->data;
-  return {(ElfPhdr<E> *)(mf->data + ehdr.e_phoff), ehdr.e_phnum};
-}
-
 template <typename E>
 ElfShdr<E> *InputFile<E>::find_section(i64 type) {
   for (ElfShdr<E> &sec : elf_sections)
@@ -236,6 +230,65 @@ static bool is_known_section_type(const ElfShdr<E> &shdr) {
   return false;
 }
 
+// SHT_CREL is an experimental alternative relocation table format
+// designed to reduce the size of the table. Only LLVM supports it
+// at the moment.
+//
+// This function converts a CREL relocation table to a regular one.
+template <typename E>
+std::vector<ElfRel<E>> decode_crel(Context<E> &ctx, ObjectFile<E> &file,
+                                   const ElfShdr<E> &shdr) {
+  u8 *p = (u8 *)file.get_string(ctx, shdr).data();
+  u64 hdr = read_uleb(&p);
+  i64 nrels = hdr >> 3;
+  bool is_rela = hdr & 0b100;
+  i64 scale = hdr & 0b11;
+
+  if (is_rela && !E::is_rela)
+    Fatal(ctx) << file << ": CREL with addends is not supported for " << E::name;
+
+  u64 offset = 0;
+  i64 type = 0;
+  i64 symidx = 0;
+  i64 addend = 0;
+
+  std::vector<ElfRel<E>> vec;
+  vec.reserve(nrels);
+
+  while (vec.size() < nrels) {
+    u8 flags = *p++;
+    i64 nflags = is_rela ? 3 : 2;
+
+    // The first ULEB-128 encoded value is a concatenation of bit flags and
+    // an offset delta. The delta may be very large to decrease the
+    // current offset value by wrapping around. Combined, the encoded value
+    // can be up to 67 bit long. Thus we can't simply use read_uleb() which
+    // returns a u64.
+    u64 delta;
+    if (flags & 0x80)
+      delta = (read_uleb(&p) << (7 - nflags)) | ((flags & 0x7f) >> nflags);
+    else
+      delta = flags >> nflags;
+    offset += delta << scale;
+
+    if (flags & 1)
+      symidx += read_sleb(&p);
+    if (flags & 2)
+      type += read_sleb(&p);
+    if (is_rela && (flags & 4))
+      addend += read_sleb(&p);
+    vec.emplace_back(offset, type, symidx, addend);
+  }
+  return vec;
+}
+
+template <typename E>
+ComdatGroup *insert_comdat_group(Context<E> &ctx, std::string_view name) {
+  typename decltype(ctx.comdat_groups)::const_accessor acc;
+  ctx.comdat_groups.insert(acc, {name, ComdatGroup()});
+  return const_cast<ComdatGroup *>(&acc->second);
+}
+
 template <typename E>
 void ObjectFile<E>::initialize_sections(Context<E> &ctx) {
   // Read sections
@@ -264,6 +317,10 @@ void ObjectFile<E>::initialize_sections(Context<E> &ctx) {
       }
     }
 
+    if constexpr (is_arc<E>)
+      if (shdr.sh_type == SHT_ARC_ATTRIBUTES)
+        continue;
+
     switch (shdr.sh_type) {
     case SHT_GROUP: {
       // Get the signature of this section group.
@@ -294,12 +351,14 @@ void ObjectFile<E>::initialize_sections(Context<E> &ctx) {
       if (entries[0] != GRP_COMDAT)
         Fatal(ctx) << *this << ": unsupported SHT_GROUP format";
 
-      typename decltype(ctx.comdat_groups)::const_accessor acc;
-      ctx.comdat_groups.insert(acc, {signature, ComdatGroup()});
-      ComdatGroup *group = const_cast<ComdatGroup *>(&acc->second);
+      ComdatGroup *group = insert_comdat_group(ctx, signature);
       comdat_groups.push_back({group, (i32)i, entries.subspan(1)});
       break;
     }
+    case SHT_CREL:
+      decoded_crel.resize(i + 1);
+      decoded_crel[i] = decode_crel(ctx, *this, shdr);
+      break;
     case SHT_REL:
     case SHT_RELA:
     case SHT_SYMTAB:
@@ -353,6 +412,11 @@ void ObjectFile<E>::initialize_sections(Context<E> &ctx) {
           is_debug_section(shdr, name))
         continue;
 
+      // Ignore section is specified by --discard-section.
+      if (!ctx.arg.discard_section.empty() &&
+          ctx.arg.discard_section.contains(name))
+        continue;
+
       if (name == ".comment" &&
           this->get_string(ctx, shdr).starts_with("rustc "))
         this->is_rust_obj = true;
@@ -432,18 +496,21 @@ void ObjectFile<E>::initialize_sections(Context<E> &ctx) {
   // Attach relocation sections to their target sections.
   for (i64 i = 0; i < this->elf_sections.size(); i++) {
     const ElfShdr<E> &shdr = this->elf_sections[i];
-    if (shdr.sh_type != (E::is_rela ? SHT_RELA : SHT_REL))
-      continue;
-
-    if (shdr.sh_info >= sections.size())
-      Fatal(ctx) << *this << ": invalid relocated section index: "
-                 << (u32)shdr.sh_info;
-
-    if (std::unique_ptr<InputSection<E>> &target = sections[shdr.sh_info]) {
-      assert(target->relsec_idx == -1);
-      target->relsec_idx = i;
+    if (shdr.sh_type == (E::is_rela ? SHT_RELA : SHT_REL) ||
+        shdr.sh_type == SHT_CREL) {
+      if (std::unique_ptr<InputSection<E>> &target = sections[shdr.sh_info]) {
+        assert(target->relsec_idx == -1);
+        target->relsec_idx = i;
+      }
     }
   }
+
+  // Attach .arm.exidx sections to their corresponding sections
+  if constexpr (is_arm32<E>)
+    for (std::unique_ptr<InputSection<E>> &isec : this->sections)
+      if (isec && isec->shdr().sh_type == SHT_ARM_EXIDX)
+        if (InputSection<E> *target = sections[isec->shdr().sh_link].get())
+          target->extra.exidx = isec.get();
 }
 
 // .eh_frame contains data records explaining how to handle exceptions.
@@ -532,6 +599,8 @@ void ObjectFile<E>::parse_ehframe(Context<E> &ctx) {
       i64 cie_offset = *(I32<E> *)(contents.data() + fdes[i].input_offset + 4);
       fdes[i].cie_idx = find_cie(fdes[i].input_offset + 4 - cie_offset);
     }
+
+    isec->is_alive = false;
   }
 
   auto get_isec = [&](const FdeRecord<E> &fde) {
@@ -540,8 +609,8 @@ void ObjectFile<E>::parse_ehframe(Context<E> &ctx) {
 
   // We assume that FDEs for the same input sections are contiguous
   // in `fdes` vector.
-  sort(fdes, [&](const FdeRecord<E> &a, const FdeRecord<E> &b) {
-    return get_isec(a)->get_priority() < get_isec(b)->get_priority();
+  ranges::stable_sort(fdes, {}, [&](const FdeRecord<E> &x) {
+    return get_isec(x)->get_priority();
   });
 
   // Associate FDEs to input sections.
@@ -649,18 +718,14 @@ void ObjectFile<E>::initialize_symbols(Context<E> &ctx) {
 template <typename E>
 void ObjectFile<E>::sort_relocations(Context<E> &ctx) {
   if constexpr (is_riscv<E> || is_loongarch<E>) {
-    auto less = [](const ElfRel<E> &a, const ElfRel<E> &b) {
-      return a.r_offset < b.r_offset;
-    };
-
     for (i64 i = 1; i < sections.size(); i++) {
       std::unique_ptr<InputSection<E>> &isec = sections[i];
       if (!isec || !isec->is_alive || !(isec->shdr().sh_flags & SHF_ALLOC))
         continue;
 
       std::span<ElfRel<E>> rels = isec->get_rels(ctx);
-      if (!std::is_sorted(rels.begin(), rels.end(), less))
-        sort(rels, less);
+      if (!ranges::is_sorted(rels, {}, &ElfRel<E>::r_offset))
+        ranges::stable_sort(rels, {}, &ElfRel<E>::r_offset);
     }
   }
 }
@@ -837,16 +902,6 @@ void ObjectFile<E>::parse(Context<E> &ctx) {
   initialize_sections(ctx);
   initialize_symbols(ctx);
   sort_relocations(ctx);
-
-  // R_ARM_TARGET1 is typically used for entries in .init_array and may
-  // be interpreted as REL32 or ABS32 depending on the target.
-  // All targets we support handle it as if it were a ABS32.
-  if constexpr (is_arm32<E>)
-    for (std::unique_ptr<InputSection<E>> &isec : sections)
-      if (isec && isec->is_alive)
-        for (ElfRel<E> &r : isec->get_rels(ctx))
-          if (r.r_type == R_ARM_TARGET1)
-            r.r_type = R_ARM_ABS32;
 }
 
 // Symbols with higher priorities overwrites symbols with lower priorities.
@@ -861,6 +916,10 @@ void ObjectFile<E>::parse(Context<E> &ctx) {
 //  7. Unclaimed (nonexistent) symbol
 //
 // Ties are broken by file priority.
+//
+// Note that the above priorities are based on heuristics and not on exact
+// science. We tried several different orders and settled on the current
+// one just because it avoids link errors in all programs we've tested.
 template <typename E>
 static u64 get_rank(InputFile<E> *file, const ElfSym<E> &esym, bool is_in_archive) {
   auto get_sym_rank = [&] {
@@ -1188,7 +1247,7 @@ std::string SharedFile<E>::get_soname(Context<E> &ctx) {
   if (ElfShdr<E> *sec = this->find_section(SHT_DYNAMIC))
     for (ElfDyn<E> &dyn : this->template get_data<ElfDyn<E>>(ctx, *sec))
       if (dyn.d_tag == DT_SONAME)
-        return this->symbol_strtab.data() + dyn.d_val;
+        return this->get_string(ctx, sec->sh_link).data() + dyn.d_val;
 
   if (this->mf->given_fullpath)
     return this->filename;
@@ -1247,30 +1306,23 @@ void SharedFile<E>::parse(Context<E> &ctx) {
 
 template <typename E>
 std::vector<std::string_view> SharedFile<E>::get_dt_needed(Context<E> &ctx) {
-  // Get the contents of the dynamic segment
-  std::span<ElfDyn<E>> dynamic;
-  for (ElfPhdr<E> &phdr : this->get_phdrs())
-    if (phdr.p_type == PT_DYNAMIC)
-      dynamic = {(ElfDyn<E> *)(this->mf->data + phdr.p_offset),
-                 (size_t)phdr.p_memsz / sizeof(ElfDyn<E>)};
-
-  // Find a string table
-  char *strtab = nullptr;
-  for (ElfDyn<E> &dyn : dynamic)
-    if (dyn.d_tag == DT_STRTAB)
-      strtab = (char *)this->mf->data + dyn.d_val;
-
-  if (!strtab)
-    return {};
-
-  // Find all DT_NEEDED entries
   std::vector<std::string_view> vec;
-  for (ElfDyn<E> &dyn : dynamic)
-    if (dyn.d_tag == DT_NEEDED)
-      vec.push_back(strtab + dyn.d_val);
+  if (ElfShdr<E> *sec = this->find_section(SHT_DYNAMIC))
+    for (ElfDyn<E> &dyn : this->template get_data<ElfDyn<E>>(ctx, *sec))
+      if (dyn.d_tag == DT_NEEDED)
+        vec.push_back(this->get_string(ctx, sec->sh_link).data() + dyn.d_val);
   return vec;
 }
 
+template <typename E>
+std::string_view SharedFile<E>::get_dt_audit(Context<E> &ctx) {
+  if (ElfShdr<E> *sec = this->find_section(SHT_DYNAMIC))
+    for (ElfDyn<E> &dyn : this->template get_data<ElfDyn<E>>(ctx, *sec))
+      if (dyn.d_tag == DT_AUDIT)
+        return this->get_string(ctx, sec->sh_link).data() + dyn.d_val;
+  return "";
+}
+
 // Symbol versioning is a GNU extension to the ELF file format. I don't
 // particularly like the feature as it complicates the semantics of
 // dynamic linking, but we need to support it anyway because it is
@@ -1394,11 +1446,10 @@ std::span<Symbol<E> *> SharedFile<E>::get_symbols_at(Symbol<E> *sym) {
     });
   });
 
-  auto [begin, end] = std::equal_range(sorted_syms.begin(), sorted_syms.end(),
-                                       sym, [](Symbol<E> *a, Symbol<E> *b) {
-    return a->esym().st_value < b->esym().st_value;
+  auto [begin, end] = ranges::equal_range(sorted_syms, sym->esym().st_value, {},
+                                          [](Symbol<E> *x) {
+    return x->esym().st_value;
   });
-
   return {&*begin, (size_t)(end - begin)};
 }
 
@@ -1420,9 +1471,12 @@ i64 SharedFile<E>::get_alignment(Symbol<E> *sym) {
 
 template <typename E>
 bool SharedFile<E>::is_readonly(Symbol<E> *sym) {
+  ElfEhdr<E> &ehdr = *(ElfEhdr<E> *)this->mf->data;
+  std::span<ElfPhdr<E>> phdrs((ElfPhdr<E> *)(this->mf->data + ehdr.e_phoff),
+                              ehdr.e_phnum);
   u64 val = sym->esym().st_value;
 
-  for (ElfPhdr<E> &phdr : this->get_phdrs())
+  for (ElfPhdr<E> &phdr : phdrs)
     if ((phdr.p_type == PT_LOAD || phdr.p_type == PT_GNU_RELRO) &&
         !(phdr.p_flags & PF_W) &&
         phdr.p_vaddr <= val && val < phdr.p_vaddr + phdr.p_memsz)
@@ -1478,6 +1532,7 @@ template class SharedFile<E>;
 template Symbol<E> *get_symbol(Context<E> &, std::string_view, std::string_view);
 template Symbol<E> *get_symbol(Context<E> &, std::string_view);
 template std::string_view demangle(const Symbol<E> &);
+template ComdatGroup *insert_comdat_group(Context<E> &, std::string_view);
 template std::ostream &operator<<(std::ostream &, const Symbol<E> &);
 template std::ostream &operator<<(std::ostream &, const InputFile<E> &);
 

src/input-sections.cc

@@ -115,6 +115,11 @@ static void do_action(Context<E> &ctx, Action action, InputSection<E> &isec,
     break;
   case COPYREL:
     // Create a copy relocation
+    if (!sym.file->is_dso) {
+      assert(sym.esym().is_undef_weak());
+      Error(ctx) << isec << ": cannot create a copy relocation for "
+                 << sym <<"; recompile with -fPIE or -fPIC";
+    }
     sym.flags |= NEEDS_COPYREL;
     break;
   case PLT:
@@ -235,12 +240,13 @@ void InputSection<E>::write_to(Context<E> &ctx, u8 *buf) {
       memcpy(buf, contents.data(), deltas[0].offset);
 
       for (i64 i = 0; i < deltas.size(); i++) {
-        RelocDelta x = deltas[i];
+        i64 offset = deltas[i].offset;
+        i64 delta = deltas[i].delta;
         i64 end = (i + 1 == deltas.size()) ? contents.size() : deltas[i + 1].offset;
         i64 removed_bytes = get_removed_bytes(deltas, i);
-        memcpy(buf + x.offset - x.delta + removed_bytes,
-               contents.data() + x.offset + removed_bytes,
-               end - x.offset - removed_bytes);
+        memcpy(buf + offset + removed_bytes - delta,
+               contents.data() + offset + removed_bytes,
+               end - offset - removed_bytes);
       }
     }
   } else {
@@ -337,7 +343,7 @@ bool InputSection<E>::record_undef_error(Context<E> &ctx, const ElfRel<E> &rel)
 template <typename E>
 MergeableSection<E>::MergeableSection(Context<E> &ctx, MergedSection<E> &parent,
                                       std::unique_ptr<InputSection<E>> &isec)
-  : parent(parent), section(std::move(isec)), p2align(section->p2align) {
+  : parent(parent), p2align(isec->p2align), section(std::move(isec)) {
   section->uncompress(ctx);
 
   std::scoped_lock lock(parent.mu);
@@ -376,8 +382,7 @@ template <typename E>
 void MergeableSection<E>::split_contents(Context<E> &ctx) {
   std::string_view data = section->contents;
   if (data.size() > UINT32_MAX)
-    Fatal(ctx) << *section
-               << ": mergeable section too large";
+    Fatal(ctx) << *section << ": mergeable section too large";
 
   i64 entsize = parent.shdr.sh_entsize;
 

src/lto-unix.cc

@@ -177,6 +177,7 @@ static PluginStatus add_input_file(const char *path) {
   static i64 file_priority = 100;
 
   MappedFile *mf = must_open_file(ctx, path);
+  mf->is_dependency = false;
 
   ObjectFile<E> *file = new ObjectFile<E>(ctx, mf, "");
   ctx.obj_pool.emplace_back(file);
@@ -598,6 +599,12 @@ create_plugin_input_file(Context<E> &ctx, MappedFile *mf) {
 
 template <typename E>
 ObjectFile<E> *read_lto_object(Context<E> &ctx, MappedFile *mf) {
+  if (ctx.arg.plugin.empty())
+    Fatal(ctx) << mf->name << ": don't know how to handle this LTO object file "
+               << "because no -plugin option was given. Please make sure you "
+               << "added -flto not only for creating object files but also for "
+               << "creating the final executable.";
+
   load_lto_plugin(ctx);
 
   // V0 API's claim_file is not thread-safe.
@@ -606,12 +613,6 @@ ObjectFile<E> *read_lto_object(Context<E> &ctx, MappedFile *mf) {
   if (!is_gcc_linker_api_v1)
     lock.lock();
 
-  if (ctx.arg.plugin.empty())
-    Fatal(ctx) << mf->name << ": don't know how to handle this LTO object file "
-               << "because no -plugin option was given. Please make sure you "
-               << "added -flto not only for creating object files but also for "
-               << "creating the final executable.";
-
   // Create mold's object instance
   ObjectFile<E> *obj = new ObjectFile<E>;
   ctx.obj_pool.emplace_back(obj);
@@ -653,6 +654,7 @@ ObjectFile<E> *read_lto_object(Context<E> &ctx, MappedFile *mf) {
 
   // Initialize esyms
   obj->lto_elf_syms.resize(plugin_symbols.size() + 1);
+  obj->lto_comdat_groups.resize(plugin_symbols.size() + 1);
   i64 strtab_offset = 1;
 
   for (i64 i = 0; i < plugin_symbols.size(); i++) {
@@ -663,6 +665,13 @@ ObjectFile<E> *read_lto_object(Context<E> &ctx, MappedFile *mf) {
     i64 len = strlen(psym.name);
     memcpy(strtab.data() + strtab_offset, psym.name, len);
     strtab_offset += len + 1;
+
+    // comdat_key is non-null if the symbol is defined in a comdat member
+    // section. We handle such symbols differently than comdat symbols in
+    // a regular file because, unlike regular object files, IR files don't
+    // have input sections.
+    if (psym.comdat_key)
+      obj->lto_comdat_groups[i + 1] = insert_comdat_group(ctx, psym.comdat_key);
   }
 
   obj->symbol_strtab = save_string(ctx, strtab);

src/main.cc

@@ -332,6 +332,10 @@ int mold_main(int argc, char **argv) {
     });
   }
 
+  // Handle -repro
+  if (ctx.arg.repro)
+    write_repro_file(ctx);
+
   Timer t_before_copy(ctx, "before_copy");
 
   // Apply -exclude-libs
@@ -382,10 +386,18 @@ int mold_main(int argc, char **argv) {
   // Set is_imported and is_exported bits for each symbol.
   compute_import_export(ctx);
 
+  // Make sure that there's no duplicate symbol
+  if (!ctx.arg.allow_multiple_definition)
+    check_duplicate_symbols(ctx);
+
   // Set "address-taken" bits for input sections.
   if (ctx.arg.icf)
     compute_address_significance(ctx);
 
+  // Handle PPC64-specific .opd sections.
+  if constexpr (is_ppc64v1<E>)
+    ppc64v1_rewrite_opd(ctx);
+
   // Garbage-collect unreachable sections.
   if (ctx.arg.gc_sections)
     gc_sections(ctx);
@@ -397,10 +409,6 @@ int mold_main(int argc, char **argv) {
   // Create linker-synthesized sections such as .got or .plt.
   create_synthetic_sections(ctx);
 
-  // Make sure that there's no duplicate symbol
-  if (!ctx.arg.allow_multiple_definition)
-    check_duplicate_symbols(ctx);
-
   // Handle --no-allow-shlib-undefined
   if (!ctx.arg.allow_shlib_undefined)
     check_shlib_undefined(ctx);
@@ -408,9 +416,6 @@ int mold_main(int argc, char **argv) {
   // Warn if symbols with different types are defined under the same name.
   check_symbol_types(ctx);
 
-  if constexpr (is_ppc64v1<E>)
-    ppc64v1_rewrite_opd(ctx);
-
   // Bin input sections into output sections.
   create_output_sections(ctx);
 
@@ -453,10 +458,6 @@ int mold_main(int argc, char **argv) {
   if (ctx.arg.print_dependencies)
     print_dependencies(ctx);
 
-  // Handle -repro
-  if (ctx.arg.repro)
-    write_repro_file(ctx);
-
   // Handle --require-defined
   for (Symbol<E> *sym : ctx.arg.require_defined)
     if (!sym->file)
@@ -479,16 +480,7 @@ int mold_main(int argc, char **argv) {
     shuffle_sections(ctx);
 
   // Copy string referred by .dynamic to .dynstr.
-  for (SharedFile<E> *file : ctx.dsos)
-    ctx.dynstr->add_string(file->soname);
-  for (std::string_view str : ctx.arg.auxiliary)
-    ctx.dynstr->add_string(str);
-  for (std::string_view str : ctx.arg.filter)
-    ctx.dynstr->add_string(str);
-  if (!ctx.arg.rpaths.empty())
-    ctx.dynstr->add_string(ctx.arg.rpaths);
-  if (!ctx.arg.soname.empty())
-    ctx.dynstr->add_string(ctx.arg.soname);
+  add_dynamic_strings(ctx);
 
   if constexpr (is_ppc64v1<E>)
     ppc64v1_scan_symbols(ctx);
@@ -533,10 +525,6 @@ int mold_main(int argc, char **argv) {
   // Fill .gnu.version_r section contents.
   ctx.verneed->construct(ctx);
 
-  // Compute .symtab and .strtab sizes for each file.
-  if (!ctx.arg.strip_all)
-    create_output_symtab(ctx);
-
   // .eh_frame is a special section from the linker's point of view,
   // as its contents are parsed and reconstructed by the linker,
   // unlike other sections that are regarded as opaque bytes.
@@ -548,6 +536,17 @@ int mold_main(int argc, char **argv) {
   if (ctx.arg.emit_relocs)
     create_reloc_sections(ctx);
 
+  // We've created range extension thunks with a pessimistive assumption
+  // that all out-of-section references are out of range. Now that we are
+  // able to assign addresses to all SHF_ALLOC output sections, we can
+  // eliminate excessive thunks.
+  if constexpr (needs_thunk<E>)
+    remove_redundant_thunks(ctx);
+
+  // Compute .symtab and .strtab sizes for each file.
+  if (!ctx.arg.strip_all)
+    create_output_symtab(ctx);
+
   // Compute the section header values for all sections.
   compute_section_headers(ctx);
 

src/mapfile.cc

@@ -35,10 +35,8 @@ static Map<E> get_map(Context<E> &ctx) {
     return map;
 
   tbb::parallel_for(map.range(), [](const typename Map<E>::range_type &range) {
-    for (auto it = range.begin(); it != range.end(); it++) {
-      std::vector<Symbol<E> *> &vec = it->second;
-      sort(vec, [](Symbol<E> *a, Symbol<E> *b) { return a->value < b->value; });
-    }
+    for (auto &[k, v] : range)
+      ranges::stable_sort(v, {}, &Symbol<E>::value);
   });
   return map;
 }

src/mold.h

@@ -155,6 +155,9 @@ static consteval i64 get_branch_distance() {
 template <needs_thunk E>
 static constexpr i64 branch_distance = get_branch_distance<E>() - 32;
 
+template <needs_thunk E>
+void remove_redundant_thunks(Context<E> &ctx);
+
 template <needs_thunk E>
 void gather_thunk_addresses(Context<E> &ctx);
 
@@ -259,9 +262,14 @@ struct FdeRecord {
 template <typename E>
 struct InputSectionExtras {};
 
+template <>
+struct InputSectionExtras<ARM32> {
+  InputSection<ARM32> *exidx = nullptr;
+};
+
 struct RelocDelta {
-  u64 offset : 38;
-  i64 delta : 26;
+  u64 offset;
+  i64 delta;
 };
 
 // RISC-V and LoongArch support code-shrinking linker relaxation.
@@ -303,6 +311,7 @@ public:
   bool is_relr_reloc(Context<E> &ctx, const ElfRel<E> &rel) const;
   bool icf_removed() const;
   bool record_undef_error(Context<E> &ctx, const ElfRel<E> &rel);
+  void check_range(Context<E> &ctx, i64 i, i64 val, i64 lo, i64 hi);
 
   std::pair<SectionFragment<E> *, i64>
   get_fragment(Context<E> &ctx, const ElfRel<E> &rel);
@@ -561,13 +570,16 @@ public:
   void populate_symtab(Context<E> &ctx) override;
 
   void scan_abs_relocations(Context<E> &ctx);
-  void create_range_extension_thunks(Context<E> &ctx);
+  void create_range_extension_thunks(Context<E> &ctx, bool first_pass);
 
   std::vector<InputSection<E> *> members;
   std::vector<std::unique_ptr<Thunk<E>>> thunks;
   std::unique_ptr<RelocSection<E>> reloc_sec;
   std::vector<AbsRel<E>> abs_rels;
   Atomic<u32> sh_flags;
+
+  // Used only by create_output_sections()
+  std::vector<std::vector<InputSection<E> *>> members_vec;
 };
 
 template <typename E>
@@ -1290,12 +1302,12 @@ public:
 
   MergedSection<E> &parent;
   std::vector<SectionFragment<E> *> fragments;
+  u8 p2align = 0;
 
 private:
   std::unique_ptr<InputSection<E>> section;
   std::vector<u32> frag_offsets;
   std::vector<u32> hashes;
-  u8 p2align = 0;
 };
 
 // InputFile is the base class of ObjectFile and SharedFile.
@@ -1316,7 +1328,6 @@ public:
   std::string_view get_string(Context<E> &ctx, const ElfShdr<E> &shdr);
   std::string_view get_string(Context<E> &ctx, i64 idx);
   u32 get_eflags() { return ((ElfEhdr<E> *)mf->data)->e_flags; }
-  std::span<ElfPhdr<E>> get_phdrs();
 
   ElfShdr<E> *find_section(i64 type);
 
@@ -1361,7 +1372,8 @@ protected:
   std::vector<Symbol<E>> frag_syms;
 };
 
-template <typename E> struct ObjectFileExtras {};
+template <typename E>
+struct ObjectFileExtras {};
 
 template <is_riscv E>
 struct ObjectFileExtras<E> {
@@ -1410,6 +1422,7 @@ public:
   std::vector<bool> has_symver;
   std::vector<ComdatGroupRef<E>> comdat_groups;
   std::vector<InputSection<E> *> eh_frame_sections;
+  std::vector<std::vector<ElfRel<E>>> decoded_crel;
   bool exclude_libs = false;
   std::map<u32, u32> gnu_properties;
   bool needs_executable_stack = false;
@@ -1431,6 +1444,7 @@ public:
 
   // For LTO
   std::vector<ElfSym<E>> lto_elf_syms;
+  std::vector<ComdatGroup *> lto_comdat_groups;
 
 private:
   void initialize_sections(Context<E> &ctx);
@@ -1462,6 +1476,7 @@ public:
   std::span<Symbol<E> *> get_symbols_at(Symbol<E> *sym);
   i64 get_alignment(Symbol<E> *sym);
   std::vector<std::string_view> get_dt_needed(Context<E> &ctx);
+  std::string_view get_dt_audit(Context<E> &ctx);
   bool is_readonly(Symbol<E> *sym);
 
   void mark_live_objects(Context<E> &ctx,
@@ -1664,6 +1679,7 @@ template <typename E> void sort_init_fini(Context<E> &);
 template <typename E> void sort_ctor_dtor(Context<E> &);
 template <typename E> void fixup_ctors_in_init_array(Context<E> &);
 template <typename E> void shuffle_sections(Context<E> &);
+template <typename E> void add_dynamic_strings(Context<E> &);
 template <typename E> void compute_section_sizes(Context<E> &);
 template <typename E> void sort_output_sections(Context<E> &);
 template <typename E> void claim_unresolved_symbols(Context<E> &);
@@ -1792,6 +1808,12 @@ public:
 
 template <> u64 get_eflags(Context<PPC64V2> &ctx);
 
+//
+// arch-arc.cc
+//
+
+template <> u64 get_eflags(Context<ARC> &ctx);
+
 //
 // main.cc
 //
@@ -1912,7 +1934,7 @@ struct ContextExtras<SPARC64> {
 template <typename E>
 struct Context {
   Context() {
-    arg.entry = get_symbol(*this, "_start");
+    arg.entry = get_symbol(*this, is_arc<E> ? "__start" : "_start");
     arg.fini = get_symbol(*this, "_fini");
     arg.init = get_symbol(*this, "_init");
 
@@ -2025,8 +2047,11 @@ struct Context {
     i64 z_stack_size = 0;
     std::optional<Glob> unique;
     std::optional<u64> physical_image_base;
+    std::optional<std::vector<Symbol<E> *>> retain_symbols_file;
     std::string Map;
+    std::string audit;
     std::string chroot;
+    std::string depaudit;
     std::string dependency_file;
     std::string directory;
     std::string dynamic_linker;
@@ -2038,9 +2063,9 @@ struct Context {
     std::string soname;
     std::string sysroot;
     std::string_view emulation;
-    std::optional<std::vector<Symbol<E> *>> retain_symbols_file;
     std::unordered_map<std::string_view, u64> section_align;
     std::unordered_map<std::string_view, u64> section_start;
+    std::unordered_set<std::string_view> discard_section;
     std::unordered_set<std::string_view> ignore_ir_file;
     std::unordered_set<std::string_view> wrap;
     std::vector<SectionOrder> section_order;
@@ -2230,7 +2255,8 @@ enum {
   NO_OPD = 1 << 1, // Request an address other than .opd (PPC64V1 only)
 };
 
-// Symbol class represents a defined symbol.
+// Symbol class represents a symbol. For each unique symbol name, we
+// create one instance of Symbol.
 //
 // A symbol has not only one but several different addresses if it
 // has PLT or GOT entries. This class provides various functions to
@@ -2492,6 +2518,9 @@ Symbol<E> *get_symbol(Context<E> &ctx, std::string_view key,
 template <typename E>
 Symbol<E> *get_symbol(Context<E> &ctx, std::string_view name);
 
+template <typename E>
+ComdatGroup *insert_comdat_group(Context<E> &ctx, std::string_view name);
+
 template <typename E>
 std::string_view demangle(const Symbol<E> &sym);
 
@@ -2563,7 +2592,11 @@ template <typename E>
 inline std::span<ElfRel<E>> InputSection<E>::get_rels(Context<E> &ctx) const {
   if (relsec_idx == -1)
     return {};
-  return file.template get_data<ElfRel<E>>(ctx, file.elf_sections[relsec_idx]);
+
+  ElfShdr<E> &shdr = file.elf_sections[relsec_idx];
+  if (shdr.sh_type == SHT_CREL)
+    return file.decoded_crel[relsec_idx];
+  return file.template get_data<ElfRel<E>>(ctx, shdr);
 }
 
 template <typename E>
@@ -2638,13 +2671,24 @@ inline bool InputSection<E>::icf_removed() const {
   return this->leader && this->leader != this;
 }
 
+template <typename E>
+inline void
+InputSection<E>::check_range(Context<E> &ctx, i64 i, i64 val, i64 lo, i64 hi) {
+  if (val < lo || hi <= val) {
+    const ElfRel<E> &rel = get_rels(ctx)[i];
+    Symbol<E> &sym = *file.symbols[rel.r_sym];
+    Error(ctx) << *this << ": relocation " << rel << " against "
+               << sym << " out of range: " << val << " is not in ["
+               << lo << ", " << hi << ")";
+  }
+}
+
 template <typename E>
 std::pair<SectionFragment<E> *, i64>
 MergeableSection<E>::get_fragment(i64 offset) {
-  std::span<u32> vec = frag_offsets;
-  auto it = std::upper_bound(vec.begin(), vec.end(), offset);
-  i64 idx = it - 1 - vec.begin();
-  return {fragments[idx], offset - vec[idx]};
+  auto it = ranges::upper_bound(frag_offsets, offset);
+  i64 idx = it - 1 - frag_offsets.begin();
+  return {fragments[idx], offset - frag_offsets[idx]};
 }
 
 template <typename E>
@@ -2978,7 +3022,7 @@ u64
 Symbol<E>::get_thunk_addr(Context<E> &ctx, u64 P) const requires needs_thunk<E> {
   std::span<u64> vec = ctx.symbol_aux[aux_idx].thunk_addrs;
   u64 lo = (P < branch_distance<E>) ? 0 : P - branch_distance<E>;
-  u64 val = *std::lower_bound(vec.begin(), vec.end(), lo);
+  u64 val = *ranges::lower_bound(vec, lo);
   i64 disp = val - P;
   if (disp < -branch_distance<E> || branch_distance<E> <= disp)
     Fatal(ctx) << "range extension thunk out of range: " << *this;

src/output-chunks.cc

@@ -203,9 +203,7 @@ static std::vector<ElfPhdr<E>> create_phdr(Context<E> &ctx) {
   // The ELF spec says that "loadable segment entries in the program
   // header table appear in ascending order, sorted on the p_vaddr
   // member".
-  sort(chunks, [](Chunk<E> *a, Chunk<E> *b) {
-    return a->shdr.sh_addr < b->shdr.sh_addr;
-  });
+  ranges::stable_sort(chunks, {}, [](Chunk<E> *x) { return x->shdr.sh_addr; });
 
   // Create a PT_PHDR for the program header itself.
   if (ctx.phdr && (ctx.phdr->shdr.sh_flags & SHF_ALLOC))
@@ -657,6 +655,12 @@ static std::vector<Word<E>> create_dynamic_section(Context<E> &ctx) {
   for (std::string_view str : ctx.arg.auxiliary)
     define(DT_AUXILIARY, ctx.dynstr->find_string(str));
 
+  if (!ctx.arg.audit.empty())
+    define(DT_AUDIT, ctx.dynstr->find_string(ctx.arg.audit));
+
+  if (!ctx.arg.depaudit.empty())
+    define(DT_DEPAUDIT, ctx.dynstr->find_string(ctx.arg.depaudit));
+
   for (std::string_view str : ctx.arg.filter)
     define(DT_FILTER, ctx.dynstr->find_string(str));
 
@@ -796,7 +800,7 @@ static std::vector<Word<E>> create_dynamic_section(Context<E> &ctx) {
     define(DT_PPC_GOT, ctx.gotplt->shdr.sh_addr);
 
   if constexpr (is_ppc64<E>) {
-    // PPC64_GLINK is defined by the psABI to refer 32 bytes before
+    // PPC64_GLINK is defined by the psABI to refer to 32 bytes before
     // the first PLT entry. I don't know why it's 32 bytes off, but
     // it's what it is.
     define(DT_PPC64_GLINK, ctx.plt->shdr.sh_addr + to_plt_offset<E>(0) - 32);
@@ -844,7 +848,6 @@ static std::vector<std::span<T>> split(std::vector<T> &input, i64 unit) {
   return vec;
 }
 
-
 // Assign offsets to OutputSection members
 template <typename E>
 void OutputSection<E>::compute_section_size(Context<E> &ctx) {
@@ -861,43 +864,44 @@ void OutputSection<E>::compute_section_size(Context<E> &ctx) {
   struct Group {
     std::span<InputSection<E> *> members;
     i64 size = 0;
-    i64 p2align = 0;
     i64 offset = 0;
+    i64 align = 1;
   };
 
-  std::span<InputSection<E> *> mem = members;
   std::vector<Group> groups;
   constexpr i64 group_size = 10000;
 
-  while (!mem.empty()) {
-    i64 sz = std::min<i64>(group_size, mem.size());
-    groups.push_back({mem.subspan(0, sz)});
-    mem = mem.subspan(sz);
+  for (std::span<InputSection<E> *> m = members; !m.empty();) {
+    i64 sz = std::min<i64>(group_size, m.size());
+    groups.push_back({m.subspan(0, sz)});
+    m = m.subspan(sz);
   }
 
-  tbb::parallel_for_each(groups, [](Group &group) {
-    for (InputSection<E> *isec : group.members) {
-      group.size = align_to(group.size, 1 << isec->p2align) + isec->sh_size;
-      group.p2align = std::max<i64>(group.p2align, isec->p2align);
+  tbb::parallel_for_each(groups, [](Group &g) {
+    i64 off = 0;
+    for (InputSection<E> *isec : g.members) {
+      off = align_to(off, 1 << isec->p2align) + isec->sh_size;
+      g.align = std::max<i64>(g.align, 1 << isec->p2align);
     }
+    g.size = off;
   });
 
-  shdr.sh_size = 0;
-
-  for (i64 i = 0; i < groups.size(); i++) {
-    shdr.sh_size = align_to(shdr.sh_size, 1 << groups[i].p2align);
-    groups[i].offset = shdr.sh_size;
-    shdr.sh_size += groups[i].size;
-    shdr.sh_addralign = std::max<u32>(shdr.sh_addralign, 1 << groups[i].p2align);
+  i64 off = 0;
+  for (Group &g : groups) {
+    off = align_to(off, g.align);
+    g.offset = off;
+    off += g.size;
   }
 
+  shdr.sh_size = off;
+
   // Assign offsets to input sections.
-  tbb::parallel_for_each(groups, [](Group &group) {
-    i64 offset = group.offset;
-    for (InputSection<E> *isec : group.members) {
-      offset = align_to(offset, 1 << isec->p2align);
-      isec->offset = offset;
-      offset += isec->sh_size;
+  tbb::parallel_for_each(groups, [](Group &g) {
+    i64 off = g.offset;
+    for (InputSection<E> *isec : g.members) {
+      off = align_to(off, 1 << isec->p2align);
+      isec->offset = off;
+      off += isec->sh_size;
     }
   });
 }
@@ -919,34 +923,38 @@ void OutputSection<E>::copy_buf(Context<E> &ctx) {
                                  this->reldyn_offset);
 
   for (AbsRel<E> &r : abs_rels) {
-    Word<E> *loc = (Word<E> *)(buf + r.isec->offset + r.offset);
-    u64 addr = this->shdr.sh_addr + r.isec->offset + r.offset;
     Symbol<E> &sym = *r.sym;
+    u8 *loc = buf + r.isec->offset + r.offset;
+    u64 S = sym.get_addr(ctx);
+    u64 A = r.addend;
+    u64 P = this->shdr.sh_addr + r.isec->offset + r.offset;
+
+    if constexpr (is_riscv<E> || is_loongarch<E>) {
+      i64 delta = get_r_delta(*r.isec, r.offset);
+      loc -= delta;
+      P -= delta;
+    }
+
+    auto write = [&](i64 ty, i64 idx, u64 val) {
+      *rel++ = ElfRel<E>(P, ty, idx, val);
+      if (ctx.arg.apply_dynamic_relocs)
+        *(Word<E> *)loc = val;
+    };
 
     switch (r.kind) {
     case ABS_REL_NONE:
     case ABS_REL_RELR:
-      *loc = sym.get_addr(ctx) + r.addend;
+      *(Word<E> *)loc = S + A;
       break;
-    case ABS_REL_BASEREL: {
-      u64 val = sym.get_addr(ctx) + r.addend;
-      *rel++ = ElfRel<E>(addr, E::R_RELATIVE, 0, val);
-      if (ctx.arg.apply_dynamic_relocs)
-        *loc = val;
+    case ABS_REL_BASEREL:
+      write(E::R_RELATIVE, 0, S + A);
       break;
-    }
     case ABS_REL_IFUNC:
-      if constexpr (supports_ifunc<E>) {
-        u64 val = sym.get_addr(ctx, NO_PLT) + r.addend;
-        *rel++ = ElfRel<E>(addr, E::R_IRELATIVE, 0, val);
-        if (ctx.arg.apply_dynamic_relocs)
-          *loc = val;
-      }
+      if constexpr (supports_ifunc<E>)
+        write(E::R_IRELATIVE, 0, sym.get_addr(ctx, NO_PLT) + A);
       break;
     case ABS_REL_DYNREL:
-      *rel++ = ElfRel<E>(addr, E::R_ABS, sym.get_dynsym_idx(ctx), r.addend);
-      if (ctx.arg.apply_dynamic_relocs)
-        *loc = r.addend;
+      write(E::R_ABS, sym.get_dynsym_idx(ctx), A);
       break;
     }
   }
@@ -1007,10 +1015,8 @@ void OutputSection<E>::write_to(Context<E> &ctx, u8 *buf) {
 // the .rel.dyn section). A bitmap has LSB 1.
 template <typename E>
 static std::vector<u64> encode_relr(std::span<u64> pos) {
-  for (i64 i = 0; i < pos.size(); i++) {
-    assert(pos[i] % sizeof(Word<E>) == 0);
-    assert(i == 0 || pos[i - 1] < pos[i]);
-  }
+  assert(ranges::all_of(pos, [](u64 x) { return x % sizeof(Word<E>) == 0; }));
+  assert(ranges::is_sorted(pos));
 
   std::vector<u64> vec;
   i64 num_bits = E::is_64 ? 63 : 31;
@@ -1051,6 +1057,16 @@ static AbsRelKind get_abs_rel_kind(Context<E> &ctx, Symbol<E> &sym) {
   return ABS_REL_DYNREL;
 }
 
+template <typename E>
+static bool is_absrel(const ElfRel<E> &r) {
+  // On ARM32, R_ARM_TARGET1 is typically used for entries in .init_array
+  // and is interpreted as either ABS32 or REL32 depending on the target.
+  // All targets we support handle it as if it were a ABS32.
+  if constexpr (is_arm32<E>)
+    return r.r_type == E::R_ABS || r.r_type == R_ARM_TARGET1;
+  return r.r_type == E::R_ABS;
+}
+
 // Scan word-size absolute relocations (e.g. R_X86_64_64). This is
 // separated from scan_relocations() because only such relocations can
 // be promoted to dynamic relocations.
@@ -1062,7 +1078,7 @@ void OutputSection<E>::scan_abs_relocations(Context<E> &ctx) {
   tbb::parallel_for((i64)0, (i64)members.size(), [&](i64 i) {
     InputSection<E> *isec = members[i];
     for (const ElfRel<E> &r : isec->get_rels(ctx))
-      if (r.r_type == E::R_ABS)
+      if (is_absrel(r))
         shards[i].push_back(AbsRel<E>{isec, r.r_offset, isec->file.symbols[r.r_sym],
                                       get_addend(*isec, r)});
   });
@@ -1100,7 +1116,7 @@ void OutputSection<E>::scan_abs_relocations(Context<E> &ctx) {
 
   // If --pack-dyn-relocs=relr is enabled, base relocations are put into
   // .relr.dyn.
-  if (ctx.arg.pack_dyn_relocs_relr)
+  if (ctx.arg.pack_dyn_relocs_relr && !(this->shdr.sh_flags & SHF_EXECINSTR))
     for (AbsRel<E> &r : abs_rels)
       if (r.kind == ABS_REL_BASEREL &&
           r.isec->shdr().sh_addralign % sizeof(Word<E>) == 0 &&
@@ -1398,7 +1414,7 @@ void GotSection<E>::copy_buf(Context<E> &ctx) {
     if (ctx.dynamic)
       buf[0] = ctx.dynamic->shdr.sh_addr;
 
-  // arm64 psABI doesn't say anything about GOT[0], but glibc/arm64's code
+  // ARM64 psABI doesn't say anything about GOT[0], but glibc/arm64's code
   // path for -static-pie wrongly assumed that GOT[0] refers to _DYNAMIC.
   //
   // https://sourceware.org/git/?p=glibc.git;a=commitdiff;h=43d06ed218fc8be5
@@ -1420,24 +1436,20 @@ void GotSection<E>::copy_buf(Context<E> &ctx) {
                        ent.sym ? ent.sym->get_dynsym_idx(ctx) : 0,
                        ent.val);
 
-    bool is_tlsdesc = false;
-    if constexpr (supports_tlsdesc<E>)
-      is_tlsdesc = (ent.r_type == E::R_TLSDESC);
-
     if (ctx.arg.apply_dynamic_relocs) {
-      if (is_tlsdesc && !is_arm32<E>) {
-        // A single TLSDESC relocation fixes two consecutive GOT slots
-        // where one slot holds a function pointer and the other an
-        // argument to the function. An addend should be applied not to
-        // the function pointer but to the function argument, which is
-        // usually stored to the second slot.
-        //
-        // ARM32 employs the inverted layout for some reason, so an
-        // addend is applied to the first slot.
-        buf[ent.idx + 1] = ent.val;
-      } else {
-        buf[ent.idx] = ent.val;
-      }
+      // A single TLSDESC relocation fixes two consecutive GOT slots
+      // where one slot holds a function pointer and the other an
+      // argument to the function. An addend should be applied not to
+      // the function pointer but to the function argument, which is
+      // usually stored to the second slot.
+      //
+      // ARM32 employs the inverted layout for some reason, so an
+      // addend is applied to the first slot.
+      i64 i = ent.idx;
+      if constexpr (supports_tlsdesc<E> && !is_arm32<E>)
+        if (ent.r_type == E::R_TLSDESC)
+          i = ent.idx + 1;
+      buf[i] = ent.val;
     }
   }
 }
@@ -1599,6 +1611,7 @@ void PltSection<E>::populate_symtab(Context<E> &ctx) {
     memset(esym, 0, sizeof(*esym));
     esym->st_name = st_name;
     esym->st_type = STT_FUNC;
+    esym->st_bind = STB_LOCAL;
     esym->st_shndx = this->shndx;
     esym->st_value = addr;
     esym++;
@@ -1716,10 +1729,11 @@ template <typename E>
 static u64 get_symbol_size(Symbol<E> &sym) {
   const ElfSym<E> &esym = sym.esym();
   if constexpr (is_riscv<E> || is_loongarch<E>)
-    if (esym.st_size > 0)
+    if (esym.st_size)
       if (InputSection<E> *isec = sym.get_input_section())
-        return esym.st_size + esym.st_value - sym.value -
-               get_r_delta(*isec, esym.st_value + esym.st_size);
+        if (isec->shdr().sh_flags & SHF_EXECINSTR)
+          return esym.st_size + esym.st_value - sym.value -
+                 get_r_delta(*isec, esym.st_value + esym.st_size);
   return esym.st_size;
 }
 
@@ -2115,6 +2129,13 @@ void MergedSection<E>::resolve(Context<E> &ctx) {
 
   if (this == ctx.comment)
     add_comment_strings(ctx);
+
+  // Compute section alignment
+  u32 p2align = 0;
+  for (MergeableSection<E> *sec : members)
+    p2align = std::max<u32>(p2align, sec->p2align);
+  this->shdr.sh_addralign = 1 << p2align;
+
   resolved = true;
 }
 
@@ -2124,14 +2145,11 @@ void MergedSection<E>::compute_section_size(Context<E> &ctx) {
     resolve(ctx);
 
   std::vector<i64> sizes(map.NUM_SHARDS);
-  Atomic<i64> alignment = 1;
 
   tbb::parallel_for((i64)0, map.NUM_SHARDS, [&](i64 i) {
     using Entry = typename decltype(map)::Entry;
     std::vector<Entry *> entries = map.get_sorted_entries(i);
-
     i64 offset = 0;
-    i64 p2align = 0;
 
     for (Entry *ent : entries) {
       SectionFragment<E> &frag = ent->value;
@@ -2139,15 +2157,9 @@ void MergedSection<E>::compute_section_size(Context<E> &ctx) {
         offset = align_to(offset, 1 << frag.p2align);
         frag.offset = offset;
         offset += ent->keylen;
-        p2align = std::max<i64>(p2align, frag.p2align);
       }
     }
-
     sizes[i] = offset;
-    update_maximum(alignment, 1 << p2align);
-
-    static Counter merged_strings("merged_strings");
-    merged_strings += entries.size();
   });
 
   i64 shard_size = map.nbuckets / map.NUM_SHARDS;
@@ -2155,7 +2167,7 @@ void MergedSection<E>::compute_section_size(Context<E> &ctx) {
 
   for (i64 i = 1; i < map.NUM_SHARDS + 1; i++)
     shard_offsets[i] =
-      align_to(shard_offsets[i - 1] + sizes[i - 1], alignment);
+      align_to(shard_offsets[i - 1] + sizes[i - 1], this->shdr.sh_addralign);
 
   tbb::parallel_for((i64)1, map.NUM_SHARDS, [&](i64 i) {
     for (i64 j = shard_size * i; j < shard_size * (i + 1); j++) {
@@ -2166,7 +2178,6 @@ void MergedSection<E>::compute_section_size(Context<E> &ctx) {
   });
 
   this->shdr.sh_size = shard_offsets[map.NUM_SHARDS];
-  this->shdr.sh_addralign = alignment;
 
   if (this->shdr.sh_size > UINT32_MAX)
     Fatal(ctx) << this->name << ": output section too large";
@@ -2314,24 +2325,22 @@ void EhFrameSection<E>::copy_buf(Context<E> &ctx) {
       if (ctx.arg.relocatable)
         continue;
 
-      for (const ElfRel<E> &rel : rels) {
+      for (i64 j = 0; j < rels.size(); j++) {
+        const ElfRel<E> &rel = rels[j];
         assert(rel.r_offset - fde.input_offset < contents.size());
 
         Symbol<E> &sym = *file->symbols[rel.r_sym];
         u64 loc = offset + rel.r_offset - fde.input_offset;
         u64 val = sym.get_addr(ctx) + get_addend(cie.input_section, rel);
         apply_eh_reloc(ctx, rel, loc, val);
-      }
 
-      if (eh_hdr) {
-        // Write to .eh_frame_hdr
-        Symbol<E> &sym = *file->symbols[rels[0].r_sym];
-        u64 val = sym.get_addr(ctx) + get_addend(cie.input_section, rels[0]);
-        u64 sh_addr = ctx.eh_frame_hdr->shdr.sh_addr;
-
-        HdrEntry &ent = eh_hdr[file->fde_idx + i];
-        ent.init_addr = val - sh_addr;
-        ent.fde_addr = this->shdr.sh_addr + offset - sh_addr;
+        if (j == 0 && eh_hdr) {
+          // Write to .eh_frame_hdr
+          HdrEntry &ent = eh_hdr[file->fde_idx + i];
+          u64 origin = ctx.eh_frame_hdr->shdr.sh_addr;
+          ent.init_addr = val - origin;
+          ent.fde_addr = this->shdr.sh_addr + offset - origin;
+        }
       }
     }
   });
@@ -2519,13 +2528,12 @@ void VersymSection<E>::copy_buf(Context<E> &ctx) {
 // `GLIBC_ABI_DT_RELR' not found" error message. glibc 2.38 or later knows
 // about this dummy version name and simply ignores it.
 template <typename E>
-static InputFile<E> *find_glibc2(Context<E> &ctx) {
-  for (Symbol<E> *sym : ctx.dynsym->symbols)
-    if (sym && sym->file->is_dso &&
-        ((SharedFile<E> *)sym->file)->soname.starts_with("libc.so.") &&
-        sym->get_version().starts_with("GLIBC_2."))
-      return sym->file;
-  return nullptr;
+static bool is_glibc2(SharedFile<E> &file) {
+  if (file.soname.starts_with("libc.so."))
+    for (std::string_view str : file.version_strings)
+      if (str.starts_with("GLIBC_2."))
+        return true;
+  return false;
 }
 
 template <typename E>
@@ -2544,9 +2552,8 @@ void VerneedSection<E>::construct(Context<E> &ctx) {
   if (syms.empty())
     return;
 
-  sort(syms, [](Symbol<E> *a, Symbol<E> *b) {
-    return std::tuple(((SharedFile<E> *)a->file)->soname, a->ver_idx) <
-           std::tuple(((SharedFile<E> *)b->file)->soname, b->ver_idx);
+  ranges::stable_sort(syms, {}, [](Symbol<E> *x) {
+    return std::tuple{((SharedFile<E> *)x->file)->soname, x->ver_idx};
   });
 
   // Resize .gnu.version
@@ -2565,19 +2572,6 @@ void VerneedSection<E>::construct(Context<E> &ctx) {
 
   i64 veridx = VER_NDX_LAST_RESERVED + ctx.arg.version_definitions.size();
 
-  auto start_group = [&](InputFile<E> *file) {
-    this->shdr.sh_info++;
-    if (verneed)
-      verneed->vn_next = ptr - (u8 *)verneed;
-
-    verneed = (ElfVerneed<E> *)ptr;
-    ptr += sizeof(ElfVerneed<E>);
-    verneed->vn_version = 1;
-    verneed->vn_file = ctx.dynstr->find_string(((SharedFile<E> *)file)->soname);
-    verneed->vn_aux = sizeof(ElfVerneed<E>);
-    aux = nullptr;
-  };
-
   auto add_entry = [&](std::string_view verstr) {
     verneed->vn_cnt++;
 
@@ -2591,25 +2585,33 @@ void VerneedSection<E>::construct(Context<E> &ctx) {
     aux->vna_name = ctx.dynstr->add_string(verstr);
   };
 
+  auto start_group = [&](SharedFile<E> &file) {
+    this->shdr.sh_info++;
+    if (verneed)
+      verneed->vn_next = ptr - (u8 *)verneed;
+
+    verneed = (ElfVerneed<E> *)ptr;
+    ptr += sizeof(ElfVerneed<E>);
+    verneed->vn_version = 1;
+    verneed->vn_file = ctx.dynstr->find_string(file.soname);
+    verneed->vn_aux = sizeof(ElfVerneed<E>);
+    aux = nullptr;
+
+    if (ctx.arg.pack_dyn_relocs_relr && is_glibc2(file))
+      add_entry("GLIBC_ABI_DT_RELR");
+  };
+
   // Create version entries.
   for (i64 i = 0; i < syms.size(); i++) {
     if (i == 0 || syms[i - 1]->file != syms[i]->file) {
-      start_group(syms[i]->file);
+      start_group(*(SharedFile<E> *)syms[i]->file);
       add_entry(syms[i]->get_version());
     } else if (syms[i - 1]->ver_idx != syms[i]->ver_idx) {
       add_entry(syms[i]->get_version());
     }
-
     ctx.versym->contents[syms[i]->get_dynsym_idx(ctx)] = veridx;
   }
 
-  if (ctx.arg.pack_dyn_relocs_relr) {
-    if (InputFile<E> *file = find_glibc2(ctx)) {
-      start_group(file);
-      add_entry("GLIBC_ABI_DT_RELR");
-    }
-  }
-
   // Resize .gnu.version_r to fit to its contents.
   contents.resize(ptr - buf);
 }
@@ -2636,10 +2638,9 @@ void VerdefSection<E>::construct(Context<E> &ctx) {
   ctx.versym->contents.resize(ctx.dynsym->symbols.size(), VER_NDX_GLOBAL);
   ctx.versym->contents[0] = VER_NDX_LOCAL;
 
-  for (i64 i = 1; i < ctx.dynsym->symbols.size(); i++)
-    if (Symbol<E> &sym = *ctx.dynsym->symbols[i];
-        !sym.file->is_dso && sym.ver_idx != VER_NDX_UNSPECIFIED)
-      ctx.versym->contents[sym.get_dynsym_idx(ctx)] = sym.ver_idx;
+  for (Symbol<E> *sym : ctx.dynsym->symbols)
+    if (sym && !sym->file->is_dso && sym->ver_idx != VER_NDX_UNSPECIFIED)
+      ctx.versym->contents[sym->get_dynsym_idx(ctx)] = sym->ver_idx;
 
   // Allocate a buffer for .gnu.version_d and write to it
   contents.resize((sizeof(ElfVerdef<E>) + sizeof(ElfVerdaux<E>)) *
@@ -2668,10 +2669,10 @@ void VerdefSection<E>::construct(Context<E> &ctx) {
     aux->vda_name = ctx.dynstr->add_string(verstr);
   };
 
-  if (!ctx.arg.soname.empty())
-    write(ctx.arg.soname, 1, VER_FLG_BASE);
-  else
-    write(ctx.arg.output, 1, VER_FLG_BASE);
+  std::string_view soname = ctx.arg.soname;
+  if (soname.empty())
+    soname = save_string(ctx, path_filename(ctx.arg.output));
+  write(soname, 1, VER_FLG_BASE);
 
   i64 idx = VER_NDX_LAST_RESERVED + 1;
   for (std::string_view verstr : ctx.arg.version_definitions)
@@ -2749,10 +2750,6 @@ void NotePropertySection<E>::update_shdr(Context<E> &ctx) {
   std::map<u32, u32> map;
 
   for (u32 key : keys) {
-    auto has_key = [&](ObjectFile<E> *file) {
-      return file->gnu_properties.contains(key);
-    };
-
     if (GNU_PROPERTY_X86_UINT32_AND_LO <= key &&
         key <= GNU_PROPERTY_X86_UINT32_AND_HI) {
       // An AND feature is set if all input objects have the property and
@@ -2769,7 +2766,11 @@ void NotePropertySection<E>::update_shdr(Context<E> &ctx) {
                key <= GNU_PROPERTY_X86_UINT32_OR_AND_HI) {
       // An OR-AND feature is set if all input object files have the property
       // and some of them has the feature.
-      if (std::all_of(files.begin(), files.end(), has_key))
+      auto has_key = [&](ObjectFile<E> *file) {
+        return file->gnu_properties.contains(key);
+      };
+
+      if (ranges::all_of(files, has_key))
         for (ObjectFile<E> *file : files)
           map[key] |= get_value(file, key);
     }
@@ -2971,7 +2972,7 @@ void ComdatGroupSection<E>::copy_buf(Context<E> &ctx) {
 
 template <typename E>
 void GnuDebuglinkSection<E>::update_shdr(Context<E> &ctx) {
-  filename = std::filesystem::path(ctx.arg.separate_debug_file).filename().string();
+  filename = path_filename(ctx.arg.separate_debug_file);
   this->shdr.sh_size = align_to(filename.size() + 1, 4) + 4;
 }
 

src/passes.cc

@@ -56,6 +56,8 @@ int redo_main(Context<E> &ctx, int argc, char **argv) {
     return mold_main<LOONGARCH32>(argc, argv);
   if (target == LOONGARCH64::name)
     return mold_main<LOONGARCH64>(argc, argv);
+  if (target == ARC::name)
+    return mold_main<ARC>(argc, argv);
   abort();
 }
 
@@ -66,10 +68,11 @@ void apply_exclude_libs(Context<E> &ctx) {
   std::unordered_set<std::string_view> set(ctx.arg.exclude_libs.begin(),
                                            ctx.arg.exclude_libs.end());
 
-  for (ObjectFile<E> *file : ctx.objs)
-    if (!file->archive_name.empty())
-      if (set.contains(path_filename(file->archive_name)) || set.contains("ALL"))
-        file->exclude_libs = true;
+  if (!set.empty())
+    for (ObjectFile<E> *file : ctx.objs)
+      if (!file->archive_name.empty())
+        if (set.contains(path_filename(file->archive_name)) || set.contains("ALL"))
+          file->exclude_libs = true;
 }
 
 template <typename E>
@@ -229,6 +232,45 @@ static void mark_live_objects(Context<E> &ctx) {
   });
 }
 
+// Symbol resolution involving a default symbol version is tricky because
+// a symbol that provides the default version has two names by which it
+// can be referred. Specifically, a symbol `foo` with the default version
+// `VER1` can be referred to either as `foo` or `foo@VER1`. No other
+// symbols have two names like that.
+//
+// By default, we insert symbols with a default version without an at-sign
+// (i.e. `foo` instead of `foo@VER1`) into our internal symbol table.
+// Therefore, if the symbol is referenced with an at-sign (i.e.
+// `foo@VER1`), the reference fails to resolve. This function corrects
+// that error.
+//
+// In this function, we check all unresolved versioned symbols of the form
+// `foo@VER1` by removing the version part and see if `foo` has version
+// `VER1`. If it does, that's the symbol we are looking for.
+template <typename E>
+static void resolve_default_symver(Context<E> &ctx) {
+  tbb::parallel_for_each(ctx.objs, [&](ObjectFile<E> *file) {
+    for (i64 i = file->first_global; i < file->elf_syms.size(); i++) {
+      const ElfSym<E> &esym = file->elf_syms[i];
+      Symbol<E> &sym = *file->symbols[i];
+
+      if (!sym.file && esym.is_undef() &&
+          file->has_symver[i - file->first_global]) {
+        std::string_view str = file->symbol_strtab.data() + esym.st_name;
+        i64 pos = str.find('@');
+        assert(pos != str.npos);
+
+        std::string_view name = str.substr(0, pos);
+        std::string_view ver = str.substr(pos + 1);
+
+        Symbol<E> *sym2 = get_symbol(ctx, name);
+        if (sym2->file && sym2->file->is_dso && sym2->get_version() == ver)
+          file->symbols[i] = sym2;
+      }
+    }
+  });
+}
+
 template <typename E>
 static void clear_symbols(Context<E> &ctx) {
   std::vector<InputFile<E> *> files;
@@ -267,6 +309,7 @@ void resolve_symbols(Context<E> &ctx) {
       file->resolve_symbols(ctx);
     });
 
+    resolve_default_symver(ctx);
     mark_live_objects(ctx);
 
     // Now that we know the exact set of input files that are to be
@@ -287,9 +330,13 @@ void resolve_symbols(Context<E> &ctx) {
     // we could eliminate a symbol that is already resolved to and cause
     // dangling references.
     tbb::parallel_for_each(ctx.objs, [](ObjectFile<E> *file) {
-      if (file->is_reachable)
+      if (file->is_reachable) {
         for (ComdatGroupRef<E> &ref : file->comdat_groups)
           update_minimum(ref.group->owner, file->priority);
+        for (ComdatGroup *g : file->lto_comdat_groups)
+          if (g)
+            update_minimum(g->owner, file->priority);
+      }
     });
 
     tbb::parallel_for_each(ctx.objs, [](ObjectFile<E> *file) {
@@ -326,9 +373,7 @@ void resolve_symbols(Context<E> &ctx) {
 
     if (!flag)
       return;
-
     clear_symbols(ctx);
-    resolve_symbols(ctx);
   }
 }
 
@@ -340,11 +385,16 @@ void do_lto(Context<E> &ctx) {
 
   // The compiler backend needs to know how symbols are resolved, so
   // compute symbol visibility, import/export bits, etc early.
-  mark_live_objects(ctx);
   apply_version_script(ctx);
   parse_symbol_version(ctx);
   compute_import_export(ctx);
 
+  // If multiple IR object files define the same symbol, the LTO backend
+  // would choose one of them randomly instead of reporting an error.
+  // So we need to check for symbol duplication error before doing an LTO.
+  if (!ctx.arg.allow_multiple_definition)
+    check_duplicate_symbols(ctx);
+
   // Invoke the LTO plugin. This step compiles IR object files into a few
   // big ELF files.
   std::vector<ObjectFile<E> *> lto_objs = run_lto_plugin(ctx);
@@ -369,9 +419,6 @@ void parse_eh_frame_sections(Context<E> &ctx) {
 
   tbb::parallel_for_each(ctx.objs, [&](ObjectFile<E> *file) {
     file->parse_ehframe(ctx);
-
-    for (InputSection<E> *isec : file->eh_frame_sections)
-      isec->is_alive = false;
   });
 }
 
@@ -406,13 +453,9 @@ void convert_common_symbols(Context<E> &ctx) {
 
 template <typename E>
 static bool has_ctors_and_init_array(Context<E> &ctx) {
-  bool x = false;
-  bool y = false;
-  for (ObjectFile<E> *file : ctx.objs) {
-    x |= file->has_ctors;
-    y |= file->has_init_array;
-  }
-  return x && y;
+  return
+    ranges::any_of(ctx.objs, [](ObjectFile<E> *x) { return x->has_ctors; }) &&
+    ranges::any_of(ctx.objs, [](ObjectFile<E> *x) { return x->has_init_array; });
 }
 
 template <typename E>
@@ -435,7 +478,6 @@ static u64 canonicalize_type(std::string_view name, u64 type) {
   if constexpr (is_x86_64<E>)
     if (type == SHT_X86_64_UNWIND)
       return SHT_PROGBITS;
-
   return type;
 }
 
@@ -548,6 +590,9 @@ static bool is_relro(OutputSection<E> &osec) {
 }
 
 // Create output sections for input sections.
+//
+// Since one output section could contain millions of input sections,
+// we need to do it efficiently.
 template <typename E>
 void create_output_sections(Context<E> &ctx) {
   Timer t(ctx, "create_output_sections");
@@ -556,18 +601,14 @@ void create_output_sections(Context<E> &ctx) {
                                      OutputSectionKey::Hash>;
   MapType map;
   std::shared_mutex mu;
-  i64 size = ctx.osec_pool.size();
   bool ctors_in_init_array = has_ctors_and_init_array(ctx);
+  tbb::enumerable_thread_specific<MapType> caches;
 
   // Instantiate output sections
   tbb::parallel_for_each(ctx.objs, [&](ObjectFile<E> *file) {
     // Make a per-thread cache of the main map to avoid lock contention.
     // It makes a noticeable difference if we have millions of input sections.
-    MapType cache;
-    {
-      std::shared_lock lock(mu);
-      cache = map;
-    }
+    MapType &cache = caches.local();
 
     for (std::unique_ptr<InputSection<E>> &isec : file->sections) {
       if (!isec || !isec->is_alive)
@@ -620,22 +661,40 @@ void create_output_sections(Context<E> &ctx) {
     }
   });
 
+  // Add input sections to output sections
+  for (std::unique_ptr<OutputSection<E>> &osec : ctx.osec_pool)
+    osec->members_vec.resize(ctx.objs.size());
+
+  tbb::parallel_for((i64)0, (i64)ctx.objs.size(), [&](i64 i) {
+    for (std::unique_ptr<InputSection<E>> &isec : ctx.objs[i]->sections)
+      if (isec && isec->output_section)
+        isec->output_section->members_vec[i].push_back(isec.get());
+  });
+
+  // Compute section alignment
+  for (std::unique_ptr<OutputSection<E>> &osec : ctx.osec_pool) {
+    Atomic<u32> p2align;
+    tbb::parallel_for((i64)0, (i64)ctx.objs.size(), [&](i64 i) {
+      u32 x = 0;
+      for (InputSection<E> *isec : osec->members_vec[i])
+        x = std::max<u32>(x, isec->p2align);
+      update_maximum(p2align, x);
+    });
+    osec->shdr.sh_addralign = 1 << p2align;
+  }
+
   for (std::unique_ptr<OutputSection<E>> &osec : ctx.osec_pool) {
     osec->shdr.sh_flags = osec->sh_flags;
     osec->is_relro = is_relro(*osec);
+    osec->members = flatten(osec->members_vec);
+    osec->members_vec.clear();
+    osec->members_vec.shrink_to_fit();
   }
 
-  // Add input sections to output sections
-  std::vector<Chunk<E> *> chunks;
-  for (i64 i = size; i < ctx.osec_pool.size(); i++)
-    chunks.push_back(ctx.osec_pool[i].get());
-
-  for (ObjectFile<E> *file : ctx.objs)
-    for (std::unique_ptr<InputSection<E>> &isec : file->sections)
-      if (isec && isec->is_alive)
-        isec->output_section->members.push_back(isec.get());
-
   // Add output sections and mergeable sections to ctx.chunks
+  std::vector<Chunk<E> *> chunks;
+  for (std::unique_ptr<OutputSection<E>> &osec : ctx.osec_pool)
+    chunks.push_back(osec.get());
   for (std::unique_ptr<MergedSection<E>> &osec : ctx.merged_sections)
     chunks.push_back(osec.get());
 
@@ -858,11 +917,12 @@ void add_synthetic_symbols(Context<E> &ctx) {
 
 template <typename E>
 void apply_section_align(Context<E> &ctx) {
-  for (Chunk<E> *chunk : ctx.chunks)
-    if (OutputSection<E> *osec = chunk->to_osec())
-      if (auto it = ctx.arg.section_align.find(osec->name);
-          it != ctx.arg.section_align.end())
-        osec->shdr.sh_addralign = it->second;
+  std::unordered_map<std::string_view, u64> &map = ctx.arg.section_align;
+  if (!map.empty())
+    for (Chunk<E> *chunk : ctx.chunks)
+      if (OutputSection<E> *osec = chunk->to_osec())
+        if (auto it = map.find(osec->name); it != map.end())
+          osec->shdr.sh_addralign = it->second;
 }
 
 template <typename E>
@@ -871,8 +931,7 @@ void check_cet_errors(Context<E> &ctx) {
   assert(warning || ctx.arg.z_cet_report == CET_REPORT_ERROR);
 
   auto has_feature = [](ObjectFile<E> *file, u32 feature) {
-    return std::any_of(file->gnu_properties.begin(), file->gnu_properties.end(),
-                       [&](std::pair<u32, u32> kv) {
+    return ranges::any_of(file->gnu_properties, [&](std::pair<u32, u32> kv) {
       return kv.first == GNU_PROPERTY_X86_FEATURE_1_AND &&
              (kv.second & feature);
     });
@@ -968,7 +1027,7 @@ static std::string create_response_file(Context<E> &ctx) {
 
   if (cwd != "/") {
     out << "--chroot ..";
-    i64 depth = std::count(cwd.begin(), cwd.end(), '/');
+    i64 depth = ranges::count(cwd, '/');
     for (i64 i = 1; i < depth; i++)
       out << "/..";
     out << "\n";
@@ -1013,12 +1072,15 @@ void check_duplicate_symbols(Context<E> &ctx) {
   Timer t(ctx, "check_duplicate_symbols");
 
   tbb::parallel_for_each(ctx.objs, [&](ObjectFile<E> *file) {
+    if (!file->is_reachable)
+      return;
+
     for (i64 i = file->first_global; i < file->elf_syms.size(); i++) {
       const ElfSym<E> &esym = file->elf_syms[i];
       Symbol<E> &sym = *file->symbols[i];
 
       // Skip if our symbol is undef or weak
-      if (sym.file == file || sym.file == ctx.internal_obj ||
+      if (!sym.file || sym.file == file || sym.file == ctx.internal_obj ||
           esym.is_undef() || esym.is_common() || (esym.st_bind == STB_WEAK))
         continue;
 
@@ -1030,6 +1092,13 @@ void check_duplicate_symbols(Context<E> &ctx) {
           continue;
       }
 
+      // Skip if the symbol is a deduplicated comdat symbol that is in
+      // an IR file.
+      if (file->is_lto_obj)
+        if (ComdatGroup *g = file->lto_comdat_groups[i])
+          if (g->owner != file->priority)
+            continue;
+
       Error(ctx) << "duplicate symbol: " << *file << ": " << *sym.file
                  << ": " << sym;
     }
@@ -1060,7 +1129,7 @@ void check_shlib_undefined(Context<E> &ctx) {
 
   // Obtain a list of known shared library names.
   std::unordered_set<std::string_view> sonames;
-  for (SharedFile<E> *file : ctx.dsos)
+  for (std::unique_ptr<SharedFile<E>> &file : ctx.dso_pool)
     sonames.insert(file->soname);
 
   tbb::parallel_for_each(ctx.dsos, [&](SharedFile<E> *file) {
@@ -1181,7 +1250,7 @@ void sort_init_fini(Context<E> &ctx) {
       if (osec->name == ".init_array" || osec->name == ".preinit_array" ||
           osec->name == ".fini_array") {
         if (ctx.arg.shuffle_sections == SHUFFLE_SECTIONS_REVERSE)
-          std::reverse(osec->members.begin(), osec->members.end());
+          ranges::reverse(osec->members);
 
         std::vector<Entry> vec;
 
@@ -1192,8 +1261,7 @@ void sort_init_fini(Context<E> &ctx) {
           else
             vec.push_back({isec, get_init_fini_priority(isec)});
         }
-
-        sort(vec, [](const Entry &a, const Entry &b) { return a.prio < b.prio; });
+        ranges::stable_sort(vec, {}, &Entry::prio);
 
         for (i64 i = 0; i < vec.size(); i++)
           osec->members[i] = vec[i].sect;
@@ -1215,13 +1283,12 @@ void sort_ctor_dtor(Context<E> &ctx) {
     if (OutputSection<E> *osec = chunk->to_osec()) {
       if (osec->name == ".ctors" || osec->name == ".dtors") {
         if (ctx.arg.shuffle_sections != SHUFFLE_SECTIONS_REVERSE)
-          std::reverse(osec->members.begin(), osec->members.end());
+          ranges::reverse(osec->members);
 
         std::vector<Entry> vec;
         for (InputSection<E> *isec : osec->members)
           vec.push_back({isec, get_ctor_dtor_priority(isec)});
-
-        sort(vec, [](const Entry &a, const Entry &b) { return a.prio < b.prio; });
+        ranges::stable_sort(vec, {}, &Entry::prio);
 
         for (i64 i = 0; i < vec.size(); i++)
           osec->members[i] = vec[i].sect;
@@ -1255,9 +1322,7 @@ void fixup_ctors_in_init_array(Context<E> &ctx) {
     for (ElfRel<E> &r : rels)
       r.r_offset = isec.sh_size - r.r_offset - sizeof(Word<E>);
 
-    sort(rels, [](const ElfRel<E> &a, const ElfRel<E> &b) {
-      return a.r_offset < b.r_offset;
-    });
+    ranges::stable_sort(rels, {}, &ElfRel<E>::r_offset);
   };
 
   if (Chunk<E> *chunk = find_chunk(ctx, ".init_array"))
@@ -1273,8 +1338,8 @@ void fixup_ctors_in_init_array(Context<E> &ctx) {
           reverse_contents(*isec);
 }
 
-template <typename T>
-static void shuffle(std::vector<T> &vec, u64 seed) {
+template <typename E>
+static void shuffle(std::vector<InputSection<E> *> &vec, u64 seed) {
   if (vec.empty())
     return;
 
@@ -1327,7 +1392,7 @@ void shuffle_sections(Context<E> &ctx) {
   case SHUFFLE_SECTIONS_REVERSE:
     tbb::parallel_for_each(ctx.chunks, [&](Chunk<E> *chunk) {
       if (OutputSection<E> *osec = chunk->to_osec(); is_eligible(osec))
-        std::reverse(osec->members.begin(), osec->members.end());
+        ranges::reverse(osec->members);
     });
     break;
   default:
@@ -1335,24 +1400,53 @@ void shuffle_sections(Context<E> &ctx) {
   }
 }
 
+template <typename E>
+void add_dynamic_strings(Context<E> &ctx) {
+  for (SharedFile<E> *file : ctx.dsos) {
+    std::string_view s = file->get_dt_audit(ctx);
+    if (!s.empty()) {
+      if (!ctx.arg.depaudit.empty())
+        ctx.arg.depaudit += ':';
+      ctx.arg.depaudit += std::string(s);
+    }
+  }
+
+  auto add = [&](std::string_view s) {
+    if (!s.empty())
+      ctx.dynstr->add_string(s);
+  };
+
+  for (SharedFile<E> *file : ctx.dsos)
+    add(file->soname);
+  for (std::string_view str : ctx.arg.auxiliary)
+    add(str);
+  for (std::string_view str : ctx.arg.filter)
+    add(str);
+
+  add(ctx.arg.audit);
+  add(ctx.arg.depaudit);
+  add(ctx.arg.rpaths);
+  add(ctx.arg.soname);
+}
+
 template <typename E>
 void compute_section_sizes(Context<E> &ctx) {
   Timer t(ctx, "compute_section_sizes");
 
   if constexpr (needs_thunk<E>) {
-    auto is_text = [&](Chunk<E> *chunk) {
+    std::vector<Chunk<E> *> vec = ctx.chunks;
+
+    auto tail = ranges::partition(vec, [&](Chunk<E> *chunk) {
       return chunk->to_osec() && (chunk->shdr.sh_flags & SHF_EXECINSTR) &&
              !ctx.arg.relocatable;
-    };
+    });
 
     // create_range_extension_thunks is not thread-safe
-    for (Chunk<E> *chunk : ctx.chunks)
-      if (is_text(chunk))
-        chunk->to_osec()->create_range_extension_thunks(ctx);
+    for (Chunk<E> *chunk : std::span(vec.begin(), tail.begin()))
+      chunk->to_osec()->create_range_extension_thunks(ctx, true);
 
-    tbb::parallel_for_each(ctx.chunks, [&](Chunk<E> *chunk) {
-      if (!is_text(chunk))
-        chunk->compute_section_size(ctx);
+    tbb::parallel_for_each(tail, [&](Chunk<E> *chunk) {
+      chunk->compute_section_size(ctx);
     });
   } else {
     tbb::parallel_for_each(ctx.chunks, [&](Chunk<E> *chunk) {
@@ -1387,24 +1481,6 @@ void claim_unresolved_symbols(Context<E> &ctx) {
         if (!sym.esym().is_undef() || sym.file->priority <= file->priority)
           continue;
 
-      // If a symbol name is in the form of "foo@version", search for
-      // symbol "foo" and check if the symbol has version "version".
-      if (file->has_symver[i - file->first_global]) {
-        std::string_view str = file->symbol_strtab.data() + esym.st_name;
-        i64 pos = str.find('@');
-        assert(pos != str.npos);
-
-        std::string_view name = str.substr(0, pos);
-        std::string_view ver = str.substr(pos + 1);
-
-        Symbol<E> *sym2 = get_symbol(ctx, name);
-        if (sym2->file && sym2->file->is_dso && sym2->get_version() == ver) {
-          file->symbols[i] = sym2;
-          sym2->is_imported = true;
-          continue;
-        }
-      }
-
       auto claim = [&](bool is_imported) {
         if (sym.is_traced)
           Out(ctx) << "trace-symbol: " << *file << ": unresolved"
@@ -1422,10 +1498,19 @@ void claim_unresolved_symbols(Context<E> &ctx) {
       };
 
       if (esym.is_undef_weak()) {
-        if (ctx.arg.shared && sym.visibility != STV_HIDDEN &&
-            ctx.arg.z_dynamic_undefined_weak) {
+        if (ctx.arg.z_dynamic_undefined_weak && sym.visibility != STV_HIDDEN) {
           // Global weak undefined symbols are promoted to dynamic symbols
-          // when linking a DSO unless `-z nodynamic_undefined_weak` was given.
+          // by default only when linking a DSO. We generally cannot do that
+          // for executables because we may need to create a copy relocation
+          // for a data symbol, but the symbol size is not available for an
+          // unclaimed weak symbol.
+          //
+          // In contrast, GNU ld promotes weak symbols to dynamic ones even
+          // for an executable as long as they don't need copy relocations
+          // (i.e. they need only PLT entries.) That may result in an
+          // inconsistent behavior of a linked program depending on whether
+          // whether its object files were compiled with -fPIC or not. I think
+          // that's bad semantics, so we don't do that.
           claim(true);
         } else {
           // Otherwise, weak undefs are converted to absolute symbols with value 0.
@@ -1704,29 +1789,26 @@ void sort_dynsyms(Context<E> &ctx) {
     return;
 
   // In any symtab, local symbols must precede global symbols.
-  auto first_global = std::stable_partition(syms.begin() + 1, syms.end(),
-                                            [&](Symbol<E> *sym) {
+  auto globals = ranges::stable_partition(syms.subspan(1), [&](Symbol<E> *sym) {
     return sym->is_local(ctx);
   });
 
   // .gnu.hash imposes more restrictions on the order of the symbols in
   // .dynsym.
   if (ctx.gnu_hash) {
-    auto first_exported = std::stable_partition(first_global, syms.end(),
-                                                [](Symbol<E> *sym) {
+    auto exported_syms = ranges::stable_partition(globals, [](Symbol<E> *sym) {
       return !sym->is_exported;
     });
 
     // Count the number of exported symbols to compute the size of .gnu.hash.
-    i64 num_exported = syms.end() - first_exported;
+    i64 num_exported = exported_syms.size();
     u32 num_buckets = num_exported / ctx.gnu_hash->LOAD_FACTOR + 1;
 
-    tbb::parallel_for_each(first_exported, syms.end(), [&](Symbol<E> *sym) {
+    tbb::parallel_for_each(exported_syms, [&](Symbol<E> *sym) {
       sym->set_djb_hash(ctx, djb_hash(sym->name()));
     });
 
-    tbb::parallel_sort(first_exported, syms.end(),
-                       [&](Symbol<E> *a, Symbol<E> *b) {
+    tbb::parallel_sort(exported_syms, [&](Symbol<E> *a, Symbol<E> *b) {
       return std::tuple(a->get_djb_hash(ctx) % num_buckets, a->name()) <
              std::tuple(b->get_djb_hash(ctx) % num_buckets, b->name());
     });
@@ -1747,7 +1829,7 @@ void sort_dynsyms(Context<E> &ctx) {
   ctx.dynstr->shdr.sh_size += size.combine(std::plus());
 
   // ELF's symbol table sh_info holds the offset of the first global symbol.
-  ctx.dynsym->shdr.sh_info = first_global - syms.begin();
+  ctx.dynsym->shdr.sh_info = globals.begin() - syms.begin();
 }
 
 template <typename E>
@@ -1793,8 +1875,7 @@ void apply_version_script(Context<E> &ctx) {
   // last one takes precedence.
   std::vector<VersionPattern> patterns = ctx.version_patterns;
 
-  std::stable_partition(patterns.begin(), patterns.end(),
-                        [](const VersionPattern &pat) {
+  ranges::stable_partition(patterns, [](const VersionPattern &pat) {
     return pat.ver_idx == VER_NDX_LOCAL;
   });
 
@@ -1906,7 +1987,7 @@ void parse_symbol_version(Context<E> &ctx) {
       // versioned symbol. Likewise, if `foo@VERSION` and `foo@@VERSION` are
       // defined, the default one takes precedence.
       Symbol<E> *sym2 = get_symbol(ctx, sym->name());
-      if (sym2->file == file &&
+      if (sym2 != sym && sym2->file == file &&
           !file->has_symver[sym2->sym_idx - file->first_global])
         if (sym2->ver_idx == ctx.default_version ||
             (sym2->ver_idx & ~VERSYM_HIDDEN) == (sym->ver_idx & ~VERSYM_HIDDEN))
@@ -2265,9 +2346,8 @@ void sort_output_sections_regular(Context<E> &ctx) {
     return 0;
   };
 
-  sort(ctx.chunks, [&](Chunk<E> *a, Chunk<E> *b) {
-    return std::tuple{get_rank1(a), get_rank2(a), a->name} <
-           std::tuple{get_rank1(b), get_rank2(b), b->name};
+  ranges::stable_sort(ctx.chunks, {}, [&](Chunk<E> *x) {
+    return std::tuple{get_rank1(x), get_rank2(x), x->name};
   });
 }
 
@@ -2323,9 +2403,7 @@ void sort_output_sections_by_order(Context<E> &ctx) {
     chunk->sect_order = get_rank(chunk);
 
   // Sort output sections by --section-order
-  sort(ctx.chunks, [](Chunk<E> *a, Chunk<E> *b) {
-    return a->sect_order < b->sect_order;
-  });
+  ranges::stable_sort(ctx.chunks, {}, &Chunk<E>::sect_order);
 }
 
 template <typename E>
@@ -2380,27 +2458,6 @@ static void set_virtual_addresses_regular(Context<E> &ctx) {
   std::vector<Chunk<E> *> &chunks = ctx.chunks;
   u64 addr = ctx.arg.image_base;
 
-  // TLS chunks alignments are special: in addition to having their virtual
-  // addresses aligned, they also have to be aligned when the region of
-  // tls_begin is copied to a new thread's storage area. In other words, their
-  // offset against tls_begin also has to be aligned.
-  //
-  // A good way to achieve this is to take the largest alignment requirement
-  // of all TLS sections and make tls_begin also aligned to that.
-  Chunk<E> *first_tls_chunk = nullptr;
-  u64 tls_alignment = 1;
-  for (Chunk<E> *chunk : chunks) {
-    if (chunk->shdr.sh_flags & SHF_TLS) {
-      if (!first_tls_chunk)
-        first_tls_chunk = chunk;
-      tls_alignment = std::max(tls_alignment, (u64)chunk->shdr.sh_addralign);
-    }
-  }
-
-  auto alignment = [&](Chunk<E> *chunk) {
-    return chunk == first_tls_chunk ? tls_alignment : (u64)chunk->shdr.sh_addralign;
-  };
-
   auto is_tbss = [](Chunk<E> *chunk) {
     return (chunk->shdr.sh_type == SHT_NOBITS) && (chunk->shdr.sh_flags & SHF_TLS);
   };
@@ -2472,7 +2529,7 @@ static void set_virtual_addresses_regular(Context<E> &ctx) {
     if (is_tbss(chunks[i])) {
       u64 addr2 = addr;
       for (;;) {
-        addr2 = align_to(addr2, alignment(chunks[i]));
+        addr2 = align_to(addr2, chunks[i]->shdr.sh_addralign);
         chunks[i]->shdr.sh_addr = addr2;
         addr2 += chunks[i]->shdr.sh_size;
         if (i + 2 == chunks.size() || !is_tbss(chunks[i + 1]))
@@ -2482,7 +2539,7 @@ static void set_virtual_addresses_regular(Context<E> &ctx) {
       continue;
     }
 
-    addr = align_to(addr, alignment(chunks[i]));
+    addr = align_to(addr, chunks[i]->shdr.sh_addralign);
     chunks[i]->shdr.sh_addr = addr;
     addr += chunks[i]->shdr.sh_size;
   }
@@ -2556,13 +2613,12 @@ static void set_virtual_addresses_by_order(Context<E> &ctx) {
 }
 
 // Returns the smallest integer N that satisfies N >= val and
-// N mod align == skew mod align.
+// N % align == skew % align.
 //
 // Section's file offset must be congruent to its virtual address modulo
 // the page size. We use this function to satisfy that requirement.
 static u64 align_with_skew(u64 val, u64 align, u64 skew) {
-  u64 x = align_down(val, align) + skew % align;
-  return (val <= x) ? x : x + align;
+  return val + ((skew - val) & (align - 1));
 }
 
 // Assign file offsets to output sections.
@@ -2645,11 +2701,10 @@ void separate_debug_sections(Context<E> &ctx) {
            chunk->name.starts_with(".debug_");
   };
 
-  auto mid = std::stable_partition(ctx.chunks.begin(), ctx.chunks.end(),
-                                   is_debug_section);
+  auto tail = ranges::stable_partition(ctx.chunks, std::not_fn(is_debug_section));
 
-  ctx.debug_chunks = {ctx.chunks.begin(), mid};
-  ctx.chunks.erase(ctx.chunks.begin(), mid);
+  ctx.debug_chunks = {tail.begin(), tail.end()};
+  ctx.chunks.erase(tail.begin(), tail.end());
 }
 
 template <typename E>
@@ -2666,9 +2721,9 @@ void compute_section_headers(Context<E> &ctx) {
 
   // Set section indices.
   i64 shndx = 1;
-  for (i64 i = 0; i < ctx.chunks.size(); i++)
-    if (!ctx.chunks[i]->is_header())
-      ctx.chunks[i]->shndx = shndx++;
+  for (Chunk<E> *chunk : ctx.chunks)
+    if (!chunk->is_header())
+      chunk->shndx = shndx++;
 
   if (ctx.symtab && SHN_LORESERVE <= shndx) {
     SymtabShndxSection<E> *sec = new SymtabShndxSection<E>;
@@ -2682,8 +2737,8 @@ void compute_section_headers(Context<E> &ctx) {
   if (ctx.shdr)
     ctx.shdr->shdr.sh_size = shndx * sizeof(ElfShdr<E>);
 
-  // Some types of section header refer other section by index.
-  // Recompute the section header to fill such fields with correct values.
+  // Some types of section header refer to other section by index.
+  // Recompute all section headers to fill such fields with correct values.
   for (Chunk<E> *chunk : ctx.chunks)
     chunk->update_shdr(ctx);
 
@@ -2721,9 +2776,11 @@ i64 set_osec_offsets(Context<E> &ctx) {
 
 template <typename E>
 static i64 get_num_irelative_relocs(Context<E> &ctx) {
-  i64 n = std::count_if(ctx.got->got_syms.begin(), ctx.got->got_syms.end(),
-                        [](Symbol<E> *sym) { return sym->is_ifunc(); });
-  return n + ctx.num_ifunc_dynrels;
+  i64 n = ctx.num_ifunc_dynrels;
+  for (Symbol<E> *sym : ctx.got->got_syms)
+    if (sym->is_ifunc())
+      n++;
+  return n;
 }
 
 template <typename E>
@@ -2783,18 +2840,16 @@ void fix_synthetic_symbols(Context<E> &ctx) {
   // defined in a statically-linked non-relocatable executable because
   // such executable lacks the .dynamic section and thus there's no way
   // to find ifunc relocations other than these symbols.
-  //
-  // We don't want to set values to these symbols if we are creating a
-  // static PIE due to a glibc bug. Static PIE has a dynamic section.
-  // If we set values to these symbols in a static PIE, glibc attempts
-  // to run ifunc initializers twice, with the second attempt with wrong
-  // function addresses, causing a segmentation fault.
   if (ctx.reldyn && ctx.arg.static_ && !ctx.arg.pie) {
     stop(ctx.__rel_iplt_start, ctx.reldyn);
     stop(ctx.__rel_iplt_end, ctx.reldyn);
-
     ctx.__rel_iplt_start->value -=
       get_num_irelative_relocs(ctx) * sizeof(ElfRel<E>);
+  } else {
+    // If the symbols are not ncessary, we turn them to absolute
+    // symbols at address 0.
+    ctx.__rel_iplt_start->origin = 0;
+    ctx.__rel_iplt_end->origin = 0;
   }
 
   // __{init,fini}_array_{start,end}
@@ -3157,6 +3212,10 @@ void write_separate_debug_file(Context<E> &ctx) {
 
   append(ctx.chunks, ctx.debug_chunks);
 
+  // Handle --compress-debug-info
+  if (ctx.arg.compress_debug_sections != COMPRESS_NONE)
+    compress_debug_sections(ctx);
+
   // Write to the debug info file as if it were a regular output file.
   compute_section_headers(ctx);
   file->resize(ctx, set_osec_offsets(ctx));
@@ -3265,6 +3324,14 @@ void show_stats(Context<E> &ctx) {
   static Counter num_objs("num_objs", ctx.objs.size());
   static Counter num_dsos("num_dsos", ctx.dsos.size());
 
+  using Entry = typename ConcurrentMap<SectionFragment<E>>::Entry;
+
+  static Counter merged_strings("merged_strings");
+  for (std::unique_ptr<MergedSection<E>> &sec : ctx.merged_sections)
+    for (Entry &ent : std::span(sec->map.entries, sec->map.nbuckets))
+      if (ent.key)
+        merged_strings++;
+
   if constexpr (needs_thunk<E>) {
     static Counter thunk_bytes("thunk_bytes");
     for (Chunk<E> *chunk : ctx.chunks)
@@ -3312,6 +3379,7 @@ template void sort_init_fini(Context<E> &);
 template void sort_ctor_dtor(Context<E> &);
 template void fixup_ctors_in_init_array(Context<E> &);
 template void shuffle_sections(Context<E> &);
+template void add_dynamic_strings(Context<E> &);
 template void compute_section_sizes(Context<E> &);
 template void sort_output_sections(Context<E> &);
 template void claim_unresolved_symbols(Context<E> &);

src/shrink-sections.cc

@@ -69,10 +69,8 @@ using E = MOLD_TARGET;
 template <>
 i64 get_r_delta(InputSection<E> &isec, u64 offset) {
   std::span<RelocDelta> deltas = isec.extra.r_deltas;
-  auto it = std::upper_bound(deltas.begin(), deltas.end(), offset,
-                             [](u64 val, const RelocDelta &x) {
-    return val <= x.offset;
-  });
+  auto it = ranges::upper_bound(deltas, offset, std::less_equal<>{},
+                                &RelocDelta::offset);
   return (it == deltas.begin()) ? 0 : (it - 1)->delta;
 }
 
@@ -101,8 +99,9 @@ void shrink_sections(Context<E> &ctx) {
     for (Symbol<E> *sym : file->symbols)
       if (sym->file == file)
         if (InputSection<E> *isec = sym->get_input_section())
-          if (i64 delta = get_r_delta(*isec, sym->value))
-            sym->value -= delta;
+          if (isec->shdr().sh_flags & SHF_EXECINSTR)
+            if (i64 delta = get_r_delta(*isec, sym->value))
+              sym->value -= delta;
   });
 
   // Recompute sizes of executable sections

src/thunks.cc

@@ -45,44 +45,26 @@ static constexpr i64 max_thunk_size = 1024 * 1024;
 static constexpr i64 thunk_align = 16;
 
 template <typename E>
-static bool is_reachable(Context<E> &ctx, InputSection<E> &isec,
+static bool is_reachable(Context<E> &ctx, bool first_pass, InputSection<E> &isec,
                          Symbol<E> &sym, const ElfRel<E> &rel) {
-  // We create thunks with a pessimistic assumption that all
-  // out-of-section relocations would be out-of-range.
-  InputSection<E> *isec2 = sym.get_input_section();
-  if (!isec2 || isec.output_section != isec2->output_section)
-    return false;
-
-  // Even if the target is the same section, we branch to its PLT
-  // if it has one. So a symbol with a PLT is also considered an
-  // out-of-section reference.
-  if (sym.has_plt(ctx))
-    return false;
-
   // If the target section is in the same output section but
   // hasn't got any address yet, that's unreacahble.
-  if (isec2->offset == -1)
+  InputSection<E> *isec2 = sym.get_input_section();
+  if (isec2 && isec.output_section == isec2->output_section &&
+      isec2->offset == -1)
     return false;
 
-  // Thumb and ARM B instructions cannot be converted to BX, so we
-  // always have to make them jump to a thunk to switch processor mode
-  // even if their destinations are within their ranges.
-  if constexpr (is_arm32<E>) {
-    bool is_thumb = sym.get_addr(ctx) & 1;
-    if ((rel.r_type == R_ARM_THM_JUMP24 && !is_thumb) ||
-        (rel.r_type == R_ARM_JUMP24 && is_thumb) ||
-        (rel.r_type == R_ARM_PLT32 && is_thumb))
+  // We don't know about the final file layout on the first pass, so
+  // we assume pessimistically that all out-of-section relocations are
+  // out-of-range. Excessive thunks will be removed on the second pass.
+  if (first_pass) {
+    if (!isec2 || isec.output_section != isec2->output_section)
       return false;
-  }
 
-  // PowerPC before Power9 lacks PC-relative load/store instructions.
-  // Functions compiled for Power9 or earlier assume that r2 points to
-  // GOT+0x8000, while those for Power10 uses r2 as a scratch register.
-  // We need to a thunk to recompute r2 for interworking.
-  if constexpr (is_ppc64v2<E>) {
-    if (rel.r_type == R_PPC64_REL24 && !sym.esym().ppc64_preserves_r2())
-      return false;
-    if (rel.r_type == R_PPC64_REL24_NOTOC && sym.esym().ppc64_uses_toc())
+    // Even if the target is the same section, we branch to its PLT
+    // if it has one. So a symbol with a PLT is also considered an
+    // out-of-section reference.
+    if (sym.has_plt(ctx))
       return false;
   }
 
@@ -95,13 +77,36 @@ static bool is_reachable(Context<E> &ctx, InputSection<E> &isec,
   return -branch_distance<E> <= val && val < branch_distance<E>;
 }
 
-static void reset(Thunk<E> &thunk) {
-  for (Symbol<E> *sym : thunk.symbols)
-    sym->flags = 0;
+template <typename E>
+static bool needs_shim(Context<E> &ctx, Symbol<E> &sym, const ElfRel<E> &rel) {
+  // Thumb and ARM B instructions cannot be converted to BX, so we
+  // always have to make them jump to a thunk to switch processor mode
+  // even if their destinations are within their ranges.
+  if constexpr (is_arm32<E>) {
+    bool is_thumb = sym.get_addr(ctx) & 1;
+    return (rel.r_type == R_ARM_THM_JUMP24 && !is_thumb) ||
+           (rel.r_type == R_ARM_JUMP24 && is_thumb) ||
+           (rel.r_type == R_ARM_PLT32 && is_thumb);
+  }
+
+  // On PowerPC, all PLT calls go through range extension thunks.
+  if constexpr (is_ppc32<E> || is_ppc64v1<E>)
+    return sym.has_plt(ctx);
+
+  // PowerPC before Power9 lacks PC-relative load/store instructions.
+  // Functions compiled for Power9 or earlier assume that r2 points to
+  // GOT+0x8000, while those for Power10 uses r2 as a scratch register.
+  // We need to a thunk to recompute r2 for interworking.
+  if constexpr (is_ppc64v2<E>)
+    return sym.has_plt(ctx) ||
+           (rel.r_type == R_PPC64_REL24 && !sym.esym().ppc64_preserves_r2()) ||
+           (rel.r_type == R_PPC64_REL24_NOTOC && sym.esym().ppc64_uses_toc());
+  return false;
 }
 
 template <>
-void OutputSection<E>::create_range_extension_thunks(Context<E> &ctx) {
+void OutputSection<E>::create_range_extension_thunks(Context<E> &ctx,
+                                                     bool first_pass) {
   std::span<InputSection<E> *> m = members;
   if (m.empty())
     return;
@@ -169,8 +174,9 @@ void OutputSection<E>::create_range_extension_thunks(Context<E> &ctx) {
       a++;
 
     // Erase references to out-of-range thunks.
-    while (t < thunks.size() && thunks[t]->offset < m[a]->offset)
-      reset(*thunks[t++]);
+    for (; t < thunks.size() && thunks[t]->offset < m[a]->offset; t++)
+      for (Symbol<E> *sym : thunks[t]->symbols)
+        sym->flags = 0;
 
     // Create a new thunk and place it at D.
     offset = align_to(offset, thunk_align);
@@ -193,12 +199,12 @@ void OutputSection<E>::create_range_extension_thunks(Context<E> &ctx) {
         if (!sym.file)
           continue;
 
-        // Skip if the destination is within reach.
-        if (is_reachable(ctx, isec, sym, rel))
+        // Skip if we can directly branch to the destination.
+        if (is_reachable(ctx, first_pass, isec, sym, rel) &&
+            !needs_shim(ctx, sym, rel))
           continue;
 
-        // Add the symbol to the current thunk if it's not added already
-        // by other thread.
+        // Add the symbol to the current thunk if it's not added already.
         if (!sym.flags.test_and_set()) {
           std::scoped_lock lock(mu);
           thunk.symbols.push_back(&sym);
@@ -207,9 +213,8 @@ void OutputSection<E>::create_range_extension_thunks(Context<E> &ctx) {
     });
 
     // Sort symbols added to the thunk to make the output deterministic.
-    sort(thunk.symbols, [](Symbol<E> *a, Symbol<E> *b) {
-      return std::tuple{a->file->priority, a->sym_idx} <
-             std::tuple{b->file->priority, b->sym_idx};
+    ranges::sort(thunk.symbols, {}, [](Symbol<E> *x) {
+      return std::tuple{x->file->priority, x->sym_idx};
     });
 
     // Now that we know the number of symbols in the thunk, we can compute
@@ -221,15 +226,22 @@ void OutputSection<E>::create_range_extension_thunks(Context<E> &ctx) {
     b = c;
   }
 
-  while (t < thunks.size())
-    reset(*thunks[t++]);
-
-  u32 p2align = 0;
-  for (InputSection<E> *isec : members)
-    p2align = std::max<u32>(p2align, isec->p2align);
+  for (; t < thunks.size(); t++)
+    for (Symbol<E> *sym : thunks[t]->symbols)
+      sym->flags = 0;
 
   this->shdr.sh_size = offset;
-  this->shdr.sh_addralign = 1 << p2align;
+}
+
+template <>
+void remove_redundant_thunks(Context<E> &ctx) {
+  Timer t(ctx, "remove_redundant_thunks");
+  set_osec_offsets(ctx);
+
+  for (Chunk<E> *chunk : ctx.chunks)
+    if (OutputSection<E> *osec = chunk->to_osec())
+      if (osec->shdr.sh_flags & SHF_EXECINSTR)
+        osec->create_range_extension_thunks(ctx, false);
 }
 
 // When applying relocations, we want to know the address in a reachable
@@ -249,8 +261,8 @@ void gather_thunk_addresses(Context<E> &ctx) {
     if (OutputSection<E> *osec = chunk->to_osec())
       sections.push_back(osec);
 
-  sort(sections, [](OutputSection<E> *a, OutputSection<E> *b) {
-    return a->shdr.sh_addr < b->shdr.sh_addr;
+  ranges::stable_sort(sections, {}, [](OutputSection<E> *x) {
+    return x->shdr.sh_addr;
   });
 
   for (OutputSection<E> *osec : sections) {

src/tls.cc

@@ -72,21 +72,46 @@
 //     TLV is sometimes compiled to a function call! The module ID and the
 //     offset are usually stored to GOT as two consecutive words.
 //
-// The last access method is the most generic, so the compiler emits such
-// code by default. But that's the most expensive one, so the linker
-// rewrites instructions if possible so that 3) is relaxed to 2) or even
-// to 1).
-//
 // 1) is called the Local Exec access model. 2) is Initial Exec, and 3) is
 // General Dynamic.
 //
 // There's another little trick that the compiler can use if it knows two
 // TLVs are in the same ELF file (usually in the same file as the code is).
-// In this case, we can call __tls_get_addr() only once with a module ID and
-// the offset 0 to obtain the base address of the ELF file's TLS block. The
-// base address obtained this way is sometimes called Dynamic Thread Pointer
-// or DTP. We can then compute TLVs' addresses by adding their DTP-relative
-// addresses to DTP. This access model is called the Local Dynamic.
+// In this case, we can call __tls_get_addr() only once with the module ID
+// and the offset 0 to obtain the base address of the ELF file's TLS block.
+// The base address obtained this way is sometimes called Dynamic Thread
+// Pointer or DTP. We can then compute TLVs' addresses by adding their
+// DTP-relative addresses to DTP. This access model is called the Local
+// Dynamic.
+//
+// The compiler tries to emit the most efficient code for a TLV access based
+// on compiler command line options and TLV properties as follows:
+//
+//  1. If -fno-PIC or -fPIE is given, and a TLV is defined as a file-local
+//     variable, the compiler knows that it is compiling code for an
+//     executable (i.e. not for a shared library) and the TLV is defined
+//     within the executable. In this case, Local Exec is used to access the
+//     variable.
+//
+//  2. If -fno-PIC or -fPIE is given (i.e. the compiler is compiling code for
+//     a main executable), but a TLV is defined in another translation unit,
+//     then the variable may be defined not in the main executable but in a
+//     shared library. In this case, Initial Exec is used to access the
+//     variable.
+//
+//  3. If -fPIC is given, it may be compiling code for dlopen'able shared
+//     library. In this case, Local Dynamic or General Dynamic is used to
+//     access TLVs.
+//
+// You can also manually control how the compiler emits TLV access code
+// globally with `-ftls-model=<model-name>` or per-variable basis with
+// `__attribute__((tls_model(<model-name>)))`. For example, if you are
+// building a shared library that you have no plan to use with dlopen(), you
+// may want to compile the source files with `-ftls-model=initial-exec` to
+// avoid the cost associated with the General Dynamic access model.
+//
+// The linker may rewrite instructions with a code sequence for a cheaper
+// access model at link-time.
 //
 // === TLS Descriptor access model ===
 //
@@ -137,7 +162,7 @@ u64 get_tp_addr(const ElfPhdr<E> &phdr) {
     // and %a0/%a1 on s390x) refers to past the end of the TLS block for
     // historical reasons. TLVs are accessed with negative offsets from TP.
     return align_to(phdr.p_vaddr + phdr.p_memsz, phdr.p_align);
-  } else if constexpr (is_arm<E> || is_sh4<E>) {
+  } else if constexpr (is_arm<E> || is_sh4<E> || is_arc<E>) {
     // On ARM and SH4, the runtime appends two words at the beginning
     // of TLV template image when copying TLVs to the TLS block, so we need
     // to offset it.

test/CMakeLists.txt

@@ -31,7 +31,7 @@ endif()
 if(MOLD_ENABLE_QEMU_TESTS)
   list(APPEND QEMU_ARCHS
     x86_64 i386 arm aarch64 aarch64_be ppc ppc64 ppc64le sparc64 sh4 sh4eb
-    s390x riscv64 riscv32 m68k loongarch64)
+    s390x riscv64 riscv32 m68k loongarch64 arc)
 
   LIST(APPEND TRIPLES
     x86_64-linux-gnu
@@ -49,7 +49,8 @@ if(MOLD_ENABLE_QEMU_TESTS)
     sh4aeb-linux-gnu
     riscv32-linux-gnu
     m68k-linux-gnu
-    loongarch64-linux-gnu)
+    loongarch64-linux-gnu
+    arc-linux-gnu)
 
   foreach(ARCH IN LISTS QEMU_ARCHS)
     find_program(HAS_qemu-${ARCH} qemu-${ARCH})
@@ -184,3 +185,7 @@ endif()
 if(${MACHINE} STREQUAL "loongarch64" OR (HAS_qemu-loongarch64 AND HAS_loongarch64-linux-gnu-gcc))
   add_target(loongarch64 loongarch64-linux-gnu)
 endif()
+
+if(${MACHINE} STREQUAL "arc" OR (HAS_qemu-loongarch64 AND HAS_arc-linux-gnu-gcc))
+  add_target(arc arc-linux-gnu)
+endif()

test/abs-error.sh

@@ -18,5 +18,5 @@ extern char foo;
 int main() { printf("foo=%p\n", &foo); }
 EOF
 
-! $CC -B. -o $t/exe -pie $t/a.o $t/b.o -Wl,-z,text >& $t/log
-grep -q 'recompile with -fPIC' $t/log
+not $CC -B. -o $t/exe -pie $t/a.o $t/b.o -Wl,-z,text |&
+  grep 'recompile with -fPIC'

test/absolute-symbols.sh

@@ -36,4 +36,4 @@ int main() {
 EOF
 
 $CC -B. -o $t/exe -no-pie $t/a.o $t/b.o
-$QEMU $t/exe | grep -q '^ip=0xa0000.$'
+$QEMU $t/exe | grep '^ip=0xa0000.$'

test/allow-multiple-definition.sh

@@ -4,6 +4,6 @@
 echo 'int main() { return 0; }' | $CC -c -o $t/a.o -xc -
 echo 'int main() { return 1; }' | $CC -c -o $t/b.o -xc -
 
-! $CC -B. -o $t/exe $t/a.o $t/b.o 2> /dev/null || false
+not $CC -B. -o $t/exe $t/a.o $t/b.o 2> /dev/null
 $CC -B. -o $t/exe $t/a.o $t/b.o -Wl,-allow-multiple-definition
 $CC -B. -o $t/exe $t/a.o $t/b.o -Wl,-z,muldefs

test/arch-aarch64-range-extension-thunk-disassembly.sh

@@ -18,4 +18,4 @@ EOF
 $CC -B. -o $t/exe $t/a.o \
   -Wl,--section-start=.low=0x10000000,--section-start=.high=0x20000000
 
-$OBJDUMP -dr $t/exe | grep -Eq '<fn1\$thunk[0-9]+>:'
+$OBJDUMP -dr $t/exe | grep -E '<fn1\$thunk[0-9]+>:'

test/arch-aarch64-variant-pcs.sh

@@ -10,7 +10,7 @@ foo:
 EOF
 
 $CC -B. -shared -o $t/b.so $t/a.o
-readelf -W --dyn-syms $t/b.so | grep foo | grep -Fq '[VARIANT_PCS]'
+readelf -W --dyn-syms $t/b.so | grep foo | grep -F '[VARIANT_PCS]'
 
 cat <<EOF | $CC -c -o $t/c.o -xc -
 void foo();
@@ -18,4 +18,4 @@ int main() { foo(); }
 EOF
 
 $CC -B. -o $t/exe $t/c.o $t/b.so
-readelf -W --dynamic $t/exe | grep -q AARCH64_VARIANT_PCS
+readelf -W --dynamic $t/exe | grep AARCH64_VARIANT_PCS

test/arch-arm-abs-error.sh

@@ -14,5 +14,5 @@ EOF
 
 $CC -o $t/exe -pie $t/a.o $t/b.o >& /dev/null && skip
 
-! $CC -B. -o $t/exe -pie $t/a.o $t/b.o >& $t/log
-grep -q 'recompile with -fPIC' $t/log
+not $CC -B. -o $t/exe -pie $t/a.o $t/b.o |&
+  grep 'recompile with -fPIC'

test/arch-arm-exidx-sentinel.sh

@@ -0,0 +1,13 @@
+#!/bin/bash
+. $(dirname $0)/common.inc
+
+cat <<EOF | $CXX -o $t/a.o -c -xc++ - -fno-PIC
+#include <stdio.h>
+extern char _etext[];
+int main() {
+  printf("%p\n", _etext);
+}
+EOF
+
+$CXX -B. -o $t/exe $t/a.o -no-pie
+readelf --unwind $t/exe | grep "$($QEMU $t/exe) .*cantunwind"

test/arch-arm-range-extension-thunk-disassembly.sh

@@ -20,5 +20,5 @@ $CC -B. -o $t/exe $t/a.o \
 
 $OBJDUMP -dr $t/exe | grep -E -A7 '<fn1\$thunk[0-9]+>:' > $t/log
 
-grep -Eq 'bx\s+pc' $t/log
-grep -Eq 'add\s+pc, ip, pc' $t/log
+grep -E 'bx\s+pc' $t/log
+grep -E 'add\s+pc, ip, pc' $t/log

test/arch-arm-range-extension-thunk.sh

@@ -1,8 +1,7 @@
 #!/bin/bash
 . $(dirname $0)/common.inc
 
-echo 'int main() {}' | $CC -c -o /dev/null -xc - -O0 -mthumb >& /dev/null \
-  || skip
+test_cflags -mthumb || skip
 
 cat <<EOF > $t/a.c
 #include <stdio.h>
@@ -35,11 +34,11 @@ $CC -c -o $t/d.o $t/b.c -O0 -marm
 
 $CC -B. -o $t/exe $t/c.o $t/d.o \
   -Wl,--section-start=.low=0x10000000,--section-start=.high=0x20000000
-$QEMU $t/exe | grep -q 'main fn1 fn3 fn2 fn4'
+$QEMU $t/exe | grep 'main fn1 fn3 fn2 fn4'
 
 $CC -c -o $t/e.o $t/a.c -O2 -mthumb
 $CC -c -o $t/f.o $t/b.c -O2 -marm
 
 $CC -B. -o $t/exe $t/e.o $t/f.o \
   -Wl,--section-start=.low=0x10000000,--section-start=.high=0x20000000
-$QEMU $t/exe | grep -q 'main fn1 fn3 fn2 fn4'
+$QEMU $t/exe | grep 'main fn1 fn3 fn2 fn4'

test/arch-arm-target1.sh

@@ -16,4 +16,4 @@ int main() { printf("%s\n", foo); }
 EOF
 
 $CC -B. -o $t/exe -pie $t/a.o $t/b.o
-$QEMU $t/exe | grep -q 'Hello world'
+$QEMU $t/exe | grep 'Hello world'

test/arch-arm-thm-jump19.sh

@@ -0,0 +1,29 @@
+#!/bin/bash
+. $(dirname $0)/common.inc
+
+cat <<EOF | $CC -o $t/a.o -c -xassembler -
+.syntax unified
+.globl bar
+.thumb
+bar:
+ beq foo-2
+EOF
+
+$OBJDUMP -d $t/a.o | grep -E 'beq\.w' || skip
+
+cat <<EOF | $CC -o $t/b.o -c -xassembler -
+.globl foo, baz
+.thumb
+baz:
+ nop
+foo:
+ nop
+EOF
+
+cat <<EOF | $CC -o $t/c.o -c -xc -
+void bar();
+int main() { bar(); }
+EOF
+
+$CC -B. -o $t/exe $t/a.o $t/b.o $t/c.o
+$OBJDUMP -d $t/exe | grep -E 'beq\.w.*<baz>'

test/arch-arm-thm-jump8.sh

@@ -0,0 +1,29 @@
+#!/bin/bash
+. $(dirname $0)/common.inc
+
+cat <<EOF | $CC -o $t/a.o -c -xassembler -
+.syntax unified
+.globl bar
+.thumb
+bar:
+ beq foo-2
+EOF
+
+$OBJDUMP -d $t/a.o | grep -E 'beq\.n' || skip
+
+cat <<EOF | $CC -o $t/b.o -c -xassembler -
+.globl foo, baz
+.thumb
+baz:
+ nop
+foo:
+ nop
+EOF
+
+cat <<EOF | $CC -o $t/c.o -c -xc -
+void bar();
+int main() { bar(); }
+EOF
+
+$CC -B. -o $t/exe $t/a.o $t/b.o $t/c.o
+$OBJDUMP -d $t/exe | grep -E 'beq\.n.*<baz>'

test/arch-arm-thumb-interwork.sh

@@ -1,7 +1,7 @@
 #!/bin/bash
 . $(dirname $0)/common.inc
 
-echo 'int foo() { return 0; }' | $CC -o /dev/null -c -xc - -mthumb 2> /dev/null || skip
+test_cflags -mthumb || skip
 
 cat <<EOF | $CC -o $t/a.o -c -xc - -mthumb
 #include <stdio.h>
@@ -27,4 +27,4 @@ int main() {
 EOF
 
 $CC -B. -o $t/exe $t/a.o $t/b.o
-$QEMU $t/exe | grep -q 'main foo bar'
+$QEMU $t/exe | grep 'main foo bar'

test/arch-arm-tlsdesc.sh

@@ -2,9 +2,7 @@
 . $(dirname $0)/common.inc
 
 is_musl && skip
-
-echo 'int main() {}' | $GCC -c -o /dev/null -xc - -O0 -mthumb >& /dev/null \
-  || skip
+test_cflags -mthumb || skip
 
 cat <<EOF > $t/a.c
 extern _Thread_local int foo;
@@ -42,33 +40,33 @@ $GCC -fPIC -mtls-dialect=gnu2 -c -o $t/c.o $t/a.c -marm
 $GCC -fPIC -mtls-dialect=gnu2 -c -o $t/d.o $t/b.c -marm
 
 $CC -B. -o $t/exe1 $t/c.o $t/d.o
-$QEMU $t/exe1 | grep -q '42 5'
+$QEMU $t/exe1 | grep '42 5'
 
 $CC -B. -o $t/exe2 $t/c.o $t/d.o -Wl,-no-relax
-$QEMU $t/exe2 | grep -q '42 5'
+$QEMU $t/exe2 | grep '42 5'
 
 $CC -B. -o $t/exe3 $t/c.o $t/d.o -Wl,-no-relax \
   -Wl,--section-start=.low=0x10000000,--section-start=.high=0x20000000
-$QEMU $t/exe3 | grep -q '42 5'
+$QEMU $t/exe3 | grep '42 5'
 
 $GCC -B. -shared -o $t/c.so $t/c.o -Wl,-z,nodlopen
 $CC -B. -o $t/exe4 $t/c.so $t/d.o
-$QEMU $t/exe4 | grep -q '42 5'
+$QEMU $t/exe4 | grep '42 5'
 
 
 $GCC -fPIC -mtls-dialect=gnu2 -c -o $t/e.o $t/a.c -mthumb
 $GCC -fPIC -mtls-dialect=gnu2 -c -o $t/f.o $t/b.c -mthumb
 
 $CC -B. -o $t/exe5 $t/e.o $t/f.o
-$QEMU $t/exe5 | grep -q '42 5'
+$QEMU $t/exe5 | grep '42 5'
 
 $CC -B. -o $t/exe6 $t/e.o $t/f.o -Wl,-no-relax
-$QEMU $t/exe6 | grep -q '42 5'
+$QEMU $t/exe6 | grep '42 5'
 
 $CC -B. -o $t/exe7 $t/e.o $t/f.o -Wl,-no-relax \
   -Wl,--section-start=.low=0x10000000,--section-start=.high=0x20000000
-$QEMU $t/exe7 | grep -q '42 5'
+$QEMU $t/exe7 | grep '42 5'
 
 $GCC -B. -shared -o $t/e.so $t/e.o -Wl,-z,nodlopen
 $CC -B. -o $t/exe8 $t/e.so $t/f.o
-$QEMU $t/exe8 | grep -q '42 5'
+$QEMU $t/exe8 | grep '42 5'

test/arch-i686-tls-module-base.sh

@@ -37,11 +37,11 @@ int main() {
 EOF
 
 $CC -o $t/exe1 $t/a.o $t/b.o $t/c.o -pie
-$QEMU $t/exe1 | grep -q '^20 3$'
+$QEMU $t/exe1 | grep '^20 3$'
 
 $CC -o $t/exe2 $t/a.o $t/b.o $t/c.o -Wl,-no-relax -pie
-$QEMU $t/exe2 | grep -q '^20 3$'
+$QEMU $t/exe2 | grep '^20 3$'
 
 $CC -o $t/d.so $t/a.o -shared
 $CC -o $t/exe3 $t/b.o $t/c.o $t/d.so -pie
-$QEMU $t/exe3 | grep -q '^20 3$'
+$QEMU $t/exe3 | grep '^20 3$'

test/arch-i686-tlsdesc.sh

@@ -34,15 +34,15 @@ int main() {
 EOF
 
 $CC -B. -o $t/exe1 $t/a.o $t/b.o
-$QEMU $t/exe1 | grep -q 42
+$QEMU $t/exe1 | grep 42
 
 $CC -B. -o $t/exe2 $t/a.o $t/b.o -Wl,-no-relax
-$QEMU $t/exe2 | grep -q 42
+$QEMU $t/exe2 | grep 42
 
 $CC -B. -shared -o $t/c.so $t/a.o
 $CC -B. -o $t/exe3 $t/b.o $t/c.so
-$QEMU $t/exe3 | grep -q 42
+$QEMU $t/exe3 | grep 42
 
 $CC -B. -shared -o $t/c.so $t/a.o -Wl,-no-relax
 $CC -B. -o $t/exe4 $t/b.o $t/c.so -Wl,-no-relax
-$QEMU $t/exe4 | grep -q 42
+$QEMU $t/exe4 | grep 42

test/arch-loongarch64-mcmodel-extreme.sh

@@ -8,4 +8,4 @@ int main() { printf(msg); }
 EOF
 
 $CC -B. -o $t/exe1 $t/a.o
-$QEMU $t/exe1 | grep -q 'Hello world'
+$QEMU $t/exe1 | grep 'Hello world'

test/arch-loongarch64-relax-call36.sh

@@ -38,15 +38,15 @@ int main() {
 EOF
 
 $CC -B. -o $t/exe1 $t/a.o $t/b.o -Wl,--no-relax
-$QEMU $t/exe1 | grep -q foofoo
+$QEMU $t/exe1 | grep foofoo
 
 $OBJDUMP -d $t/exe1 > $t/exe1.objdump
-grep -A2 '<foo>:' $t/exe1.objdump | grep -wq pcaddu18i
-grep -A2 '<bar>:' $t/exe1.objdump | grep -wq pcaddu18i
+grep -A2 '<foo>:' $t/exe1.objdump | grep -w pcaddu18i
+grep -A2 '<bar>:' $t/exe1.objdump | grep -w pcaddu18i
 
 $CC -B. -o $t/exe2 $t/a.o $t/b.o -Wl,--relax
-$QEMU $t/exe2 | grep -q foofoo
+$QEMU $t/exe2 | grep foofoo
 
 $OBJDUMP -d $t/exe2 > $t/exe2.objdump
-grep -A2 '<foo>:' $t/exe2.objdump | grep -wq bl
-grep -A2 '<bar>:' $t/exe2.objdump | grep -wq b
+grep -A2 '<foo>:' $t/exe2.objdump | grep -w bl
+grep -A2 '<bar>:' $t/exe2.objdump | grep -w b

test/arch-loongarch64-relax-got-load.sh

@@ -17,17 +17,17 @@ int main() { printf("%d\n", get_foo()); }
 EOF
 
 $CC -B. -o $t/exe1 $t/a.o $t/b.o $t/c.o -pie -Wl,--no-relax
-$QEMU $t/exe1 | grep -q '^3$'
-$OBJDUMP -d $t/exe1 | grep -A2 '<get_foo>:' | grep -Fqw pcalau12i
-$OBJDUMP -d $t/exe1 | grep -A2 '<get_foo>:' | grep -Fqw ld.d
+$QEMU $t/exe1 | grep '^3$'
+$OBJDUMP -d $t/exe1 | grep -A2 '<get_foo>:' | grep -Fw pcalau12i
+$OBJDUMP -d $t/exe1 | grep -A2 '<get_foo>:' | grep -Fw ld.d
 
 $CC -B. -o $t/exe2 $t/a.o $t/b.o $t/c.o -pie -Wl,--relax
-$QEMU $t/exe2 | grep -q '^3$'
-$OBJDUMP -d $t/exe2 | grep -A1 '<get_foo>:' | grep -Fqw pcaddi
+$QEMU $t/exe2 | grep '^3$'
+$OBJDUMP -d $t/exe2 | grep -A1 '<get_foo>:' | grep -Fw pcaddi
 
 $CC -B. -o $t/exe3 $t/a.o $t/b.o $t/c.o -pie -Wl,--relax \
   -Wl,-Ttext=0x1000000,-Tdata=0x2000000
 
-$QEMU $t/exe3 | grep -q '^3$'
-$OBJDUMP -d $t/exe3 | grep -A2 '<get_foo>:' | grep -Fqw pcalau12i
-$OBJDUMP -d $t/exe3 | grep -A2 '<get_foo>:' | grep -Fqw addi.d
+$QEMU $t/exe3 | grep '^3$'
+$OBJDUMP -d $t/exe3 | grep -A2 '<get_foo>:' | grep -Fw pcalau12i
+$OBJDUMP -d $t/exe3 | grep -A2 '<get_foo>:' | grep -Fw addi.d

test/arch-loongarch64-relax-pcala-addi.sh

@@ -42,17 +42,17 @@ int main() {
 EOF
 
 $CC -B. -o $t/exe1 $t/a.o $t/b.o $t/c.o -Wl,--no-relax
-$QEMU $t/exe1 | grep -q '^1 2 3$'
+$QEMU $t/exe1 | grep '^1 2 3$'
 
 $OBJDUMP -d $t/exe1 > $t/exe1.objdump
-grep -A1 '<get_sym1>:' $t/exe1.objdump | grep -q pcalau12i
-grep -A1 '<get_sym2>:' $t/exe1.objdump | grep -q pcalau12i
-grep -A1 '<get_sym3>:' $t/exe1.objdump | grep -q pcalau12i
+grep -A1 '<get_sym1>:' $t/exe1.objdump | grep pcalau12i
+grep -A1 '<get_sym2>:' $t/exe1.objdump | grep pcalau12i
+grep -A1 '<get_sym3>:' $t/exe1.objdump | grep pcalau12i
 
 $CC -B. -o $t/exe2 $t/a.o $t/b.o $t/c.o -Wl,--relax
-$QEMU $t/exe2 | grep -q '^1 2 3$'
+$QEMU $t/exe2 | grep '^1 2 3$'
 
 $OBJDUMP -d $t/exe2 > $t/exe2.objdump
-grep -A1 '<get_sym1>:' $t/exe2.objdump | grep -q pcaddi
-grep -A1 '<get_sym2>:' $t/exe2.objdump | grep -q pcaddi
-grep -A1 '<get_sym3>:' $t/exe2.objdump | grep -q pcalau12i
+grep -A1 '<get_sym1>:' $t/exe2.objdump | grep pcaddi
+grep -A1 '<get_sym2>:' $t/exe2.objdump | grep pcaddi
+grep -A1 '<get_sym3>:' $t/exe2.objdump | grep pcalau12i

test/arch-loongarch64-relax-tlsdesc.sh

@@ -29,15 +29,16 @@ int main() {
 EOF
 
 $CC -B. -o $t/exe1 $t/a.o $t/b.o $t/c.o $t/d.o -Wl,--no-relax
-$QEMU $t/exe1 | grep -q 'foo bar'
+{ $QEMU $t/exe1; true; } |& grep 'unexpected reloc type' && skip
+$QEMU $t/exe1 | grep 'foo bar'
 
 $OBJDUMP -d $t/exe1 > $t/exe1.objdump
-grep -A6 '<get_foo>:' $t/exe1.objdump | grep -Fq pcalau12i
-grep -A6 '<get_bar>:' $t/exe1.objdump | grep -Fq pcalau12i
+grep -A6 '<get_foo>:' $t/exe1.objdump | grep -F pcalau12i
+grep -A6 '<get_bar>:' $t/exe1.objdump | grep -F pcalau12i
 
 $CC -B. -o $t/exe2 $t/a.o $t/b.o $t/c.o $t/d.o -Wl,--relax
-$QEMU $t/exe2 | grep -q 'foo bar'
+$QEMU $t/exe2 | grep 'foo bar'
 
 $OBJDUMP -d $t/exe2 > $t/exe2.objdump
-grep -A6 '<get_foo>:' $t/exe2.objdump | grep -Fq li.w
-grep -A6 '<get_bar>:' $t/exe2.objdump | grep -Fq lu12i.w
+grep -A6 '<get_foo>:' $t/exe2.objdump | grep -F li.w
+grep -A6 '<get_bar>:' $t/exe2.objdump | grep -F lu12i.w

test/arch-ppc64le-save-restore-gprs.sh

@@ -9,4 +9,4 @@ int main() {
 EOF
 
 $CC -B. -o $t/exe $t/a.o
-$OBJDUMP -d $t/exe | grep -q '<_savegpr0_14>'
+$OBJDUMP -d $t/exe | grep '<_savegpr0_14>'

test/arch-riscv64-attributes.sh

@@ -6,7 +6,7 @@ void foo() {}
 EOF
 
 # The compiler might not create .riscv.attributes
-readelf --sections $t/a.o | grep -Fq .riscv.attributes || skip
+readelf --sections $t/a.o | grep -F .riscv.attributes || skip
 
 cat <<EOF | $CC -march=rv64imafd_xtheadba2p0 -o $t/b.o -c -xc -
 void bar() {}
@@ -17,7 +17,7 @@ void _start() {}
 EOF
 
 $CC -B. -nostdlib -o $t/exe $t/a.o $t/c.o
-readelf -A $t/exe | grep -q '_xtheadba1p5"'
+readelf -A $t/exe | grep '_xtheadba1p5"'
 
 $CC -B. -nostdlib -o $t/exe $t/a.o $t/b.o $t/c.o
-readelf -A $t/exe | grep -q '_xtheadba2p0"'
+readelf -A $t/exe | grep '_xtheadba2p0"'

test/arch-riscv64-attributes2.sh

@@ -10,5 +10,5 @@ $STRIP --remove-section=.riscv.attributes $t/a.o
 $CC -B. -nostdlib -o $t/exe $t/a.o
 
 readelf -W --segments --sections $t/exe > $t/log
-! grep -F .riscv.attributes $t/log || false
-! grep -F RISCV_ATTR $t/log || false
+not grep -F .riscv.attributes $t/log
+not grep -F RISCV_ATTR $t/log

test/arch-riscv64-global-pointer-dso.sh

@@ -24,4 +24,4 @@ int main() {
 EOF
 
 $CC -B. -o $t/exe $t/b.so $t/c.o $t/d.o
-$QEMU $t/exe | grep -q 'Hello world'
+$QEMU $t/exe | grep 'Hello world'

test/arch-riscv64-global-pointer.sh

@@ -9,10 +9,10 @@ int main() {
 EOF
 
 $CC -B. -o $t/exe1 $t/a.o -fno-PIE
-readelf -W --dyn-syms $t/exe1 | grep -Fq '__global_pointer$'
+readelf -W --dyn-syms $t/exe1 | grep -F '__global_pointer$'
 
 $CC -B. -o $t/exe2 $t/a.o -fPIE
-readelf -W --dyn-syms $t/exe2 | grep -Fq '__global_pointer$'
+readelf -W --dyn-syms $t/exe2 | grep -F '__global_pointer$'
 
 cat <<EOF | $CC -o $t/b.o -c -xc - -fPIC
 #include <stdio.h>
@@ -22,5 +22,4 @@ int hello() {
 EOF
 
 $CC -B. -o $t/c.so $t/b.o -shared
-readelf -W --dyn-syms $t/c.so > $t/log1
-! grep -Fq '__global_pointer$' $t/log1 || false
+readelf -W --dyn-syms $t/c.so | not grep -F '__global_pointer$'

test/arch-riscv64-norvc.sh

@@ -1,30 +0,0 @@
-#!/bin/bash
-. $(dirname $0)/common.inc
-
-# Disable C extension
-if [ $MACHINE = riscv32 ]; then
-    ISA=rv32g
-else
-    ISA=rv64g
-fi
-
-cat <<EOF | $CC -march=$ISA -O2 -o $t/a.o -c -xc -
-int add1(int n) { return n + 1; }
-EOF
-
-cat <<EOF | $CC -march=$ISA -O2 -o $t/b.o -c -xc -
-int add1(int n);
-int add2(int n) { n += 1; return add1(n); }
-EOF
-
-cat <<EOF | $CC -march=$ISA -O2 -o $t/c.o -c -xc -
-int add2(int n);
-int main() {
-  add2(0);
-  return 0;
-}
-EOF
-
-$CC -march=$ISA -B. -nostdlib -O2 -o $t/exe $t/a.o $t/b.o $t/c.o
-
-$OBJDUMP -d $t/exe | grep -q ff5ff06f # j pc - 0xc

test/arch-riscv64-obj-compatible.sh

@@ -18,5 +18,5 @@ int main() {
 }
 EOF
 
-! $CC -B. -o $t/exe $t/a.o $t/b.o 2> $t/log || false
-grep -q 'cannot link object files with different floating-point ABI' $t/log
+not $CC -B. -o $t/exe $t/a.o $t/b.o |&
+  grep 'cannot link object files with different floating-point ABI'

test/arch-riscv64-relax-align.sh

@@ -30,4 +30,4 @@ int main() {
 EOF
 
 $CC -B. -o $t/exe $t/a.o $t/b.o $t/c.o
-$QEMU $t/exe | grep -q '0 0 32'
+$QEMU $t/exe | grep '0 0 32'

test/arch-riscv64-relax-got.sh

@@ -71,9 +71,9 @@ int main() {
 EOF
 
 $CC -B. -o $t/exe1 $t/a.o $t/b.o $t/c.o -Wl,--no-relax
-$QEMU $t/exe1 | grep -Eq '^0 ba beef 11beef deadbeef$'
+$QEMU $t/exe1 | grep -E '^0 ba beef 11beef deadbeef$'
 
 $CC -B. -o $t/exe2 $t/a.o $t/b.o $t/c.o
-$QEMU $t/exe2 | grep -Eq '^0 ba beef 11beef deadbeef$'
+$QEMU $t/exe2 | grep -E '^0 ba beef 11beef deadbeef$'
 
-$OBJDUMP -d $t/exe2 | grep -A2 '<get_sym2>:' | grep -Eq $'li[ \t]+a0,186$'
+$OBJDUMP -d $t/exe2 | grep -A2 '<get_sym2>:' | grep -E $'li[ \t]+a0,186$'

test/arch-riscv64-relax-hi20.sh

@@ -53,21 +53,21 @@ int main() {
 EOF
 
 $CC -B. -o $t/exe1 $t/a.o $t/b.o $t/c.o -Wl,--no-relax
-$QEMU $t/exe1 | grep -q 'f00 10000f00 0 1ffff 11beef'
+$QEMU $t/exe1 | grep 'f00 10000f00 0 1ffff 11beef'
 
 $CC -B. -o $t/exe2 $t/a.o $t/b.o $t/c.o
-$QEMU $t/exe2 | grep -q 'f00 10000f00 0 1ffff 11beef'
+$QEMU $t/exe2 | grep 'f00 10000f00 0 1ffff 11beef'
 
 readelf --syms $t/exe1 > $t/log1
-grep -Eq ' 10 NOTYPE .* get_foo$' $t/log1
-grep -Eq ' 10 NOTYPE .* get_foo2$' $t/log1
-grep -Eq ' 10 NOTYPE .* get_bar$' $t/log1
-grep -Eq ' 10 NOTYPE .* get_bar2$' $t/log1
-grep -Eq ' 10 NOTYPE .* get_baz$' $t/log1
+grep -E ' 10 NOTYPE .* get_foo$' $t/log1
+grep -E ' 10 NOTYPE .* get_foo2$' $t/log1
+grep -E ' 10 NOTYPE .* get_bar$' $t/log1
+grep -E ' 10 NOTYPE .* get_bar2$' $t/log1
+grep -E ' 10 NOTYPE .* get_baz$' $t/log1
 
 readelf --syms $t/exe2 > $t/log2
-grep -Eq ' 8 NOTYPE .* get_foo$' $t/log2
-grep -Eq ' 10 NOTYPE .* get_foo2$' $t/log2
-grep -Eq ' 6 NOTYPE .* get_bar$' $t/log2
-grep -Eq ' 10 NOTYPE .* get_bar2$' $t/log2
-grep -Eq ' 10 NOTYPE .* get_baz$' $t/log2
+grep -E ' 8 NOTYPE .* get_foo$' $t/log2
+grep -E ' 10 NOTYPE .* get_foo2$' $t/log2
+grep -E ' 6 NOTYPE .* get_bar$' $t/log2
+grep -E ' 10 NOTYPE .* get_bar2$' $t/log2
+grep -E ' 10 NOTYPE .* get_baz$' $t/log2

test/arch-riscv64-relax-j.sh

@@ -0,0 +1,31 @@
+#!/bin/bash
+. $(dirname $0)/common.inc
+
+cat <<EOF | $CC -o $t/a.o -c -xc - -O2 -march=rv64g
+void g() {}
+EOF
+
+cat <<EOF | $CC -o $t/b.o -c -xc - -O2 -march=rv64g
+void g();
+void f() { g(); }
+int main() { f(); }
+EOF
+
+$CC -B. -march=rv64g -o $t/exe1 $t/a.o $t/b.o
+$QEMU $t/exe1
+$OBJDUMP -d $t/exe1 | grep -E '\bj\b.*<g>'
+
+
+cat <<EOF | $CC -o $t/c.o -c -xc - -O2 -march=rv64gc
+void g() {}
+EOF
+
+cat <<EOF | $CC -o $t/d.o -c -xc - -O2 -march=rv64gc
+void g();
+void f() { g(); }
+int main() { f(); }
+EOF
+
+$CC -B. -march=rv64g -o $t/exe2 $t/c.o $t/d.o
+$QEMU $t/exe2
+$OBJDUMP -d $t/exe2 | grep -E '\bj\b.*<g>'

test/arch-riscv64-symbol-size.sh

@@ -33,8 +33,8 @@ EOF
 
 $CC -B. -o $t/exe $t/a.o $t/b.o $t/c.o
 
-readelf --syms $t/a.o | grep -Eq ' 10 FUNC .* get_foo$'
-readelf --syms $t/a.o | grep -Eq ' 10 FUNC .* get_bar$'
+readelf --syms $t/a.o | grep -E ' 10 FUNC .* get_foo$'
+readelf --syms $t/a.o | grep -E ' 10 FUNC .* get_bar$'
 
-readelf --syms $t/exe | grep -Eq ' 8 FUNC .* get_foo$'
-readelf --syms $t/exe | grep -Eq ' 8 FUNC .* get_bar$'
+readelf --syms $t/exe | grep -E ' 8 FUNC .* get_foo$'
+readelf --syms $t/exe | grep -E ' 8 FUNC .* get_bar$'

test/arch-riscv64-variant-cc.sh

@@ -10,7 +10,7 @@ foo:
 EOF
 
 $CC -B. -shared -o $t/b.so $t/a.o
-readelf -W --dyn-syms $t/b.so | grep foo | grep -Fq '[VARIANT_CC]'
+readelf -W --dyn-syms $t/b.so | grep foo | grep -F '[VARIANT_CC]'
 
 cat <<EOF | $CC -c -o $t/c.o -xc -
 void foo();
@@ -18,4 +18,4 @@ int main() { foo(); }
 EOF
 
 $CC -B. -o $t/exe $t/c.o $t/b.so
-readelf -W --dynamic $t/exe | grep -q RISCV_VARIANT_CC
+readelf -W --dynamic $t/exe | grep RISCV_VARIANT_CC

test/arch-riscv64-weak-undef.sh

@@ -18,4 +18,4 @@ int main() { printf("%ld\n", foo()); }
 EOF
 
 $CC -B. -static -o $t/exe $t/a.o $t/b.o
-$QEMU $t/exe | grep -q '^0$'
+$QEMU $t/exe | grep '^0$'

test/arch-s390x-got.sh

@@ -15,4 +15,4 @@ int main() {
 EOF
 
 $CC -B. -o $t/exe $t/a.o -Wl,-defsym=got=_GLOBAL_OFFSET_TABLE_ -no-pie
-$QEMU $t/exe | grep -Eq '^1'
+$QEMU $t/exe | grep -E '^1'

test/arch-x86_64-address-equality.sh

@@ -22,7 +22,7 @@ EOF
 $CC -B. -shared -o $t/d.so $t/c.o
 
 $CC -B. -o $t/exe1 $t/a.o $t/b.o $t/d.so -pie
-$QEMU $t/exe1 | grep -q '^1 '
+$QEMU $t/exe1 | grep '^1 '
 
 $CC -B. -o $t/exe2 $t/a.o $t/b.o $t/d.so -pie -Wl,-no-relax
-$QEMU $t/exe2 | grep -q '^1 '
+$QEMU $t/exe2 | grep '^1 '

test/arch-x86_64-apx-gotpcrelx.sh

@@ -0,0 +1,41 @@
+#!/bin/bash
+. $(dirname $0)/common.inc
+
+# We use Intel SDE to run programs compiled for APX
+command -v sde64 >& /dev/null || skip
+{ sde64 -help; true; } | grep 'Diamond Rapids' || skip
+
+cat <<EOF | $CC -o $t/a.o -c -xassembler - || skip
+.globl get_foo_addr
+get_foo_addr:
+  mov foo@GOTPCREL(%rip), %r16
+  mov %r16, %rax
+  ret
+EOF
+
+$OBJDUMP -r $t/a.o | grep -w R_X86_64_CODE_4_GOTPCRELX
+
+cat <<EOF | $CC -o $t/b.o -c -xc - -fPIC
+void foo() {}
+EOF
+
+$CC -B. -o $t/c.so -shared $t/b.o
+
+cat <<EOF | $CC -o $t/d.o -c -xc -
+#include <stdio.h>
+
+void foo();
+void *get_foo_addr();
+
+int main() {
+  printf("%d %p %p\n", foo == get_foo_addr(), foo, get_foo_addr());
+}
+EOF
+
+$CC -B. -o $t/exe1 $t/a.o $t/b.o $t/d.o
+sde64 -dmr -- $t/exe1 | grep -E '^1 '
+$OBJDUMP -d $t/exe1 | grep -A1 '<get_foo_addr>:' | grep -w lea
+
+$CC -B. -o $t/exe2 $t/a.o $t/c.so $t/d.o
+sde64 -dmr -- $t/exe2 | grep -E '^1 '
+$OBJDUMP -d $t/exe2 | grep -A1 '<get_foo_addr>:' | grep -w mov

test/arch-x86_64-apx-gottpoff.sh

@@ -0,0 +1,33 @@
+#!/bin/bash
+. $(dirname $0)/common.inc
+
+# We use Intel SDE to run programs compiled for APX
+command -v sde64 >& /dev/null || skip
+{ sde64 -help; true; } | grep 'Diamond Rapids' || skip
+
+cat <<'EOF' | $CC -o $t/a.o -c -xassembler - || skip
+.globl get_foo
+get_foo:
+  mov foo@gottpoff(%rip), %r16
+  mov %fs:(%r16), %eax
+  ret
+EOF
+
+$OBJDUMP -r $t/a.o | grep -w R_X86_64_CODE_4_GOTTPOFF
+
+cat <<EOF | $CC -o $t/b.o -c -xc -
+#include <stdio.h>
+
+_Thread_local int foo = 3;
+int get_foo();
+
+int main() {
+  printf("%d %d\n", foo, get_foo());
+}
+EOF
+
+$CC -B. -o $t/exe1 $t/a.o $t/b.o
+sde64 -dmr -- $t/exe1 | grep -E '^3 3$'
+
+$CC -B. -o $t/exe2 $t/a.o $t/b.o -Wl,-no-relax
+sde64 -dmr -- $t/exe2 | grep -E '^3 3$'

test/arch-x86_64-apx-gottpoff2.sh

@@ -0,0 +1,31 @@
+#!/bin/bash
+. $(dirname $0)/common.inc
+
+# We use Intel SDE to run programs compiled for APX
+command -v sde64 >& /dev/null || skip
+{ sde64 -help; true; } | grep 'Diamond Rapids' || skip
+
+cat <<EOF | $CC -o $t/a.o -c -xassembler - || skip
+.globl get_foo
+get_foo:
+  mov %fs:0, %rax
+  addq foo@gottpoff(%rip), %rax, %rax
+  mov (%rax), %eax
+  ret
+EOF
+
+$OBJDUMP -r $t/a.o | grep -w R_X86_64_CODE_6_GOTTPOFF
+
+cat <<EOF | $CC -o $t/b.o -c -xc -
+#include <stdio.h>
+
+_Thread_local int foo = 3;
+int get_foo();
+
+int main() {
+  printf("%d %d\n", foo, get_foo());
+}
+EOF
+
+$CC -B. -o $t/exe1 $t/a.o $t/b.o
+sde64 -dmr -- $t/exe1 | grep -E '^3 3$'

test/arch-x86_64-apx-tlsdesc.sh

@@ -0,0 +1,53 @@
+#!/bin/bash
+. $(dirname $0)/common.inc
+
+supports_tlsdesc || skip
+
+# We use Intel SDE to run programs compiled for APX
+command -v sde64 >& /dev/null || skip
+{ sde64 -help; true; } | grep 'Diamond Rapids' || skip
+
+cat <<EOF | $GCC -c -o $t/a.o -xassembler - || skip
+.globl  get_foo
+.type   get_foo, @function
+get_foo:
+  pushq   %rbp
+  movq    %rsp, %rbp
+  leaq    foo@TLSDESC(%rip), %r16
+  movq    %r16, %rax
+  call    *foo@TLSCALL(%rax)
+  movq    %fs:0, %rdx
+  addq    %rdx, %rax
+  movl    (%rax), %eax
+  popq    %rbp
+  ret
+EOF
+
+$OBJDUMP -r $t/a.o | grep -w R_X86_64_CODE_4_GOTPC32_TLSDESC
+
+cat <<EOF | $GCC -fPIC -c -o $t/b.o -xc - $tlsdesc_opt
+#include <stdio.h>
+
+_Thread_local int foo;
+
+int get_foo();
+
+int main() {
+  foo = 42;
+  printf("%d\n", get_foo());
+}
+EOF
+
+$CC -B. -o $t/exe1 $t/a.o $t/b.o
+sde64 -dmr -- $t/exe1 | grep 42
+
+$CC -B. -o $t/exe2 $t/a.o $t/b.o -Wl,-no-relax
+sde64 -dmr -- $t/exe2 | grep 42
+
+$CC -shared -o $t/c.so $t/a.o
+$CC -B. -o $t/exe3 $t/b.o $t/c.so
+sde64 -dmr -- $t/exe3 | grep 42
+
+$CC -shared -o $t/c.so $t/a.o -Wl,-no-relax
+$CC -B. -o $t/exe4 $t/b.o $t/c.so -Wl,-no-relax
+sde64 -dmr -- $t/exe4 | grep 42

test/arch-x86_64-empty-mergeable-section.sh

@@ -20,5 +20,5 @@ $CC -B. -o $t/exe $t/a.o $t/b.o $t/c.o
 $t/exe
 
 readelf -SW $t/exe > $t/log
-grep -q '.rodata.str1.1 .* AMS ' $t/log
-! grep -q '.rodata.str1.1 .* AM ' $t/log || false
+grep '.rodata.str1.1 .* AMS ' $t/log
+not grep '.rodata.str1.1 .* AM ' $t/log

test/arch-x86_64-emulation-deduction.sh

@@ -6,4 +6,4 @@ void _start() {}
 EOF
 
 ./mold -o $t/exe $t/a.o
-readelf --file-header $t/exe | grep -qi x86-64
+readelf --file-header $t/exe | grep -i x86-64

test/arch-x86_64-execstack-if-needed.sh

@@ -9,7 +9,7 @@ main:
 EOF
 
 $CC -B. -o $t/exe $t/a.o >& /dev/null
-readelf --segments -W $t/exe | grep -q 'GNU_STACK.* RW '
+readelf --segments -W $t/exe | grep 'GNU_STACK.* RW '
 
 $CC -B. -o $t/exe $t/a.o -Wl,-z,execstack-if-needed
-readelf --segments -W $t/exe | grep -q 'GNU_STACK.* RWE '
+readelf --segments -W $t/exe | grep 'GNU_STACK.* RWE '

test/arch-x86_64-function-multiversion.sh

@@ -26,4 +26,4 @@ int main() { hello(); }
 EOF
 
 $CXX -B. -o $t/exe $t/b.so $t/c.o
-$QEMU $t/exe | grep -q '^H'
+$QEMU $t/exe | grep '^H'

test/arch-x86_64-gnu-linkonce.sh

@@ -21,5 +21,5 @@ EOF
 
 $CC -B. -o $t/exe $t/a.o $t/b.o $t/c.o
 $OBJDUMP -d $t/exe >& /dev/null || skip
-$OBJDUMP -d $t/exe | grep -A1 '<__x86.get_pc_thunk.bx>:' | \
-  grep -Fq 'puts$plt'
+$OBJDUMP -d $t/exe | grep -A1 '<__x86.get_pc_thunk.bx>:' |
+  grep -F 'puts$plt'

test/arch-x86_64-gnu-retain.sh

@@ -22,8 +22,7 @@ foo:
 EOF
 
 $CC -B. -o $t/exe1 $t/a.o $t/b.o -Wl,-gc-sections
-nm $t/exe1 | grep -q foo
+nm $t/exe1 | grep foo
 
 $CC -B. -o $t/exe1 $t/a.o $t/c.o -Wl,-gc-sections
-nm $t/exe1 > $t/log
-! grep -q foo $t/log || false
+nm $t/exe1 | not grep foo

test/arch-x86_64-incompatible-libs-linker-script.sh

@@ -1,7 +1,7 @@
 #!/bin/bash
 . $(dirname $0)/common.inc
 
-echo 'int main() {}' | $CC -m32 -o $t/exe -xc - >& /dev/null || skip
+test_cflags -m32 || skip
 
 mkdir -p $t/foo
 
@@ -23,7 +23,7 @@ EOF
 cd $t
 
 $CC -B$OLDPWD -o exe1 -Lfoo a.o b.script
-LD_LIBRARY_PATH=. $QEMU ./exe1 | grep -q 'Hello world'
+LD_LIBRARY_PATH=. $QEMU ./exe1 | grep 'Hello world'
 
 $CC -B$OLDPWD -o exe2 -Lfoo b.script a.o
-LD_LIBRARY_PATH=. $QEMU ./exe2 | grep -q 'Hello world'
+LD_LIBRARY_PATH=. $QEMU ./exe2 | grep 'Hello world'

test/arch-x86_64-incompatible-libs-linker-script2.sh

@@ -1,8 +1,8 @@
 #!/bin/bash
 . $(dirname $0)/common.inc
 
-nm mold | grep -q '__tsan_init' && skip
-echo 'int main() {}' | $CC -m32 -o $t/exe -xc - >& /dev/null || skip
+nm mold | grep '__tsan_init' && skip
+test_cflags -m32 || skip
 
 mkdir -p $t/foo
 

test/arch-x86_64-incompatible-libs.sh

@@ -1,8 +1,7 @@
 #!/bin/bash
 . $(dirname $0)/common.inc
 
-echo 'int main() {}' | $CC -m32 -o $t/exe -xc - >& /dev/null \
-  || skip
+test_cflags -m32 || skip
 
 cat <<EOF | $CC -m32 -c -o $t/a.o -xc -
 char hello[] = "Hello world";
@@ -36,7 +35,7 @@ echo 'OUTPUT_FORMAT(elf32-i386)' > $t/script/libfoo.so
 $CC -B. -o $t/exe -L$t/script -L$t/lib32 -L$t/lib64 \
   $t/e.o -lfoo -Wl,-rpath $t/lib64 >& $t/log
 
-grep -q 'script/libfoo.so: skipping incompatible file' $t/log
-grep -q 'lib32/libfoo.so: skipping incompatible file' $t/log
-grep -q 'lib32/libfoo.a: skipping incompatible file' $t/log
-$QEMU $t/exe | grep -q 'Hello world'
+grep 'script/libfoo.so: skipping incompatible file' $t/log
+grep 'lib32/libfoo.so: skipping incompatible file' $t/log
+grep 'lib32/libfoo.a: skipping incompatible file' $t/log
+$QEMU $t/exe | grep 'Hello world'

test/arch-x86_64-incompatible-libs2.sh

@@ -1,8 +1,8 @@
 #!/bin/bash
 . $(dirname $0)/common.inc
 
-echo 'int main() {}' | $CC -m32 -o $t/exe -xc - >& /dev/null \
-  || skip
+test_cflags -m32 || skip
+nm mold | grep '__tsan_init' && skip
 
 cat <<EOF | $CC -m32 -c -o $t/a.o -xc -
 char hello[] = "Hello world";
@@ -31,8 +31,7 @@ EOF
 mkdir -p $t/script
 echo 'GROUP(libfoo.so)' > $t/script/libfoo.so
 
-$CC -B. -o $t/exe -L$t/lib32 -L$t/lib64 -lfoo $t/e.o -Wl,-rpath $t/lib64 \
-  >& $t/log
+$CC -B. -o $t/exe -L$t/lib32 -L$t/lib64 -lfoo $t/e.o -Wl,-rpath $t/lib64 |&
+  grep 'lib32/libfoo.so: skipping incompatible file'
 
-grep -q 'lib32/libfoo.so: skipping incompatible file' $t/log
-$QEMU $t/exe | grep -q 'Hello world'
+$QEMU $t/exe | grep 'Hello world'

test/arch-x86_64-incompatible-obj.sh

@@ -1,8 +1,7 @@
 #!/bin/bash
 . $(dirname $0)/common.inc
 
-echo 'int main() {}' | $CC -m32 -o $t/exe -xc - >& /dev/null \
-  || skip
+test_cflags -m32 || skip
 
 cat <<EOF | $CC -c -o $t/a.o -m64 -xc -
 int main() {}
@@ -11,5 +10,5 @@ EOF
 cat <<EOF | $CC -c -o $t/b.o -m32 -xc -
 EOF
 
-! $CC -B. -o /dev/null $t/a.o $t/b.o >& $t/log
-grep -q "$t/b.o: incompatible file type: x86_64 is expected but got i386" $t/log
+not $CC -B. -o /dev/null $t/a.o $t/b.o >& $t/log
+grep "$t/b.o: incompatible file type: x86_64 is expected but got i386" $t/log