2017-01-27 12:05:45 +00:00
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// cpu.cpp - originally written and placed in the public domain by Wei Dai
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2020-02-09 10:16:23 +00:00
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// modified by Jeffrey Walton and the community over the years.
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2015-11-05 06:59:46 +00:00
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#include "pch.h"
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#include "config.h"
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#ifndef EXCEPTION_EXECUTE_HANDLER
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# define EXCEPTION_EXECUTE_HANDLER 1
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#endif
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#ifndef CRYPTOPP_IMPORTS
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#include "cpu.h"
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#include "misc.h"
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2017-08-17 06:15:42 +00:00
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#include "stdcpp.h"
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2020-11-21 00:14:35 +00:00
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// For _xgetbv on Microsoft 32-bit and 64-bit Intel platforms
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2020-09-30 17:41:40 +00:00
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// https://github.com/weidai11/cryptopp/issues/972
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2020-11-21 00:14:35 +00:00
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#if _MSC_VER >= 1600 && (defined(_M_IX86) || defined(_M_X64))
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2020-09-30 17:41:40 +00:00
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# include <immintrin.h>
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#endif
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2021-03-12 00:28:18 +00:00
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// For IsProcessorFeaturePresent on Microsoft Arm64 platforms,
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// https://docs.microsoft.com/en-us/windows/win32/api/processthreadsapi/nf-processthreadsapi-isprocessorfeaturepresent
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2021-03-11 18:30:38 +00:00
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#if defined(_WIN32) && defined(_M_ARM64)
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# include <Windows.h>
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# include <processthreadsapi.h>
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#endif
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2017-09-11 07:05:04 +00:00
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#ifdef _AIX
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# include <sys/systemcfg.h>
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#endif
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2017-09-17 06:39:41 +00:00
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#ifdef __linux__
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# include <unistd.h>
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#endif
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2017-10-13 00:14:21 +00:00
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// Capability queries, requires Glibc 2.16, http://lwn.net/Articles/519085/
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2017-09-17 04:41:48 +00:00
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// CRYPTOPP_GLIBC_VERSION not used because config.h is missing <feature.h>
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#if (((__GLIBC__ * 100) + __GLIBC_MINOR__) >= 216)
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# define CRYPTOPP_GETAUXV_AVAILABLE 1
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#endif
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#if CRYPTOPP_GETAUXV_AVAILABLE
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2017-09-13 11:16:41 +00:00
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# include <sys/auxv.h>
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2017-09-17 04:41:48 +00:00
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#else
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2018-03-04 14:17:03 +00:00
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#ifndef AT_HWCAP
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2018-03-21 20:19:43 +00:00
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# define AT_HWCAP 16
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2018-03-04 14:17:03 +00:00
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#endif
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#ifndef AT_HWCAP2
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2018-03-21 20:19:43 +00:00
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# define AT_HWCAP2 26
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2018-03-04 14:17:03 +00:00
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#endif
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2017-09-17 04:41:48 +00:00
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unsigned long int getauxval(unsigned long int) { return 0; }
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2017-09-13 11:16:41 +00:00
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#endif
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2018-07-14 12:20:16 +00:00
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#if defined(__APPLE__)
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2017-09-13 11:16:41 +00:00
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# include <sys/utsname.h>
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2021-03-05 14:15:52 +00:00
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# include <sys/sysctl.h>
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2015-11-05 06:59:46 +00:00
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#endif
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2021-04-26 10:52:22 +00:00
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// FreeBSD headers are giving us trouble...
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// https://github.com/weidai11/cryptopp/pull/1029
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2021-04-25 14:48:50 +00:00
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#if defined(__FreeBSD__)
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# include <sys/auxv.h>
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# include <sys/elf_common.h>
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#endif
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2018-07-14 12:20:16 +00:00
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// The cpu-features header and source file are located in
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// "$ANDROID_NDK_ROOT/sources/android/cpufeatures".
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// setenv-android.sh will copy the header and source file
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// into PWD and the makefile will build it in place.
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2017-09-08 19:43:06 +00:00
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#if defined(__ANDROID__)
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2017-09-13 11:16:41 +00:00
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# include "cpu-features.h"
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#endif
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#ifdef CRYPTOPP_GNU_STYLE_INLINE_ASSEMBLY
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# include <signal.h>
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# include <setjmp.h>
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2017-09-08 19:43:06 +00:00
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#endif
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2020-02-09 10:16:23 +00:00
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// Visual Studio 2008 and below are missing _xgetbv and _cpuidex.
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2020-02-15 08:50:15 +00:00
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// The 32-bit versions use inline ASM below. The 64-bit versions are in x64dll.asm.
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2020-02-07 19:19:46 +00:00
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#if defined(_MSC_VER) && defined(_M_X64)
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2019-05-21 23:44:48 +00:00
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extern "C" unsigned long long __fastcall XGETBV64(unsigned int);
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2020-02-07 19:19:46 +00:00
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extern "C" unsigned long long __fastcall CPUID64(unsigned int, unsigned int, unsigned int*);
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2018-08-19 14:19:29 +00:00
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#endif
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2020-02-09 10:16:23 +00:00
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#ifdef CRYPTOPP_GNU_STYLE_INLINE_ASSEMBLY
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2020-02-07 21:53:22 +00:00
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extern "C" {
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typedef void (*SigHandler)(int);
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}
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extern "C"
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{
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static jmp_buf s_jmpNoCPUID;
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2020-02-17 19:15:02 +00:00
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static void SigIllHandler(int)
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2020-02-07 21:53:22 +00:00
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{
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longjmp(s_jmpNoCPUID, 1);
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}
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}
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2020-02-09 10:16:23 +00:00
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#endif // CRYPTOPP_GNU_STYLE_INLINE_ASSEMBLY
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2020-02-07 21:53:22 +00:00
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2018-07-14 12:20:16 +00:00
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ANONYMOUS_NAMESPACE_BEGIN
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2020-02-07 21:53:22 +00:00
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#if (CRYPTOPP_BOOL_X86 || CRYPTOPP_BOOL_X32 || CRYPTOPP_BOOL_X64)
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2020-02-08 16:04:09 +00:00
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2020-02-07 21:53:22 +00:00
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using CryptoPP::word32;
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inline bool IsIntel(const word32 output[4])
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{
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// This is the "GenuineIntel" string
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return (output[1] /*EBX*/ == 0x756e6547) &&
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(output[2] /*ECX*/ == 0x6c65746e) &&
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(output[3] /*EDX*/ == 0x49656e69);
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}
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inline bool IsAMD(const word32 output[4])
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{
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// This is the "AuthenticAMD" string.
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return ((output[1] /*EBX*/ == 0x68747541) &&
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(output[2] /*ECX*/ == 0x444D4163) &&
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(output[3] /*EDX*/ == 0x69746E65)) ||
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2020-02-08 16:04:09 +00:00
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// Early K5's can return "AMDisbetter!"
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2020-02-07 21:53:22 +00:00
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((output[1] /*EBX*/ == 0x69444d41) &&
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(output[2] /*ECX*/ == 0x74656273) &&
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(output[3] /*EDX*/ == 0x21726574));
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}
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inline bool IsHygon(const word32 output[4])
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{
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// This is the "HygonGenuine" string.
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return (output[1] /*EBX*/ == 0x6f677948) &&
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(output[2] /*ECX*/ == 0x656e6975) &&
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(output[3] /*EDX*/ == 0x6e65476e);
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}
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inline bool IsVIA(const word32 output[4])
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{
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// This is the "CentaurHauls" string.
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return ((output[1] /*EBX*/ == 0x746e6543) &&
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(output[2] /*ECX*/ == 0x736c7561) &&
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(output[3] /*EDX*/ == 0x48727561)) ||
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// Some non-PadLock's return "VIA VIA VIA "
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((output[1] /*EBX*/ == 0x32414956) &&
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(output[2] /*ECX*/ == 0x32414956) &&
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(output[3] /*EDX*/ == 0x32414956));
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}
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#endif // X86, X32 and X64
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2018-07-14 12:20:16 +00:00
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#if defined(__APPLE__)
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2020-02-09 10:16:23 +00:00
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2018-07-14 12:20:16 +00:00
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// http://stackoverflow.com/questions/45637888/how-to-determine-armv8-features-at-runtime-on-ios
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2020-02-09 19:31:52 +00:00
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class AppleMachineInfo
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2018-07-14 12:20:16 +00:00
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{
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2020-02-09 19:31:52 +00:00
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public:
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enum { PowerMac=1, Mac, iPhone, iPod, iPad, AppleTV, AppleWatch };
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2021-03-05 14:15:52 +00:00
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enum { PowerPC=1, I386, I686, X86_64, ARM32, ARMV8, ARMV82, ARMV83 };
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2020-02-09 19:31:52 +00:00
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AppleMachineInfo() : m_device(0), m_version(0), m_arch(0)
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2018-07-14 12:20:16 +00:00
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{
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2020-02-09 19:31:52 +00:00
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struct utsname systemInfo;
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systemInfo.machine[0] = '\0';
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uname(&systemInfo);
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std::string machine(systemInfo.machine);
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std::string::size_type pos = machine.find_first_of("0123456789");
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if (pos != std::string::npos)
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m_version = std::atoi(machine.substr(pos).c_str());
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if (machine.find("iPhone") != std::string::npos)
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{
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m_device = iPhone;
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2020-02-15 08:00:54 +00:00
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if (m_version >= 6) { m_arch = ARMV8; }
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2020-02-09 19:31:52 +00:00
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else { m_arch = ARM32; }
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}
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else if (machine.find("iPod") != std::string::npos)
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{
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m_device = iPod;
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2020-02-15 08:00:54 +00:00
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if (m_version >= 6) { m_arch = ARMV8; }
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2020-02-09 19:31:52 +00:00
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else { m_arch = ARM32; }
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}
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else if (machine.find("iPad") != std::string::npos)
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{
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m_device = iPad;
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2020-02-15 08:00:54 +00:00
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if (m_version >= 5) { m_arch = ARMV8; }
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2020-02-09 19:31:52 +00:00
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else { m_arch = ARM32; }
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}
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else if (machine.find("PowerMac") != std::string::npos ||
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machine.find("Power Macintosh") != std::string::npos)
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{
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m_device = PowerMac;
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m_arch = PowerPC;
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}
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else if (machine.find("Mac") != std::string::npos ||
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machine.find("Macintosh") != std::string::npos)
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{
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#if defined(__x86_64) || defined(__amd64)
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m_device = Mac;
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2020-02-15 08:00:54 +00:00
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m_arch = X86_64;
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2020-02-09 19:31:52 +00:00
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#elif defined(__i386)
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m_device = Mac;
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2020-02-15 08:00:54 +00:00
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m_arch = I386;
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2020-02-09 19:31:52 +00:00
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#elif defined(__i686)
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m_device = Mac;
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2020-02-15 08:00:54 +00:00
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m_arch = I686;
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2020-02-09 19:31:52 +00:00
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#else
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// Should never get here
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m_device = Mac;
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m_arch = 0;
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#endif
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}
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else if (machine.find("AppleTV") != std::string::npos)
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{
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m_device = AppleTV;
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2020-02-15 08:00:54 +00:00
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if (m_version >= 4) { m_arch = ARMV8; }
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2020-02-09 19:31:52 +00:00
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else { m_arch = ARM32; }
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}
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else if (machine.find("AppleWatch") != std::string::npos)
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{
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m_device = AppleWatch;
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2020-02-15 08:00:54 +00:00
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if (m_version >= 4) { m_arch = ARMV8; }
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2020-02-09 19:31:52 +00:00
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else { m_arch = ARM32; }
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}
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2021-02-12 07:53:05 +00:00
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else if (machine.find("arm64") != std::string::npos)
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{
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2021-03-05 14:15:52 +00:00
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// M1 machine?
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std::string brand;
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2021-03-11 19:28:01 +00:00
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size_t size = 32;
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2021-03-05 14:15:52 +00:00
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2021-03-11 19:28:01 +00:00
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// Supply an oversized buffer, and avoid
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// an extra call to sysctlbyname.
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brand.resize(size);
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if (sysctlbyname("machdep.cpu.brand_string", &brand[0], &size, NULL, 0) == 0 && size > 0)
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2021-03-05 14:15:52 +00:00
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{
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2021-03-11 19:28:01 +00:00
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if (brand[size-1] == '\0')
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size--;
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2021-03-05 14:15:52 +00:00
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brand.resize(size);
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}
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if (brand == "Apple M1")
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{
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m_device = Mac;
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m_arch = ARMV82;
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}
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else
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{
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// ???
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m_device = 0;
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m_arch = ARMV8;
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}
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}
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else
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{
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CRYPTOPP_ASSERT(0);
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2021-02-12 07:53:05 +00:00
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}
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2018-07-14 12:20:16 +00:00
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}
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2020-02-09 19:31:52 +00:00
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unsigned int Device() const {
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return m_device;
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}
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unsigned int Version() const {
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return m_version;
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}
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unsigned int Arch() const {
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return m_arch;
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}
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bool IsARM32() const {
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return m_arch == ARM32;
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}
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bool IsARMv8() const {
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2021-03-05 03:50:58 +00:00
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return m_arch >= ARMV8;
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}
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2021-03-05 05:38:04 +00:00
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bool IsARMv82() const {
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return m_arch >= ARMV82;
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}
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2021-03-05 03:50:58 +00:00
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bool IsARMv83() const {
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return m_arch >= ARMV83;
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2020-02-09 19:31:52 +00:00
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}
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private:
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unsigned int m_device, m_version, m_arch;
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};
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void GetAppleMachineInfo(unsigned int& device, unsigned int& version, unsigned int& arch)
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{
|
2020-08-07 23:11:47 +00:00
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#if CRYPTOPP_CXX11_STATIC_INIT
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2020-02-09 19:31:52 +00:00
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static const AppleMachineInfo info;
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#else
|
2020-02-11 04:23:22 +00:00
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using CryptoPP::Singleton;
|
2020-02-10 16:46:41 +00:00
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const AppleMachineInfo& info = Singleton<AppleMachineInfo>().Ref();
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2020-02-09 19:31:52 +00:00
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#endif
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device = info.Device();
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version = info.Version();
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arch = info.Arch();
|
2018-07-14 12:20:16 +00:00
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}
|
|
|
|
|
2020-02-09 19:31:52 +00:00
|
|
|
inline bool IsAppleMachineARM32()
|
2018-07-14 12:20:16 +00:00
|
|
|
{
|
2020-02-15 08:00:54 +00:00
|
|
|
static unsigned int arch;
|
|
|
|
if (arch == 0)
|
|
|
|
{
|
|
|
|
unsigned int unused;
|
|
|
|
GetAppleMachineInfo(unused, unused, arch);
|
|
|
|
}
|
2020-02-09 19:31:52 +00:00
|
|
|
return arch == AppleMachineInfo::ARM32;
|
|
|
|
}
|
|
|
|
|
|
|
|
inline bool IsAppleMachineARMv8()
|
|
|
|
{
|
2020-02-15 08:00:54 +00:00
|
|
|
static unsigned int arch;
|
|
|
|
if (arch == 0)
|
|
|
|
{
|
|
|
|
unsigned int unused;
|
|
|
|
GetAppleMachineInfo(unused, unused, arch);
|
|
|
|
}
|
2021-03-05 03:50:58 +00:00
|
|
|
return arch >= AppleMachineInfo::ARMV8;
|
|
|
|
}
|
|
|
|
|
2021-03-05 05:38:04 +00:00
|
|
|
inline bool IsAppleMachineARMv82()
|
|
|
|
{
|
|
|
|
static unsigned int arch;
|
|
|
|
if (arch == 0)
|
|
|
|
{
|
|
|
|
unsigned int unused;
|
|
|
|
GetAppleMachineInfo(unused, unused, arch);
|
|
|
|
}
|
|
|
|
return arch >= AppleMachineInfo::ARMV82;
|
|
|
|
}
|
|
|
|
|
2021-03-05 03:50:58 +00:00
|
|
|
inline bool IsAppleMachineARMv83()
|
|
|
|
{
|
|
|
|
static unsigned int arch;
|
|
|
|
if (arch == 0)
|
|
|
|
{
|
|
|
|
unsigned int unused;
|
|
|
|
GetAppleMachineInfo(unused, unused, arch);
|
|
|
|
}
|
|
|
|
return arch >= AppleMachineInfo::ARMV83;
|
|
|
|
}
|
|
|
|
|
2018-07-14 12:20:16 +00:00
|
|
|
#endif // __APPLE__
|
|
|
|
|
|
|
|
ANONYMOUS_NAMESPACE_END
|
|
|
|
|
2015-11-05 06:59:46 +00:00
|
|
|
NAMESPACE_BEGIN(CryptoPP)
|
|
|
|
|
2017-08-18 07:03:42 +00:00
|
|
|
// *************************** IA-32 CPUs ***************************
|
2017-08-17 16:33:43 +00:00
|
|
|
|
2017-11-16 20:11:51 +00:00
|
|
|
#if (CRYPTOPP_BOOL_X86 || CRYPTOPP_BOOL_X32 || CRYPTOPP_BOOL_X64)
|
|
|
|
|
2020-02-07 21:53:22 +00:00
|
|
|
bool CRYPTOPP_SECTION_INIT g_x86DetectionDone = false;
|
|
|
|
bool CRYPTOPP_SECTION_INIT g_hasSSE2 = false;
|
|
|
|
bool CRYPTOPP_SECTION_INIT g_hasSSSE3 = false;
|
|
|
|
bool CRYPTOPP_SECTION_INIT g_hasSSE41 = false;
|
|
|
|
bool CRYPTOPP_SECTION_INIT g_hasSSE42 = false;
|
|
|
|
bool CRYPTOPP_SECTION_INIT g_hasAESNI = false;
|
|
|
|
bool CRYPTOPP_SECTION_INIT g_hasCLMUL = false;
|
2020-02-10 17:44:55 +00:00
|
|
|
bool CRYPTOPP_SECTION_INIT g_hasMOVBE = false;
|
2020-02-21 20:59:49 +00:00
|
|
|
bool CRYPTOPP_SECTION_INIT g_hasAVX = false;
|
|
|
|
bool CRYPTOPP_SECTION_INIT g_hasAVX2 = false;
|
2020-02-07 21:53:22 +00:00
|
|
|
bool CRYPTOPP_SECTION_INIT g_hasADX = false;
|
|
|
|
bool CRYPTOPP_SECTION_INIT g_hasSHA = false;
|
|
|
|
bool CRYPTOPP_SECTION_INIT g_hasRDRAND = false;
|
|
|
|
bool CRYPTOPP_SECTION_INIT g_hasRDSEED = false;
|
|
|
|
bool CRYPTOPP_SECTION_INIT g_isP4 = false;
|
|
|
|
bool CRYPTOPP_SECTION_INIT g_hasPadlockRNG = false;
|
|
|
|
bool CRYPTOPP_SECTION_INIT g_hasPadlockACE = false;
|
|
|
|
bool CRYPTOPP_SECTION_INIT g_hasPadlockACE2 = false;
|
|
|
|
bool CRYPTOPP_SECTION_INIT g_hasPadlockPHE = false;
|
|
|
|
bool CRYPTOPP_SECTION_INIT g_hasPadlockPMM = false;
|
|
|
|
word32 CRYPTOPP_SECTION_INIT g_cacheLineSize = CRYPTOPP_L1_CACHE_LINE_SIZE;
|
|
|
|
|
2020-02-21 20:59:49 +00:00
|
|
|
// For Solaris 11
|
2017-11-16 20:11:51 +00:00
|
|
|
extern bool CPU_ProbeSSE2();
|
2015-11-05 06:59:46 +00:00
|
|
|
|
2020-02-21 20:59:49 +00:00
|
|
|
// xcr0 is available when xgetbv is present.
|
2020-02-21 21:05:56 +00:00
|
|
|
// The intrinsic is broke on GCC 8.1 and earlier. Also see
|
|
|
|
// https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85684.
|
2020-02-21 20:59:49 +00:00
|
|
|
word64 XGetBV(word32 num)
|
|
|
|
{
|
2020-09-30 17:41:40 +00:00
|
|
|
// Visual Studio 2010 SP1 and above, 32 and 64-bit
|
|
|
|
// https://github.com/weidai11/cryptopp/issues/972
|
|
|
|
#if defined(_MSC_VER) && (_MSC_FULL_VER >= 160040219)
|
2020-02-21 20:59:49 +00:00
|
|
|
|
|
|
|
return _xgetbv(num);
|
|
|
|
|
|
|
|
// Visual Studio 2008 and below, 64-bit
|
|
|
|
#elif defined(_MSC_VER) && defined(_M_X64)
|
|
|
|
|
|
|
|
return XGETBV64(num);
|
|
|
|
|
|
|
|
// Visual Studio 2008 and below, 32-bit
|
|
|
|
#elif defined(_MSC_VER) && defined(_M_IX86)
|
|
|
|
|
|
|
|
word32 a=0, d=0;
|
|
|
|
__asm {
|
|
|
|
push eax
|
|
|
|
push edx
|
|
|
|
push ecx
|
|
|
|
mov ecx, num
|
|
|
|
_emit 0x0f
|
|
|
|
_emit 0x01
|
|
|
|
_emit 0xd0
|
|
|
|
mov a, eax
|
|
|
|
mov d, edx
|
|
|
|
pop ecx
|
|
|
|
pop edx
|
|
|
|
pop eax
|
|
|
|
}
|
|
|
|
return (static_cast<word64>(d) << 32) | a;
|
|
|
|
|
|
|
|
// GCC 4.4 and above
|
|
|
|
#elif (__GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 4))
|
|
|
|
|
|
|
|
word32 a=0, d=0;
|
|
|
|
__asm__
|
|
|
|
(
|
|
|
|
"xgetbv" : "=a"(a), "=d"(d) : "c"(num) : "cc"
|
|
|
|
);
|
|
|
|
return (static_cast<word64>(d) << 32) | a;
|
|
|
|
|
|
|
|
// Remainder of GCC and compatibles.
|
2020-12-27 21:18:12 +00:00
|
|
|
#elif defined(__GNUC__) || defined(__clang__) || defined(__SUNPRO_CC)
|
2020-02-21 20:59:49 +00:00
|
|
|
|
|
|
|
// https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71659 and
|
|
|
|
// http://www.agner.org/optimize/vectorclass/read.php?i=65
|
|
|
|
word32 a=0, d=0;
|
|
|
|
__asm__
|
|
|
|
(
|
2020-02-21 21:05:56 +00:00
|
|
|
".byte 0x0f, 0x01, 0xd0" "\n\t"
|
2020-02-21 20:59:49 +00:00
|
|
|
: "=a"(a), "=d"(d) : "c"(num) : "cc"
|
|
|
|
);
|
|
|
|
return (static_cast<word64>(d) << 32) | a;
|
2020-09-30 17:41:40 +00:00
|
|
|
#else
|
|
|
|
# error "Need an xgetbv function"
|
2020-02-21 20:59:49 +00:00
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2020-02-07 21:00:16 +00:00
|
|
|
// No inline due to Borland/Embarcadero and Issue 498
|
|
|
|
// cpu.cpp (131): E2211 Inline assembly not allowed in inline and template functions
|
|
|
|
bool CpuId(word32 func, word32 subfunc, word32 output[4])
|
2015-11-05 06:59:46 +00:00
|
|
|
{
|
2020-02-21 20:59:49 +00:00
|
|
|
// Visual Studio 2010 and above, 32 and 64-bit
|
2020-02-07 21:00:16 +00:00
|
|
|
#if defined(_MSC_VER) && (_MSC_VER >= 1600)
|
|
|
|
|
2017-08-17 16:33:43 +00:00
|
|
|
__cpuidex((int *)output, func, subfunc);
|
|
|
|
return true;
|
|
|
|
|
2020-02-07 21:00:16 +00:00
|
|
|
// Visual Studio 2008 and below, 64-bit
|
|
|
|
#elif defined(_MSC_VER) && defined(_M_X64)
|
2017-08-17 16:33:43 +00:00
|
|
|
|
2020-02-07 19:19:46 +00:00
|
|
|
CPUID64(func, subfunc, output);
|
2015-11-05 06:59:46 +00:00
|
|
|
return true;
|
|
|
|
|
2020-02-07 21:00:16 +00:00
|
|
|
// Visual Studio 2008 and below, 32-bit
|
|
|
|
#elif (defined(_MSC_VER) && defined(_M_IX86)) || defined(__BORLANDC__)
|
2015-11-05 06:59:46 +00:00
|
|
|
|
2020-02-07 21:00:16 +00:00
|
|
|
__try
|
2015-11-05 06:59:46 +00:00
|
|
|
{
|
2017-09-16 22:03:24 +00:00
|
|
|
// Borland/Embarcadero and Issue 500
|
|
|
|
// Local variables for cpuid output
|
|
|
|
word32 a, b, c, d;
|
2015-11-05 06:59:46 +00:00
|
|
|
__asm
|
|
|
|
{
|
2020-02-09 10:16:23 +00:00
|
|
|
push ebx
|
2017-08-17 16:33:43 +00:00
|
|
|
mov eax, func
|
|
|
|
mov ecx, subfunc
|
2015-11-05 06:59:46 +00:00
|
|
|
cpuid
|
2017-09-16 22:03:24 +00:00
|
|
|
mov [a], eax
|
|
|
|
mov [b], ebx
|
|
|
|
mov [c], ecx
|
|
|
|
mov [d], edx
|
2020-02-09 10:16:23 +00:00
|
|
|
pop ebx
|
2015-11-05 06:59:46 +00:00
|
|
|
}
|
2017-09-16 22:03:24 +00:00
|
|
|
output[0] = a;
|
|
|
|
output[1] = b;
|
|
|
|
output[2] = c;
|
|
|
|
output[3] = d;
|
2015-11-05 06:59:46 +00:00
|
|
|
}
|
|
|
|
__except (EXCEPTION_EXECUTE_HANDLER)
|
|
|
|
{
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
return true;
|
2020-02-07 21:00:16 +00:00
|
|
|
|
2020-02-09 10:16:23 +00:00
|
|
|
// Linux, Unix, OS X, Solaris, Cygwin, MinGW
|
2015-11-05 06:59:46 +00:00
|
|
|
#else
|
2020-02-07 21:00:16 +00:00
|
|
|
|
2015-11-18 20:32:28 +00:00
|
|
|
// longjmp and clobber warnings. Volatile is required.
|
2016-05-19 08:45:35 +00:00
|
|
|
// http://github.com/weidai11/cryptopp/issues/24 and http://stackoverflow.com/q/7721854
|
2015-11-18 20:32:28 +00:00
|
|
|
volatile bool result = true;
|
|
|
|
|
2020-02-17 19:15:02 +00:00
|
|
|
volatile SigHandler oldHandler = signal(SIGILL, SigIllHandler);
|
2015-11-05 06:59:46 +00:00
|
|
|
if (oldHandler == SIG_ERR)
|
2016-06-01 05:27:53 +00:00
|
|
|
return false;
|
2015-11-05 06:59:46 +00:00
|
|
|
|
2016-08-01 19:56:43 +00:00
|
|
|
# ifndef __MINGW32__
|
2016-05-30 07:08:53 +00:00
|
|
|
volatile sigset_t oldMask;
|
2018-01-25 01:04:16 +00:00
|
|
|
if (sigprocmask(0, NULLPTR, (sigset_t*)&oldMask) != 0)
|
2020-02-17 19:15:02 +00:00
|
|
|
{
|
|
|
|
signal(SIGILL, oldHandler);
|
2016-06-01 05:27:53 +00:00
|
|
|
return false;
|
2020-02-17 19:15:02 +00:00
|
|
|
}
|
2016-08-01 19:56:43 +00:00
|
|
|
# endif
|
2016-05-30 07:08:53 +00:00
|
|
|
|
2015-11-05 06:59:46 +00:00
|
|
|
if (setjmp(s_jmpNoCPUID))
|
|
|
|
result = false;
|
|
|
|
else
|
|
|
|
{
|
|
|
|
asm volatile
|
|
|
|
(
|
|
|
|
// save ebx in case -fPIC is being used
|
|
|
|
# if CRYPTOPP_BOOL_X32 || CRYPTOPP_BOOL_X64
|
|
|
|
"pushq %%rbx; cpuid; mov %%ebx, %%edi; popq %%rbx"
|
|
|
|
# else
|
|
|
|
"push %%ebx; cpuid; mov %%ebx, %%edi; pop %%ebx"
|
|
|
|
# endif
|
|
|
|
: "=a" (output[0]), "=D" (output[1]), "=c" (output[2]), "=d" (output[3])
|
2017-08-17 16:33:43 +00:00
|
|
|
: "a" (func), "c" (subfunc)
|
2016-11-13 16:14:03 +00:00
|
|
|
: "cc"
|
2015-11-05 06:59:46 +00:00
|
|
|
);
|
|
|
|
}
|
|
|
|
|
2016-08-01 19:56:43 +00:00
|
|
|
# ifndef __MINGW32__
|
2017-03-01 11:10:06 +00:00
|
|
|
sigprocmask(SIG_SETMASK, (sigset_t*)&oldMask, NULLPTR);
|
2016-08-01 19:56:43 +00:00
|
|
|
# endif
|
|
|
|
|
2015-11-05 06:59:46 +00:00
|
|
|
signal(SIGILL, oldHandler);
|
|
|
|
return result;
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
void DetectX86Features()
|
|
|
|
{
|
2020-01-23 07:46:30 +00:00
|
|
|
// Coverity finding CID 171239. Initialize arrays.
|
2020-02-10 16:46:41 +00:00
|
|
|
// Indexes: EAX=0, EBX=1, ECX=2, EDX=3
|
2017-08-11 21:13:15 +00:00
|
|
|
word32 cpuid0[4]={0}, cpuid1[4]={0}, cpuid2[4]={0};
|
2020-01-23 07:46:30 +00:00
|
|
|
|
|
|
|
#if defined(CRYPTOPP_DISABLE_ASM)
|
|
|
|
// Not available
|
|
|
|
goto done;
|
|
|
|
#else
|
2017-08-17 16:33:43 +00:00
|
|
|
if (!CpuId(0, 0, cpuid0))
|
2020-01-23 07:46:30 +00:00
|
|
|
goto done;
|
2017-08-17 16:33:43 +00:00
|
|
|
if (!CpuId(1, 0, cpuid1))
|
2020-01-23 07:46:30 +00:00
|
|
|
goto done;
|
|
|
|
#endif
|
2015-11-05 06:59:46 +00:00
|
|
|
|
2020-02-10 17:44:55 +00:00
|
|
|
CRYPTOPP_CONSTANT(EAX_REG = 0);
|
|
|
|
CRYPTOPP_CONSTANT(EBX_REG = 1);
|
|
|
|
CRYPTOPP_CONSTANT(ECX_REG = 2);
|
|
|
|
CRYPTOPP_CONSTANT(EDX_REG = 3);
|
|
|
|
|
2020-02-10 16:46:41 +00:00
|
|
|
CRYPTOPP_CONSTANT(MMX_FLAG = (1 << 24)); // EDX
|
|
|
|
CRYPTOPP_CONSTANT(SSE_FLAG = (1 << 25)); // EDX
|
|
|
|
CRYPTOPP_CONSTANT(SSE2_FLAG = (1 << 26)); // EDX
|
|
|
|
|
|
|
|
CRYPTOPP_CONSTANT(SSE3_FLAG = (1 << 0)); // ECX
|
|
|
|
CRYPTOPP_CONSTANT(SSSE3_FLAG = (1 << 9)); // ECX
|
|
|
|
CRYPTOPP_CONSTANT(SSE41_FLAG = (1 << 19)); // ECX
|
|
|
|
CRYPTOPP_CONSTANT(SSE42_FLAG = (1 << 20)); // ECX
|
|
|
|
CRYPTOPP_CONSTANT(MOVBE_FLAG = (1 << 22)); // ECX
|
|
|
|
CRYPTOPP_CONSTANT(AESNI_FLAG = (1 << 25)); // ECX
|
|
|
|
CRYPTOPP_CONSTANT(CLMUL_FLAG = (1 << 1)); // ECX
|
|
|
|
|
|
|
|
CRYPTOPP_CONSTANT(XSAVE_FLAG = (1 << 26)); // ECX
|
|
|
|
CRYPTOPP_CONSTANT(OSXSAVE_FLAG = (1 << 27)); // ECX
|
|
|
|
|
2020-02-10 17:44:55 +00:00
|
|
|
CRYPTOPP_CONSTANT(AVX_FLAG = (3 << 27)); // ECX
|
|
|
|
CRYPTOPP_CONSTANT(YMM_FLAG = (3 << 1)); // CR0
|
|
|
|
|
2020-03-10 01:53:08 +00:00
|
|
|
// x86_64 machines don't check some flags because SSE2
|
|
|
|
// is part of the core instruction set architecture
|
|
|
|
CRYPTOPP_UNUSED(MMX_FLAG); CRYPTOPP_UNUSED(SSE_FLAG);
|
2021-03-10 17:46:18 +00:00
|
|
|
CRYPTOPP_UNUSED(SSE2_FLAG); CRYPTOPP_UNUSED(SSE3_FLAG);
|
|
|
|
CRYPTOPP_UNUSED(XSAVE_FLAG);
|
2020-03-10 01:53:08 +00:00
|
|
|
|
2020-02-10 17:44:55 +00:00
|
|
|
#if (CRYPTOPP_BOOL_X32 || CRYPTOPP_BOOL_X64)
|
|
|
|
// 64-bit core instruction set includes SSE2. Just check
|
|
|
|
// the OS enabled SSE2 support using OSXSAVE.
|
2020-02-21 20:59:49 +00:00
|
|
|
g_hasSSE2 = (cpuid1[ECX_REG] & OSXSAVE_FLAG) != 0;
|
2020-02-10 17:44:55 +00:00
|
|
|
#else
|
|
|
|
// Check the processor supports SSE2. Then use OSXSAVE to
|
|
|
|
// signal OS support for SSE2 to avoid probes.
|
|
|
|
// Also see http://stackoverflow.com/a/22521619/608639
|
2020-01-23 07:46:30 +00:00
|
|
|
// and http://github.com/weidai11/cryptopp/issues/511.
|
2020-02-10 17:44:55 +00:00
|
|
|
if ((cpuid1[EDX_REG] & SSE2_FLAG) == SSE2_FLAG)
|
2020-03-10 01:53:08 +00:00
|
|
|
g_hasSSE2 = (cpuid1[ECX_REG] & XSAVE_FLAG) != 0 &&
|
|
|
|
(cpuid1[ECX_REG] & OSXSAVE_FLAG) != 0;
|
2020-02-10 17:44:55 +00:00
|
|
|
#endif
|
2017-10-13 00:14:21 +00:00
|
|
|
|
2020-02-21 20:59:49 +00:00
|
|
|
// Solaris 11 i86pc does not signal SSE support using
|
2020-02-22 21:18:43 +00:00
|
|
|
// OSXSAVE. We need to probe for SSE support.
|
|
|
|
if (g_hasSSE2 == false)
|
|
|
|
g_hasSSE2 = CPU_ProbeSSE2();
|
2020-02-21 20:59:49 +00:00
|
|
|
|
2020-01-23 07:46:30 +00:00
|
|
|
if (g_hasSSE2 == false)
|
|
|
|
goto done;
|
|
|
|
|
2020-02-10 17:44:55 +00:00
|
|
|
g_hasSSSE3 = (cpuid1[ECX_REG] & SSSE3_FLAG) != 0;
|
|
|
|
g_hasSSE41 = (cpuid1[ECX_REG] & SSE41_FLAG) != 0;
|
|
|
|
g_hasSSE42 = (cpuid1[ECX_REG] & SSE42_FLAG) != 0;
|
|
|
|
g_hasMOVBE = (cpuid1[ECX_REG] & MOVBE_FLAG) != 0;
|
|
|
|
g_hasAESNI = (cpuid1[ECX_REG] & AESNI_FLAG) != 0;
|
|
|
|
g_hasCLMUL = (cpuid1[ECX_REG] & CLMUL_FLAG) != 0;
|
2015-11-05 06:59:46 +00:00
|
|
|
|
2020-02-08 16:04:09 +00:00
|
|
|
// AVX is similar to SSE. Check if AVX is available on the cpu, then
|
|
|
|
// check if the OS enabled XSAVE/XRESTORE for the extended registers.
|
2018-06-18 22:33:17 +00:00
|
|
|
// https://software.intel.com/en-us/blogs/2011/04/14/is-avx-enabled
|
2020-02-10 17:44:55 +00:00
|
|
|
if ((cpuid1[ECX_REG] & AVX_FLAG) == AVX_FLAG)
|
2018-06-18 22:33:17 +00:00
|
|
|
{
|
2020-02-21 20:59:49 +00:00
|
|
|
word64 xcr0 = XGetBV(0);
|
2018-08-19 14:19:29 +00:00
|
|
|
g_hasAVX = (xcr0 & YMM_FLAG) == YMM_FLAG;
|
2018-06-18 22:33:17 +00:00
|
|
|
}
|
|
|
|
|
2017-08-11 21:13:15 +00:00
|
|
|
if (IsIntel(cpuid0))
|
2015-11-05 06:59:46 +00:00
|
|
|
{
|
2019-10-14 16:30:10 +00:00
|
|
|
CRYPTOPP_CONSTANT(RDRAND_FLAG = (1 << 30));
|
|
|
|
CRYPTOPP_CONSTANT(RDSEED_FLAG = (1 << 18));
|
|
|
|
CRYPTOPP_CONSTANT( ADX_FLAG = (1 << 19));
|
|
|
|
CRYPTOPP_CONSTANT( SHA_FLAG = (1 << 29));
|
|
|
|
CRYPTOPP_CONSTANT( AVX2_FLAG = (1 << 5));
|
2016-05-19 12:32:51 +00:00
|
|
|
|
2017-08-11 21:13:15 +00:00
|
|
|
g_isP4 = ((cpuid1[0] >> 8) & 0xf) == 0xf;
|
|
|
|
g_cacheLineSize = 8 * GETBYTE(cpuid1[1], 1);
|
2020-02-10 17:44:55 +00:00
|
|
|
g_hasRDRAND = (cpuid1[ECX_REG] & RDRAND_FLAG) != 0;
|
2015-11-18 20:32:28 +00:00
|
|
|
|
2020-02-10 17:44:55 +00:00
|
|
|
if (cpuid0[EAX_REG] >= 7)
|
2015-11-18 20:32:28 +00:00
|
|
|
{
|
2017-08-17 16:33:43 +00:00
|
|
|
if (CpuId(7, 0, cpuid2))
|
2016-10-27 02:35:24 +00:00
|
|
|
{
|
2020-02-10 17:44:55 +00:00
|
|
|
g_hasRDSEED = (cpuid2[EBX_REG] & RDSEED_FLAG) != 0;
|
|
|
|
g_hasADX = (cpuid2[EBX_REG] & ADX_FLAG) != 0;
|
|
|
|
g_hasSHA = (cpuid2[EBX_REG] & SHA_FLAG) != 0;
|
|
|
|
g_hasAVX2 = (cpuid2[EBX_REG] & AVX2_FLAG) != 0;
|
2016-10-27 02:35:24 +00:00
|
|
|
}
|
2015-11-18 20:32:28 +00:00
|
|
|
}
|
2015-11-05 06:59:46 +00:00
|
|
|
}
|
2018-12-20 22:33:16 +00:00
|
|
|
else if (IsAMD(cpuid0) || IsHygon(cpuid0))
|
2015-11-05 06:59:46 +00:00
|
|
|
{
|
2019-10-14 16:30:10 +00:00
|
|
|
CRYPTOPP_CONSTANT(RDRAND_FLAG = (1 << 30));
|
|
|
|
CRYPTOPP_CONSTANT(RDSEED_FLAG = (1 << 18));
|
|
|
|
CRYPTOPP_CONSTANT( ADX_FLAG = (1 << 19));
|
|
|
|
CRYPTOPP_CONSTANT( SHA_FLAG = (1 << 29));
|
|
|
|
CRYPTOPP_CONSTANT( AVX2_FLAG = (1 << 5));
|
2016-05-19 12:32:51 +00:00
|
|
|
|
2017-08-17 16:33:43 +00:00
|
|
|
CpuId(0x80000005, 0, cpuid2);
|
2020-02-10 17:44:55 +00:00
|
|
|
g_cacheLineSize = GETBYTE(cpuid2[ECX_REG], 0);
|
|
|
|
g_hasRDRAND = (cpuid1[ECX_REG] & RDRAND_FLAG) != 0;
|
2016-05-19 12:32:51 +00:00
|
|
|
|
2020-02-10 17:44:55 +00:00
|
|
|
if (cpuid0[EAX_REG] >= 7)
|
2017-05-21 15:38:56 +00:00
|
|
|
{
|
2017-08-17 16:33:43 +00:00
|
|
|
if (CpuId(7, 0, cpuid2))
|
2017-05-21 15:38:56 +00:00
|
|
|
{
|
2020-02-10 17:44:55 +00:00
|
|
|
g_hasRDSEED = (cpuid2[EBX_REG] & RDSEED_FLAG) != 0;
|
|
|
|
g_hasADX = (cpuid2[EBX_REG] & ADX_FLAG) != 0;
|
|
|
|
g_hasSHA = (cpuid2[EBX_REG] & SHA_FLAG) != 0;
|
|
|
|
g_hasAVX2 = (cpuid2[EBX_REG] & AVX2_FLAG) != 0;
|
2017-05-21 15:38:56 +00:00
|
|
|
}
|
|
|
|
}
|
2020-01-17 06:05:42 +00:00
|
|
|
|
|
|
|
// Unconditionally disable RDRAND and RDSEED on AMD cpu's with family 15h or 16h.
|
|
|
|
// See Crypto++ Issue 924, https://github.com/weidai11/cryptopp/issues/924,
|
|
|
|
// Clear RDRAND CPUID bit on AMD family 15h/16h, https://lore.kernel.org/patchwork/patch/1115413/,
|
|
|
|
// and AMD CPUID Specification, https://www.amd.com/system/files/TechDocs/25481.pdf
|
|
|
|
{
|
|
|
|
CRYPTOPP_CONSTANT(FAMILY_BASE_FLAG = (0x0f << 8));
|
|
|
|
CRYPTOPP_CONSTANT(FAMILY_EXT_FLAG = (0xff << 20));
|
|
|
|
|
|
|
|
word32 family = (cpuid1[0] & FAMILY_BASE_FLAG) >> 8;
|
|
|
|
if (family == 0xf)
|
|
|
|
family += (cpuid1[0] & FAMILY_EXT_FLAG) >> 20;
|
|
|
|
if (family == 0x15 || family == 0x16)
|
|
|
|
{
|
|
|
|
g_hasRDRAND = false;
|
|
|
|
g_hasRDSEED = false;
|
|
|
|
}
|
|
|
|
}
|
2016-05-19 12:32:51 +00:00
|
|
|
}
|
2017-08-11 21:13:15 +00:00
|
|
|
else if (IsVIA(cpuid0))
|
2016-05-19 12:32:51 +00:00
|
|
|
{
|
2019-05-08 22:29:33 +00:00
|
|
|
// Two bits: available and enabled
|
2019-10-14 16:30:10 +00:00
|
|
|
CRYPTOPP_CONSTANT( RNG_FLAGS = (0x3 << 2));
|
|
|
|
CRYPTOPP_CONSTANT( ACE_FLAGS = (0x3 << 6));
|
|
|
|
CRYPTOPP_CONSTANT(ACE2_FLAGS = (0x3 << 8));
|
|
|
|
CRYPTOPP_CONSTANT( PHE_FLAGS = (0x3 << 10));
|
|
|
|
CRYPTOPP_CONSTANT( PMM_FLAGS = (0x3 << 12));
|
2017-08-11 21:13:15 +00:00
|
|
|
|
2017-08-17 16:33:43 +00:00
|
|
|
CpuId(0xC0000000, 0, cpuid2);
|
2019-05-08 22:29:33 +00:00
|
|
|
word32 extendedFeatures = cpuid2[0];
|
|
|
|
|
|
|
|
if (extendedFeatures >= 0xC0000001)
|
2016-05-19 12:32:51 +00:00
|
|
|
{
|
2017-08-17 16:33:43 +00:00
|
|
|
CpuId(0xC0000001, 0, cpuid2);
|
2020-02-10 17:44:55 +00:00
|
|
|
g_hasPadlockRNG = (cpuid2[EDX_REG] & RNG_FLAGS) != 0;
|
|
|
|
g_hasPadlockACE = (cpuid2[EDX_REG] & ACE_FLAGS) != 0;
|
|
|
|
g_hasPadlockACE2 = (cpuid2[EDX_REG] & ACE2_FLAGS) != 0;
|
|
|
|
g_hasPadlockPHE = (cpuid2[EDX_REG] & PHE_FLAGS) != 0;
|
|
|
|
g_hasPadlockPMM = (cpuid2[EDX_REG] & PMM_FLAGS) != 0;
|
2016-05-19 12:32:51 +00:00
|
|
|
}
|
2019-05-08 22:29:33 +00:00
|
|
|
|
|
|
|
if (extendedFeatures >= 0xC0000005)
|
|
|
|
{
|
|
|
|
CpuId(0xC0000005, 0, cpuid2);
|
2020-02-10 17:44:55 +00:00
|
|
|
g_cacheLineSize = GETBYTE(cpuid2[ECX_REG], 0);
|
2019-05-08 22:29:33 +00:00
|
|
|
}
|
2019-05-08 23:54:05 +00:00
|
|
|
}
|
|
|
|
|
2020-02-21 20:59:49 +00:00
|
|
|
// Keep AVX2 in sync with OS support for AVX. AVX tests both
|
|
|
|
// cpu support and OS support, while AVX2 only tests cpu support.
|
|
|
|
g_hasAVX2 &= g_hasAVX;
|
|
|
|
|
2020-01-23 07:46:30 +00:00
|
|
|
done:
|
|
|
|
|
2019-05-08 23:46:23 +00:00
|
|
|
#if defined(_SC_LEVEL1_DCACHE_LINESIZE)
|
2019-05-08 23:54:05 +00:00
|
|
|
// Glibc does not implement on some platforms. The runtime returns 0 instead of error.
|
|
|
|
// https://sourceware.org/git/?p=glibc.git;a=blob;f=sysdeps/posix/sysconf.c
|
2019-09-29 01:30:01 +00:00
|
|
|
int cacheLineSize = (int)sysconf(_SC_LEVEL1_DCACHE_LINESIZE);
|
2019-05-09 01:20:49 +00:00
|
|
|
if (g_cacheLineSize == 0 && cacheLineSize > 0)
|
2019-05-08 23:54:05 +00:00
|
|
|
g_cacheLineSize = cacheLineSize;
|
2019-05-08 23:46:23 +00:00
|
|
|
#endif
|
2015-11-05 06:59:46 +00:00
|
|
|
|
2018-03-21 20:19:43 +00:00
|
|
|
if (g_cacheLineSize == 0)
|
2015-11-05 06:59:46 +00:00
|
|
|
g_cacheLineSize = CRYPTOPP_L1_CACHE_LINE_SIZE;
|
|
|
|
|
2017-11-17 00:37:29 +00:00
|
|
|
*const_cast<volatile bool*>(&g_x86DetectionDone) = true;
|
2015-11-05 06:59:46 +00:00
|
|
|
}
|
|
|
|
|
2017-09-11 07:05:04 +00:00
|
|
|
// *************************** ARM-32, Aarch32 and Aarch64 ***************************
|
2017-08-17 16:33:43 +00:00
|
|
|
|
2018-12-09 15:24:55 +00:00
|
|
|
#elif (CRYPTOPP_BOOL_ARM32 || CRYPTOPP_BOOL_ARMV8)
|
2016-05-15 06:30:08 +00:00
|
|
|
|
2016-07-13 03:05:00 +00:00
|
|
|
bool CRYPTOPP_SECTION_INIT g_ArmDetectionDone = false;
|
2018-07-08 06:49:21 +00:00
|
|
|
bool CRYPTOPP_SECTION_INIT g_hasARMv7 = false;
|
2018-03-28 03:19:26 +00:00
|
|
|
bool CRYPTOPP_SECTION_INIT g_hasNEON = false;
|
|
|
|
bool CRYPTOPP_SECTION_INIT g_hasPMULL = false;
|
|
|
|
bool CRYPTOPP_SECTION_INIT g_hasCRC32 = false;
|
|
|
|
bool CRYPTOPP_SECTION_INIT g_hasAES = false;
|
|
|
|
bool CRYPTOPP_SECTION_INIT g_hasSHA1 = false;
|
|
|
|
bool CRYPTOPP_SECTION_INIT g_hasSHA2 = false;
|
2018-07-14 12:20:16 +00:00
|
|
|
bool CRYPTOPP_SECTION_INIT g_hasSHA512 = false;
|
|
|
|
bool CRYPTOPP_SECTION_INIT g_hasSHA3 = false;
|
|
|
|
bool CRYPTOPP_SECTION_INIT g_hasSM3 = false;
|
|
|
|
bool CRYPTOPP_SECTION_INIT g_hasSM4 = false;
|
2016-07-13 03:05:00 +00:00
|
|
|
word32 CRYPTOPP_SECTION_INIT g_cacheLineSize = CRYPTOPP_L1_CACHE_LINE_SIZE;
|
2016-05-15 06:30:08 +00:00
|
|
|
|
2020-12-22 20:49:34 +00:00
|
|
|
// ARM does not have an unprivileged equivalent to CPUID on IA-32. We have to
|
2020-02-15 08:00:54 +00:00
|
|
|
// jump through some hoops to detect features on a wide array of platforms.
|
|
|
|
// Our strategy is two part. First, attempt to *Query* the OS for a feature,
|
|
|
|
// like using getauxval on Linux. If that fails, then *Probe* the cpu
|
|
|
|
// executing an instruction and an observe a SIGILL if unsupported. The probes
|
|
|
|
// are in source files where compilation options like -march=armv8-a+crc make
|
|
|
|
// intrinsics available. They are expensive when compared to a standard OS
|
|
|
|
// feature query. Always perform the feature query first. For Linux see
|
|
|
|
// http://sourceware.org/ml/libc-help/2017-08/msg00012.html
|
|
|
|
// Avoid probes on Apple platforms because Apple's signal handling for SIGILLs
|
|
|
|
// appears broken. We are trying to figure out a way to feature test without
|
|
|
|
// probes. Also see http://stackoverflow.com/a/11197770/608639 and
|
|
|
|
// http://gist.github.com/erkanyildiz/390a480f27e86f8cd6ba.
|
2017-08-17 16:33:43 +00:00
|
|
|
|
2018-07-08 06:49:21 +00:00
|
|
|
extern bool CPU_ProbeARMv7();
|
2017-08-17 16:33:43 +00:00
|
|
|
extern bool CPU_ProbeNEON();
|
|
|
|
extern bool CPU_ProbeCRC32();
|
|
|
|
extern bool CPU_ProbeAES();
|
|
|
|
extern bool CPU_ProbeSHA1();
|
2019-05-08 23:31:31 +00:00
|
|
|
extern bool CPU_ProbeSHA256();
|
2018-07-14 12:20:16 +00:00
|
|
|
extern bool CPU_ProbeSHA512();
|
|
|
|
extern bool CPU_ProbeSHA3();
|
|
|
|
extern bool CPU_ProbeSM3();
|
|
|
|
extern bool CPU_ProbeSM4();
|
2017-08-17 16:33:43 +00:00
|
|
|
extern bool CPU_ProbePMULL();
|
|
|
|
|
2019-05-21 03:02:36 +00:00
|
|
|
// https://github.com/torvalds/linux/blob/master/arch/arm/include/uapi/asm/hwcap.h
|
Add ARMv8.4 cpu feature detection support (GH #685) (#687)
This PR adds ARMv8.4 cpu feature detection support. Previously we only needed ARMv8.1 and things were much easier. For example, ARMv8.1 `__ARM_FEATURE_CRYPTO` meant PMULL, AES, SHA-1 and SHA-256 were available. ARMv8.4 `__ARM_FEATURE_CRYPTO` means PMULL, AES, SHA-1, SHA-256, SHA-512, SHA-3, SM3 and SM4 are available.
We still use the same pattern as before. We make something available based on compiler version and/or preprocessor macros. But this time around we had to tighten things up a bit to ensure ARMv8.4 did not cross-pollinate down into ARMv8.1.
ARMv8.4 is largely untested at the moment. There is no hardware in the field and CI lacks QEMU with the relevant patches/support. We will probably have to revisit some of this stuff in the future.
Since this update applies to ARM gadgets we took the time to expand Android and iOS testing on Travis. Travis now tests more platforms, and includes Autotools and CMake builds, too.
2018-07-15 12:35:14 +00:00
|
|
|
// https://github.com/torvalds/linux/blob/master/arch/arm64/include/uapi/asm/hwcap.h
|
2018-07-08 06:49:21 +00:00
|
|
|
#ifndef HWCAP_ARMv7
|
|
|
|
# define HWCAP_ARMv7 (1 << 29)
|
|
|
|
#endif
|
2017-09-17 04:41:48 +00:00
|
|
|
#ifndef HWCAP_ASIMD
|
|
|
|
# define HWCAP_ASIMD (1 << 1)
|
|
|
|
#endif
|
2019-05-21 03:02:36 +00:00
|
|
|
#ifndef HWCAP_NEON
|
|
|
|
# define HWCAP_NEON (1 << 12)
|
2017-09-17 04:41:48 +00:00
|
|
|
#endif
|
|
|
|
#ifndef HWCAP_CRC32
|
|
|
|
# define HWCAP_CRC32 (1 << 7)
|
|
|
|
#endif
|
|
|
|
#ifndef HWCAP2_CRC32
|
|
|
|
# define HWCAP2_CRC32 (1 << 4)
|
|
|
|
#endif
|
|
|
|
#ifndef HWCAP_PMULL
|
|
|
|
# define HWCAP_PMULL (1 << 4)
|
|
|
|
#endif
|
|
|
|
#ifndef HWCAP2_PMULL
|
|
|
|
# define HWCAP2_PMULL (1 << 1)
|
|
|
|
#endif
|
|
|
|
#ifndef HWCAP_AES
|
|
|
|
# define HWCAP_AES (1 << 3)
|
|
|
|
#endif
|
|
|
|
#ifndef HWCAP2_AES
|
|
|
|
# define HWCAP2_AES (1 << 0)
|
|
|
|
#endif
|
|
|
|
#ifndef HWCAP_SHA1
|
|
|
|
# define HWCAP_SHA1 (1 << 5)
|
|
|
|
#endif
|
|
|
|
#ifndef HWCAP_SHA2
|
|
|
|
# define HWCAP_SHA2 (1 << 6)
|
|
|
|
#endif
|
|
|
|
#ifndef HWCAP2_SHA1
|
|
|
|
# define HWCAP2_SHA1 (1 << 2)
|
|
|
|
#endif
|
|
|
|
#ifndef HWCAP2_SHA2
|
|
|
|
# define HWCAP2_SHA2 (1 << 3)
|
|
|
|
#endif
|
2018-07-14 12:20:16 +00:00
|
|
|
#ifndef HWCAP_SHA3
|
|
|
|
# define HWCAP_SHA3 (1 << 17)
|
|
|
|
#endif
|
|
|
|
#ifndef HWCAP_SM3
|
|
|
|
# define HWCAP_SM3 (1 << 18)
|
|
|
|
#endif
|
|
|
|
#ifndef HWCAP_SM4
|
|
|
|
# define HWCAP_SM4 (1 << 19)
|
|
|
|
#endif
|
|
|
|
#ifndef HWCAP_SHA512
|
|
|
|
# define HWCAP_SHA512 (1 << 21)
|
|
|
|
#endif
|
|
|
|
|
2018-07-08 06:49:21 +00:00
|
|
|
inline bool CPU_QueryARMv7()
|
|
|
|
{
|
2019-05-21 03:09:57 +00:00
|
|
|
#if defined(__ANDROID__) && defined(__arm__)
|
2018-07-08 06:49:21 +00:00
|
|
|
if (((android_getCpuFamily() & ANDROID_CPU_FAMILY_ARM) != 0) &&
|
|
|
|
((android_getCpuFeatures() & ANDROID_CPU_ARM_FEATURE_ARMv7) != 0))
|
|
|
|
return true;
|
|
|
|
#elif defined(__linux__) && defined(__arm__)
|
2019-05-21 03:02:36 +00:00
|
|
|
if ((getauxval(AT_HWCAP) & HWCAP_ARMv7) != 0 ||
|
|
|
|
(getauxval(AT_HWCAP) & HWCAP_NEON) != 0)
|
2018-07-08 06:49:21 +00:00
|
|
|
return true;
|
|
|
|
#elif defined(__APPLE__) && defined(__arm__)
|
|
|
|
// Apple hardware is ARMv7 or above.
|
|
|
|
return true;
|
2021-03-11 18:30:38 +00:00
|
|
|
#elif defined(_WIN32) && defined(_M_ARM64)
|
|
|
|
// Windows 10 ARM64 is only supported on Armv8a and above
|
|
|
|
return true;
|
2018-07-08 06:49:21 +00:00
|
|
|
#endif
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2017-08-17 16:33:43 +00:00
|
|
|
inline bool CPU_QueryNEON()
|
2016-05-15 06:30:08 +00:00
|
|
|
{
|
2017-09-13 11:16:41 +00:00
|
|
|
#if defined(__ANDROID__) && defined(__aarch64__)
|
2018-03-21 20:19:43 +00:00
|
|
|
if (((android_getCpuFamily() & ANDROID_CPU_FAMILY_ARM64) != 0) &&
|
|
|
|
((android_getCpuFeatures() & ANDROID_CPU_ARM64_FEATURE_ASIMD) != 0))
|
2017-08-17 16:33:43 +00:00
|
|
|
return true;
|
|
|
|
#elif defined(__ANDROID__) && defined(__arm__)
|
2018-07-08 06:49:21 +00:00
|
|
|
if (((android_getCpuFamily() & ANDROID_CPU_FAMILY_ARM) != 0) &&
|
2018-03-21 20:19:43 +00:00
|
|
|
((android_getCpuFeatures() & ANDROID_CPU_ARM_FEATURE_NEON) != 0))
|
2017-08-17 16:33:43 +00:00
|
|
|
return true;
|
|
|
|
#elif defined(__linux__) && defined(__aarch64__)
|
2018-03-21 20:19:43 +00:00
|
|
|
if ((getauxval(AT_HWCAP) & HWCAP_ASIMD) != 0)
|
2017-08-17 16:33:43 +00:00
|
|
|
return true;
|
|
|
|
#elif defined(__linux__) && defined(__aarch32__)
|
2018-03-21 20:19:43 +00:00
|
|
|
if ((getauxval(AT_HWCAP2) & HWCAP2_ASIMD) != 0)
|
2017-08-17 16:33:43 +00:00
|
|
|
return true;
|
|
|
|
#elif defined(__linux__) && defined(__arm__)
|
2019-05-21 03:02:36 +00:00
|
|
|
if ((getauxval(AT_HWCAP) & HWCAP_NEON) != 0)
|
2017-08-17 16:33:43 +00:00
|
|
|
return true;
|
2017-08-18 07:03:42 +00:00
|
|
|
#elif defined(__APPLE__) && defined(__aarch64__)
|
|
|
|
// Core feature set for Aarch32 and Aarch64.
|
2021-03-12 00:28:18 +00:00
|
|
|
if (IsAppleMachineARMv8())
|
|
|
|
return true;
|
2021-03-11 18:30:38 +00:00
|
|
|
#elif defined(_WIN32) && defined(_M_ARM64)
|
|
|
|
// Windows 10 ARM64 is only supported on Armv8a and above
|
2021-03-12 00:28:18 +00:00
|
|
|
if (IsProcessorFeaturePresent(PF_ARM_V8_INSTRUCTIONS_AVAILABLE) != 0)
|
|
|
|
return true;
|
2017-08-17 16:33:43 +00:00
|
|
|
#endif
|
2016-05-16 22:47:43 +00:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2017-08-17 16:33:43 +00:00
|
|
|
inline bool CPU_QueryCRC32()
|
2016-07-24 13:48:28 +00:00
|
|
|
{
|
2017-09-13 11:16:41 +00:00
|
|
|
#if defined(__ANDROID__) && defined(__aarch64__)
|
2018-03-21 20:19:43 +00:00
|
|
|
if (((android_getCpuFamily() & ANDROID_CPU_FAMILY_ARM64) != 0) &&
|
|
|
|
((android_getCpuFeatures() & ANDROID_CPU_ARM64_FEATURE_CRC32) != 0))
|
2017-09-13 11:16:41 +00:00
|
|
|
return true;
|
|
|
|
#elif defined(__ANDROID__) && defined(__aarch32__)
|
2018-07-08 06:49:21 +00:00
|
|
|
if (((android_getCpuFamily() & ANDROID_CPU_FAMILY_ARM) != 0) &&
|
2018-03-21 20:19:43 +00:00
|
|
|
((android_getCpuFeatures() & ANDROID_CPU_ARM_FEATURE_CRC32) != 0))
|
2017-08-17 16:33:43 +00:00
|
|
|
return true;
|
|
|
|
#elif defined(__linux__) && defined(__aarch64__)
|
2018-03-21 20:19:43 +00:00
|
|
|
if ((getauxval(AT_HWCAP) & HWCAP_CRC32) != 0)
|
2017-08-17 16:33:43 +00:00
|
|
|
return true;
|
|
|
|
#elif defined(__linux__) && defined(__aarch32__)
|
2018-03-21 20:19:43 +00:00
|
|
|
if ((getauxval(AT_HWCAP2) & HWCAP2_CRC32) != 0)
|
2017-08-17 16:33:43 +00:00
|
|
|
return true;
|
2017-08-18 07:03:42 +00:00
|
|
|
#elif defined(__APPLE__) && defined(__aarch64__)
|
2021-03-05 03:50:58 +00:00
|
|
|
// M1 processor
|
2021-03-05 05:38:04 +00:00
|
|
|
if (IsAppleMachineARMv82())
|
2021-03-05 03:50:58 +00:00
|
|
|
return true;
|
2021-03-11 18:30:38 +00:00
|
|
|
#elif defined(_WIN32) && defined(_M_ARM64)
|
2021-03-12 00:28:18 +00:00
|
|
|
if (IsProcessorFeaturePresent(PF_ARM_V8_CRC32_INSTRUCTIONS_AVAILABLE) != 0)
|
|
|
|
return true;
|
2017-08-17 16:33:43 +00:00
|
|
|
#endif
|
2016-07-24 13:48:28 +00:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2017-08-17 16:33:43 +00:00
|
|
|
inline bool CPU_QueryPMULL()
|
2016-05-16 22:47:43 +00:00
|
|
|
{
|
2017-09-13 11:16:41 +00:00
|
|
|
#if defined(__ANDROID__) && defined(__aarch64__)
|
2018-07-08 06:49:21 +00:00
|
|
|
if (((android_getCpuFamily() & ANDROID_CPU_FAMILY_ARM64) != 0) &&
|
2018-03-21 20:19:43 +00:00
|
|
|
((android_getCpuFeatures() & ANDROID_CPU_ARM64_FEATURE_PMULL) != 0))
|
2017-09-13 11:16:41 +00:00
|
|
|
return true;
|
|
|
|
#elif defined(__ANDROID__) && defined(__aarch32__)
|
2018-03-21 20:19:43 +00:00
|
|
|
if (((android_getCpuFamily() & ANDROID_CPU_FAMILY_ARM) != 0) &&
|
|
|
|
((android_getCpuFeatures() & ANDROID_CPU_ARM_FEATURE_PMULL) != 0))
|
2017-08-17 16:33:43 +00:00
|
|
|
return true;
|
|
|
|
#elif defined(__linux__) && defined(__aarch64__)
|
2018-03-21 20:19:43 +00:00
|
|
|
if ((getauxval(AT_HWCAP) & HWCAP_PMULL) != 0)
|
2017-08-17 16:33:43 +00:00
|
|
|
return true;
|
|
|
|
#elif defined(__linux__) && defined(__aarch32__)
|
2018-03-21 20:19:43 +00:00
|
|
|
if ((getauxval(AT_HWCAP2) & HWCAP2_PMULL) != 0)
|
2017-08-17 16:33:43 +00:00
|
|
|
return true;
|
2017-08-18 07:03:42 +00:00
|
|
|
#elif defined(__APPLE__) && defined(__aarch64__)
|
2021-03-05 03:50:58 +00:00
|
|
|
// M1 processor
|
2021-03-05 05:38:04 +00:00
|
|
|
if (IsAppleMachineARMv82())
|
2021-03-05 03:50:58 +00:00
|
|
|
return true;
|
2021-03-11 18:30:38 +00:00
|
|
|
#elif defined(_WIN32) && defined(_M_ARM64)
|
2021-03-12 00:28:18 +00:00
|
|
|
if (IsProcessorFeaturePresent(PF_ARM_V8_CRYPTO_INSTRUCTIONS_AVAILABLE) != 0)
|
|
|
|
return true;
|
2017-08-17 16:33:43 +00:00
|
|
|
#endif
|
2016-05-16 22:47:43 +00:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2017-08-17 16:33:43 +00:00
|
|
|
inline bool CPU_QueryAES()
|
2016-05-16 22:47:43 +00:00
|
|
|
{
|
2017-09-13 11:16:41 +00:00
|
|
|
#if defined(__ANDROID__) && defined(__aarch64__)
|
2018-07-08 06:49:21 +00:00
|
|
|
if (((android_getCpuFamily() & ANDROID_CPU_FAMILY_ARM64) != 0) &&
|
2018-03-21 20:19:43 +00:00
|
|
|
((android_getCpuFeatures() & ANDROID_CPU_ARM64_FEATURE_AES) != 0))
|
2017-09-13 11:16:41 +00:00
|
|
|
return true;
|
|
|
|
#elif defined(__ANDROID__) && defined(__aarch32__)
|
2018-07-08 06:49:21 +00:00
|
|
|
if (((android_getCpuFamily() & ANDROID_CPU_FAMILY_ARM) != 0) &&
|
2018-03-21 20:19:43 +00:00
|
|
|
((android_getCpuFeatures() & ANDROID_CPU_ARM_FEATURE_AES) != 0))
|
2017-08-17 16:33:43 +00:00
|
|
|
return true;
|
|
|
|
#elif defined(__linux__) && defined(__aarch64__)
|
2018-03-21 20:19:43 +00:00
|
|
|
if ((getauxval(AT_HWCAP) & HWCAP_AES) != 0)
|
2017-08-17 16:33:43 +00:00
|
|
|
return true;
|
|
|
|
#elif defined(__linux__) && defined(__aarch32__)
|
2018-03-21 20:19:43 +00:00
|
|
|
if ((getauxval(AT_HWCAP2) & HWCAP2_AES) != 0)
|
2017-08-17 16:33:43 +00:00
|
|
|
return true;
|
2017-08-17 17:52:26 +00:00
|
|
|
#elif defined(__APPLE__) && defined(__aarch64__)
|
2021-03-12 00:28:18 +00:00
|
|
|
// M1 processor
|
|
|
|
if (IsAppleMachineARMv82())
|
|
|
|
return true;
|
2021-03-11 18:30:38 +00:00
|
|
|
#elif defined(_WIN32) && defined(_M_ARM64)
|
2021-03-12 00:28:18 +00:00
|
|
|
if (IsProcessorFeaturePresent(PF_ARM_V8_CRYPTO_INSTRUCTIONS_AVAILABLE) != 0)
|
|
|
|
return true;
|
2017-08-17 16:33:43 +00:00
|
|
|
#endif
|
2016-05-19 08:45:35 +00:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2017-08-17 16:33:43 +00:00
|
|
|
inline bool CPU_QuerySHA1()
|
2016-05-19 08:45:35 +00:00
|
|
|
{
|
2017-09-13 11:16:41 +00:00
|
|
|
#if defined(__ANDROID__) && defined(__aarch64__)
|
2018-03-21 20:19:43 +00:00
|
|
|
if (((android_getCpuFamily() & ANDROID_CPU_FAMILY_ARM64) != 0) &&
|
|
|
|
((android_getCpuFeatures() & ANDROID_CPU_ARM64_FEATURE_SHA1) != 0))
|
2017-09-13 11:16:41 +00:00
|
|
|
return true;
|
|
|
|
#elif defined(__ANDROID__) && defined(__aarch32__)
|
2018-03-21 20:19:43 +00:00
|
|
|
if (((android_getCpuFamily() & ANDROID_CPU_FAMILY_ARM) != 0) &&
|
|
|
|
((android_getCpuFeatures() & ANDROID_CPU_ARM_FEATURE_SHA1) != 0))
|
2017-08-17 16:33:43 +00:00
|
|
|
return true;
|
|
|
|
#elif defined(__linux__) && defined(__aarch64__)
|
2018-03-21 20:19:43 +00:00
|
|
|
if ((getauxval(AT_HWCAP) & HWCAP_SHA1) != 0)
|
2017-08-17 16:33:43 +00:00
|
|
|
return true;
|
|
|
|
#elif defined(__linux__) && defined(__aarch32__)
|
2018-03-21 20:19:43 +00:00
|
|
|
if ((getauxval(AT_HWCAP2) & HWCAP2_SHA1) != 0)
|
2017-08-17 16:33:43 +00:00
|
|
|
return true;
|
2017-08-18 07:03:42 +00:00
|
|
|
#elif defined(__APPLE__) && defined(__aarch64__)
|
2021-03-12 00:28:18 +00:00
|
|
|
// M1 processor
|
|
|
|
if (IsAppleMachineARMv82())
|
|
|
|
return true;
|
2021-03-11 18:30:38 +00:00
|
|
|
#elif defined(_WIN32) && defined(_M_ARM64)
|
2021-03-12 00:28:18 +00:00
|
|
|
if (IsProcessorFeaturePresent(PF_ARM_V8_CRYPTO_INSTRUCTIONS_AVAILABLE) != 0)
|
|
|
|
return true;
|
2017-08-17 16:33:43 +00:00
|
|
|
#endif
|
2016-05-19 08:45:35 +00:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2019-05-08 23:31:31 +00:00
|
|
|
inline bool CPU_QuerySHA256()
|
2016-05-19 08:45:35 +00:00
|
|
|
{
|
2017-09-13 11:16:41 +00:00
|
|
|
#if defined(__ANDROID__) && defined(__aarch64__)
|
2018-07-08 06:49:21 +00:00
|
|
|
if (((android_getCpuFamily() & ANDROID_CPU_FAMILY_ARM64) != 0) &&
|
2018-03-21 20:19:43 +00:00
|
|
|
((android_getCpuFeatures() & ANDROID_CPU_ARM64_FEATURE_SHA2) != 0))
|
2017-09-13 11:16:41 +00:00
|
|
|
return true;
|
|
|
|
#elif defined(__ANDROID__) && defined(__aarch32__)
|
2018-03-21 20:19:43 +00:00
|
|
|
if (((android_getCpuFamily() & ANDROID_CPU_FAMILY_ARM) != 0) &&
|
|
|
|
((android_getCpuFeatures() & ANDROID_CPU_ARM_FEATURE_SHA2) != 0))
|
2017-08-17 16:33:43 +00:00
|
|
|
return true;
|
|
|
|
#elif defined(__linux__) && defined(__aarch64__)
|
2018-03-21 20:19:43 +00:00
|
|
|
if ((getauxval(AT_HWCAP) & HWCAP_SHA2) != 0)
|
2017-08-17 16:33:43 +00:00
|
|
|
return true;
|
|
|
|
#elif defined(__linux__) && defined(__aarch32__)
|
2018-03-21 20:19:43 +00:00
|
|
|
if ((getauxval(AT_HWCAP2) & HWCAP2_SHA2) != 0)
|
2017-08-17 16:33:43 +00:00
|
|
|
return true;
|
2017-08-18 07:03:42 +00:00
|
|
|
#elif defined(__APPLE__) && defined(__aarch64__)
|
2021-03-12 00:28:18 +00:00
|
|
|
// M1 processor
|
|
|
|
if (IsAppleMachineARMv82())
|
|
|
|
return true;
|
2021-03-11 18:30:38 +00:00
|
|
|
#elif defined(_WIN32) && defined(_M_ARM64)
|
2021-03-12 00:28:18 +00:00
|
|
|
if (IsProcessorFeaturePresent(PF_ARM_V8_CRYPTO_INSTRUCTIONS_AVAILABLE) != 0)
|
|
|
|
return true;
|
2018-07-14 12:20:16 +00:00
|
|
|
#endif
|
|
|
|
return false;
|
|
|
|
}
|
2017-08-18 07:03:42 +00:00
|
|
|
|
2021-03-05 18:07:24 +00:00
|
|
|
// Some ARMv8.2 features are disabled at the moment
|
|
|
|
inline bool CPU_QuerySHA3()
|
2018-07-14 12:20:16 +00:00
|
|
|
{
|
2021-03-05 18:07:24 +00:00
|
|
|
// According to the ARM manual, SHA3 depends upon SHA1 and SHA2.
|
|
|
|
// If SHA1 and SHA2 are not present, then SHA3 and SHA512 are
|
|
|
|
// not present. Also see Arm A64 Instruction Set Architecture,
|
|
|
|
// https://developer.arm.com/documentation/ddi0596/2020-12/
|
|
|
|
if (!g_hasSHA1 || !g_hasSHA2) { return false; }
|
|
|
|
|
2018-07-14 12:20:16 +00:00
|
|
|
#if defined(__ANDROID__) && defined(__aarch64__) && 0
|
|
|
|
if (((android_getCpuFamily() & ANDROID_CPU_FAMILY_ARM64) != 0) &&
|
2021-03-05 18:07:24 +00:00
|
|
|
((android_getCpuFeatures() & ANDROID_CPU_ARM64_FEATURE_SHA3) != 0))
|
2017-08-18 07:03:42 +00:00
|
|
|
return true;
|
2018-07-14 12:20:16 +00:00
|
|
|
#elif defined(__ANDROID__) && defined(__aarch32__) && 0
|
|
|
|
if (((android_getCpuFamily() & ANDROID_CPU_FAMILY_ARM) != 0) &&
|
2021-03-05 18:07:24 +00:00
|
|
|
((android_getCpuFeatures() & ANDROID_CPU_ARM_FEATURE_SHA3) != 0))
|
2018-07-14 12:20:16 +00:00
|
|
|
return true;
|
|
|
|
#elif defined(__linux__) && defined(__aarch64__)
|
2021-03-05 18:07:24 +00:00
|
|
|
if ((getauxval(AT_HWCAP) & HWCAP_SHA3) != 0)
|
2018-07-14 12:20:16 +00:00
|
|
|
return true;
|
|
|
|
#elif defined(__linux__) && defined(__aarch32__)
|
2021-03-05 18:07:24 +00:00
|
|
|
if ((getauxval(AT_HWCAP2) & HWCAP2_SHA3) != 0)
|
2018-07-14 12:20:16 +00:00
|
|
|
return true;
|
2021-03-05 03:50:58 +00:00
|
|
|
#elif defined(__APPLE__) && defined(__aarch64__)
|
|
|
|
// M1 processor
|
2021-03-05 05:38:04 +00:00
|
|
|
if (IsAppleMachineARMv82())
|
2021-03-05 03:50:58 +00:00
|
|
|
return true;
|
2018-07-14 12:20:16 +00:00
|
|
|
#endif
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2021-03-05 18:07:24 +00:00
|
|
|
// Some ARMv8.2 features are disabled at the moment
|
|
|
|
inline bool CPU_QuerySHA512()
|
2018-07-14 12:20:16 +00:00
|
|
|
{
|
2021-03-05 18:07:24 +00:00
|
|
|
// According to the ARM manual, SHA512 depends upon SHA1 and SHA2.
|
|
|
|
// If SHA1 and SHA2 are not present, then SHA3 and SHA512 are
|
|
|
|
// not present. Also see Arm A64 Instruction Set Architecture,
|
|
|
|
// https://developer.arm.com/documentation/ddi0596/2020-12/
|
|
|
|
if (!g_hasSHA1 || !g_hasSHA2) { return false; }
|
|
|
|
|
2018-07-14 12:20:16 +00:00
|
|
|
#if defined(__ANDROID__) && defined(__aarch64__) && 0
|
|
|
|
if (((android_getCpuFamily() & ANDROID_CPU_FAMILY_ARM64) != 0) &&
|
2021-03-05 18:07:24 +00:00
|
|
|
((android_getCpuFeatures() & ANDROID_CPU_ARM64_FEATURE_SHA512) != 0))
|
2018-07-14 12:20:16 +00:00
|
|
|
return true;
|
|
|
|
#elif defined(__ANDROID__) && defined(__aarch32__) && 0
|
|
|
|
if (((android_getCpuFamily() & ANDROID_CPU_FAMILY_ARM) != 0) &&
|
2021-03-05 18:07:24 +00:00
|
|
|
((android_getCpuFeatures() & ANDROID_CPU_ARM_FEATURE_SHA512) != 0))
|
2018-07-14 12:20:16 +00:00
|
|
|
return true;
|
|
|
|
#elif defined(__linux__) && defined(__aarch64__)
|
2021-03-05 18:07:24 +00:00
|
|
|
if ((getauxval(AT_HWCAP) & HWCAP_SHA512) != 0)
|
2018-07-14 12:20:16 +00:00
|
|
|
return true;
|
|
|
|
#elif defined(__linux__) && defined(__aarch32__)
|
2021-03-05 18:07:24 +00:00
|
|
|
if ((getauxval(AT_HWCAP2) & HWCAP2_SHA512) != 0)
|
2018-07-14 12:20:16 +00:00
|
|
|
return true;
|
2021-03-05 03:50:58 +00:00
|
|
|
#elif defined(__APPLE__) && defined(__aarch64__)
|
|
|
|
// M1 processor
|
2021-03-05 05:38:04 +00:00
|
|
|
if (IsAppleMachineARMv82())
|
2021-03-05 03:50:58 +00:00
|
|
|
return true;
|
2018-07-14 12:20:16 +00:00
|
|
|
#endif
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2021-03-05 18:07:24 +00:00
|
|
|
// Some ARMv8.2 features are disabled at the moment
|
2018-07-14 12:20:16 +00:00
|
|
|
inline bool CPU_QuerySM3()
|
|
|
|
{
|
|
|
|
#if defined(__ANDROID__) && defined(__aarch64__) && 0
|
|
|
|
if (((android_getCpuFamily() & ANDROID_CPU_FAMILY_ARM64) != 0) &&
|
|
|
|
((android_getCpuFeatures() & ANDROID_CPU_ARM64_FEATURE_SM3) != 0))
|
|
|
|
return true;
|
|
|
|
#elif defined(__ANDROID__) && defined(__aarch32__) && 0
|
|
|
|
if (((android_getCpuFamily() & ANDROID_CPU_FAMILY_ARM) != 0) &&
|
|
|
|
((android_getCpuFeatures() & ANDROID_CPU_ARM_FEATURE_SM3) != 0))
|
|
|
|
return true;
|
|
|
|
#elif defined(__linux__) && defined(__aarch64__)
|
|
|
|
if ((getauxval(AT_HWCAP) & HWCAP_SM3) != 0)
|
|
|
|
return true;
|
|
|
|
#elif defined(__linux__) && defined(__aarch32__)
|
|
|
|
if ((getauxval(AT_HWCAP2) & HWCAP2_SM3) != 0)
|
|
|
|
return true;
|
|
|
|
#elif defined(__APPLE__) && defined(__aarch64__) && 0
|
2021-03-07 07:07:40 +00:00
|
|
|
// No Apple support yet.
|
2018-07-14 12:20:16 +00:00
|
|
|
#endif
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2021-03-05 18:07:24 +00:00
|
|
|
// Some ARMv8.2 features are disabled at the moment
|
2018-07-14 12:20:16 +00:00
|
|
|
inline bool CPU_QuerySM4()
|
|
|
|
{
|
|
|
|
#if defined(__ANDROID__) && defined(__aarch64__) && 0
|
|
|
|
if (((android_getCpuFamily() & ANDROID_CPU_FAMILY_ARM64) != 0) &&
|
|
|
|
((android_getCpuFeatures() & ANDROID_CPU_ARM64_FEATURE_SM4) != 0))
|
|
|
|
return true;
|
|
|
|
#elif defined(__ANDROID__) && defined(__aarch32__) && 0
|
|
|
|
if (((android_getCpuFamily() & ANDROID_CPU_FAMILY_ARM) != 0) &&
|
|
|
|
((android_getCpuFeatures() & ANDROID_CPU_ARM_FEATURE_SM4) != 0))
|
|
|
|
return true;
|
|
|
|
#elif defined(__linux__) && defined(__aarch64__)
|
|
|
|
if ((getauxval(AT_HWCAP) & HWCAP_SM4) != 0)
|
|
|
|
return true;
|
|
|
|
#elif defined(__linux__) && defined(__aarch32__)
|
|
|
|
if ((getauxval(AT_HWCAP2) & HWCAP2_SM4) != 0)
|
|
|
|
return true;
|
|
|
|
#elif defined(__APPLE__) && defined(__aarch64__) && 0
|
2021-03-07 07:07:40 +00:00
|
|
|
// No Apple support yet.
|
2017-08-17 16:33:43 +00:00
|
|
|
#endif
|
2016-05-16 22:47:43 +00:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
void DetectArmFeatures()
|
|
|
|
{
|
2022-02-16 10:37:28 +00:00
|
|
|
#ifndef CRYPTOPP_DISABLE_ASM
|
|
|
|
|
2017-08-18 07:03:42 +00:00
|
|
|
// The CPU_ProbeXXX's return false for OSes which
|
2020-02-15 08:00:54 +00:00
|
|
|
// can't tolerate SIGILL-based probes
|
2018-07-08 06:49:21 +00:00
|
|
|
g_hasARMv7 = CPU_QueryARMv7() || CPU_ProbeARMv7();
|
|
|
|
g_hasNEON = CPU_QueryNEON() || CPU_ProbeNEON();
|
2017-08-17 16:33:43 +00:00
|
|
|
g_hasCRC32 = CPU_QueryCRC32() || CPU_ProbeCRC32();
|
|
|
|
g_hasPMULL = CPU_QueryPMULL() || CPU_ProbePMULL();
|
|
|
|
g_hasAES = CPU_QueryAES() || CPU_ProbeAES();
|
|
|
|
g_hasSHA1 = CPU_QuerySHA1() || CPU_ProbeSHA1();
|
2019-05-08 23:31:31 +00:00
|
|
|
g_hasSHA2 = CPU_QuerySHA256() || CPU_ProbeSHA256();
|
2018-07-14 12:20:16 +00:00
|
|
|
g_hasSHA512 = CPU_QuerySHA512(); // || CPU_ProbeSHA512();
|
|
|
|
g_hasSHA3 = CPU_QuerySHA3(); // || CPU_ProbeSHA3();
|
|
|
|
g_hasSM3 = CPU_QuerySM3(); // || CPU_ProbeSM3();
|
|
|
|
g_hasSM4 = CPU_QuerySM4(); // || CPU_ProbeSM4();
|
2016-05-16 22:47:43 +00:00
|
|
|
|
2019-05-08 23:54:05 +00:00
|
|
|
#if defined(_SC_LEVEL1_DCACHE_LINESIZE)
|
2018-03-21 20:19:43 +00:00
|
|
|
// Glibc does not implement on some platforms. The runtime returns 0 instead of error.
|
|
|
|
// https://sourceware.org/git/?p=glibc.git;a=blob;f=sysdeps/posix/sysconf.c
|
2019-09-29 01:30:01 +00:00
|
|
|
int cacheLineSize = (int)sysconf(_SC_LEVEL1_DCACHE_LINESIZE);
|
2018-03-21 20:19:43 +00:00
|
|
|
if (cacheLineSize > 0)
|
|
|
|
g_cacheLineSize = cacheLineSize;
|
2017-09-17 06:39:41 +00:00
|
|
|
#endif
|
|
|
|
|
2019-05-08 23:54:05 +00:00
|
|
|
if (g_cacheLineSize == 0)
|
|
|
|
g_cacheLineSize = CRYPTOPP_L1_CACHE_LINE_SIZE;
|
|
|
|
|
2022-02-16 10:37:28 +00:00
|
|
|
#endif // CRYPTOPP_DISABLE_ASM
|
|
|
|
|
2017-11-17 00:37:29 +00:00
|
|
|
*const_cast<volatile bool*>(&g_ArmDetectionDone) = true;
|
2016-05-15 06:30:08 +00:00
|
|
|
}
|
|
|
|
|
2017-09-11 07:05:04 +00:00
|
|
|
// *************************** PowerPC and PowerPC64 ***************************
|
|
|
|
|
|
|
|
#elif (CRYPTOPP_BOOL_PPC32 || CRYPTOPP_BOOL_PPC64)
|
|
|
|
|
2022-03-21 11:46:19 +00:00
|
|
|
bool CRYPTOPP_SECTION_INIT g_PowerPcDetectionDone = false;
|
2018-03-28 03:19:26 +00:00
|
|
|
bool CRYPTOPP_SECTION_INIT g_hasAltivec = false;
|
|
|
|
bool CRYPTOPP_SECTION_INIT g_hasPower7 = false;
|
|
|
|
bool CRYPTOPP_SECTION_INIT g_hasPower8 = false;
|
2018-11-27 07:54:26 +00:00
|
|
|
bool CRYPTOPP_SECTION_INIT g_hasPower9 = false;
|
2018-03-28 03:19:26 +00:00
|
|
|
bool CRYPTOPP_SECTION_INIT g_hasAES = false;
|
2018-08-06 09:40:38 +00:00
|
|
|
bool CRYPTOPP_SECTION_INIT g_hasPMULL = false;
|
2018-03-28 03:19:26 +00:00
|
|
|
bool CRYPTOPP_SECTION_INIT g_hasSHA256 = false;
|
|
|
|
bool CRYPTOPP_SECTION_INIT g_hasSHA512 = false;
|
2018-11-27 07:54:26 +00:00
|
|
|
bool CRYPTOPP_SECTION_INIT g_hasDARN = false;
|
2017-09-11 07:05:04 +00:00
|
|
|
word32 CRYPTOPP_SECTION_INIT g_cacheLineSize = CRYPTOPP_L1_CACHE_LINE_SIZE;
|
|
|
|
|
2017-09-12 02:39:59 +00:00
|
|
|
extern bool CPU_ProbeAltivec();
|
2017-10-18 02:50:45 +00:00
|
|
|
extern bool CPU_ProbePower7();
|
2017-09-12 02:39:59 +00:00
|
|
|
extern bool CPU_ProbePower8();
|
2018-11-27 07:54:26 +00:00
|
|
|
extern bool CPU_ProbePower9();
|
2017-09-12 02:39:59 +00:00
|
|
|
extern bool CPU_ProbeAES();
|
2018-08-06 09:40:38 +00:00
|
|
|
extern bool CPU_ProbePMULL();
|
2017-09-22 12:58:50 +00:00
|
|
|
extern bool CPU_ProbeSHA256();
|
|
|
|
extern bool CPU_ProbeSHA512();
|
2018-11-27 07:54:26 +00:00
|
|
|
extern bool CPU_ProbeDARN();
|
2017-09-11 07:05:04 +00:00
|
|
|
|
2018-11-27 07:54:26 +00:00
|
|
|
// AIX defines. We used to just call __power_7_andup()
|
|
|
|
// and friends but at Power9, too many compilers were
|
|
|
|
// missing __power_9_andup(). Instead we switched to
|
|
|
|
// a pattern similar to OpenSSL caps testing.
|
|
|
|
#ifndef __power_6_andup
|
|
|
|
# define __power_6_andup() __power_set(0xffffffffU<<14)
|
|
|
|
#endif
|
|
|
|
#ifndef __power_7_andup
|
|
|
|
# define __power_7_andup() __power_set(0xffffffffU<<15)
|
|
|
|
#endif
|
|
|
|
#ifndef __power_8_andup
|
|
|
|
# define __power_8_andup() __power_set(0xffffffffU<<16)
|
|
|
|
#endif
|
|
|
|
#ifndef __power_9_andup
|
|
|
|
# define __power_9_andup() __power_set(0xffffffffU<<17)
|
|
|
|
#endif
|
|
|
|
|
|
|
|
// AIX first supported Altivec at Power6, though it
|
|
|
|
// was available much earlier for other vendors.
|
2017-09-11 07:05:04 +00:00
|
|
|
inline bool CPU_QueryAltivec()
|
|
|
|
{
|
2019-07-06 11:35:36 +00:00
|
|
|
#if defined(__linux__) && defined(PPC_FEATURE_HAS_ALTIVEC)
|
2018-03-21 20:19:43 +00:00
|
|
|
if ((getauxval(AT_HWCAP) & PPC_FEATURE_HAS_ALTIVEC) != 0)
|
2017-09-11 07:05:04 +00:00
|
|
|
return true;
|
2018-03-21 04:35:56 +00:00
|
|
|
#elif defined(_AIX)
|
2018-11-27 07:54:26 +00:00
|
|
|
if (__power_6_andup() != 0)
|
2018-03-21 04:35:56 +00:00
|
|
|
return true;
|
2017-12-13 16:49:35 +00:00
|
|
|
#elif defined(__APPLE__) && defined(__POWERPC__)
|
2020-02-09 19:31:52 +00:00
|
|
|
unsigned int unused, arch;
|
|
|
|
GetAppleMachineInfo(unused, unused, arch);
|
|
|
|
return arch == AppleMachineInfo::PowerMac;
|
2021-04-25 14:27:33 +00:00
|
|
|
#elif defined(__FreeBSD__) && defined(PPC_FEATURE_HAS_ALTIVEC)
|
|
|
|
unsigned long cpufeatures;
|
2021-04-25 14:48:50 +00:00
|
|
|
if (elf_aux_info(AT_HWCAP, &cpufeatures, sizeof(cpufeatures)) == 0)
|
|
|
|
if ((cpufeatures & PPC_FEATURE_HAS_ALTIVEC) != 0)
|
|
|
|
return true;
|
2017-09-11 07:05:04 +00:00
|
|
|
#endif
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
inline bool CPU_QueryPower7()
|
|
|
|
{
|
|
|
|
// Power7 and ISA 2.06
|
2019-07-06 11:35:36 +00:00
|
|
|
#if defined(__linux__) && defined(PPC_FEATURE_ARCH_2_06)
|
2018-03-21 20:19:43 +00:00
|
|
|
if ((getauxval(AT_HWCAP) & PPC_FEATURE_ARCH_2_06) != 0)
|
2018-03-21 03:52:10 +00:00
|
|
|
return true;
|
|
|
|
#elif defined(_AIX)
|
2018-03-21 04:35:56 +00:00
|
|
|
if (__power_7_andup() != 0)
|
2017-09-11 07:05:04 +00:00
|
|
|
return true;
|
2021-04-25 14:27:33 +00:00
|
|
|
#elif defined(__FreeBSD__) && defined(PPC_FEATURE_ARCH_2_06)
|
|
|
|
unsigned long cpufeatures;
|
2021-04-25 14:48:50 +00:00
|
|
|
if (elf_aux_info(AT_HWCAP, &cpufeatures, sizeof(cpufeatures)) == 0)
|
|
|
|
if ((cpufeatures & PPC_FEATURE_ARCH_2_06) != 0)
|
|
|
|
return true;
|
2017-09-11 07:05:04 +00:00
|
|
|
#endif
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
inline bool CPU_QueryPower8()
|
|
|
|
{
|
2017-09-12 02:39:59 +00:00
|
|
|
// Power8 and ISA 2.07 provide in-core crypto.
|
2019-07-06 11:35:36 +00:00
|
|
|
#if defined(__linux__) && defined(PPC_FEATURE2_ARCH_2_07)
|
2018-03-21 20:19:43 +00:00
|
|
|
if ((getauxval(AT_HWCAP2) & PPC_FEATURE2_ARCH_2_07) != 0)
|
2018-03-21 03:52:10 +00:00
|
|
|
return true;
|
|
|
|
#elif defined(_AIX)
|
|
|
|
if (__power_8_andup() != 0)
|
2017-09-11 07:05:04 +00:00
|
|
|
return true;
|
2021-04-25 14:27:33 +00:00
|
|
|
#elif defined(__FreeBSD__) && defined(PPC_FEATURE2_ARCH_2_07)
|
|
|
|
unsigned long cpufeatures;
|
2021-04-25 14:48:50 +00:00
|
|
|
if (elf_aux_info(AT_HWCAP, &cpufeatures, sizeof(cpufeatures)) == 0)
|
|
|
|
if ((cpufeatures & PPC_FEATURE_ARCH_2_07) != 0)
|
|
|
|
return true;
|
2017-09-11 07:05:04 +00:00
|
|
|
#endif
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2018-11-27 07:54:26 +00:00
|
|
|
inline bool CPU_QueryPower9()
|
|
|
|
{
|
|
|
|
// Power9 and ISA 3.0.
|
2019-07-06 11:35:36 +00:00
|
|
|
#if defined(__linux__) && defined(PPC_FEATURE2_ARCH_3_00)
|
2018-11-27 07:54:26 +00:00
|
|
|
if ((getauxval(AT_HWCAP2) & PPC_FEATURE2_ARCH_3_00) != 0)
|
|
|
|
return true;
|
|
|
|
#elif defined(_AIX)
|
|
|
|
if (__power_9_andup() != 0)
|
|
|
|
return true;
|
2021-04-25 14:27:33 +00:00
|
|
|
#elif defined(__FreeBSD__) && defined(PPC_FEATURE2_ARCH_3_00)
|
|
|
|
unsigned long cpufeatures;
|
2021-04-25 14:48:50 +00:00
|
|
|
if (elf_aux_info(AT_HWCAP, &cpufeatures, sizeof(cpufeatures)) == 0)
|
|
|
|
if ((cpufeatures & PPC_FEATURE_ARCH2_3_00) != 0)
|
|
|
|
return true;
|
2018-11-27 07:54:26 +00:00
|
|
|
#endif
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2017-09-11 07:05:04 +00:00
|
|
|
inline bool CPU_QueryAES()
|
|
|
|
{
|
2017-09-12 02:39:59 +00:00
|
|
|
// Power8 and ISA 2.07 provide in-core crypto. Glibc
|
|
|
|
// 2.24 or higher is required for PPC_FEATURE2_VEC_CRYPTO.
|
2019-07-06 11:35:36 +00:00
|
|
|
#if defined(__linux__) && defined(PPC_FEATURE2_VEC_CRYPTO)
|
2018-03-21 20:19:43 +00:00
|
|
|
if ((getauxval(AT_HWCAP2) & PPC_FEATURE2_VEC_CRYPTO) != 0)
|
2017-09-11 07:05:04 +00:00
|
|
|
return true;
|
2018-03-21 03:52:10 +00:00
|
|
|
#elif defined(_AIX)
|
|
|
|
if (__power_8_andup() != 0)
|
|
|
|
return true;
|
2021-04-25 14:48:50 +00:00
|
|
|
#elif defined(__FreeBSD__) && defined(PPC_FEATURE2_HAS_VEC_CRYPTO)
|
2021-04-25 14:27:33 +00:00
|
|
|
unsigned long cpufeatures;
|
2021-04-25 14:48:50 +00:00
|
|
|
if (elf_aux_info(AT_HWCAP2, &cpufeatures, sizeof(cpufeatures)) == 0)
|
|
|
|
if ((cpufeatures & PPC_FEATURE2_HAS_VEC_CRYPTO != 0)
|
|
|
|
return true;
|
2017-09-11 07:05:04 +00:00
|
|
|
#endif
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2018-08-06 09:40:38 +00:00
|
|
|
inline bool CPU_QueryPMULL()
|
|
|
|
{
|
|
|
|
// Power8 and ISA 2.07 provide in-core crypto. Glibc
|
|
|
|
// 2.24 or higher is required for PPC_FEATURE2_VEC_CRYPTO.
|
2019-07-06 11:35:36 +00:00
|
|
|
#if defined(__linux__) && defined(PPC_FEATURE2_VEC_CRYPTO)
|
2018-08-06 09:40:38 +00:00
|
|
|
if ((getauxval(AT_HWCAP2) & PPC_FEATURE2_VEC_CRYPTO) != 0)
|
|
|
|
return true;
|
|
|
|
#elif defined(_AIX)
|
|
|
|
if (__power_8_andup() != 0)
|
|
|
|
return true;
|
2021-04-25 14:48:50 +00:00
|
|
|
#elif defined(__FreeBSD__) && defined(PPC_FEATURE2_HAS_VEC_CRYPTO)
|
2021-04-25 14:27:33 +00:00
|
|
|
unsigned long cpufeatures;
|
2021-04-25 14:48:50 +00:00
|
|
|
if (elf_aux_info(AT_HWCAP2, &cpufeatures, sizeof(cpufeatures)) == 0)
|
|
|
|
if ((cpufeatures & PPC_FEATURE2_HAS_VEC_CRYPTO != 0)
|
|
|
|
return true;
|
2018-08-06 09:40:38 +00:00
|
|
|
#endif
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2017-09-22 12:58:50 +00:00
|
|
|
inline bool CPU_QuerySHA256()
|
2017-09-11 07:05:04 +00:00
|
|
|
{
|
2017-09-12 02:39:59 +00:00
|
|
|
// Power8 and ISA 2.07 provide in-core crypto. Glibc
|
|
|
|
// 2.24 or higher is required for PPC_FEATURE2_VEC_CRYPTO.
|
2019-07-06 11:35:36 +00:00
|
|
|
#if defined(__linux__) && defined(PPC_FEATURE2_VEC_CRYPTO)
|
2018-03-21 20:19:43 +00:00
|
|
|
if ((getauxval(AT_HWCAP2) & PPC_FEATURE2_VEC_CRYPTO) != 0)
|
2017-09-11 07:05:04 +00:00
|
|
|
return true;
|
2018-03-21 03:52:10 +00:00
|
|
|
#elif defined(_AIX)
|
|
|
|
if (__power_8_andup() != 0)
|
|
|
|
return true;
|
2021-04-25 14:48:50 +00:00
|
|
|
#elif defined(__FreeBSD__) && defined(PPC_FEATURE2_HAS_VEC_CRYPTO)
|
2021-04-25 14:27:33 +00:00
|
|
|
unsigned long cpufeatures;
|
2021-04-25 14:48:50 +00:00
|
|
|
if (elf_aux_info(AT_HWCAP2, &cpufeatures, sizeof(cpufeatures)) == 0)
|
|
|
|
if ((cpufeatures & PPC_FEATURE2_HAS_VEC_CRYPTO != 0)
|
|
|
|
return true;
|
2017-09-11 07:05:04 +00:00
|
|
|
#endif
|
|
|
|
return false;
|
|
|
|
}
|
2017-09-22 12:58:50 +00:00
|
|
|
inline bool CPU_QuerySHA512()
|
2017-09-11 07:05:04 +00:00
|
|
|
{
|
2017-09-12 02:39:59 +00:00
|
|
|
// Power8 and ISA 2.07 provide in-core crypto. Glibc
|
|
|
|
// 2.24 or higher is required for PPC_FEATURE2_VEC_CRYPTO.
|
2019-07-06 11:35:36 +00:00
|
|
|
#if defined(__linux__) && defined(PPC_FEATURE2_VEC_CRYPTO)
|
2018-03-21 20:19:43 +00:00
|
|
|
if ((getauxval(AT_HWCAP2) & PPC_FEATURE2_VEC_CRYPTO) != 0)
|
2017-09-11 07:05:04 +00:00
|
|
|
return true;
|
2018-03-21 03:52:10 +00:00
|
|
|
#elif defined(_AIX)
|
|
|
|
if (__power_8_andup() != 0)
|
|
|
|
return true;
|
2021-04-25 14:48:50 +00:00
|
|
|
#elif defined(__FreeBSD__) && defined(PPC_FEATURE2_HAS_VEC_CRYPTO)
|
2021-04-25 14:27:33 +00:00
|
|
|
unsigned long cpufeatures;
|
2021-04-25 14:48:50 +00:00
|
|
|
if (elf_aux_info(AT_HWCAP2, &cpufeatures, sizeof(cpufeatures)) == 0)
|
|
|
|
if ((cpufeatures & PPC_FEATURE2_HAS_VEC_CRYPTO != 0)
|
|
|
|
return true;
|
2017-09-11 07:05:04 +00:00
|
|
|
#endif
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2018-11-27 07:54:26 +00:00
|
|
|
// Power9 random number generator
|
|
|
|
inline bool CPU_QueryDARN()
|
|
|
|
{
|
2021-04-25 14:51:17 +00:00
|
|
|
// Power9 and ISA 3.0 provide DARN. It looks like
|
|
|
|
// Glibc offers PPC_FEATURE2_DARN.
|
2019-07-06 11:35:36 +00:00
|
|
|
#if defined(__linux__) && defined(PPC_FEATURE2_ARCH_3_00)
|
2018-11-27 07:54:26 +00:00
|
|
|
if ((getauxval(AT_HWCAP2) & PPC_FEATURE2_ARCH_3_00) != 0)
|
|
|
|
return true;
|
|
|
|
#elif defined(_AIX)
|
|
|
|
if (__power_9_andup() != 0)
|
|
|
|
return true;
|
2021-04-25 14:27:33 +00:00
|
|
|
#elif defined(__FreeBSD__) && defined(PPC_FEATURE2_ARCH_3_00)
|
|
|
|
unsigned long cpufeatures;
|
2021-04-25 14:48:50 +00:00
|
|
|
if (elf_aux_info(AT_HWCAP2, &cpufeatures, sizeof(cpufeatures)) == 0)
|
|
|
|
if ((cpufeatures & PPC_FEATURE2_ARCH_3_00) != 0)
|
|
|
|
return true;
|
2018-11-27 07:54:26 +00:00
|
|
|
#endif
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2022-02-16 10:37:28 +00:00
|
|
|
void DetectPowerPcFeatures()
|
2017-09-11 07:05:04 +00:00
|
|
|
{
|
2022-02-16 10:37:28 +00:00
|
|
|
// GCC 10 is giving us trouble in CPU_ProbePower9() and CPU_ProbeDARN().
|
|
|
|
// GCC is generating POWER9 instructions on POWER8 for ppc_power9.cpp.
|
|
|
|
// The compiler idiots did not think through the consequences of
|
|
|
|
// requiring us to use -mcpu=power9 to unlock the ISA. Epic fail.
|
2020-12-22 15:17:09 +00:00
|
|
|
// https://github.com/weidai11/cryptopp/issues/986
|
|
|
|
|
2022-02-16 10:37:28 +00:00
|
|
|
#ifndef CRYPTOPP_DISABLE_ASM
|
|
|
|
|
2017-09-11 07:05:04 +00:00
|
|
|
// The CPU_ProbeXXX's return false for OSes which
|
2020-02-15 08:00:54 +00:00
|
|
|
// can't tolerate SIGILL-based probes, like Apple
|
2017-09-11 07:05:04 +00:00
|
|
|
g_hasAltivec = CPU_QueryAltivec() || CPU_ProbeAltivec();
|
2017-10-18 02:50:45 +00:00
|
|
|
g_hasPower7 = CPU_QueryPower7() || CPU_ProbePower7();
|
2020-12-22 15:27:50 +00:00
|
|
|
g_hasPower8 = CPU_QueryPower8() || CPU_ProbePower8();
|
2020-12-22 15:17:09 +00:00
|
|
|
g_hasPower9 = CPU_QueryPower9() || CPU_ProbePower9();
|
2018-08-06 09:40:38 +00:00
|
|
|
g_hasPMULL = CPU_QueryPMULL() || CPU_ProbePMULL();
|
2017-09-11 07:05:04 +00:00
|
|
|
g_hasAES = CPU_QueryAES() || CPU_ProbeAES();
|
2017-09-22 12:58:50 +00:00
|
|
|
g_hasSHA256 = CPU_QuerySHA256() || CPU_ProbeSHA256();
|
|
|
|
g_hasSHA512 = CPU_QuerySHA512() || CPU_ProbeSHA512();
|
2018-11-27 07:54:26 +00:00
|
|
|
g_hasDARN = CPU_QueryDARN() || CPU_ProbeDARN();
|
2017-09-11 07:05:04 +00:00
|
|
|
|
2018-03-21 20:19:43 +00:00
|
|
|
#if defined(_AIX) && defined(SC_L1C_DLS)
|
2017-09-11 07:05:04 +00:00
|
|
|
// /usr/include/sys/systemcfg.h
|
2018-03-21 20:19:43 +00:00
|
|
|
int cacheLineSize = getsystemcfg(SC_L1C_DLS);
|
|
|
|
if (cacheLineSize > 0)
|
|
|
|
g_cacheLineSize = cacheLineSize;
|
2019-05-08 23:54:05 +00:00
|
|
|
#elif defined(_SC_LEVEL1_DCACHE_LINESIZE)
|
2018-03-21 20:19:43 +00:00
|
|
|
// Glibc does not implement on some platforms. The runtime returns 0 instead of error.
|
|
|
|
// https://sourceware.org/git/?p=glibc.git;a=blob;f=sysdeps/posix/sysconf.c
|
2019-09-29 01:30:01 +00:00
|
|
|
int cacheLineSize = (int)sysconf(_SC_LEVEL1_DCACHE_LINESIZE);
|
2018-03-21 20:19:43 +00:00
|
|
|
if (cacheLineSize > 0)
|
|
|
|
g_cacheLineSize = cacheLineSize;
|
2017-09-11 07:05:04 +00:00
|
|
|
#endif
|
|
|
|
|
2019-05-08 23:54:05 +00:00
|
|
|
if (g_cacheLineSize == 0)
|
|
|
|
g_cacheLineSize = CRYPTOPP_L1_CACHE_LINE_SIZE;
|
|
|
|
|
2022-02-16 10:37:28 +00:00
|
|
|
#endif // CRYPTOPP_DISABLE_ASM
|
|
|
|
|
2022-03-21 11:46:19 +00:00
|
|
|
*const_cast<volatile bool*>(&g_PowerPcDetectionDone) = true;
|
2017-09-11 07:05:04 +00:00
|
|
|
}
|
|
|
|
|
2015-11-05 06:59:46 +00:00
|
|
|
#endif
|
|
|
|
NAMESPACE_END
|
|
|
|
|
2017-08-18 07:03:42 +00:00
|
|
|
// *************************** C++ Static Initialization ***************************
|
2017-03-20 12:51:10 +00:00
|
|
|
|
|
|
|
ANONYMOUS_NAMESPACE_BEGIN
|
2017-11-12 16:55:57 +00:00
|
|
|
|
|
|
|
class InitCpu
|
2017-03-20 12:51:10 +00:00
|
|
|
{
|
2017-11-12 16:55:57 +00:00
|
|
|
public:
|
|
|
|
InitCpu()
|
2017-03-20 12:51:10 +00:00
|
|
|
{
|
|
|
|
#if CRYPTOPP_BOOL_X86 || CRYPTOPP_BOOL_X32 || CRYPTOPP_BOOL_X64
|
|
|
|
CryptoPP::DetectX86Features();
|
2018-12-09 15:24:55 +00:00
|
|
|
#elif CRYPTOPP_BOOL_ARM32 || CRYPTOPP_BOOL_ARMV8
|
2017-03-20 12:51:10 +00:00
|
|
|
CryptoPP::DetectArmFeatures();
|
2017-09-11 07:05:04 +00:00
|
|
|
#elif CRYPTOPP_BOOL_PPC32 || CRYPTOPP_BOOL_PPC64
|
2022-02-16 10:37:28 +00:00
|
|
|
CryptoPP::DetectPowerPcFeatures();
|
2017-03-20 12:51:10 +00:00
|
|
|
#endif
|
|
|
|
}
|
|
|
|
};
|
|
|
|
|
2017-11-12 16:55:57 +00:00
|
|
|
// This is not really needed because HasSSE() and friends can dynamically initialize.
|
|
|
|
// Everything depends on CPU features so we initialize it once at load time.
|
|
|
|
// Dynamic initialization will be used if init priorities are not available.
|
|
|
|
|
2017-03-20 12:51:10 +00:00
|
|
|
#if HAVE_GCC_INIT_PRIORITY
|
2017-11-12 16:55:57 +00:00
|
|
|
const InitCpu s_init __attribute__ ((init_priority (CRYPTOPP_INIT_PRIORITY + 10))) = InitCpu();
|
2017-03-20 12:51:10 +00:00
|
|
|
#elif HAVE_MSC_INIT_PRIORITY
|
2017-11-12 16:55:57 +00:00
|
|
|
#pragma warning(disable: 4075)
|
|
|
|
#pragma init_seg(".CRT$XCU")
|
|
|
|
const InitCpu s_init;
|
|
|
|
#pragma warning(default: 4075)
|
2018-11-30 13:23:35 +00:00
|
|
|
#elif HAVE_XLC_INIT_PRIORITY
|
|
|
|
// XLC needs constant, not a define
|
|
|
|
#pragma priority(270)
|
|
|
|
const InitCpu s_init;
|
2017-03-20 12:51:10 +00:00
|
|
|
#else
|
2017-11-12 16:55:57 +00:00
|
|
|
const InitCpu s_init;
|
2015-11-05 06:59:46 +00:00
|
|
|
#endif
|
2017-11-12 16:55:57 +00:00
|
|
|
|
2017-03-20 12:51:10 +00:00
|
|
|
ANONYMOUS_NAMESPACE_END
|
|
|
|
|
|
|
|
#endif // CRYPTOPP_IMPORTS
|