Commit Graph

26 Commits

Author SHA1 Message Date
Jeffrey Walton
003959567f
Fix SIGIL on PowerPC during cpu feature probes (GH #1115)
Also see GH #1112
2022-03-29 21:06:48 -04:00
Jeffrey Walton
01d374afd1
Move UINT64_CAST to config_asm.h 2021-05-23 05:17:08 -04:00
Jeffrey Walton
fee14910ea
Move M128_CAST and CONST_M128_CAST to config_asm.h 2021-04-20 01:48:03 -04:00
Jeffrey Walton
fa5a8841bf
Clear elevated warnings on Apple M1 2021-03-06 10:42:51 -05:00
Jeffrey Walton
8416d3985b
Fix polynomial multiply detection on PPC64 2020-04-06 20:34:20 -04:00
Jeffrey Walton
6fa3e38e5c
Restore SIGILL handler if sigprocmask fails
We've never encountered this case, but better safe then sorry.
2020-02-17 14:15:02 -05:00
Jeffrey Walton
183fba44bf
Rename VecPolyMultiplyLE to VecIntelMultiply (PR #908)
The LE multiplies are compatible with Intel's _mm_clmulepi64_si128
2019-10-26 22:57:58 -04:00
Jeffrey Walton
60eedb97ba
Fix ARM headers and Android compile (PR #896)
* Test fix ARM headers
This problem has been festering for some time. The header file includes are slightly different than the ISA options. Some platforms need an include, others don't.

* Fix cryptest-android.sh and cryptest-ios.sh

* Fix MSVC ARM32 and ARM64 compile

* Split ARM32 and ARM64 recipes in GNUmakefile
2019-10-16 21:00:45 -04:00
Jeffrey Walton
a7f2796dda
Update comments 2019-07-21 22:21:10 -04:00
Jeffrey Walton
6acbbf1849
Fix crash in GCM mode on ARM with -mthumb 2019-05-21 04:03:22 -04:00
Jeffrey Walton
39418a8512
Use PowerPC unaligned loads and stores with Power8 (GH #825, PR #826)
Use PowerPC unaligned loads and stores with Power8. Formerly we were using Power7 as the floor because the IBM POWER Architecture manuals said unaligned loads and stores were available. However, some compilers generate bad code for unaligned loads and stores using `-march=power7`, so bump to a known good.
2019-04-27 20:35:01 -04:00
Jeffrey Walton
488c1df2fe
Fix self test failure with IBM XL C/C++ on AIX 2019-01-22 06:13:14 -05:00
Jeffrey Walton
177385393d
Update CPU_ProbePMULL test 2019-01-20 02:41:20 -05:00
Jeffrey Walton
8fd5bb31cf
Add VecPolyMultiply for Intel-equivalent F2N multiplies 2019-01-20 01:47:34 -05:00
Jeffrey Walton
df9fa62205
Use carryless multiplies for NIST b233 and k233 curves (GH #783, PR #784)
Use carryless multiplies for NIST b233 and k233 curves.
2019-01-16 00:02:04 -05:00
Jeffrey Walton
65012e8e75
Fix GCM ARM64 compile with MSVC compiler (GH #776) 2019-01-04 16:12:35 -05:00
Jeffrey Walton
02f7fda54b
Fix <arm_neon.h> include for ARM64 with MSVC compiler (GH #776) 2019-01-04 11:25:55 -05:00
Jeffrey Walton
0aa217b91c
Update comments in config.h
Some comments in config.h were old. Time for a refresh.
Switch from CRYPTOPP_BOOL_ARM64 to CRYPTOPP_BOOL_ARMV8. Aarch32 is ARMv8, and that's the important part.
2018-12-09 10:24:55 -05:00
Jeffrey Walton
f52a141f6e
Add separate Polynomial Multiply feature test on POWER8 (GH#742) 2018-11-19 18:31:45 -05:00
Jeffrey Walton
3129ad4d70
Fix LLVM Clang compile on PowerPC 2018-11-19 02:28:29 -05:00
Jeffrey Walton
bbc5c63d33
Drop GCM to POWER7 on PowerPC
GCM can do some bulk XOR's using the SIMD unit. However, we still need loads and stores to be fast. Fast loads and stores of unaligned data requires the VSX unit
2018-11-17 00:41:49 -05:00
Jeffrey Walton
f6e04e5f33
Rename PPC vector functions from VectorFunc to VecFunc 2018-11-15 15:17:49 -05:00
Jeffrey Walton
3c7bdf1a26
Add Octet suffix for vec_sld
We need to make room for packed shifts and rotates
2018-11-14 23:32:26 -05:00
Jeffrey Walton
505c58acc1
Add Octet suffix for vec_sld
We need to make room for packed shifts and rotates
2018-11-14 23:12:39 -05:00
Jeffrey Walton
96d3fa208e
Fix compile when using XLC with LLVM front-end without -qxlcompatmacros 2018-11-14 20:16:38 -05:00
Jeffrey Walton
896225069d
Rename files with dashes to underscores (GH #736)
Also see https://groups.google.com/forum/#!topic/cryptopp-users/HBz-6gZZFOA on the mailing list
2018-11-10 08:00:14 -05:00