9 Commits

Author	SHA1	Message	Date
Jeffrey Walton	4f2c605209	Add Power4 unaligned Load and Store	2018-01-05 21:27:27 -05:00
Jeffrey Walton	d6d53f2e9d	Add Power4 Vector Load, Store, Add and Xor	2018-01-02 08:13:42 -05:00
Jeffrey Walton	fac3a44a84	Move Altivec AdvancedProcessBlocks into adv-simd.h	2018-01-02 07:08:13 -05:00
Jeffrey Walton	7b14ead0f3	Fix unaligned load for _mm_loaddup_pd with GCC and UBsan ... This function was missed earlier. Unfortunately, it does not squash all of the unaligned load findings. I'm pretty sure it is a GCC problem	2017-12-28 01:16:17 -05:00
Jeffrey Walton	19deccf3ba	Fix Clang 5.0 "runtime error: addition of unsigned offset to 0xXXXX overflowed to 0xYYYY" (GH #549)	2017-12-16 18:18:53 -05:00
Jeffrey Walton	dc21de2483	Fix UBsan overflow finding ... We were cating UBsan findings under Clang similar to "adv-simd.h:1138:26: runtime error: addition of unsigned offset to 0x000002d41410 overflowed to 0x000002d41400". The problem was CRYPTOPP_CONSTANT, which used an enum. The compiler is allowed to pick the underlying data type, and Clang was picking a signed type	2017-12-16 14:21:08 -05:00
Jeffrey Walton	195ac2c7c9	Refactor rijndael-simd.cpp and simon.simd.cpp to use adv-simd.h	2017-12-10 11:09:50 -05:00
Jeffrey Walton	e90cc9a028	Update comments	2017-12-10 05:41:19 -05:00
Jeffrey Walton	8a5911e6eb	Refactor <cipher>_AdvancedProcessBlocks_<arch> into adv-simd.h ... This also fixes the SPECK64 bug where CTR mode self tests fail. It was an odd failure because it only affected 64-bit SPECK. SIMON was fine and it used nearly the same code. We tracked it down through trial and error to the table based rotates.	2017-12-09 21:04:25 -05:00