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CPU/Recompiler: Use 32-bit ARM64 fastmem LUT indices

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Shift the guest address into a W register in load and store paths, matching operand widths and avoiding VIXL_DEBUG assertions.
This commit is contained in:
Stenzek
2026-10-10 21:47:42 +10:00
parent a5d6e76ef1
commit 470ef0656f
1 changed files with 2 additions and 2 deletions
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src/core/cpu_recompiler_arm64.cpp
+2 -2
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@@ -1885,7 +1885,7 @@ vixl::aarch64::Register CPU::ARM64Recompiler::GenerateLoad(const vixl::aarch64::
if (g_settings.cpu_fastmem_mode == CPUFastmemMode::LUT)
{
DebugAssert(addr_reg.GetCode() != RWARG3.GetCode());
armAsm->lsr(RXARG3, addr_reg, Bus::FASTMEM_LUT_PAGE_SHIFT);
armAsm->lsr(RWARG3, addr_reg, Bus::FASTMEM_LUT_PAGE_SHIFT);
armAsm->ldr(RXARG3, MemOperand(RMEMBASE, RXARG3, LSL, 3));
}
@@ -1997,7 +1997,7 @@ void CPU::ARM64Recompiler::GenerateStore(const vixl::aarch64::Register& addr_reg
if (g_settings.cpu_fastmem_mode == CPUFastmemMode::LUT)
{
DebugAssert(addr_reg.GetCode() != RWARG3.GetCode());
armAsm->lsr(RXARG3, addr_reg, Bus::FASTMEM_LUT_PAGE_SHIFT);
armAsm->lsr(RWARG3, addr_reg, Bus::FASTMEM_LUT_PAGE_SHIFT);
armAsm->ldr(RXARG3, MemOperand(RMEMBASE, RXARG3, LSL, 3));
}