Fix LGTM Errors (#1656)

* py/missing-call-to-init

* Remove deprecated should_profile argument

* WASM __init__ call and variable names

* Mute warnings about printing evm account IDs

LGTM thinks we're logging potentially sensitive data when we create a symbolic account and print the user ID. I can't imagine a context where we would ever care about this alert in general, so I'm going to disable it.

* Fix mixed attribute/function names

* Another missing __init__ call

* Remove single-op form of _bitwise_instruction

It's never used

* Use built-in ops instead of lambda

* Missing import

* Some unreachable code

Still missing some in evm.py

* Blacken

* Tag examples as examples

* NotImplemented -> NotImplementedError

* Fix unnecessary `pass`

* Revert "Remove single-op form of _bitwise_instruction"

This reverts commit 1b7a4110f4.

* Mute overzealous call argument error

Co-authored-by: Brad Larsen <[email protected]>
This commit is contained in:
Eric Hennenfent
2020-04-08 13:49:28 -07:00
committed by GitHub
co-authored by Brad Larsen
parent 8fcdf0dc1f
commit 8565705f79
17 changed files with 45 additions and 36 deletions
+6
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@@ -0,0 +1,6 @@
queries:
- exclude: py/clear-text-logging-sensitive-data
path_classifiers:
examples:
- examples/
-1
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@@ -129,7 +129,6 @@ class ExtendedTracer(Plugin):
def did_write_memory_callback(self, state, where, value, size):
if self.current_pc == where:
raise Exception
return
entry = {"type": "mem_write", "where": where, "value": value, "size": size}
state.context.setdefault(self.context_key, []).append(entry)
+1 -1
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@@ -326,7 +326,7 @@ class ConstraintSet:
name=migrated_name,
).array
else:
raise NotImplemented(
raise NotImplementedError(
f"Unknown expression type {type(foreign_var)} encountered during expression migration"
)
# Update the var to var mapping
-1
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@@ -274,7 +274,6 @@ class Z3Solver(Solver):
# self._proc.wait()
except Exception as e:
logger.error(str(e))
pass
def _reset(self, constraints=None):
"""Auxiliary method to reset the smtlib external solver to initial defaults"""
+2 -2
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@@ -61,7 +61,7 @@ class SerializeState(Concretize):
disk so that analysis can later be resumed from this point.
"""
def setstate(self, state, _value):
def _setstate(self, state, _value):
with open(self.filename, "wb") as statef:
PickleSerializer().serialize(state, statef)
@@ -69,7 +69,7 @@ class SerializeState(Concretize):
super().__init__(
f"Saving state to {filename}",
BitVecConstant(32, 0),
setstate=self.setstate,
setstate=self._setstate,
policy="ONE",
**kwargs,
)
+1 -1
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@@ -264,7 +264,7 @@ class ABI:
result.append(ABI._deserialize(ty[2], buf, dyn_offset))
dyn_offset += ty_size
else:
raise NotImplemented
raise NotImplementedError(f"Could not deserialize type: {ty[0]}")
return result
+1 -1
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@@ -513,7 +513,7 @@ class ManticoreEVM(ManticoreBase):
for _ in range(rep):
result.append(self._make_symbolic_arguments(ty[2]))
else:
raise NotImplemented
raise NotImplementedError(f"Could not produce symbolic argument of type {ty[0]}")
return result
-2
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@@ -2837,9 +2837,7 @@ class Aarch64Cpu(Cpu):
insn_rx += "1{5}"
assert re.match(insn_rx, cpu.insn_bit_str)
# XXX: Assumes sequential execution.
pass
# XXX: Support DUP (element).
@instruction
+12 -10
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@@ -4,6 +4,7 @@ import logging
import struct
import capstone as cs
import operator as ops
from .abstractcpu import Abi, Cpu, Interruption, Operand, RegisterFile, SyscallAbi
from .abstractcpu import instruction as abstract_instruction
@@ -763,8 +764,8 @@ class Armv7Cpu(Cpu):
return "ASR"
return OP_NAME_MAP.get(name, name)
def _wrap_operands(self, ops):
return [Armv7Operand(self, op) for op in ops]
def _wrap_operands(self, operands):
return [Armv7Operand(self, op) for op in operands]
def should_commit_flags(cpu):
# workaround for a capstone bug (issue #980);
@@ -1515,7 +1516,8 @@ class Armv7Cpu(Cpu):
op2_val, carry = op2.read(with_carry=True)
result = operation(op1.read(), op2_val)
else:
op1_val, carry = op1.read(with_carry=True)
# We _do_ use this form, contrary to what LGTM says
op1_val, carry = op1.read(with_carry=True) # lgtm [py/call/wrong-arguments]
result = operation(op1_val)
if dest is not None:
dest.write(result)
@@ -1524,9 +1526,9 @@ class Armv7Cpu(Cpu):
@instruction(can_take_denormalized_mod_imm=True)
def ORR(cpu, dest, op1, op2=None):
if op2 is not None:
cpu._bitwise_instruction(lambda x, y: x | y, dest, op1, op2)
cpu._bitwise_instruction(ops.or_, dest, op1, op2)
else:
cpu._bitwise_instruction(lambda x, y: x | y, dest, dest, op1)
cpu._bitwise_instruction(ops.or_, dest, dest, op1)
@instruction(can_take_denormalized_mod_imm=True)
def ORN(cpu, dest, op1, op2=None):
@@ -1538,20 +1540,20 @@ class Armv7Cpu(Cpu):
@instruction(can_take_denormalized_mod_imm=True)
def EOR(cpu, dest, op1, op2=None):
if op2 is not None:
cpu._bitwise_instruction(lambda x, y: x ^ y, dest, op1, op2)
cpu._bitwise_instruction(ops.xor, dest, op1, op2)
else:
cpu._bitwise_instruction(lambda x, y: x ^ y, dest, dest, op1)
cpu._bitwise_instruction(ops.xor, dest, dest, op1)
@instruction(can_take_denormalized_mod_imm=True)
def AND(cpu, dest, op1, op2=None):
if op2 is not None:
cpu._bitwise_instruction(lambda x, y: x & y, dest, op1, op2)
cpu._bitwise_instruction(ops.and_, dest, op1, op2)
else:
cpu._bitwise_instruction(lambda x, y: x & y, dest, dest, op1)
cpu._bitwise_instruction(ops.and_, dest, dest, op1)
@instruction(can_take_denormalized_mod_imm=True)
def TEQ(cpu, op1, op2=None):
cpu._bitwise_instruction(lambda x, y: x ^ y, None, op1, op2)
cpu._bitwise_instruction(ops.xor, None, op1, op2)
cpu.commit_flags()
@instruction(can_take_denormalized_mod_imm=True)
+1
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@@ -63,6 +63,7 @@ class ConcretizeMemory(MemoryException):
self.message = f"Concretizing memory address {address} size {size}"
else:
self.message = message
super().__init__(self.message, address)
self.mem = mem
self.address = address
self.size = size
+2 -6
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@@ -1082,12 +1082,8 @@ class SDecree(Decree):
data = []
for i in range(count):
if False:
# Too slow for the new age.
value = self.constraints.new_bitvec(8, name="RANDOM_%04d" % self.random)
self.constraints.add(symb == cgcrandom.stream[self.random])
else:
value = cgcrandom.stream[self.random]
# TODO - should value be symbolic?
value = cgcrandom.stream[self.random]
data.append(value)
self.random += 1
+7 -2
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@@ -161,8 +161,11 @@ class File:
return
class ProcSelfMaps(File):
# TODO - we should consider refactoring File so that we don't have to mute these errors
class ProcSelfMaps(File): # lgtm [py/missing-call-to-init]
def __init__(self, flags: int, linux):
# WARN: Does not call File.__init__. Should have the File API, but we manually
# manage the underlying file and mode
self.file = tempfile.NamedTemporaryFile(mode="w", delete=False)
self.file.write(linux.current.memory.__proc_self__)
self.file.close()
@@ -172,8 +175,10 @@ class ProcSelfMaps(File):
self.file = open(self.file.name, mode)
class Directory(File):
class Directory(File): # lgtm [py/missing-call-to-init]
def __init__(self, path: str, flags: int):
# WARN: Does not call File.__init__ because we don't want to open the directory,
# even though we still want it to present the same API as File
assert os.path.isdir(path)
self.fd = os.open(path, flags)
+2 -2
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@@ -1454,8 +1454,8 @@ class Executor(Eventful):
stack.push(F32.cast(c1))
return
raise NotImplementedError("f32_demote_f64")
c1 = struct.unpack("f", struct.pack("d", c1)[:4])[0]
stack.push(F32.cast(c1))
# c1 = struct.unpack("f", struct.pack("d", c1)[:4])[0]
# stack.push(F32.cast(c1))
def f64_convert_s_i32(self, store, stack):
stack.has_type_on_top(I32, 1)
+2 -2
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@@ -1082,7 +1082,7 @@ class ModuleInstance(Eventful):
ty = f.type
assert len(ty.result_types) <= 1
local_vars: typing.List[Value] = []
for v in [stack.pop() for _t in ty.param_types][::-1]:
for v in [stack.pop() for _ in ty.param_types][::-1]:
assert not isinstance(v, (Label, Activation))
local_vars.append(v)
@@ -1846,7 +1846,7 @@ class Stack(Eventful):
raise RuntimeError("Couldn't find a frame on the stack")
class AtomicStack(Stack):
class AtomicStack(Stack): # lgtm [py/missing-call-to-init]
"""
Allows for the rolling-back of the stack in the event of a concretization exception.
Inherits from Stack so that the types will be correct, but never calls `super`.
+1 -2
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@@ -95,7 +95,6 @@ def getM(m):
return int(correspond(f"x/xg {m}\n").strip().split("\t")[-1], 0)
except Exception as e:
raise e
return 0
def getPid():
@@ -138,5 +137,5 @@ def get_arch():
_arch = "armv7"
else:
print(infotarget)
raise NotImplemented
raise NotImplementedError
return _arch
+6 -2
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@@ -7,15 +7,19 @@ from __future__ import print_function
from sys import argv, exit
from manticore.native import Manticore
from manticore.core.plugin import Profiler
def profile(program, sort="cumulative"):
print(f'[*] Profiling program "{program}"')
m = Manticore(program)
m.run(should_profile=True)
profiler = Profiler()
m.register_plugin(profiler)
m.run()
m.finalize()
stats = m.get_profiling_stats()
stats = profiler.get_profiling_data()
print(f"[*] Loaded profiling data.")
if stats is None:
+1 -1
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@@ -158,7 +158,7 @@ def read_operand(o):
elif o.type == X86_OP_REG:
reg_name = str(instruction.reg_name(o.reg).upper())
return gdb.getR(reg_name)
raise NotImplemented
raise NotImplementedError(f"Unknown operand typ: {o.type}")
STACK_INSTRUCTIONS = [