2013-09-26 06:18:44 +00:00
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/*
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* QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
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*
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* PAPR Virtualized Interrupt System, aka ICS/ICP aka xics, in-kernel emulation
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*
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* Copyright (c) 2013 David Gibson, IBM Corporation.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*
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*/
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2016-01-26 18:16:58 +00:00
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#include "qemu/osdep.h"
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include/qemu/osdep.h: Don't include qapi/error.h
Commit 57cb38b included qapi/error.h into qemu/osdep.h to get the
Error typedef. Since then, we've moved to include qemu/osdep.h
everywhere. Its file comment explains: "To avoid getting into
possible circular include dependencies, this file should not include
any other QEMU headers, with the exceptions of config-host.h,
compiler.h, os-posix.h and os-win32.h, all of which are doing a
similar job to this file and are under similar constraints."
qapi/error.h doesn't do a similar job, and it doesn't adhere to
similar constraints: it includes qapi-types.h. That's in excess of
100KiB of crap most .c files don't actually need.
Add the typedef to qemu/typedefs.h, and include that instead of
qapi/error.h. Include qapi/error.h in .c files that need it and don't
get it now. Include qapi-types.h in qom/object.h for uint16List.
Update scripts/clean-includes accordingly. Update it further to match
reality: replace config.h by config-target.h, add sysemu/os-posix.h,
sysemu/os-win32.h. Update the list of includes in the qemu/osdep.h
comment quoted above similarly.
This reduces the number of objects depending on qapi/error.h from "all
of them" to less than a third. Unfortunately, the number depending on
qapi-types.h shrinks only a little. More work is needed for that one.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
[Fix compilation without the spice devel packages. - Paolo]
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-03-14 08:01:28 +00:00
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#include "qapi/error.h"
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2016-01-19 20:51:44 +00:00
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#include "qemu-common.h"
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#include "cpu.h"
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2013-09-26 06:18:44 +00:00
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#include "hw/hw.h"
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#include "trace.h"
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2014-09-17 10:21:29 +00:00
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#include "sysemu/kvm.h"
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2013-09-26 06:18:44 +00:00
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#include "hw/ppc/spapr.h"
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#include "hw/ppc/xics.h"
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2019-01-10 08:18:47 +00:00
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#include "hw/ppc/xics_spapr.h"
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2013-09-26 06:18:44 +00:00
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#include "kvm_ppc.h"
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#include "qemu/config-file.h"
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#include "qemu/error-report.h"
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#include <sys/ioctl.h>
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2017-02-27 14:29:22 +00:00
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static int kernel_xics_fd = -1;
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2017-05-17 14:38:20 +00:00
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typedef struct KVMEnabledICP {
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unsigned long vcpu_id;
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QLIST_ENTRY(KVMEnabledICP) node;
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} KVMEnabledICP;
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static QLIST_HEAD(, KVMEnabledICP)
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kvm_enabled_icps = QLIST_HEAD_INITIALIZER(&kvm_enabled_icps);
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2013-09-26 06:18:44 +00:00
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/*
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* ICP-KVM
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*/
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2017-02-27 14:29:33 +00:00
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static void icp_get_kvm_state(ICPState *icp)
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2013-09-26 06:18:44 +00:00
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{
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uint64_t state;
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int ret;
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/* ICP for this CPU thread is not in use, exiting */
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2017-02-27 14:29:33 +00:00
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if (!icp->cs) {
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2013-09-26 06:18:44 +00:00
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return;
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}
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2018-06-11 16:23:10 +00:00
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ret = kvm_get_one_reg(icp->cs, KVM_REG_PPC_ICP_STATE, &state);
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2013-09-26 06:18:44 +00:00
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if (ret != 0) {
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error_report("Unable to retrieve KVM interrupt controller state"
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2017-02-27 14:29:33 +00:00
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" for CPU %ld: %s", kvm_arch_vcpu_id(icp->cs), strerror(errno));
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2013-09-26 06:18:44 +00:00
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exit(1);
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}
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2017-02-27 14:29:33 +00:00
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icp->xirr = state >> KVM_REG_PPC_ICP_XISR_SHIFT;
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icp->mfrr = (state >> KVM_REG_PPC_ICP_MFRR_SHIFT)
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2013-09-26 06:18:44 +00:00
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& KVM_REG_PPC_ICP_MFRR_MASK;
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2017-02-27 14:29:33 +00:00
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icp->pending_priority = (state >> KVM_REG_PPC_ICP_PPRI_SHIFT)
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2013-09-26 06:18:44 +00:00
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& KVM_REG_PPC_ICP_PPRI_MASK;
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}
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2017-11-13 19:42:39 +00:00
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static void do_icp_synchronize_state(CPUState *cpu, run_on_cpu_data arg)
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{
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icp_get_kvm_state(arg.host_ptr);
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}
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static void icp_synchronize_state(ICPState *icp)
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{
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if (icp->cs) {
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run_on_cpu(icp->cs, do_icp_synchronize_state, RUN_ON_CPU_HOST_PTR(icp));
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}
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}
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2017-02-27 14:29:33 +00:00
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static int icp_set_kvm_state(ICPState *icp, int version_id)
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2013-09-26 06:18:44 +00:00
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{
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uint64_t state;
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int ret;
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/* ICP for this CPU thread is not in use, exiting */
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2017-02-27 14:29:33 +00:00
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if (!icp->cs) {
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2013-09-26 06:18:44 +00:00
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return 0;
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}
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2017-02-27 14:29:33 +00:00
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state = ((uint64_t)icp->xirr << KVM_REG_PPC_ICP_XISR_SHIFT)
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| ((uint64_t)icp->mfrr << KVM_REG_PPC_ICP_MFRR_SHIFT)
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| ((uint64_t)icp->pending_priority << KVM_REG_PPC_ICP_PPRI_SHIFT);
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2013-09-26 06:18:44 +00:00
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2018-06-11 16:23:10 +00:00
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ret = kvm_set_one_reg(icp->cs, KVM_REG_PPC_ICP_STATE, &state);
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2013-09-26 06:18:44 +00:00
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if (ret != 0) {
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error_report("Unable to restore KVM interrupt controller state (0x%"
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2017-02-27 14:29:33 +00:00
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PRIx64 ") for CPU %ld: %s", state, kvm_arch_vcpu_id(icp->cs),
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2013-09-26 06:18:44 +00:00
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strerror(errno));
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return ret;
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}
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return 0;
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}
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2018-06-20 10:24:13 +00:00
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static void icp_kvm_reset(DeviceState *dev)
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2013-09-26 06:18:44 +00:00
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{
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2018-06-20 10:24:13 +00:00
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ICPStateClass *icpc = ICP_GET_CLASS(dev);
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icpc->parent_reset(dev);
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icp_set_kvm_state(ICP(dev), 1);
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2013-09-26 06:18:44 +00:00
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}
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2018-06-20 10:24:13 +00:00
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static void icp_kvm_realize(DeviceState *dev, Error **errp)
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2017-02-27 14:29:24 +00:00
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{
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2018-06-20 10:24:13 +00:00
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ICPState *icp = ICP(dev);
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ICPStateClass *icpc = ICP_GET_CLASS(icp);
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Error *local_err = NULL;
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CPUState *cs;
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2017-05-17 14:38:20 +00:00
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KVMEnabledICP *enabled_icp;
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2018-06-20 10:24:13 +00:00
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unsigned long vcpu_id;
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2017-02-27 14:29:24 +00:00
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int ret;
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if (kernel_xics_fd == -1) {
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abort();
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}
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2018-06-20 10:24:13 +00:00
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icpc->parent_realize(dev, &local_err);
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if (local_err) {
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error_propagate(errp, local_err);
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return;
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}
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cs = icp->cs;
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vcpu_id = kvm_arch_vcpu_id(cs);
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2017-02-27 14:29:24 +00:00
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/*
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* If we are reusing a parked vCPU fd corresponding to the CPU
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* which was hot-removed earlier we don't have to renable
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* KVM_CAP_IRQ_XICS capability again.
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*/
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2017-05-17 14:38:20 +00:00
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QLIST_FOREACH(enabled_icp, &kvm_enabled_icps, node) {
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if (enabled_icp->vcpu_id == vcpu_id) {
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return;
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}
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2017-02-27 14:29:24 +00:00
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}
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2017-05-17 14:38:20 +00:00
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ret = kvm_vcpu_enable_cap(cs, KVM_CAP_IRQ_XICS, 0, kernel_xics_fd, vcpu_id);
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2017-02-27 14:29:24 +00:00
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if (ret < 0) {
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2017-06-08 13:43:08 +00:00
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error_setg(errp, "Unable to connect CPU%ld to kernel XICS: %s", vcpu_id,
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strerror(errno));
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return;
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2017-02-27 14:29:24 +00:00
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}
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2017-05-17 14:38:20 +00:00
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enabled_icp = g_malloc(sizeof(*enabled_icp));
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enabled_icp->vcpu_id = vcpu_id;
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QLIST_INSERT_HEAD(&kvm_enabled_icps, enabled_icp, node);
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2017-02-27 14:29:24 +00:00
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}
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2013-09-26 06:18:44 +00:00
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static void icp_kvm_class_init(ObjectClass *klass, void *data)
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{
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2018-06-20 10:24:13 +00:00
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DeviceClass *dc = DEVICE_CLASS(klass);
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2013-09-26 06:18:44 +00:00
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ICPStateClass *icpc = ICP_CLASS(klass);
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2018-06-20 10:24:13 +00:00
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device_class_set_parent_realize(dc, icp_kvm_realize,
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&icpc->parent_realize);
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device_class_set_parent_reset(dc, icp_kvm_reset,
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&icpc->parent_reset);
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2013-09-26 06:18:44 +00:00
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icpc->pre_save = icp_get_kvm_state;
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icpc->post_load = icp_set_kvm_state;
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2017-11-13 19:42:39 +00:00
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icpc->synchronize_state = icp_synchronize_state;
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2013-09-26 06:18:44 +00:00
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}
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static const TypeInfo icp_kvm_info = {
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.name = TYPE_KVM_ICP,
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.parent = TYPE_ICP,
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.instance_size = sizeof(ICPState),
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.class_init = icp_kvm_class_init,
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.class_size = sizeof(ICPStateClass),
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};
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/*
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* ICS-KVM
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*/
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static void ics_get_kvm_state(ICSState *ics)
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{
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uint64_t state;
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int i;
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for (i = 0; i < ics->nr_irqs; i++) {
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ICSIRQState *irq = &ics->irqs[i];
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2018-06-11 16:23:10 +00:00
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kvm_device_access(kernel_xics_fd, KVM_DEV_XICS_GRP_SOURCES,
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2018-10-17 08:26:26 +00:00
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i + ics->offset, &state, false, &error_fatal);
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2013-09-26 06:18:44 +00:00
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irq->server = state & KVM_XICS_DESTINATION_MASK;
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irq->saved_priority = (state >> KVM_XICS_PRIORITY_SHIFT)
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& KVM_XICS_PRIORITY_MASK;
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/*
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* To be consistent with the software emulation in xics.c, we
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* split out the masked state + priority that we get from the
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* kernel into 'current priority' (0xff if masked) and
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* 'saved priority' (if masked, this is the priority the
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* interrupt had before it was masked). Masking and unmasking
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* are done with the ibm,int-off and ibm,int-on RTAS calls.
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*/
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if (state & KVM_XICS_MASKED) {
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irq->priority = 0xff;
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} else {
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irq->priority = irq->saved_priority;
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}
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2017-04-27 06:31:53 +00:00
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irq->status = 0;
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2013-09-26 06:18:44 +00:00
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if (state & KVM_XICS_PENDING) {
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if (state & KVM_XICS_LEVEL_SENSITIVE) {
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irq->status |= XICS_STATUS_ASSERTED;
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} else {
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/*
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* A pending edge-triggered interrupt (or MSI)
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* must have been rejected previously when we
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* first detected it and tried to deliver it,
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* so mark it as pending and previously rejected
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* for consistency with how xics.c works.
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*/
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irq->status |= XICS_STATUS_MASKED_PENDING
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| XICS_STATUS_REJECTED;
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}
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}
|
2017-04-27 06:32:03 +00:00
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if (state & KVM_XICS_PRESENTED) {
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irq->status |= XICS_STATUS_PRESENTED;
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}
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if (state & KVM_XICS_QUEUED) {
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irq->status |= XICS_STATUS_QUEUED;
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}
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2013-09-26 06:18:44 +00:00
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}
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}
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2017-11-13 19:42:39 +00:00
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static void ics_synchronize_state(ICSState *ics)
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{
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ics_get_kvm_state(ics);
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}
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|
2013-09-26 06:18:44 +00:00
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static int ics_set_kvm_state(ICSState *ics, int version_id)
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{
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uint64_t state;
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int i;
|
2018-06-11 16:23:10 +00:00
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Error *local_err = NULL;
|
2013-09-26 06:18:44 +00:00
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for (i = 0; i < ics->nr_irqs; i++) {
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ICSIRQState *irq = &ics->irqs[i];
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int ret;
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state = irq->server;
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state |= (uint64_t)(irq->saved_priority & KVM_XICS_PRIORITY_MASK)
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<< KVM_XICS_PRIORITY_SHIFT;
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if (irq->priority != irq->saved_priority) {
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assert(irq->priority == 0xff);
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state |= KVM_XICS_MASKED;
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}
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|
2014-05-30 09:34:12 +00:00
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if (ics->irqs[i].flags & XICS_FLAGS_IRQ_LSI) {
|
2013-09-26 06:18:44 +00:00
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state |= KVM_XICS_LEVEL_SENSITIVE;
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if (irq->status & XICS_STATUS_ASSERTED) {
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state |= KVM_XICS_PENDING;
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}
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} else {
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if (irq->status & XICS_STATUS_MASKED_PENDING) {
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state |= KVM_XICS_PENDING;
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}
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}
|
2017-04-27 06:32:03 +00:00
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|
|
if (irq->status & XICS_STATUS_PRESENTED) {
|
|
|
|
state |= KVM_XICS_PRESENTED;
|
|
|
|
}
|
|
|
|
if (irq->status & XICS_STATUS_QUEUED) {
|
|
|
|
state |= KVM_XICS_QUEUED;
|
|
|
|
}
|
2013-09-26 06:18:44 +00:00
|
|
|
|
2018-06-12 10:11:35 +00:00
|
|
|
ret = kvm_device_access(kernel_xics_fd, KVM_DEV_XICS_GRP_SOURCES,
|
|
|
|
i + ics->offset, &state, true, &local_err);
|
2018-06-11 16:23:10 +00:00
|
|
|
if (local_err) {
|
2018-06-12 10:11:35 +00:00
|
|
|
error_report_err(local_err);
|
2013-09-26 06:18:44 +00:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2019-01-02 05:57:38 +00:00
|
|
|
void ics_kvm_set_irq(void *opaque, int srcno, int val)
|
2013-09-26 06:18:44 +00:00
|
|
|
{
|
|
|
|
ICSState *ics = opaque;
|
|
|
|
struct kvm_irq_level args;
|
|
|
|
int rc;
|
|
|
|
|
|
|
|
args.irq = srcno + ics->offset;
|
2014-05-30 09:34:12 +00:00
|
|
|
if (ics->irqs[srcno].flags & XICS_FLAGS_IRQ_MSI) {
|
2013-09-26 06:18:44 +00:00
|
|
|
if (!val) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
args.level = KVM_INTERRUPT_SET;
|
|
|
|
} else {
|
|
|
|
args.level = val ? KVM_INTERRUPT_SET_LEVEL : KVM_INTERRUPT_UNSET;
|
|
|
|
}
|
|
|
|
rc = kvm_vm_ioctl(kvm_state, KVM_IRQ_LINE, &args);
|
|
|
|
if (rc < 0) {
|
|
|
|
perror("kvm_irq_line");
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-06-25 09:17:16 +00:00
|
|
|
static void ics_kvm_reset(DeviceState *dev)
|
2013-09-26 06:18:44 +00:00
|
|
|
{
|
2018-06-25 09:17:16 +00:00
|
|
|
ICSStateClass *icsc = ICS_BASE_GET_CLASS(dev);
|
2014-02-13 01:08:35 +00:00
|
|
|
|
2018-06-25 09:17:16 +00:00
|
|
|
icsc->parent_reset(dev);
|
2014-05-30 09:34:14 +00:00
|
|
|
|
2018-06-25 09:17:16 +00:00
|
|
|
ics_set_kvm_state(ICS_KVM(dev), 1);
|
|
|
|
}
|
2014-02-13 01:08:35 +00:00
|
|
|
|
2018-06-25 09:17:16 +00:00
|
|
|
static void ics_kvm_reset_handler(void *dev)
|
|
|
|
{
|
|
|
|
ics_kvm_reset(dev);
|
2013-09-26 06:18:44 +00:00
|
|
|
}
|
|
|
|
|
2018-06-25 09:17:14 +00:00
|
|
|
static void ics_kvm_realize(DeviceState *dev, Error **errp)
|
2013-09-26 06:18:44 +00:00
|
|
|
{
|
2018-06-25 09:17:14 +00:00
|
|
|
ICSState *ics = ICS_KVM(dev);
|
|
|
|
ICSStateClass *icsc = ICS_BASE_GET_CLASS(ics);
|
|
|
|
Error *local_err = NULL;
|
|
|
|
|
|
|
|
icsc->parent_realize(dev, &local_err);
|
|
|
|
if (local_err) {
|
|
|
|
error_propagate(errp, local_err);
|
2013-09-26 06:18:44 +00:00
|
|
|
return;
|
|
|
|
}
|
2017-03-03 12:51:03 +00:00
|
|
|
|
2018-06-25 09:17:16 +00:00
|
|
|
qemu_register_reset(ics_kvm_reset_handler, ics);
|
2013-09-26 06:18:44 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static void ics_kvm_class_init(ObjectClass *klass, void *data)
|
|
|
|
{
|
2016-10-03 07:24:47 +00:00
|
|
|
ICSStateClass *icsc = ICS_BASE_CLASS(klass);
|
2018-06-25 09:17:14 +00:00
|
|
|
DeviceClass *dc = DEVICE_CLASS(klass);
|
|
|
|
|
2018-06-25 09:17:18 +00:00
|
|
|
device_class_set_parent_realize(dc, ics_kvm_realize,
|
|
|
|
&icsc->parent_realize);
|
|
|
|
device_class_set_parent_reset(dc, ics_kvm_reset,
|
|
|
|
&icsc->parent_reset);
|
2013-09-26 06:18:44 +00:00
|
|
|
|
|
|
|
icsc->pre_save = ics_get_kvm_state;
|
|
|
|
icsc->post_load = ics_set_kvm_state;
|
2017-11-13 19:42:39 +00:00
|
|
|
icsc->synchronize_state = ics_synchronize_state;
|
2013-09-26 06:18:44 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static const TypeInfo ics_kvm_info = {
|
2016-10-03 07:24:47 +00:00
|
|
|
.name = TYPE_ICS_KVM,
|
2018-06-25 09:17:18 +00:00
|
|
|
.parent = TYPE_ICS_BASE,
|
2013-09-26 06:18:44 +00:00
|
|
|
.instance_size = sizeof(ICSState),
|
|
|
|
.class_init = ics_kvm_class_init,
|
|
|
|
};
|
|
|
|
|
|
|
|
/*
|
|
|
|
* XICS-KVM
|
|
|
|
*/
|
|
|
|
|
2015-07-02 06:23:04 +00:00
|
|
|
static void rtas_dummy(PowerPCCPU *cpu, sPAPRMachineState *spapr,
|
2013-09-26 06:18:44 +00:00
|
|
|
uint32_t token,
|
|
|
|
uint32_t nargs, target_ulong args,
|
|
|
|
uint32_t nret, target_ulong rets)
|
|
|
|
{
|
|
|
|
error_report("pseries: %s must never be called for in-kernel XICS",
|
|
|
|
__func__);
|
|
|
|
}
|
|
|
|
|
2017-02-27 14:29:29 +00:00
|
|
|
int xics_kvm_init(sPAPRMachineState *spapr, Error **errp)
|
2013-09-26 06:18:44 +00:00
|
|
|
{
|
2017-02-27 14:29:11 +00:00
|
|
|
int rc;
|
2013-09-26 06:18:44 +00:00
|
|
|
|
|
|
|
if (!kvm_enabled() || !kvm_check_extension(kvm_state, KVM_CAP_IRQ_XICS)) {
|
|
|
|
error_setg(errp,
|
|
|
|
"KVM and IRQ_XICS capability must be present for in-kernel XICS");
|
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
|
2014-06-23 13:26:32 +00:00
|
|
|
spapr_rtas_register(RTAS_IBM_SET_XIVE, "ibm,set-xive", rtas_dummy);
|
|
|
|
spapr_rtas_register(RTAS_IBM_GET_XIVE, "ibm,get-xive", rtas_dummy);
|
|
|
|
spapr_rtas_register(RTAS_IBM_INT_OFF, "ibm,int-off", rtas_dummy);
|
|
|
|
spapr_rtas_register(RTAS_IBM_INT_ON, "ibm,int-on", rtas_dummy);
|
2013-09-26 06:18:44 +00:00
|
|
|
|
2014-06-23 13:26:32 +00:00
|
|
|
rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_SET_XIVE, "ibm,set-xive");
|
2013-09-26 06:18:44 +00:00
|
|
|
if (rc < 0) {
|
|
|
|
error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,set-xive");
|
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
|
2014-06-23 13:26:32 +00:00
|
|
|
rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_GET_XIVE, "ibm,get-xive");
|
2013-09-26 06:18:44 +00:00
|
|
|
if (rc < 0) {
|
|
|
|
error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,get-xive");
|
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
|
2014-06-23 13:26:32 +00:00
|
|
|
rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_INT_ON, "ibm,int-on");
|
2013-09-26 06:18:44 +00:00
|
|
|
if (rc < 0) {
|
|
|
|
error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,int-on");
|
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
|
2014-06-23 13:26:32 +00:00
|
|
|
rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_INT_OFF, "ibm,int-off");
|
2013-09-26 06:18:44 +00:00
|
|
|
if (rc < 0) {
|
|
|
|
error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,int-off");
|
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
|
2018-06-11 16:23:10 +00:00
|
|
|
/* Create the KVM XICS device */
|
|
|
|
rc = kvm_create_device(kvm_state, KVM_DEV_TYPE_XICS, false);
|
2013-09-26 06:18:44 +00:00
|
|
|
if (rc < 0) {
|
|
|
|
error_setg_errno(errp, -rc, "Error on KVM_CREATE_DEVICE for XICS");
|
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
|
2018-06-11 16:23:10 +00:00
|
|
|
kernel_xics_fd = rc;
|
2013-09-26 06:18:47 +00:00
|
|
|
kvm_kernel_irqchip = true;
|
|
|
|
kvm_msi_via_irqfd_allowed = true;
|
|
|
|
kvm_gsi_direct_mapping = true;
|
|
|
|
|
2018-06-11 16:23:10 +00:00
|
|
|
return 0;
|
2013-09-26 06:18:44 +00:00
|
|
|
|
|
|
|
fail:
|
|
|
|
kvmppc_define_rtas_kernel_token(0, "ibm,set-xive");
|
|
|
|
kvmppc_define_rtas_kernel_token(0, "ibm,get-xive");
|
|
|
|
kvmppc_define_rtas_kernel_token(0, "ibm,int-on");
|
|
|
|
kvmppc_define_rtas_kernel_token(0, "ibm,int-off");
|
2017-02-27 14:29:29 +00:00
|
|
|
return -1;
|
2013-09-26 06:18:44 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static void xics_kvm_register_types(void)
|
|
|
|
{
|
|
|
|
type_register_static(&ics_kvm_info);
|
|
|
|
type_register_static(&icp_kvm_info);
|
|
|
|
}
|
|
|
|
|
|
|
|
type_init(xics_kvm_register_types)
|