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75,036 Commits 11 Branches 155 Tags 352 MiB
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2 Commits

Author SHA1 Message Date
Richard Henderson
4cc16b3b92
target/riscv: Add checks for several RVC reserved operands 
C.ADDI16SP, C.LWSP, C.JR, C.ADDIW, C.LDSP all have reserved
operands that were not diagnosed.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Palmer Dabbelt <palmer@sifive.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
 2019-05-24 12:09:25 -07:00
Richard Henderson
0e68e240a9
target/riscv: Split RVC32 and RVC64 insns into separate files 
This eliminates all functions in insn_trans/trans_rvc.inc.c,
so the entire file can be removed.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Palmer Dabbelt <palmer@sifive.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
 2019-05-24 12:09:22 -07:00