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761c532ab1
Currently armv7m_load_kernel() takes the size of the block of memory where it should load the initial guest image, but assumes that it should always load it at address 0. This happens to be true of all our M-profile boards at the moment, but it isn't guaranteed to always be so: M-profile CPUs can be configured (via init-svtor and init-nsvtor, which match equivalent hardware configuration signals) to have the initial vector table at any address, not just zero. (For instance the Teeny board has the boot ROM at address 0x0200_0000.) Add a base address argument to armv7m_load_kernel(), so that callers now pass in both base address and size. All the current callers pass 0, so this is not a behaviour change. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220823160417.3858216-3-peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
85 lines
2.5 KiB
C
85 lines
2.5 KiB
C
/*
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* BBC micro:bit machine
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* http://tech.microbit.org/hardware/
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*
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* Copyright 2018 Joel Stanley <joel@jms.id.au>
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*
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* This code is licensed under the GPL version 2 or later. See
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* the COPYING file in the top-level directory.
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*/
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#include "qemu/osdep.h"
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#include "qapi/error.h"
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#include "hw/boards.h"
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#include "hw/arm/boot.h"
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#include "sysemu/sysemu.h"
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#include "exec/address-spaces.h"
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#include "hw/arm/nrf51_soc.h"
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#include "hw/i2c/microbit_i2c.h"
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#include "hw/qdev-properties.h"
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#include "qom/object.h"
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struct MicrobitMachineState {
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MachineState parent;
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NRF51State nrf51;
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MicrobitI2CState i2c;
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};
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#define TYPE_MICROBIT_MACHINE MACHINE_TYPE_NAME("microbit")
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OBJECT_DECLARE_SIMPLE_TYPE(MicrobitMachineState, MICROBIT_MACHINE)
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static void microbit_init(MachineState *machine)
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{
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MicrobitMachineState *s = MICROBIT_MACHINE(machine);
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MemoryRegion *system_memory = get_system_memory();
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MemoryRegion *mr;
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object_initialize_child(OBJECT(machine), "nrf51", &s->nrf51,
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TYPE_NRF51_SOC);
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qdev_prop_set_chr(DEVICE(&s->nrf51), "serial0", serial_hd(0));
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object_property_set_link(OBJECT(&s->nrf51), "memory",
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OBJECT(system_memory), &error_fatal);
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sysbus_realize(SYS_BUS_DEVICE(&s->nrf51), &error_fatal);
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/*
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* Overlap the TWI stub device into the SoC. This is a microbit-specific
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* hack until we implement the nRF51 TWI controller properly and the
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* magnetometer/accelerometer devices.
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*/
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object_initialize_child(OBJECT(machine), "microbit.twi", &s->i2c,
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TYPE_MICROBIT_I2C);
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sysbus_realize(SYS_BUS_DEVICE(&s->i2c), &error_fatal);
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mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->i2c), 0);
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memory_region_add_subregion_overlap(&s->nrf51.container, NRF51_TWI_BASE,
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mr, -1);
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armv7m_load_kernel(ARM_CPU(first_cpu), machine->kernel_filename,
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0, s->nrf51.flash_size);
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}
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static void microbit_machine_class_init(ObjectClass *oc, void *data)
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{
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MachineClass *mc = MACHINE_CLASS(oc);
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mc->desc = "BBC micro:bit (Cortex-M0)";
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mc->init = microbit_init;
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mc->max_cpus = 1;
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}
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static const TypeInfo microbit_info = {
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.name = TYPE_MICROBIT_MACHINE,
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.parent = TYPE_MACHINE,
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.instance_size = sizeof(MicrobitMachineState),
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.class_init = microbit_machine_class_init,
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};
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static void microbit_machine_init(void)
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{
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type_register_static(µbit_info);
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}
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type_init(microbit_machine_init);
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