Peter Maydell 2d02ac10b6 target-arm:
* target-arm: kvm: use AddressSpace-specific listener
  * aspeed: add SMC controllers
  * hw/arm/boot: allow using a command line specified dtb without a kernel
  * hw/dma/pl080: Fix bad bit mask
  * hw/intc/arm_gic_kvm: Fix build on aarch64 with some compilers
  * hw/arm/virt: fix ACPI tables for ITS
  * tests: add a m25p80 test
  * tests: cleanup ptimer-test
  * pxa2xx: Auto-assign name for i2c bus in i2c_init_bus
  * target-arm: handle tagged addresses in A64 code
  * target-arm: Fix masking of PC lower bits when doing exception returns
  * target-arm: Implement dummy MDCCINT_EL1
  * target-arm: Add trace events for the generic timers
  * hw/intc/arm_gicv3: Fix ICC register tracepoints
  * hw/char/pl011: Add trace events
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Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20161017' into staging

target-arm:
 * target-arm: kvm: use AddressSpace-specific listener
 * aspeed: add SMC controllers
 * hw/arm/boot: allow using a command line specified dtb without a kernel
 * hw/dma/pl080: Fix bad bit mask
 * hw/intc/arm_gic_kvm: Fix build on aarch64 with some compilers
 * hw/arm/virt: fix ACPI tables for ITS
 * tests: add a m25p80 test
 * tests: cleanup ptimer-test
 * pxa2xx: Auto-assign name for i2c bus in i2c_init_bus
 * target-arm: handle tagged addresses in A64 code
 * target-arm: Fix masking of PC lower bits when doing exception returns
 * target-arm: Implement dummy MDCCINT_EL1
 * target-arm: Add trace events for the generic timers
 * hw/intc/arm_gicv3: Fix ICC register tracepoints
 * hw/char/pl011: Add trace events

# gpg: Signature made Mon 17 Oct 2016 19:39:42 BST
# gpg:                using RSA key 0x3C2525ED14360CDE
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>"
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>"
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* remotes/pmaydell/tags/pull-target-arm-20161017: (25 commits)
  hw/char/pl011: Add trace events
  hw/intc/arm_gicv3: Fix ICC register tracepoints
  target-arm: Add trace events for the generic timers
  target-arm: Implement dummy MDCCINT_EL1
  Fix masking of PC lower bits when doing exception returns
  target-arm: Comments added to identify cases in a switch
  target-arm: Code changes to implement overwrite of tag field on PC load
  target-arm: Infrastucture changes to enable handling of tagged address loading into PC
  pxa2xx: Auto-assign name for i2c bus in i2c_init_bus.
  tests: cleanup ptimer-test
  tests: add a m25p80 test
  hw/arm/virt: no ITS on older machine types
  hw/arm/virt-acpi-build: fix MADT generation
  hw/intc/arm_gic_kvm: Fix build on aarch64
  hw/dma/pl080: Fix bad bit mask (PL080_CONF_M1 | PL080_CONF_M1)
  hw/arm/boot: allow using a command line specified dtb without a kernel
  aspeed: add support for the SMC segment registers
  aspeed: create mapping regions for the maximum number of slaves
  aspeed: add support for the AST2500 SoC SMC controllers
  aspeed: extend the number of host SPI controllers
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-10-17 19:41:23 +01:00
2016-10-07 14:14:06 +02:00
2016-09-23 11:42:52 +08:00
2016-10-17 19:32:44 +01:00
2016-10-13 12:58:06 +11:00
2016-10-10 15:19:20 +01:00
2016-10-10 10:39:29 +01:00
2016-10-17 19:22:17 +01:00
2016-09-23 07:07:30 +01:00
2016-10-17 19:22:17 +01:00
2016-10-13 09:25:24 +02:00
2016-10-10 15:19:20 +01:00
2012-09-07 09:02:44 +03:00
2016-10-10 13:01:43 +01:00
2014-06-16 13:24:35 +02:00
2013-09-05 09:40:31 -05:00
2016-09-23 11:42:52 +08:00
2016-10-07 13:34:07 +02:00
2016-02-04 17:41:30 +00:00
2016-09-29 14:13:39 +02:00
2016-10-07 13:34:07 +02:00
2016-02-04 17:41:30 +00:00
2016-02-04 17:41:30 +00:00
2013-10-11 09:34:56 -07:00
2016-09-16 08:12:11 -07:00
2016-09-15 15:32:22 +03:00
2016-10-13 17:23:53 +02:00
2016-05-19 16:42:30 +02:00
2016-10-10 13:01:43 +01:00
2016-09-27 11:57:29 +02:00
2016-02-04 17:41:30 +00:00
2016-02-04 17:41:30 +00:00
2016-09-20 22:10:57 +02:00
2016-10-08 11:25:29 +03:00
2016-09-16 08:12:11 -07:00
2016-02-04 17:41:30 +00:00
2016-09-16 08:12:12 -07:00
2016-09-16 08:12:11 -07:00
2016-09-05 11:38:54 +01:00
2013-10-11 09:34:56 -07:00
2016-01-29 15:07:23 +00:00
2016-02-06 20:44:10 +02:00
2016-06-16 18:39:03 +02:00

         QEMU README
         ===========

QEMU is a generic and open source machine & userspace emulator and
virtualizer.

QEMU is capable of emulating a complete machine in software without any
need for hardware virtualization support. By using dynamic translation,
it achieves very good performance. QEMU can also integrate with the Xen
and KVM hypervisors to provide emulated hardware while allowing the
hypervisor to manage the CPU. With hypervisor support, QEMU can achieve
near native performance for CPUs. When QEMU emulates CPUs directly it is
capable of running operating systems made for one machine (e.g. an ARMv7
board) on a different machine (e.g. an x86_64 PC board).

QEMU is also capable of providing userspace API virtualization for Linux
and BSD kernel interfaces. This allows binaries compiled against one
architecture ABI (e.g. the Linux PPC64 ABI) to be run on a host using a
different architecture ABI (e.g. the Linux x86_64 ABI). This does not
involve any hardware emulation, simply CPU and syscall emulation.

QEMU aims to fit into a variety of use cases. It can be invoked directly
by users wishing to have full control over its behaviour and settings.
It also aims to facilitate integration into higher level management
layers, by providing a stable command line interface and monitor API.
It is commonly invoked indirectly via the libvirt library when using
open source applications such as oVirt, OpenStack and virt-manager.

QEMU as a whole is released under the GNU General Public License,
version 2. For full licensing details, consult the LICENSE file.


Building
========

QEMU is multi-platform software intended to be buildable on all modern
Linux platforms, OS-X, Win32 (via the Mingw64 toolchain) and a variety
of other UNIX targets. The simple steps to build QEMU are:

  mkdir build
  cd build
  ../configure
  make

Additional information can also be found online via the QEMU website:

  http://qemu-project.org/Hosts/Linux
  http://qemu-project.org/Hosts/W32


Submitting patches
==================

The QEMU source code is maintained under the GIT version control system.

   git clone git://git.qemu-project.org/qemu.git

When submitting patches, the preferred approach is to use 'git
format-patch' and/or 'git send-email' to format & send the mail to the
qemu-devel@nongnu.org mailing list. All patches submitted must contain
a 'Signed-off-by' line from the author. Patches should follow the
guidelines set out in the HACKING and CODING_STYLE files.

Additional information on submitting patches can be found online via
the QEMU website

  http://qemu-project.org/Contribute/SubmitAPatch
  http://qemu-project.org/Contribute/TrivialPatches


Bug reporting
=============

The QEMU project uses Launchpad as its primary upstream bug tracker. Bugs
found when running code built from QEMU git or upstream released sources
should be reported via:

  https://bugs.launchpad.net/qemu/

If using QEMU via an operating system vendor pre-built binary package, it
is preferable to report bugs to the vendor's own bug tracker first. If
the bug is also known to affect latest upstream code, it can also be
reported via launchpad.

For additional information on bug reporting consult:

  http://qemu-project.org/Contribute/ReportABug


Contact
=======

The QEMU community can be contacted in a number of ways, with the two
main methods being email and IRC

 - qemu-devel@nongnu.org
   http://lists.nongnu.org/mailman/listinfo/qemu-devel
 - #qemu on irc.oftc.net

Information on additional methods of contacting the community can be
found online via the QEMU website:

  http://qemu-project.org/Contribute/StartHere

-- End
Description
Original Xbox Emulator for Windows, macOS, and Linux (Active Development)
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