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For rv128c shifts, a shamt of 0 is a shamt of 64, while for rv32c/rv64c it stays 0 and is a hint instruction that does not change processor state. For rv128c right shifts, the 6-bit shamt is in addition sign extended to 7 bits. Signed-off-by: Frédéric Pétrot <frederic.petrot@univ-grenoble-alpes.fr> Reviewed-by: Weiwei Li <liweiwei@iscas.ac.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220710110451.245567-1-frederic.petrot@univ-grenoble-alpes.fr> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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| .. | ||
| alpha.c | ||
| capstone.c | ||
| cris.c | ||
| hexagon.c | ||
| hppa.c | ||
| m68k.c | ||
| meson.build | ||
| microblaze.c | ||
| mips.c | ||
| nanomips.cpp | ||
| nanomips.h | ||
| nios2.c | ||
| riscv.c | ||
| sh4.c | ||
| sparc.c | ||
| xtensa.c | ||