xemu/target-mips
aurel32 c24135ffcc target-mips: fix temporary variable freeing in op_ldst_##insn()
Move tcg_temp_free() out of the conditional part to make sure
the TCG temporary variable is freed in all cases.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Acked-by: Thiemo Seufer <ths@networkno.de>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5673 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-11 11:34:30 +00:00
..
cpu.h Show size for unassigned accesses (Robert Reif) 2008-10-06 18:46:28 +00:00
exec.h Move the active FPU registers into env again, and use more TCG registers 2008-09-18 11:57:27 +00:00
helper.c Fix Xcontext fill, by Here Poussineau. 2008-09-21 21:21:26 +00:00
helper.h Less hardcoding of TARGET_USER_ONLY. 2008-07-23 16:14:22 +00:00
machine.c Change MIPS machine default to Malta. 2008-07-05 21:51:47 +00:00
mips-defs.h Support for VR5432, and some of its special instructions. Original patch 2007-12-25 20:46:56 +00:00
op_helper.c Show size for unassigned accesses (Robert Reif) 2008-10-06 18:46:28 +00:00
TODO Move the active FPU registers into env again, and use more TCG registers 2008-09-18 11:57:27 +00:00
translate_init.c Move the active FPU registers into env again, and use more TCG registers 2008-09-18 11:57:27 +00:00
translate.c target-mips: fix temporary variable freeing in op_ldst_##insn() 2008-11-11 11:34:30 +00:00