Maciej W. Rozycki e30614d517 mips: Set the CP0.Config3.DSP and CP0.Config3.DSP2P bits
Set the CP0.Config3.DSP2P bit for the 74kf processor and both that bit
and the CP0.Config3.DSP bit for the artificial mips32r5-generic and
mips64dspr2 processors.  They have the DSPr2 ASE enabled in `insn_flags'
and CPUs that implement that ASE need to have both CP0.Config3.DSP and
CP0.Config3.DSP2P set or software won't detect its presence.

Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com>
Reviewed-by: Leon Alrae <leon.alrae@imgtec.com>
[leon.alrae@imgtec.com: remove DSP flags from mips32r5-generic]
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2014-11-07 14:15:28 +00:00
2014-09-18 20:02:01 +01:00
2014-11-03 18:34:09 +00:00
2013-04-18 13:50:53 +02:00
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2014-11-04 00:02:33 +00:00
2014-11-03 11:41:48 +00:00
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2014-11-03 22:51:08 +00:00
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2014-11-04 14:40:20 +01:00
2012-09-07 09:02:44 +03:00
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2013-08-12 09:15:12 -05:00
2014-11-03 01:00:37 +03:00
2014-09-26 09:34:39 +01:00
2014-11-04 23:26:10 +01:00
2014-09-22 11:39:45 +01:00
2014-11-03 11:41:49 +00:00
2014-05-24 00:07:29 +04:00
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2014-10-31 11:29:01 +01:00
2014-06-05 16:10:33 +02:00
2014-11-05 15:21:04 +00:00
2013-10-11 09:34:56 -07:00
2014-07-07 10:37:40 +00:00

Read the documentation in qemu-doc.html or on http://wiki.qemu-project.org

- QEMU team
Description
Original Xbox Emulator for Windows, macOS, and Linux (Active Development)
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