Commit Graph

1215 Commits

Author SHA1 Message Date
Soby Mathew
04943d33cf Allow dynamic overriding of ROTPK verification
A production ROM with TBB enabled must have the ability to boot test software
before a real ROTPK is deployed (e.g. manufacturing mode). Previously the
function plat_get_rotpk_info() must return a valid ROTPK for TBB to succeed.
This patch adds an additional bit `ROTPK_NOT_DEPLOYED` in the output `flags`
parameter from plat_get_rotpk_info(). If this bit is set, then the ROTPK
in certificate is used without verifying against the platform value.

Fixes ARM-software/tf-issues#381

Change-Id: Icbbffab6bff8ed76b72431ee21337f550d8fdbbb
2016-06-03 18:27:36 +01:00
danh-arm
a7e530331d Merge pull request #632 from rockchip-linux/support-for-gpio-driver-v2
rockchip/rk3399: Support the gpio driver and configure
2016-05-27 14:10:42 +01:00
danh-arm
aa037ca9a0 Merge pull request #634 from sandrine-bailleux-arm/sb/exception-vectors
Improve robustness and readability of exception code
2016-05-27 11:11:47 +01:00
danh-arm
2ff900f28d Merge pull request #633 from soby-mathew/sm/psci_wfi_hook
PSCI: Add pwr_domain_pwr_down_wfi() hook in plat_psci_ops
2016-05-27 11:08:45 +01:00
danh-arm
8c94f82c67 Merge pull request #627 from soby-mathew/sm/fvp_ccn502_sup_1
Add CCN support to FVP
2016-05-27 11:07:20 +01:00
Caesar Wang
86c253e450 rockchip: support system off function for rk3399
if define power off gpio, BL31 will do system power off through
gpio control.
2016-05-27 09:39:56 +08:00
Caesar Wang
8867299f05 rockchip: support reset SoC through gpio for rk3399
If define a reset gpio, BL31 will use gpio to reset SOC,
otherwise use CRU reset.
2016-05-27 09:39:56 +08:00
Caesar Wang
68ff45f40a rockchip: add reset or power off gpio configuration for rk3399
We add plat parameter structs to support BL2 to pass variable-length,
variable-type parameters to BL31. The parameters are structured as a
link list. During bl31 setup time, we travse the list to process each
parameter. throuth this way, we can get the reset or power off gpio
parameter, and do hardware control in BL31. This structure also can
pass other parameter to BL31 in future.
2016-05-27 09:39:56 +08:00
Caesar Wang
9901dcf6bb rockchip: support rk3399 gpio driver
There are 5 groups of GPIO (GPIO0~GPIO4), totally have 122 GPIOs
on rk3399 platform.
The pull direction(pullup or pulldown) for all of GPIOs are
software-programmable.
At the moment, we add the gpio basic driver since reset or power off
the devices from gpio configuration for BL31.
2016-05-27 09:39:56 +08:00
Caesar Wang
195889829e gpio: support gpio set/get pull status
On some platform gpio can set/get pull status when input, add these
function so we can set/get gpio pull status when need it. And they are
optional function.
2016-05-27 09:39:56 +08:00
Sandrine Bailleux
79627dc372 Fill exception vectors with zero bytes
The documentation of the GNU assembler specifies the following about
the .align assembler directive:
 "the padding bytes are normally zero. However, on some systems, if
 the section is marked as containing code and the fill value is
 omitted, the space is filled with no-op instructions."
(see https://sourceware.org/binutils/docs/as/Align.html)

When building Trusted Firmware, the AArch64 GNU assembler uses a
mix of zero bytes and no-op instructions as the padding bytes to
align exception vectors.

This patch mandates to use zero bytes to be stored in the padding
bytes in the exception vectors. In the AArch64 instruction set, no
valid instruction encodes as zero so this effectively inserts
illegal instructions. Should this code end up being executed for
any reason, it would crash immediately. This gives us an extra
protection against misbehaving code at no extra cost.

Change-Id: I4f2abb39d0320ca0f9d467fc5af0cb92ae297351
2016-05-26 17:04:39 +01:00
Sandrine Bailleux
e0ae9fab61 Introduce some helper macros for exception vectors
This patch introduces some assembler macros to simplify the
declaration of the exception vectors. It abstracts the section
the exception code is put into as well as the alignments
constraints mandated by the ARMv8 architecture. For all TF images,
the exception code has been updated to make use of these macros.

This patch also updates some invalid comments in the exception
vector code.

Change-Id: I35737b8f1c8c24b6da89b0a954c8152a4096fa95
2016-05-26 17:04:39 +01:00
Soby Mathew
ac1cc8eb76 PSCI: Add pwr_domain_pwr_down_wfi() hook in plat_psci_ops
This patch adds a new optional platform hook `pwr_domain_pwr_down_wfi()` in
the plat_psci_ops structure. This hook allows the platform to perform platform
specific actions including the wfi invocation to enter powerdown. This hook
is invoked by both psci_do_cpu_off() and psci_cpu_suspend_start() functions.
The porting-guide.md is also updated for the same.

This patch also modifies the `psci_power_down_wfi()` function to invoke
`plat_panic_handler` incase of panic instead of the busy while loop.

Fixes ARM-Software/tf-issues#375

Change-Id: Iba104469a1445ee8d59fb3a6fdd0a98e7f24dfa3
2016-05-25 14:00:00 +01:00
Soby Mathew
7123787616 Add CCN support to FVP platform port
This patch adds support to select CCN driver for FVP during build.
A new build option `FVP_INTERCONNECT_DRIVER` is added to allow
selection between the CCI and CCN driver. Currently only the CCN-502
variant is supported on FVP.

The common ARM CCN platform helper file now verifies the cluster
count declared by platform is equal to the number of root node
masters exported by the ARM Standard platform.

Change-Id: I71d7b4785f8925ed499c153b2e9b9925fcefd57a
2016-05-25 10:25:16 +01:00
Soby Mathew
6331a31a66 CCN: Add API to query the PART0 ID from CCN
This patch adds the API `ccn_get_part0_id` to query the PART0 ID from the
PERIPHERAL_ID 0 register in the CCN driver. This ID allows to distinguish
the variant of CCN present on the system and possibly enable dynamic
configuration of the IP based on the variant. Also added an assert in
`ccn_master_to_rn_id_map()` to ensure that the master map bitfield provided
by the platform is within the expected interface id.

Change-Id: I92d2db7bd93a9be8a7fbe72a522cbcba0aba2d0e
2016-05-25 10:24:23 +01:00
danh-arm
e141aa0357 Merge pull request #625 from antonio-nino-diaz-arm/an/delay-timer-v2
Implement generic delay timer and use it on platforms
2016-05-24 16:12:08 +01:00
Antonio Nino Diaz
6704f425dd Replace Rockchip delay timer by generic one
Use the generic delay timer instead of having a specific platform
file for configuring it.

Change-Id: Ifa68b9c97cd96ae1190cee74d22d729af95e4537
2016-05-20 15:29:30 +01:00
Antonio Nino Diaz
1d0b990e9d Replace MediaTek delay timer by generic one
Use the generic delay timer instead of having a specific platform
file for configuring it.

Change-Id: If6b8f60bc04230f4b85b2bcc1b670fc65461214e
2016-05-20 15:29:30 +01:00
Antonio Nino Diaz
32cd95f094 Replace SP804 timer by generic delay timer on FVP
Added a build flag to select the generic delay timer on FVP instead
of the SP804 timer. By default, the generic one will be selected. The
user guide has been updated.

Change-Id: Ica34425c6d4ed95a187b529c612f6d3b26b78bc6
2016-05-20 15:29:30 +01:00
Antonio Nino Diaz
0bcedb2212 Implement generic delay timer
Add delay timer implementation based on the system generic counter.
This either uses the platform's implementation of
`plat_get_syscnt_freq()` or explicit clock multiplier/divider values
provided by the platform.

The current implementation of udelay has been modified to avoid
unnecessary calculations while waiting on the loop and to make it
easier to check for overflows.

Change-Id: I9062e1d506dc2f68367fd9289250b93444721732
2016-05-20 15:29:30 +01:00
Antonio Nino Diaz
f3d3b316f8 Implement plat_get_syscnt_freq2 on platforms
Replaced plat_get_syscnt_freq by plat_get_syscnt_freq2 on all
upstream platforms.

Change-Id: I3248f3f65a16dc5e9720012a05c35b9e3ba6abbe
2016-05-20 15:29:30 +01:00
Antonio Nino Diaz
d44863910c Add 32 bit version of plat_get_syscnt_freq
Added plat_get_syscnt_freq2, which is a 32 bit variant of the 64 bit
plat_get_syscnt_freq. The old one has been flagged as deprecated.
Common code has been updated to use this new version. Porting guide
has been updated.

Change-Id: I9e913544926c418970972bfe7d81ee88b4da837e
2016-05-20 15:29:03 +01:00
danh-arm
d1d716531d Merge pull request #622 from mtk09422/hw-crypt-v3
Hw crypt v3
2016-05-12 15:04:44 +01:00
Yi Zheng
7ace1cc088 MT8173: Add Sip function for MTK HW crypt driver
Change-Id: Idc40cc6243e532567ec4334ae37d97c003c90bfa
Signed-off-by: Yi Zheng <yi.zheng@mediatek.com>
2016-05-12 14:37:20 +08:00
Jimmy Huang
b659b1a755 mt8173: Reorganize plat SiP functions
Due to the changes in Mediatek platform common code, we need to move
plat related SiP functions to plat folder.

Change-Id: I6b14b988235205a5858b4bf49043bc79d0512b06
Signed-off-by: Jimmy Huang <jimmy.huang@mediatek.com>
2016-05-12 14:36:19 +08:00
danh-arm
789a6d492f Merge pull request #619 from sandrine-bailleux-arm/sb/rockchip-assertions
Rockchip: Add some debug assertions in the PMU driver
2016-05-11 10:56:25 +01:00
Sandrine Bailleux
80fb66b3e6 Rockchip: Add some debug assertions in the PMU driver
This patch adds some debug assertions ensuring that array indices
are within the bounds of the array.

Change-Id: I96ee81d14834c1e92cdfb7e60b49995cdacfd93a
2016-05-05 15:35:46 +01:00
danh-arm
8fc835775b Merge pull request #618 from rockchip-linux/fixes-for-suspend/resume
rockchip: support the suspend/resume for rk3399
2016-05-04 17:10:31 +01:00
danh-arm
2edaa749f0 Merge pull request #617 from leon-chen-mtk/refactor_common_1
Refactor MediaTek platform common code
2016-05-04 13:47:49 +01:00
Caesar Wang
f47a25ddd8 rockchip: support the suspend/resume for rk3399
This patch adds to support the suspend/resume for rk3399 SoCs.

Signed-off-by: Shengfei xu <xsf@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
2016-05-04 19:39:21 +08:00
danh-arm
fa7d172b0c Merge pull request #614 from soby-mathew/sm/rem_fvp_ve_memmap
FVP: Remove VE memory map support and change default GIC driver
2016-05-04 10:32:41 +01:00
Leon Chen
cf906b2a2e Refactor MediaTek platform common code
Refactor MediaTek platform common code for further mt6795 upstream.
2016-05-04 14:01:59 +08:00
Soby Mathew
a8af6a4d2a Change the default driver to GICv3 in FVP
This patch changes the default driver for FVP platform from the deprecated
GICv3 legacy to the GICv3 only driver. This means that the default build of
Trusted Firmware will not be able boot Linux kernel with GICv2 FDT blob. The
user guide is also updated to reflect this change of default GIC driver for
FVP.

Change-Id: Id6fc8c1ac16ad633dabb3cd189b690415a047764
2016-04-28 11:12:36 +01:00
Soby Mathew
21a3973de0 Remove support for legacy VE memory map in FVP
This patch removes support for legacy Versatile Express memory map for the
GIC peripheral in the FVP platform. The user guide is also updated for the
same.

Change-Id: Ib8cfb819083aca359e5b46b5757cb56cb0ea6533
2016-04-27 16:59:20 +01:00
danh-arm
32d4f82687 Merge pull request #597 from hzhuang1/emmc_v3.2
Emmc v3
2016-04-27 12:31:23 +01:00
Haojian Zhuang
2da3604241 drivers: add emmc stack
In a lot of embedded platforms, eMMC device is the only one storage
device. So loading content from eMMC device is required in ATF.

Create the emmc stack that could co-work with IO block driver.
Support to read/write/erase eMMC blocks on both rpmb and normal
user area. Support to change the IO speed and bus width.

Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
2016-04-27 18:52:51 +08:00
Haojian Zhuang
08b375b0f1 Document: add MAX_IO_BLOCK_DEVICES platform macro
Add MAX_IO_BLOCK_DEVICES in porting guide. It's necessary to define
this macro to support io block device. With this macro, multiple
block devices could be opened at the same time. Each block device
stores its own state.

Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
2016-04-27 18:52:40 +08:00
Haojian Zhuang
9da7a653bd IO: support block device type
FIP is accessed as memory-mapped type. eMMC is block device type.
In order to support FIP based on eMMC, add the new io_block layer.

io_block always access eMMC device as block size. And it'll only
copy the required data into buffer in io_block driver. So preparing
an temporary buffer is required.

When use io_block device, MAX_IO_BLOCK_DEVICES should be declared
in platform_def.h. It's used to support multiple block devices.

Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
2016-04-27 18:51:58 +08:00
danh-arm
4e41896387 Merge pull request #612 from sandrine-bailleux-arm/sb/fix-xlat-lib-path
Doc: Fix the path to the xlat lib
2016-04-27 09:58:56 +01:00
danh-arm
846f296238 Merge pull request #610 from bjackman/bj/fip-create-exit-code
fip_create: Fix exit status for missing output filename (2)
2016-04-27 09:40:05 +01:00
danh-arm
3992c359c2 Merge pull request #611 from sandrine-bailleux-arm/sb/fix-init_xlation_table_inner
Fix computation of L1 bitmask in the translation table lib
2016-04-27 09:38:40 +01:00
Sandrine Bailleux
3c2c72fa4c Doc: Fix the path to the xlat lib
The translation table library code has moved from lib/aarch64/ to
lib/xlat_tables/ since commit 3ca9928df but the Porting Guide still
points to the old location. This patch fixes this issue.

Change-Id: I983a9a100d70eacf6bac71725ffbb4bb5f3732b0
2016-04-27 09:29:06 +01:00
Brendan Jackman
6d9b7c1efc fip_create: Fix exit status for missing output filename
Change-Id: I0d298eea9eaf47121c87637c7395e5d9868aa272
2016-04-27 15:06:33 +08:00
Sandrine Bailleux
aa447b9c50 Fix computation of L1 bitmask in the translation table lib
This patch fixes the computation of the bitmask used to isolate
the level 1 field of a virtual address. The whole computation needs
to work on 64-bit values to produce the correct bitmask value.
XLAT_TABLE_ENTRIES_MASK being a C constant, it is a 32-bit value
so it needs to be extended to a 64-bit value before it takes part
in any other computation.

This patch fixes this bug by casting XLAT_TABLE_ENTRIES_MASK as
an unsigned long long.

Note that this bug doesn't manifest itself in practice because
address spaces larger than 39 bits are not yet supported in the
Trusted Firmware.

Change-Id: I955fd263ecb691ca94b29b9c9f576008ce1d87ee
2016-04-26 14:59:38 +01:00
danh-arm
142ff9b5f5 Merge pull request #605 from yatharth-arm/yk/sys_counter_fix
Conditionally compile `plat_get_syscnt_freq()` in ARM standard platforms
2016-04-26 14:58:57 +01:00
Yatharth Kochar
1969625afa Conditionally compile plat_get_syscnt_freq() in ARM standard platforms
This patch puts the definition of `plat_get_syscnt_freq()`
under `#ifdef ARM_SYS_CNTCTL_BASE` in arm_common.c file.
This is the fix for compilation error introduced by commit-id
`749ade4`, for platforms that use arm_common.c but do not
provide a memory mapped interface to the generic counter.

Fixes ARM-software/tf-issues#395

Change-Id: I2f2b10bd9500fa15308541ccb15829306a76a745
2016-04-26 13:58:09 +01:00
danh-arm
cf4ee1779a Merge pull request #604 from sandrine-bailleux-arm/sb/validate-psci_cpu_on_start-args
Validate psci_cpu_on_start() arguments
2016-04-25 14:52:14 +01:00
danh-arm
3f84cec51c Merge pull request #602 from rockchip-linux/fixes-for-coreboot_v1
rockchip: fixes for the required
2016-04-25 14:50:46 +01:00
danh-arm
749ade4566 Merge pull request #603 from yatharth-arm/yk/sys_counter
Move `plat_get_syscnt_freq()` to arm_common.c
2016-04-25 14:50:27 +01:00
Sandrine Bailleux
22b09c1721 Remove unused argument in psci_cpu_on_start()
The "end power level" value passed as the 3rd argument to the
psci_cpu_on_start() function is not used so this patch removes it.

Change-Id: Icaa68b8c4ecd94507287970455fbff354faaa41e
2016-04-25 12:55:45 +01:00