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25,596 Commits 73 Branches 122 Tags 709 MiB
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Author SHA1 Message Date
Unknown W. Brackets
58573cd4b4 interp: Handle invalid swizzle for vmin/vmax. 2019-04-02 07:08:33 -07:00
Unknown W. Brackets
e8c060bb5f interp: Correct vwbn and vlgb size behavior. 2019-04-02 07:08:20 -07:00
Unknown W. Brackets
89dbfd7d5b interp: Better prefixes for vdiv/similar ops. 
Turns out it does work, just uses the wrong slot like S/T after all.
These other ops must go through the a similar process.
 2019-04-02 07:07:53 -07:00
Henrik Rydgård
24cfad87d1
Merge pull request #11955 from unknownbrackets/vfpu-chunk6 
Correct prefixes for several swizzled ops, use zero for invalid
 2019-04-01 17:13:34 +02:00
Henrik Rydgård
b346142df8
Merge pull request #11954 from unknownbrackets/vfpu-chunk5 
Fix prefix and size handling for vsbx, vsocp, and integer conv ops
 2019-04-01 17:12:03 +02:00
Henrik Rydgård
3eaead8af1
Merge pull request #11956 from unknownbrackets/vfpu-chunk7 
Correct vmfvc/vmtvc decoding, prefixes on vsgn, vdot, vhdp, and matrix init
 2019-04-01 17:09:46 +02:00
Henrik Rydgård
8434ac037c
Merge pull request #11952 from unknownbrackets/vfpu-chunk4 
Fix vmfvc, vfim -nan, and improve size/swizzle on vh2f/vf2h/vrnds/vdiv
 2019-04-01 14:14:28 +02:00
Unknown W. Brackets
6f87987e7b interp: Correct prefixes on vdot/vhdp. 2019-03-31 17:12:21 -07:00
Unknown W. Brackets
b24f84d1a2 interp: Handle prefixes on matrix init ops. 2019-03-31 17:11:24 -07:00
Unknown W. Brackets
59905de719 interp: Correct vsgn out of swizzle bounds. 2019-03-31 17:10:51 -07:00
Unknown W. Brackets
85ff32eed1 interp: Handle vsgn prefixing. 
One could compare against 3 using this, it just generates zeros to compare
with.
 2019-03-31 17:10:51 -07:00
Unknown W. Brackets
a5214d0b1a Jit: Ignore high bit in vmfvc/vmtvc. 2019-03-31 17:09:55 -07:00
Unknown W. Brackets
b881a689c4 interp: Ignore high bit in vmfvc/vmtvc. 
Both 0 and 128 read/write the S prefix, for example.
 2019-03-31 17:09:55 -07:00
Unknown W. Brackets
dffa238611 interp: Handle invalid swizzle in vsge/vslt. 2019-03-31 15:05:43 -07:00
Unknown W. Brackets
dfd8094f21 interp: Implement vcrs prefixes and sizes. 
It only makes sense as triple, but it can be used as quad/single/etc. and
has consistent and sane results.
 2019-03-31 15:05:15 -07:00
Unknown W. Brackets
fa7ac7bc64 interp: Correct simple vmov variant prefixing. 2019-03-31 15:01:28 -07:00
Unknown W. Brackets
01aebe54b9 interp: Correct vdet prefix handling. 2019-03-31 15:01:11 -07:00
Unknown W. Brackets
cc58d0d3a3 interp: Correct prefixes in vsrt ops. 2019-03-31 15:00:12 -07:00
Unknown W. Brackets
f2be0cb083 interp: Correct prefixes for vsbn/vsbz. 2019-03-31 13:52:59 -07:00
Unknown W. Brackets
175ceef583 interp: Cleanup vsocp size handling. 2019-03-31 13:52:07 -07:00
Unknown W. Brackets
4a2f8a74dc interp: Correct size handling for vi2x ops. 2019-03-31 13:51:12 -07:00
Unknown W. Brackets
b75690787e interp: Correct swizzle on vx2i ops. 2019-03-31 13:51:12 -07:00
Unknown W. Brackets
68cdcba6c5 interp: Don't write lane 2 on single colorconv. 
Not that it's valid to use the op with that size anyway.
 2019-03-31 13:51:12 -07:00
Unknown W. Brackets
5736b1be2a interp: Correct some negative invalid zero cases. 
In these cases, the input value wires to +0.  Also, transposed the values
in a comment (oops.)
 2019-03-31 13:45:37 -07:00
Unknown W. Brackets
aa998b815c interp: Force vscmp result of invalid to zero. 
Some other ops do this, but mostly only that do plus or minus.
 2019-03-31 13:41:48 -07:00
Unknown W. Brackets
c7e83cd4fa interp: Correct vfim for -inf and similar. 
Was dropping the sign bit before for inf and nan.
 2019-03-31 13:41:48 -07:00
Unknown W. Brackets
5749ae09d0 interp: Correct vmfvc register behavior. 
The target and source registers were completely wrong.
 2019-03-31 13:41:48 -07:00
Unknown W. Brackets
b2e024025f interp: Handle wrong sizes of vf2h/vh2f. 
Probably not ever used, but they have consistent behavior.
 2019-03-31 13:41:48 -07:00
Unknown W. Brackets
aceb0a8244 interp: Correct vrnd prefix handling. 
We don't match random values perfectly anyway, but at least we should vary
at the right times.
 2019-03-31 13:41:48 -07:00
Unknown W. Brackets
dfc2449f35 interp: Match actual vdiv prefix handling. 2019-03-31 13:41:48 -07:00
Henrik Rydgård
8220a348b2
Merge pull request #11951 from unknownbrackets/vfpu-chunk3 
Improve vrot/vflush/matrix op prefixes improve vscmp and vmtfvc
 2019-03-31 22:26:22 +02:00
Henrik Rydgård
00ed829173
Merge pull request #11950 from unknownbrackets/vfpu-chunk2 
Correct prefixes for vbfy, vscl, vzero, vone, vidt
 2019-03-31 20:46:55 +02:00
Unknown W. Brackets
af3ed69144 interp: Mask moves to vfpu ctrl. 
These bits of the registers can't be written.
 2019-03-31 10:37:07 -07:00
Unknown W. Brackets
2a5d4e577d interp: Handle NAN more correctly in vscmp. 2019-03-31 10:37:07 -07:00
Unknown W. Brackets
db28c61272 interp: Handle flush prefixes slightly better. 2019-03-31 10:37:07 -07:00
Unknown W. Brackets
d40ac043d4 interp: Handle prefixes for Vmmov/Vmmul/Vmscl. 
I doubt any actual code uses this, but we have some tricky VFPU bugs left,
so just trying for maximum accuracy in the interpreter.
 2019-03-31 10:37:07 -07:00
Unknown W. Brackets
26b1368f7b interp: Handle vrot prefixes mostly correctly. 
Still some issues with 1/2 results and negate on swizzle.
 2019-03-31 10:37:07 -07:00
Unknown W. Brackets
8fd8dce185 interp: Use a helper to generate prefix consts. 
This makes more logical sense that using the VFPU_SWIZZLE and VFPU_ABS
macros to select the constant, although that's how the bits work.
 2019-03-31 10:33:26 -07:00
Unknown W. Brackets
b86a6af364 interp: Properly apply mask on single lane ops. 
When using something like vadd.s, we should still be applying the mask.
Mainly should only matter if masks are set in a conditional, or if games
nop out instructions.
 2019-03-31 10:13:28 -07:00
Unknown W. Brackets
1936e8c4d1 interp: Generate constants using prefixes. 
This way they properly respect negate in the S prefix.
 2019-03-31 10:13:28 -07:00
Unknown W. Brackets
0be3213151 interp: Correct vscl prefix handling. 2019-03-31 10:13:28 -07:00
Unknown W. Brackets
ec1dae57eb interp: Fix vbfy prefix handling. 2019-03-31 10:09:18 -07:00
Henrik Rydgård
2d2c0fab49
Merge pull request #11949 from unknownbrackets/vfpu-chunk1 
Skip IR for many unhandled prefixes, small interp correctness fixes
 2019-03-31 19:06:16 +02:00
Unknown W. Brackets
d5273f589a interp: Mask value in vpfxd. 
The actual register ends up with only the lower 12 bits, which makes sense
since those are the only ones that do anything.
 2019-03-31 08:23:36 -07:00
Unknown W. Brackets
9d1d4473e8 interp: Confirm vi2f/vf2i prefix handling. 2019-03-31 08:22:52 -07:00
Unknown W. Brackets
30223cb17f interp: Apply T prefix to D in vcmov. 2019-03-31 08:22:15 -07:00
Unknown W. Brackets
fef8e71b8f interp: Correct behavior for matrixes with size=1. 
Games don't (shouldn't?) actually use 1x1 matrices, but they seem to have
predictable behavior in matrix ops.
 2019-03-31 08:21:29 -07:00
Unknown W. Brackets
cfab70f149 interp: Handle abs/neg on nan values better. 
`fabsf` was altering other bits.
 2019-03-31 08:18:49 -07:00
Unknown W. Brackets
7dc775e54f IR: Use interp for unhandled prefix cases. 
The interpreter is not changed yet, so in theory this shouldn't change
behavior.
 2019-03-31 08:17:11 -07:00
Unknown W. Brackets
62928e13d8
Merge pull request #11942 from jeeeyul/master 
Fixes iOS exit freezing, Selective PTRACE syscall
 2019-03-27 19:14:34 -07:00