Henrik Rydgård
|
52cefeb5c3
|
Merge pull request #17798 from unknownbrackets/irjit-vf2ix
irjit: Implement vf2ix
|
2023-07-30 09:08:45 +02:00 |
|
Henrik Rydgård
|
88bef1b00f
|
Merge pull request #17803 from Narugakuruga/patch-24
Update zh_CN.ini
|
2023-07-30 09:06:45 +02:00 |
|
Unknown W. Brackets
|
0036f3c494
|
riscv: Implement FMin/FMax.
|
2023-07-30 00:02:10 -07:00 |
|
Unknown W. Brackets
|
8e8081c686
|
riscv: Implement VFPU compares.
|
2023-07-30 00:02:10 -07:00 |
|
Unknown W. Brackets
|
9c9330a207
|
riscv: Implement float conditional move.
|
2023-07-30 00:02:10 -07:00 |
|
Unknown W. Brackets
|
70ff18a463
|
riscv: Implement count leading zeros.
|
2023-07-30 00:02:10 -07:00 |
|
Unknown W. Brackets
|
a5671bc716
|
riscv: Add simple debug log of missed ops.
|
2023-07-30 00:02:10 -07:00 |
|
Narugakuruga
|
99d5a90898
|
Update zh_CN.ini
|
2023-07-30 14:23:21 +08:00 |
|
haorui wang
|
ec4927069e
|
1. remove some unused code
2. add some missing header
3. fix error address offset operation
|
2023-07-30 12:31:31 +08:00 |
|
Unknown W. Brackets
|
6aa4b0c5e1
|
irjit: Fix vmin/vmax nan handling.
Should be relevant to NFS MW and possibly other game bugs.
|
2023-07-29 19:13:12 -07:00 |
|
Unknown W. Brackets
|
6d4fb949c2
|
riscv: Implement float compare ops.
|
2023-07-29 19:02:15 -07:00 |
|
Unknown W. Brackets
|
6b632a103d
|
riscv: Implement FSin/similar.
|
2023-07-29 19:02:15 -07:00 |
|
Unknown W. Brackets
|
921bd2391c
|
riscv: Implement vi2s.
|
2023-07-29 19:02:15 -07:00 |
|
Unknown W. Brackets
|
e2765db4dc
|
riscv: Implement division.
|
2023-07-29 19:02:15 -07:00 |
|
Unknown W. Brackets
|
f65b6fdb20
|
riscv: Remove incomplete block check.
It shouldn't be necessary and bad things would happen anyway if it did.
|
2023-07-29 19:02:15 -07:00 |
|
Unknown W. Brackets
|
8d60c10a64
|
riscv: Use jit address offsets directly.
We'll have IR able to use block number or target offset.
|
2023-07-29 19:02:15 -07:00 |
|
Unknown W. Brackets
|
b6d2e64aca
|
Debugger: Fix disasm of ll/sc.
|
2023-07-29 18:50:09 -07:00 |
|
Unknown W. Brackets
|
9a8ac1fe08
|
x86jit: Implement ll/sc.
The point here is that breakpoints now work for ll and sc.
|
2023-07-29 18:49:45 -07:00 |
|
Unknown W. Brackets
|
e228748449
|
irjit: Add FCvtScaledSW to safely scale vi2f.
|
2023-07-29 18:30:15 -07:00 |
|
Unknown W. Brackets
|
a5a2671af3
|
irjit: Implement vf2ix.
Used in LittleBigPlanet when playing intro movies.
|
2023-07-29 18:01:08 -07:00 |
|
Unknown W. Brackets
|
f0d4267c5e
|
HLE: Reset ll/sc link on any syscall.
This seems to happen from any syscall, which makes sense.
The bit isn't cleared on an sc, but a thread switch doesn't need to occur.
|
2023-07-29 17:57:56 -07:00 |
|
Unknown W. Brackets
|
df2462b1d9
|
irjit: Implement ll/sc.
These occur more than I expected in LittleBigPlanet while loading.
|
2023-07-29 17:57:44 -07:00 |
|
Unknown W. Brackets
|
48586ed0ad
|
irjit: Combine Load32Left/Right even on unaligned.
This helps on devices that don't allow unaligned load/store.
|
2023-07-29 17:57:25 -07:00 |
|
Henrik Rydgård
|
b473f1e649
|
Merge pull request #17780 from hch12907/sdl-ttf
SDL: implement TextDrawer using SDL2_ttf
|
2023-07-29 22:51:27 +02:00 |
|
Henrik Rydgård
|
4062aa5687
|
Merge pull request #17795 from styxnix/master
Update fi_FI.ini
|
2023-07-29 20:21:23 +02:00 |
|
Jaakko Saarikko
|
c2e6ec7f7e
|
Update fi_FI.ini
Translation work on Finnish language.
|
2023-07-29 17:15:50 +03:00 |
|
Hoe Hao Cheng
|
aaa7e90174
|
SDL: fix a curious crash
|
2023-07-29 03:10:00 +08:00 |
|
Hoe Hao Cheng
|
1c890be702
|
Use common UTF8 infrastructure instead of rewriting one
|
2023-07-29 03:10:00 +08:00 |
|
Hoe Hao Cheng
|
f88d1a287e
|
SDL: implement font fallback for TextDrawerSDL
|
2023-07-29 03:09:57 +08:00 |
|
Henrik Rydgård
|
56c2974e5e
|
Merge pull request #17793 from warmenhoven/dev/warmenhoven/libretro-apple
Fix libretro build on apple platforms
|
2023-07-28 11:32:54 +02:00 |
|
Eric Warmenhoven
|
c19aa05b60
|
Fix libretro build on apple platforms
|
2023-07-28 03:37:07 -04:00 |
|
Henrik Rydgård
|
4aa2b1fcac
|
Merge pull request #17783 from unknownbrackets/riscv-jit
Implement float/vec operations in RISC-V jit
|
2023-07-28 08:38:19 +02:00 |
|
Unknown W. Brackets
|
a181f6d5b8
|
riscv: Add a comment for FMUL testing later.
|
2023-07-27 22:16:29 -07:00 |
|
Henrik Rydgård
|
bf40eae4f8
|
Merge pull request #17789 from styxnix/master
Update fi_FI.ini
|
2023-07-27 16:54:03 +02:00 |
|
Henrik Rydgård
|
7e333b8c4e
|
Merge pull request #17790 from Saramagrean/patch-5
Update th_TH.ini
|
2023-07-27 16:48:58 +02:00 |
|
Benjamin Benda Gates
|
92b6613adf
|
Update th_TH.ini
|
2023-07-27 18:42:56 +07:00 |
|
Jaakko Saarikko
|
4789656b33
|
Update fi_FI.ini
Translation work on Finnish language.
|
2023-07-26 22:44:55 +03:00 |
|
Unknown W. Brackets
|
982ce968ea
|
Merge pull request #17785 from hrydgard/naett-ndk-build-fix
Bump naett with fix for build problem on newer NDK
|
2023-07-25 22:58:48 -07:00 |
|
Henrik Rydgård
|
e478dbff3d
|
Merge pull request #17784 from unknownbrackets/arm64-round
arm64jit: When rouding unset, use nearest
|
2023-07-26 07:32:06 +02:00 |
|
Henrik Rydgård
|
2f2878687f
|
Merge pull request #17782 from unknownbrackets/net-cancel
net: Fix request cancelling
|
2023-07-26 07:30:28 +02:00 |
|
Henrik Rydgård
|
ce45c943be
|
Bump naett with fix for build problem on newer NDK
See #17583
|
2023-07-26 07:28:25 +02:00 |
|
Unknown W. Brackets
|
5122b0c78e
|
riscv: Cleanup unnecessary fcr31 func.
Don't need this, we use DYNAMIC.
|
2023-07-25 20:33:56 -07:00 |
|
Unknown W. Brackets
|
0c9dce8ba8
|
riscv: Implement vec4 dot.
|
2023-07-25 20:33:56 -07:00 |
|
Unknown W. Brackets
|
23e9dffc68
|
riscv: Implement vec4 shuffle and init.
|
2023-07-25 20:33:56 -07:00 |
|
Unknown W. Brackets
|
4e17c59cc2
|
riscv: Implement simple vec4 ops via floats.
|
2023-07-25 20:33:56 -07:00 |
|
Unknown W. Brackets
|
df313bd296
|
riscv: Fix rounding mode setting.
|
2023-07-25 20:33:56 -07:00 |
|
Unknown W. Brackets
|
9157d992ac
|
jit-ir: Implement cfc1/ctc1.
This makes it so we can track rounding mode changes.
|
2023-07-25 20:33:56 -07:00 |
|
Unknown W. Brackets
|
ca7a520a19
|
riscv: Implement FMul.
|
2023-07-25 20:33:56 -07:00 |
|
Unknown W. Brackets
|
9a9b371856
|
riscv: Implement FSign using FCLASS.
|
2023-07-25 20:33:56 -07:00 |
|
Unknown W. Brackets
|
05360d5c7a
|
riscv: Implement simplest float ops.
|
2023-07-25 20:33:56 -07:00 |
|