FEX-Emu/FEX
1
0
Fork 0
mirror of https://github.com/FEX-Emu/FEX.git synced 2024-12-16 10:27:47 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity
8,907 Commits 4 Branches 47 Tags 44 MiB
c37a12e806
Commit Graph

8907 Commits

This Branch
This Branch
All Branches
Author SHA1 Message Date
Ryan Houdek
c37a12e806
Merge pull request #3490 from Sonicadvance1/disable_assert 
Disable assert in release
 2024-03-11 15:48:18 -07:00
Ryan Houdek
ff0c7637c9
Merge pull request #3421 from pmatos/AddressingModes32 
Improve 32bit ld/st addressing mode propagation
 2024-03-11 15:20:20 -07:00
Ryan Houdek
54403e2146
Disable assert in release 
Arguments and conditional doesn't get optimized out in release builds
for the inline function call versus the define.

Was showing up an annoying amount of time when testing.
 2024-03-10 22:01:50 -07:00
Tony Wasserka
26a66790ab
Merge pull request #3486 from neobrain/fix_libfwd_accidental_copy 
Library Forwarding: Fix accidental data copying when converting from host to guest layout
 2024-03-08 12:40:44 +01:00
Mai
6d94d79409
Merge pull request #3485 from Sonicadvance1/nouveau_ioctl 
IoctlEmulation: Add missing nouveau ioctl
 2024-03-07 07:57:47 -05:00
Tony Wasserka
2359a9899c Library Forwarding: Fix accidental data copying when converting from host to guest layout 2024-03-07 10:52:13 +01:00
Ryan Houdek
aeb41e9ae2
IoctlEmulation: Add missing nouveau ioctl 
The NVIF ioctl isn't publicly described in the nouveau headers and it is
required for anything to work with Nouveau.

Pass the ioctl command through without modification and hope that this
ioctl is architecture agnostic.
 2024-03-05 16:05:13 -08:00
Tony Wasserka
b892da72f3
Merge pull request #3484 from neobrain/feature_catch2_v3 
Externals: Update Catch2 to v3.5.3
 2024-03-05 19:30:30 +01:00
Paulo Matos
a86f2d3e2c Improve 32bit constant usage in memory addressing 
Folds reg+const memory address into addressing mode,
if the constant is within 16Kb.
Update instcountci files.
Add test 32Bit_ASM/FEX_bugs/SubAddrBug.asm
 2024-03-05 14:01:32 +00:00
Tony Wasserka
6edba49784 Update Catch2 to v3.5.3 2024-03-05 12:15:29 +01:00
Ryan Houdek
ee56a2cbde
Docs: Update for release FEX-2403 2024-03-04 17:55:24 -08:00
Mai
d66a83a98f
Merge pull request #3482 from Sonicadvance1/fix_3479 
Removes steamwebhelper config
 2024-03-02 22:27:28 -05:00
Ryan Houdek
067b346e1b
Removes steamwebhelper config 
Fixes #3479

As of the Steam update on Feb 29 2024, this is no longer necessary and
actually causes steamwebhelper to abort.

Steam has started using SLR to launch steamwebhelper, which already
passes in --no-sandbox. Adding this argument twice seemingly breaks the
application since it starts complaining that it doesn't understand the
argument and closes with a SIGABRT.

With this removed Steam starts working again.
 2024-03-02 13:32:08 -08:00
Ryan Houdek
ea7d1697b1
Merge pull request #3480 from alyssarosenzweig/setf 
Use SETF8/16 for 8/16-bit INC/DEC
 2024-03-02 13:31:44 -08:00
Alyssa Rosenzweig
5fd91d34f1 InstCountCI: Update 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-03-01 19:40:53 -04:00
Alyssa Rosenzweig
11880459a5 OpcodeDispatcher: use SETF for DEC 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-03-01 19:40:53 -04:00
Alyssa Rosenzweig
0ef0bb2c97 OpcodeDispatcher: use SETF for INC 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-03-01 19:40:53 -04:00
Alyssa Rosenzweig
72edee7c6f IR: add SETF8/SETF16 ir ops 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-03-01 19:40:53 -04:00
Alyssa Rosenzweig
cb5644cf81 InstCountCI: add multi-inst 8-bit DEC cases 
would've got a bug in an earlier version of this series

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-03-01 19:38:40 -04:00
Ryan Houdek
2dd922c3ce
Merge pull request #3477 from neobrain/feature_update_vulkan 
Library Forwarding: Update Vulkan definitions to v1.3.278
 2024-03-01 10:38:14 -08:00
Alyssa Rosenzweig
b7984e8651
Merge pull request #3471 from Sonicadvance1/another_3421_bug 
ASM: Another sign extend bug in #3421
 2024-03-01 10:57:32 -04:00
Tony Wasserka
31e976a5bc Library Forwarding: Update Vulkan definitions to v1.3.278 2024-02-29 19:08:38 +01:00
Ryan Houdek
009ae55ff0
Merge pull request #3475 from alyssarosenzweig/opt/lock-dec 
Optimize lock dec
 2024-02-29 08:44:24 -08:00
Ryan Houdek
98572b9e23
Merge pull request #3473 from Sonicadvance1/remove_mov_swap 
Arm64: Stop moving source in atomic swap
 2024-02-29 08:44:16 -08:00
Alyssa Rosenzweig
1ab234f6dd InstCountCI: Update 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-02-29 09:28:21 -04:00
Alyssa Rosenzweig
fed5e6d546 OpcodeDispatcher: use fetchadd for atomic DEC 
Avoids a NEG.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-02-29 09:28:21 -04:00
Alyssa Rosenzweig
f27e2246e2
Merge pull request #3468 from alyssarosenzweig/opt/miscs 
Misc little opts
 2024-02-29 09:18:17 -04:00
Mai
4779fb74de
Merge pull request #3474 from Sonicadvance1/fix_early_exit_region_reserving 
Fix reserving range check
 2024-02-29 07:22:07 -05:00
Ryan Houdek
eaf83aa6b4
Fix reserving range check 
Fixes an issue where TestHarnessRunner was managing to reserve the space
below stack again, resulting in stack growth breaking. Would typically
only show up when using the vixl simulator under gdb for some reason.

This is likely the last bandage on this code before it gets completely
rewritten to be more readable.
 2024-02-29 04:02:05 -08:00
Ryan Houdek
4f8b28e83b
InstcountCI: Update for swap improvement 2024-02-29 03:07:19 -08:00
Ryan Houdek
c318947695
Arm64: Stop moving source in atomic swap 
ldswpal doesn't overwrite the source register and only reads the bits
required for the sized operation.
Not sure exactly why we were doing a copy here.

Removing it means improving Skyrim's hottest code block, as seen in #3472
 2024-02-29 03:07:05 -08:00
Ryan Houdek
b3489d7262
ASM: Another sign extend bug in #3421 
This time found in MGRR. It flips the problem space on its head.
 2024-02-29 02:06:57 -08:00
Alyssa Rosenzweig
44d738fa93 InstCountCI: Update 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-02-28 10:35:34 -04:00
Alyssa Rosenzweig
811487ad98 OpcodeDispatcher: use real branch for INT 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-02-28 10:35:12 -04:00
Alyssa Rosenzweig
4f4e38ace2 OpcodeDispatcher: use real branch for rep cmps 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-02-28 10:35:12 -04:00
Alyssa Rosenzweig
edd6becc56 OpcodeDispatcher: use real branch for rep scas 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-02-28 10:35:12 -04:00
Alyssa Rosenzweig
e47a94cae7 OpcodeDispatcher: skip mask with shld 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-02-28 10:18:29 -04:00
Alyssa Rosenzweig
cc82dba1ca OpcodeDispatcher: use mvn for AF with constants 
This reduces pointless constant usage. For now, it's no net change to
instcountci, but it should make it easier to get wins later. Hopefully.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-02-28 10:18:28 -04:00
Alyssa Rosenzweig
8232669b22 OpcodeDispatcher: simplify 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-02-28 10:00:13 -04:00
Alyssa Rosenzweig
28936073c4 OpcodeDispatcher: allow upper garbage on NEG 
like SUB.

due to RA silliness, this is a loss for inst count but a win for cycles.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-02-28 09:59:57 -04:00
Alyssa Rosenzweig
ef2559d911 OpcodeDispatcher: allow garbage with SCAS 
it's just feeding SUB flags which allow it

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-02-28 09:16:08 -04:00
Ryan Houdek
d24446ed13
Merge pull request #3466 from Sonicadvance1/fixed_opt 
OpcodeDispatcher: Don't use AddShift with no shift
 2024-02-28 04:51:10 -08:00
Ryan Houdek
67f13ba927
Adds sign extending address bug that was detected when testing #3421 
Doesn't quite match the libc code directly because it uses `[gs:eax]`
with both having the sign bit set and we can't deal with that with ASM
tests. So match the behaviour in a different way.
 2024-02-27 19:57:22 -08:00
Ryan Houdek
dc5239c003
InstCountCI: Update for previous fix 2024-02-27 19:57:06 -08:00
Ryan Houdek
f346f89678
OpcodeDispatcher: Don't use AddShift with no shift 
This accidentally removed optimizations elsewhere that was only checking
for Add.
 2024-02-27 19:56:12 -08:00
Ryan Houdek
2f9449cb5a
Merge pull request #3465 from alyssarosenzweig/icci/pa 
InstCountCI: enable preserve_all
 2024-02-27 16:39:46 -08:00
Ryan Houdek
139367d248
Merge pull request #3463 from Sonicadvance1/update_xxhash 
Update xxhash to v0.8.2
 2024-02-27 16:39:38 -08:00
Alyssa Rosenzweig
fcebad51bd InstCountCI: Update 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-02-27 12:04:29 -04:00
Alyssa Rosenzweig
b50292493a InstCountCI: enable preserve_all ABI 
This is what we'll actually ship (I hope), so that's the config we want to
track long-term. It's also a lot more managable resulting asm.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2024-02-27 12:03:58 -04:00
Ryan Houdek
b74de53056
Merge pull request #3449 from Sonicadvance1/syscalls_passthrough_not_json 
Linux: Converts passthrough syscalls to direct passthrough handlers
 2024-02-27 07:50:04 -08:00