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5c3021250d
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157 Commits

Author SHA1 Message Date
Alberto Garcia Illera
5c3021250d prefix cs_ to global variables to avoid link problems (#1108) 
* prefix cs_ to global variables to avoid link problems

* force Capstone to be build using MT

* fix identation
 2018-03-29 22:17:37 +08:00
Nguyen Anh Quynh
f5ee69e42b Mips64: fix the last cherry-pick on selecting getInstruction() 2017-10-09 09:26:41 +08:00
Travis Finkenauer
c1dbc8a42e Mips: Fix selection of disasm handler (#1022) 2017-10-09 08:52:53 +08:00
Alfredo Beaumont
9f6b28cc0b Add name to relative branch group in supported architectures. (#982) 2017-08-01 16:49:43 +08:00
Alfredo Beaumont
a09a81813c Relative branch group (#964) 
* Add a new group for relative branching instructions

* x86: Add relative branch group to appropiate instructions

* Rename RELATIVE_BRANCH to BRANCH_RELATIVE

* aarch64: Add relative branch group to appropiate instructions

* arm: Add relative branch group to appropiate instructions

* m68k: Add relative branch group to appropiate instructions

* mips: Add relative branch group to appropiate instructions
 2017-07-30 19:05:03 +08:00
Francesco Tamagni
1fb2b53620 Add CS_MODE_MIPS2 to opt-in for COP3 instructions (#939) 
* Add CS_MODE_MIPS2 to opt-in for COP3 instructions

* Fix indentation

* Get rid of `+`
 2017-06-27 20:56:54 +08:00
Nguyen Anh Quynh
bd2077c2d6 switch endian mode with cs_option() for Arm/Arm64/Mips/Sparc. fix issue #849 2017-02-01 11:19:00 +08:00
Nguyen Anh Quynh
84c14d177b fix merging conflict 2016-05-22 08:58:33 +08:00
Zach Riggle
91d4273021 Add missing MIPS groups 2016-05-12 10:11:00 -07:00
tandasat
45e5eab646 port Windows driver support 2016-05-11 21:48:32 -07:00
Zach Riggle
4c6d791ac8 Annotate MIPS insructions JALR and SYSCALL 
Add the appropriate MIPS_GRP_XXX groups to those instructions.
 2016-05-03 07:37:09 -07:00
Zach Riggle
5cb3fe320e Add MIPS_GRP_XXX aliases for generic types. 2016-05-03 07:30:31 -07:00
Nguyen Anh Quynh
517a0fe68e mips: remove alias_insns map 2015-06-22 15:30:25 +08:00
Nguyen Anh Quynh
2ad9eb2a43 mips: delete the alias map SUBU to NEGU. bug reported by @joelpx 2015-06-22 11:21:14 +08:00
Nguyen Anh Quynh
3dcbc07e04 mips: remove dead code reported by Coverity 2015-06-17 14:05:46 +08:00
Nguyen Anh Quynh
4a273b7e92 mips: return Fail on assert() that we ignored before 2015-06-16 14:06:34 +08:00
Nguyen Anh Quynh
c009dc6dbf mips: fix OOB issue in DecodeRegListOperand() reported by @felixgr 2015-06-16 12:29:33 +08:00
Nguyen Anh Quynh
1182d25759 simplify ARCH_group_name() by using lookup table as suggested by @learn_more. also added the missing group name for GRP_PRIVILEGE 2015-04-27 12:13:34 +08:00
Cr4sh
19ee2d10b3 inttypes.h fix 2015-03-29 21:16:38 +08:00
Nguyen Anh Quynh
efffe787d1 Add new API and start to provide access information for instruction operands 
- New API cs_regs_access() that provide registers being read & modified by instruction

- New field cs_x86_op.access provides access info (READ, WRITE) for each operand

- New field cs_x86.eflags provides EFLAGS affected by instruction

- Extend cs_detail.{regs_read, regs_write} from uint8_t to uint16_t type
 2015-03-25 15:02:13 +08:00
pancake
21b0bdd0e1 Fix indent issue 2015-03-11 00:40:14 +01:00
Nguyen Anh Quynh
037e01f942 core: remove unused Subregister indices for Sparc, PPC, SystemZ & Mips 2015-03-09 21:36:02 +08:00
Nguyen Anh Quynh
bb5dccedfa core: put insns[] into separate .inc files to make it easier to manage 2015-03-08 10:54:32 +08:00
Nguyen Anh Quynh
3c626fbb98 mips: add register operands when detail = ON in the newly added function printRegisterList() 2015-03-07 13:56:41 +08:00
Nguyen Anh Quynh
6bb255bb12 mips: remove mode CS_MODE_MIPSGP64 2015-03-07 09:47:11 +08:00
Nguyen Anh Quynh
ad42f16b14 mips: remove the confusing mode CS_MODE_MIPSGP64 2015-03-07 00:48:06 +08:00
Nguyen Anh Quynh
bfcaba5851 2015 2015-03-04 17:45:23 +08:00
Nguyen Anh Quynh
603a32e968 systemz: upgrade core 2015-03-04 13:58:07 +08:00
Nguyen Anh Quynh
2c55b81f06 mips: fix conflict when merging with 'next' branch 2015-03-04 11:29:49 +08:00
Félix Cloutier
3973d8b11e Silencing Clang warning bys casting values 
Warnings were: "Implicit conversion loses integer precision: 'size_t' to 'cs_mode'/'cs_opt_value'"
 2015-03-04 11:26:27 +08:00
Nguyen Anh Quynh
c87ccd1b89 mips: fix bugs in the last update 2015-03-02 17:31:44 +08:00
Nguyen Anh Quynh
bf88118974 Merge branch 'next' into mips 2015-03-02 15:13:40 +08:00
Nguyen Anh Quynh
cfe18ad7ca mips: update core 2015-03-02 15:12:42 +08:00
pancake
9c10ace558 Make pkg-config and source consistent with installation 2015-02-24 05:03:04 +01:00
Nguyen Anh Quynh
22278ec937 mips & xcore: some safety guards to make sure printOperand() do not overflow Operands[] for some unknown reasons 2014-11-17 22:59:24 +08:00
Nguyen Anh Quynh
0d97a3b3aa mips: CS_MODE_MIPS32R6 is an independent mode, and should not combine with CS_MODE_32 2014-11-13 11:12:52 +08:00
Marcin Bukat
921a46c38f mips: Fix j/jal target address calculation 2014-11-12 11:06:34 +01:00
Nguyen Anh Quynh
c36e675213 mips: refine getFeatureBits() to make it more clear what Mips features are supported 2014-11-12 15:57:52 +08:00
Nguyen Anh Quynh
05bd294920 mips: Mips64 does not go with Mips32R6. this fixes some 64bit instructions 2014-11-10 15:20:49 +08:00
Nguyen Anh Quynh
248519efea mips: properly handle Mips32R6 mode. bug reported by Jay Oster 2014-11-09 14:07:07 +08:00
Nguyen Anh Quynh
c2ea812ea7 fix cs_group_name() after the change on generic group ids 2014-10-31 15:36:19 +08:00
Nguyen Anh Quynh
1084f3afda mips: properly support modes MIPS32R6 & CS_MODE_MIPSGP64 2014-10-29 22:20:38 +08:00
Jay Oster
79e253c516 Remove CS_MODE_N64 
- This mode is for the so-called MIPS "N64" ABI; it has nothing to do with the Nintendo 64 game platform.
- N64, O64, et al. are just different ABIs for the 64-bit MIPS architecture, so we replace CS_MODE_N64 with the existing CS_MODE_64
 2014-10-12 16:03:12 -07:00
Nguyen Anh Quynh
c64d6292fc mips: remove MIPS_REG_PC register. reviewed by Jay Oster 2014-10-10 21:11:50 +08:00
Nguyen Anh Quynh
df92a7f346 mips: BC0F is relative branch instruction. bug reported by Pancake 2014-10-01 21:25:18 +08:00
Nguyen Anh Quynh
c96f1b06b2 x86: fix Out-of-bounds read error in is16BitEquivalent(). issue reported by Coverity 2014-10-01 14:35:29 +08:00
Nguyen Anh Quynh
9bf1b87a66 mips: fix out-of-bounds read error in Mips_reg_name(). issue reported by Coverity 2014-10-01 14:32:15 +08:00
Nguyen Anh Quynh
9d54544288 mips: verify if RegDecoder can get NULL value. issue reported by Coverity 2014-10-01 14:16:07 +08:00
Nguyen Anh Quynh
d7e42b7d36 rename all the constants marking ending from _MAX to _ENDING. this also updates Java/Python/Ocaml bindings accordingly 2014-09-29 17:15:25 +08:00
Nguyen Anh Quynh
54f8cef449 mips: add JR.HB & JALR.HB instructions. also update Ocaml/Python/Java bindings 2014-09-24 22:53:54 +08:00