Rot127
64f9729ea2
Merge branch 'auto-sync' into emit-instr-alias-enum
2023-07-29 11:17:43 +00:00
Rot127
f878c108c1
Merge pull request #25 from Rot127/fix-alias-asm-str
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Emit a space if the alias has one at the same position as well.
2023-07-29 11:16:47 +00:00
Rot127
3e211b6efc
Add branch alias and remove their instruction definition.
2023-07-29 05:21:09 -05:00
Rot127
2275ba8e5a
Don't emit the NULL entry, because it prevents extending the table manually.
2023-07-27 07:27:51 -05:00
Rot127
6431455ce0
Emit a space if the alias has one at position I as well.
2023-07-27 07:02:55 -05:00
Rot127
7bdb64d9f5
Add missing implicit defs of LR to branches. ( #24 )
2023-07-26 22:36:22 +08:00
Rot127
0c61f7b617
Merge pull request #21 from Rot127/ppc-fixes
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Fix: emit PC relative operand printers and build error fixes
2023-07-25 17:58:58 +00:00
Rot127
baf0fc2f6d
Mark LI as CodeGenOnly, so it doesn't gets in conflict with the LI alias.
2023-07-25 11:51:17 -05:00
Rot127
3d0469f29d
Change order of members so the match a name_map type
2023-07-25 11:22:19 -05:00
Rot127
0e87740745
Formatting
2023-07-24 09:00:39 -05:00
Rot127
b197966d7d
Emit Instruction Alias enums and mnemonic map.
2023-07-24 09:00:24 -05:00
Wu ChenXu
6c58194160
Merge pull request #22 from Rot127/prevent-enum-conv
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Specify the uninion member for each enum value.
2023-07-22 23:17:44 +08:00
Rot127
0d2cd6923f
Specify the uninion member for each enum value.
2023-07-22 10:09:38 -05:00
Rot127
4c8544b705
Emit decoding function for PPC for 4byte wide instr. but with 64bit value.
2023-07-20 09:24:52 -05:00
Rot127
bb0a669893
Fix: emit PC relative operand printers.
2023-07-20 08:33:59 -05:00
Wu ChenXu
f70555391e
Merge pull request #20 from Rot127/update-auto-sync
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Little ARM and README updates
2023-07-08 10:19:14 +08:00
Rot127
dd0b3b8ad2
Add writeback information to STC and LDC instructions.
2023-07-07 08:30:28 -05:00
Rot127
a1d688c4a3
Remove invalid information, clearify certain points (remove passive, simplify word choice).
2023-07-06 09:53:24 -05:00
Rot127
f27fea7211
Do not prepend a tab character before alias mnemonics
2023-07-06 07:10:08 -05:00
Wu ChenXu
292212e4db
Merge pull request #18 from Rot127/ARM-RFEI-wb
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Add writeback register and constraint to RFEI instructions.
2023-07-05 10:19:44 +08:00
Wu ChenXu
1a5cad5666
Merge pull request #19 from Rot127/ARM-fixes
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Fixes for ARM defintions
2023-07-05 10:18:56 +08:00
Rot127
e41a352a55
Add mayStore to store instructions.
2023-07-04 16:17:33 -05:00
Rot127
5a565407ca
Add writeback register and constraint to RFEI instructions.
2023-07-03 05:35:59 -05:00
Rot127
299a8b91e6
Merge pull request #16 from AngelDev06/auto-sync
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Fixed a few issues
2023-06-20 14:38:36 +00:00
AngelDev06
a89677046a
Removed extra new line and fixed a bug regarding move semantics
2023-06-20 14:46:26 +03:00
Angel
5fbb5a04d4
auto-sync opcode & operand encoding info generation ( #14 )
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* Added operand and opcode info generation
* Wrapped deprecated macro under an intellisense check
Basically intellisense fails, causing multiple errors in other files,
so when intellisense parses the code it will use the different version of the macro
* Fixed a small bug
Used double braces to prevent an old bug
2023-06-20 17:55:07 +08:00
Wu ChenXu
b47de4d17c
Merge pull request #10 from Rot127/tblgen_capstone_backends_aarch64
2023-06-18 22:35:09 +08:00
Rot127
4cbdcb33eb
Check for Target if default arguments of template functions are resolved.
2023-06-16 11:50:54 -05:00
Rot127
2d044a1ed6
Add namespaces for ARM.
2023-06-13 12:42:32 -05:00
Rot127
91f0d54c7d
Emit lookupByName functions for sys operands
2023-06-05 14:09:00 -05:00
Rot127
226b3f727a
Emit MCOperand validator.
2023-06-05 11:55:27 -05:00
Rot127
19f9586d4d
Fix missing braces warning
2023-06-04 13:21:59 -05:00
Rot127
1241c07b58
Replace System operand groups with their operand types
2023-06-03 15:03:00 -05:00
Rot127
3e5291ad63
Generate a single Enum value file for system operands.
2023-06-03 14:54:14 -05:00
Rot127
64e376e1dc
Set enum values to encodings of the sys ops
2023-06-03 14:35:09 -05:00
Rot127
da07a5a248
Generate a static RecEncodingTable
2023-06-03 14:34:31 -05:00
Rot127
c71761eb17
Add two missing op groups
2023-06-03 11:38:34 -05:00
Rot127
1aedbc2cf5
Handle default arguments of template functions.
2023-06-03 08:11:49 -05:00
Rot127
40287bf531
Handle edge case for printSVERegOp
2023-06-02 08:03:41 -05:00
Rot127
59f679e7a7
Generate additonal sys immediates and op groups.
2023-06-02 07:36:12 -05:00
Rot127
fbfaa53561
Fix syntax mistakes
2023-06-02 07:36:12 -05:00
Rot127
cbe0ab14f9
Add missing SysImm type
2023-06-02 07:36:12 -05:00
Rot127
b17901c9a3
Pass MCOp as pointer not as ref
2023-06-02 07:36:11 -05:00
Rot127
fe28fc2014
Rework C translation.
2023-06-02 07:36:11 -05:00
Rot127
37ada75258
Add namespace ids to all types and functions.
2023-06-02 07:36:11 -05:00
Rot127
ae6f7ebc92
Print undef when it needs to be printed.
2023-06-02 07:36:10 -05:00
Rot127
2f1748849b
Pass DecodeComplete as pointer not as reference
2023-06-02 07:36:10 -05:00
Rot127
69bc7d140c
Check for rename IMPLICIT_IMM operand types
2023-06-02 07:36:10 -05:00
Rot127
1d69a1b15f
Rework emitting of tables.
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The system operands are now emitted in reg, imm and aliass groups.
Also a bug was fixed which emitted incorrect code..
2023-06-02 07:36:10 -05:00
Rot127
35265a1a14
Formatting
2023-06-02 07:36:09 -05:00
