64 Commits

Author SHA1 Message Date
Michael Maitland
fa8347fbc6
[Clang][RISCV] bfloat uses 'y' instead of 'b' (#76575)
Builtins.def says that bfloat should be represented by the 'y'
character, not the 'b' character. The 'b' character is specified to
represent boolean. The implementation currently uses 'b' correctly for
boolean and incorrectly re-uses 'b' for bfloat.

This was not caught since no builtins are emitted in
build/tools/clang/include/clang/Basic/riscv_sifive_vector_builtins.inc.
Don't know that we can test this without creating builtins that expose
this issue, although I'm not sure we really want to do that.
2023-12-30 11:31:26 -05:00
Eric Biggers
09058654f6
[RISCV] Remove experimental from Vector Crypto extensions (#74213)
The RISC-V vector crypto extensions have been ratified. This patch
updates the Clang and LLVM support for these extensions to be
non-experimental, while leaving the C intrinsics as experimental since
the C intrinsics are not yet standardized.

Co-authored-by: Brandon Wu <brandon.wu@sifive.com>
2023-12-18 22:04:22 -08:00
Kazu Hirata
f3dcc2351c
[clang] Use StringRef::{starts,ends}_with (NFC) (#75149)
This patch replaces uses of StringRef::{starts,ends}with with
StringRef::{starts,ends}_with for consistency with
std::{string,string_view}::{starts,ends}_with in C++20.

I'm planning to deprecate and eventually remove
StringRef::{starts,ends}with.
2023-12-13 08:54:13 -08:00
Yueh-Ting (eop) Chen
1c93781918
Recommit "[Clang][RISCV] Introduce tuple types for RVV bfloat16 #72216" (#72370)
This PR attempts to recommit the PR (#72216) with a safe-bounded TypeID
that will not cause indeterminate results for the compiler.
2023-11-16 08:25:54 +08:00
Yueh-Ting (eop) Chen
5107a47fee
Revert "[Clang][RISCV] Introduce tuple types for RVV bfloat16 (#72216)" (#72367)
This reverts commit 8434b0b9d39b7ffcd1f7f7b5746151e293620e0d. #72216 

This commit broke the multiple buildbots, looks like the extension in
`NUM_PREDEF_TYPE_IDS` might have broken some inheriting usages, causing
indeterminate results for the compiler. Investigating the issue now.
2023-11-15 18:05:07 +08:00
Yueh-Ting (eop) Chen
8434b0b9d3
[Clang][RISCV] Introduce tuple types for RVV bfloat16 (#72216)
The first commit extends the capacity from the compiler infrastructure,
and the second commit continues the effort in #71140 to introduce tuple
types for bfloat16.
2023-11-15 13:50:14 +08:00
Shao-Ce SUN
fbdf6e2724
[RISCV] Introduce and use BF16 in Xsfvfwmaccqqq intrinsics (#71140)
BF16 implementation based on @joshua-arch1's
https://reviews.llvm.org/D152498
Fixed the incorrect f16 type introduced in
https://github.com/llvm/llvm-project/pull/68296

---------

Co-authored-by: Jun Sha (Joshua) <cooper.joshua@linux.alibaba.com>
2023-11-06 11:22:14 +08:00
Brandon Wu
74f38df1d1
[RISCV] Support Xsfvfnrclipxfqf extensions (#68297)
FP32-to-int8 Ranged Clip Instructions

https://sifive.cdn.prismic.io/sifive/0aacff47-f530-43dc-8446-5caa2260ece0_xsfvfnrclipxfqf-spec.pdf
2023-11-03 10:52:37 +08:00
Kazu Hirata
ece5dd101c [clang] Stop including llvm/ADT/StringMap.h (NFC)
These source files do not use StringMap.h.
2023-10-13 21:34:23 -07:00
4vtomat
2a05a5215f [RISCV] Support vector crypto extension C intrinsics
Depends on D141672, D138809

Differential Revision: https://reviews.llvm.org/D138810
2023-08-08 17:09:49 -07:00
4vtomat
f3ce925083 [RISCV] Resolve a few bugs in RISCVVIntrinsicUtils.cpp
This patch does a few things:
  1. Add a new type called Undefined to ScalarTypeKind.
  2. Make RVVType::applyModifier early return when encounter invalid
     ScalarType, otherwise it could be modified to "non-invalid" type in the following code.
  3. When FixedLMULType::SmallerThan is applied, the lmul should be "<" than
     specified one, so lmuls which are ">=" should be marked as invalid.

Differential Revision: https://reviews.llvm.org/D156223
2023-08-03 01:48:23 -07:00
eopXD
dd158c1b4f [Clang][RISCV] Align RVV intrinsic builtin names with the C intrinsics
Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D155102
2023-07-13 02:47:47 -07:00
Jie Fu
405889ebad [RISCV] Remove unused private field 'HasFRMRoundModeOp' in RVVIntrinsic (NFC)
/data/llvm-project/clang/include/clang/Support/RISCVVIntrinsicUtils.h:390:8: error: private field 'HasFRMRoundModeOp' is not used [-Werror,-Wunused-private-field]
  bool HasFRMRoundModeOp;
       ^
1 error generated.
2023-07-13 16:17:03 +08:00
eopXD
76482078cd [RISCV][POC] Model frm control for vfadd
Depends on D152879.

Specification PR: riscv-non-isa/rvv-intrinsic-doc#226

This patch adds variant of `vfadd` that models the rounding mode control.
The added variant has suffix `_rm` appended to differentiate from the
existing ones that does not alternate `frm` and uses whatever is inside.

The value `7` is used to indicate no rounding mode change. Reusing the
semantic from the rounding mode encoding for scalar floating-point
instructions.

Additional data member `HasFRMRoundModeOp` is added so we can append
`_rm` suffix for the fadd variants that models rounding mode control.

Additional data member `IsRVVFixedPoint` is added so we can define
pseudo instructions with rounding mode operand and distinguish the
instructions between fixed-point and floating-point.

Reviewed By: craig.topper, kito-cheng

Differential Revision: https://reviews.llvm.org/D152996
2023-07-13 00:34:00 -07:00
eopXD
5704630ec4 [RISCV] Remove redundant _ta suffix in RVV intrinsics builtins. NFC
Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D154693
2023-07-09 08:40:36 -07:00
eopXD
0e9548bbc5 [3/11][Clang][RISCV] Expand all variants for unit stride segment load
This is the 3rd patch of the patch-set. For the cover letter, please
checkout D152069.

Depends on D152070.

This patch expands all variants of unit stride segment load, including
the policy variants. This patch also fixes the trailing suffix in the
intrinsics' function name that representing the return type, adding
`x{NF}`.

Currently the tuple type co-exists with the non-tuple type intrinsics.
Since the co-existance is temporary, this patch only adds test cases of
all variants for vlseg2e32 to show the capability done.

Test cases of other data type and NF will be added in the patch-set
when the replacement happens.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D152071
2023-06-13 23:48:36 -07:00
eopXD
5847ec4deb [2/11][Clang][RISCV] Expand all variants of RVV intrinsic tuple types
This is the 2nd patch of the patch-set. For the cover letter, please
checkout D152069.

Depends on D152069.

This patch also removes redundant checks related to tuples and dedicate
the check to happen in `RVVType::verifyType`.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D152070
2023-06-13 23:45:31 -07:00
eopXD
6a097e279c [10/11][POC][Clang][RISCV] Define vget for tuple type
For the cover letter of this patch-set, please checkout D146872.

Depends on D147915.

This is the 10th patch of the patch-set.

This patch is a proof-of-concept and will be extended to full coverage
in the future. Only vget for tuple type of NF=2, EEW=32, LMUL=1 is
defined now.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D147916
2023-05-22 04:29:28 -07:00
eopXD
3814025511 [Clang][RISCV] Remove unused variable IsTuple for structure RVVIntrinsic
Signed-off by: eop Chen <eop.chen@sifive.com>
2023-05-22 03:40:12 -07:00
eopXD
0019226cee [3/11][POC][Clang][RISCV] Add typedef of the tuple type and define tuple type variant of vlseg2e32
For the cover letter of this patch-set, please checkout D146872.

Depends on D146873.

This is the 3rd patch of the patch-set. This patch originates from
D99593.

Note: This patch is a proof-of-concept and will be extended to full
coverage in the future. Currently, the old non-tuple unit-stride
segment load is not removed, and only signed integer unit-strided
segment load of NF=2, EEW=32 is defined here.

When replacing the old intrinsics, the extra `IsTuple` parameter under
various places will be redundant and removed.

Authored-by: eop Chen <eop.chen@sifive.com>
Co-Authored-by: Hsiangkai Wang <kai.wang@sifive.com>

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D147731
2023-05-22 02:51:14 -07:00
eopXD
18888ec6c5 [3/3][Clang][RISCV] Add __riscv_ for overloaded intrinsics
This commit adds prefix for the overloaded RVV intrinsics.

This is the 3rd commit of a patch-set to add __riscv_ for all RVV
intrinsics.

This follows the naming guideline under riscv-c-api-doc to add the
`__riscv_` suffix for all RVV intrinsics.

Pull Request:
riscv-non-isa/riscv-c-api-doc#31
riscv-non-isa/rvv-intrinsic-doc#189

Depends on D142644.

Reviewed By: kito-cheng

Differential Revision: https://reviews.llvm.org/D142697
2023-01-31 03:38:32 -08:00
eopXD
013c7d1f3a [2/3][Clang][RISCV] Add __riscv_ for non-overloaded intrinsics
This commit adds prefix for the non-overloaded RVV intrinsics.

This is the 2nd commit of a patch-set to add __riscv_ for all RVV
intrinsics.

This follows the naming guideline under riscv-c-api-doc to add the
`__riscv_` suffix for all RVV intrinsics.

Pull Request:
riscv-non-isa/riscv-c-api-doc#31
riscv-non-isa/rvv-intrinsic-doc#189

Depends on D142085.

Reviewed By: kito-cheng

Differential Revision: https://reviews.llvm.org/D142644
2023-01-31 02:19:28 -08:00
eopXD
a6f66d57e1 Revert "[2/3][Clang][RISCV] Add __riscv_ for non-overloaded intrinsics"
This reverts commit 2153544865a9733b06579823814c981f735e4201.
Buildbot failure https://lab.llvm.org/buildbot#builders/139/builds/35218
shows left-out test cases that were not updated.
2023-01-31 01:45:42 -08:00
eopXD
2153544865 [2/3][Clang][RISCV] Add __riscv_ for non-overloaded intrinsics
This commit adds prefix for the non-overloaded RVV intrinsics.

This is the 2nd commit of a patch-set to add __riscv_ for all RVV
intrinsics.

This follows the naming guideline under riscv-c-api-doc to add the
`__riscv_` suffix for all RVV intrinsics.

Pull Request:
riscv-non-isa/riscv-c-api-doc#31
riscv-non-isa/rvv-intrinsic-doc#189

Depends on D142085.

Reviewed By: kito-cheng

Differential Revision: https://reviews.llvm.org/D142644
2023-01-31 01:39:37 -08:00
eopXD
d94a315ee3 [Clang][RISCV] Simplify RVV intrinsic policy suffix
This patch works towards the simplification proposal [0] of Nick
Knight. After this patch, we have reduced the hierarchy of intrinsics
from two sets (non-policy and policy) into a single set, with a general
assumption that policy behavior is agnostic unless specified.

[0] https://gist.github.com/nick-knight/6cb0b74b351a25323dfb1821d3a269b9

Pull Request: riscv-non-isa/rvv-intrinsic-doc#186.

Depends on D141796.

Reviewed By: craig.topper, kito-cheng

Differential Revision: https://reviews.llvm.org/D142016
2023-01-28 03:26:05 -08:00
Douglas Yung
8700beee93 Revert "[15/15][Clang][RISCV][NFC] Set data member under Policy as constants"
This reverts commit 2b807336ad385e64a7d182d5fb67bdfe449707a3.

This change is causing Windows builds to hang and out of memory errors with clang-15:
 - https://lab.llvm.org/buildbot/#/builders/17/builds/33129
 - https://lab.llvm.org/buildbot/#/builders/174/builds/17069
 - https://lab.llvm.org/buildbot/#/builders/83/builds/28484
 - https://lab.llvm.org/buildbot/#/builders/172/builds/22803
 - https://lab.llvm.org/buildbot/#/builders/216/builds/16210
2023-01-24 12:59:15 -08:00
eopXD
2b807336ad [15/15][Clang][RISCV][NFC] Set data member under Policy as constants
The object is now correct by construction.

This is the 15th commit of a patch-set that aims to change the default policy
for RVV intrinsics from TAMU to TAMA.

Please refer to the cover letter in the 1st commit (D141573) for an
overview.

Depends on D141793.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D141796
2023-01-24 08:38:10 -08:00
eopXD
84c8bbe95a [14/15][Clang][RISCV] Change default policy from TAMU to TAMA
After this commit, the non-policy variants of `vid` and `viota` are no
longer available for an oveloaded version since the default policy is
now TAMA and the masked-off operand is removed.

Be noted that ALL RVV intrinsics now operate under the general
assumption that a policy behavior is "agnostic" unless specified.
Therefore this patch also changes the semantic of policy intrinsics
with the suffix of `_ta` and `tu`. These intrinsics don't have their
mask policy specified and was assumed to be undisturbed. It is now
changed to agnostic.

This is the 14th commit of a patch-set that aims to change the default policy
for RVV intrinsics from TAMU to TAMA.

Please refer to the cover letter in the 1st commit (D141573) for an
overview.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D141793
2023-01-24 08:31:55 -08:00
eopXD
377d2604e1 [11/15][Clang][RISCV][NFC] Remove Policy::PolicyType::Omit
The attribute can be removed now as preceding patches have removed its
users.

This is the 11th commit of a patch-set that aims to change the default policy
for RVV intrinsics from TAMU to TAMA.

Please refer to the cover letter in the 1st commit (D141573) for an
overview.

Reviewed By: craig.topper, kito-cheng

Differential Revision: https://reviews.llvm.org/D141768
2023-01-24 08:13:12 -08:00
eopXD
ecbf5db88d [6/15][Clang][RISCV][NFC] Instructions with a mask destination register is always tail agnostic
The logic under `computeBuiltinTypes` is an amendment to setting Policy as
`Omit`. The tail policy should be set to agnostic for those intrinsics that
has `HasTailPolicy = false`, which are the intrinsics with a mask destination
register.

This is the 6th commit of a patch-set that aims to change the default policy
for RVV intrinsics from TAMU to TAMA.

Please refer to the cover letter in the 1st commit (D141573) for an
overview.

Reviewed By: craig.topper, kito-cheng

Differential Revision: https://reviews.llvm.org/D141756
2023-01-24 01:08:58 -08:00
eopXD
6f0d0be567 [5/15][Clang][RISCV][NFC] Remove extra attribute Policy::IntrinsicWithoutMU by reusing HasTailPolicy and HasMaskPolicy
Righteously there shouldn't be any special cases here because
`HasTailPolicy` and `HasMaskPolicy` is able to express necessary cases.
This commit is a part of the step-by-step effort to remove
`Policy::Scheme::Omit`, which completely does not make sense in RVV 1.0
because an RVV instruction always executes with `vta` and `vma` set
to a certain value.

This is the 5th commit of a patch-set that aims to change the default policy
for RVV intrinsics from TAMU to TAMA.

Please refer to the cover letter in the 1st commit (D141573) for an
overview.

Reviewed By: craig.topper, kito-cheng

Differential Revision: https://reviews.llvm.org/D141754
2023-01-24 00:10:48 -08:00
eopXD
f8ec44b2a0 [4/15][Clang][RISCV][NFC] Remove unnecessary logic under RVVIntrinsic::computeBuiltinTypes
`PolicyAttrs::IsUnspecified` is modified in
`RVV::Intrinsic::computeBuiltInTypes` and used under
`RVVIntrinsic::updateNamesAndPolicy`. Suprisingly the modification
in `RVV::Intrinsic::computeBuiltInTypes` is completely unnecessary.
This commit removes the redundant logic.

This is the 4th commit of a patch-set that aims to change the default policy
for RVV intrinsics from TAMU to TAMA.

Please refer to the cover letter in the 1st commit (D141573) for an
overview.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D141577
2023-01-24 00:09:14 -08:00
eopXD
063802843c [3/15][Clang][RISCV][NFC] Clarify edge cases of RVVIntrinsic::getSupportedMaskedPolicies for clarity
This is the 3rd commit of a patch-set that aims to change the default policy
for RVV intrinsics from TAMU to TAMA.

Please refer to the cover letter in the 1st commit (D141573) for an
overview.

Reviewed By: kito-cheng

Differential Revision: https://reviews.llvm.org/D141575
2023-01-24 00:07:33 -08:00
eopXD
74252fb115 [2/15][Clang][RISCV][NFC] Rename Policy::IsPolicyNone to IsUnspecifed
The original naming is inaccurate. An RVV intrinsic always comes with
a corresponding policy behavior. When the policy is unspecified for an
intrinsic, its policy behavior should be it's default assumption.

This is the 2nd commit of a patch-set that aims to change the default policy
for RVV intrinsics from TAMU to TAMA.

Please refer to the cover letter in the 1st commit (D141573) for an
overview.

Reviewed By: kito-cheng

Differential Revision: https://reviews.llvm.org/D141574
2023-01-24 00:05:31 -08:00
eopXD
6244982347 [1/15][Clang][RISCV][NFC] Extract common utility to RISCVVIntrinsicUtils
This is the 1st commit of a patch-set that aims to change the default policy
for RVV intrinsics from TAMU to TAMA.

The patch-set work towards the simplification proposal [0] of Nick
Knight. After this patch-set, all intrinsics operates under a general
assumption that the policy behavior is agnostic.

You may find that most of the patches are NFC patches. They subtly remove
implicit assumptions that entangles the codebase, making the singular patch
that contains functional change clear and obvious.

In [2/15], The attribute `Policy::IsPolicyNone` may give the mis-perception
that an RVV intrinsic may operate without any policy. However this is not the
case because the policy CSR-s (`vta` and `vma`) always affect an RVV
instruction's behavior, except that some instructions have policy always set
as agnostic (e.g. instructions with a mask destination register is always
tail agnostic).

Next, to perform the change from TAMU to TAMA, we need to first remove
`Policy::PolicyType::Omit`. [4/15] ~ [12/15] removes it with NFC patches step
by step. Without the patches, directly applying [14/15] to the existing codebase
will not work because there will be complicated logics that are scattered in
places that is hard to maintain.

[1/15], [3/15] are not related to the main goal of this patch-set, they were
clean-up along the way as I was going through the codebase. [13/15] is a
clean-up that was an oversight in D141198.

Finally, [14/15] performs the functional change this patch-set aims for. The
default policy is changed from TAMU to TAMA. This affects the masked version of
the intrinsics without a policy suffix. The masked-off operand is removed. Due
to the removal, masked version of `vid` and `viota` intrinsics are no longer
available for overloading.

[15/15] is a final commit to set data members of `Policy` as constants. Through
the refactoring the class `Policy` is now correct-by-construction.

The next patch-set will be to remove redundant intrinsics with a policy suffix
`_ta` and `_tama` intrinsics are redundant and will be removed. Other policy
suffix will be renamed to adapt to the general assumption that policy is
generally agnostic.

[0] https://gist.github.com/nick-knight/6cb0b74b351a25323dfb1821d3a269b9

Pull Request: riscv-non-isa/rvv-intrinsic-doc#186

Reviewed By: craig.topper, kito-cheng

Differential Revision: https://reviews.llvm.org/D141573
2023-01-24 00:01:23 -08:00
eopXD
6b28229412 [7/7][Clang][RISCV][NFC] Remove attribute IsPrototypeDefaultTU
This is the 7th commit of a patch-set that aims to remove the
IsPrototypeDefaultTU special case for the rvv-intrinsics.

This is the final commit of the patch-set. Now that no intrinsics is
using the attribute, we are safe to remove it.

Please refer to the cover letter in the 1st commit (D140895) for an
overview.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D140954
2023-01-23 23:57:04 -08:00
eopXD
2532aa5766 [Clang][RISCV] Update operand order for vmerge and vcompress
From:
  vint32m1_t vmerge_vvm_i32m1 (vbool32_t mask, vint32m1_t op1, vint32m1_t op2, size_t vl);
  vint32m1_t vcompress_vm_i32m1 (vbool32_t mask, vint32m1_t src, size_t vl);

To:
  vint32m1_t vmerge_vvm_i32m1 (vint32m1_t op1, vint32m1_t op2, vbool32_t selector, size_t vl);
  vint32m1_t vcompress_vm_i32m1 (vint32m1_t src, vbool32_t selector, size_t vl);

Address issues:
riscv-non-isa/rvv-intrinsic-doc#140
riscv-non-isa/rvv-intrinsic-doc#167

Pull request:
riscv-non-isa/rvv-intrinsic-doc#185

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D140686
2023-01-12 17:30:50 -08:00
Kazu Hirata
9cf4419e24 [clang] Use std::optional instead of llvm::Optional (NFC)
This is part of an effort to migrate from llvm::Optional to
std::optional:

https://discourse.llvm.org/t/deprecating-llvm-optional-x-hasvalue-getvalue-getvalueor/63716
2023-01-02 15:54:57 -08:00
eopXD
1deb6bce89 [NFC][Clang][RISCV] Rename data member 'DefaultPolicy' to 'PolicyAttrs'
The naming here is strange since the value may still be updated.

Reviewed By: kito-cheng, khchen

Differential Revision: https://reviews.llvm.org/D140389
2022-12-26 22:31:05 -08:00
eopXD
904a79f991 [NFC][Clang][RISCV] Reduce for-loop with SmallVector utility
As topic, this commit reduces the for-loops with utilities of SmallVector.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D140661
2022-12-25 22:57:51 -08:00
Piyou Chen
0d4c650610 [RISCV] Refactor RVV Policy by structure
RVV intrinsic function has several policy variants.

Include TU, TA, TAMU, TAMA, TUMU, TUMA, MU, MA, TUM, TAM

Currently, the clang side enumerates these policies, but it's hard to add a new policy.

This patch use structure to replace the origin policy enumeration, and enhance some policy transform logic.

This is a clean-up job that will not affect the RVV intrinsic functionality and make sure riscv_vector_builtin_cg.inc is the same as the original one.

Reviewed By: kito-cheng

Differential Revision: https://reviews.llvm.org/D139995
2022-12-20 01:13:13 -08:00
Fangrui Song
fc6ca0d053 [clang] llvm::Optional::value => operator*/operator->
std::optional::value() has undesired exception checking semantics and is
unavailable in some older Xcode. The call sites block std::optional migration.
2022-12-17 05:15:07 +00:00
Fangrui Song
f4b90773dc llvm::Optional::value => operator*/operator->
std::optional::value() has undesired exception checking semantics and is
unavailable in some older Xcode. The call sites block std::optional migration.
2022-12-17 04:45:11 +00:00
Kazu Hirata
5891420e68 [clang] Use std::nullopt instead of None (NFC)
This patch mechanically replaces None with std::nullopt where the
compiler would warn if None were deprecated.  The intent is to reduce
the amount of manual work required in migrating from Optional to
std::optional.

This is part of an effort to migrate from llvm::Optional to
std::optional:

https://discourse.llvm.org/t/deprecating-llvm-optional-x-hasvalue-getvalue-getvalueor/63716
2022-12-03 11:54:46 -08:00
Kito Cheng
3fe89be801 [clang][RISCV][NFC] Prevent data race in RVVType::computeType
Introduce a RVVTypeCache to hold the cache instead of using a local
static variable to maintain a cache.

Also made construct of RVVType to private, make sure that could be only
created by a cache manager.

Reviewed By: sammccall

Differential Revision: https://reviews.llvm.org/D138429
2022-11-23 16:59:19 +08:00
Zakk Chen
010f329803 [RISCV][Clang] Support policy function for all vector segment load.
We will switch all UndefValue to PoisonValue in follow up patches.

Reviewed By: kito-cheng

Differential Revision: https://reviews.llvm.org/D126750
2022-08-04 17:47:24 +00:00
Zakk Chen
dffdca85ec [RISCV][Clang] Support policy functions for Vector Reduction
Instructions.

We will switch all UndefValue to PoisonValue in follow up patches.

Thanks for Kito to help on verification with their interanl testsuite.

Reviewed By: kito-cheng

Differential Revision: https://reviews.llvm.org/D126748
2022-08-02 17:27:56 +00:00
Zakk Chen
7eddeb9e99 [RISCV][Clang] Support policy functions for vmerge, vfmerge and
vcompress.

We will switch all UndefValue to PoisonValue in follow up patches.

Reviewed By: kito-cheng

Differential Revision: https://reviews.llvm.org/D126745
2022-08-02 17:27:55 +00:00
Zakk Chen
71fd66161d [RISCV][Clang] Support RVV policy functions.
1. Add policy functions support and tests for vadd, vmv, vfmv and all load
   instructions except segment load. I didn't add all combination of policy
   functions in test because it seem not to make sense.
2. Rename HasUnMaskedOverloaded to SupportOverloading.
3. vmv.s.x for ta policy could not have overloaded API.
4. This patch does not support all operations, I will have other follow-up
   patches support all.

[RFC] https://github.com/riscv-non-isa/rvv-intrinsic-doc/pull/137

Reviewed By: kito-cheng, fakepaper56, fakepaper56

Differential Revision: https://reviews.llvm.org/D126742
2022-08-01 17:32:08 +00:00
Zakk Chen
93f8657c74 [RISCV][Clang] Refactor RISCVVEmitter. (NFC)
Remove MaskedPrototype and add several fields in RVVIntrinsicRecord,
compute Prototype in runtime.

Reviewed By: rogfer01

Differential Revision: https://reviews.llvm.org/D126741
2022-07-26 10:15:04 +00:00