422419 Commits

Author SHA1 Message Date
Jonas Devlieghere
02c2b472b5
[lldb] Remove ConnectionFileDescriptorTest.Connectv(4|6)
These tests are timing out on the bots.
2022-04-28 15:40:21 -07:00
Argyrios Kyrtzidis
42823beb1d [Tooling/DependencyScanning] Make skipping excluded PP ranges during dependency scanning the default
This is to improve maintenance a bit and remove need to maintain the additional option and related code-paths.

Differential Revision: https://reviews.llvm.org/D124558
2022-04-28 15:23:03 -07:00
Mircea Trofin
49942d595f [NFC] remove const from FunctionPropertiesAnalysis::run, keep on Result
The goal in 75881d8b023e was just modifying what `Result` is, didn't
need to also modify ::run.
2022-04-28 15:10:21 -07:00
Jonas Devlieghere
9aa6a47973
[lldb] Fix crash when launching in terminal
This patch fixes a crash when using process launch -t to launch the
inferior from a TTY. The issue is that on Darwin, Host.mm is calling
ConnectionFileDescriptor::Connect without a socket_id_callback_type. The
overload passes nullptr as the function ref, which gets called
unconditionally as the socket_id_callback.

One potential way to fix this is to change all the lambdas to include a
null check, but instead I went with an empty lambda.

Differential revision: https://reviews.llvm.org/D124535
2022-04-28 14:39:28 -07:00
CHIANG, YU-HSUN (Tommy Chiang, oToToT)
4a31af88a2 [MC][AArch64] Enable '+v8a' when nothing specified for MCSubtargetInfo
Since D110065, the 'R' profile support is added to LLVM. It turns the
`generic` cpu into the intersection of v8-a and v8-r. However, this
makes some backward compatibility problems. The original patch makes
the clang driver implicitly pass -march=armv8-a when only the triple
is specified. Since it only applies to clang, other tools like
llvm-objdump still faces the backward compatibility problem.

This patch applies the same idea to MC related tools by enabling '+v8a'
feature when nothing is specified (both CPU and FS are empty) for
MCSubtargetInfo creation.

This patch should fix PR53956.

Reviewed by: labrinea

Differential Revision: https://reviews.llvm.org/D124319
2022-04-29 04:53:22 +08:00
Alexey Moksyakov
61d54259ed [BOLT] Fix r_aarch64_prelxx test
The relocation value is calculated using the formula S + A - P,
the verification of the value is performed by inversely calculating the location address

Reviewed By: Amir

Differential Revision: https://reviews.llvm.org/D124270
2022-04-28 23:52:24 +03:00
Benjamin Kramer
b8d4fe0f0a [bazel] Port 92a836da0759 2022-04-28 22:51:27 +02:00
Yuanfang Chen
0e554ebf02 [lit][unit] set the default result start and pid
In case of interrupting, there were None. Fixes PR55176.
2022-04-28 13:39:11 -07:00
David Penry
fa49021c68 Revert "[CodeGen][ARM] Enable Swing Module Scheduling for ARM"
This reverts commit 28d09bbbc3d09c912b54a4d5edb32cab7de32a6f
while I investigate a buildbot failure.
2022-04-28 13:29:27 -07:00
Simon Pilgrim
ab17ed0723 [X86] Don't fold AND(SRL(X,Y),1) -> SETCC(BT(X,Y)) on BMI2 targets
With BMI2 we have SHRX which is a lot quicker than regular x86 shifts.

Fixes #55138
2022-04-28 21:28:16 +01:00
Craig Topper
181dcbd36d [RISCV] Add riscv32 RUN lines to bittest.ll. NFC
Add extra check-prefixes to merge common results.
2022-04-28 13:02:13 -07:00
David Penry
28d09bbbc3 [CodeGen][ARM] Enable Swing Module Scheduling for ARM
This patch permits Swing Modulo Scheduling for ARM targets
turns it on by default for the Cortex-M7.  The t2Bcc
instruction is recognized as a loop-ending branch.

MachinePipeliner is extended by adding support for
"unpipelineable" instructions.  These instructions are
those which contribute to the loop exit test; in the SMS
papers they are removed before creating the dependence graph
and then inserted into the final schedule of the kernel and
prologues. Support for these instructions was not previously
necessary because current targets supporting SMS have only
supported it for hardware loop branches, which have no
loop-exit-contributing instructions in the loop body.

The current structure of the MachinePipeliner makes it difficult
to remove/exclude these instructions from the dependence graph.
Therefore, this patch leaves them in the graph, but adds a
"normalization" method which moves them in the schedule to
stage 0, which causes them to appear properly in kernel and
prologues.

It was also necessary to be more careful about boundary nodes
when iterating across successors in the dependence graph because
the loop exit branch is now a non-artificial successor to
instructions in the graph. In additional, schedules with physical
use/def pairs in the same cycle should be treated as creating an
invalid schedule because the scheduling logic doesn't respect
physical register dependence once scheduled to the same cycle.

Reviewed By: dmgreen

Differential Revision: https://reviews.llvm.org/D122672
2022-04-28 13:01:18 -07:00
River Riddle
651d9f70ed [mlir:PDLL] Fix the import of native constraints from ODS
We weren't properly returning the result of the constraint,
which leads to errors when actually trying to use the generated
C++.

Differential Revision: https://reviews.llvm.org/D124586
2022-04-28 12:58:00 -07:00
River Riddle
ebb1e900d3 [mlir:PDLL] Fix error handling of eof within a string literal
We currently aren't handling this properly, and in the case
of a string block just crash. This commit adds proper error handling
and detection for eof.

Differential Revision: https://reviews.llvm.org/D124585
2022-04-28 12:58:00 -07:00
River Riddle
32bf1f1d57 [mlir:LSP] Improve conversion between SourceMgr and LSP locations
SourceMgr generally uses 1-based locations, whereas the LSP is zero based.
This commit corrects this conversion and also enhances the conversion from SMLoc
to SMRange to support string tokens.

Differential Revision: https://reviews.llvm.org/D124584
2022-04-28 12:58:00 -07:00
River Riddle
9613a850b6 [mlir:PDL] Rework errors for pdl.operations with non-inferrable results
We currently emit an error during verification if a pdl.operation with non-inferrable
results is used within a rewrite. This allows for catching some errors during compile
time, but is slightly broken. For one, the verification at the PDL level assumes that
all dialects have been loaded, which is true at run time, but may not be true when
the PDL is generated (such as via PDLL). This commit fixes this by not emitting the
error if the operation isn't registered, i.e. it uses the `mightHave` variant of trait/interface
methods.

Secondly, we currently don't verify when a pdl.operation has no explicit results, but the
operation being created is known to expect at least one. This commit adds a heuristic
error to detect these cases when possible and fail. We can't always capture when the user
made an error, but we can capture the most common case where the user expected an
operation to infer its result types (when it actually isn't possible).

Differential Revision: https://reviews.llvm.org/D124583
2022-04-28 12:58:00 -07:00
River Riddle
d4381b3f93 [mlir:PDL] Fix a syntax ambiguity in pdl.attribute
pdl.attribute currently has a syntax ambiguity that leads to the incorrect parsing
of pdl.attribute operations with locations that don't also have a constant value. For example:

```
pdl.attribute loc("foo")
```

The above IR is treated as being a pdl.attribute with a constant value containing the location,
`loc("foo")`, which is incorrect. This commit changes the syntax to use `= <constant-value>` to
clearly distinguish when the constant value is present, as opposed to just trying to parse an attribute.

Differential Revision: https://reviews.llvm.org/D124582
2022-04-28 12:57:59 -07:00
River Riddle
92a836da07 [mlir] Attach InferTypeOpInterface on SameOperandsAndResultType operations when possible
This allows for inferring the result types of operations in certain situations by using the type of
an operand. This commit allowed for automatically supporting type inference for many more
operations with no additional effort, e.g. nearly all Arithmetic operations now support
result type inferrence with no additional changes.

Differential Revision: https://reviews.llvm.org/D124581
2022-04-28 12:57:59 -07:00
River Riddle
1bd1edaf40 [mlir:ODS] Support using attributes in AllTypesMatch to automatically add InferTypeOpInterface
This allows for using attribute types in result type inference for use with
InferTypeOpInterface. This was a TODO before, but it isn't much
additional work to properly support this. After this commit,
arith::ConstantOp can now have its InferTypeOpInterface implementation automatically
generated.

Differential Revision: https://reviews.llvm.org/D124580
2022-04-28 12:57:59 -07:00
Peter Klausler
53f775bbc0 [flang][runtime] Support B/O/Z editing of CHARACTER
This is a common extension, though semantics differ across
compilers.  I've chosen to interpret the CHARACTER data
as if it were an arbitrary-precision integer value and
format or read it as such.  This matches Intel's compilers
and nvfortran.  (GNU Fortran can't handle lengths > 1 and XLF
seems to get the enddianness wrong.)

This patch generalizes the previous implementations of
B/O/Z input and output so that they'll work for arbitrary data
in memory, and then uses them for all B/O/Z input/output,
including (now) CHARACTER.

Differential Revision: https://reviews.llvm.org/D124547
2022-04-28 12:44:31 -07:00
Mircea Trofin
75881d8b02 [NFC] const-ed the return type of FunctionPropertiesAnalysis
The result is a data bag, this makes sure it's signaled to a user that
the data can't be mutated when, for example, doing something like:

auto &R = FAM.getResult<FunctionPropertiesAnalysis>(F)
...
R.Uses++
2022-04-28 12:42:16 -07:00
Simon Pilgrim
a546b9b06b [X86] setcc.ll - add "NOTBM" check-prefix for expected common code 2022-04-28 20:41:47 +01:00
Florian Hahn
f4e1eaa375
Revert "[VPlan] Remove uneeded needsVectorIV check."
This reverts commit 43842b887e0a7b918bb2d6c9f672025b2c621f8a while I
investigate a buildbot failure.

It also reverts the follow-up commit
2883de05145fc5b4afb99b91f69ebb835af36af5.
2022-04-28 20:16:21 +01:00
Chris Lattner
99499c3ea7 [OpAsmParser] Simplify logic for requiredOperandCount in parseOperandList.
I would ideally like to eliminate 'requiredOperandCount' as a bit of
verification that should be in the client side, but it is much more
widely used than I expected.  Just tidy some pieces up around it given
we can't drop it immediately.

NFC.

Differential Revision: https://reviews.llvm.org/D124629
2022-04-28 12:05:10 -07:00
Bill Wendling
463790bfc7 [randstruct] Randomize all elements of a record
A record may have more than just FieldDecls in it. If so, then we're
likely to drop them if we only randomize the FieldDecls.

We need to be careful about anonymous structs/unions. Their fields are
made available in the RecordDecl as IndirectFieldDecls, which are listed
after the anonymous struct/union. The ordering doesn't appear to be
super important, however we place them unrandomized at the end of the
RecordDecl just in case. There's also the possiblity of
StaticAssertDecls. We also want those at the end.

All other non-FieldDecls we place at the top, just in case we get
something like:

    struct foo {
      enum e { BORK };
      enum e a;
    };

Link: https://github.com/KSPP/linux/issues/185

Reviewed By: aaron.ballman

Differential Revision: https://reviews.llvm.org/D123958
2022-04-28 12:01:11 -07:00
Dominic Chen
ce6bfd102a [libc] Support 32-bit ARM platform tests
Set LONG_DOUBLE_IS_DOUBLE, add ifdefs for 128-bit integer types

Differential Revision: https://reviews.llvm.org/D124204
2022-04-28 12:00:28 -07:00
David Tenty
8042699a30 [LLVM] Add exported visibility style for XCOFF
For the AIX linker, under default options, global or weak symbols which
have no visibility bits set to zero (i.e. no visibility, similar to ELF
default) are only exported if specified on an export list provided to
the linker. So AIX has an additional visibility style called
"exported" which indicates to the linker that the symbol should
be explicitly globally exported.

This change maps "dllexport" in the LLVM IR to correspond to XCOFF
exported as we feel this best models the intended semantic (discussion
on the discourse RFC thread: https://discourse.llvm.org/t/rfc-adding-exported-visibility-style-to-the-ir-to-model-xcoff-exported-visibility/61853)
and allows us to enable writing this visibility for the AIX target
in the assembly path.

Reviewed By: DiggerLin

Differential Revision: https://reviews.llvm.org/D123951
2022-04-28 14:56:00 -04:00
David Green
ded8187e35 [VectorCombine] Try to reduce shuffle cost for commutative reduction operands
Given a shuffle feeding a commutative reduction, the lane ordering of
the shuffle will not alter the result. This is also true if there are a
number of operations between the reduction and the shuffle, providing
they only operate lane-wise. This patch searches for cases like that in
Vector Combine, allowing us to check the cost of the shuffle vs an
in-order identity shuffle and replace the order if possible. This only
handles a single shuffle at the moment to keep things simple, and is
able to ignore splats that produce results where every result is the
same.

This is a more powerful version of a combine that already happens in
instrcombine, capable of optimizing more cases by looking through more
instructions and being able to cost the shuffle.

Differential Revision: https://reviews.llvm.org/D123494
2022-04-28 19:46:12 +01:00
Jacques Pienaar
9a4472c56c [mlir] Add basic tree-sitter grammar file
tree-sitter grammar file that tries to closely matches LangRef (it could use
some tweaking and cleanup, but kept fairly basic). Also updated LangRef in
places where found some issues while doing the nearly direct transcription.

This only adds a grammar file, not all the other parts (npm etc) that
accompanies it. Those I'll propose for separate repo like we do for vscode
extension.

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D124352
2022-04-28 11:42:46 -07:00
Biplob Mishra
c38344dd29 InstCombine: Add no-one-use tests and create thwart complexity-based canonicalization for the or-and combine tests 2022-04-28 19:24:45 +01:00
Chris Lattner
5dedf911de [AsmParser] Rework logic around "region argument parsing"
The asm parser had a notional distinction between parsing an
operand (like "%foo" or "%4#3") and parsing a region argument
(which isn't supposed to allow a result number like #3).

Unfortunately the implementation has two problems:

1) It didn't actually check for the result number and reject
   it.  parseRegionArgument and parseOperand were identical.
2) It had a lot of machinery built up around it that paralleled
   operand parsing.  This also was functionally identical, but
   also had some subtle differences (e.g. the parseOptional
   stuff had a different result type).

I thought about just removing all of this, but decided that the
missing error checking was important, so I reimplemented it with
a `allowResultNumber` flag on parseOperand.  This keeps the
codepaths unified and adds the missing error checks.

Differential Revision: https://reviews.llvm.org/D124470
2022-04-28 11:12:44 -07:00
Yitzhak Mandelbaum
6c81b57237 [clang][dataflow] Perform structural comparison of indirection values in join.
This patch changes `Environment::join`, in the case that two values at the same
location are not (pointer) equal, to structurally compare indirection values
(pointers and references) for equivalence (that is, equivalent pointees) before
resorting to merging.

This change makes join consistent with equivalence, which also performs
structural comparison. It also fixes a bug where the values are `ReferenceValue`
but the merge creates a non-reference value. This case arises when the
`ReferenceValue`s were created to represent an lvalue, so the "reference-ness"
is not reflected in the type. In this case, the pointees will always be
equivalent, because lvalues at the same code location point to the location of a
fixed declaration, whose location is itself stable across blocks.

We were unable to reproduce a unit test for this latter bug, but have verified
the fix in the context of a larger piece of code that triggers the bug.

Differential Revision: https://reviews.llvm.org/D124540
2022-04-28 17:55:09 +00:00
Alexey Bataev
1462e63f67 [OPENMP]PR53344: Emit code for final update of the inscan reduction vars in worksharing loops.
Need to emit final update of the inscan reduction variables. For
worksharing loops, the reduction values are stored in the temp array,
need to copy the last element to the original var at the end of the
construct.

Differential Revision: https://reviews.llvm.org/D121156
2022-04-28 10:41:28 -07:00
Paul Robinson
17f3a92ee5 [PS5] Default to omit leaf frame pointer 2022-04-28 10:35:14 -07:00
Alan Zhao
3333c28fc0 [llvm-ml] Improve indirect call parsing
In MASM, if a QWORD symbol is passed to a jmp or call instruction in
64-bit mode or a DWORD or WORD symbol is passed in 32-bit mode, then
MSVC's assembler recognizes that as an indirect call. Additionally, if
the operand is qualified as a ptr, then that should also be an indirect
call.

Furthermore, in 64-bit mode, such operands are implicitly rip-relative
(in fact, MSVC's assembler ml64.exe does not allow explicitly specifying
rip as a base register.)

To keep this patch managable, this patch does not include:
* error messages for wrong operand types (e.g. passing a QWORD in 32-bit
  mode)
* resolving indirect calls if the symbol is declared after it's first
  use (llvm-ml currently only runs a single pass).
* imlementing the extern keyword (required to resolve
  https://crbug.com/762167.)

This patch is likely missing a bunch of edge cases, so please do point
them out in the review.

Reviewed By: epastor, hans, MaskRay

Committed By: epastor (on behalf of ayzhao)

Differential Revision: https://reviews.llvm.org/D124413
2022-04-28 13:17:19 -04:00
Simon Pilgrim
a9215ed9cc [InstCombine][X86] simplifyDemandedVectorEltsIntrinsic - handle avx2 per-element vector shifts 2022-04-28 18:14:54 +01:00
Alexey Bataev
75e1cf4a6a [COST]Improve cost model for shuffles in SLP.
Introduced masks where they are not added and improved target dependent
cost models to avoid returning of the incorrect cost results after
adding masks.

Differential Revision: https://reviews.llvm.org/D100486
2022-04-28 10:04:41 -07:00
Paul Robinson
db013b28c3 [PS5] Defaults for -fdeclspec, -ffunction/data-sections 2022-04-28 10:03:46 -07:00
Craig Topper
ec11fbb1d6 [RISCV] Use default promotion for (i32 (shl 1, X)) on RV64 when Zbs is enabled.
This improves opportunities to use bset/bclr/binv. Unfortunately,
there are no W versions of these instrcutions so this isn't always
a clear win. If we use SLLW we get free sign extend and shift masking,
but need to put a 1 in a register and can't remove an or/xor. If
we use bset/bclr/binv we remove the immediate materializationg and
logic op, but might need a mask on the shift amount and sext.w.

Reviewed By: luismarques

Differential Revision: https://reviews.llvm.org/D124096
2022-04-28 09:58:30 -07:00
Aaron Ballman
8b68797484 Fix "not all control paths return a value" diagnostic; NFC 2022-04-28 12:57:07 -04:00
Pavel Samolysov
9197959e13 [ArgPromotion] Move ArgPart and OffsetAndArgPart to anonymous namespace
The structure ArgPart and alias OffsetAndArgPart have been moved
into the anonymous namespace. NFC.

Reviewed By: aeubanks

Differential Revision: https://reviews.llvm.org/D124617
2022-04-28 09:51:46 -07:00
Pavel Samolysov
6b825e50f7 [ArgPromotion] Change the condition to check the promotion limit
The condition should be 'ArgParts.size() > MaxElements', so that if we
have exactly 3 elements in the 'ArgParts' vector, the promotion should
be allowed because the 'MaxElement' threshold is not exceeded yet.

The default value for 'MaxElement' has been decreased to 2 in order
to avoid an actual change in argument promoting behavior. However,
this changes byval argument transformation behavior by allowing
adding not more than 2 arguments to the function instead of 3 allowed
before.

Reviewed By: aeubanks

Differential Revision: https://reviews.llvm.org/D124178
2022-04-28 09:42:58 -07:00
Bjorn Pettersson
3a39bb96ca [SelectionDAG] Use correct boolean representation in FoldConstantArithmetic
The description of SETCC says
  /// SetCC operator - This evaluates to a true value iff the condition is
  /// true.  If the result value type is not i1 then the high bits conform
  /// to getBooleanContents.

Without this patch, we sign extended the i1 to the used larger type
regardless of getBooleanContents. This resulted in miscompiles, as
shown in the attached testcase that ended up returning -1 instead of
1 when using -mattr=+v.

Fixes https://github.com/llvm/llvm-project/issues/55168

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D124618
2022-04-28 18:42:16 +02:00
Daniel Kiss
f326df34bc [libunwind][AArch64] Fix _Unwind_ForcedUnwind via sigreturn.
When the sigreturn trampoline is found the unw_proc_info_t.end_ip need to be set to
indicate a stack frame is found.

Reviewed By: cjdb, #libunwind, MaskRay

Differential Revision: https://reviews.llvm.org/D124522
2022-04-28 18:41:38 +02:00
Simon Pilgrim
6f85cb7342 [InstCombine][X86] Add exhaustive simplify demanded vector elts tests for avx2 per-element vector shifts 2022-04-28 17:41:04 +01:00
Benjamin Kramer
1fbdf3a02e [bazel] Port 84fe39a45b73 2022-04-28 18:29:43 +02:00
Peter Klausler
36771bbad1 [flang][runtime] Correct emission & reading of unterminated final records
When the last operation on a foramtted sequential or stream file (prior
to an implied or explicit ENDFILE) is a non-advancing WRITE, ensure
that any partial record data is emitted to the file without a line
terminator.  Further, when that last record is read with a non-advancing
READ, ensure that it won't raise an end-of-record condition after its
data, but instead will signal an end-of-file.

Differential Revision: https://reviews.llvm.org/D124546
2022-04-28 09:22:07 -07:00
Simon Pilgrim
9e3b7e8e65 [X86] getTargetVShiftByConstNode - use SelectionDAG::FoldConstantArithmetic to perform constant folding. NFCI.
Remove some unnecessary code duplication.
2022-04-28 17:10:20 +01:00
Alexey Bataev
ac23cf738a [COST][NFC]Add a test for non-power-2 shuffles, NFC. 2022-04-28 09:08:28 -07:00
Vitaly Buka
6e1ac68a0c [mlir] Don't iterate mutable user list
executeOp.operandsMutable().append(asyncTokens) in
addAsyncDependencyAfter can resize and invalidate iterators.

Fixes reports like https://reviews.llvm.org/P8286

Reviewed By: herhut

Differential Revision: https://reviews.llvm.org/D124577
2022-04-28 08:59:55 -07:00