Commit Graph

474395 Commits

Author SHA1 Message Date
Saiyedul Islam
0a8d17e79b
[AMDGPU] Make default AMDHSA Code Object Version to be 5 (#65410)
Also update LIT tests and docs.
For more details, see
https://llvm.org/docs/AMDGPUUsage.html#code-object-v5-metadata

Reviewed By: arsenm, jhuber6

Github PR: #65410

Differential Revision: https://reviews.llvm.org/D129818
2023-09-12 13:53:31 +05:30
Yusuke MINATO
2318bc878a
[flang][hlfir] Add hlfir.maxval intrinsic (#65705)
Adds a new HLFIR operation for the MAXVAL intrinsic according to the
design set out in flang/docs/HighLevelFIR.md.
2023-09-12 17:21:40 +09:00
David Spickett
c8387a31a4
[lldb] Format more Python files with black (#65979)
By running this from lldb/

$ black --exclude "third_party/|scripts/|utils/" ./
2023-09-12 08:46:34 +01:00
David Spickett
6bf6c4762c Reland "[lldb] Improve completion tests (#65973)"
This reverts commit 8012518f60.

The x86 register write test had one that expected "\$rax" so on.
As these patterns were previously regex, the $ had to be escaped.
Now they are just plain strings to this is not needed.
2023-09-12 08:40:43 +01:00
jeanPerier
5b6f3fcb48
[flang] Lower BIND(C) assumed length to CFI descriptor (#65950)
Outside of BIND(C), assumed length character scalar and explicit shape
are passed by address + an extra length argument (fir.boxchar in FIR).

The standard mandates that they be passed via CFI descriptor in BIND(C)
interface (fir.box in FIR). This patch fix the handling for this case.
2023-09-12 09:38:03 +02:00
martinboehme
7cf20f156f
[clang][dataflow] Eliminate RecordValue::getChild(). (#65586)
We want to eliminate the `RecordStorageLocation` from `RecordValue` and,
ultimately, eliminate `RecordValue` entirely (see the discussion linked
in the
`RecordValue` class comment). This is one step in that direction.

To eliminate `RecordValue::getChild()`, we also eliminate the last
remaining
caller, namely the `getFieldValue(const RecordValue *, ...)` overload.
Calls
to this overload have been rewritten to use the
`getFieldValue(const RecordStorageLocation *, ...)` overload. Note that
this
also makes the code slightly simpler in many cases.
2023-09-12 09:17:38 +02:00
pvanhout
2126a18d86 [AMDGPU] Regen combine-fma-add-mul-pre-legalize.mir 2023-09-12 08:50:12 +02:00
martinboehme
7f66cc7d7a
[clang][dataflow] Merge RecordValues with different locations correctly. (#65319)
Now that prvalue expressions map directly to values (see
https://reviews.llvm.org/D158977), it's no longer guaranteed that
`RecordValue`s
associated with the same expression will always have the same storage
location.

In other words, D158977 invalidated the assertion in
`mergeDistinctValues()`.
The newly added test causes this assertion to fail without the other
changes in
the patch.

This patch fixes the issue. However, the real fix will be to eliminate
the
`StorageLocation` from `RecordValue` entirely.
2023-09-12 08:43:29 +02:00
Markus Böck
cedeb31e6d
[mlir] Support null interface to base conversion (#65988)
The current implicit conversion operator from an interface to a "base
interface" of the interface unconditionally calls `this->getImpl()`
which leads to accessing a null pointer if the interface instance is a
null instance.

This PR changes the ODS generated interface instance to explicitly check
and then return a null interface instance if the `this` instance is a
null instance.
2023-09-12 08:42:47 +02:00
Matt Arsenault
cd4b906e18 RegisterCoalescer: Don't delete IMPLICIT_DEF if it's live into the same block
Live out implicit_defs need to be kept, but the check for this only
checked if the block parent was the same. This doesn't work if the
parent blocks are the same but the value is live. Fixes verifier error
"Instruction ending live segment doesn't read the register", which
would appear at the coalesced non-implicit_def def.

Fixes #38788

https://reviews.llvm.org/D158882
2023-09-12 09:28:33 +03:00
Matt Arsenault
de5585078e RegisterCoalescer: Correctly set valid lanes when keeping live out implicit defs
This fixes some verifier errors when live out implicit defs are
coalesced with identity copies. Fixes some reduced testcases from
issue #38788 but doesn't solve the original failure.

I was surprised this seems to obviate the special casing in
analyzeValue that's been there since the subregister liveness support
went in.

https://reviews.llvm.org/D158850
2023-09-12 09:28:33 +03:00
Mehdi Amini
38e9006896
Include the issue description in the subscription comment so that email notification is self-contained (#65839)
This makes it so that we don't need to open the issue to have the
description in our inbox on subscription.
2023-09-11 22:39:01 -07:00
Vitaly Buka
11c8b9c907 [hwasan] Re-enable the test with fallback
The test passes without stdc++, but we prefer to run it with stdc++ if
availibe.
2023-09-11 22:38:39 -07:00
Mehdi Amini
5f46f21921
Update the developer policy information on "Stay Informed" to refer to GitHub teams (#65798) 2023-09-11 22:21:47 -07:00
Daniil Dudkin
8a6e54c9b3
[mlir][arith] Rename operations: maxfmaximumf, minfminimumf (#65800)
This patch is part of a larger initiative aimed at fixing floating-point `max` and `min` operations in MLIR: https://discourse.llvm.org/t/rfc-fix-floating-point-max-and-min-operations-in-mlir/72671.

This commit addresses Task 1.2 of the mentioned RFC. By renaming these operations, we align their names with LLVM intrinsics that have corresponding semantics.
2023-09-11 22:02:19 -07:00
Fangrui Song
c5ccae4f18 [ELF][test] Make tests less sensitive of addresses/number of sections 2023-09-11 21:01:36 -07:00
LLVM GN Syncbot
0994463271 [gn build] Port e7a45c6d76 2023-09-12 03:47:48 +00:00
LLVM GN Syncbot
e13bbb9b3b [gn build] Port ce5652c78a 2023-09-12 03:47:47 +00:00
LLVM GN Syncbot
d0ebca9e77 [gn build] Port a284d0cc9c 2023-09-12 03:47:47 +00:00
LLVM GN Syncbot
7fdabfd69c [gn build] Port 0e30dd44ad 2023-09-12 03:47:46 +00:00
Ye Luo
6c8248e38b [libomptarget] Rename AMDGPUSignalTy member Signal to HSASignal. 2023-09-11 22:42:34 -05:00
Zhangyin
ed29f275bf [libcxx] <experimental/simd> Add broadcast constructor of class simd/simd_mask
Reviewed By: #libc, philnik

Differential Revision: https://reviews.llvm.org/D156225
2023-09-12 11:41:49 +08:00
Zhangyin
e7a45c6d76 [libcxx] <experimental/simd> Added internal storage type, constructors, subscript operators of class simd/simd_mask and related tests
[libcxx] <experimental/simd> Added internal storage type for class simd/simd_mask
[libcxx] <experimental/simd> Added all constructors of class simd/simd_mask and related tests
[libcxx] <experimental/simd> Added basic simd reference implementation, subscript operators of class simd/simd_mask and related tests

Reviewed By: #libc, philnik

Differential Revision: https://reviews.llvm.org/D144364
2023-09-12 11:41:46 +08:00
Zhangyin
a284d0cc9c [libcxx] <experimental/simd> Added aliagned flag types, traits is_simd_flag_type[_v], memory_alignment[_v] and related tests
Reviewed By: #libc, philnik

Differential Revision: https://reviews.llvm.org/D153319
2023-09-12 11:41:44 +08:00
Zhangyin
ce5652c78a [libcxx] <experimental/simd> Added simd width functions, simd_size traits and related tests
Reviewed By: #libc, philnik

Differential Revision: https://reviews.llvm.org/D144363
2023-09-12 11:41:42 +08:00
Zhangyin
0e30dd44ad [libcxx] <experimental/simd> Add ABI tags, class template simd/simd_mask implementations. Add related simd traits and tests.
[libcxx] <experimental/simd> Add ABI tags, class template simd/simd_mask implementations.
[libcxx] <experimental/simd> Add traits is_abi_tag[_v], is_simd[_v] and is_simd_mask[_v].
[libcxx] <experimental/simd> Add related tests.

Reviewed By: #libc, philnik

Differential Revision: https://reviews.llvm.org/D144362
2023-09-12 11:41:40 +08:00
Zhangyin
3e14076c76 [libcxx] <experimental/simd> Removed original implementations and tests
Reviewed By: #libc, philnik

Differential Revision: https://reviews.llvm.org/D144698
2023-09-12 11:41:38 +08:00
Ye Luo
08352b99a4 [libomptarget][NFC] update comments. 2023-09-11 22:30:25 -05:00
Wang Pengcheng
94a75294ce
[InlineAsm] Add constraint A to getMemConstraintName (#65292)
We will get an assertion of 'Unknown memory constraint' when we dump
`MachineOperand` with constraint A.
2023-09-12 11:24:30 +08:00
Takuya Shimizu
72f6abb9bc [clang][Sema] Fix format size estimator's handling of %o, %x, %X with alternative form
The wrong handling of %x specifier with alternative form causes a false positive in linux kernel (https://github.com/ClangBuiltLinux/linux/issues/1923#issuecomment-1696075886)

The kernel code: 651a00bc56/drivers/media/pci/cx18/cx18-mailbox.c (L99)

This patch fixes this handling, and also adds some standard wordings as comments to clarify the reason.

Reviewed By: nickdesaulniers
Differential Revision: https://reviews.llvm.org/D159138
2023-09-12 12:22:26 +09:00
Petr Hosek
10e1c4a02b
[Fuchsia] Support building runtimes for RISC-V on Linux (#66025)
We support RISC-V on Linux as the host platform for Fuchsia.
2023-09-11 20:20:24 -07:00
liqin.weng
1eec357494 [VP] IR expansion for maxnum/minnum
Add basic handling for VP ops that can expand to non-predicate ops

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D159494
2023-09-12 10:15:52 +08:00
Fangrui Song
2bdf5aa5df [Driver] Properly report error for unsupported powerpc darwin/macos triples
The removal started at https://reviews.llvm.org/D50989 and
https://reviews.llvm.org/D75494 removed the Triple support. Without recognizing
Darwin triples as Mach-O, we will get assertion error in ToolChains/Darwin.h due
to the universal binary mechanism.

Fix #47698

---

This requires fixing many misuses of llc -march= and llvm-mc -arch= (
commits 806761a762 and 252c42354e).
2023-09-11 18:53:51 -07:00
zhanglimin
ec42c78cc4 [sanitizer][msan] VarArgHelper for loongarch64
This patch adds support for variadic argument for loongarch64,
which is based on MIPS64. And `check-msan` all pass.

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D158587
2023-09-12 09:51:18 +08:00
Louis Dionne
1d7cec6adc [libc++] Fix broken test in C++03 mode 2023-09-11 21:13:35 -04:00
Konstantina Mitropoulou
798f2465f3 [NewGVN] Decrement UseCount only if SSA copy has one use
Committing on behalf of @vladimirradosavljevic (Vladimir Radosavljevic)

Differential Revision : https: // reviews.llvm.org/D157267
2023-09-11 18:08:14 -07:00
Ben Barham
4c264c26d7
[Parse] Split incremental-extensions (#65683)
The preprocessor `IncrementalProcessing` option was being used to
control whether or not to teardown the lexer or run the end of
translation unit action. In D127284 this was merged with
`-fincremental-extensions`, which also changes top level parsing.

Split these again so that the former behavior can be achieved without
the latter (ie. to allow managing lifetime without also changing
parsing).

Resolves rdar://113406310.
2023-09-11 17:40:43 -07:00
Vitaly Buka
8ee0874eca [test][hwasan] Fix UNSUPPORTED condition 2023-09-11 17:37:02 -07:00
Vitaly Buka
8b3ba143b0 [test][hwasan] Disable the test as it fails on Arm as well 2023-09-11 17:29:11 -07:00
Jason Molenda
2cab996192 Add "process metadata" Mach-O LC_NOTE for corefiles
Add a new LC_NOTE for Mach-O corefiles, "proces metadata", which is a
JSON string.  Currently there may be a `threads` key in the JSON,
and if `threads` is present, it is an array with the same number of
elements as there are LC_THREADs in the corefile.  This patch adds
support for a `thread_id` key-value for each `thread` entry, to
supply a thread ID for that LC_THREAD.

Differential Revision: https://reviews.llvm.org/D158785
rdar://113037252
2023-09-11 16:46:18 -07:00
Christopher Di Bella
dfd1d8d505 Revert "adds __reference_constructs_from_temporary"
I'm reverting this on principle, since it didn't get the Phabricator
approval I thought it had (only an informal LGTM). Will re-apply once
it has been properly approved.

This reverts commit e1bfeb6bcc.
2023-09-11 23:44:50 +00:00
Vitaly Buka
903008d56c [test][hwsasan] Invert enable_aliases check
For some reasons enable_aliases is not set when we
LLVM_ENABLE_RUNTIMES=compiler-rt instead of LLVM_ENABLE_PROJECTS.
2023-09-11 16:26:34 -07:00
Alexey Bader
a2e2f471c5 [Clang][Docs] Fix typo in clang-offload-packager documentation
Fixed formatting of the section violating 80-char line limit.
2023-09-11 16:24:37 -07:00
Konstantin Varlamov
881718857f [libc++][ranges] Fix a split_view test accidentally using lazy_split 2023-09-11 16:17:34 -07:00
Christopher Di Bella
e1bfeb6bcc adds __reference_constructs_from_temporary
This is information that the compiler already has, and should be exposed
so that the library doesn't need to reimplement the exact same
functionality.

Differential Revision: https://reviews.llvm.org/D135341
2023-09-11 23:14:08 +00:00
yinying-lisa-li
c3160f86e7
[mlir][sparse] Fix bug in new syntax parser (#66024)
Currently, dimlvlmap with identity affine map will be treated as empty
affine map. But the new syntax would treat it as an actual identity
affine map such as {d0} -> {d0}. This mismatch could raise an error when
we are comparing sparse encodings.
2023-09-11 19:13:15 -04:00
Amir Ayupov
7b750943d7 [BOLT][NFC] Speedup YAML profile processing
Reduce YAML profile processing times:
- preprocessProfile: speed up buildNameMaps by replacing ProfileNameToProfile
  mapping with ProfileFunctionNames set and ProfileBFs vector.
  Pre-look up YamlBF->BF correspondence, memoize in ProfileBFs.
- readProfile: replace iteration over all functions in the binary by iteration
  over profile functions (strict match and LTO name match).

On a large binary (1.9M functions) and large YAML profile (121MB, 30k functions)
reduces profile steps runtime:
pre-process profile data: 12.4953s -> 10.7123s
process profile data: 9.8195s -> 5.6639s

Compared to fdata profile reading:
pre-process profile data: 8.0268s
process profile data: 1.0265s
process profile data pre-CFG: 0.1644s

Reviewed By: #bolt, maksfb

Differential Revision: https://reviews.llvm.org/D159460
2023-09-11 16:07:57 -07:00
Amir Ayupov
ffef4fe0db [BOLT][NFC] Use formatv in DataAggregator/DataReader prints
Reviewed By: #bolt, maksfb

Differential Revision: https://reviews.llvm.org/D154120
2023-09-11 16:01:02 -07:00
erichkeane
bf06f149f6 Fix a few messed up links in the ReleaseNotes 2023-09-11 15:32:16 -07:00
Fangrui Song
ea8ab49166 [test] debug-info-correlate.ll requires an ELF target triple
The test only applies to ELF. On Linux, when a default target triple is, say,
Mach-O, the test should be excluded as well.
2023-09-11 15:18:32 -07:00