Commit Graph

379832 Commits

Author SHA1 Message Date
Marco Vanotti
0fe4701e51 Expand unit tests for fuzzer::Merger
This change adds additional unit tests for fuzzer::Merger::Parse and fuzzer::Merger::Merge in anticipation of additional changes to the merge control file format to support cross-process fuzzing.

It modifies the parameter handling of Merge slightly in order to make NewFeatures and NewCov consistent with NewFiles; namely, Merge *replaces* the contents of these output parameters rather than accumulating them (thereby fixing a buggy return value).

This is change 1 of (at least) 18 for cross-process fuzzing support.

Reviewed By: morehouse

Differential Revision: https://reviews.llvm.org/D94506
2021-02-12 11:18:34 -08:00
Mehdi Amini
aa4e466caa [mlir][Linalg] Improve region support in Linalg ops
This revision takes advantage of the newly extended `ref` directive in assembly format
to allow better region handling for LinalgOps. Specifically, FillOp and CopyOp now build their regions explicitly which allows retiring older behavior that relied on specific op knowledge in both lowering to loops and vectorization.

This reverts commit 3f22547fd1 and reland 973e133b76 with a workaround for
a gcc bug that does not accept lambda default parameters:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=59949

Differential Revision: https://reviews.llvm.org/D96598
2021-02-12 19:11:24 +00:00
Shafik Yaghmour
9f175998de [LLDB] Fix LLDB_LOG calls to use correct formatting
It looks like a previous change switched these from LLDB_LOGF but did not update the format strings.

Differential Revision: https://reviews.llvm.org/D96550
2021-02-12 11:09:39 -08:00
Fangrui Song
a7ceef9254 DebugInfo/Symbolize: Exclude ARM mapping symbols for .symtab symbolization after D95916
Their names don't convey much information, so they should be excluded.
The behavior matches addr2line.

Differential Revision: https://reviews.llvm.org/D96617
2021-02-12 11:04:20 -08:00
Diego Caballero
656674a7c4 [mlir][Vector] Align gather/scatter/expand/compress API
Align the vector gather/scatter/expand/compress API with
the vector load/store/maskedload/maskedstore API.

Reviewed By: aartbik

Differential Revision: https://reviews.llvm.org/D96396
2021-02-12 20:48:38 +02:00
Diego Caballero
ee66e43a96 [mlir][Vector] Introduce 'vector.load' and 'vector.store' ops
This patch adds the 'vector.load' and 'vector.store' ops to the Vector
dialect [1]. These operations model *contiguous* vector loads and stores
from/to memory. Their semantics are similar to the 'affine.vector_load' and
'affine.vector_store' counterparts but without the affine constraints. The
most relevant feature is that these new vector operations may perform a vector
load/store on memrefs with a non-vector element type, unlike 'std.load' and
'std.store' ops. This opens the representation to model more generic vector
load/store scenarios: unaligned vector loads/stores, perform scalar and vector
memory access on the same memref, decouple memory allocation constraints from
memory accesses, etc [1]. These operations will also facilitate the progressive
lowering of both Affine vector loads/stores and Vector transfer reads/writes
for those that read/write contiguous slices from/to memory.

In particular, this patch adds the 'vector.load' and 'vector.store' ops to the
Vector dialect, implements their lowering to the LLVM dialect, and changes the
lowering of 'affine.vector_load' and 'affine.vector_store' ops to the new vector
ops. The lowering of Vector transfer reads/writes will be implemented in the
future, probably as an independent pass. The API of 'vector.maskedload' and
'vector.maskedstore' has also been changed slightly to align it with the
transfer read/write ops and the vector new ops. This will improve reusability
among all these operations. For example, the lowering of 'vector.load',
'vector.store', 'vector.maskedload' and 'vector.maskedstore' to the LLVM dialect
is implemented with a single template conversion pattern.

[1] https://llvm.discourse.group/t/memref-type-and-data-layout/

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D96185
2021-02-12 20:48:37 +02:00
Paul Robinson
98754e2909 [RGT][GlobalIsel] Add missing setUp() calls to legalizer unittests
Some of these accidentally disabled tests failed as a result; updated
tests per @qcolombet instructions. A small number needed additional
updates because legalization has actually changed since they were
written.

Found by the Rotten Green Tests project.

Differential Revision: https://reviews.llvm.org/D95257
2021-02-12 10:45:48 -08:00
Xun Li
a0d09ce460 [NFC][Coroutine] Fix an error message on coro.id verification
The error message should be about coro.id, not coro.begin

Differential Revision: https://reviews.llvm.org/D96447
2021-02-12 10:44:03 -08:00
LLVM GN Syncbot
7ff0cbe41d [gn build] Port cb2d2ae56a 2021-02-12 18:40:40 +00:00
Zbigniew Sarbinowski
cb2d2ae56a [SystemZ][ZOS] Provide CLOCK_MONOTONIC alternative
We need CLOCK_MONOTONIC equivalent implementation for z/OS within libc++. The default implementation is asserting.

On z/OS the lack of  'clock_gettime()' and 'time_point()' force us to look for alternatives.
The current proposal is to use `gettimeofday()` for CLOCK_MONOTONIC  which is also used in CLOCK_REALTIME.  This will allow us to skip the assertion with compromised CLOCK_MONOTONIC implementation which will not guarantee to never go back in time because it will use `gettimeofday()` but only when it's set.

Is this a good compromise for platforms which does not support monotonic clock?
Hopefully this will spark the discussion and agreement how to proceed in this situation.

Reviewed By: #libc, ldionne, hubert.reinterpretcast

Differential Revision: https://reviews.llvm.org/D93542
2021-02-12 18:39:48 +00:00
David Green
875f0cbcc6 [ARM] Optimize fp store of extract to integer store if already available.
Given a floating point store from an extracted vector, with an integer
VGETLANE that already exists, storing the existing VGETLANEu directly
can be better for performance. As the value is known to already be in an
integer registers, this can help reduce fp register pressure, removed
the need for the fp extract and allows use of more integer post-inc
stores not available with vstr.

This can be a bit narrow in scope, but helps with certain biquad kernels
that store shuffled vector elements.

Differential Revision: https://reviews.llvm.org/D96159
2021-02-12 18:34:58 +00:00
Scott Linder
12999d749d [Symbolize] Teach symbolizer to work directly on object file.
This patch intended to provide additional interface to LLVMsymbolizer
such that they work directly on object files. There is an existing
method - symbolizecode which takes an object file, this patch provides
similar overloads for symbolizeInlinedCode, symbolizeData,
symbolizeFrame. This can be useful for clients who already have a
in-memory object files to symbolize for.

Patch By: pvellien (praveen velliengiri)

Reviewed By: scott.linder

Differential Revision: https://reviews.llvm.org/D95232
2021-02-12 18:26:24 +00:00
Simon Pilgrim
4841a225b7 [DAG] Move basic USUBSAT pattern matches from X86 to DAGCombine
Begin transitioning the X86 vector code to recognise sub(umax(a,b) ,b) or sub(a,umin(a,b)) USUBSAT patterns to make it more generic and available to all targets.

This initial patch just moves the basic umin/umax patterns to DAG, removing some vector-only checks on the way - these are some of the patterns that the legalizer will try to expand back to so we can be reasonably relaxed about matching these pre-legalization.

We can handle the trunc(sub(..))) variants as well, which helps with patterns where we were promoting to a wider type to detect overflow/saturation.

The remaining x86 code requires some cleanup first - some of it isn't actually tested etc. I also need to resurrect D25987.

Differential Revision: https://reviews.llvm.org/D96413
2021-02-12 18:22:57 +00:00
Amy Huang
3fe465fb2c Revert "[DebugInfo] Add an attribute to force type info to be emitted for"
Didn't mean to commit this.

This reverts commit 1b5c2915a2.
2021-02-12 10:18:17 -08:00
Amy Huang
394913fdb9 Try to fix external_symbolizer_path.cpp test to stop breaking on buildbots.
Not sure what the issue is, but it might be because the test copies
llvm-symbolizer to a different directory, and it can't find libc++.
Try to add some REQUIRES that we use in other tests where we copy
llvm tools out of their original directories.
2021-02-12 10:16:49 -08:00
Amy Huang
1b5c2915a2 [DebugInfo] Add an attribute to force type info to be emitted for
class types.

The goal is to provide a way to bypass constructor homing when emitting
class definitions and force class definitions in the debug info.

Not sure about the wording of the attribute, or whether it should be
specific to classes with constructors
2021-02-12 10:16:49 -08:00
Mehdi Amini
3f22547fd1 Revert "[mlir][Linalg] Improve region support in Linalg ops."
This reverts commit 973e133b76.

It triggers an issue in gcc5 that require investigation, the build is
broken with:

/tmp/ccdpj3B9.s: Assembler messages:
/tmp/ccdpj3B9.s:5821: Error: symbol `_ZNSt17_Function_handlerIFvjjEUljjE2_E9_M_invokeERKSt9_Any_dataOjS6_' is already defined
/tmp/ccdpj3B9.s:5860: Error: symbol `_ZNSt14_Function_base13_Base_managerIUljjE2_E10_M_managerERSt9_Any_dataRKS3_St18_Manager_operation' is already defined
2021-02-12 18:15:51 +00:00
Jianzhou Zhao
a7538fee3a [dfsan] Comment out ChainOrigin temporarily
It was added by D96160, will be used by D96564.
Some OS got errors if it is not used.
Comment it out for the time being.
2021-02-12 18:13:24 +00:00
Arnold Schwaighofer
e760ec2a01 [coro] Add support for polymorphic return typed coro.suspend.async
This allows for suspend point specific resume function types.

Return values from a suspend point can therefore be modelled as
arguments to the resume function. Allowing for directly passed return
types.

Differential Revision: https://reviews.llvm.org/D96136
2021-02-12 10:08:00 -08:00
Stanislav Mekhanoshin
c0d7a8bc62 [AMDGPU] Allow accvgpr_read/write decode with opsel
These two instructions are VOP3P and have op_sel_hi bits,
however do not use op_sel_hi. That is recommended to set
unused op_sel_hi bits to 1. However, we cannot decode
both representations with 1 and 0 if bits are set to
default value 1. If bits are set to be ignored with '?'
initializer then encoding defaults them to 0.

The patch is a hack to force ignored '?' bits to 1 on
encoding for these instructions.

There is still canonicalization happens on disasm print
if incoming values are non-default, so that disasm output
does not match binary input, but this is pre-existing
problem for all instructions with '?' bits.

Fixes: SWDEV-272540

Differential Revision: https://reviews.llvm.org/D96543
2021-02-12 10:04:47 -08:00
Lukas Sommer
6577cef9b0 [CodeGen] New pass: Replace vector intrinsics with call to vector library
This patch adds a pass to replace calls to vector intrinsics (i.e., LLVM
intrinsics operating on vector operands) with calls to a vector library.

Currently, calls to LLVM intrinsics are only replaced with calls to vector
libraries when scalar calls to intrinsics are vectorized by the Loop- or
SLP-Vectorizer.

With this pass, it is now possible to replace calls to LLVM intrinsics
already operating on vector operands, e.g., if such code was generated
by MLIR. For the replacement, information from the TargetLibraryInfo,
e.g., as specified via -vector-library is used.

This is a re-try of the original commit 2303e93e66 that was reverted
due to pass manager problems. Other minor changes have also been made.

Differential Revision: https://reviews.llvm.org/D95373
2021-02-12 12:53:27 -05:00
Akira Hatanaka
ed4718eccb [ObjC][ARC] Use operand bundle 'clang.arc.attachedcall' instead of
explicitly emitting retainRV or claimRV calls in the IR

Background:

This fixes a longstanding problem where llvm breaks ARC's autorelease
optimization (see the link below) by separating calls from the marker
instructions or retainRV/claimRV calls. The backend changes are in
https://reviews.llvm.org/D92569.

https://clang.llvm.org/docs/AutomaticReferenceCounting.html#arc-runtime-objc-autoreleasereturnvalue

What this patch does to fix the problem:

- The front-end adds operand bundle "clang.arc.attachedcall" to calls,
  which indicates the call is implicitly followed by a marker
  instruction and an implicit retainRV/claimRV call that consumes the
  call result. In addition, it emits a call to
  @llvm.objc.clang.arc.noop.use, which consumes the call result, to
  prevent the middle-end passes from changing the return type of the
  called function. This is currently done only when the target is arm64
  and the optimization level is higher than -O0.

- ARC optimizer temporarily emits retainRV/claimRV calls after the calls
  with the operand bundle in the IR and removes the inserted calls after
  processing the function.

- ARC contract pass emits retainRV/claimRV calls after the call with the
  operand bundle. It doesn't remove the operand bundle on the call since
  the backend needs it to emit the marker instruction. The retainRV and
  claimRV calls are emitted late in the pipeline to prevent optimization
  passes from transforming the IR in a way that makes it harder for the
  ARC middle-end passes to figure out the def-use relationship between
  the call and the retainRV/claimRV calls (which is the cause of
  PR31925).

- The function inliner removes an autoreleaseRV call in the callee if
  nothing in the callee prevents it from being paired up with the
  retainRV/claimRV call in the caller. It then inserts a release call if
  claimRV is attached to the call since autoreleaseRV+claimRV is
  equivalent to a release. If it cannot find an autoreleaseRV call, it
  tries to transfer the operand bundle to a function call in the callee.
  This is important since the ARC optimizer can remove the autoreleaseRV
  returning the callee result, which makes it impossible to pair it up
  with the retainRV/claimRV call in the caller. If that fails, it simply
  emits a retain call in the IR if retainRV is attached to the call and
  does nothing if claimRV is attached to it.

- SCCP refrains from replacing the return value of a call with a
  constant value if the call has the operand bundle. This ensures the
  call always has at least one user (the call to
  @llvm.objc.clang.arc.noop.use).

- This patch also fixes a bug in replaceUsesOfNonProtoConstant where
  multiple operand bundles of the same kind were being added to a call.

Future work:

- Use the operand bundle on x86-64.

- Fix the auto upgrader to convert call+retainRV/claimRV pairs into
  calls with the operand bundles.

rdar://71443534

Differential Revision: https://reviews.llvm.org/D92808
2021-02-12 09:51:57 -08:00
Matthew G McGovern
81b1d3da09 [sanitizers][Windows] Implement __sanitizer_purge_allocator for Win64
Windows' memory unmapping has to be explicit, there is no madvise.
Similarly, re-mapping memory has to be explicit as well. This patch
implements a basic method for remapping memory which was previously
returned to the OS on Windows.

Patch by Matthew G. McGovern and Jordyn Puryear
2021-02-12 09:49:04 -08:00
Hongtao Yu
0b1914e83a [ThinLTO][gold] Fix filenaming scheme for tasks.
The gold LTO plugin uses a set of hooks to implements emit-llvm and capture intermediate file generated during LTO. The hooks are called by each lto backend thread with a taskID as argument to differentiate between threads and tasks. Currently, all threads are overwriting the same file which results into only the intermediate output of the last backend thread to be preserved. This diff encodes the taskID into the filename.

Reviewed By: tejohnson, wenlei

Differential Revision: https://reviews.llvm.org/D96173
2021-02-12 09:40:08 -08:00
Alex Zinenko
66900b3eae [mlir] Use dialect interfaces to translate OpenMP dialect to LLVM IR
Migrate the translation of the OpenMP dialect operations to LLVM IR to the new
dialect-based mechanism.

Depends On D96503

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D96504
2021-02-12 18:37:47 +01:00
Kadir Cetinkaya
2423a3863e
[clangd] Introduce Modules
Modules can be used to augment clangd's behaviours in various features.

Differential Revision: https://reviews.llvm.org/D96244
2021-02-12 18:37:16 +01:00
Craig Topper
1697cc78b1 [RISCV] Add support for integer fixed vector setcc
I believe I've covered all orderings of splat operands here. Better
canonicalization in lowering might help reduce this. I did not handle
the immediate adjustments needed for set(u)gt/set(u)lt.

Testing here is limited to byte types because the scalable vector
type used for masks for the store is calculated assuming 8 byte
elements. But for the setcc its based on the element count of the
container type for the setcc input. So they don't agree. We'll need
to enhanced D96352 to handle this I think.

Differential Revision: https://reviews.llvm.org/D96443
2021-02-12 09:29:41 -08:00
Craig Topper
875c76de2b [RISCV] Add support for matching .vx and .vi forms of binary instructions for fixed vectors.
Unlike scalable vectors, I'm only using a ComplexPattern for
the immediate itself. The vmv_v_x is matched explicitly. We igore
the VL argument when matching a binary operator, but we do check
it when matching splat directly.

I left out tests for vXi64 as they fail on rv32 right now.

Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D96365
2021-02-12 09:18:10 -08:00
Jianzhou Zhao
7590c0078d [dfsan] Turn off THP at dfsan_flush
https://reviews.llvm.org/D89662 turned this off at dfsan_init.
dfsan_flush also needs to turn it off.
W/o this a program may get more and more memory usage after hours.

Reviewed-by: morehouse

Differential Revision: https://reviews.llvm.org/D96569
2021-02-12 17:10:09 +00:00
Sam Clegg
e1617d23ff Revert "[lld][WebAssembly] Fix for weak undefined functions in -pie mode"
This reverts commit ac2be2b6a3.

This causes a whole much of emscripten tests to fail due to newly
undefined symbols appearing.  Will investigate and look into re-landing
later.
2021-02-12 09:04:18 -08:00
Sam McCall
8dd6dd947c [clangd] Work around presumed MSVC stdlib bug
http://45.33.8.238/win/33161/step_4.txt
2021-02-12 18:00:43 +01:00
LLVM GN Syncbot
ac2627fd9a [gn build] Port ba3ea9c60f 2021-02-12 16:56:34 +00:00
Nathan James
ba3ea9c60f
[clangd] Fix clang tidy provider when multiple config files exist in directory tree
Currently Clang tidy provider searches from the root directory up to the target directory, this is the opposite of how clang-tidy searches for config files.
The result of this is .clang-tidy files are ignored in any subdirectory of a directory containing a .clang-tidy file.

Reviewed By: sammccall

Differential Revision: https://reviews.llvm.org/D96204
2021-02-12 16:55:46 +00:00
Florian Hahn
fb4d8fe807 [clang] Update mustprogress tests.
This unifies the positive and negative tests in a single file and
manually adjusts the check lines to check for differences surgically.
2021-02-12 16:53:51 +00:00
Alex Zinenko
b77bac0572 [mlir] Introduce dialect interfaces for translation to LLVM IR
The existing approach to translation to the LLVM IR relies on a single
translation supporting the base LLVM dialect, extensible through inheritance to
support intrinsic-based dialects also derived from LLVM IR such as NVVM and
AVX512. This approach does not scale well as it requires additional
translations to be created for each new intrinsic-based dialect and does not
allow them to mix in the same module, contrary to the rest of the MLIR
infrastructure. Furthermore, OpenMP translation ingrained itself into the main
translation mechanism.

Start refactoring the translation to LLVM IR to operate using dialect
interfaces. Each dialect that contains ops translatable to LLVM IR can
implement the interface for translating them, and the top-level translation
driver can operate on interfaces without knowing about specific dialects.
Furthermore, the delayed dialect registration mechanism allows one to avoid a
dependency on LLVM IR in the dialect that is translated to it by implementing
the translation as a separate library and only registering it at the client
level.

This change introduces the new mechanism and factors out the translation of the
"main" LLVM dialect. The remaining dialects will follow suit.

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D96503
2021-02-12 17:49:44 +01:00
Yitzhak Mandelbaum
33f35a4b79 [clang-tidy] Fix TransformerClangTidyCheck's handling of include insertions.
Currently, all include insertions are directed to the main file. However,
Transformer rules can specify alternative destinations for include
insertions. This patch fixes the code to associate the include with the correct
file.

This patch was tested manually. The clang tidy unit test framework does not
support testing changes to header files. Given that this is a bug fix for a live
bug, the patch relies on manual testing rather than blocking on upgrading the
unit test framework.

Differential Revision: https://reviews.llvm.org/D96542
2021-02-12 16:23:53 +00:00
Florian Hahn
142c09fefb
[AArch64] Increase outlined sequence in test added in a3f6233fa4. 2021-02-12 16:20:51 +00:00
Florian Hahn
a3f6233fa4
[AArch64] Add test case where machine outliner breaks up a bundle.
This is a backend test for PR49082.
2021-02-12 16:16:03 +00:00
Petar Avramovic
f0d65f4096 AMDGPU/GlobalISel: Calculate isKnownNeverNaN for fminnum and fmaxnum
Implements same logis as in SelectionDAG.
G_FMINNUM_IEEE and G_FMAXNUM_IEEE are never SNaN by definition and
never NaN when one operand is known non-NaN and other known non-SNaN.
G_FMINNUM and G_FMAXNUM are never NaN/SNaN when one of the operands
is known non-NaN/SNaN.

Differential Revision: https://reviews.llvm.org/D91716
2021-02-12 17:14:34 +01:00
Petar Avramovic
122c649c98 AMDGPU/GlobalISel: Check values of constants in isKnownNeverNaN
Differential Revision: https://reviews.llvm.org/D91714
2021-02-12 17:14:34 +01:00
Petar Avramovic
841ee7423d AMDGPU/GlobalISel: Precommit globalisel tests for isKnownNeverNaN 2021-02-12 17:14:34 +01:00
Nicolas Vasilache
f3fb2dd147 [mlir][Linalg] NFC - Add an OpFoldResult-based builder for InitTensorOp 2021-02-12 16:03:51 +00:00
Yaxun (Sam) Liu
053e61d54e Relands "[HIP] Change default --gpu-max-threads-per-block value to 1024"
This reverts commit e384e94fbe.
2021-02-12 10:53:59 -05:00
David Goldman
07c5a800dc Improve hover scopes for Objective-C code
- Instead of `AppDelegate::application:didFinishLaunchingWithOptions:` you
will now see `-[AppDelegate application:didFinishLaunchingWithOptions:]`

- Also include categories in the name when printing the scopes, e.g. `Class(Category)` and `-[Class(Category) method]`

Differential Revision: https://reviews.llvm.org/D68590
2021-02-12 10:27:32 -05:00
Kirstóf Umann
33e731e62d [analyzer][Liveness][NFC] Remove an unneeded pass to collect variables that appear in an assignment
Suppose you stumble across a DeclRefExpr in the AST, that references a VarDecl.
How would you know that that variable is written in the containing statement, or
not? One trick would be to ascend the AST through Stmt::getParent, and see
whether the variable appears on the left hand side of the assignment.

Liveness does something similar, but instead of ascending the AST, it descends
into it with a StmtVisitor, and after finding an assignment, it notes that the
LHS appears in the context of an assignemnt. However, as [1] demonstrates, the
analysis isn't ran on the AST of an entire function, but rather on CFG, where
the order of the statements, visited in order, would make it impossible to know
this information by descending.

void f() {
  int i;

  i = 5;
}

`-FunctionDecl 0x55a6e1b070b8 <test.cpp:1:1, line:5:1> line:1:6 f 'void ()'
  `-CompoundStmt 0x55a6e1b07298 <col:10, line:5:1>
    |-DeclStmt 0x55a6e1b07220 <line:2:3, col:8>
    | `-VarDecl 0x55a6e1b071b8 <col:3, col:7> col:7 used i 'int'
    `-BinaryOperator 0x55a6e1b07278 <line:4:3, col:7> 'int' lvalue '='
      |-DeclRefExpr 0x55a6e1b07238 <col:3> 'int' lvalue Var 0x55a6e1b071b8 'i' 'int'
      `-IntegerLiteral 0x55a6e1b07258 <col:7> 'int' 5

void f()
 [B2 (ENTRY)]
   Succs (1): B1

 [B1]
   1: int i;
   2: 5
   3: i
   4: [B1.3] = [B1.2]
   Preds (1): B2
   Succs (1): B0

 [B0 (EXIT)]
   Preds (1): B1

You can see that the arguments (rightfully so, they need to be evaluated first)
precede the assignment operator. For this reason, Liveness implemented a pass to
scan the CFG and note which variables appear in an assignment.

BUT.

This problem only exists if we traverse a CFGBlock in order. And Liveness in
fact does it reverse order. So a distinct pass is indeed unnecessary, we can
note the appearance of the assignment by the time we reach the variable.

[1] http://lists.llvm.org/pipermail/cfe-dev/2020-July/066330.html

Differential Revision: https://reviews.llvm.org/D87518
2021-02-12 16:19:20 +01:00
Jay Foad
7e9ceed9a2 [TableGen][GlobalISel] Allow duplicate RendererFns
Allow different GICustomOperandRenderers to use the same RendererFn.
This avoids the need for targets to define a bunch of identical C++
renderer functions with different names.

Without this fix TableGen would have emitted code that tried to define
the GICR enumeration with duplicate enumerators.

Differential Revision: https://reviews.llvm.org/D96587
2021-02-12 15:05:32 +00:00
Sam McCall
cea9f05432 [clangd] Move command handlers into a map in ClangdLSPServer. NFC
Differential Revision: https://reviews.llvm.org/D96507
2021-02-12 15:57:43 +01:00
Nicolas Vasilache
973e133b76 [mlir][Linalg] Improve region support in Linalg ops.
This revision takes advantage of the newly extended `ref` directive in assembly format
to allow better region handling for LinalgOps. Specifically, FillOp and CopyOp now build their regions explicitly which allows retiring older behavior that relied on specific op knowledge in both lowering to loops and vectorization.

Differential Revision: https://reviews.llvm.org/D96598
2021-02-12 14:51:03 +00:00
Haojian Wu
ee4dd0f876 [clangd] Remove the cross-file-rename option.
and simplify the code.

Differential Revision: https://reviews.llvm.org/D96578
2021-02-12 15:38:55 +01:00
David Green
541828e35d [ARM] Single source VMOVNT
Our current lowering of VMOVNT goes via a shuffle vector of the form
<0, N, 2, N+2, 4, N+4, ..>. That can of course also be a single input
shuffle of the form <0, 0, 2, 2, 4, 4, ..>, where we use a VMOVNT to
insert a vector into the top lanes of itself. This adds lowering of that
case, re-using the existing isVMOVNMask.

Differential Revision: https://reviews.llvm.org/D96065
2021-02-12 14:28:57 +00:00