272013 Commits

Author SHA1 Message Date
Zachary Turner
f8c80f9101 [cmake] Add a simple function to dump all variables.
This is useful when debugging CMake problems.

llvm-svn: 313574
2017-09-18 21:52:02 +00:00
Adrian Prantl
c8d8653de8 llvm-dwarfdump: use more efficient API (NFC)
llvm-svn: 313573
2017-09-18 21:44:40 +00:00
Vitaly Buka
59a1275be1 [ubsan] Fix conflict with previous declaration on Mac
llvm-svn: 313572
2017-09-18 21:35:49 +00:00
Reid Kleckner
1aa4ea8104 [gcov] Emit errors when opening the notes file fails
No time to write a test case, on to the next bug. =P

Discovered while investigating PR34659

llvm-svn: 313571
2017-09-18 21:31:48 +00:00
Erich Keane
0ac9524c99 [Sema] Fix a pair of crashes when generating exception specifiers with an
error'ed field for a template class' default ctor.

The two examples in the test would both cause a compiler assert when attempting
to calculate the exception specifier for the default constructor for the
template classes. The problem was that dependents of this function expect that
Field->getInClassInitializer (including canThrow) is not nullptr. However, if
the template's initializer has an error, exactly that situation happens.

This patch simply sets the field to be invalid.

Differential Revision: https://reviews.llvm.org/D37865

llvm-svn: 313569
2017-09-18 21:28:55 +00:00
Adrian Prantl
283eae82fd Fix indentation.
llvm-svn: 313568
2017-09-18 21:28:13 +00:00
Adrian Prantl
c2bc717028 llvm-dwarfdump: add a --show-parents options when selectively dumping DIEs.
llvm-svn: 313567
2017-09-18 21:27:44 +00:00
Adrian Prantl
f077b5b885 Fix typo in testcase.
llvm-svn: 313566
2017-09-18 21:27:42 +00:00
Konstantin Zhuravlyov
ca8946a376 AMDGPU: Start selecting s_xnor_{b32, b64}
Differential Revision: https://reviews.llvm.org/D37981

llvm-svn: 313565
2017-09-18 21:22:45 +00:00
Sanjay Patel
7765c93be2 [DAG, x86] allow store merging before and after legalization (PR34217)
rL310710 allowed store merging to occur after legalization to catch stores that are created late,
but this exposes a logic hole seen in PR34217:
https://bugs.llvm.org/show_bug.cgi?id=34217

We will miss merging stores if the target lowers vector extracts into target-specific operations.
This patch allows store merging to occur both before and after legalization if the target chooses
to get maximum merging.

I don't think the potential regressions in the other tests are relevant. The tests are for
correctness of weird IR constructs rather than perf tests, and I think those are still correct.

Differential Revision: https://reviews.llvm.org/D37987

llvm-svn: 313564
2017-09-18 20:54:26 +00:00
Craig Topper
39cdb84560 [X86] Make sure we still emit zext for GR32 to GR64 when the source of the zext is AssertZext
The AssertZext we might see in this case is only giving information about the lower 32 bits. It isn't providing information about the upper 32 bits. So we should emit a zext.

This fixes PR28540.

Differential Revision: https://reviews.llvm.org/D37729

llvm-svn: 313563
2017-09-18 20:49:13 +00:00
Kostya Serebryany
194d0edf73 [libFuzzer] one more trophy
llvm-svn: 313562
2017-09-18 20:48:35 +00:00
Kostya Kortchinsky
58c9a79bc2 [scudo] Additional modifications for Android tests support
Summary:
With the recent move of `android_commands` to `sanitizer_common`, some things
have to be updated with regard to Scudo on Android.

Notably:
- `config.android` is dealt with in the common code
- `config.compile_wrapper` can be prepended to allow for the use of the android
  commands
- `SCUDO_OPTIONS` must be passed with the environment when running a test
- `preinit.cpp` fails with some API levels, not sure why, I will have to dig
  into this later.

Note that `check-scudo` is not enabled yet in the bots. It's all local testing
for now until everything looks good.

Reviewers: alekseyshl, vitalybuka

Reviewed By: vitalybuka

Subscribers: srhines, kubamracek, llvm-commits

Differential Revision: https://reviews.llvm.org/D37990

llvm-svn: 313561
2017-09-18 20:31:57 +00:00
Adrian Prantl
dc7d460945 llvm-dwarfdump: Sink the handling of ShowChildren into DWARFDie::dump(). NFC.
llvm-svn: 313560
2017-09-18 19:55:00 +00:00
Alexey Bataev
286fe620ef [SLP] Add a test for PR34635, NFC.
llvm-svn: 313559
2017-09-18 19:33:30 +00:00
Craig Topper
e92327e236 [X86] Don't emit COPY_TO_REG to ABCD registers before EXTRACT_SUBREG of sub_8bit
This is similar to D37843, but for sub_8bit. This fixes all of the patterns except for the 2 that emit only an EXTRACT_SUBREG. That causes a verifier error with global isel because global isel doesn't know to issue the ABCD when doing this extract on 32-bits targets.

Differential Revision: https://reviews.llvm.org/D37890

llvm-svn: 313558
2017-09-18 19:21:21 +00:00
Craig Topper
b2155159a8 [X86] Don't emit COPY_TO_REG to ABCD registers before EXTRACT_SUBREG of sub_8bit_hi
I'm pretty sure that InstrEmitter::EmitSubregNode will take care of this itself by calling ConstrainForSubReg which in turn calls TRI->getSubClassWithSubReg.

I think Jakob Stoklund Olesen alluded to this in his commit message for r141207 which added the code to EmitSubregNode.

Differential Revision: https://reviews.llvm.org/D37843

llvm-svn: 313557
2017-09-18 19:21:19 +00:00
Rui Ueyama
27a357c9d9 Remove redundant cast<> and null check.
"Repl" member is guranteed to have a non-null pointer. If an input
section is not merged by ICF, "Repl" points to "this". Otherwise, it
points to some other section. It must not be NULL.

llvm-svn: 313556
2017-09-18 19:15:54 +00:00
Evandro Menezes
307e039d8c [AArch64] Adjust the cost model for Exynos M1 and M2
Refine the model of FP loads and stores.

llvm-svn: 313555
2017-09-18 19:00:38 +00:00
Evandro Menezes
91650ef061 [AArch64] Adjust the cost model for Exynos M1 and M2
Refine the model of loads and stores using the register offset addressing
modes.

llvm-svn: 313554
2017-09-18 19:00:36 +00:00
Evandro Menezes
9cd1bd7a83 [AArch64] Adjust the cost model for Exynos M1 and M2
Fix formatting in the predicate function AArch64InstrInfo::isExynosShiftLeftFast().

llvm-svn: 313553
2017-09-18 19:00:31 +00:00
Ahmed Bougacha
d630a92b0e [GlobalISel] Only build expensive remarks if they're enabled. NFC.
r313390 taught 'allowExtraAnalysis' to check whether remarks are
enabled at all.  Use that to only do the expensive instruction printing
if they are.

llvm-svn: 313552
2017-09-18 18:50:09 +00:00
Vitaly Buka
a4f62c62d3 [ubsan] Fix interface_symbols_windows test
Summary:
1. Update ubsan_interface.inc to make the test happy.
2. Switch interface_symbols_linux and interface_symbols_darwin to C++ to import __ubsan_handle_dynamic_type_cache_miss
3. Switch interface_symbols_windows to C++ for consistency.

Reviewers: rnk, zturner

Subscribers: llvm-commits, kubamracek

Differential Revision: https://reviews.llvm.org/D37986

llvm-svn: 313551
2017-09-18 18:46:19 +00:00
Davide Italiano
763febc44d [ELF] Remove default argument for lambda.
This is not really OK in C++11, and GCc triggers a warning.
We can switch back to default arguments when C++14 will be the
minimum version of the standard supported, see:
http://www.open-std.org/jtc1/sc22/wg21/docs/cwg_defects.html#974

Ack'ed by Rafael.

llvm-svn: 313550
2017-09-18 18:31:49 +00:00
Vedant Kumar
4a10504e1f [cmake] Make it possible to build and test profile without sanitizers
This should fix an issue which arises when running check-compiler-rt on
the coverage bot:
http://green.lab.llvm.org/green/job/clang-stage2-coverage-R_build/1590/

The bot doesn't build the sanitizers, but the check-compiler-rt target
always expects the profile runtime to exist.

llvm-svn: 313549
2017-09-18 18:13:47 +00:00
Sanjay Patel
74d12b5697 [x86] add tests for PR34217; NFC
llvm-svn: 313548
2017-09-18 18:07:50 +00:00
Simon Pilgrim
4aa28b9730 [X86][AVX] Improve (i8 bitcast (v8i1 x)) handling for 256-bit vector compare results.
As commented on D37849, AVX1 targets were missing a chance to use vmovmskps for v8f32/v8i32 results for bool vector bitcasts

llvm-svn: 313547
2017-09-18 17:58:31 +00:00
Michael Kruse
ef8325ba50 [ForwardOpTree] Test the max operations quota.
cl::opt<unsigned long> is not specialized and hence the option
-polly-optree-max-ops impossible to use.

Replace by supported option cl::opt<unsigned>.

Also check for an error state when computing the written value, which
happens when the quota runs out.

llvm-svn: 313546
2017-09-18 17:43:50 +00:00
Sanjay Patel
078d5d978c [x86] regenerate checks; NFC
llvm-svn: 313545
2017-09-18 17:33:47 +00:00
Manoj Gupta
7476f629ed [LoopVectorizer] Add more testcases for PR33804.
Summary:
Add test cases when float <-> pointer types conversion is triggered
in presence of load instructions.

Reviewers: Ayal, srhines, mkuper, rengolin

Reviewed By: rengolin

Subscribers: javed.absar, llvm-commits

Differential Revision: https://reviews.llvm.org/D37967

llvm-svn: 313544
2017-09-18 17:28:15 +00:00
Simon Pilgrim
0b21ef1fa3 [SelectionDAG] Add BITCAST handling to ComputeNumSignBits for splatted sign bits.
For cases where we are BITCASTing to vectors of smaller elements, then if the entire source was a splatted sign (src's NumSignBits == SrcBitWidth) we can say that the dst's NumSignBit == DstBitWidth, as we're just splitting those sign bits across multiple elements.

We could generalize this but at the moment the only use case I have is to peek through bitcasts to vector comparison results.

Differential Revision: https://reviews.llvm.org/D37849

llvm-svn: 313543
2017-09-18 16:45:05 +00:00
Craig Topper
77d7f331dd [X86] Fix two more places to prefer VPERMQ/PD over VPERM2X128 when AVX2 is enabled
The shuffle combining and lowerVectorShuffleAsLanePermuteAndBlend were both still trying to use VPERM2XF128 for unary shuffles when AVX2 is enabled. VPERM2X128 takes two inputs meaning when we use it for a unary shuffle one of those inputs is left undefined creating a false dependency on whatever register gets allocated there.

If we have VPERMQ/PD we should prefer those since they only have a single input.

Differential Revision: https://reviews.llvm.org/D37947

llvm-svn: 313542
2017-09-18 16:39:49 +00:00
Sanjay Patel
55de1ed8e6 [SLP] clean up for vector store case; NFCI
llvm-svn: 313541
2017-09-18 16:20:15 +00:00
Adrian McCarthy
8f31dc9754 Revert "Fix for bug 34532 - A few rough corners related to post-mortem debugging (core/minidump)"
Broke Windows and FreeBSD (at least).

This reverts commit 628ca7052b4a5dbace0f6205409113e12c8a78fa.

llvm-svn: 313540
2017-09-18 15:59:44 +00:00
Francis Ricci
25c6d26131 Revert "Use ThreadLauncher to launch TaskPool threads"
This reverts commit r313537 because it fails to link on linux buildbots

llvm-svn: 313539
2017-09-18 15:43:59 +00:00
Kostya Kortchinsky
8a0b40a8b3 [scudo] Android build support
Summary:
Mark Android as supported in the cmake configuration for Scudo.

Scudo is not added yet in the Android build bots, but code builds and tests
pass locally. It is for a later CL. I also checked that Scudo builds as part
of the Android toolchain.

A few modifications had to be made:
- Android defaults to `abort_on_error=1`, which doesn't work well with the
  current tests. So change the default way to pass `SCUDO_OPTIONS` to the tests
  to account for this, setting it to 0 by default;
- Disable the `valloc.cpp` & `random_shuffle.cpp` tests on Android;
- There is a bit of gymnatic to be done with the `SCUDO_TEST_TARGET_ARCH`
  string, due to android using the `-android` suffix, and `i686` instead of
  `i386`;
- Android doesn't need `-lrt`.

Reviewers: alekseyshl, eugenis

Reviewed By: alekseyshl

Subscribers: srhines, mgorny, llvm-commits

Differential Revision: https://reviews.llvm.org/D37907

llvm-svn: 313538
2017-09-18 15:40:53 +00:00
Francis Ricci
52ca3286fb Use ThreadLauncher to launch TaskPool threads
Summary:
This allows for the stack size to be configured, which isn't
possible with std::thread. Prevents overflowing the stack when
performing complex operations in the task pool on darwin,
where the default pthread stack size is only 512kb.

Reviewers: labath, tberghammer, clayborg

Subscribers: lldb-commits

Differential Revision: https://reviews.llvm.org/D37930

llvm-svn: 313537
2017-09-18 15:18:48 +00:00
Marc-Andre Laperle
85dcce4d15 [clangd] Fix codeAction not decoded properly when sent from some clients
Summary:
Fix for bug https://bugs.llvm.org/show_bug.cgi?id=34559
Also log unknown fields instead of aborting the JSON parsing because it's
common that new optional fields are added either in new versions of the protocol
or extensions.

Reviewers: ilya-biryukov

Reviewed By: ilya-biryukov

Subscribers: ilya-biryukov

Tags: #clang-tools-extra

Differential Revision: https://reviews.llvm.org/D37754

llvm-svn: 313536
2017-09-18 15:02:59 +00:00
Sam Parker
3fa0ccffc6 [AArch64] Add V8_2aOps feature to Cortex-A55 and 75
Add the missing hardware features the ProcA55 and ProcA75 feature.
These are already enabled via the target parser, but I had missed
them in the backend.

Differential Revision: https://reviews.llvm.org/D37974

llvm-svn: 313535
2017-09-18 14:46:14 +00:00
Alex Bradbury
6c865eab37 Add myself to CREDITS.txt
llvm-svn: 313534
2017-09-18 14:33:39 +00:00
Sam Parker
71efbe4c68 [ARM] Implement isTruncateFree
Implement the isTruncateFree hooks, lifted from AArch64, that are
used by TargetTransformInfo. This allows simplifycfg to reduce the
test case into a single basic block.

Differential Revision: https://reviews.llvm.org/D37516

llvm-svn: 313533
2017-09-18 14:28:51 +00:00
Simon Pilgrim
00161c9961 [X86][SSE] Improve support for vselect(Cond, 0, X) -> ANDN(Cond, X)
As discussed on PR28925 and D37849.

Differential Revision: https://reviews.llvm.org/D37975

llvm-svn: 313532
2017-09-18 14:23:23 +00:00
Sjoerd Meijer
4e6df15962 [ARM] Fix for indexed dot product instruction descriptions
The indexed dot product instructions only accept the lower 16 D-registers as
the indexed register, but we were e.g. incorrectly accepting:

vudot.u8 d16,d16,d18[0]

Differential Revision: https://reviews.llvm.org/D37968

llvm-svn: 313531
2017-09-18 14:17:57 +00:00
Jonas Devlieghere
c0a758d8ab [dwarfdump] Make .eh_frame an alias for .debug_frame
This patch makes the `.eh_frame` extension an alias for `.debug_frame`.
Up till now it was only possible to dump the section using objdump, but
not with dwarfdump. Since the two are essentially interchangeable, we
dump whichever of the two is present.

As a workaround, this patch also adds parsing for 3 currently
unimplemented CFA instructions: `DW_CFA_def_cfa_expression`,
`DW_CFA_expression`, and `DW_CFA_val_expression`. Because I lack the
required knowledge, I just parse the fields without actually creating
the instructions.

Finally, this also fixes the typo in the `.debug_frame` section name
which incorrectly contained a trailing `s`.

Differential revision: https://reviews.llvm.org/D37852

llvm-svn: 313530
2017-09-18 14:15:57 +00:00
Simon Pilgrim
360629d170 [X86][SSE] Add vselect with zero tests (PR28925)
llvm-svn: 313529
2017-09-18 13:32:33 +00:00
Simon Pilgrim
f133c50a42 [X86] combineVSelectWithAllOnesOrZeros - cleanup variable names. NFCI.
We were reusing the 'false' select value 'is zero' variable name for the 'true' select value 'is zero' variable name.

llvm-svn: 313528
2017-09-18 12:55:54 +00:00
Michael Kruse
eac3eebfea [test] Enable -polly-codegen-verify for regression tests.
In r301670 IR verification was disabled. Since then, CodeGen writing
malformed IR would only be noticed by unpredictable behavior in
follow-up passes (e.g. segfaults, infinite loops) or IR verification in
the backend assert builds.

Re-enable -polly-codegen-verify at for the regression tests to ensure
that malformed IR is detected where Polly generated malformed IR in the
past and changes in CodeGen are at least partially covered by
check-polly
(otherwise malformed IR may only get noticed when the buildbots run the
test-suite).

Differential Revision: https://reviews.llvm.org/D37969

llvm-svn: 313527
2017-09-18 12:34:11 +00:00
Michael Kruse
ad32de9424 [ForwardOptTree] Remove redundant simplify(). NFC.
The result of computeKnown has already been simplified.

llvm-svn: 313526
2017-09-18 12:28:07 +00:00
Tamas Berghammer
1492cb89ca Fix Linux remote debugging after r313442
On Linux lldb-server sends an OK response to qfThreadInfo if no process
is started yet. I don't know why would LLDB issue a qfThreadInfo packet
before starting a process but creating a fake thread ID in case of an
OK or Error respoinse sounds bad anyway so lets not do it.

llvm-svn: 313525
2017-09-18 10:24:48 +00:00
Nikolai Bozhenov
84af99b3b1 [X86FixupBWInsts] More precise register liveness if no <imp-use> on MOVs.
Summary:
Subregister liveness tracking is not implemented for X86 backend, so
sometimes the whole super register is said to be live, when only a
subregister is really live. That might happen if the def and the use
are located in different MBBs, see added fixup-bw-isnt.mir test.

However, using knowledge of the specific instructions handled by the
bw-fixup-pass we can get more precise liveness information which this
change does.

Reviewers: MatzeB, DavidKreitzer, ab, andrew.w.kaylor, craig.topper

Reviewed By: craig.topper

Subscribers: n.bozhenov, myatsina, llvm-commits, hiraditya

Patch by Andrei Elovikov <andrei.elovikov@intel.com>

Differential Revision: https://reviews.llvm.org/D37559

llvm-svn: 313524
2017-09-18 10:17:59 +00:00