Commit Graph

463562 Commits

Author SHA1 Message Date
Weining Lu
47601815ec [LoongArch] Define ual feature and override allowsMisalignedMemoryAccesses
Some CPUs do not allow memory accesses to be unaligned, e.g. 2k1000la
who uses the la264 core on which misaligned access will trigger an
exception.

In this patch, a backend feature called `ual` is defined to decribe
whether the CPU supports unaligned memroy accesses. And this feature
can be toggled by clang options `-m[no-]unaligned-access` or the
aliases `-m[no-]strict-align`. When this feature is on,
`allowsMisalignedMemoryAccesses` sets the speed number to 1 and returns
true that allows the codegen to generate unaligned memory access insns.

Clang options `-m[no-]unaligned-access` are moved from `m_arm_Features_Group`
to `m_Group` because now more than one targets use them. And a test
is added to show that they remain unused on a target that does not
support them. In addition, to keep compatible with gcc, a new alias
`-mno-strict-align` is added which is equal to `-munaligned-access`.

The feature name `ual` is consistent with linux kernel [1] and the
output of `lscpu` or `/proc/cpuinfo` [2].

There is an `LLT` variant of `allowsMisalignedMemoryAccesses`, but
seems that curently it is only used in GlobalISel which LoongArch
doesn't support yet. So this variant is not implemented in this patch.

[1]: https://github.com/torvalds/linux/blob/master/arch/loongarch/include/asm/cpu.h#L77
[2]: https://github.com/torvalds/linux/blob/master/arch/loongarch/kernel/proc.c#L75

Reviewed By: xen0n

Differential Revision: https://reviews.llvm.org/D149946
2023-06-07 13:40:58 +08:00
Craig Topper
8dd28c5682 [RISCV] Split scheduler classes for vector min/max from compares.
Compares write a mask result. Min/max write a full result. This
makes them sufficiently different to have their own classes.

Reviewed By: pcwang-thead

Differential Revision: https://reviews.llvm.org/D152020
2023-06-06 22:25:22 -07:00
Tue Ly
c0a751ae3d [libc] Fix undefined behavior of left shifting signed integer in exp2f.cpp.
Fix undefined behavior of left shifting signed integer in exp2f.cpp.

Reviewed By: sivachandra

Differential Revision: https://reviews.llvm.org/D152336
2023-06-07 01:15:18 -04:00
Michael Platings
ce8fa36e59 [NFC][Driver] Change Multilib flag representation
This new representation means that a valid command line option may
potentially be used directly as a multilib flag without any translation.

To indicate that a flag is required not to be present, its first
character is replaced with '!', which is intended for consistency with
the logical not operator in many programming languages.

Reviewed By: simon_tatham

Differential Revision: https://reviews.llvm.org/D151438
2023-06-07 05:53:04 +01:00
Michael Platings
47b431d661 [NFC][Driver] Change MultilibBuilder interface
Decouple the interface of the MultilibBuilder flag method from how flags
are stored internally. Likewise change the addMultilibFlag function.

Currently a multilib flag like "-fexceptions" means a multilib is
*incompatible* with the -fexceptions command line option, which is
counter-intuitive. This change is a step towards changing this scheme.

Differential Revision: https://reviews.llvm.org/D151437
2023-06-07 05:53:04 +01:00
Joshua Cao
cb9f1aadda [ValueTracking] Implied conditions for lshr
`V1 >> V2 u<= V1` for any V1, V2

This works for lshr and any div's that are changed to lshr's

This fixes issues in clang and rustc:
https://github.com/llvm/llvm-project/issues/62441
https://github.com/rust-lang/rust/issues/110971

Reviewed By: goldstein.w.n

Differential Revision: https://reviews.llvm.org/D151541
2023-06-06 21:06:22 -07:00
Joshua Cao
f23b4faaff [InstSimplify] Add tests for shl implied conditions 2023-06-06 21:06:22 -07:00
Fangrui Song
c6a69446e1 [M68k,MSP430,VE,Xtensa] Migrate to new encodeInstruction that uses SmallVectorImpl<char>. NFC 2023-06-06 21:02:52 -07:00
Slava Zakharin
6e4984a9d5 [flang][hlfir] Enable assignments with allocatable components.
The TODO was left there to verify that Assign() runtime handles
overlaps of allocatable components. It did not, and this change-set
fixes it. Note that the same Assign() issue can be reproduced
without HLFIR. In the following example the LHS would be reallocated
before value of RHS (essentially, the same memory) is read:
```
program main
  type t1
     integer, allocatable :: a(:)
  end type t1
  type(t1) :: x, y
  allocate(x%a(10))
  do i =1,10
     x%a(i) = 2*i
  end do
  x = x
  print *, x%a
  deallocate(x%a)
end program main
```

The test's output would be incorrect (though, this depends on the memory
reuse by malloc):
0 0 0 0 10 12 14 16 18 20

It is very hard to add a Flang unittest exploiting derived types.

Reviewed By: klausler

Differential Revision: https://reviews.llvm.org/D152306
2023-06-06 20:25:07 -07:00
Fangrui Song
a4bf2be5d2 [Hexagon,Lanai,LoongArch,Sparc] Migrate to new encodeInstruction that uses SmallVectorImpl<char>. NFC 2023-06-06 20:21:00 -07:00
WANG Xuerui
bb39a8aad1 [LoongArch] Define the LAELF v20230519 relocs
The LoongArch ELF psABI document has changed location and versioning
scheme; this revision is v2.10 in the old scheme. Notably this revision
brings initial capability of linker relaxation to LoongArch.

Reviewed By: SixWeining, MaskRay

Differential Revision: https://reviews.llvm.org/D152184
2023-06-07 11:16:05 +08:00
Chuanqi Xu
84c033d9ba [LICM] [Coroutines] Don't hoist threadlocals within presplit coroutines
Close https://github.com/llvm/llvm-project/issues/63022

This is the following of https://reviews.llvm.org/D135550, which is
discussed in
https://discourse.llvm.org/t/rfc-unify-memory-effect-attributes/65579.
In my imagination, we could fix the issue fundamentally after we
introduces new memory kind thread id. But I am not very sure if we can
fix the issue fundamentally in time.

Besides that, I think the correctness is the most important. So it
should not be bad to land this given it is innocent.

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D151774
2023-06-07 10:25:47 +08:00
Jeffrey Byrnes
db61927951 [AMDGPU][IGLP]: Add rules to SchedGroups
Differential Revision: https://reviews.llvm.org/D146774

Change-Id: Icd7aaaa0b257a25713c22ead0813777cef7d5859
2023-06-06 19:19:21 -07:00
LLVM GN Syncbot
aeca4252e0 [gn build] Port 1794532bb9 2023-06-07 02:14:26 +00:00
Ellis Hoag
1794532bb9 [InstrProf] Move BPFunctionNode test to ProfileDataTests
In https://reviews.llvm.org/D147812 I created
`BalancedPartitioningTest.cpp` and inadvertently drastically increased the
number of files needed to compile `SupportTests`. Instead lets move the
`BPFunctionNode` test to `unittests/ProfileData` so we can remove the
extra dependency.

Reviewed By: thakis

Differential Revision: https://reviews.llvm.org/D152325
2023-06-06 19:12:51 -07:00
Chuanqi Xu
eab8c1eb62 [Coroutines] [LICM] Precommit test for D151774
This is required in the review.

Differential Revision: https://reviews.llvm.org/D151774
2023-06-07 10:11:22 +08:00
Craig Topper
2b09f53b32 [RISCV] Remove overly restrictive assert from negateFMAOpcode.
It's possible that both multiplicands are being negated. This won't
change the opcode, but we can delete the two negates. Allow this
case to get through negateFMAOpcode.

I think D152260 will also fix this test case, but in the future
it may be possible for an fneg to appear after we've already converted
to RISCVISD opcodes in which case D152260 won't help.

Reviewed By: fakepaper56

Differential Revision: https://reviews.llvm.org/D152296
2023-06-06 18:55:58 -07:00
Jim Lin
d4c5b45293 [NFC] Remove unneeded semicolon after function definition 2023-06-07 09:29:49 +08:00
Craig Topper
8c649231f4 [RISCV] Fix UBSan failure on signed integer overflow. 2023-06-06 18:27:33 -07:00
Paul Kirth
9ad3ca4e9a Revert "[TypePromotion] Don't treat bitcast as a Source"
This reverts commit 27aea17fe0.
For details, see: https://reviews.llvm.org/D152112

Fuchsia CI failure: https://ci.chromium.org/ui/p/fuchsia/builders/toolchain.ci/clang-linux-arm64/b8779118297575483793/overview
2023-06-07 00:51:20 +00:00
LLVM GN Syncbot
1f41942afe [gn build] Port 44268271f6 2023-06-07 00:45:47 +00:00
Med Ismail Bennani
bcfd85a258 [lldb/test] Fix target-label.test on Fuchsia
This shell test also checks some SBAPI functionalities and thus requires
python support.

Signed-off-by: Med Ismail Bennani <ismail@bennani.ma>
2023-06-06 17:42:09 -07:00
Florian Mayer
38f7c7eb1a Revert "Revert "[RISCV] Add special case to selectImm for constants that can be created with (ADD (SLLI C, 32), C).""
Revert broke even more stuff.

This reverts commit d5fbec3093.
2023-06-06 17:39:05 -07:00
Florian Mayer
d5fbec3093 Revert "[RISCV] Add special case to selectImm for constants that can be created with (ADD (SLLI C, 32), C)."
Triggers UBSan error.

This reverts commit 58b2d652af.
2023-06-06 17:30:07 -07:00
Florian Mayer
cb49160765 Revert "[Sanitizers] Remove BuildId from sanitizers stacktrace on
Breaks tests.

This reverts commit fdb1a891b6.
2023-06-06 17:25:55 -07:00
Marco Nelissen
146f4c26ac [scudo] Enable MTE in Trusty
Trusty now has MTE support.
Back-ported from https://r.android.com/2332745.

Reviewed By: Chia-hungDuan

Differential Revision: https://reviews.llvm.org/D152219
2023-06-07 00:15:04 +00:00
Nico Weber
7056ad7e97 [gn build] Port 1117b9a284 2023-06-06 19:59:54 -04:00
usama hameed
fdb1a891b6
[Sanitizers] Remove BuildId from sanitizers stacktrace on Darwin
On Darwin, we do not want to show the BuildId appended at the end of stack
frames in Sanitizers. The BuildId/UUID can be seen by using the
print_module_map=1 sanitizer option.

Differential Revision: https://reviews.llvm.org/D150298

rdar://108324403
2023-06-06 16:37:39 -07:00
Haowei Wu
bb398898da [Fuchsia] Add llvm-strings to Fuchsia clang build.
This patch adds 'llvm-strings' to Fuchsia clang build.

Differential Revision: https://reviews.llvm.org/D152318
2023-06-06 16:27:35 -07:00
Kun Wu
8ed59c53de [mlir][sparse][gpu] add sm8.0+ tensor core 2:4 sparsity support
Reviewed By: aartbik

Differential Revision: https://reviews.llvm.org/D151775
2023-06-06 23:13:21 +00:00
Med Ismail Bennani
431f082a55 [lldb] Disable some tests on windows
This patch skips both `test_completion_target_create_from_root_dir`
introduced in `e896612` and  `target-label.test` introduced in `1e82b20`
since I don't have a windows machine to try to accomodate the filesystem
path style differences for these tests to pass.

Signed-off-by: Med Ismail Bennani <ismail@bennani.ma>
2023-06-06 16:10:05 -07:00
Arthur Eubanks
f715fa5cd8 Revert "Reland [compiler-rt][CMake] Properly set COMPILER_RT_HAS_LLD"
This reverts commit fffa05a2bc.

This seems to cause hwasan tests to run in environments it didn't run in before.
2023-06-06 16:01:05 -07:00
Amir Ayupov
713b28532e [BOLT][NFC] Fix debug messages
Fix debug printing, making it easier to compare two debug logs side by side:
- `BinaryFunction::addRelocation`: print function name instead of `this` ptr,
- `DataAggregator::doTrace`: remove duplicated function name.

Reviewed By: #bolt, maksfb

Differential Revision: https://reviews.llvm.org/D152314
2023-06-06 15:50:58 -07:00
Jonas Devlieghere
a10019a496
[lldb] Fix "NameError: name 'self' is not defined" when using crashlog -c
This fixes a regression introduced by 27f27d15f6 that results in a
NameError: (name 'self' is not defined) when using crashlog with the -c
option.

rdar://110007391
2023-06-06 15:20:53 -07:00
Fangrui Song
0874110104 [Driver] Change some Separate CC1 options to use the Joined = form 2023-06-06 15:12:45 -07:00
Matt Arsenault
e1fa30d005 clang/HIP: Inline frexp/frexpf implementations
Don't bother calling ocml. This stops setting the
appropriate fast math flags, and requires this junk
for passing to a private pointer.
2023-06-06 18:04:34 -04:00
Aaron Ballman
6269b8b7de Fix LLVM Sphinx build; NFC
Addresses the issue found by:
https://lab.llvm.org/buildbot/#/builders/30/builds/35968
2023-06-06 17:29:15 -04:00
Craig Topper
0ce8163f18 [RISCV] Use const reference when looping over RISCVMatInt::InstSeq. NFC 2023-06-06 14:27:28 -07:00
Artem Belevich
ef8655adc8 [NVPTX] Adapt tests to make them usable with CUDA-12.x
CUDA-12 no longer supports 32-bit compilation.

Tests agnostic to 32/64 compilation mode are switched to use nvptx64.
Tests that do care about it have 32-bit ptxas compilation disabled with cuda-12+.

Differential Revision: https://reviews.llvm.org/D152199
2023-06-06 14:22:12 -07:00
Matt Arsenault
6f1d21dfc4 LangRef: Try to fix sphinx bot error 2023-06-06 17:18:31 -04:00
Matt Arsenault
95a3ae58b8 ValueTracking: Add baseline test for ldexp computeKnownFPClass 2023-06-06 17:09:25 -04:00
Fangrui Song
5805aeb0d9 [test] Restore x86-registered-target in Driver/as-warnings.c
64666d46c0 incorrectly removed REQUIRES.
2 RUN lines do need x86-registered-target.
2023-06-06 14:08:49 -07:00
Matt Arsenault
8a21ea1d0a clang: Start emitting intrinsic for __builtin_ldexp*
Also introduce __builtin_ldexpf16.
2023-06-06 17:07:19 -04:00
Matt Arsenault
eece6ba283 IR: Add llvm.ldexp and llvm.experimental.constrained.ldexp intrinsics
AMDGPU has native instructions and target intrinsics for this, but
these really should be subject to legalization and generic
optimizations. This will enable legalization of f16->f32 on targets
without f16 support.

Implement a somewhat horrible inline expansion for targets without
libcall support. This could be better if we could introduce control
flow (GlobalISel version not yet implemented). Support for strictfp
legalization is less complete but works for the simple cases.
2023-06-06 17:07:18 -04:00
Matt Arsenault
5d361ad2a4 AMDGPU/GlobalISel: Fix broken / copy paste error in sext_inreg test 2023-06-06 17:07:18 -04:00
Nikolas Klauser
88632e4806 [libc++] Refactor __less
This simplifies the usage of `__less` by making the class not depend on the types compared, but instead the `operator()`. We can't remove the template completely because we explicitly instantiate `std::__sort` with `__less<T>`.

Reviewed By: ldionne, #libc

Spies: arichardson, EricWF, libcxx-commits, mgrang

Differential Revision: https://reviews.llvm.org/D145285
2023-06-06 13:58:52 -07:00
Fangrui Song
0aa4af711e [Driver] Change some Separate CC1 options to use the Joined = form
-f{constexpr,macro,template}-backtrace-limit=, -fspell-checking-limit=, -ftemplate-depth=
2023-06-06 13:50:04 -07:00
Amir Ayupov
b244a4c4c9 [profi][NFC] Get rid of afdo_detail::TypeMap
Parametrize SampleProfileInference and SampleProfileLoaderBaseImpl by function
type (Function/MachineFunction) instead of block type
(BasicBlock/MachineBasicBlock). Move out specializations to appropriate
locations.

This change makes it possible to use GraphTraits instead of a custom TypeMap and
make SampleProfileInference not dependent on LLVM types, paving the way for
generalizing SampleProfileInference interfaces to BOLT IR types
(BinaryFunction/BinaryBasicBlock) in stale profile matching (D144500).

Reviewed By: hoy

Differential Revision: https://reviews.llvm.org/D152187
2023-06-06 13:48:37 -07:00
Benjamin Kramer
e412650726 [bazel] Port 44268271f6 2023-06-06 22:47:30 +02:00
Benjamin Kramer
ba8c0bf37e [bazel] Port 1117b9a284 2023-06-06 22:47:17 +02:00