We have recently started seeing deadlocks in death tests while running in an internal test environment.
Per the documentation here, there are issues with death tests in the presence of threads:
https://github.com/google/googletest/blob/main/docs/advanced.md#death-tests-and-threads
To avoid the deadlocks, I first tried appending `DeathTest` to the relevant test suite names, which has the effect of running these test suites before all other tests. However, this did not prevent the deadlocks.
This patch therefore uses the option of setting the `death_test_style` flag to `"threadsafe"` (see description in the page linked above under "Death Test Styles"), and this prevents the deadlocks.
The documentation notes that the "threadsafe" death test style "trades increased test execution time (potentially dramatically so) for improved thread safety". This is because, to execute a death test, "threadsafe" does a "fork + exec", then re-executes the current test in the child process, whereas the default "fast" death test style does only a fork (on those platforms that support it). However, as we have relatively few death tests, the increased execution time does not make a big difference in total test execution time in my testing.
Note that other projects, such as Chromium, also choose to set the "threadsafe" death test style globally:
https://source.chromium.org/chromium/chromium/src/+/main:base/test/test_suite.cc;l=367
Reviewed By: hans
Differential Revision: https://reviews.llvm.org/D152696
`desugarForDiagnostic` only sets ShouldAKA to true if desugaring
happens, otherwise ShouldAKA is left intact and might be uninitialized.
Victims (including me):
25bf8cb3c00e8384a0fe
Reviewed By: aaron.ballman
Differential Revision: https://reviews.llvm.org/D152880
HIP texture/image support is optional as some devices
do not have image instructions. A macro __HIP_NO_IMAGE_SUPPORT
is defined for device not supporting images (d0448aa4c4/docs/reference/kernel_language.md (L426) )
Currently the macro is defined by HIP header based on predefined macros
for GPU, e.g __gfx*__ , which is error prone. This patch let clang
emit the predefined macro.
Reviewed by: Matt Arsenault, Artem Belevich
Differential Revision: https://reviews.llvm.org/D151349
This is the same as D152950 without depending on D152948.
_IN32X instructions are for Zdinx on RV32 where doubles are split
across 2 registers.
fcvt.d.l(u) and fcvt.l(u).d are RV64 only instructions so we don't
need _IN32X versions of them.
Reviewed By: sunshaoce
Differential Revision: https://reviews.llvm.org/D152952
It can be tricky to troubleshoot why the crashlog script can't show
inline sources. The two most common causes are that we couldn't find the
dSYM or, if we find the dSYM, that the path remapping included in the
dSYMForUUID output isn't accessible. The former is already easy to
diagnose, but the latter is harder because you'd have to manually invoke
dsymForUUID on the UUID and check the remapped path. This patch
automates that process and prints a warning if the remapped path doesn't
exist or is not accessible.
Differential revision: https://reviews.llvm.org/D152886
34a8e6eee666 changed SymbolFileDWARF::GetDwoNum to
SymbolFileDWARF::GetFileIndex but changed the meaning from just DWO to
DWO and OSO which changed the meaning of the assert. The assert was
therefore removed from ManualDWARFIndex::GetGlobalVariables and
ManualDWARFIndex::GetGlobalVariables but was still present in
DebugNamesDWARFIndex::GetGlobalVariables. If we want to reintroduce the
assert, we need something with the old semantics for all 3.
Breaks check-clang on win and mac, see comments on https://reviews.llvm.org/D150023
This reverts commit d8a36b00d198fdc2ea866ea5da449628db07070f.
Also revert follow-up "[NFC] skip the test modules-vtable.cppm on windows"
This reverts commit baf0b12ca6c624b2a59aa6f2fd0310c72d35ac56.
Android does not do any checking of new/delete mismatches, so disable
this test when compiling for Android.
Reviewed By: Chia-hungDuan
Differential Revision: https://reviews.llvm.org/D152958
If you pass `nullptr` (or `None` from python) to SBPlatform::SetSDKRoot,
LLDB crashes. Let's be more resilient to `nullptr` here.
Differential Revision: https://reviews.llvm.org/D152962
- Add option to ignore reserved registers
- Add possibility to track selected registers or register classes only
Tracking is done based on register units, so the set of registers to track
is translated into a set of register units.
On Apple platforms, we generate .apple_names, .apple_types,
.apple_namespaces and .apple_objc Apple accelerator tables for DWARF 4
and earlier. For DWARF 5 we should generate .debug_names, but instead we
get no accelerator tables at all.
In the backend we are correctly determining that we should be emitting
.debug_names instead of .apple_names. However, when we get to the point
of emitting the section, if the CU debug name table kind is not
"default", the accelerator table emission is skipped.
This patch sets the DebugNameTableKind to Apple in the frontend when
target an Apple target. That way we know that the CU was compiled with
the intent of emitting accelerator tables. For DWARF 4 and earlier, that
means Apple accelerator tables. For DWARF 5 and later, that means .debug
names.
Differential revision: https://reviews.llvm.org/D118754
LLD terminates with errors when it detects overflows in the
finalizeAddressDependentContent calculation. Although, sometimes, those errors
are not really errors, but an intermediate result of an ongoing address
calculation. If we continue the fixed-point algorithm we can converge to the
correct result.
This patch
* Removes the verification inside the fixed point algorithm.
* Calls checkMemoryRegions at the end.
Reviewed By: peter.smith, MaskRay
Differential Revision: https://reviews.llvm.org/D152170
The warning "ignoring memory region assignment for non-allocatable section" should be generated under the following conditions:
* sections without SHF_ALLOC attribute and,
* presence of input sections or data commands (ByteCommand)
The goal of the change is to reduce spurious warnings that are generated for some output sections that have no input section.
Reviewed By: MaskRay, peter.smith
Differential Revision: https://reviews.llvm.org/D151802
Add support for the max operator in the reduction
clause.
Depdns on D151671
Reviewed By: jeanPerier
Differential Revision: https://reviews.llvm.org/D151672
2700da5fe28d got reverted in aa495214b39d.
This reverts commit 9239cde390e2c8e7cc4ffd13bff7030a5172c805.
Also revert follow-up "[gn] Fix case of directory I added in 9239cde390e"
This reverts commit 4de67143babd20f44c1f806404df356bff6825a2.
This reverts commit 9d9a7732e14d7d4c0db7b46d6ebe588e8f43b951.
This was a workaround for some platform and it has been fixed in
bfa02523b2e7ed66368ea61866a474e55ef354a3
Differential Revision: https://reviews.llvm.org/D152964
Header synospis sections of P1614R2 are implemented by other items usually. For completeness, let's mark some of them as "Complete".
Reviewed By: #libc, Mordante
Differential Revision: https://reviews.llvm.org/D152775
Included a note in the release documentation about the improved
performance of certain checks, allowing users who had previously
disabled them due to slowness to reconsider their decision.
Remove 'using namespace' statement from header file to avoid propagating it to
other locations unnecessarily and avoid potential name collisions.
Reviewed By: wenlei
Differential Revision: https://reviews.llvm.org/D152727
This patch creates the ArmSME dialect, and provides the intrinsic op
definition necessary for lowering to LLVM IR.
This will cover most instructions interacting with the ZA tile register,
not covering SME2 instructions.
Source: https://developer.arm.com/documentation/ddi0616/latest
Reviewed By: awarzynski, c-rhodes
Differential Revision: https://reviews.llvm.org/D152878
Some Darwin corefiles can have the pc/fp/sp/lr in the
live register context signed with pointer authentication;
this patch changes RegisterContextUnwind to strip those
bits off of those values as we try to walk the stack.
Differential Revision: https://reviews.llvm.org/D152861
rdar://109185291
We need to clear non-addressable bits from addresses across
the lldb sources. Currently these need to use an ABI method
to clear those bits from addresses, which you do by taking a
Process, getting the current ABI, then calling the method.
Simplify this by providing methods in Process which call into
the ABI methods themselves.
Differential Revision: https://reviews.llvm.org/D152863
This assertion triggered when we have two base classes sharing the same offset
and the first base is empty and the second class is non-empty.
Remove it for correctness.
I can't add a test case for this because -foverride-record-layout doesn't read
base class info at all. I can add that support later for testing if needed.
Reviewed By: rnk
Differential Revision: https://reviews.llvm.org/D152472
This reverts commit f5033c37025db46df95a7859d7189d09b5e3433e.
revert this patch since it causes regressions for Tensile. A
reduced test case is:
int main()
{
std::shared_ptr<float> a;
a = std::shared_ptr<float>(
(float*)std::malloc(sizeof(float) * 100),
std::free
);
return 0;
}
Will fix the issue then re-commit.
Fixes: SWDEV-405317
When a 128-bit load/store is aligned by 8, we incorrectly emit `load i16, ptr ..., align 2`
while the shadow memory address may not be aligned by 2.
This manifests as possibly-misaligned shadow memory load with `-mstrict-align`,
e.g. `clang --target=aarch64-linux -O2 -mstrict-align -fsanitize=address`
```
__attribute__((noinline)) void foo(unsigned long *ptr) {
ptr[0] = 3;
ptr[1] = 3;
}
// ldrh w8, [x9, x8] // the shadow memory load may not be aligned by 2
```
Infer the shadow memory alignment from the load/store alignment to set the
correct alignment. The generated code now uses two ldrb and one orr.
Fix https://github.com/llvm/llvm-project/issues/63258
Differential Revision: https://reviews.llvm.org/D152663
TBAA/NoAlias/AliasScope and other information is currently preserved
when upgrading to a memcpy/memset. However, this is missing when upgrading to
the macOS memset_pattern function. This adds the same alias information preservation
to memset_pattern
Reviewed By: efriedma
Differential Revision: https://reviews.llvm.org/D152934
On Apple platforms, we generate .apple_names, .apple_types,
.apple_namespaces and .apple_objc Apple accelerator tables for DWARF 4
and earlier. For DWARF 5 we should generate .debug_names, but instead we
get no accelerator tables at all.
In the backend we are correctly determining that we should be emitting
.debug_names instead of .apple_names. However, when we get to the point
of emitting the section, if the CU debug name table kind is not
"default", the accelerator table emission is skipped.
This patch sets the DebugNameTableKind to Apple in the frontend when
target an Apple target. That way we know that the CU was compiled with
the intent of emitting accelerator tables. For DWARF 4 and earlier, that
means Apple accelerator tables. For DWARF 5 and later, that means .debug
names.
Differential revision: https://reviews.llvm.org/D118754
The tensor levels are now explicitly categorized into different `LoopCondKind` to instruct LoopEmitter generate different code for different kinds of condition (e.g., `SparseCond`, `SparseSliceCond`, `SparseAffineIdxCond`, etc)
The process of generating a while loop is now dissembled into three steps and they are dispatched to different LoopCondKind handler.
1. Generate LoopCondition (e.g., `pos <= posHi` for `SparseCond`, `slice.isNonEmpty` for `SparseAffineIdxCond`)
2. Generate LoopBody (e.g., compute the coordinates)
3. Generate ExtraChecks (e.g., `if (onSlice(crd))` for `SparseSliceCond`)
Reviewed By: aartbik
Differential Revision: https://reviews.llvm.org/D152464
This is after lowering of undef to IMPLICIT_DEF, so the condition is always false. Rather than fixing the intent (which was to match implicit_def per the comment), just delete it. We're in the process of migrating away from the TA pseudos, so using _TA more often is fine.
