Commit Graph

317372 Commits

Author SHA1 Message Date
Greg Clayton
6aad81cd96 Cleanup fixed form sizes.
The fix form sizes use to have two arrays: one for 4 byte addresses and in for 8 byte addresses. The table had an issue where DW_FORM_flag_present wasn't being represented as a fixed size form because its actual size _is_ zero and zero was used to indicate the form isn't fixed in size. Any code that needed to quickly access the DWARF had to get a FixedFormSizes instance using the address byte size.

This fix cleans things up by adding a DWARFFormValue::GetFixedSize() both as a static method and as a member function on DWARFFormValue. It correctly can indicate if a form size is zero. This cleanup is a precursor to a follow up patch where I hope to speed up DWARF parsing.

I verified performance doesn't regress by loading hundreds of DWARF files and setting a breakpoint by file and line and by name in files that do not have DWARF indexes. Performance remained consistent between the two approaches.


Differential Revision: https://reviews.llvm.org/D62416

llvm-svn: 361675
2019-05-24 22:08:50 +00:00
Alina Sbirlea
b4c756dc1c Mark tests as x86.
llvm-svn: 361674
2019-05-24 21:49:27 +00:00
Alex Langford
b77a60ce40 [Target] Make Processes' GetLanguageRuntime non-virtual
llvm-svn: 361673
2019-05-24 21:27:37 +00:00
Jonas Devlieghere
7c67dec9b8 [DWARFExpression] Remove commented-out code (NFC)
llvm-svn: 361672
2019-05-24 21:26:30 +00:00
Jonas Devlieghere
0da8160df3 [dwarfdump] Add flag to limit the number of parents DIEs
This adds `-parent-recurse-depth` which limits the number of parent DIEs
being dumped.

Differential revision: https://reviews.llvm.org/D62359

llvm-svn: 361671
2019-05-24 21:11:28 +00:00
Richard Smith
de47d66191 Default arguments are potentially constant evaluated.
We need to eagerly instantiate constexpr functions used in them even if
the default argument is never actually used, because we might evaluate
portions of it when performing semantic checks.

llvm-svn: 361670
2019-05-24 21:08:12 +00:00
Jason Liu
8e1d921bb3 Implement call lowering without parameters on AIX
Summary:dd
This patch implements call lowering for calls without parameters
on AIX as initial support.

Reviewers: sfertile, hubert.reinterpretcast, aheejin, efriedma

Differential Revision: https://reviews.llvm.org/D61948

llvm-svn: 361669
2019-05-24 20:54:35 +00:00
Richard Smith
5c3b1fd9ef Refactor use-marking to better match standard terminology. No
functionality change intended.

llvm-svn: 361668
2019-05-24 20:42:25 +00:00
Reid Kleckner
a431dd7ae7 [COFF] De-virtualize Chunk and SectionChunk
Shaves another pointer off of SectionChunk, reducing the size from 96 to
88 bytes, down from 144 before I started working on this. Combined with
D62356, this reduced peak memory usage when linking chrome_child.dll
from 713MB to 675MB, or 5%.

Create NonSectionChunk to provide virtual dispatch to the rest of the
chunk types.

Reviewers: ruiu, aganea

Differential Revision: https://reviews.llvm.org/D62362

llvm-svn: 361667
2019-05-24 20:25:40 +00:00
Alex Langford
96f02a8db8 [Process] Clean up some logic around LanguageRuntimes
llvm-svn: 361666
2019-05-24 19:39:50 +00:00
Jessica Paquette
56503865ed [GlobalISel][AArch64] Improve register bank mappings for G_SELECT
The fcsel and csel instructions differ in only the register banks they work on.

So, they're entirely interchangeable otherwise.

With this in mind, this does two things:

- Teach AArch64RegisterBankInfo to consider the inputs to G_SELECT as well as
  the outputs.
- Teach it to choose the best register bank mapping based off the constraints
  of the inputs and outputs.

The "best" in this case means the one that requires the smallest number of
copies to properly emit a fcsel/csel.

For example, if the inputs are all already going to be on FPRs, we should
emit a fcsel, even if the output is a GPR. This costs one copy to produce the
result, but saves us from copying the inputs into GPRs.

Also update the regbank-select.mir to check that we end up with the right
select instruction.

Differential Revision: https://reviews.llvm.org/D62267

llvm-svn: 361665
2019-05-24 19:35:25 +00:00
Mandeep Singh Grang
0cdc5dddca [Analyzer] Checker for non-determinism caused by iteration of unordered container of pointers
Summary: Added a checker for non-determinism caused by iterating unordered containers like std::unordered_set containing pointer elements.

Reviewers: NoQ, george.karpenkov, whisperity, Szelethus, baloghadamsoftware

Reviewed By: Szelethus

Subscribers: mgorny, xazax.hun, baloghadamsoftware, szepet, rnkovacs, a.sidorin, mikhail.ramalho, donat.nagy, dkrupp, jdoerfert, Charusso, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D59279

llvm-svn: 361664
2019-05-24 19:24:08 +00:00
Don Hinton
3e8b9d4a57 [cmake] Remove old unused version of FindZ3.cmake from clang [NFC]
Summary: This file was moved to llvm in D54978, r356929, but the old
file was never removed.

Reviewed By: beanz

Tags: #clang

Differential Revision: https://reviews.llvm.org/D62343

llvm-svn: 361663
2019-05-24 19:21:21 +00:00
Aaron Ballman
4934f95000 Adding an explicit triple to this test to appease build bots.
llvm-svn: 361662
2019-05-24 19:19:00 +00:00
Nick Desaulniers
33bc64202b [AArch64] check for INLINEASM_BR along w/ INLINEASM
Summary:
It looks like since INLINEASM_BR was created off of INLINEASM, a few
checks for INLINEASM needed to be updated to check for either case.

pr/41999

Reviewers: t.p.northover, peter.smith

Reviewed By: peter.smith

Subscribers: craig.topper, javed.absar, kristof.beyls, hiraditya, llvm-commits, peter.smith, srhines

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D62402

llvm-svn: 361661
2019-05-24 19:00:13 +00:00
Aaron Ballman
fa643d7071 Add JSON dumping tests for ObjC statements; add support for dumping @catch catch-all statements.
llvm-svn: 361660
2019-05-24 18:58:29 +00:00
Nick Desaulniers
9f7bd71cf5 [ARM] additionally check for ARM::INLINEASM_BR w/ ARM::INLINEASM
Summary:
We were observing failures for arm32 allyesconfigs of the Linux kernel
with the asm goto Clang patch, where ldr's were being generated to
offsets too far away to encode in imm12.

It looks like since INLINEASM_BR was created off of INLINEASM, a few
checks for INLINEASM needed to be updated to check for either case.

pr/41999

Link: https://github.com/ClangBuiltLinux/linux/issues/490

Reviewers: peter.smith, kristof.beyls, ostannard, rengolin, t.p.northover

Reviewed By: peter.smith

Subscribers: jyu2, javed.absar, hiraditya, llvm-commits, nathanchance, craig.topper, kees, srhines

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D62400

llvm-svn: 361659
2019-05-24 18:58:21 +00:00
Gheorghe-Teodor Bercea
93d2c8a646 [OpenMP] Add test for requires and unified shared memory clause with declare target link
Summary:
This patch adds a test for requires with unified share memory clause when a declare target link is present.

This test needs to go in prior to changes to declare target link for comparison purposes.

Reviewers: ABataev, caomhin

Reviewed By: ABataev

Subscribers: guansong, jdoerfert, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D62407

llvm-svn: 361658
2019-05-24 18:48:42 +00:00
Reid Kleckner
56bee1a90a [COFF] Replace OutputSection* with uint16_t index in Chunk
Shaves another 8 bytes off of SectionChunk, the most commonly allocated
type in LLD.

These indices are only valid after we've assigned chunks to output
sections and removed empty sections, so do that in a new pass.

Reviewers: ruiu, aganea

Differential Revision: https://reviews.llvm.org/D62356

llvm-svn: 361657
2019-05-24 18:25:49 +00:00
Matt Arsenault
3d59e388ca AMDGPU: Activate all lanes when spilling CSR VGPR for SGPR spills
If some lanes weren't active on entry to the function, this could
clobber their VGPR values.

llvm-svn: 361655
2019-05-24 18:18:51 +00:00
Alina Sbirlea
21efe2afed [NewPassManager] Add tuning option: LoopUnrolling [clang-change]
Summary:
Use CodeGenOpts's setting for loop unrolling.
[to be coupled with D61618]

Reviewers: chandlerc

Subscribers: jlebar, dmgreen, cfe-commits, llvm-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D61620

llvm-svn: 361653
2019-05-24 17:40:52 +00:00
Aaron Ballman
4105882b87 Add support for dumping Objective C AST declaration nodes to JSON.
llvm-svn: 361652
2019-05-24 17:39:55 +00:00
Sam Clegg
cebce0d49a [WebAssembly] Use "linker" as linker shortname.
This is in line with other platforms.

Also, move the single statement methods into the header (also
in line with other platform).

Differential Revision: https://reviews.llvm.org/D62406

llvm-svn: 361651
2019-05-24 17:36:07 +00:00
Shafik Yaghmour
468724eed2 [ASTImporter] Call to HandleNameConflict in VisitRecordDecl mistakeningly using Name instead of SearchName
Summary:
https://reviews.llvm.org/D51633 added error handling to the ASTNodeImporter::VisitRecordDecl for the conflicting names case. This could lead to erroneous return of an error in that case since we should have been using SearchName. Name may be empty in the case where we find the name via D->getTypedefNameForAnonDecl()->getDeclName().

This fix is very similar to https://reviews.llvm.org/D59665

Differential Revision: https://reviews.llvm.org/D62352

llvm-svn: 361650
2019-05-24 16:53:44 +00:00
Matt Arsenault
0ff901fba0 AMDGPU: Boost inline threshold with addrspacecasted alloca arguments
This was skipping GetUnderlyingObject for nonprivate addresses, but an
alloca could also be found through an addrspacecast if it's flat.

llvm-svn: 361649
2019-05-24 16:52:35 +00:00
Sanjay Patel
6f7734a125 [LoopVectorize] update test to be independent of instcombine; NFC
This is a regression test for vectorization, so remove instcombine
from the RUN line and adjust the comparison predicates to show what
the vectorizer is creating rather than how instcombine cleans it up.

llvm-svn: 361648
2019-05-24 16:46:09 +00:00
Yitzhak Mandelbaum
5b33554319 [clang-tidy] In TransformerClangTidyCheck, require Explanation field.
Summary:
In general, the `Explanation` field is optional in `RewriteRule` cases. But,
because the primary purpose of clang-tidy checks is to provide users with
diagnostics, we assume that a missing explanation is a bug.  This change adds an
assertion that checks all cases for an explanation, and updates the code to rely
on that assertion correspondingly.

Reviewers: ilya-biryukov

Subscribers: xazax.hun, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D62340

llvm-svn: 361647
2019-05-24 16:32:03 +00:00
Chris Bieneman
07745a131f [CMake] Fix issues building runtimes
This resolves two issues:
(1) LIBCXX_HEADER_DIR is a very misleadingly named variable because it shouldn't be set to the header directory, instead it needs to be the root binary dir.
(2) If you build runtimes without libcxx, we can't depend on the libcxx header target, so we should instaed refer to it by the variable name which will be unset if libcxx isn't present.

llvm-svn: 361646
2019-05-24 16:21:38 +00:00
Ilya Biryukov
47fd4f06c5 [CodeComplete] Add whitespace around braces in lambda completions
This produces nicer output.
Trivial follow-up to r361461, so sending without review.

llvm-svn: 361645
2019-05-24 16:16:15 +00:00
Alexander Timofeev
dffedea014 [AMDGPU] Divergence driven ISel. Assign register class for cross block values according to the divergence.
Details: To make instruction selection really divergence driven it is necessary to assign
         the correct register classes to the cross block values beforehand. For the divergent targets
         same value type requires different register classes dependent on the value divergence.

Reviewers: rampitec, nhaehnle

Differential Revision: https://reviews.llvm.org/D59990

llvm-svn: 361644
2019-05-24 15:32:18 +00:00
Yitzhak Mandelbaum
fab7205ac4 [LibTooling] Add Explanation parameter to makeRule.
Summary:
Conceptually, a single-case RewriteRule has a matcher, edit(s) and an (optional)
explanation. `makeRule` previously only took the matcher and edit(s). This
change adds (optional) support for the explanation.

Reviewers: ilya-biryukov

Subscribers: cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D62390

llvm-svn: 361643
2019-05-24 15:11:45 +00:00
George Rimar
c1cc8d0eca [llvm-objcopy] - Strip undefined symbols if they are no longer referenced following --only-section
This is https://bugs.llvm.org/show_bug.cgi?id=40004.

In this patch I teach llvm-objcopy to remove undefined symbols if
them are not used anymore after applying -j/--only-section option.

Differential revision: https://reviews.llvm.org/D62317

llvm-svn: 361642
2019-05-24 15:04:50 +00:00
Kevin Petit
aa7754cc90 [OpenCL] Add support for the cl_arm_integer_dot_product extensions
The specification is available in the Khronos OpenCL registry:

https://www.khronos.org/registry/OpenCL/extensions/arm/cl_arm_integer_dot_product.txt

Signed-off-by: Kevin Petit <kevin.petit@arm.com>
llvm-svn: 361641
2019-05-24 14:53:52 +00:00
Nico Weber
c0ea5b2d51 gn build: Merge r361607
llvm-svn: 361640
2019-05-24 14:24:25 +00:00
Sam Clegg
a5ca34e6b3 [WebAssebmly] Add support for --wrap
The code for implementing this features is taken almost verbatim
from the ELF backend.

Fixes: https://bugs.llvm.org/show_bug.cgi?id=41681

Differential Revision: https://reviews.llvm.org/D62380

llvm-svn: 361639
2019-05-24 14:14:25 +00:00
Alexey Bataev
e1947b84c1 Revert "[OPENMP][NVPTX]Fix barriers and parallel level counters, NFC."
This reverts commit r361421 to split the patch into 3 parts.

llvm-svn: 361638
2019-05-24 14:06:47 +00:00
Andrea Di Biagio
21977d8e29 [MCA] Zero-initialize field CRD in InstructionBase. Also run clang-format on a couple of files. NFC
llvm-svn: 361637
2019-05-24 13:56:01 +00:00
Sam Clegg
7991b68284 [lld] Trace all references with lld --trace-symbol
Previously undefined symbol references were only traced if they were
seen before that definition.

Fixes https://bugs.llvm.org/show_bug.cgi?id=41878

Differential Revision: https://reviews.llvm.org/D61929

llvm-svn: 361636
2019-05-24 13:29:17 +00:00
Sam Clegg
35be7ff80c [WebAssembly] Add support for -emit-relocs
This can be useful for post-link tools and for testing.  Sometimes
it can be useful to produces a regular executable but with relocations
preserved.

Differential Revision: https://reviews.llvm.org/D62378

llvm-svn: 361635
2019-05-24 13:28:27 +00:00
Rui Ueyama
74de6203ef [LLD][COFF] Implement /filealign parameter
Patch by Stefan Schmidt.

This adds the /filealign parameter to lld, which allows to specify the
section alignment in the output file (as it does on Microsoft's
link.exe).

This is required to be able to load dynamically linked libraries on the
original Xbox, where the debugger monitor expects the section alignment
in the file to be the same as in memory.

llvm-svn: 361634
2019-05-24 12:42:36 +00:00
Simon Atanasyan
8362cbe13b [llvm-readobj] Implement GNU-style output for dynamic table
GNU readelf tool prints slightly different dynamic table "header" and
surrounds dynamic tag names by brackets. This patch implements the same
formatting for GNU-style output of the `llvm-readobj`.

LLVM
```
DynamicSection [ (13 entries)
  Tag        Type                 Name/Value
  0x00000006 SYMTAB               0x168
  ...
]
```

GNU
```
Dynamic section at offset 0x1d0 contains 13 entries:
  Tag        Type                 Name/Value
  0x00000006 (SYMTAB)             0x168
  ...
```

Differential Revision: https://reviews.llvm.org/D62256

llvm-svn: 361633
2019-05-24 12:22:53 +00:00
Stefan Pintilie
522307fa40 [PowerPC] Remove CRBits Copy Of Unset/set CBit
For the situation, where we generate the following code:

       crxor 8, 8, 8
       < Some instructions>
.LBB0_1:
       < Some instructions>
       cror 1, 8, 8

cror (COPY of CRbit) depends on the result of the crxor instruction.
CR8 is known to be zero as crxor is equivalent to CRUNSET. We can simply use
crxor 1, 1, 1 instead to zero out CR1, which does not have any dependency on
any previous instruction.

This patch will optimize it to:

        < Some instructions>
.LBB0_1:
        < Some instructions>
        cror 1, 1, 1

Patch By: Victor Huang (NeHuang)

Differential Revision: https://reviews.llvm.org/D62044

llvm-svn: 361632
2019-05-24 12:05:37 +00:00
George Rimar
33bee053c3 Revert r361630 "[llvm-readelf] - Allow dumping of the .dynamic section even if there is no PT_DYNAMIC header."
It broke BB:
http://lab.llvm.org:8011/builders/ppc64le-lld-multistage-test/builds/3748

llvm-svn: 361631
2019-05-24 11:24:42 +00:00
George Rimar
f835fcf412 [llvm-readelf] - Allow dumping of the .dynamic section even if there is no PT_DYNAMIC header.
It is now possible after D61937 was landed and was discussed
in it's review comments. It is not consistent with GNU, which
does not output .dynamic section content in this case for
no visible reason.

Differential revision: https://reviews.llvm.org/D62179

llvm-svn: 361630
2019-05-24 11:12:50 +00:00
Dmitri Gribenko
b7f2a2b4c0 Make cppcoreguidelines-pro-type-member-init-use-assignment.cpp pass on platforms where char is unsigned
The other options are to completely specify the triple (reduces test
coverage), or to specify a regex that allows either '0' or '0U' for char
initializers, however, that relaxes the test.

llvm-svn: 361629
2019-05-24 10:50:15 +00:00
Dmitri Gribenko
f2d5b7a4fa Made cppcoreguidelines-pro-type-member-init-use-assignment run in all language modes
llvm-svn: 361628
2019-05-24 10:39:00 +00:00
Cullen Rhodes
b3e58df80c [AArch64][SVE2] Asm: support SVE2 String Processing Group
Summary:
Patch adds support for the SVE2 character match instructions MATCH and NMATCH.

The specification can be found here:
https://developer.arm.com/docs/ddi0602/latest

Reviewed By: SjoerdMeijer

Differential Revision: https://reviews.llvm.org/D62206

llvm-svn: 361627
2019-05-24 10:32:01 +00:00
Simon Atanasyan
e4f01ec50c [llvm-readobj][mips] Align GOT columns headers properly in 64-bit case
llvm-svn: 361626
2019-05-24 10:26:48 +00:00
Ilya Biryukov
0f748e6e9b [clangd] Limit the size of synthesized fix message
Summary: A temporary workaround until we figure out a better way to present fixes.

Reviewers: kadircet

Reviewed By: kadircet

Subscribers: MaskRay, jkorous, arphaman, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D62372

llvm-svn: 361625
2019-05-24 10:26:23 +00:00
Cullen Rhodes
adb1d74bf9 [AArch64][SVE2] Asm: support SVE2 Narrowing Group
Summary:
Patch adds support for the following instructions:

SVE2 bitwise shift right narrow:
    * SQSHRUNB, SQSHRUNT, SQRSHRUNB, SQRSHRUNT, SHRNB, SHRNT, RSHRNB, RSHRNT,
      SQSHRNB, SQSHRNT, SQRSHRNB, SQRSHRNT, UQSHRNB, UQSHRNT, UQRSHRNB,
      UQRSHRNT

SVE2 integer add/subtract narrow high part:
    * ADDHNB, ADDHNT, RADDHNB, RADDHNT, SUBHNB, SUBHNT, RSUBHNB, RSUBHNT

SVE2 saturating extract narrow:
    * SQXTNB, SQXTNT, UQXTNB, UQXTNT, SQXTUNB, SQXTUNT

The specification can be found here:
https://developer.arm.com/docs/ddi0602/latest

Reviewed By: SjoerdMeijer

Differential Revision: https://reviews.llvm.org/D62205

llvm-svn: 361624
2019-05-24 10:22:30 +00:00