417766 Commits

Author SHA1 Message Date
Stella Stamenova
8bd1988e74 [lldb] Skip Test11588 on Windows
The test was marked as XFAIL on Windows, but recent changes have made it flaky instead
2022-03-14 09:26:41 -07:00
Jonas Devlieghere
f51d7e4bae
Fix the implicit module build
This fixes the implicit module build after b1b4b6f36695 broke the LLDB
build: https://green.lab.llvm.org/green/view/LLDB/job/lldb-cmake/42084/
2022-03-14 09:24:17 -07:00
Jonas Devlieghere
5e65e79bac
[lldb] Move ProgressEventData out of debugger and into its own file (NFC)
Move ProgressEventData out of debugger and into its own file. This is in
preparation of adding a few new type of event data for diagnostics.

Differential revision: https://reviews.llvm.org/D121506
2022-03-14 09:24:17 -07:00
Nikita Popov
04b717c423 [TLI] Check that malloc argument has type size_t
DSE assumes that this is the case when forming a calloc from a
malloc + memset pair.

For tests, either update the malloc signature or change the
data layout.
2022-03-14 17:22:24 +01:00
Matthias Springer
de5022c7d7 [mlir][vector] Implement unrolling of ReductionOp
Differential Revision: https://reviews.llvm.org/D121597
2022-03-15 01:21:24 +09:00
Sam Clegg
20f7f733fe [WebAssembly] Rename member in WasmYAML.h to avoid compiler warning
Followup/fix for https://reviews.llvm.org/D121349.
2022-03-14 09:09:43 -07:00
Keith Smiley
5da83eeb91 clang-tidy: discover binaries in build dir
This changes the clang-tidy script to discover binaries you've built
locally without having to pass them.

Differential Revision: https://reviews.llvm.org/D100692
2022-03-14 09:04:36 -07:00
Sam Clegg
9504ab32b7 [WebAssembly] Second phase of implemented extended const proposal
This change continues to lay the ground work for supporting extended
const expressions in the linker.

The included test covers object file reading and writing and the YAML
representation.

Differential Revision: https://reviews.llvm.org/D121349
2022-03-14 08:55:47 -07:00
Nikita Popov
8361c5da30 [SLPVectorizer] Handle external load/store pointer uses with opaque pointers
In this case we may not generate a bitcast, so the new load/store
becomes the external user.
2022-03-14 16:55:09 +01:00
Ayush Sahay
d506a9ef2b [lldb] Require native for command-thread-siginfo.test
command-thread-siginfo.test employs a subject with a call to wait, and
thus requires system-linux. However, it's possible to target non-Linux
platforms despite operating on Linux hosts. So, have it require native
too.

Reviewed By: mgorny, labath

Differential Revision: https://reviews.llvm.org/D121487
2022-03-14 21:20:21 +05:30
Florian Hahn
d621ae30e2
[LV] Remove dead Loop argument from emitMinimumVector... (NFC)
The argument is not used, remove it.
2022-03-14 15:47:40 +00:00
Michael Kruse
5c02808131 [polly] Introduce -polly-print-* passes to replace -analyze.
The `opt -analyze` option only works with the legacy pass manager and might be removed in the future, as explained in llvm.org/PR53733. This patch introduced -polly-print-* passes that print what the pass would print with the `-analyze` option and replaces all uses of `-analyze` in the regression tests.

There are two exceptions: `CodeGen\single_loop_param_less_equal.ll` and `CodeGen\loop_with_condition_nested.ll` use `-analyze on the `-loops` pass which is not part of Polly.

Reviewed By: aeubanks

Differential Revision: https://reviews.llvm.org/D120782
2022-03-14 10:27:15 -05:00
Thomas Raoux
f69175b1e6 [mlir][vector] Add unrolling pattern for multidim_reduce op
Implement the vectorLoopUnroll interface for MultiDimReduceOp and add a
pattern to do the unrolling following the same interface other vector
unroll patterns.

Differential Revision: https://reviews.llvm.org/D121263
2022-03-14 15:22:24 +00:00
Nikita Popov
f00cd27646 [Verifier] Verify llvm.access.group metadata
According to LangRef, an access scope must have zero operands and
be distinct. The access group may either be a single access scope
or a list of access scopes.

LoopInfo may assert if this is not the case.
2022-03-14 16:16:36 +01:00
Nemanja Ivanovic
766ca2c59e [PowerPC] Add missed VSX shuffles instead of Altivec ones
VSX introduced some permute instructions that are direct
replacements for Altivec ones except they can target all
the VSX registers. We have added code generation for most
of these but somehow missed the low/hi word merges (XXMRG[LH]W).
This caused some additional spills on some large
computationally intensive code.

This patch simply adds the missed patterns.
2022-03-14 10:11:54 -05:00
Marek Kurdej
a6b2f50fb4 Revert "[clang-format] Correctly format variable templates."
This reverts commit a140b7104fdae0d9eff5b18efbc784754e0ca274.

It provoked the bug https://github.com/llvm/llvm-project/issues/54374.
2022-03-14 16:04:09 +01:00
Simon Moll
3297571e32 [VE] v256f32|64 fma isel
llvm.fma|fmuladd vp.fma isel and tests

Reviewed By: kaz7

Differential Revision: https://reviews.llvm.org/D121477
2022-03-14 15:59:13 +01:00
Nico Weber
17414150cf [lld-link] Tweak winsysroottest.test to have passing links on happy path
Previously, the test checked for a "undefined symbol" error
(instead of the "could not open std*.lib" which would happen without
the flag).

Instead, use /entry: so that the link succeeds.

No behavior change, but maybe makes the test a bit easier to understand.

Differential Revision: https://reviews.llvm.org/D121553
2022-03-14 10:44:26 -04:00
Aaron Ballman
9e3e85ac6e Silence -Wlogical-op-parentheses and fix a logic bug while doing so 2022-03-14 10:13:39 -04:00
Tue Ly
58edd26255 [libc] Include -150 to the special cases at the beginning of exp2f function. 2022-03-14 10:06:27 -04:00
Nikita Popov
da48f08abf [SCCP][IR] Landing pads are not safe to remove
For landingpads with {} type, SCCP ended up dropping them, because
we considered them as safe to remove.
2022-03-14 14:59:32 +01:00
Tue Ly
64721a3312 [libc] Implement exp2f function that is correctly rounded for all rounding modes.
Implement exp2f function that is correctly rounded for all rounding modes.

Reviewed By: sivachandra, zimmermann6

Differential Revision: https://reviews.llvm.org/D121463
2022-03-14 09:42:37 -04:00
Aaron Ballman
8cba72177d Implement literal suffixes for _BitInt
WG14 adopted N2775 (http://www.open-std.org/jtc1/sc22/wg14/www/docs/n2775.pdf)
at our Feb 2022 meeting. This paper adds a literal suffix for
bit-precise types that automatically sizes the bit-precise type to be
the smallest possible legal _BitInt type that can represent the literal
value. The suffix chosen is wb (for a signed bit-precise type) which
can be combined with the u suffix (for an unsigned bit-precise type).

The preprocessor continues to operate as-if all integer types were
intmax_t/uintmax_t, including bit-precise integer types. It is a
constraint violation if the bit-precise literal is too large to fit
within that type in the context of the preprocessor (when still using
a pp-number preprocessing token), but it is not a constraint violation
in other circumstances. This allows you to make bit-precise integer
literals that are wider than what the preprocessor currently supports
in order to initialize variables, etc.
2022-03-14 09:24:19 -04:00
Erich Keane
dc152659b4 Have cpu-specific variants set 'tune-cpu' as an optimization hint
Due to various implementation constraints, despite the programmer
choosing a 'processor' cpu_dispatch/cpu_specific needs to use the
'feature' list of a processor to identify it. This results in the
identified processor in source-code not being propogated to the
optimizer, and thus, not able to be tuned for.

This patch changes to use the actual cpu as written for tune-cpu so that
opt can make decisions based on the cpu-as-spelled, which should better
match the behavior expected by the programmer.

Note that the 'valid' list of processors for x86 is in
llvm/include/llvm/Support/X86TargetParser.def. At the moment, this list
contains only Intel processors, but other vendors may wish to add their
own entries as 'alias'es (or with different feature lists!).

If this is not done, there is two potential performance issues with the
patch, but I believe them to be worth it in light of the improvements to
behavior and performance.

1- In the event that the user spelled "ProcessorB", but we only have the
features available to test for "ProcessorA" (where A is B minus
features),
AND there is an optimization opportunity for "B" that negatively affects
"A", the optimizer will likely choose to do so.

2- In the event that the user spelled VendorI's processor, and the
feature
list allows it to run on VendorA's processor of similar features, AND
there
is an optimization opportunity for VendorIs that negatively affects
"A"s,
the optimizer will likely choose to do so. This can be fixed by adding
an
alias to X86TargetParser.def.

Differential Revision: https://reviews.llvm.org/D121410
2022-03-14 06:14:30 -07:00
Matthias Springer
975284ab4b [mlir][bufferization] Update public MLIR documentation
Differential Revision: https://reviews.llvm.org/D121071
2022-03-14 22:13:41 +09:00
Florian Hahn
3ee2d908a9
[LV] Remove dead Loop argument from emitSCEVChecks. (NFC)
The argument is not used, remove it.
2022-03-14 13:00:03 +00:00
Nikita Popov
ce6ca00a92 [CoroSplit] Avoid self-replacement
With opaque pointers, the bitcast might be a no-op, and this can
end up trying to replace a value with itself, which is illegal.
2022-03-14 13:53:31 +01:00
Egor Zhdan
6ca2f1938f [Clang][Sema] Avoid crashing for __builtin_memcpy_inline with an array argument
This change teaches the Sema logic for `__builtin_memcpy_inline` to implicitly convert arrays passed as arguments to pointers, similarly to regular `memcpy`.

This code will no longer cause a compiler crash:
```
void f(char *p) {
    char s[1] = {0};
    __builtin_memcpy_inline(p, s, 1);
}
```

rdar://88147527

Differential Revision: https://reviews.llvm.org/D121475
2022-03-14 12:47:30 +00:00
Florian Hahn
8896c36624
[LV] Do not set insert point in completeLoopSkeleton. (NFCI)
The insertion point for the builder used during VPlan code generation is
set during code generation. Setting the insert point here is dead code
and can be removed.
2022-03-14 12:21:26 +00:00
Nikita Popov
3ec44c22b1 [DeadArgElim] Guard against function type mismatch
If the call function type and function type don't match, we should
consider the function live (there is effectively a bitcast
sitting in between).
2022-03-14 13:03:04 +01:00
Nikita Popov
cf18ec445d [GVN] Check load type in select PRE
This is no longer implicitly guaranteed with opaque pointers.
2022-03-14 12:46:54 +01:00
Björn Schäpers
35abbf166d [clang-format] Fix crash on asm block with label
Fixes https://github.com/llvm/llvm-project/issues/54349

Differential Revision: https://reviews.llvm.org/D121559
2022-03-14 12:44:48 +01:00
Björn Schäpers
b7494a1d72 [clang-format][NFC] Left renamed to OpeningBrace...
in TokenAnnotator::parseBrace. Left is misleading, because we have a
loop and Left does not move.

Also return early.

Differential Revision: https://reviews.llvm.org/D121558
2022-03-14 12:44:47 +01:00
Björn Schäpers
acd17a2be8 [clang-format] Fix crash on invalid requires expression
Fixes https://github.com/llvm/llvm-project/issues/54350

Differential Revision: https://reviews.llvm.org/D121550
2022-03-14 12:44:46 +01:00
Björn Schäpers
2d8e907016 [clang-format][NFC] Rename Left to OpeningParen...
in TokenAnnotator::parseParens(). Left is misleading since we have a
loop and Left is not adjusted.

Differential Revision: https://reviews.llvm.org/D121557
2022-03-14 12:44:45 +01:00
Benoit Jacob
9879c555f2 Expose ScalarizerPass options to C++ (not just commandline)
Context: I needed this for https://github.com/google/iree/pull/8474 .
I found that TSan instrumentation expects vector sizes to be <= 16,
and in my project (IREE) we have tests with higher vector sizes.
That left some test functions uninstrumented, resulting in crashes as
instrumented code called into them.

Differential Revision: https://reviews.llvm.org/D121182
2022-03-14 12:00:35 +01:00
Marek Kurdej
2507e0a257 [clang-format] Clean up UnwrappedLineParser::parseRecord. NFC. 2022-03-14 11:59:52 +01:00
Simon Pilgrim
1f09c7d16d [X86] Update AVX512 VBMI2 VL intrinsic tests to avoid adds
As noticed in D119654, by adding the masked intrinsics results together we can end up with the selects being canonicalized away from the intrinsic - this isn't what we want to test here so replace with a insertvalue chain into a aggregate instead to retain all the results.
2022-03-14 10:57:27 +00:00
gysit
7294be2b8e [mlir][linalg] Replace linalg.fill by OpDSL variant.
The revision removes the linalg.fill operation and renames the OpDSL generated linalg.fill_tensor operation to replace it. After the change, all named structured operations are defined via OpDSL and there are no handwritten operations left.

A side-effect of the change is that the pretty printed form changes from:
```
%1 = linalg.fill(%cst, %0) : f32, tensor<?x?xf32> -> tensor<?x?xf32>
```
changes to
```
%1 = linalg.fill ins(%cst : f32) outs(%0 : tensor<?x?xf32>) -> tensor<?x?xf32>
```
Additionally, the builder signature now takes input and output value ranges as it is the case for all other OpDSL operations:
```
rewriter.create<linalg::FillOp>(loc, val, output)
```
changes to
```
rewriter.create<linalg::FillOp>(loc, ValueRange{val}, ValueRange{output})
```
All other changes remain minimal. In particular, the canonicalization patterns are the same and the `value()`, `output()`, and `result()` methods are now implemented by the FillOpInterface.

Depends On D120726

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D120728
2022-03-14 10:51:08 +00:00
Valentin Clement
836e34f727
[flang][NFC] Use TODO with location
Use the TODO macro in `flang/Lower/Todo.h` with the converter location.

This patch is part of the upstreaming effort from fir-dev branch.

Reviewed By: jeanPerier

Differential Revision: https://reviews.llvm.org/D121582
2022-03-14 11:50:06 +01:00
Kazushi (Jam) Marukawa
9260592141 [VE] Support more intrinsics
Support new intrinsics for following instrauctions.
  - VLDZ, VPCNT, VBRV
  - LCR, SCR, TSCR, FIDCR
  - FENCE
Also clean the intrinsics implementation of a following instruction.
  - SVOB

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D121509
2022-03-14 19:17:15 +09:00
Simon Moll
f318d1e26b [VE] v256i32|64 reduction isel and tests
and|add|or|xor|smax v256i32|64 isel and tests for vp and vector.reduce
intrinsics

Reviewed By: kaz7

Differential Revision: https://reviews.llvm.org/D121469
2022-03-14 11:10:38 +01:00
Valentin Clement
f5b29a7a96
[flang][NFC] Add todo in CallInterface
Add a todo for assumed shape dummy argument with VALUE attribute
since this is not implemented yet.

This patch is part of the upstreaming effort from fir-dev branch.

Reviewed By: jeanPerier

Differential Revision: https://reviews.llvm.org/D121581
2022-03-14 10:42:52 +01:00
Simon Moll
a5f1262332 [VE] v256.32|64 gather|scatter isel and tests
This adds support for v256.32|64 scatter|gather isel.  vp.gather|scatter
and regular gather|scatter intrinsics are both lowered to the internal
VVP layer.  Splitting these ops on v512.32 is the subject of future
patches.

Reviewed By: kaz7

Differential Revision: https://reviews.llvm.org/D121288
2022-03-14 10:38:56 +01:00
Diana Picus
873f081e5a [flang] Add runtime support for GET_COMMAND
Implement the GET_COMMAND intrinsic.
Add 2 new parameters (sourceFile and line) so we can create a terminator
for RUNTIME_CHECKs.

Differential Revision: https://reviews.llvm.org/D118777
2022-03-14 09:35:45 +00:00
David Sherwood
e7b89c2fc3 Add BasicTTIImpl cost model for llvm.get.active.lane.mask intrinsic
The vectoriser sometimes generates predicated vector loops using
the llvm.get.active.lane.mask intrinsic so it's important that we
are able to calculate a valid cost for the call instruction. When
SVE is enabled we are able to use a single whilelo instruction
for some vector types - in such cases I've marked the cost as 1.
For all other cases I've set the cost according to how the intrinsic
will be expanded.

Tests added here:

  Analysis/CostModel/AArch64/sve-intrinsics.ll
  Analysis/CostModel/ARM/active_lane_mask.ll
  Analysis/CostModel/RISCV/active_lane_mask.ll

Differential Revision: https://reviews.llvm.org/D121109
2022-03-14 09:35:05 +00:00
Jean Perier
30a0fbf51f [flang] Add support for linkonce_odr in FIR
Add support for parsing and converting linkonce_odr in FIR.

Differential Revision: https://reviews.llvm.org/D121471
2022-03-14 10:24:44 +01:00
Simon Moll
d22ce76999 [VE] Transfer backend ownership
Kazushi Marukawa (kaz7) of NEC Solution Innovators will take over my
role as a code owner for the Vector Engine target. Erich Focht (efocht)
of NEC will assume the administrator role for the clang-ve-ninja
buildbot.

Reviewed By: kaz7

Differential Revision: https://reviews.llvm.org/D121453
2022-03-14 09:18:40 +01:00
gysit
f2f89751e4 [mlir][linalg] Use explicit replace in canonicalization pattern (NFC).
Introduce an explicit `replaceOp` call to enable the tracking of the producer LinalgOp.

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D121369
2022-03-14 07:09:51 +00:00
Mehdi Amini
a8648b454e Add cmake_parse_arguments() to tablegen() CMake function
This support "DEPENDS" and "EXTRA_INCLUDES", allowing in particular
to inject include paths to a tablegen targets without forcing to go
through the global INCLUDE_DIRECTORIES property.

Differential Revision: https://reviews.llvm.org/D121568
2022-03-14 06:56:11 +00:00