Commit Graph

374230 Commits

Author SHA1 Message Date
Amara Emerson
2ac4d0f45a [AArch64] Fix some minor coding style issues in AArch64CompressJumpTables 2020-12-07 12:48:09 -08:00
Nathan James
a61d508473
[llvm][NFC] Made RefCountBase constructors protected
Matches ThreadSafeRefCountBase and forces the class to be inherited.
2020-12-07 20:23:11 +00:00
Nathan James
dc361d5c2a
[llvm] Add asserts in (ThreadSafe)?RefCountedBase destructors
Added a trivial destructor in release mode and in debug mode a destructor that asserts RefCount is indeed zero.
This ensure people aren't manually (maybe accidentally) destroying these objects like in this contrived example.
```lang=c++
{
  std::unique_ptr<SomethingRefCounted> Object;
  holdIntrusiveOwnership(Object.get());
  // Object Destructor called here will assert.
}
```

Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D92480
2020-12-07 20:20:08 +00:00
Derek Schuff
0a391060f1 [WebAssembly] Add Object and ObjectWriter support for wasm COMDAT sections
Allow sections to be placed into COMDAT groups, in addtion to functions and data
segments.

Also make section symbols unnamed, which allows sections with identical names
(section names are independent of their section symbols, but previously we
gave the symbols the same name as their sections, which results in collisions
when sections are identically-named).

Differential Revision: https://reviews.llvm.org/D92691
2020-12-07 12:12:44 -08:00
Sanjay Patel
5fe1a49f96 [SLP] fix typo in debug string; NFC 2020-12-07 15:09:21 -05:00
Aart Bik
74cd9e587d [mlir][sparse] hoist loop invariant tensor loads in sparse compiler
After bufferization, the backend has much more trouble hoisting loop invariant
loads from the loops generated by the sparse compiler. Therefore, this is done
during sparse code generation. Note that we don't bother hoisting derived
invariant expressions on SSA values, since the backend does that very well.

Still TBD: scalarize reductions to avoid load-add-store cycles

Reviewed By: penpornk

Differential Revision: https://reviews.llvm.org/D92534
2020-12-07 11:59:48 -08:00
Erich Keane
1c98f98410 Stop ExtractTypeForDeductionGuide from recursing on TypeSourceInfo
As reported in PR48177, the type-deduction extraction ends up going into
an infinite loop when the type referred to has a recursive definition.
This stops recursing and just substitutes the type-source-info the
TypeLocBuilder identified when transforming the base.
2020-12-07 11:29:57 -08:00
Bardia Mahjour
4db9b78c81 [LV] Epilogue Vectorization with Optimal Control Flow - Default Enablement
This patch enables epilogue vectorization by default per reviewer requests.

Differential Revision: https://reviews.llvm.org/D89566
2020-12-07 14:29:36 -05:00
Yu Shan
3ce78f54ed [analyzer] Ignore annotations if func is inlined.
When we annotating a function header so that it could be used by other
TU, we also need to make sure the function is parsed correctly within
the same TU. So if we can find the function's implementation,
ignore the annotations, otherwise, false positive would occur.
Move the escape by value case to post call and do not escape the handle
if the function is inlined and we have analyzed the handle.

Differential Revision: https://reviews.llvm.org/D91902
2020-12-07 11:28:11 -08:00
Valentin Clement
875b4fd5ee [flang][openacc] Add clause validity tests for the kernels directive
Add some clause validity tests for the kernels directive

Reviewed By: sameeranjoshi

Differential Revision: https://reviews.llvm.org/D91873
2020-12-07 14:27:18 -05:00
Stanislav Mekhanoshin
dd89249498 [AMDGPU] Annotate vgpr<->agpr spills in asm
Differential Revision: https://reviews.llvm.org/D92125
2020-12-07 11:25:25 -08:00
Marek Kurdej
bf8683adfa [libc++] [docs] Mark LWG3055 as complete. Use string_view instead of string in path::operator+=(ECharT).
The issue didn't change the behaviour which is tested in libcxx/test/std/input.output/filesystems/class.path/path.member/path.concat.pass.cpp.

The change to use string_view instead of string is not strictly necessary.

<filesystem> was added in commit 998a5c8831 (Implement <filesystem>).

Reviewed By: #libc, ldionne

Differential Revision: https://reviews.llvm.org/D92731
2020-12-07 20:18:09 +01:00
Florian Hahn
32825e8636
[ConstraintElimination] Tweak placement in pipeline.
This patch adds the ConstraintElimination pass to the LTO pipeline and
also runs it after SCCP in the function simplification pipeline.

This increases the number of cases we can elimination. Pending further
tuning.
2020-12-07 19:08:40 +00:00
Jennifer Yu
f8d5b49c78 Fix missing error for use of 128-bit integer inside SPIR64 device code.
Emit error for use of 128-bit integer inside device code had been
already implemented in https://reviews.llvm.org/D74387.  However,
the error is not emitted for SPIR64, because for SPIR64, hasInt128Type
return true.

hasInt128Type: is also used to control generation of certain 128-bit
predefined macros, initializer predefined 128-bit integer types and
build 128-bit ArithmeticTypes.  Except predefined macros, only the
device target is considered, since error only emit when 128-bit
integer is used inside device code, the host target (auxtarget) also
needs to be considered.

The change address:
1. (SPIR.h) Correct hasInt128Type() for SPIR targets.
2. Sema.cpp and SemaOverload.cpp: Add additional check to consider host
   target(auxtarget) when call to hasInt128Type.  So that __int128_t
   and __int128() are allowed to avoid error when they used outside
   device code.
3. SemaType.cpp: add check for SYCLIsDevice to delay the error message.
   The error will be emitted if the use of 128-bit integer in the device
   code.

   Reviewed By: Johannes Doerfert and Aaron Ballman

   Differential Revision: https://reviews.llvm.org/D92439
2020-12-07 10:42:32 -08:00
Stefan Pintilie
49921d1c3c [PowerPC] Exploitation of xxeval instruction for AND and NAND
The xxeval instruction was intorduced in Power PC in Power 10.
The instruction accepts three vector registers and an immediate.
Depending on the value of the immediate the instruction can be used
to perform certain bitwise boolean operations (and, or, xor, ...) on
the given vector registers.

This patch implements the AND and NAND patterns that can be used by
the instruction.

Reviewed By: nemanjai, #powerpc, bsaleil, NeHuang, jsji

Differential Revision: https://reviews.llvm.org/D92420
2020-12-07 12:36:54 -06:00
Richard Sandiford
fd14a27533 [Sema] Make more overload candidate types use iterator_ranges (NFC)
I have a patch that adds another group of candidate types to
BuiltinCandidateTypeSet.  Currently two styles are in use: the older
begin/end pairs and the newer iterator_range approach.  I think the
group of candidates that I want to add should use iterator ranges,
but I'd also like to consolidate the handling of the new candidates
with some existing code that uses begin/end pairs.  This patch therefore
converts the begin/end pairs to iterator ranges as a first step.

No functional change intended.

Differential Revision: https://reviews.llvm.org/D92222
2020-12-07 18:34:53 +00:00
Craig Topper
5c819eb389 [RISCV] Form GORCI from (or (rotl/rotr X, Bitwidth/2), X).
A rotate by half the bitwidth swaps the bottom and top half which is the same as one of the MSB GREVI stage.

We have to do this as a special combine because we prefer to keep (rotl/rotr X, BitWidth/2) as a rotate rather than a single stage GREVI.

Differential Revision: https://reviews.llvm.org/D92286
2020-12-07 10:28:04 -08:00
Simon Pilgrim
c86c024e10 [X86] Fix static analyzer warnings. NFCI.
Replace '|' with '||' in condition, and fix case of SignedMode variable.
2020-12-07 18:23:55 +00:00
Simon Pilgrim
b6e847c396 [DAG] Cleanup by folding some single use VT.getScalarSizeInBits() calls into its comparison. NFCI. 2020-12-07 18:23:54 +00:00
Simon Pilgrim
50dd1dba6e [IPO] Fix operator precedence warning. NFCI.
Check the entire assertion condition before && with the message.
2020-12-07 18:23:54 +00:00
Anton Afanasyev
50bff64158 [SLP][Test] Add test for PR46983 2020-12-07 21:07:40 +03:00
AndreyChurbanov
fff1abc406 [OpenMP] NFC: comment adjusted 2020-12-07 19:50:14 +03:00
Fangrui Song
1b734c662b [Parse] Delete unused declarations 2020-12-07 08:46:17 -08:00
Navdeep Kumar
dc930e5f2f [MLIR][Affine] Add affine.for normalization support
Add support to normalize affine.for ops i.e., convert the lower bound to zero
and loop step to one. The Upper bound is set to the trip count of the loop.
The exact value of loopIV is calculated just inside the body of affine.for.
Currently loops with lower bounds having single result are supported. No such
restriction exists on upper bounds.

Differential Revision: https://reviews.llvm.org/D92233
2020-12-07 22:04:07 +05:30
Hans Wennborg
3d8b7465c3 Test commit 2020-12-07 17:27:03 +01:00
AndreyChurbanov
22558c8501 [OpenMP] libomp: Fix possible NULL dereferences
Check pointer returned by strchr, as it can be NULL in case of broken
format of input string. Introduced new function __kmp_str_loc_numbers
for fast parsing of numbers only in the location string.
Also made some cleanup of __kmp_str_loc_init declaration and usage:
- changed type of init_fname parameter to bool;
- changed input from true to false in places where fname is not used.

Differential Revision: https://reviews.llvm.org/D90962
2020-12-07 19:09:07 +03:00
Yitzhak Mandelbaum
e6bc4a71e3 [libTooling] Add describe combinator for formatting AST nodes for diagnostics.
This new stencil combinator is intended for use in diagnostics and the like.

Differential Revision: https://reviews.llvm.org/D92658
2020-12-07 16:08:05 +00:00
Alexey Bataev
438682de6a [SLP]Merge reorder and reuse shuffles.
It is possible to merge reuse and reorder shuffles and reduce the total
cost of the ivectorization tree/number of final instructions.

Differential Revision: https://reviews.llvm.org/D92668
2020-12-07 07:50:00 -08:00
David Green
d9bf6245bf [ARM] Revert low overhead loops with calls before registry allocation.
This adds code to revert low overhead loops with calls in them before
register allocation. Ideally we would not create low overhead loops with
calls in them to begin with, but that can be difficult to always get
correct. If we want to try and glue together t2LoopDec and t2LoopEnd
into a single instruction, we need to ensure that no instructions use LR
in the loop. (Technically the final code can be better too, as it
doesn't need to use the same registers but that has not been optimized
for here, as reverting loops with calls is expected to be very rare).

It also adds a MVETailPredUtils.h header to share the revert code
between different passes, and provides a place to expand upon, with
RevertLoopWithCall becoming a place to perform other low overhead loop
alterations like removing copies or combining LoopDec and End into a
single instruction.

Differential Revision: https://reviews.llvm.org/D91273
2020-12-07 15:44:40 +00:00
Jon Chesterfield
71f4693020 [libomptarget][amdgpu] Add plumbing to call into hostrpc lib, if linked 2020-12-07 15:24:01 +00:00
Andy Wingo
d823cc7cad [WebAssembly][MC] Fix placement of table section
The table section goes after functions.

Differential Revision: https://reviews.llvm.org/D92323
2020-12-07 16:17:32 +01:00
Jinsong Ji
b49b8f096c [PowerPC][Clang] Remove QPX support
Clean up QPX code in clang missed in https://reviews.llvm.org/D83915

Reviewed By: #powerpc, steven.zhang

Differential Revision: https://reviews.llvm.org/D92329
2020-12-07 10:15:39 -05:00
Sean Fertile
8f91f38148 [LLD] Search archives for symbol defs to override COMMON symbols.
This patch changes the archive handling to enable the semantics needed
for legacy FORTRAN common blocks and block data. When we have a COMMON
definition of a symbol and are including an archive, LLD will now
search the members for global/weak defintions to override the COMMON
symbol. The previous LLD behavior (where a member would only be included
if it satisifed some other needed symbol definition) can be re-enabled with the
option '-no-fortran-common'.

Differential Revision: https://reviews.llvm.org/D86142
2020-12-07 10:09:19 -05:00
Michał Górny
733e2ae8cd Revert "[lldb] [POSIX-DYLD] Add libraries from initial eTakeSnapshot action"
This reverts commit 09b08833f3.

This code is wrong on Linux, and causes ld-linux and linux-vdso to be
reported twice.  I need to work on it more.
2020-12-07 15:58:49 +01:00
Nico Weber
feadc3798d [lld/mac] Make X86_64::getImplicitAddend not do heap allocations
Speeds up linking Chromium's base_unittests almost 10%. According to ministat:

    N           Min           Max        Median           Avg        Stddev
x   5    0.72193289    0.73073196    0.72560811    0.72565799  0.0032265649
+   5    0.64069581    0.67173195    0.65876389    0.65796089   0.011349451
Difference at 95.0% confidence
	-0.0676971 +/- 0.0121682
	-9.32906% +/- 1.67685%
	(Student's t, pooled s = 0.00834328)

Differential Revision: https://reviews.llvm.org/D92734
2020-12-07 09:23:51 -05:00
Alexey Bataev
97c08db84e [SLP]Update test checks, NFC. 2020-12-07 06:12:05 -08:00
Nathan James
8625f5bc79
[clang-tidy][NFC] Streamline CheckOptions error reporting. 2020-12-07 14:05:49 +00:00
Kazushi (Jam) Marukawa
9d4501e2b4 [VE] Add vcp and vex intrinsic instructions
Add vcp and vex intrinsic instructions and regression tests.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D92752
2020-12-07 22:56:55 +09:00
Kerry McLaughlin
111f559bbd [SVE][CodeGen] Call refineIndexType & refineUniformBase from visitMGATHER
The refineIndexType & refineUniformBase functions added by D90942 can also be used to
improve CodeGen of masked gathers.

These changes were split out from D91092

Reviewed By: sdesmalen

Differential Revision: https://reviews.llvm.org/D92319
2020-12-07 13:20:19 +00:00
Haojian Wu
ecaff13fc0 [MemProf] Fix a potential "permission denied" test failure on some systems.
NFC, to make the test more robost.
2020-12-07 14:04:23 +01:00
Petar Avramovic
3a042dcd2e [AMDGPU] Fix default value of glc for mubuf rtn atomics
Mubuf rtn atomics use GLC_1 thus default value for glc operand
should be -1, see https://reviews.llvm.org/D90730.
This allows us to report error when rtn atomic requires glc=1
but does not have glc operand in input.

Differential Revision: https://reviews.llvm.org/D92654
2020-12-07 14:00:08 +01:00
Roman Lebedev
2c0536b76b
[NFC][LoopIdiom] Reshuffle left-shift-until-bittest test coverage (D91038) 2020-12-07 15:27:13 +03:00
Kerry McLaughlin
f6dd32fd35 [SVE][CodeGen] Lower scalable masked gathers
Lowers the llvm.masked.gather intrinsics (scalar plus vector addressing mode only)

Changes in this patch:
- Add custom lowering for MGATHER, using getGatherVecOpcode() to choose the appropriate
  gather load opcode to use.
- Improve codegen with refineIndexType/refineUniformBase, added in D90942
- Tests added for gather loads with 32 & 64-bit scaled & unscaled offsets.

Reviewed By: sdesmalen

Differential Revision: https://reviews.llvm.org/D91092
2020-12-07 12:20:41 +00:00
Nathan James
980618145b
[clang-tidy][docs] Update check options with boolean values instead of non-zero/0/1
Using bools instead of integers better conveys the expected value of the option.

Reviewed By: Eugene.Zelenko, aaron.ballman

Differential Revision: https://reviews.llvm.org/D92652
2020-12-07 12:13:57 +00:00
Sam McCall
a1cb9cbf5c Add ability to load a FixedCompilationDatabase from a buffer.
Previously, loading one from a file meant allowing the library to do the IO.
Clangd would prefer to do such IO itself (e.g. to allow caching).

Differential Revision: https://reviews.llvm.org/D92640
2020-12-07 13:07:10 +01:00
Georgii Rymar
347ea1af34 [llvm-readobj/elf] - Refine the implementation of "printFunctionStackSize".
This rewrites the logic to get rid of "ELFSymbolRef" API where possible.
This allowed to handle possible errors better, improve warnings reported and add new ones.
Also 'reportWarning' was replaced with 'reportUniqueWarning'

Differential revision: https://reviews.llvm.org/D92545
2020-12-07 14:57:44 +03:00
Sam McCall
2542ef83ed [clangd] Fix windows slashes in project config diagnostics 2020-12-07 12:54:38 +01:00
Sam McCall
f1357264b8 [clangd] Temporarily test that uncovered broken behavior on windows 2020-12-07 12:34:17 +01:00
Max Kazantsev
55009a0ff8 [Test] Auto-update test checks 2020-12-07 18:33:47 +07:00
Kazushi (Jam) Marukawa
03898b79fb [VE] Add vrcp, vrsqrt, vcvt, vmrg, and vshf intrinsic instructions
Add vrcp, vrsqrt, vcvt, vmrg, and vshf intrinsic instructions and
regression tests.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D92750
2020-12-07 20:30:12 +09:00