469353 Commits

Author SHA1 Message Date
Jonas Hahnfeld
ac6e9e69ba [clang-repl] Remove redundant tests
They only need to be tested once in execute.cpp and fail.cpp.

Differential Revision: https://reviews.llvm.org/D156425
2023-07-27 16:22:56 +02:00
Nikita Popov
3c4d2221de [InstCombine] Add more tests for unreachable code (NFC) 2023-07-27 15:36:54 +02:00
Martin Braenne
e95134b9cb [clang][dataflow] Reverse course on getValue() deprecation.
In the [value categories RFC](https://discourse.llvm.org/t/70086), I proposed that the end state of the migration should be that `getValue()` should only be legal to call on prvalues.

As a stepping stone, to allow migrating off existing calls to `getValue()`, I proposed introducing `getValueStrict()`, which would already have the new semantics.

However, I've now reconsidered this. Any expression, whether prvalue or glvalue, has a value, so really there isn't any reason to forbid calling `getValue()` on glvalues. I'm therefore removing the deprecation from `getValue()` and transitioning existing `getValueStrict()` calls back to `getValue()`.

The other "strict" accessors are a different case. `setValueStrict()` should only be called on prvalues because glvalues need to have a storage location associated with them; it doesn't make sense to only set a value for them. And, of course, `getStorageLocationStrict()` and `setStorageLocationStrict()` should obviously only be called on glvalues because prvalues don't have storage locations.

Reviewed By: ymandel, xazax.hun

Differential Revision: https://reviews.llvm.org/D155921
2023-07-27 13:14:49 +00:00
Martin Braenne
1b334a2ae7 [clang][dataflow] Eliminate ReferenceValue.
There are no remaining uses of this class in the framework.

This patch is part of the ongoing migration to strict handling of value categories (see https://discourse.llvm.org/t/70086 for details).

Reviewed By: ymandel, xazax.hun, gribozavr2

Differential Revision: https://reviews.llvm.org/D155922
2023-07-27 13:14:47 +00:00
Martin Braenne
771d7d71df [clang][dataflow] HTMLLogger: Don't crash if CFG contains unreachable blocks.
Reviewed By: sammccall

Differential Revision: https://reviews.llvm.org/D156411
2023-07-27 13:02:42 +00:00
Matt Arsenault
95e5a461f5 AMDGPU: Always custom lower extract_subvector
The patterns were ripped out in
a4a3ac10cb1a40ccebed4e81cd7e94f1eb71602d so this always needs to be
custom lowered. I absolutely hate how difficult it is to write tests
for these, I have no doubt there are more of these hidden.

Fixes #64142
2023-07-27 08:46:44 -04:00
Martin Braenne
e6e83cbcc7 [clang][dataflow] Don't crash when constructing an array of records.
When I wrote https://reviews.llvm.org/D155446, I assumed that a `CXXConstructExpr` would always have record type, but this isn't true: It can have array type when constructing an array of records. The code would crash in this situation because `createValue()` would return null.

This patch includes a test that reproduces the crash without the other changes in the patch.

Reviewed By: sammccall

Differential Revision: https://reviews.llvm.org/D156402
2023-07-27 12:46:13 +00:00
Alex Zinenko
d3d93772da [mlir] delete yapf config files, NFC
LLVM has converged to using black for Python formatting. Remove the yapf
configs MLIR used to rely on before that (the reformatting has already
happened).
2023-07-27 12:27:29 +00:00
Ramkumar Ramachandra
23caf9e9e7 Local: fix debug output of replaceDominatedUsesWith()
The debug output of replaceDominatedUsesWith() prints incorrect
information, and the user is left confused about what exactly was
replaced. Fix this.

Differential Revision: https://reviews.llvm.org/D156318
2023-07-27 13:23:38 +01:00
Vimal Patel
8f72e56000 [MLIR] Fix a bug in affine-loop-normalize
The existing logic was not sufficient for the case of loops with lower
and upper bounds with different operand lists.

Reviewed By: bondhugula

Differential Revision: https://reviews.llvm.org/D155578
2023-07-27 17:33:24 +05:30
David Spickett
cea72fe341 [llvm][llvm-reduce] Disable uselistorder test everywhere
This also fails sometimes on x86:
https://lab.llvm.org/buildbot/#/builders/58/builds/42534

Disable it completely peding investigation.
2023-07-27 11:44:00 +00:00
Alex Zinenko
8a7a7137ff [mlir] somewhat decompose TestDialect.cpp
TestDialect.cpp along with the ODS-generated files amounts to around
100k LoC and takes a significant amount of time to compile. Factor out
the test ops related to testing the sytnax and assembly format, which
are a relatively large and well delimited group, into a separate set of
files.

Also factor out dialect interfaces into a separate file.

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D155947
2023-07-27 11:36:24 +00:00
Adam Paszke
7fcf6d43b7 [mlir][capi] Add a Bazel target for the C bindings to the SCF dialect
The SCF bindings are already wired up in CMake, but are missing from the Bazel files.

Reviewed By: jpienaar

Differential Revision: https://reviews.llvm.org/D156316
2023-07-27 11:21:22 +00:00
Alex Zinenko
b2b7efb96d [mlir] NFC: rename XDataFlowAnalysis to XForwardDataFlowAnalysis
This makes naming consisnt with XBackwardDataFlowAnalysis.

Reviewed By: Mogball, phisiart

Differential Revision: https://reviews.llvm.org/D155930
2023-07-27 11:11:40 +00:00
Viktoriia Bakalova
3c6a7b0045 [clangd] Revert the symbol collector behavior to old pre-include-cleaner-library behavior due to a regression.
Differential Revision: https://reviews.llvm.org/D156403
2023-07-27 10:34:35 +00:00
Cullen Rhodes
2854852f4f [mlir][ArmSME] NFC: remove empty return args in roundtrip test 2023-07-27 10:21:37 +00:00
Cullen Rhodes
bc25ab1bac [mlir][ArmSME] NFC: add -cse to simplify vector to ArmSME test 2023-07-27 10:21:36 +00:00
Michael Halkenhaeuser
99ce17b71c [clang][docs][OpenMP] Update status of OMPT support.
Update documentation on implementation status of OMPT.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D156336
2023-07-27 06:16:13 -04:00
Ivan Kosarev
5775db2e7b [TableGen][RegisterInfoEmitter] Make entries of base register class tables human-readable.
Helps tracking changes in the tables on adding new register classes and
updating BaseClassOrder values.

Also eliminates tables translating base register class indexes into
TargetRegisterClass pointers.

Reviewed By: critson

Differential Revision: https://reviews.llvm.org/D156097
2023-07-27 10:42:21 +01:00
David Spickett
7d2fa9e148 [llvm][llvm-reduce] Disable use list order test on AArch64/arm64
This is flaky:
https://lab.llvm.org/buildbot/#/builders/198/builds/4094

Sometimes failing with an assert. I've seen it do the same thing
on Windows On Arm and Linux.
2023-07-27 09:36:10 +00:00
Rainer Orth
6b5149aa44 [Driver] Link shared asan runtime lib with -z now on Solaris/x86
As detailed in Issue #64126, several asan tests `FAIL` due to a cycle in
`AsanInitInternal`.  This can by avoided by disabling lazy binding with `ld
-z now`.

Tested on `amd64-pc-solaris2.11` and `x86_64-pc-linux-gnu`.

Differential Revision: https://reviews.llvm.org/D156325
2023-07-27 11:32:48 +02:00
Jay Foad
2dcf051259 [CodeGen] Store call frame size in MachineBasicBlock
Record the call frame size on entry to each basic block. This is usually
zero except when a basic block has been split in the middle of a call
sequence.

This simplifies PEI::replaceFrameIndices which previously had to visit
basic blocks in a specific order and had special handling for
unreachable blocks. More importantly it paves the way for an equally
simple implementation of a backwards version of replaceFrameIndices,
which is required to fully convert PrologEpilogInserter to backwards
register scavenging, which is preferred because it does not rely on
accurate kill flags.

Differential Revision: https://reviews.llvm.org/D156113
2023-07-27 10:32:00 +01:00
witstorm95
77ef88d7ee [Coroutines] Add an O(n) algorithm for computing the cross suspend point
information.

Fixed https://github.com/llvm/llvm-project/issues/62348

Propagate cross suspend point information by visiting CFG.

Just only go through two times at most, you can get all the cross
suspend point information.

Before the patch:

```
n: 20000
4.31user 0.11system 0:04.44elapsed 99%CPU (0avgtext+0avgdata
552352maxresident)k
0inputs+8848outputs (0major+126254minor)pagefaults 0swaps

n: 40000
11.24user 0.40system 0:11.66elapsed 99%CPU (0avgtext+0avgdata
1788404maxresident)k
0inputs+17600outputs (0major+431105minor)pagefaults 0swaps

n: 60000
21.65user 0.96system 0:22.62elapsed 99%CPU (0avgtext+0avgdata
3809836maxresident)k
0inputs+26352outputs (0major+934749minor)pagefaults 0swaps

n: 80000
37.05user 1.53system 0:38.58elapsed 99%CPU (0avgtext+0avgdata
6602396maxresident)k
0inputs+35096outputs (0major+1622584minor)pagefaults 0swaps

n: 100000
51.87user 2.67system 0:54.54elapsed 99%CPU (0avgtext+0avgdata
10210736maxresident)k
0inputs+43848outputs (0major+2518945minor)pagefaults 0swaps

```
After the patch:

```
n: 20000
3.17user 0.16system 0:03.33elapsed 100%CPU (0avgtext+0avgdata
551736maxresident)k
0inputs+8848outputs (0major+126192minor)pagefaults 0swaps

n: 40000
6.10user 0.42system 0:06.54elapsed 99%CPU (0avgtext+0avgdata
1787848maxresident)k
0inputs+17600outputs (0major+432212minor)pagefaults 0swaps

n: 60000
9.13user 0.89system 0:10.03elapsed 99%CPU (0avgtext+0avgdata
3809108maxresident)k
0inputs+26352outputs (0major+931280minor)pagefaults 0swaps

n: 80000
12.44user 1.57system 0:14.02elapsed 99%CPU (0avgtext+0avgdata
6603432maxresident)k
0inputs+35096outputs (0major+1624635minor)pagefaults 0swaps

n: 100000
16.29user 2.28system 0:18.59elapsed 99%CPU (0avgtext+0avgdata
10212808maxresident)k
0inputs+43848outputs (0major+2522200minor)pagefaults 0swaps

```

Reviewed By: ChuanqiXu

Differential Revision: https://reviews.llvm.org/D154695
2023-07-27 17:28:51 +08:00
Chuanqi Xu
97615ed2f0 Revert "[Coroutines] Add an O(n) algorithm for computing the cross suspend point"
This reverts commit bb4121e65251275b5b16a63423c2bb2be79aeebb. Sorry for
forgetting adding Differential Revision information. It may worth
reverting this one and commit it again given this is a relative big
patch.
2023-07-27 17:27:45 +08:00
witstorm95
bb4121e652 [Coroutines] Add an O(n) algorithm for computing the cross suspend point
information.

Fixed https://github.com/llvm/llvm-project/issues/62348

Propagate cross suspend point information by visiting CFG.

Just only go through two times at most, you can get all the cross
suspend point information.

Before the patch:

```
n: 20000
4.31user 0.11system 0:04.44elapsed 99%CPU (0avgtext+0avgdata
552352maxresident)k
0inputs+8848outputs (0major+126254minor)pagefaults 0swaps

n: 40000
11.24user 0.40system 0:11.66elapsed 99%CPU (0avgtext+0avgdata
1788404maxresident)k
0inputs+17600outputs (0major+431105minor)pagefaults 0swaps

n: 60000
21.65user 0.96system 0:22.62elapsed 99%CPU (0avgtext+0avgdata
3809836maxresident)k
0inputs+26352outputs (0major+934749minor)pagefaults 0swaps

n: 80000
37.05user 1.53system 0:38.58elapsed 99%CPU (0avgtext+0avgdata
6602396maxresident)k
0inputs+35096outputs (0major+1622584minor)pagefaults 0swaps

n: 100000
51.87user 2.67system 0:54.54elapsed 99%CPU (0avgtext+0avgdata
10210736maxresident)k
0inputs+43848outputs (0major+2518945minor)pagefaults 0swaps

```
After the patch:

```
n: 20000
3.17user 0.16system 0:03.33elapsed 100%CPU (0avgtext+0avgdata
551736maxresident)k
0inputs+8848outputs (0major+126192minor)pagefaults 0swaps

n: 40000
6.10user 0.42system 0:06.54elapsed 99%CPU (0avgtext+0avgdata
1787848maxresident)k
0inputs+17600outputs (0major+432212minor)pagefaults 0swaps

n: 60000
9.13user 0.89system 0:10.03elapsed 99%CPU (0avgtext+0avgdata
3809108maxresident)k
0inputs+26352outputs (0major+931280minor)pagefaults 0swaps

n: 80000
12.44user 1.57system 0:14.02elapsed 99%CPU (0avgtext+0avgdata
6603432maxresident)k
0inputs+35096outputs (0major+1624635minor)pagefaults 0swaps

n: 100000
16.29user 2.28system 0:18.59elapsed 99%CPU (0avgtext+0avgdata
10212808maxresident)k
0inputs+43848outputs (0major+2522200minor)pagefaults 0swaps

```
2023-07-27 17:25:32 +08:00
Sameer Sahasrabuddhe
7c760b224b Restore "[GlobalISel] GIntrinsic subclass to represent intrinsics in Generic Machine IR"
Some opcodes in generic MIR represent calls to intrinsics, where the intrinsic
ID is the first non-def operand to the instruction. These are now represented as
a subclass of GenericMachineInstr, and the method MachineInstr::getIntrinsicID()
is now moved to this subclass GIntrinsic.

Some target-defined instructions behave like GMIR intrinsics, and have an
Intrinsic::ID operand. But they should not be recognized as generic intrinsics,
and should not use GIntrinsic::getIntrinsicID(). Separated these out by
introducing a new AMDGPU::getIntrinsicID().

Reviewed By: arsenm, Pierre-vh

Differential Revision: https://reviews.llvm.org/D155556

This restores commit baa3386edb11a2f9bcadda8cf58d56f3707c39fa.
Originally reverted in d0f7850b01cf17e50a4f4b00e3b84dded94df6b8.
2023-07-27 14:49:17 +05:30
Simon Pilgrim
4cd7d8e30a [clang] UnsafeBufferUsage.cpp - fix MSVC "not all control paths return a value" warning. NFC. 2023-07-27 10:17:57 +01:00
David Green
beabfe747b [AArch64] Sink splat to fmlal intrinsics
Similar to other neon index instructions, it is beneficial to sink the splat to
the instruction for fmlal in order for it to create the index.
2023-07-27 10:07:01 +01:00
Jianjian GUAN
5d6d6493ff [RISCV][NFC] Simplify lowerVPOp.
This patch is similar to https://reviews.llvm.org/D153948, using helper function to get ISD and information.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D154411
2023-07-27 16:42:20 +08:00
Nikita Popov
0d677c81c4 [InstCombine] Add test for PR64114 (NFC) 2023-07-27 10:11:48 +02:00
Nikita Popov
90d825be70 Reapply [ConstantFold] Avoid creation of undesirable binop
This was reverted together with another commit due to a test
conflict. Reapply without functional changes.

-----

When commuting the operands, don't create a constant expression
for undesirable binops. Only invoke the constant folding function
in that case.
2023-07-27 09:48:54 +02:00
YAMAMOTO Takashi
47ba908a5e [lld][WebAssembly] Fix func reloc for internal GOT with extended-const
Differential Revision: https://reviews.llvm.org/D155542
2023-07-27 00:46:00 -07:00
Alexandros Lamprineas
2e00eba232 [FuncSpec][NFC] Remove SSA copy intrinsics in the unittests.
Those are added by the SCCP Solver before invoking the Specializer.
They need to be removed otherwise the destructor of PredicateInfo
complains.

Differential Revision: https://reviews.llvm.org/D156365
2023-07-27 08:37:33 +01:00
Balázs Kéri
f4438385d4 [clang][ASTImporter] Fix import of recursive field initializer.
Import of field initializers with circular reference was not working,
this is fixed now.

Fixes issue #63120

Reviewed By: steakhal

Differential Revision: https://reviews.llvm.org/D155574
2023-07-27 09:34:34 +02:00
David Green
509cb33469 [AArch64] Correct the regtype of indexed fmlal
The indexed fmlal should use a low numbered register for the index operand,
which this fixes by making it V128_lo.

Fixes 64104

Differential Revision: https://reviews.llvm.org/D156296
2023-07-27 08:27:03 +01:00
David Green
e012c5cfac [AArch64] Add test showing incorrect register usage of FMLAL. NFC
See D156296
2023-07-27 07:39:10 +01:00
Timm Bäder
2a6cfc4baa [clang][Interp] Try to fix a test on Windows
This seems to fail on Windows:
Interp\literals.cpp Line 946: cast to smaller integer type 'long' from 'char *'
2023-07-27 08:34:15 +02:00
Konstantin Varlamov
194e2ba125 [CMake] Use LLVM_ENABLE_ASSERTIONS to enable the hardened mode in libc++.
Use the new libc++ hardened mode instead of the deprecated safe mode.

Reviewed By: benlangmuir

Differential Revision: https://reviews.llvm.org/D156377
2023-07-26 23:09:23 -07:00
David CARLIER
e3f935c7f8 [Fuzzer] SetThreadName implementation for Windows
Api available since Windows Server 2016/Windows 10 1607.

Reviewers: vitalybuka

Reviewed-By: vitalybuka

Differential Revision: https://reviews.llvm.org/D156317
2023-07-27 06:55:00 +01:00
eopXD
20e87e2f79 [Clang][RISCV] Bump rvv intrinsics version to v0.12
The LLVM now supports v0.12 of the RVV intrinsics. Users can use the macro
riscv_v_intrinsic to distinguish what kind of intrinsics is supported in
the compiler.

Please refer to tag descriptions under

https://github.com/riscv-non-isa/rvv-intrinsic-doc/tags

Reviewed By: kito-cheng

Differential Revision: https://reviews.llvm.org/D156394
2023-07-26 22:54:40 -07:00
eopXD
7cb81c1b8c [Clang][RISCV] Remove RVV intrinsics vread_csr,vwrite_csr
As proposed in riscv-non-isa/rvv-intrinsic-doc#249, removing the interface.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D156321
2023-07-26 22:33:41 -07:00
LLVM GN Syncbot
7029e74643 [gn build] Port a496c8be6e63 2023-07-27 05:20:38 +00:00
eopXD
25e1d61013 [RISCV] Correct policy operand for RVV ISel patterns with merge operand as implicit_def (NFC)
The trailing TU_MU suffixes was added in D154625. The trailing policy
operand for these patterns has no real affect, as the vsetvli insertion
pass omits the trailing policy operand when the merge operand is
undefined.

This patch is essentially an NFC. However, the policy implied for these
patterns is actually TA_MA. This patch corrects them to avoid confusion.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D156342
2023-07-26 22:17:16 -07:00
Vitaly Buka
a496c8be6e Revert "[CodeGen]Allow targets to use target specific COPY instructions for live range splitting"
And dependent commits.

Details in D150388.

This reverts commit 825b7f0ca5f2211ec3c93139f98d1e24048c225c.
This reverts commit 7a98f084c4d121244ef7286bc6503b6a181d446e.
This reverts commit b4a62b1fa546312d882fa12dfdcd015177d66826.
This reverts commit b7836d856206ec39509d42529f958c920368166b.

No conflicts in the code, few tests had conflicts in autogenerated CHECKs:
llvm/test/CodeGen/Thumb2/mve-float32regloops.ll
llvm/test/CodeGen/AMDGPU/fix-frame-reg-in-custom-csr-spills.ll

Reviewed By: alexfh

Differential Revision: https://reviews.llvm.org/D156381
2023-07-26 22:13:32 -07:00
Jim Lin
fa140fe211 [RISCV] Simplify tablegen for XCV mac and mul instructions. NFC.
CVInstMac reuses RVInstR that has the same encoding fields.

Add a new class CVInst16I that has specific encoding fields, and two
new class CVInstMac16I and CVInstMul16I that inherite CVInst16I with
different outs and ins.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D156335
2023-07-27 13:04:44 +08:00
Paulo Matos
d6b73f5625 [SPIRV][NFC] Fix typo in SPV_KHR_16bit_storage extension name
Simple fix for a extension name typo. NFC.

Differential Revision: https://reviews.llvm.org/D156231
2023-07-27 06:52:27 +02:00
Sameer Sahasrabuddhe
d0f7850b01 Revert "[GlobalISel] GIntrinsic subclass to represent intrinsics in Generic Machine IR"
This reverts commit baa3386edb11a2f9bcadda8cf58d56f3707c39fa.

The changes did not cover all occurrences of the deteleted function
MachineInstr::getIntrinsicID().
2023-07-27 10:14:24 +05:30
Sameer Sahasrabuddhe
baa3386edb [GlobalISel] GIntrinsic subclass to represent intrinsics in Generic Machine IR
Some opcodes in generic MIR represent calls to intrinsics, where the intrinsic
ID is the first non-def operand to the instruction. These are now represented as
a subclass of GenericMachineInstr, and the method MachineInstr::getIntrinsicID()
is now moved to this subclass GIntrinsic.

Some target-defined instructions behave like GMIR intrinsics, and have an
Intrinsic::ID operand. But they should not be recognized as generic intrinsics,
and should not use GIntrinsic::getIntrinsicID(). Separated these out by
introducing a new AMDGPU::getIntrinsicID().

Reviewed By: arsenm, Pierre-vh

Differential Revision: https://reviews.llvm.org/D155556
2023-07-27 10:00:45 +05:30
Sameer Sahasrabuddhe
b14e30f10d [LLVM] refactor GenericSSAContext and its specializations
Fix the GenericSSAContext template so that it actually declares all the
necessary typenames and the methods that must be implemented by its
specializations SSAContext and MachineSSAContext.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D156288
2023-07-27 09:54:50 +05:30
Alfred Persson Forsberg
fe9c3c7868 [libc] _INCLUDE_SCUDO: check for compiler-rt in enabled RUNTIMES too
Previously including SCUDO in a libc build with runtimes/ as root was
not possible since this code only checked for compiler-rt enabled via
LLVM_ENABLED_PROJECTS.

Reviewed By: thesamesam

Differential Revision: https://reviews.llvm.org/D156388
2023-07-27 05:11:54 +01:00