Commit Graph

257667 Commits

Author SHA1 Message Date
Craig Topper
c98f8835b5 [IR] Add missing copyright header.
llvm-svn: 298234
2017-03-20 05:08:38 +00:00
Craig Topper
0085ffb940 [APInt] Don't initialize VAL to 0 in APInt constructors. Push it down to the initSlowCase and other init methods.
I'm not sure if zeroing VAL before writing pVal is really necessary, but at least one other place did it in code.

But by taking the store out of line, this reduces the opt binary by about 20k on my local x86-64 build.

llvm-svn: 298233
2017-03-20 01:29:52 +00:00
Xin Tong
cbf04d95e6 Remove unnecessary IDom check
Summary: This Idom check seems unnecessary. The immediate children of a node on the Dominator Tree should always be the IDom of its immediate children in this case.

Reviewers: hfinkel, majnemer, dberlin

Reviewed By: dberlin

Subscribers: dberlin, davide, llvm-commits

Differential Revision: https://reviews.llvm.org/D26954

llvm-svn: 298232
2017-03-20 00:30:19 +00:00
Craig Topper
ff9749f759 [InstCombine] Remove duplicate code in SimplifyDemandedUseBits for URem. NFC
llvm-svn: 298231
2017-03-19 21:45:57 +00:00
Simon Atanasyan
8c75311906 [ELF] clang-format sortMipsSymbols. NFC
llvm-svn: 298230
2017-03-19 19:32:51 +00:00
Aaron Ballman
dbdbabf205 Rename the clang-tidy safety module to be hicpp, for the High-Integrity C++ coding standard from PRQA.
This commit renames all of the safety functionality to be hicpp, adds an appropriate LICENSE.TXT, and updates the documentation accordingly.

llvm-svn: 298229
2017-03-19 17:23:23 +00:00
Craig Topper
5992c8d1dc [AVX-512] Handle kor/kand/kandn/kxor/kxnor/knot intrinsics at lowering time instead of isel
Summary:
Currently we handle these intrinsics at isel with special patterns. But as they just map to normal logic operations, we should just handle them at lowering. This will expose them to DAG combine optimizations. Right now the kor-sequence test generates a bunch of regclass copies between GR16 and VK16 that the peephole optimizer and/or register coallescing are removing to keep everything in the mask domain. By handling the logic op intrinsics earlier, these copies become bitcasts in the DAG and get removed by DAG combine which seems more robust.

This should help enable my plan to stop copying between K registers and GR8/GR16. The peephole optimizer can't remove a chain of copies between K and GR32 with insert_subreg/extract_subreg present in the chain so the kor-sequence test break. But this patch should dodge the problem entirely.

Reviewers: zvi, delena, RKSimon, igorb

Reviewed By: igorb

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D31056

llvm-svn: 298228
2017-03-19 17:11:09 +00:00
Craig Topper
ff2283ec0e [InstCombine] Use update_test_checks.py to regenerate a test. NFC
llvm-svn: 298227
2017-03-19 17:04:52 +00:00
Simon Pilgrim
8424df7dea Fix constant folding of fp2int to large integers
We make the assumption in most of our constant folding code that a fp2int will target an integer of 128-bits or less, calling the APFloat::convertToInteger with only uint64_t[2] of raw bits for the result.

Fuzz testing (PR24662) showed that we don't handle other cases at all, resulting in stack overflows and all sorts of crashes.

This patch uses the APSInt version of APFloat::convertToInteger instead to better handle such cases.

Differential Revision: https://reviews.llvm.org/D31074

llvm-svn: 298226
2017-03-19 16:50:25 +00:00
Simon Pilgrim
5fa1b9a12f Fix MSVC warning: "switch statement contains 'default' but no 'case' labels". NFCI.
llvm-svn: 298225
2017-03-19 16:39:04 +00:00
Ahmed Bougacha
931904d777 [GlobalISel] Don't select trivially dead instructions.
Folding instructions when selecting can cause them to become dead.
Don't select these dead instructions (if they don't have other side
effects, and don't define physical registers).

Preserve existing tests by adding COPYs.

In some tests, the G_CONSTANT vregs never get constrained to a class:
the only use of the vreg was folded into another instruction, so the
G_CONSTANT, now dead, never gets selected.

llvm-svn: 298224
2017-03-19 16:13:00 +00:00
Ahmed Bougacha
48bcd22ce8 [GlobalISel][AArch64] Add DBG_VALUE select test. NFC.
llvm-svn: 298223
2017-03-19 16:12:53 +00:00
Ahmed Bougacha
dcd416a4b9 [GlobalISel][AArch64] Split out cast select tests. NFC.
And remove some redundant bitcast tests.

Also split the test functions themselves: it makes it obvious to see
what's tested where and what isn't, it makes the tests much easier to
read and manually update, and, most importantly, it makes them almost
trivial to update using tooling.  Yes, it's obnoxiously verbose, but
said tooling helps upgrade to better MIR syntax whenever available.

llvm-svn: 298222
2017-03-19 16:12:51 +00:00
Ahmed Bougacha
7f2d17331c [GlobalISel] Move method definition to the proper file. NFC.
llvm-svn: 298221
2017-03-19 16:12:48 +00:00
Ahmed Bougacha
531e275aa8 [CodeGen] Update hasSideEffects comment. NFC.
We used to have 3 side effect flags, but as of r222809, we only have
hasSideEffects.  Change the comment to reflect that.

llvm-svn: 298220
2017-03-19 16:12:45 +00:00
Xin Tong
bcb17ecf04 Correct a rebase mistake.
Left out AA in jumpthreading SimplifyPartiallyRedundantLoad

llvm-svn: 298219
2017-03-19 15:41:46 +00:00
Xin Tong
967e313078 Remove unused arguments. NFCI
llvm-svn: 298218
2017-03-19 15:31:16 +00:00
Xin Tong
d67fb1b66e [JumpThreading] Perform phi-translation in SimplifyPartiallyRedundantLoad.
Summary:
In case we are loading on a phi-load in SimplifyPartiallyRedundantLoad.
Try to phi translate it into incoming values in the predecessors before
we search for available loads.

This needs https://reviews.llvm.org/D30524

Reviewers: davide, sanjoy, efriedma, dberlin, rengolin

Reviewed By: dberlin

Subscribers: junbuml, llvm-commits

Differential Revision: https://reviews.llvm.org/D30543

llvm-svn: 298217
2017-03-19 15:30:53 +00:00
Xin Tong
aef0fcb191 Extract FindAvailablePtrLoadStore out of FindAvailableLoadedValue. NFCI
Summary:
Extract FindAvailablePtrLoadStore out of FindAvailableLoadedValue.
Prepare for upcoming change which will do phi-translation for load on
phi pointer in jump threading SimplifyPartiallyRedundantLoad.

This is in preparation for https://reviews.llvm.org/D30543

Reviewers: efriedma, sanjoy, davide, dberlin

Reviewed By: davide

Subscribers: junbuml, davide, llvm-commits

Differential Revision: https://reviews.llvm.org/D30524

llvm-svn: 298216
2017-03-19 15:27:52 +00:00
Aaron Ballman
a31ea644ce Cleaning up the IdentifierResolver::iterator class a bit; NFC.
The comment about there being three different forms that Ptr represents was stale. Also, the opaque value does not need to be exposed (these functions are unused).

llvm-svn: 298215
2017-03-19 15:15:28 +00:00
Francis Ricci
9971b76d20 Use pthreads for thread-local lsan allocator cache on darwin
Summary:
This patch allows us to move away from using __thread on darwin,
which is requiring for building lsan for darwin on ios version 7
and on iossim i386.

Reviewers: kubamracek, kcc

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D29994

llvm-svn: 298214
2017-03-19 15:02:43 +00:00
Teresa Johnson
9b4b8c8d7b Enable stripping of multiple DILocation on !llvm.loop metadata
Summary:
I found that stripDebugInfo was still leaving significant amounts of
debug info due to !llvm.loop that contained DILocation after stripping.
The support for stripping debug info on !llvm.loop added in r293377 only
removes a single DILocation. Enhance that to remove all DILocation from
!llvm.loop.

Reviewers: hfinkel, aprantl, dsanders

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D31117

llvm-svn: 298213
2017-03-19 13:54:57 +00:00
Oren Ben Simhon
75537b6566 [MIR] Test assumes x64 windows calling convention upon printing/parsing MIR output/input.
llvm-svn: 298212
2017-03-19 13:23:20 +00:00
Benjamin Kramer
6520f83ba4 [MIR] Add triple to test that assumes it runs on windows.
llvm-svn: 298211
2017-03-19 13:04:35 +00:00
Oren Ben Simhon
9ce0ec5dbc CalleeSavedRegister was removed from MIR and is recalculated upon MIR parsing.
llvm-svn: 298210
2017-03-19 11:18:09 +00:00
Oren Ben Simhon
a96fdbf233 Moving the test to x86 because other architectures do not suport regcall calling convention.
llvm-svn: 298209
2017-03-19 08:53:42 +00:00
Igor Breger
f050b797ac [X86][AVX512][Clang][Intrinsics] Adding missing intrinsics to Clang .
Summary:
Adding missing intrinsics :
    _mm512_set_epi16,
    _mm512_set_epi8,
    _mm512_permutevar_epi32
    _mm512_mask_permutevar_epi32

Reviewers: zvi, guyblank, eladcohen, craig.topper

Reviewed By: craig.topper

Subscribers: craig.topper, cfe-commits

Differential Revision: https://reviews.llvm.org/D31034

llvm-svn: 298208
2017-03-19 08:27:16 +00:00
Oren Ben Simhon
0ef61ec32a [MIR] Support Customed Register Mask and CSRs
The MIR printer dumps a string that describe the register mask of a function.
A static predefined list of register masks matches a static list of strings.
However when the register mask is not from the static predefined list, there is no descriptor string and the printer fails.
This patch adds support to custom register mask printing and dumping.
Also the list of callee saved registers (describing the registers that must be preserved for the caller) might be dynamic.
As such this data needs to be dumped and parsed back to the Machine Register Info.

Differential Revision: https://reviews.llvm.org/D30971

llvm-svn: 298207
2017-03-19 08:14:18 +00:00
Zachary Turner
6c8255e831 Fix syntax error when building with editline support.
llvm-svn: 298206
2017-03-19 06:00:31 +00:00
Zachary Turner
6934e0aaa7 Remove FileSystem::Get/SetFilePermissions
Differential Revision: https://reviews.llvm.org/D31089

llvm-svn: 298205
2017-03-19 05:49:43 +00:00
Craig Topper
3a86a04404 [InstCombine] Use setHighBits/setLowBits/setBitsFrom in place of getLowBitsSet/getHighBitsSet.
llvm-svn: 298204
2017-03-19 05:49:16 +00:00
Zachary Turner
d3d95fd66a Remove FileSystem::MakeDirectory.
Have callers use llvm::sys::fs::create_directory() instead.

Differential Revision: https://reviews.llvm.org/D31086

llvm-svn: 298203
2017-03-19 05:48:47 +00:00
Zachary Turner
c8c9f97258 Fix unit test compilation failure.
llvm-svn: 298202
2017-03-19 05:48:01 +00:00
Brian Gesiak
1640e68728 [Analysis] bitreverse(undef) returns undef
Summary:
The reverse of an artbitrary bitpattern is also an arbitrary
bitpattern.

Reviewers: trentxintong, arsenm, majnemer

Reviewed By: majnemer

Subscribers: majnemer, wdng, llvm-commits

Differential Revision: https://reviews.llvm.org/D31118

llvm-svn: 298201
2017-03-19 04:40:42 +00:00
Kuba Mracek
662c9b1e81 Re-commit of r296706 ("Increase stack size for stack-use-after-return test"). Hopefully the recent changes in the test will make it not flaky anymore.
Differential Revision: https://reviews.llvm.org/D30267

llvm-svn: 298200
2017-03-19 00:59:08 +00:00
Daniel Berlin
46b72e6de6 NewGVN: Now that we have a better verifier, we can prove that we can erase the predicateuser set each time we mark it touched
llvm-svn: 298199
2017-03-19 00:07:32 +00:00
Daniel Berlin
d43f0ee7e1 NewGVN: Remove dead code (for now)
llvm-svn: 298198
2017-03-19 00:07:27 +00:00
Tobias Grosser
b28f86e9e6 [CodeGen] Remove need for all parameters to be in scop context for load hoisting.
When not adding constraints on parameters using -polly-ignore-parameter-bounds,
the context may not necessarily list all parameter dimensions. To support code
generation in this situation, we now always iterate over the actual parameter
list, rather than relying on the context to list all parameter dimensions.

llvm-svn: 298197
2017-03-18 23:12:49 +00:00
Kuba Mracek
61f8bca7c5 Apparently, PTHREAD_STACK_MIN can be in limits.h on some systems...
llvm-svn: 298196
2017-03-18 22:01:33 +00:00
Kuba Mracek
0d9b01fb95 Change stack-use-after-return.cc to respect PTHREAD_STACK_MIN before calling pthread_attr_setstacksize. To investigate <https://reviews.llvm.org/D30267>. NFC.
llvm-svn: 298195
2017-03-18 21:35:12 +00:00
Tobias Grosser
1be726a40d [IslExprBuilder] Print accessed memory locations with RuntimeDebugBuilder
After this change, enabling -polly-codegen-add-debug-printing in combination
with -polly-codegen-generate-expressions allows us to instrument the compiled
binaries to not only print the values stored and loaded to a given memory
access, but also to print the accessed location with array name and
per-dimension offset:

  MemRef_A[3][2]
  Store to  6299784: 5.000000
  MemRef_A[3][3]
  Load from 6299788: 0.000000
  MemRef_A[3][3]
  Store to  6299788: 6.000000

This can be very helpful for debugging.

llvm-svn: 298194
2017-03-18 20:54:43 +00:00
Kuba Mracek
07183b4a82 Add extra return value checks into stack-use-after-return.cc to help diagnose AArch64 test failures for <https://reviews.llvm.org/D30267>. NFC.
llvm-svn: 298193
2017-03-18 20:39:31 +00:00
Tobias Grosser
7693b116a1 [OpenMP] Do not emit lifetime markers for context
In commit r219005 lifetime markers have been introduced to mark the lifetime of
the OpenMP context data structure. However, their use seems incorrect and
recently caused a miscompile in ASC_Sequoia/CrystalMk after r298053 which was
not at all related to r298053. r298053 only caused a change in the loop order,
as this change resulted in a different isl internal representation which caused
the scheduler to derive a different schedule. This change then caused the IR to
change, which apparently created a pattern in which LLVM exploites the lifetime
markers. It seems we are using the OpenMP context outside of the lifetime
markers. Even though CrystalMk could probably be fixed by expanding the scope of
the lifetime markers, it is not clear what happens in case the OpenMP function
call is in a loop which will cause a sequence of starting and ending lifetimes.
As it is unlikely that the lifetime markers give any performance benefit, we
just drop them to remove complexity.

llvm-svn: 298192
2017-03-18 20:10:07 +00:00
Craig Topper
d55e153b87 [GVN] Fix accidental double storage of the function BasicBlock list in iterateOnFunction
Summary:
iterateOnFunction creates a ReversePostOrderTraversal object which does a post order traversal in its constructor and stores the results in an internal vector. Iteration over it just reads from the internal vector in reverse order.

The GVN code seems to be unaware of this and iterates over ReversePostOrderTraversal object and makes a copy of the vector into a local vector. (I think at one point in time we used a DFS here instead which would have required the local vector).

The net affect of this is that we have two vectors containing the basic block list. As I didn't want to expose the implementation detail of ReversePostOrderTraversal's constructor to GVN, I've changed the code to do an explicit post order traversal storing into the local vector and then reverse iterate over that.

I've also removed the reserve(256) since the ReversePostOrderTraversal wasn't doing that. I can add it back if we thinks it important. Though it seemed weird that it wasn't based on the size of the function.

Reviewers: davide, anemet, dberlin

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D31084

llvm-svn: 298191
2017-03-18 18:24:41 +00:00
Craig Topper
7cfd4a9d7a [ValueTracking] Remove deadish code from computeKnownBitsAddSub.
The code assigned to KnownZero, but later code unconditionally assigned over it. I'm pretty sure the later code can handle the same cases and more equally well.

llvm-svn: 298190
2017-03-18 18:21:46 +00:00
Tamas Berghammer
e4e17b8ce4 Remove some dead code from DumpValueObjectOptions::PointerDepth
llvm-svn: 298189
2017-03-18 17:33:00 +00:00
Daniel Berlin
06329a98e3 NewGVN: Greatly enhance the ability of the NewGVN verifier to detect
issues, subsuming previous verifier.

llvm-svn: 298188
2017-03-18 15:41:40 +00:00
Daniel Berlin
41b39169e2 NewGVN: Fix PHI evaluation bug exposed by new verifier. We were checking whether the incoming block was reachable instead of whether the specific edge was reachable
llvm-svn: 298187
2017-03-18 15:41:36 +00:00
Daniel Berlin
182771f620 DebugCounters: Add API for setting/unsetting programatically.
This is required so we can re-set the counter state for verifiers,
etc.

llvm-svn: 298186
2017-03-18 15:41:13 +00:00
Renato Golin
f1966cf646 Revert "Modules: Cache PCMs in memory and avoid a use-after-free"
This reverts commit r298165, as it broke the ARM builds.

llvm-svn: 298185
2017-03-18 12:31:32 +00:00